VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/DevFdc.cpp@ 82024

Last change on this file since 82024 was 82024, checked in by vboxsync, 5 years ago

DevATA: Extended IRQ delay to PIO transfers for compatibility with very old guests (see bugref:5869).
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id Revision
File size: 105.4 KB
Line 
1/* $Id: DevFdc.cpp 82024 2019-11-20 13:46:13Z vboxsync $ */
2/** @file
3 * VBox storage devices - Floppy disk controller
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 * --------------------------------------------------------------------
17 *
18 * This code is based on:
19 *
20 * QEMU Floppy disk emulator (Intel 82078)
21 *
22 * Copyright (c) 2003 Jocelyn Mayer
23 *
24 * Permission is hereby granted, free of charge, to any person obtaining a copy
25 * of this software and associated documentation files (the "Software"), to deal
26 * in the Software without restriction, including without limitation the rights
27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28 * copies of the Software, and to permit persons to whom the Software is
29 * furnished to do so, subject to the following conditions:
30 *
31 * The above copyright notice and this permission notice shall be included in
32 * all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40 * THE SOFTWARE.
41 *
42 */
43
44
45/*********************************************************************************************************************************
46* Header Files *
47*********************************************************************************************************************************/
48#define LOG_GROUP LOG_GROUP_DEV_FDC
49#include <VBox/vmm/pdmdev.h>
50#include <VBox/vmm/pdmstorageifs.h>
51#include <VBox/AssertGuest.h>
52#include <iprt/assert.h>
53#include <iprt/string.h>
54#include <iprt/uuid.h>
55
56#include "VBoxDD.h"
57
58#define FDC_SAVESTATE_CURRENT 2 /* The new and improved saved state. */
59#define FDC_SAVESTATE_OLD 1 /* The original saved state. */
60
61#define MAX_FD 2
62
63
64/********************************************************/
65/* debug Floppy devices */
66/* #define DEBUG_FLOPPY */
67
68#ifdef LOG_ENABLED
69# define FLOPPY_DPRINTF(...) Log(("floppy: " __VA_ARGS__))
70#else
71# define FLOPPY_DPRINTF(...) do { } while (0)
72#endif
73
74#define FLOPPY_ERROR RTLogPrintf
75
76typedef struct fdctrl_t fdctrl_t;
77
78/********************************************************/
79/* Floppy drive emulation */
80
81#define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
82#define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
83
84/* Will always be a fixed parameter for us */
85#define FD_SECTOR_LEN 512
86#define FD_SECTOR_SC 2 /* Sector size code */
87#define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
88
89/* Floppy disk drive emulation */
90typedef enum fdrive_type_t {
91 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
92 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
93 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
94 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
95 FDRIVE_DRV_FAKE_15_6 = 0x0e, /* Fake 15.6 MB drive. */
96 FDRIVE_DRV_FAKE_63_5 = 0x0f /* Fake 63.5 MB drive. */
97} fdrive_type_t;
98
99typedef uint8_t fdrive_flags_t;
100#define FDISK_DBL_SIDES UINT8_C(0x01)
101
102typedef enum fdrive_rate_t {
103 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
104 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
105 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
106 FDRIVE_RATE_1M = 0x03 /* 1 Mbps */
107} fdrive_rate_t;
108
109/**
110 * The status for one drive.
111 *
112 * @implements PDMIBASE
113 * @implements PDMIMEDIAPORT
114 * @implements PDMIMOUNTNOTIFY
115 */
116typedef struct fdrive_t {
117 /** Pointer to the owning device instance. */
118 R3PTRTYPE(PPDMDEVINS) pDevIns;
119 /** Pointer to the attached driver's base interface. */
120 R3PTRTYPE(PPDMIBASE) pDrvBase;
121 /** Pointer to the attached driver's block interface. */
122 R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
123 /** Pointer to the attached driver's mount interface.
124 * This is NULL if the driver isn't a removable unit. */
125 R3PTRTYPE(PPDMIMOUNT) pDrvMount;
126 /** The base interface. */
127 PDMIBASE IBase;
128 /** The block port interface. */
129 PDMIMEDIAPORT IPort;
130 /** The mount notify interface. */
131 PDMIMOUNTNOTIFY IMountNotify;
132 /** The LUN #. */
133 RTUINT iLUN;
134 /** The LED for this LUN. */
135 PDMLED Led;
136 /* Drive status */
137 fdrive_type_t drive;
138 uint8_t perpendicular; /* 2.88 MB access mode */
139 uint8_t dsk_chg; /* Disk change line */
140 /* Position */
141 uint8_t head;
142 uint8_t track;
143 uint8_t sect;
144 uint8_t ltrk; /* Logical track */
145 /* Media */
146 fdrive_flags_t flags;
147 uint8_t last_sect; /* Nb sector per track */
148 uint8_t max_track; /* Nb of tracks */
149 uint16_t bps; /* Bytes per sector */
150 uint8_t ro; /* Is read-only */
151 uint8_t media_rate; /* Data rate of medium */
152} fdrive_t;
153
154#define NUM_SIDES(drv) (drv->flags & FDISK_DBL_SIDES ? 2 : 1)
155
156static void fd_init(fdrive_t *drv, bool fInit)
157{
158 /* Drive */
159 if (fInit) {
160 /* Fixate the drive type at init time if possible. */
161 if (drv->pDrvMedia) {
162 PDMMEDIATYPE enmType = drv->pDrvMedia->pfnGetType(drv->pDrvMedia);
163 switch (enmType) {
164 case PDMMEDIATYPE_FLOPPY_360:
165 case PDMMEDIATYPE_FLOPPY_1_20:
166 drv->drive = FDRIVE_DRV_120;
167 break;
168 case PDMMEDIATYPE_FLOPPY_720:
169 case PDMMEDIATYPE_FLOPPY_1_44:
170 drv->drive = FDRIVE_DRV_144;
171 break;
172 default:
173 AssertFailed();
174 RT_FALL_THRU();
175 case PDMMEDIATYPE_FLOPPY_2_88:
176 drv->drive = FDRIVE_DRV_288;
177 break;
178 case PDMMEDIATYPE_FLOPPY_FAKE_15_6:
179 drv->drive = FDRIVE_DRV_FAKE_15_6;
180 break;
181 case PDMMEDIATYPE_FLOPPY_FAKE_63_5:
182 drv->drive = FDRIVE_DRV_FAKE_63_5;
183 break;
184 }
185 } else {
186 drv->drive = FDRIVE_DRV_NONE;
187 }
188 } /* else: The BIOS (and others) get the drive type via the CMOS, so
189 don't change it after the VM has been constructed. */
190 drv->perpendicular = 0;
191 /* Disk */
192 drv->last_sect = 0;
193 drv->max_track = 0;
194}
195
196static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
197 uint8_t last_sect, uint8_t num_sides)
198{
199 return (((track * num_sides) + head) * last_sect) + sect - 1; /* sect >= 1 */
200}
201
202/* Returns current position, in sectors, for given drive */
203static int fd_sector(fdrive_t *drv)
204{
205 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect, NUM_SIDES(drv));
206}
207
208/* Seek to a new position:
209 * returns 0 if already on right track
210 * returns 1 if track changed
211 * returns 2 if track is invalid
212 * returns 3 if sector is invalid
213 * returns 4 if seek is disabled
214 * returns 5 if no media in drive
215 */
216static int fd_seek(fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
217 int enable_seek)
218{
219 int sector;
220 int ret;
221
222 if (!drv->last_sect) {
223 FLOPPY_DPRINTF("no disk in drive (max=%d %d %02x %02x)\n",
224 1, (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
225 drv->max_track, drv->last_sect);
226 return 5;
227 }
228 if (track > drv->max_track ||
229 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
230 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
231 head, track, sect, 1,
232 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
233 drv->max_track, drv->last_sect);
234 return 2;
235 }
236 if (sect > drv->last_sect || sect < 1) {
237 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
238 head, track, sect, 1,
239 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
240 drv->max_track, drv->last_sect);
241 return 3;
242 }
243 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
244 ret = 0;
245 if (sector != fd_sector(drv)) {
246#if 0
247 if (!enable_seek) {
248 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
249 head, track, sect, 1, drv->max_track, drv->last_sect);
250 return 4;
251 }
252#else
253 RT_NOREF(enable_seek);
254#endif
255 drv->head = head;
256 if (drv->track != track)
257 ret = 1;
258 drv->track = track;
259 drv->sect = sect;
260 }
261 drv->ltrk = drv->track;
262
263 return ret;
264}
265
266/* Set drive back to track 0 */
267static void fd_recalibrate(fdrive_t *drv)
268{
269 FLOPPY_DPRINTF("recalibrate\n");
270 drv->head = 0;
271 drv->track = 0;
272 drv->ltrk = 0;
273 drv->sect = 1;
274}
275
276/* Recognize floppy formats */
277typedef struct fd_format_t {
278 fdrive_type_t drive;
279 uint8_t last_sect; /**< Number of sectors. */
280 uint8_t max_track; /**< Number of tracks. */
281 uint8_t max_head; /**< Max head number. */
282 fdrive_rate_t rate;
283 const char *str;
284} fd_format_t;
285
286/* Note: Low-density disks (160K/180K/320K/360K) use 250 Kbps data rate
287 * in 40-track drives, but 300 Kbps in high-capacity 80-track drives.
288 */
289static fd_format_t fd_formats[] = {
290 /* First entry is default format */
291 /* 1.44 MB 3"1/2 floppy disks */
292 { FDRIVE_DRV_144, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 3\"1/2", },
293 { FDRIVE_DRV_144, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 3\"1/2", },
294 { FDRIVE_DRV_144, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB 3\"1/2", },
295 { FDRIVE_DRV_144, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB 3\"1/2", },
296 { FDRIVE_DRV_144, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB 3\"1/2", },
297 { FDRIVE_DRV_144, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB 3\"1/2", },
298 { FDRIVE_DRV_144, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB 3\"1/2", },
299 { FDRIVE_DRV_144, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB 3\"1/2", },
300 /* 2.88 MB 3"1/2 floppy disks */
301 { FDRIVE_DRV_288, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB 3\"1/2", },
302 { FDRIVE_DRV_288, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB 3\"1/2", },
303 { FDRIVE_DRV_288, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB 3\"1/2", },
304 { FDRIVE_DRV_288, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB 3\"1/2", },
305 { FDRIVE_DRV_288, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB 3\"1/2", },
306 /* 720 kB 3"1/2 floppy disks */
307 { FDRIVE_DRV_144, 9, 80, 1, FDRIVE_RATE_250K, "720 kB 3\"1/2", },
308 { FDRIVE_DRV_144, 10, 80, 1, FDRIVE_RATE_250K, "800 kB 3\"1/2", },
309 { FDRIVE_DRV_144, 10, 82, 1, FDRIVE_RATE_250K, "820 kB 3\"1/2", },
310 { FDRIVE_DRV_144, 10, 83, 1, FDRIVE_RATE_250K, "830 kB 3\"1/2", },
311 { FDRIVE_DRV_144, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB 3\"1/2", },
312 { FDRIVE_DRV_144, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB 3\"1/2", },
313 /* 1.2 MB 5"1/4 floppy disks */
314 { FDRIVE_DRV_120, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 5\"1/4", },
315 { FDRIVE_DRV_120, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 5\"1/4", }, /* CP Backup 5.25" HD */
316 { FDRIVE_DRV_120, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 5\"1/4", },
317 { FDRIVE_DRV_120, 18, 82, 1, FDRIVE_RATE_500K, "1.48 MB 5\"1/4", },
318 { FDRIVE_DRV_120, 18, 83, 1, FDRIVE_RATE_500K, "1.49 MB 5\"1/4", },
319 { FDRIVE_DRV_120, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 5\"1/4", },
320 /* 720 kB 5"1/4 floppy disks */
321 { FDRIVE_DRV_120, 9, 80, 1, FDRIVE_RATE_300K, "720 kB 5\"1/4", },
322 { FDRIVE_DRV_120, 11, 80, 1, FDRIVE_RATE_300K, "880 kB 5\"1/4", },
323 /* 360 kB 5"1/4 floppy disks (newer 9-sector formats) */
324 { FDRIVE_DRV_120, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 5\"1/4", },
325 { FDRIVE_DRV_120, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 5\"1/4", },
326 { FDRIVE_DRV_120, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 5\"1/4", }, /* CP Backup 5.25" DD */
327 { FDRIVE_DRV_120, 10, 41, 1, FDRIVE_RATE_300K, "410 kB 5\"1/4", },
328 { FDRIVE_DRV_120, 10, 42, 1, FDRIVE_RATE_300K, "420 kB 5\"1/4", },
329 /* 320 kB 5"1/4 floppy disks (old 8-sector formats) */
330 { FDRIVE_DRV_120, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 5\"1/4", },
331 { FDRIVE_DRV_120, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 5\"1/4", },
332 /* 1.2 MB and low density 3"1/2 floppy 'aliases' */
333 { FDRIVE_DRV_144, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 3\"1/2", },
334 { FDRIVE_DRV_144, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 3\"1/2", },
335 { FDRIVE_DRV_144, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 3\"1/2", }, /* CP Backup 5.25" DD */
336 { FDRIVE_DRV_144, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 3\"1/2", },
337 { FDRIVE_DRV_144, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 3\"1/2", },
338 { FDRIVE_DRV_144, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 3\"1/2", },
339 { FDRIVE_DRV_144, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 3\"1/2", },
340 /* For larger than real life floppy images (see DrvBlock.cpp). */
341 /* 15.6 MB fake floppy disk (just need something big). */
342 { FDRIVE_DRV_FAKE_15_6, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 15.6", },
343 { FDRIVE_DRV_FAKE_15_6, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 15.6", },
344 { FDRIVE_DRV_FAKE_15_6, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 15.6", },
345 { FDRIVE_DRV_FAKE_15_6, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 15.6", },
346 { FDRIVE_DRV_FAKE_15_6, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 15.6", },
347 { FDRIVE_DRV_FAKE_15_6, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 15.6", },
348 { FDRIVE_DRV_FAKE_15_6, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 15.6", },
349 { FDRIVE_DRV_FAKE_15_6, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 15.6", },
350 { FDRIVE_DRV_FAKE_15_6, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 15.6", },
351 { FDRIVE_DRV_FAKE_15_6, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 15.6", },
352 { FDRIVE_DRV_FAKE_15_6, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 15.6", },
353 { FDRIVE_DRV_FAKE_15_6, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 15.6", },
354 { FDRIVE_DRV_FAKE_15_6, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 15.6", },
355 { FDRIVE_DRV_FAKE_15_6, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 15.6", },
356 { FDRIVE_DRV_FAKE_15_6, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 15.6", },
357 { FDRIVE_DRV_FAKE_15_6, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 15.6", },
358 { FDRIVE_DRV_FAKE_15_6, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 15.6", },
359 { FDRIVE_DRV_FAKE_15_6, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 15.6", },
360 { FDRIVE_DRV_FAKE_15_6, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 15.6", },
361 { FDRIVE_DRV_FAKE_15_6, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 15.6", },
362 { FDRIVE_DRV_FAKE_15_6, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 15.6", },
363 /* 63.5 MB fake floppy disk (just need something big). */
364 { FDRIVE_DRV_FAKE_63_5, 255, 255, 1, FDRIVE_RATE_1M, "63.5 MB fake 63.5", },
365 { FDRIVE_DRV_FAKE_63_5, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 63.5", },
366 { FDRIVE_DRV_FAKE_63_5, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 63.5", },
367 { FDRIVE_DRV_FAKE_63_5, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 63.5", },
368 { FDRIVE_DRV_FAKE_63_5, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 63.5", },
369 { FDRIVE_DRV_FAKE_63_5, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 63.5", },
370 { FDRIVE_DRV_FAKE_63_5, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 63.5", },
371 { FDRIVE_DRV_FAKE_63_5, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 63.5", },
372 { FDRIVE_DRV_FAKE_63_5, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 63.5", },
373 { FDRIVE_DRV_FAKE_63_5, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 63.5", },
374 { FDRIVE_DRV_FAKE_63_5, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 63.5", },
375 { FDRIVE_DRV_FAKE_63_5, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 63.5", },
376 { FDRIVE_DRV_FAKE_63_5, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 63.5", },
377 { FDRIVE_DRV_FAKE_63_5, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 63.5", },
378 { FDRIVE_DRV_FAKE_63_5, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 63.5", },
379 { FDRIVE_DRV_FAKE_63_5, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 63.5", },
380 { FDRIVE_DRV_FAKE_63_5, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 63.5", },
381 { FDRIVE_DRV_FAKE_63_5, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 63.5", },
382 { FDRIVE_DRV_FAKE_63_5, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 63.5", },
383 { FDRIVE_DRV_FAKE_63_5, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 63.5", },
384 { FDRIVE_DRV_FAKE_63_5, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 63.5", },
385 { FDRIVE_DRV_FAKE_63_5, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 63.5", },
386 /* end */
387 { FDRIVE_DRV_NONE, (uint8_t)-1, (uint8_t)-1, 0, (fdrive_rate_t)0, NULL, },
388};
389
390/* Revalidate a disk drive after a disk change */
391static void fd_revalidate(fdrive_t *drv)
392{
393 const fd_format_t *parse;
394 uint64_t nb_sectors, size;
395 int i, first_match, match;
396 int nb_heads, max_track, last_sect, ro;
397
398 FLOPPY_DPRINTF("revalidate\n");
399 if ( drv->pDrvMedia
400 && drv->pDrvMount
401 && drv->pDrvMount->pfnIsMounted (drv->pDrvMount)) {
402 ro = drv->pDrvMedia->pfnIsReadOnly (drv->pDrvMedia);
403 nb_heads = max_track = last_sect = 0;
404 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
405 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
406 nb_heads - 1, max_track, last_sect);
407 } else {
408 uint64_t size2 = drv->pDrvMedia->pfnGetSize (drv->pDrvMedia);
409 nb_sectors = size2 / FD_SECTOR_LEN;
410 match = -1;
411 first_match = -1;
412 for (i = 0;; i++) {
413 parse = &fd_formats[i];
414 if (parse->drive == FDRIVE_DRV_NONE)
415 break;
416 if (drv->drive == parse->drive ||
417 drv->drive == FDRIVE_DRV_NONE) {
418 size = (parse->max_head + 1) * parse->max_track *
419 parse->last_sect;
420 if (nb_sectors == size) {
421 match = i;
422 break;
423 }
424 if (first_match == -1)
425 first_match = i;
426 }
427 }
428 if (match == -1) {
429 if (first_match == -1)
430 match = 1;
431 else
432 match = first_match;
433 parse = &fd_formats[match];
434 }
435 nb_heads = parse->max_head + 1;
436 max_track = parse->max_track;
437 last_sect = parse->last_sect;
438 drv->drive = parse->drive;
439 drv->media_rate = parse->rate;
440 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
441 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
442 LogRel(("FDC: %s floppy disk (%d h %d t %d s) %s\n", parse->str,
443 nb_heads, max_track, last_sect, ro ? "ro" : "rw"));
444 }
445 if (nb_heads == 1) {
446 drv->flags &= ~FDISK_DBL_SIDES;
447 } else {
448 drv->flags |= FDISK_DBL_SIDES;
449 }
450 drv->max_track = max_track;
451 drv->last_sect = last_sect;
452 drv->ro = ro;
453 } else {
454 FLOPPY_DPRINTF("No disk in drive\n");
455 drv->last_sect = 0;
456 drv->max_track = 0;
457 drv->flags &= ~FDISK_DBL_SIDES;
458 drv->dsk_chg = true; /* Disk change line active. */
459 }
460}
461
462/********************************************************/
463/* Intel 82078 floppy disk controller emulation */
464
465static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq);
466static void fdctrl_reset_fifo(fdctrl_t *fdctrl);
467static fdrive_t *get_cur_drv(fdctrl_t *fdctrl);
468
469static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl);
470static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl);
471static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl);
472static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value);
473static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl);
474static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value);
475static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl);
476static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value);
477static uint32_t fdctrl_read_data(fdctrl_t *fdctrl);
478static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value);
479static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl);
480static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value);
481
482enum {
483 FD_DIR_WRITE = 0,
484 FD_DIR_READ = 1,
485 FD_DIR_SCANE = 2,
486 FD_DIR_SCANL = 3,
487 FD_DIR_SCANH = 4,
488 FD_DIR_FORMAT = 5
489};
490
491enum {
492 FD_STATE_MULTI = 0x01, /* multi track flag */
493 FD_STATE_FORMAT = 0x02, /* format flag */
494 FD_STATE_SEEK = 0x04 /* seek flag */
495};
496
497enum {
498 FD_REG_SRA = 0x00,
499 FD_REG_SRB = 0x01,
500 FD_REG_DOR = 0x02,
501 FD_REG_TDR = 0x03,
502 FD_REG_MSR = 0x04,
503 FD_REG_DSR = 0x04,
504 FD_REG_FIFO = 0x05,
505 FD_REG_DIR = 0x07,
506 FD_REG_CCR = 0x07
507};
508
509enum {
510 FD_CMD_READ_TRACK = 0x02,
511 FD_CMD_SPECIFY = 0x03,
512 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
513 FD_CMD_WRITE = 0x05,
514 FD_CMD_READ = 0x06,
515 FD_CMD_RECALIBRATE = 0x07,
516 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
517 FD_CMD_WRITE_DELETED = 0x09,
518 FD_CMD_READ_ID = 0x0a,
519 FD_CMD_READ_DELETED = 0x0c,
520 FD_CMD_FORMAT_TRACK = 0x0d,
521 FD_CMD_DUMPREG = 0x0e,
522 FD_CMD_SEEK = 0x0f,
523 FD_CMD_VERSION = 0x10,
524 FD_CMD_SCAN_EQUAL = 0x11,
525 FD_CMD_PERPENDICULAR_MODE = 0x12,
526 FD_CMD_CONFIGURE = 0x13,
527 FD_CMD_LOCK = 0x14,
528 FD_CMD_VERIFY = 0x16,
529 FD_CMD_POWERDOWN_MODE = 0x17,
530 FD_CMD_PART_ID = 0x18,
531 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
532 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
533 FD_CMD_SAVE = 0x2e,
534 FD_CMD_OPTION = 0x33,
535 FD_CMD_RESTORE = 0x4e,
536 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
537 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
538 FD_CMD_FORMAT_AND_WRITE = 0xcd,
539 FD_CMD_RELATIVE_SEEK_IN = 0xcf
540};
541
542enum {
543 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
544 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
545 FD_CONFIG_POLL = 0x10, /* Poll enabled */
546 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
547 FD_CONFIG_EIS = 0x40 /* No implied seeks */
548};
549
550enum {
551 FD_SR0_EQPMT = 0x10,
552 FD_SR0_SEEK = 0x20,
553 FD_SR0_ABNTERM = 0x40,
554 FD_SR0_INVCMD = 0x80,
555 FD_SR0_RDYCHG = 0xc0
556};
557
558enum {
559 FD_SR1_MA = 0x01, /* Missing address mark */
560 FD_SR1_NW = 0x02, /* Not writable */
561 FD_SR1_ND = 0x04, /* No data */
562 FD_SR1_EC = 0x80 /* End of cylinder */
563};
564
565enum {
566 FD_SR2_MD = 0x01, /* Missing data address mark */
567 FD_SR2_SNS = 0x04, /* Scan not satisfied */
568 FD_SR2_SEH = 0x08 /* Scan equal hit */
569};
570
571enum {
572 FD_SRA_DIR = 0x01,
573 FD_SRA_nWP = 0x02,
574 FD_SRA_nINDX = 0x04,
575 FD_SRA_HDSEL = 0x08,
576 FD_SRA_nTRK0 = 0x10,
577 FD_SRA_STEP = 0x20,
578 FD_SRA_nDRV2 = 0x40,
579 FD_SRA_INTPEND = 0x80
580};
581
582enum {
583 FD_SRB_MTR0 = 0x01,
584 FD_SRB_MTR1 = 0x02,
585 FD_SRB_WGATE = 0x04,
586 FD_SRB_RDATA = 0x08,
587 FD_SRB_WDATA = 0x10,
588 FD_SRB_DR0 = 0x20
589};
590
591enum {
592#if MAX_FD == 4
593 FD_DOR_SELMASK = 0x03,
594#else
595 FD_DOR_SELMASK = 0x01,
596#endif
597 FD_DOR_nRESET = 0x04,
598 FD_DOR_DMAEN = 0x08,
599 FD_DOR_MOTEN0 = 0x10,
600 FD_DOR_MOTEN1 = 0x20,
601 FD_DOR_MOTEN2 = 0x40,
602 FD_DOR_MOTEN3 = 0x80
603};
604
605enum {
606#if MAX_FD == 4
607 FD_TDR_BOOTSEL = 0x0c
608#else
609 FD_TDR_BOOTSEL = 0x04
610#endif
611};
612
613enum {
614 FD_DSR_DRATEMASK= 0x03,
615 FD_DSR_PWRDOWN = 0x40,
616 FD_DSR_SWRESET = 0x80
617};
618
619enum {
620 FD_MSR_DRV0BUSY = 0x01,
621 FD_MSR_DRV1BUSY = 0x02,
622 FD_MSR_DRV2BUSY = 0x04,
623 FD_MSR_DRV3BUSY = 0x08,
624 FD_MSR_CMDBUSY = 0x10,
625 FD_MSR_NONDMA = 0x20,
626 FD_MSR_DIO = 0x40,
627 FD_MSR_RQM = 0x80
628};
629
630enum {
631 FD_DIR_DSKCHG = 0x80
632};
633
634#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
635#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
636#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
637
638/**
639 * Floppy controller state.
640 *
641 * @implements PDMILEDPORTS
642 */
643struct fdctrl_t {
644 /* Controller's identification */
645 uint8_t version;
646 /* HW */
647 uint8_t irq_lvl;
648 uint8_t dma_chann;
649 uint16_t io_base;
650 /* Controller state */
651 TMTIMERHANDLE hResultTimer;
652
653 /* Interrupt delay timers. */
654 TMTIMERHANDLE hXferDelayTimer;
655 TMTIMERHANDLE hIrqDelayTimer;
656 uint16_t uIrqDelayMsec;
657 uint8_t st0;
658 uint8_t st1;
659 uint8_t st2;
660
661 uint8_t sra;
662 uint8_t srb;
663 uint8_t dor;
664 uint8_t tdr;
665 uint8_t dsr;
666 uint8_t msr;
667 uint8_t cur_drv;
668 uint8_t status0;
669 uint8_t status1;
670 uint8_t status2;
671 /* Command FIFO */
672 uint8_t fifo[FD_SECTOR_LEN];
673 uint32_t data_pos;
674 uint32_t data_len;
675 uint8_t data_state;
676 uint8_t data_dir;
677 uint8_t eot; /* last wanted sector */
678 /* States kept only to be returned back */
679 /* Timers state */
680 uint8_t timer0;
681 uint8_t timer1;
682 /* precompensation */
683 uint8_t precomp_trk;
684 uint8_t config;
685 uint8_t lock;
686 /* Power down config (also with status regB access mode */
687 uint8_t pwrd;
688 /* Floppy drives */
689 uint8_t num_floppies;
690 fdrive_t drives[MAX_FD];
691 uint8_t reset_sensei;
692 /** Pointer to device instance. */
693 PPDMDEVINS pDevIns;
694
695 /** Status LUN: The base interface. */
696 PDMIBASE IBaseStatus;
697 /** Status LUN: The Leds interface. */
698 PDMILEDPORTS ILeds;
699 /** Status LUN: The Partner of ILeds. */
700 PPDMILEDCONNECTORS pLedsConnector;
701
702 /** I/O ports: 0x3f0 */
703 IOMIOPORTHANDLE hIoPorts0;
704 /** I/O ports: 0x3f1..0x3f5 */
705 IOMIOPORTHANDLE hIoPorts1;
706 /** I/O port: 0x3f7 */
707 IOMIOPORTHANDLE hIoPorts2;
708};
709
710static uint32_t fdctrl_read (fdctrl_t *fdctrl, uint32_t reg)
711{
712 uint32_t retval;
713
714 switch (reg) {
715 case FD_REG_SRA:
716 retval = fdctrl_read_statusA(fdctrl);
717 break;
718 case FD_REG_SRB:
719 retval = fdctrl_read_statusB(fdctrl);
720 break;
721 case FD_REG_DOR:
722 retval = fdctrl_read_dor(fdctrl);
723 break;
724 case FD_REG_TDR:
725 retval = fdctrl_read_tape(fdctrl);
726 break;
727 case FD_REG_MSR:
728 retval = fdctrl_read_main_status(fdctrl);
729 break;
730 case FD_REG_FIFO:
731 retval = fdctrl_read_data(fdctrl);
732 break;
733 case FD_REG_DIR:
734 retval = fdctrl_read_dir(fdctrl);
735 break;
736 default:
737 retval = UINT32_MAX;
738 break;
739 }
740 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
741
742 return retval;
743}
744
745static void fdctrl_write (fdctrl_t *fdctrl, uint32_t reg, uint32_t value)
746{
747 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
748
749 switch (reg) {
750 case FD_REG_DOR:
751 fdctrl_write_dor(fdctrl, value);
752 break;
753 case FD_REG_TDR:
754 fdctrl_write_tape(fdctrl, value);
755 break;
756 case FD_REG_DSR:
757 fdctrl_write_rate(fdctrl, value);
758 break;
759 case FD_REG_FIFO:
760 fdctrl_write_data(fdctrl, value);
761 break;
762 case FD_REG_CCR:
763 fdctrl_write_ccr(fdctrl, value);
764 break;
765 default:
766 break;
767 }
768}
769
770/* Change IRQ state */
771static void fdctrl_reset_irq(fdctrl_t *fdctrl)
772{
773 if (!(fdctrl->sra & FD_SRA_INTPEND))
774 return;
775 FLOPPY_DPRINTF("Reset interrupt\n");
776 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 0);
777 fdctrl->sra &= ~FD_SRA_INTPEND;
778}
779
780static void fdctrl_raise_irq_now(fdctrl_t *fdctrl, uint8_t status0)
781{
782 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
783 FLOPPY_DPRINTF("Raising interrupt...\n");
784 PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 1);
785 fdctrl->sra |= FD_SRA_INTPEND;
786 }
787 if (status0 & FD_SR0_SEEK) {
788 fdrive_t *cur_drv;
789
790 /* A seek clears the disk change line (if a disk is inserted). */
791 cur_drv = get_cur_drv(fdctrl);
792 if (cur_drv->max_track)
793 cur_drv->dsk_chg = false;
794 }
795
796 fdctrl->reset_sensei = 0;
797 fdctrl->status0 = status0;
798 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
799}
800
801static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0)
802{
803 if (!fdctrl->uIrqDelayMsec)
804 {
805 /* If not IRQ delay needed, trigger the interrupt now. */
806 fdctrl_raise_irq_now(fdctrl, status0);
807 }
808 else
809 {
810 /* Otherwise schedule completion after a short while. */
811 fdctrl->st0 = status0;
812 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hIrqDelayTimer, fdctrl->uIrqDelayMsec);
813 }
814}
815
816/* Reset controller */
817static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq)
818{
819 int i;
820
821 FLOPPY_DPRINTF("reset controller\n");
822 fdctrl_reset_irq(fdctrl);
823 /* Initialise controller */
824 fdctrl->sra = 0;
825 fdctrl->srb = 0xc0;
826 if (!fdctrl->drives[1].pDrvMedia)
827 fdctrl->sra |= FD_SRA_nDRV2;
828 fdctrl->cur_drv = 0;
829 fdctrl->dor = FD_DOR_nRESET;
830 fdctrl->dor |= (fdctrl->dma_chann != 0xff) ? FD_DOR_DMAEN : 0;
831 fdctrl->msr = FD_MSR_RQM;
832 /* FIFO state */
833 fdctrl->data_pos = 0;
834 fdctrl->data_len = 0;
835 fdctrl->data_state = 0;
836 fdctrl->data_dir = FD_DIR_WRITE;
837 for (i = 0; i < MAX_FD; i++)
838 fd_recalibrate(&fdctrl->drives[i]);
839 fdctrl_reset_fifo(fdctrl);
840 if (do_irq) {
841 fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
842 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
843 }
844}
845
846static inline fdrive_t *drv0(fdctrl_t *fdctrl)
847{
848 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
849}
850
851static inline fdrive_t *drv1(fdctrl_t *fdctrl)
852{
853 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
854 return &fdctrl->drives[1];
855 else
856 return &fdctrl->drives[0];
857}
858
859#if MAX_FD == 4
860static inline fdrive_t *drv2(fdctrl_t *fdctrl)
861{
862 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
863 return &fdctrl->drives[2];
864 else
865 return &fdctrl->drives[1];
866}
867
868static inline fdrive_t *drv3(fdctrl_t *fdctrl)
869{
870 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
871 return &fdctrl->drives[3];
872 else
873 return &fdctrl->drives[2];
874}
875#endif
876
877static fdrive_t *get_cur_drv(fdctrl_t *fdctrl)
878{
879 switch (fdctrl->cur_drv) {
880 case 0: return drv0(fdctrl);
881 case 1: return drv1(fdctrl);
882#if MAX_FD == 4
883 case 2: return drv2(fdctrl);
884 case 3: return drv3(fdctrl);
885#endif
886 default: return NULL;
887 }
888}
889
890/* Status A register : 0x00 (read-only) */
891static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl)
892{
893 uint32_t retval = fdctrl->sra;
894
895 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
896
897 return retval;
898}
899
900/* Status B register : 0x01 (read-only) */
901static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl)
902{
903 uint32_t retval = fdctrl->srb;
904
905 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
906
907 return retval;
908}
909
910/* Digital output register : 0x02 */
911static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl)
912{
913 uint32_t retval = fdctrl->dor;
914
915 /* Selected drive */
916 retval |= fdctrl->cur_drv;
917 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
918
919 return retval;
920}
921
922static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value)
923{
924 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
925
926 /* Motors */
927 if (value & FD_DOR_MOTEN0)
928 fdctrl->srb |= FD_SRB_MTR0;
929 else
930 fdctrl->srb &= ~FD_SRB_MTR0;
931 if (value & FD_DOR_MOTEN1)
932 fdctrl->srb |= FD_SRB_MTR1;
933 else
934 fdctrl->srb &= ~FD_SRB_MTR1;
935
936 /* Drive */
937 if (value & 1)
938 fdctrl->srb |= FD_SRB_DR0;
939 else
940 fdctrl->srb &= ~FD_SRB_DR0;
941
942 /* Reset */
943 if (!(value & FD_DOR_nRESET)) {
944 if (fdctrl->dor & FD_DOR_nRESET) {
945 FLOPPY_DPRINTF("controller enter RESET state\n");
946 }
947 } else {
948 if (!(fdctrl->dor & FD_DOR_nRESET)) {
949 FLOPPY_DPRINTF("controller out of RESET state\n");
950 fdctrl_reset(fdctrl, 1);
951 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
952 }
953 }
954 /* Selected drive */
955 fdctrl->cur_drv = value & FD_DOR_SELMASK;
956
957 fdctrl->dor = value;
958}
959
960/* Tape drive register : 0x03 */
961static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl)
962{
963 uint32_t retval = fdctrl->tdr;
964
965 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
966
967 return retval;
968}
969
970static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value)
971{
972 /* Reset mode */
973 if (!(fdctrl->dor & FD_DOR_nRESET)) {
974 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
975 return;
976 }
977 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
978 /* Disk boot selection indicator */
979 fdctrl->tdr = value & FD_TDR_BOOTSEL;
980 /* Tape indicators: never allow */
981}
982
983/* Main status register : 0x04 (read) */
984static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl)
985{
986 uint32_t retval = fdctrl->msr;
987
988 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
989 fdctrl->dor |= FD_DOR_nRESET;
990
991 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
992
993 return retval;
994}
995
996/* Data select rate register : 0x04 (write) */
997static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value)
998{
999 /* Reset mode */
1000 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1001 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1002 return;
1003 }
1004 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1005 /* Reset: autoclear */
1006 if (value & FD_DSR_SWRESET) {
1007 fdctrl->dor &= ~FD_DOR_nRESET;
1008 fdctrl_reset(fdctrl, 1);
1009 fdctrl->dor |= FD_DOR_nRESET;
1010 }
1011 if (value & FD_DSR_PWRDOWN) {
1012 fdctrl_reset(fdctrl, 1);
1013 }
1014 fdctrl->dsr = value;
1015}
1016
1017/* Configuration control register : 0x07 (write) */
1018static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value)
1019{
1020 /* Reset mode */
1021 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1022 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1023 return;
1024 }
1025 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1026
1027 /* Only the rate selection bits used in AT mode, and we
1028 * store those in the DSR.
1029 */
1030 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) | (value & FD_DSR_DRATEMASK);
1031}
1032
1033static int fdctrl_media_changed(fdrive_t *drv)
1034{
1035 return drv->dsk_chg;
1036}
1037
1038/* Digital input register : 0x07 (read-only) */
1039static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl)
1040{
1041 uint32_t retval = 0;
1042
1043 /* The change line signal is reported by the currently selected
1044 * drive. If the corresponding motor on bit is not set, the drive
1045 * is *not* selected!
1046 */
1047 if (fdctrl_media_changed(get_cur_drv(fdctrl))
1048 && (fdctrl->dor & (0x10 << fdctrl->cur_drv)))
1049 retval |= FD_DIR_DSKCHG;
1050 if (retval != 0)
1051 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1052
1053 return retval;
1054}
1055
1056/* FIFO state control */
1057static void fdctrl_reset_fifo(fdctrl_t *fdctrl)
1058{
1059 fdctrl->data_dir = FD_DIR_WRITE;
1060 fdctrl->data_pos = 0;
1061 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1062}
1063
1064/* Set FIFO status for the host to read */
1065static void fdctrl_set_fifo(fdctrl_t *fdctrl, int fifo_len, int do_irq)
1066{
1067 fdctrl->data_dir = FD_DIR_READ;
1068 fdctrl->data_len = fifo_len;
1069 fdctrl->data_pos = 0;
1070 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1071 if (do_irq)
1072 fdctrl_raise_irq(fdctrl, 0x00);
1073}
1074
1075/* Set an error: unimplemented/unknown command */
1076static void fdctrl_unimplemented(fdctrl_t *fdctrl, int direction)
1077{
1078 RT_NOREF(direction);
1079 FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
1080 fdctrl->fifo[0] = FD_SR0_INVCMD;
1081 fdctrl_set_fifo(fdctrl, 1, 0);
1082}
1083
1084/* Seek to next sector */
1085static int fdctrl_seek_to_next_sect(fdctrl_t *fdctrl, fdrive_t *cur_drv)
1086{
1087 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1088 cur_drv->head, cur_drv->track, cur_drv->sect,
1089 fd_sector(cur_drv));
1090 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1091 error in fact */
1092 if (cur_drv->sect >= cur_drv->last_sect ||
1093 cur_drv->sect == fdctrl->eot) {
1094 cur_drv->sect = 1;
1095 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1096 if (cur_drv->head == 0 &&
1097 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1098 cur_drv->head = 1;
1099 } else {
1100 cur_drv->head = 0;
1101 cur_drv->ltrk++;
1102 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1103 return 0;
1104 }
1105 } else {
1106 cur_drv->ltrk++;
1107 return 0;
1108 }
1109 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1110 cur_drv->head, cur_drv->track,
1111 cur_drv->sect, fd_sector(cur_drv));
1112 } else {
1113 cur_drv->sect++;
1114 }
1115 return 1;
1116}
1117
1118/* Callback for transfer end (stop or abort) */
1119static void fdctrl_stop_transfer_now(fdctrl_t *fdctrl, uint8_t status0,
1120 uint8_t status1, uint8_t status2)
1121{
1122 fdrive_t *cur_drv;
1123
1124 cur_drv = get_cur_drv(fdctrl);
1125 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1126 status0, status1, status2,
1127 status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
1128 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1129 fdctrl->fifo[1] = status1;
1130 fdctrl->fifo[2] = status2;
1131 fdctrl->fifo[3] = cur_drv->ltrk;
1132 fdctrl->fifo[4] = cur_drv->head;
1133 fdctrl->fifo[5] = cur_drv->sect;
1134 fdctrl->fifo[6] = FD_SECTOR_SC;
1135 FLOPPY_DPRINTF("ST0:%02x ST1:%02x ST2:%02x C:%02x H:%02x R:%02x N:%02x\n",
1136 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2], fdctrl->fifo[3],
1137 fdctrl->fifo[4], fdctrl->fifo[5], fdctrl->fifo[6]);
1138
1139 fdctrl->data_dir = FD_DIR_READ;
1140 if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1141 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 0);
1142 }
1143 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1144 fdctrl->msr &= ~FD_MSR_NONDMA;
1145 fdctrl_set_fifo(fdctrl, 7, 1);
1146}
1147
1148static void fdctrl_stop_transfer(fdctrl_t *fdctrl, uint8_t status0,
1149 uint8_t status1, uint8_t status2)
1150{
1151 if (!fdctrl->uIrqDelayMsec)
1152 {
1153 /* If not IRQ delay needed, just stop the transfer and trigger IRQ now. */
1154 fdctrl_stop_transfer_now(fdctrl, status0, status1, status2);
1155 }
1156 else
1157 {
1158 /* Otherwise schedule completion after a short while. */
1159 fdctrl->st0 = status0;
1160 fdctrl->st1 = status1;
1161 fdctrl->st2 = status2;
1162 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hXferDelayTimer, fdctrl->uIrqDelayMsec);
1163 }
1164}
1165
1166/* Prepare a data transfer (either DMA or FIFO) */
1167static void fdctrl_start_transfer(fdctrl_t *fdctrl, int direction)
1168{
1169 fdrive_t *cur_drv;
1170 uint8_t kh, kt, ks;
1171 int did_seek = 0;
1172
1173 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1174 cur_drv = get_cur_drv(fdctrl);
1175 kt = fdctrl->fifo[2];
1176 kh = fdctrl->fifo[3];
1177 ks = fdctrl->fifo[4];
1178 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1179 GET_CUR_DRV(fdctrl), kh, kt, ks,
1180 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1181 FLOPPY_DPRINTF("CMD:%02x SEL:%02x C:%02x H:%02x R:%02x N:%02x EOT:%02x GPL:%02x DTL:%02x\n",
1182 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1183 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5],
1184 fdctrl->fifo[6], fdctrl->fifo[7], fdctrl->fifo[8]);
1185 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1186 case 2:
1187 /* sect too big */
1188 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1189 fdctrl->fifo[3] = kt;
1190 fdctrl->fifo[4] = kh;
1191 fdctrl->fifo[5] = ks;
1192 return;
1193 case 3:
1194 /* track too big */
1195 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1196 fdctrl->fifo[3] = kt;
1197 fdctrl->fifo[4] = kh;
1198 fdctrl->fifo[5] = ks;
1199 return;
1200 case 4:
1201 /* No seek enabled */
1202 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1203 fdctrl->fifo[3] = kt;
1204 fdctrl->fifo[4] = kh;
1205 fdctrl->fifo[5] = ks;
1206 return;
1207 case 5:
1208 /* No disk in drive */
1209 /// @todo This is wrong! Command should not complete.
1210 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | 0x08, /*FD_SR1_MA |*/ FD_SR1_ND, 0x00);
1211 fdctrl->fifo[3] = kt;
1212 fdctrl->fifo[4] = kh;
1213 fdctrl->fifo[5] = ks;
1214 return;
1215 case 1:
1216 did_seek = 1;
1217 break;
1218 default:
1219 break;
1220 }
1221 /* Check the data rate. If the programmed data rate does not match
1222 * the currently inserted medium, the operation has to fail.
1223 */
1224 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1225 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1226 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1227 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1228 fdctrl->fifo[3] = kt;
1229 fdctrl->fifo[4] = kh;
1230 fdctrl->fifo[5] = ks;
1231 return;
1232 }
1233 /* Set the FIFO state */
1234 fdctrl->data_dir = direction;
1235 fdctrl->data_pos = 0;
1236 fdctrl->msr |= FD_MSR_CMDBUSY;
1237 if (fdctrl->fifo[0] & 0x80)
1238 fdctrl->data_state |= FD_STATE_MULTI;
1239 else
1240 fdctrl->data_state &= ~FD_STATE_MULTI;
1241 if (did_seek)
1242 fdctrl->data_state |= FD_STATE_SEEK;
1243 else
1244 fdctrl->data_state &= ~FD_STATE_SEEK;
1245 if (fdctrl->fifo[5] == 00) {
1246 fdctrl->data_len = fdctrl->fifo[8];
1247 } else {
1248 int tmp;
1249 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1250 tmp = (fdctrl->fifo[6] - ks + 1);
1251 if (fdctrl->fifo[0] & 0x80)
1252 tmp += fdctrl->fifo[6];
1253 fdctrl->data_len *= tmp;
1254 }
1255 fdctrl->eot = fdctrl->fifo[6];
1256 if (fdctrl->dor & FD_DOR_DMAEN) {
1257 int dma_mode;
1258 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1259 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1260 dma_mode = (dma_mode >> 2) & 3;
1261 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1262 dma_mode, direction,
1263 (128 << fdctrl->fifo[5]) *
1264 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1265 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1266 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1267 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1268 (direction == FD_DIR_READ && (dma_mode == 1 || dma_mode == 0))) {
1269 /* No access is allowed until DMA transfer has completed */
1270 fdctrl->msr &= ~FD_MSR_RQM;
1271 /* Now, we just have to wait for the DMA controller to
1272 * recall us...
1273 */
1274 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1275 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1276 return;
1277 } else {
1278 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1279 }
1280 }
1281 FLOPPY_DPRINTF("start non-DMA transfer\n");
1282 fdctrl->msr |= FD_MSR_NONDMA;
1283 if (direction != FD_DIR_WRITE)
1284 fdctrl->msr |= FD_MSR_DIO;
1285
1286 /* IO based transfer: calculate len */
1287 fdctrl_raise_irq(fdctrl, 0x00);
1288 return;
1289}
1290
1291/* Prepare a format data transfer (either DMA or FIFO) */
1292static void fdctrl_start_format(fdctrl_t *fdctrl)
1293{
1294 fdrive_t *cur_drv;
1295 uint8_t ns, dp, kh, kt, ks;
1296
1297 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1298 cur_drv = get_cur_drv(fdctrl);
1299 kt = cur_drv->track;
1300 kh = (fdctrl->fifo[1] & 0x04) >> 2;
1301 ns = fdctrl->fifo[3];
1302 dp = fdctrl->fifo[5];
1303 ks = 1;
1304 FLOPPY_DPRINTF("Start format at %d %d %02x, %d sect, pat %02x (%d)\n",
1305 GET_CUR_DRV(fdctrl), kh, kt, ns, dp,
1306 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1307 switch (fd_seek(cur_drv, kh, kt, ks, false)) {
1308 case 2:
1309 /* sect too big */
1310 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1311 fdctrl->fifo[3] = kt;
1312 fdctrl->fifo[4] = kh;
1313 fdctrl->fifo[5] = ks;
1314 return;
1315 case 3:
1316 /* track too big */
1317 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1318 fdctrl->fifo[3] = kt;
1319 fdctrl->fifo[4] = kh;
1320 fdctrl->fifo[5] = ks;
1321 return;
1322 case 4:
1323 /* No seek enabled */
1324 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1325 fdctrl->fifo[3] = kt;
1326 fdctrl->fifo[4] = kh;
1327 fdctrl->fifo[5] = ks;
1328 return;
1329 case 5:
1330 /* No disk in drive */
1331 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1332 fdctrl->fifo[3] = kt;
1333 fdctrl->fifo[4] = kh;
1334 fdctrl->fifo[5] = ks;
1335 return;
1336 case 1:
1337 break;
1338 default:
1339 break;
1340 }
1341 /* It's not clear what should happen if the data rate does not match. */
1342#if 0
1343 /* Check the data rate. If the programmed data rate does not match
1344 * the currently inserted medium, the operation has to fail.
1345 */
1346 if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1347 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1348 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1349 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1350 fdctrl->fifo[3] = kt;
1351 fdctrl->fifo[4] = kh;
1352 fdctrl->fifo[5] = ks;
1353 return;
1354 }
1355#endif
1356 /* Set the FIFO state */
1357 fdctrl->data_dir = FD_DIR_FORMAT;
1358 fdctrl->data_pos = 0;
1359 fdctrl->msr |= FD_MSR_CMDBUSY;
1360 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1361 fdctrl->data_len = ns * 4;
1362 fdctrl->eot = ns;
1363 if (fdctrl->dor & FD_DOR_DMAEN) {
1364 int dma_mode;
1365 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1366 dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1367 dma_mode = (dma_mode >> 2) & 3;
1368 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1369 dma_mode, fdctrl->data_dir,
1370 (128 << fdctrl->fifo[2]) *
1371 (cur_drv->last_sect + 1), fdctrl->data_len);
1372 if (fdctrl->data_dir == FD_DIR_FORMAT && dma_mode == 2) {
1373 /* No access is allowed until DMA transfer has completed */
1374 fdctrl->msr &= ~FD_MSR_RQM;
1375 /* Now, we just have to wait for the DMA controller to
1376 * recall us...
1377 */
1378 PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1379 PDMDevHlpDMASchedule (fdctrl->pDevIns);
1380 return;
1381 } else {
1382 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, fdctrl->data_dir);
1383 }
1384 }
1385 FLOPPY_DPRINTF("start non-DMA format\n");
1386 fdctrl->msr |= FD_MSR_NONDMA;
1387 /* IO based transfer: calculate len */
1388 fdctrl_raise_irq(fdctrl, 0x00);
1389
1390 return;
1391}
1392
1393/* Prepare a transfer of deleted data */
1394static void fdctrl_start_transfer_del(fdctrl_t *fdctrl, int direction)
1395{
1396 RT_NOREF(direction);
1397 FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1398
1399 /* We don't handle deleted data,
1400 * so we don't return *ANYTHING*
1401 */
1402 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1403}
1404
1405/* Block driver read/write wrappers. */
1406
1407static int blk_write(fdrive_t *drv, int64_t sector_num, const uint8_t *buf, int nb_sectors)
1408{
1409 int rc;
1410
1411 drv->Led.Asserted.s.fWriting = drv->Led.Actual.s.fWriting = 1;
1412
1413 rc = drv->pDrvMedia->pfnWrite(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1414 buf, nb_sectors * FD_SECTOR_LEN);
1415
1416 drv->Led.Actual.s.fWriting = 0;
1417 if (RT_FAILURE(rc))
1418 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1419
1420 return rc;
1421}
1422
1423static int blk_read(fdrive_t *drv, int64_t sector_num, uint8_t *buf, int nb_sectors)
1424{
1425 int rc;
1426
1427 drv->Led.Asserted.s.fReading = drv->Led.Actual.s.fReading = 1;
1428
1429 rc = drv->pDrvMedia->pfnRead(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1430 buf, nb_sectors * FD_SECTOR_LEN);
1431
1432 drv->Led.Actual.s.fReading = 0;
1433
1434 if (RT_FAILURE(rc))
1435 AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1436
1437 return rc;
1438}
1439
1440/**
1441 * @callback_method_impl{FNDMATRANSFERHANDLER, handlers for DMA transfers}
1442 */
1443static DECLCALLBACK(uint32_t) fdctrl_transfer_handler(PPDMDEVINS pDevIns, void *pvUser,
1444 unsigned uChannel, uint32_t off, uint32_t cb)
1445{
1446 RT_NOREF(pDevIns, off);
1447 fdctrl_t *fdctrl;
1448 fdrive_t *cur_drv;
1449 int rc;
1450 uint32_t len = 0;
1451 uint32_t start_pos, rel_pos;
1452 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1453
1454 fdctrl = (fdctrl_t *)pvUser;
1455 if (fdctrl->msr & FD_MSR_RQM) {
1456 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1457 return 0;
1458 }
1459 cur_drv = get_cur_drv(fdctrl);
1460 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1461 fdctrl->data_dir == FD_DIR_SCANH)
1462 status2 = FD_SR2_SNS;
1463 if (cb > fdctrl->data_len)
1464 cb = fdctrl->data_len;
1465 if (cur_drv->pDrvMedia == NULL)
1466 {
1467 if (fdctrl->data_dir == FD_DIR_WRITE)
1468 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1469 else
1470 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1471 Assert(len == 0);
1472 goto transfer_error;
1473 }
1474
1475 if (cur_drv->ro)
1476 {
1477 if (fdctrl->data_dir == FD_DIR_WRITE || fdctrl->data_dir == FD_DIR_FORMAT)
1478 {
1479 /* Handle readonly medium early, no need to do DMA, touch the
1480 * LED or attempt any writes. A real floppy doesn't attempt
1481 * to write to readonly media either. */
1482 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
1483 0x00);
1484 Assert(len == 0);
1485 goto transfer_error;
1486 }
1487 }
1488
1489 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1490 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < cb;) {
1491 len = cb - fdctrl->data_pos;
1492 if (len + rel_pos > FD_SECTOR_LEN)
1493 len = FD_SECTOR_LEN - rel_pos;
1494 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x (%d-0x%08x 0x%08x)\n",
1495 len, cb, fdctrl->data_pos, fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1496 cur_drv->track, cur_drv->sect, fd_sector(cur_drv), fd_sector(cur_drv) * FD_SECTOR_LEN);
1497 if (fdctrl->data_dir != FD_DIR_FORMAT &&
1498 (fdctrl->data_dir != FD_DIR_WRITE ||
1499 len < FD_SECTOR_LEN || rel_pos != 0)) {
1500 /* READ & SCAN commands and realign to a sector for WRITE */
1501 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1502 if (RT_FAILURE(rc))
1503 {
1504 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1505 fd_sector(cur_drv));
1506 /* Sure, image size is too small... */
1507 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1508 }
1509 }
1510 switch (fdctrl->data_dir) {
1511 case FD_DIR_READ:
1512 /* READ commands */
1513 {
1514 uint32_t read;
1515 int rc2 = PDMDevHlpDMAWriteMemory(fdctrl->pDevIns, uChannel,
1516 fdctrl->fifo + rel_pos,
1517 fdctrl->data_pos,
1518 len, &read);
1519 AssertMsgRC (rc2, ("DMAWriteMemory -> %Rrc\n", rc2));
1520 }
1521 break;
1522 case FD_DIR_WRITE:
1523 /* WRITE commands */
1524 {
1525 uint32_t written;
1526 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1527 fdctrl->fifo + rel_pos,
1528 fdctrl->data_pos,
1529 len, &written);
1530 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1531 }
1532
1533 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1534 if (RT_FAILURE(rc))
1535 {
1536 FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1537 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1538 goto transfer_error;
1539 }
1540 break;
1541 case FD_DIR_FORMAT:
1542 /* FORMAT command */
1543 {
1544 uint8_t eot = fdctrl->fifo[3];
1545 uint8_t filler = fdctrl->fifo[5];
1546 uint32_t written;
1547 int sct;
1548 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1549 fdctrl->fifo + rel_pos,
1550 fdctrl->data_pos,
1551 len, &written);
1552 AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1553
1554 /* Fill the entire track with desired data pattern. */
1555 FLOPPY_DPRINTF("formatting track: %d sectors, pattern %02x\n",
1556 eot, filler);
1557 memset(fdctrl->fifo, filler, FD_SECTOR_LEN);
1558 for (sct = 0; sct < eot; ++sct)
1559 {
1560 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1561 if (RT_FAILURE(rc))
1562 {
1563 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1564 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1565 goto transfer_error;
1566 }
1567 fdctrl_seek_to_next_sect(fdctrl, cur_drv);
1568 }
1569 }
1570 break;
1571 default:
1572 /* SCAN commands */
1573 {
1574 uint8_t tmpbuf[FD_SECTOR_LEN];
1575 int ret;
1576 uint32_t read;
1577 int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel, tmpbuf,
1578 fdctrl->data_pos, len, &read);
1579 AssertMsg(RT_SUCCESS(rc2), ("DMAReadMemory -> %Rrc2\n", rc2)); NOREF(rc2);
1580 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1581 if (ret == 0) {
1582 status2 = FD_SR2_SEH;
1583 goto end_transfer;
1584 }
1585 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1586 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1587 status2 = 0x00;
1588 goto end_transfer;
1589 }
1590 }
1591 break;
1592 }
1593 fdctrl->data_pos += len;
1594 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1595 if (rel_pos == 0) {
1596 /* Seek to next sector */
1597 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1598 break;
1599 }
1600 }
1601end_transfer:
1602 len = fdctrl->data_pos - start_pos;
1603 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1604 fdctrl->data_pos, len, fdctrl->data_len);
1605 if (fdctrl->data_dir == FD_DIR_SCANE ||
1606 fdctrl->data_dir == FD_DIR_SCANL ||
1607 fdctrl->data_dir == FD_DIR_SCANH)
1608 status2 = FD_SR2_SEH;
1609 if (FD_DID_SEEK(fdctrl->data_state))
1610 status0 |= FD_SR0_SEEK;
1611 fdctrl->data_len -= len;
1612 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1613transfer_error:
1614
1615 return len;
1616}
1617
1618/* Data register : 0x05 */
1619static uint32_t fdctrl_read_data(fdctrl_t *fdctrl)
1620{
1621 fdrive_t *cur_drv;
1622 uint32_t retval = 0;
1623 unsigned pos;
1624 int rc;
1625
1626 cur_drv = get_cur_drv(fdctrl);
1627 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1628 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1629 FLOPPY_ERROR("controller not ready for reading\n");
1630 return 0;
1631 }
1632 pos = fdctrl->data_pos % FD_SECTOR_LEN;
1633 if (fdctrl->msr & FD_MSR_NONDMA) {
1634 if (pos == 0) {
1635 if (fdctrl->data_pos != 0)
1636 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1637 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1638 fd_sector(cur_drv));
1639 return 0;
1640 }
1641 rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1642 if (RT_FAILURE(rc))
1643 {
1644 FLOPPY_DPRINTF("error getting sector %d\n",
1645 fd_sector(cur_drv));
1646 /* Sure, image size is too small... */
1647 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1648 }
1649 }
1650 }
1651 retval = fdctrl->fifo[pos];
1652 if (++fdctrl->data_pos == fdctrl->data_len) {
1653 fdctrl->data_pos = 0;
1654 /* Switch from transfer mode to status mode
1655 * then from status mode to command mode
1656 */
1657 if (fdctrl->msr & FD_MSR_NONDMA) {
1658 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1659 } else {
1660 fdctrl_reset_fifo(fdctrl);
1661 fdctrl_reset_irq(fdctrl);
1662 }
1663 }
1664 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1665
1666 return retval;
1667}
1668
1669static void fdctrl_format_sector(fdctrl_t *fdctrl)
1670{
1671 fdrive_t *cur_drv;
1672 uint8_t kh, kt, ks;
1673 int ok = 0, rc;
1674
1675 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1676 cur_drv = get_cur_drv(fdctrl);
1677 kt = fdctrl->fifo[6];
1678 kh = fdctrl->fifo[7];
1679 ks = fdctrl->fifo[8];
1680 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1681 GET_CUR_DRV(fdctrl), kh, kt, ks,
1682 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1683 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1684 case 2:
1685 /* sect too big */
1686 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1687 fdctrl->fifo[3] = kt;
1688 fdctrl->fifo[4] = kh;
1689 fdctrl->fifo[5] = ks;
1690 return;
1691 case 3:
1692 /* track too big */
1693 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1694 fdctrl->fifo[3] = kt;
1695 fdctrl->fifo[4] = kh;
1696 fdctrl->fifo[5] = ks;
1697 return;
1698 case 4:
1699 /* No seek enabled */
1700 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1701 fdctrl->fifo[3] = kt;
1702 fdctrl->fifo[4] = kh;
1703 fdctrl->fifo[5] = ks;
1704 return;
1705 case 5:
1706 /* No disk in drive */
1707 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1708 fdctrl->fifo[3] = kt;
1709 fdctrl->fifo[4] = kh;
1710 fdctrl->fifo[5] = ks;
1711 return;
1712 case 1:
1713 fdctrl->data_state |= FD_STATE_SEEK;
1714 break;
1715 default:
1716 break;
1717 }
1718 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1719 if (cur_drv->pDrvMedia) {
1720 rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1721 if (RT_FAILURE (rc)) {
1722 FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1723 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1724 } else {
1725 ok = 1;
1726 }
1727 }
1728 if (ok) {
1729 if (cur_drv->sect == cur_drv->last_sect) {
1730 fdctrl->data_state &= ~FD_STATE_FORMAT;
1731 /* Last sector done */
1732 if (FD_DID_SEEK(fdctrl->data_state))
1733 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1734 else
1735 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1736 } else {
1737 /* More to do */
1738 fdctrl->data_pos = 0;
1739 fdctrl->data_len = 4;
1740 }
1741 }
1742}
1743
1744static void fdctrl_handle_lock(fdctrl_t *fdctrl, int direction)
1745{
1746 RT_NOREF(direction);
1747 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1748 fdctrl->fifo[0] = fdctrl->lock << 4;
1749 fdctrl_set_fifo(fdctrl, 1, 0);
1750}
1751
1752static void fdctrl_handle_dumpreg(fdctrl_t *fdctrl, int direction)
1753{
1754 RT_NOREF(direction);
1755 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1756
1757 /* Drives position */
1758 fdctrl->fifo[0] = drv0(fdctrl)->track;
1759 fdctrl->fifo[1] = drv1(fdctrl)->track;
1760#if MAX_FD == 4
1761 fdctrl->fifo[2] = drv2(fdctrl)->track;
1762 fdctrl->fifo[3] = drv3(fdctrl)->track;
1763#else
1764 fdctrl->fifo[2] = 0;
1765 fdctrl->fifo[3] = 0;
1766#endif
1767 /* timers */
1768 fdctrl->fifo[4] = fdctrl->timer0;
1769 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1770 fdctrl->fifo[6] = cur_drv->last_sect;
1771 fdctrl->fifo[7] = (fdctrl->lock << 7) |
1772 (cur_drv->perpendicular << 2);
1773 fdctrl->fifo[8] = fdctrl->config;
1774 fdctrl->fifo[9] = fdctrl->precomp_trk;
1775 fdctrl_set_fifo(fdctrl, 10, 0);
1776}
1777
1778static void fdctrl_handle_version(fdctrl_t *fdctrl, int direction)
1779{
1780 RT_NOREF(direction);
1781 /* Controller's version */
1782 fdctrl->fifo[0] = fdctrl->version;
1783 fdctrl_set_fifo(fdctrl, 1, 0);
1784}
1785
1786static void fdctrl_handle_partid(fdctrl_t *fdctrl, int direction)
1787{
1788 RT_NOREF(direction);
1789 fdctrl->fifo[0] = 0x01; /* Stepping 1 */
1790 fdctrl_set_fifo(fdctrl, 1, 0);
1791}
1792
1793static void fdctrl_handle_restore(fdctrl_t *fdctrl, int direction)
1794{
1795 RT_NOREF(direction);
1796 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1797
1798 /* Drives position */
1799 drv0(fdctrl)->track = fdctrl->fifo[3];
1800 drv1(fdctrl)->track = fdctrl->fifo[4];
1801#if MAX_FD == 4
1802 drv2(fdctrl)->track = fdctrl->fifo[5];
1803 drv3(fdctrl)->track = fdctrl->fifo[6];
1804#endif
1805 /* timers */
1806 fdctrl->timer0 = fdctrl->fifo[7];
1807 fdctrl->timer1 = fdctrl->fifo[8];
1808 cur_drv->last_sect = fdctrl->fifo[9];
1809 fdctrl->lock = fdctrl->fifo[10] >> 7;
1810 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1811 fdctrl->config = fdctrl->fifo[11];
1812 fdctrl->precomp_trk = fdctrl->fifo[12];
1813 fdctrl->pwrd = fdctrl->fifo[13];
1814 fdctrl_reset_fifo(fdctrl);
1815}
1816
1817static void fdctrl_handle_save(fdctrl_t *fdctrl, int direction)
1818{
1819 RT_NOREF(direction);
1820 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1821
1822 fdctrl->fifo[0] = 0;
1823 fdctrl->fifo[1] = 0;
1824 /* Drives position */
1825 fdctrl->fifo[2] = drv0(fdctrl)->track;
1826 fdctrl->fifo[3] = drv1(fdctrl)->track;
1827#if MAX_FD == 4
1828 fdctrl->fifo[4] = drv2(fdctrl)->track;
1829 fdctrl->fifo[5] = drv3(fdctrl)->track;
1830#else
1831 fdctrl->fifo[4] = 0;
1832 fdctrl->fifo[5] = 0;
1833#endif
1834 /* timers */
1835 fdctrl->fifo[6] = fdctrl->timer0;
1836 fdctrl->fifo[7] = fdctrl->timer1;
1837 fdctrl->fifo[8] = cur_drv->last_sect;
1838 fdctrl->fifo[9] = (fdctrl->lock << 7) |
1839 (cur_drv->perpendicular << 2);
1840 fdctrl->fifo[10] = fdctrl->config;
1841 fdctrl->fifo[11] = fdctrl->precomp_trk;
1842 fdctrl->fifo[12] = fdctrl->pwrd;
1843 fdctrl->fifo[13] = 0;
1844 fdctrl->fifo[14] = 0;
1845 fdctrl_set_fifo(fdctrl, 15, 0);
1846}
1847
1848static void fdctrl_handle_readid(fdctrl_t *fdctrl, int direction)
1849{
1850 RT_NOREF(direction);
1851 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1852
1853 FLOPPY_DPRINTF("CMD:%02x SEL:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1854
1855 fdctrl->msr &= ~FD_MSR_RQM;
1856 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1857 PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hResultTimer, 1000 / 50);
1858}
1859
1860static void fdctrl_handle_format_track(fdctrl_t *fdctrl, int direction)
1861{
1862 RT_NOREF(direction);
1863 fdrive_t *cur_drv;
1864 uint8_t ns, dp;
1865
1866 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1867 cur_drv = get_cur_drv(fdctrl);
1868 fdctrl->data_state &= ~(FD_STATE_MULTI | FD_STATE_SEEK);
1869 ns = fdctrl->fifo[3];
1870 dp = fdctrl->fifo[5];
1871
1872 FLOPPY_DPRINTF("Format track %d at %d, %d sectors, filler %02x\n",
1873 cur_drv->track, GET_CUR_DRV(fdctrl), ns, dp);
1874 FLOPPY_DPRINTF("CMD:%02x SEL:%02x N:%02x SC:%02x GPL:%02x D:%02x\n",
1875 fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1876 fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5]);
1877
1878 /* Since we cannot actually format anything, we have to make sure that
1879 * whatever new format the guest is trying to establish matches the
1880 * existing format of the medium.
1881 */
1882 if (cur_drv->last_sect != ns || fdctrl->fifo[2] != 2)
1883 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_NW, 0);
1884 else
1885 {
1886 cur_drv->bps = fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1887 cur_drv->last_sect = ns;
1888
1889 fdctrl_start_format(fdctrl);
1890 }
1891}
1892
1893static void fdctrl_handle_specify(fdctrl_t *fdctrl, int direction)
1894{
1895 RT_NOREF(direction);
1896 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1897 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1898 if (fdctrl->fifo[2] & 1)
1899 fdctrl->dor &= ~FD_DOR_DMAEN;
1900 else
1901 fdctrl->dor |= FD_DOR_DMAEN;
1902 /* No result back */
1903 fdctrl_reset_fifo(fdctrl);
1904}
1905
1906static void fdctrl_handle_sense_drive_status(fdctrl_t *fdctrl, int direction)
1907{
1908 RT_NOREF(direction);
1909 fdrive_t *cur_drv;
1910
1911 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1912 cur_drv = get_cur_drv(fdctrl);
1913 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1914 /* 1 Byte status back */
1915 fdctrl->fifo[0] = (cur_drv->ro << 6) |
1916 (cur_drv->track == 0 ? 0x10 : 0x00) |
1917 (cur_drv->head << 2) |
1918 GET_CUR_DRV(fdctrl) |
1919 0x28;
1920 fdctrl_set_fifo(fdctrl, 1, 0);
1921}
1922
1923static void fdctrl_handle_recalibrate(fdctrl_t *fdctrl, int direction)
1924{
1925 RT_NOREF(direction);
1926 fdrive_t *cur_drv;
1927 uint8_t st0;
1928
1929 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1930 cur_drv = get_cur_drv(fdctrl);
1931 fd_recalibrate(cur_drv);
1932 fdctrl_reset_fifo(fdctrl);
1933 st0 = FD_SR0_SEEK | GET_CUR_DRV(fdctrl);
1934 /* No drive means no TRK0 signal. */
1935 if (cur_drv->drive == FDRIVE_DRV_NONE)
1936 st0 |= FD_SR0_ABNTERM | FD_SR0_EQPMT;
1937 /* Raise Interrupt */
1938 fdctrl_raise_irq(fdctrl, st0);
1939}
1940
1941static void fdctrl_handle_sense_interrupt_status(fdctrl_t *fdctrl, int direction)
1942{
1943 RT_NOREF(direction);
1944 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1945
1946 FLOPPY_DPRINTF("CMD:%02x\n", fdctrl->fifo[0]);
1947 if(fdctrl->reset_sensei > 0) {
1948 fdctrl->fifo[0] =
1949 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
1950 fdctrl->reset_sensei--;
1951 } else {
1952 /* XXX: status0 handling is broken for read/write
1953 commands, so we do this hack. It should be suppressed
1954 ASAP */
1955 fdctrl->fifo[0] =
1956 FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1957 /* Hack to preserve SR0 on equipment check failures (no drive). */
1958 if (fdctrl->status0 & FD_SR0_EQPMT)
1959 fdctrl->fifo[0] = fdctrl->status0;
1960 }
1961
1962 fdctrl->fifo[1] = cur_drv->track;
1963 fdctrl_set_fifo(fdctrl, 2, 0);
1964 FLOPPY_DPRINTF("ST0:%02x PCN:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1965 fdctrl->status0 = FD_SR0_RDYCHG;
1966}
1967
1968static void fdctrl_handle_seek(fdctrl_t *fdctrl, int direction)
1969{
1970 RT_NOREF(direction);
1971 fdrive_t *cur_drv;
1972
1973 FLOPPY_DPRINTF("CMD:%02x SEL:%02x NCN:%02x\n", fdctrl->fifo[0],
1974 fdctrl->fifo[1], fdctrl->fifo[2]);
1975
1976 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1977 cur_drv = get_cur_drv(fdctrl);
1978 fdctrl_reset_fifo(fdctrl);
1979
1980 /* The seek command just sends step pulses to the drive and doesn't care if
1981 * there's a medium inserted or if it's banging the head against the drive.
1982 */
1983 cur_drv->track = fdctrl->fifo[2];
1984 cur_drv->ltrk = cur_drv->track;
1985 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1986 /* Raise Interrupt */
1987 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK | GET_CUR_DRV(fdctrl));
1988}
1989
1990static void fdctrl_handle_perpendicular_mode(fdctrl_t *fdctrl, int direction)
1991{
1992 RT_NOREF(direction);
1993 fdrive_t *cur_drv = get_cur_drv(fdctrl);
1994
1995 if (fdctrl->fifo[1] & 0x80)
1996 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
1997 /* No result back */
1998 fdctrl_reset_fifo(fdctrl);
1999}
2000
2001static void fdctrl_handle_configure(fdctrl_t *fdctrl, int direction)
2002{
2003 RT_NOREF(direction);
2004 fdctrl->config = fdctrl->fifo[2];
2005 fdctrl->precomp_trk = fdctrl->fifo[3];
2006 /* No result back */
2007 fdctrl_reset_fifo(fdctrl);
2008}
2009
2010static void fdctrl_handle_powerdown_mode(fdctrl_t *fdctrl, int direction)
2011{
2012 RT_NOREF(direction);
2013 fdctrl->pwrd = fdctrl->fifo[1];
2014 fdctrl->fifo[0] = fdctrl->fifo[1];
2015 fdctrl_set_fifo(fdctrl, 1, 0);
2016}
2017
2018static void fdctrl_handle_option(fdctrl_t *fdctrl, int direction)
2019{
2020 RT_NOREF(direction);
2021 /* No result back */
2022 fdctrl_reset_fifo(fdctrl);
2023}
2024
2025static void fdctrl_handle_drive_specification_command(fdctrl_t *fdctrl, int direction)
2026{
2027 RT_NOREF(direction);
2028 /* fdrive_t *cur_drv = get_cur_drv(fdctrl); - unused */
2029
2030 /* This command takes a variable number of parameters. It can be terminated
2031 * at any time if the high bit of a parameter is set. Once there are 6 bytes
2032 * in the FIFO (command + 5 parameter bytes), data_len/data_pos will be 7.
2033 */
2034 if (fdctrl->data_len == 7 || (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80)) {
2035
2036 /* Command parameters done */
2037 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
2038 /* Data is echoed, but not stored! */
2039 fdctrl->fifo[0] = fdctrl->data_len > 2 ? fdctrl->fifo[1] : 0;
2040 fdctrl->fifo[1] = fdctrl->data_len > 3 ? fdctrl->fifo[2] : 0;
2041 fdctrl->fifo[2] = 0;
2042 fdctrl->fifo[3] = 0;
2043 fdctrl_set_fifo(fdctrl, 4, 0);
2044 } else {
2045 fdctrl_reset_fifo(fdctrl);
2046 }
2047 } else
2048 fdctrl->data_len++; /* Wait for another byte. */
2049}
2050
2051static void fdctrl_handle_relative_seek_out(fdctrl_t *fdctrl, int direction)
2052{
2053 RT_NOREF(direction);
2054 fdrive_t *cur_drv;
2055
2056 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2057 cur_drv = get_cur_drv(fdctrl);
2058 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2059 cur_drv->track = cur_drv->max_track - 1;
2060 } else {
2061 cur_drv->track += fdctrl->fifo[2];
2062 }
2063 fdctrl_reset_fifo(fdctrl);
2064 /* Raise Interrupt */
2065 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2066}
2067
2068static void fdctrl_handle_relative_seek_in(fdctrl_t *fdctrl, int direction)
2069{
2070 RT_NOREF(direction);
2071 fdrive_t *cur_drv;
2072
2073 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2074 cur_drv = get_cur_drv(fdctrl);
2075 if (fdctrl->fifo[2] > cur_drv->track) {
2076 cur_drv->track = 0;
2077 } else {
2078 cur_drv->track -= fdctrl->fifo[2];
2079 }
2080 fdctrl_reset_fifo(fdctrl);
2081 /* Raise Interrupt */
2082 fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2083}
2084
2085static const struct {
2086 uint8_t value;
2087 uint8_t mask;
2088 const char* name;
2089 int parameters;
2090 void (*handler)(fdctrl_t *fdctrl, int direction);
2091 int direction;
2092} handlers[] = {
2093 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2094 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2095 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2096 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2097 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2098 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2099 { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2100 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2101 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2102 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2103 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2104 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
2105 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2106 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2107 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2108 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2109 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2110 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2111 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2112 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2113 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2114 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2115 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 1, fdctrl_handle_drive_specification_command },
2116 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2117 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2118 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2119 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2120 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2121 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2122 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2123 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2124 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2125};
2126/* Associate command to an index in the 'handlers' array */
2127static uint8_t command_to_handler[256];
2128
2129static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value)
2130{
2131 fdrive_t *cur_drv;
2132 int pos;
2133
2134 cur_drv = get_cur_drv(fdctrl);
2135 /* Reset mode */
2136 if (!(fdctrl->dor & FD_DOR_nRESET)) {
2137 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2138 return;
2139 }
2140 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
2141 FLOPPY_ERROR("controller not ready for writing\n");
2142 return;
2143 }
2144 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2145 /* Is it write command time ? */
2146 if (fdctrl->msr & FD_MSR_NONDMA) {
2147 /* FIFO data write */
2148 pos = fdctrl->data_pos++;
2149 pos %= FD_SECTOR_LEN;
2150 fdctrl->fifo[pos] = value;
2151 if (pos == FD_SECTOR_LEN - 1 ||
2152 fdctrl->data_pos == fdctrl->data_len) {
2153 blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
2154 }
2155 /* Switch from transfer mode to status mode
2156 * then from status mode to command mode
2157 */
2158 if (fdctrl->data_pos == fdctrl->data_len)
2159 fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
2160 return;
2161 }
2162 if (fdctrl->data_pos == 0) {
2163 /* Command */
2164 fdctrl_reset_irq(fdctrl); /* If pending from previous seek/recalibrate. */
2165 pos = command_to_handler[value & 0xff];
2166 FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
2167 fdctrl->data_len = handlers[pos].parameters + 1;
2168 fdctrl->msr |= FD_MSR_CMDBUSY;
2169 }
2170
2171 FLOPPY_DPRINTF("%s: %02x\n", __FUNCTION__, value);
2172 fdctrl->fifo[fdctrl->data_pos++ % FD_SECTOR_LEN] = value;
2173 if (fdctrl->data_pos == fdctrl->data_len) {
2174 /* We now have all parameters
2175 * and will be able to treat the command
2176 */
2177 if (fdctrl->data_state & FD_STATE_FORMAT) {
2178 fdctrl_format_sector(fdctrl);
2179 return;
2180 }
2181
2182 pos = command_to_handler[fdctrl->fifo[0] & 0xff];
2183 FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
2184 (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
2185 }
2186}
2187
2188
2189/* -=-=-=-=-=-=-=-=- Timer Callback -=-=-=-=-=-=-=-=- */
2190
2191/**
2192 * @callback_method_impl{FNTMTIMERDEV}
2193 */
2194static DECLCALLBACK(void) fdcTimerCallback(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
2195{
2196 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2197 fdrive_t *cur_drv = get_cur_drv(fdctrl);
2198 RT_NOREF(pTimer, pvUser);
2199
2200 /* Pretend we are spinning.
2201 * This is needed for Coherent, which uses READ ID to check for
2202 * sector interleaving.
2203 */
2204 if (cur_drv->last_sect != 0) {
2205 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2206 }
2207 /* READ_ID can't automatically succeed! */
2208 if (!cur_drv->max_track) {
2209 FLOPPY_DPRINTF("read id when no disk in drive\n");
2210 /// @todo This is wrong! Command should not complete.
2211 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2212 } else if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2213 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2214 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2215 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2216 } else if (cur_drv->track >= cur_drv->max_track) {
2217 FLOPPY_DPRINTF("read id past last track (%d >= %d)\n",
2218 cur_drv->track, cur_drv->max_track);
2219 cur_drv->ltrk = 0;
2220 fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA | FD_SR1_ND, FD_SR2_MD);
2221 }
2222 else
2223 fdctrl_stop_transfer_now(fdctrl, 0x00, 0x00, 0x00);
2224}
2225
2226
2227/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2228
2229/**
2230 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f0 accesses.}
2231 */
2232static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2233{
2234 RT_NOREF(pvUser);
2235
2236 if (cb == 1)
2237 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort, u32);
2238 else
2239 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2240 return VINF_SUCCESS;
2241}
2242
2243
2244/**
2245 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f0 accesses.}
2246 */
2247static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2248{
2249 RT_NOREF(pvUser);
2250
2251 if (cb == 1)
2252 {
2253 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort);
2254 return VINF_SUCCESS;
2255 }
2256 return VERR_IOM_IOPORT_UNUSED;
2257}
2258
2259
2260/**
2261 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f1..0x3f5 accesses.}
2262 */
2263static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2264{
2265 RT_NOREF(pvUser);
2266
2267 if (cb == 1)
2268 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1, u32);
2269 else
2270 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2271 return VINF_SUCCESS;
2272}
2273
2274
2275/**
2276 * @callback_method_impl{FNTMTIMERDEV}
2277 */
2278static DECLCALLBACK(void) fdcTransferDelayTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
2279{
2280 RT_NOREF(pDevIns, pTimer);
2281 fdctrl_t *fdctrl = (fdctrl_t *)pvUser;
2282 fdctrl_stop_transfer_now(fdctrl, fdctrl->st0, fdctrl->st1, fdctrl->st2);
2283}
2284
2285/**
2286 * @callback_method_impl{FNTMTIMERDEV}
2287 */
2288static DECLCALLBACK(void) fdcIrqDelayTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
2289{
2290 RT_NOREF(pDevIns, pTimer);
2291 fdctrl_t *fdctrl = (fdctrl_t *)pvUser;
2292 fdctrl_raise_irq_now(fdctrl, fdctrl->st0);
2293}
2294
2295
2296
2297/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2298/**
2299 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f1..0x3f5 accesses.}
2300 */
2301static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2302{
2303 RT_NOREF(pvUser);
2304
2305 if (cb == 1)
2306 {
2307 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1);
2308 return VINF_SUCCESS;
2309 }
2310 return VERR_IOM_IOPORT_UNUSED;
2311}
2312
2313
2314/**
2315 * @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f7 access.}
2316 */
2317static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2318{
2319 RT_NOREF(offPort, pvUser);
2320 Assert(offPort == 0);
2321
2322 if (cb == 1)
2323 fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7, u32);
2324 else
2325 ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2326 return VINF_SUCCESS;
2327}
2328
2329
2330/**
2331 * @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f7 access.}
2332 */
2333static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
2334{
2335 RT_NOREF(pvUser, offPort);
2336 Assert(offPort == 0);
2337
2338 if (cb == 1)
2339 {
2340 *pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7);
2341 return VINF_SUCCESS;
2342 }
2343 return VERR_IOM_IOPORT_UNUSED;
2344}
2345
2346
2347/* -=-=-=-=-=-=-=-=- Saved state -=-=-=-=-=-=-=-=- */
2348
2349/**
2350 * @callback_method_impl{FNSSMDEVSAVEEXEC}
2351 */
2352static DECLCALLBACK(int) fdcSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2353{
2354 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2355 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2356 unsigned int i;
2357 int rc;
2358
2359 /* Save the FDC I/O registers... */
2360 pHlp->pfnSSMPutU8(pSSM, pThis->sra);
2361 pHlp->pfnSSMPutU8(pSSM, pThis->srb);
2362 pHlp->pfnSSMPutU8(pSSM, pThis->dor);
2363 pHlp->pfnSSMPutU8(pSSM, pThis->tdr);
2364 pHlp->pfnSSMPutU8(pSSM, pThis->dsr);
2365 pHlp->pfnSSMPutU8(pSSM, pThis->msr);
2366 /* ...the status registers... */
2367 pHlp->pfnSSMPutU8(pSSM, pThis->status0);
2368 pHlp->pfnSSMPutU8(pSSM, pThis->status1);
2369 pHlp->pfnSSMPutU8(pSSM, pThis->status2);
2370 /* ...the command FIFO... */
2371 pHlp->pfnSSMPutU32(pSSM, sizeof(pThis->fifo));
2372 pHlp->pfnSSMPutMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2373 pHlp->pfnSSMPutU32(pSSM, pThis->data_pos);
2374 pHlp->pfnSSMPutU32(pSSM, pThis->data_len);
2375 pHlp->pfnSSMPutU8(pSSM, pThis->data_state);
2376 pHlp->pfnSSMPutU8(pSSM, pThis->data_dir);
2377 /* ...and miscellaneous internal FDC state. */
2378 pHlp->pfnSSMPutU8(pSSM, pThis->reset_sensei);
2379 pHlp->pfnSSMPutU8(pSSM, pThis->eot);
2380 pHlp->pfnSSMPutU8(pSSM, pThis->timer0);
2381 pHlp->pfnSSMPutU8(pSSM, pThis->timer1);
2382 pHlp->pfnSSMPutU8(pSSM, pThis->precomp_trk);
2383 pHlp->pfnSSMPutU8(pSSM, pThis->config);
2384 pHlp->pfnSSMPutU8(pSSM, pThis->lock);
2385 pHlp->pfnSSMPutU8(pSSM, pThis->pwrd);
2386 pHlp->pfnSSMPutU8(pSSM, pThis->version);
2387
2388 /* Save the number of drives and per-drive state. Note that the media
2389 * states will be updated in fd_revalidate() and need not be saved.
2390 */
2391 pHlp->pfnSSMPutU8(pSSM, pThis->num_floppies);
2392 Assert(RT_ELEMENTS(pThis->drives) == pThis->num_floppies);
2393 for (i = 0; i < pThis->num_floppies; ++i)
2394 {
2395 fdrive_t *d = &pThis->drives[i];
2396
2397 pHlp->pfnSSMPutMem(pSSM, &d->Led, sizeof(d->Led));
2398 pHlp->pfnSSMPutU32(pSSM, d->drive);
2399 pHlp->pfnSSMPutU8(pSSM, d->dsk_chg);
2400 pHlp->pfnSSMPutU8(pSSM, d->perpendicular);
2401 pHlp->pfnSSMPutU8(pSSM, d->head);
2402 pHlp->pfnSSMPutU8(pSSM, d->track);
2403 pHlp->pfnSSMPutU8(pSSM, d->sect);
2404 }
2405 rc = pHlp->pfnTimerSave(pDevIns, pThis->hXferDelayTimer, pSSM);
2406 if (RT_FAILURE(rc))
2407 return rc;
2408
2409 rc = pHlp->pfnTimerSave(pDevIns, pThis->hIrqDelayTimer, pSSM);
2410 if (RT_FAILURE(rc))
2411 return rc;
2412
2413 return pHlp->pfnTimerSave(pDevIns, pThis->hResultTimer, pSSM);
2414}
2415
2416
2417/**
2418 * @callback_method_impl{FNSSMDEVLOADEXEC}
2419 */
2420static DECLCALLBACK(int) fdcLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2421{
2422 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2423 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2424 unsigned int i;
2425 uint32_t val32;
2426 uint8_t val8;
2427 int rc;
2428
2429 if (uVersion > FDC_SAVESTATE_CURRENT)
2430 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2431 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2432
2433 /* The old saved state was significantly different. However, we can get
2434 * back most of the controller state and fix the rest by pretending the
2435 * disk in the drive (if any) has been replaced. At any rate there should
2436 * be no difficulty unless the state was saved during a floppy operation.
2437 */
2438 if (uVersion == FDC_SAVESTATE_OLD)
2439 {
2440 /* First verify a few assumptions. */
2441 AssertMsgReturn(sizeof(pThis->fifo) == FD_SECTOR_LEN,
2442 ("The size of FIFO in saved state doesn't match!\n"),
2443 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2444 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == 2,
2445 ("The number of drives in old saved state doesn't match!\n"),
2446 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2447 /* Now load the old state. */
2448 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2449 /* Toss IRQ level, DMA channel, I/O base, and state. */
2450 pHlp->pfnSSMGetU8(pSSM, &val8);
2451 pHlp->pfnSSMGetU8(pSSM, &val8);
2452 pHlp->pfnSSMGetU32(pSSM, &val32);
2453 pHlp->pfnSSMGetU8(pSSM, &val8);
2454 /* Translate dma_en. */
2455 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2456 AssertRCReturn(rc, rc);
2457 if (val8)
2458 pThis->dor |= FD_DOR_DMAEN;
2459 pHlp->pfnSSMGetU8(pSSM, &pThis->cur_drv);
2460 /* Translate bootsel. */
2461 rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2462 AssertRCReturn(rc, rc);
2463 pThis->tdr |= val8 << 2;
2464 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, FD_SECTOR_LEN);
2465 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2466 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2467 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2468 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2469 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2470 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2471 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2472 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2473 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2474 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2475 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2476 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2477
2478 for (i = 0; i < 2; ++i)
2479 {
2480 fdrive_t *d = &pThis->drives[i];
2481
2482 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof (d->Led));
2483 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2484 d->drive = (fdrive_type_t)val32;
2485 AssertRCReturn(rc, rc);
2486 pHlp->pfnSSMGetU32(pSSM, &val32); /* Toss drflags */
2487 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2488 pHlp->pfnSSMGetU8(pSSM, &d->head);
2489 pHlp->pfnSSMGetU8(pSSM, &d->track);
2490 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2491 pHlp->pfnSSMGetU8(pSSM, &val8); /* Toss dir, rw */
2492 pHlp->pfnSSMGetU8(pSSM, &val8);
2493 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2494 AssertRCReturn(rc, rc);
2495 d->flags = (fdrive_flags_t)val32;
2496 pHlp->pfnSSMGetU8(pSSM, &d->last_sect);
2497 pHlp->pfnSSMGetU8(pSSM, &d->max_track);
2498 pHlp->pfnSSMGetU16(pSSM, &d->bps);
2499 pHlp->pfnSSMGetU8(pSSM, &d->ro);
2500 }
2501 }
2502 else /* New state - straightforward. */
2503 {
2504 Assert(uVersion == FDC_SAVESTATE_CURRENT);
2505 /* Load the FDC I/O registers... */
2506 pHlp->pfnSSMGetU8(pSSM, &pThis->sra);
2507 pHlp->pfnSSMGetU8(pSSM, &pThis->srb);
2508 pHlp->pfnSSMGetU8(pSSM, &pThis->dor);
2509 pHlp->pfnSSMGetU8(pSSM, &pThis->tdr);
2510 pHlp->pfnSSMGetU8(pSSM, &pThis->dsr);
2511 pHlp->pfnSSMGetU8(pSSM, &pThis->msr);
2512 /* ...the status registers... */
2513 pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2514 pHlp->pfnSSMGetU8(pSSM, &pThis->status1);
2515 pHlp->pfnSSMGetU8(pSSM, &pThis->status2);
2516 /* ...the command FIFO, if the size matches... */
2517 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2518 AssertRCReturn(rc, rc);
2519 AssertMsgReturn(sizeof(pThis->fifo) == val32,
2520 ("The size of FIFO in saved state doesn't match!\n"),
2521 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2522 pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2523 pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2524 pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2525 pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2526 pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2527 /* ...and miscellaneous internal FDC state. */
2528 pHlp->pfnSSMGetU8(pSSM, &pThis->reset_sensei);
2529 pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2530 pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2531 pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2532 pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2533 pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2534 pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2535 pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2536 pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2537
2538 /* Validate the number of drives. */
2539 rc = pHlp->pfnSSMGetU8(pSSM, &pThis->num_floppies);
2540 AssertRCReturn(rc, rc);
2541 AssertMsgReturn(RT_ELEMENTS(pThis->drives) == pThis->num_floppies,
2542 ("The number of drives in saved state doesn't match!\n"),
2543 VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2544
2545 /* Load the per-drive state. */
2546 for (i = 0; i < pThis->num_floppies; ++i)
2547 {
2548 fdrive_t *d = &pThis->drives[i];
2549
2550 pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof(d->Led));
2551 rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2552 AssertRCReturn(rc, rc);
2553 d->drive = (fdrive_type_t)val32;
2554 pHlp->pfnSSMGetU8(pSSM, &d->dsk_chg);
2555 pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2556 pHlp->pfnSSMGetU8(pSSM, &d->head);
2557 pHlp->pfnSSMGetU8(pSSM, &d->track);
2558 pHlp->pfnSSMGetU8(pSSM, &d->sect);
2559 }
2560 }
2561 return pHlp->pfnTimerLoad(pDevIns, pThis->hResultTimer, pSSM);
2562}
2563
2564
2565/* -=-=-=-=-=-=-=-=- Drive level interfaces -=-=-=-=-=-=-=-=- */
2566
2567/**
2568 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnMountNotify}
2569 */
2570static DECLCALLBACK(void) fdMountNotify(PPDMIMOUNTNOTIFY pInterface)
2571{
2572 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2573 LogFlow(("fdMountNotify:\n"));
2574 fd_revalidate(pDrv);
2575}
2576
2577
2578/**
2579 * @interface_method_impl{PDMIMOUNTNOTIFY,pfnUnmountNotify}
2580 */
2581static DECLCALLBACK(void) fdUnmountNotify(PPDMIMOUNTNOTIFY pInterface)
2582{
2583 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2584 LogFlow(("fdUnmountNotify:\n"));
2585 fd_revalidate(pDrv);
2586}
2587
2588
2589/**
2590 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2591 */
2592static DECLCALLBACK(void *) fdQueryInterface (PPDMIBASE pInterface, const char *pszIID)
2593{
2594 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IBase);
2595
2596 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDrv->IBase);
2597 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDrv->IPort);
2598 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMOUNTNOTIFY, &pDrv->IMountNotify);
2599 return NULL;
2600}
2601
2602
2603/**
2604 * @interface_method_impl{PDMIMEDIAPORT,pfnQueryDeviceLocation}
2605 */
2606static DECLCALLBACK(int) fdQueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2607 uint32_t *piInstance, uint32_t *piLUN)
2608{
2609 fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IPort);
2610 PPDMDEVINS pDevIns = pDrv->pDevIns;
2611
2612 AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2613 AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2614 AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2615
2616 *ppcszController = pDevIns->pReg->szName;
2617 *piInstance = pDevIns->iInstance;
2618 *piLUN = pDrv->iLUN;
2619
2620 return VINF_SUCCESS;
2621}
2622
2623/* -=-=-=-=-=-=-=-=- Controller level interfaces -=-=-=-=-=-=-=-=- */
2624
2625/**
2626 * @interface_method_impl{PDMILEDPORTS,pfnQueryStatusLed}
2627 */
2628static DECLCALLBACK(int) fdcStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2629{
2630 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, ILeds);
2631 if (iLUN < RT_ELEMENTS(pThis->drives)) {
2632 *ppLed = &pThis->drives[iLUN].Led;
2633 Assert ((*ppLed)->u32Magic == PDMLED_MAGIC);
2634 return VINF_SUCCESS;
2635 }
2636 return VERR_PDM_LUN_NOT_FOUND;
2637}
2638
2639
2640/**
2641 * @interface_method_impl{PDMIBASE,pfnQueryInterface}
2642 */
2643static DECLCALLBACK(void *) fdcStatusQueryInterface(PPDMIBASE pInterface, const char *pszIID)
2644{
2645 fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, IBaseStatus);
2646
2647 PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBaseStatus);
2648 PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
2649 return NULL;
2650}
2651
2652
2653/**
2654 * Configure a drive.
2655 *
2656 * @returns VBox status code.
2657 * @param drv The drive in question.
2658 * @param pDevIns The driver instance.
2659 * @param fInit Set if we're at init time and can change the drive type.
2660 */
2661static int fdConfig(fdrive_t *drv, PPDMDEVINS pDevIns, bool fInit)
2662{
2663 static const char * const s_apszDesc[] = {"Floppy Drive A:", "Floppy Drive B"};
2664 int rc;
2665
2666 /*
2667 * Reset the LED just to be on the safe side.
2668 */
2669 Assert (RT_ELEMENTS(s_apszDesc) > drv->iLUN);
2670 Assert (drv->Led.u32Magic == PDMLED_MAGIC);
2671 drv->Led.Actual.u32 = 0;
2672 drv->Led.Asserted.u32 = 0;
2673
2674 /*
2675 * Try attach the block device and get the interfaces.
2676 */
2677 rc = PDMDevHlpDriverAttach (pDevIns, drv->iLUN, &drv->IBase, &drv->pDrvBase, s_apszDesc[drv->iLUN]);
2678 if (RT_SUCCESS (rc)) {
2679 drv->pDrvMedia = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMEDIA);
2680 if (drv->pDrvMedia) {
2681 drv->pDrvMount = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMOUNT);
2682 if (drv->pDrvMount) {
2683 fd_init(drv, fInit);
2684 } else {
2685 AssertMsgFailed (("Configuration error: LUN#%d without mountable interface!\n", drv->iLUN));
2686 rc = VERR_PDM_MISSING_INTERFACE;
2687 }
2688
2689 } else {
2690 AssertMsgFailed (("Configuration error: LUN#%d hasn't a block interface!\n", drv->iLUN));
2691 rc = VERR_PDM_MISSING_INTERFACE;
2692 }
2693 } else {
2694 AssertMsg (rc == VERR_PDM_NO_ATTACHED_DRIVER,
2695 ("Failed to attach LUN#%d. rc=%Rrc\n", drv->iLUN, rc));
2696 switch (rc) {
2697 case VERR_ACCESS_DENIED:
2698 /* Error already cached by DrvHostBase */
2699 break;
2700 case VERR_PDM_NO_ATTACHED_DRIVER:
2701 /* Legal on architectures without a floppy controller */
2702 break;
2703 default:
2704 rc = PDMDevHlpVMSetError (pDevIns, rc, RT_SRC_POS,
2705 N_ ("The floppy controller cannot attach to the floppy drive"));
2706 break;
2707 }
2708 }
2709
2710 if (RT_FAILURE (rc)) {
2711 drv->pDrvBase = NULL;
2712 drv->pDrvMedia = NULL;
2713 drv->pDrvMount = NULL;
2714 }
2715 LogFlow (("fdConfig: returns %Rrc\n", rc));
2716 return rc;
2717}
2718
2719
2720/**
2721 * @interface_method_impl{PDMDEVREG,pfnAttach}
2722 *
2723 * This is called when we change block driver for a floppy drive.
2724 */
2725static DECLCALLBACK(int) fdcAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2726{
2727 fdctrl_t *fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2728 fdrive_t *drv;
2729 int rc;
2730 LogFlow (("ideDetach: iLUN=%u\n", iLUN));
2731
2732 AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
2733 ("The FDC device does not support hotplugging\n"),
2734 VERR_INVALID_PARAMETER);
2735
2736 /*
2737 * Validate.
2738 */
2739 if (iLUN >= 2) {
2740 AssertMsgFailed (("Configuration error: cannot attach or detach any but the first two LUNs - iLUN=%u\n",
2741 iLUN));
2742 return VERR_PDM_DEVINS_NO_ATTACH;
2743 }
2744
2745 /*
2746 * Locate the drive and stuff.
2747 */
2748 drv = &fdctrl->drives[iLUN];
2749
2750 /* the usual paranoia */
2751 AssertRelease (!drv->pDrvBase);
2752 AssertRelease (!drv->pDrvMedia);
2753 AssertRelease (!drv->pDrvMount);
2754
2755 rc = fdConfig (drv, pDevIns, false /*fInit*/);
2756 AssertMsg (rc != VERR_PDM_NO_ATTACHED_DRIVER,
2757 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", iLUN, rc));
2758 if (RT_SUCCESS(rc)) {
2759 fd_revalidate (drv);
2760 }
2761
2762 LogFlow (("floppyAttach: returns %Rrc\n", rc));
2763 return rc;
2764}
2765
2766
2767/**
2768 * @interface_method_impl{PDMDEVREG,pfnDetach}
2769 *
2770 * The floppy drive has been temporarily 'unplugged'.
2771 */
2772static DECLCALLBACK(void) fdcDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2773{
2774 RT_NOREF(fFlags);
2775 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2776 LogFlow (("ideDetach: iLUN=%u\n", iLUN));
2777
2778 switch (iLUN)
2779 {
2780 case 0:
2781 case 1:
2782 {
2783 fdrive_t *drv = &pThis->drives[iLUN];
2784 drv->pDrvBase = NULL;
2785 drv->pDrvMedia = NULL;
2786 drv->pDrvMount = NULL;
2787 break;
2788 }
2789
2790 default:
2791 AssertMsgFailed(("Cannot detach LUN#%d!\n", iLUN));
2792 break;
2793 }
2794}
2795
2796
2797/**
2798 * @interface_method_impl{PDMDEVREG,pfnReset}
2799 *
2800 * I haven't check the specs on what's supposed to happen on reset, but we
2801 * should get any 'FATAL: floppy recal:f07 ctrl not ready' when resetting
2802 * at wrong time like we do if this was all void.
2803 */
2804static DECLCALLBACK(void) fdcReset(PPDMDEVINS pDevIns)
2805{
2806 fdctrl_t *pThis = PDMDEVINS_2_DATA (pDevIns, fdctrl_t *);
2807 unsigned i;
2808 LogFlow (("fdcReset:\n"));
2809
2810 fdctrl_reset(pThis, 0);
2811
2812 for (i = 0; i < RT_ELEMENTS(pThis->drives); i++)
2813 fd_revalidate(&pThis->drives[i]);
2814}
2815
2816
2817/**
2818 * @interface_method_impl{PDMDEVREG,pfnConstruct}
2819 */
2820static DECLCALLBACK(int) fdcConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
2821{
2822 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
2823 fdctrl_t *pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t *);
2824 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2825 int rc;
2826
2827 RT_NOREF(iInstance);
2828 Assert(iInstance == 0);
2829
2830 /*
2831 * Validate configuration.
2832 */
2833 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|DMA|MemMapped|IOBase|StatusA|IRQDelay", "");
2834
2835 /*
2836 * Read the configuration.
2837 */
2838 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "IRQ", &pThis->irq_lvl, 6);
2839 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 IRQ, rc=%Rrc\n", rc), rc);
2840
2841 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "DMA", &pThis->dma_chann, 2);
2842 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 DMA, rc=%Rrc\n", rc), rc);
2843
2844 rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IOBase", &pThis->io_base, 0x3f0);
2845 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IOBase, rc=%Rrc\n", rc), rc);
2846
2847 bool fMemMapped;
2848 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "MemMapped", &fMemMapped, false);
2849 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value MemMapped rc=%Rrc\n", rc), rc);
2850
2851 uint16_t uIrqDelay;
2852 rc = CFGMR3QueryU16Def(pCfg, "IRQDelay", &uIrqDelay, 0);
2853 AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IRQDelay, rc=%Rrc\n", rc), rc);
2854
2855 bool fStatusA;
2856 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "StatusA", &fStatusA, false);
2857 AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value fStatusA rc=%Rrc\n", rc), rc);
2858
2859 /*
2860 * Initialize data.
2861 */
2862 LogFlow(("fdcConstruct: irq_lvl=%d dma_chann=%d io_base=%#x\n", pThis->irq_lvl, pThis->dma_chann, pThis->io_base));
2863 pThis->pDevIns = pDevIns;
2864 pThis->version = 0x90; /* Intel 82078 controller */
2865 pThis->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2866 pThis->num_floppies = MAX_FD;
2867 pThis->hIoPorts0 = NIL_IOMMMIOHANDLE;
2868 pThis->hIoPorts1 = NIL_IOMMMIOHANDLE;
2869 pThis->hIoPorts2 = NIL_IOMMMIOHANDLE;
2870
2871 /* Fill 'command_to_handler' lookup table */
2872 for (int ii = RT_ELEMENTS(handlers) - 1; ii >= 0; ii--)
2873 for (unsigned j = 0; j < sizeof(command_to_handler); j++)
2874 if ((j & handlers[ii].mask) == handlers[ii].value)
2875 command_to_handler[j] = ii;
2876
2877 pThis->IBaseStatus.pfnQueryInterface = fdcStatusQueryInterface;
2878 pThis->ILeds.pfnQueryStatusLed = fdcStatusQueryStatusLed;
2879
2880 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); ++i)
2881 {
2882 fdrive_t *pDrv = &pThis->drives[i];
2883
2884 pDrv->drive = FDRIVE_DRV_NONE;
2885 pDrv->iLUN = i;
2886 pDrv->pDevIns = pDevIns;
2887
2888 pDrv->IBase.pfnQueryInterface = fdQueryInterface;
2889 pDrv->IMountNotify.pfnMountNotify = fdMountNotify;
2890 pDrv->IMountNotify.pfnUnmountNotify = fdUnmountNotify;
2891 pDrv->IPort.pfnQueryDeviceLocation = fdQueryDeviceLocation;
2892 pDrv->Led.u32Magic = PDMLED_MAGIC;
2893 }
2894
2895 /*
2896 * Create the FDC timer.
2897 */
2898 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, fdcTimerCallback, pThis,
2899 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "FDC Timer", &pThis->hResultTimer);
2900 AssertRCReturn(rc, rc);
2901
2902 /*
2903 * Create the transfer delay timer.
2904 */
2905 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcTransferDelayTimer, pThis,
2906 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "FDC Transfer Delay Timer", &pThis->hXferDelayTimer);
2907 if (RT_FAILURE(rc))
2908 return rc;
2909
2910 /*
2911 * Create the IRQ delay timer.
2912 */
2913 rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcIrqDelayTimer, pThis,
2914 TMTIMER_FLAGS_DEFAULT_CRIT_SECT, "FDC IRQ Delay Timer", &pThis->hIrqDelayTimer);
2915 if (RT_FAILURE(rc))
2916 return rc;
2917
2918 pThis->uIrqDelayMsec = uIrqDelay;
2919
2920 /*
2921 * Register DMA channel.
2922 */
2923 if (pThis->dma_chann != 0xff)
2924 {
2925 rc = PDMDevHlpDMARegister(pDevIns, pThis->dma_chann, &fdctrl_transfer_handler, pThis);
2926 AssertRCReturn(rc, rc);
2927 }
2928
2929 /*
2930 * IO / MMIO.
2931 *
2932 * We must skip I/O port 0x3f6 as it is the ATA alternate status register.
2933 * Why we skip registering status register A, though, isn't as clear.
2934 */
2935 if (!fMemMapped)
2936 {
2937 static const IOMIOPORTDESC s_aDescs[] =
2938 {
2939 { "SRA", NULL, "Status register A", NULL },
2940 { "SRB", NULL, "Status register B", NULL },
2941 { "DOR", "DOR", "Digital output register", "Digital output register"},
2942 { "TDR", "TDR", "Tape driver register", "Tape driver register"},
2943 { "MSR", "DSR", "Main status register", "Datarate select register" },
2944 { "FIFO", "FIFO", "Data FIFO", "Data FIFO" },
2945 { "ATA", "ATA", NULL, NULL },
2946 { "DIR", "CCR", "Digital input register", "Configuration control register"},
2947 { NULL, NULL, NULL, NULL }
2948 };
2949
2950 /* 0x3f0 */
2951 if (fStatusA)
2952 {
2953 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base, 1 /*cPorts*/, fdcIoPort0Write, fdcIoPort0Read,
2954 "FDC-SRA", s_aDescs, &pThis->hIoPorts0);
2955 AssertRCReturn(rc, rc);
2956 }
2957
2958 /* 0x3f1..0x3f5 */
2959 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x1, 5, fdcIoPort1Write, fdcIoPort1Read,
2960 "FDC#1", &s_aDescs[1], &pThis->hIoPorts1);
2961 AssertRCReturn(rc, rc);
2962
2963 /* 0x3f7 */
2964 rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x7, 1, fdcIoPort2Write, fdcIoPort2Read,
2965 "FDC#2", &s_aDescs[7], &pThis->hIoPorts2);
2966 AssertRCReturn(rc, rc);
2967 }
2968 else
2969 AssertMsgFailedReturn(("Memory mapped floppy not support by now\n"), VERR_NOT_SUPPORTED);
2970
2971 /*
2972 * Register the saved state data unit.
2973 */
2974 rc = PDMDevHlpSSMRegister(pDevIns, FDC_SAVESTATE_CURRENT, sizeof(*pThis), fdcSaveExec, fdcLoadExec);
2975 AssertRCReturn(rc, rc);
2976
2977 /*
2978 * Attach the status port (optional).
2979 */
2980 PPDMIBASE pBase;
2981 rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBaseStatus, &pBase, "Status Port");
2982 if (RT_SUCCESS (rc))
2983 pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
2984 else
2985 AssertMsgReturn(rc == VERR_PDM_NO_ATTACHED_DRIVER, ("Failed to attach to status driver. rc=%Rrc\n", rc), rc);
2986
2987 /*
2988 * Initialize drives.
2989 */
2990 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
2991 {
2992 rc = fdConfig(&pThis->drives[i], pDevIns, true /*fInit*/);
2993 AssertMsgReturn(RT_SUCCESS(rc) || rc == VERR_PDM_NO_ATTACHED_DRIVER,
2994 ("Configuration error: failed to configure drive %d, rc=%Rrc\n", i, rc),
2995 rc);
2996 }
2997
2998 fdctrl_reset(pThis, 0);
2999
3000 for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3001 fd_revalidate(&pThis->drives[i]);
3002
3003 return VINF_SUCCESS;
3004}
3005
3006
3007/**
3008 * The device registration structure.
3009 */
3010const PDMDEVREG g_DeviceFloppyController =
3011{
3012 /* .u32Version = */ PDM_DEVREG_VERSION,
3013 /* .uReserved0 = */ 0,
3014 /* .szName = */ "i82078",
3015 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_NEW_STYLE,
3016 /* .fClass = */ PDM_DEVREG_CLASS_STORAGE,
3017 /* .cMaxInstances = */ 1,
3018 /* .uSharedVersion = */ 42,
3019 /* .cbInstanceShared = */ sizeof(fdctrl_t),
3020 /* .cbInstanceCC = */ 0,
3021 /* .cbInstanceRC = */ 0,
3022 /* .cMaxPciDevices = */ 0,
3023 /* .cMaxMsixVectors = */ 0,
3024 /* .pszDescription = */ "Floppy drive controller (Intel 82078)",
3025#if defined(IN_RING3)
3026 /* .pszRCMod = */ "",
3027 /* .pszR0Mod = */ "",
3028 /* .pfnConstruct = */ fdcConstruct,
3029 /* .pfnDestruct = */ NULL,
3030 /* .pfnRelocate = */ NULL,
3031 /* .pfnMemSetup = */ NULL,
3032 /* .pfnPowerOn = */ NULL,
3033 /* .pfnReset = */ fdcReset,
3034 /* .pfnSuspend = */ NULL,
3035 /* .pfnResume = */ NULL,
3036 /* .pfnAttach = */ fdcAttach,
3037 /* .pfnDetach = */ fdcDetach,
3038 /* .pfnQueryInterface = */ NULL,
3039 /* .pfnInitComplete = */ NULL,
3040 /* .pfnPowerOff = */ NULL,
3041 /* .pfnSoftReset = */ NULL,
3042 /* .pfnReserved0 = */ NULL,
3043 /* .pfnReserved1 = */ NULL,
3044 /* .pfnReserved2 = */ NULL,
3045 /* .pfnReserved3 = */ NULL,
3046 /* .pfnReserved4 = */ NULL,
3047 /* .pfnReserved5 = */ NULL,
3048 /* .pfnReserved6 = */ NULL,
3049 /* .pfnReserved7 = */ NULL,
3050#elif defined(IN_RING0)
3051 /* .pfnEarlyConstruct = */ NULL,
3052 /* .pfnConstruct = */ NULL,
3053 /* .pfnDestruct = */ NULL,
3054 /* .pfnFinalDestruct = */ NULL,
3055 /* .pfnRequest = */ NULL,
3056 /* .pfnReserved0 = */ NULL,
3057 /* .pfnReserved1 = */ NULL,
3058 /* .pfnReserved2 = */ NULL,
3059 /* .pfnReserved3 = */ NULL,
3060 /* .pfnReserved4 = */ NULL,
3061 /* .pfnReserved5 = */ NULL,
3062 /* .pfnReserved6 = */ NULL,
3063 /* .pfnReserved7 = */ NULL,
3064#elif defined(IN_RC)
3065 /* .pfnConstruct = */ NULL,
3066 /* .pfnReserved0 = */ NULL,
3067 /* .pfnReserved1 = */ NULL,
3068 /* .pfnReserved2 = */ NULL,
3069 /* .pfnReserved3 = */ NULL,
3070 /* .pfnReserved4 = */ NULL,
3071 /* .pfnReserved5 = */ NULL,
3072 /* .pfnReserved6 = */ NULL,
3073 /* .pfnReserved7 = */ NULL,
3074#else
3075# error "Not in IN_RING3, IN_RING0 or IN_RC!"
3076#endif
3077 /* .u32VersionEnd = */ PDM_DEVREG_VERSION
3078};
3079
3080/*
3081 * Local Variables:
3082 * mode: c
3083 * c-file-style: "k&r"
3084 * indent-tabs-mode: nil
3085 * End:
3086 */
3087
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