1 | /* $Id: DevLsiLogicSCSI.cpp 64660 2016-11-14 14:40:34Z vboxsync $ */
|
---|
2 | /** @file
|
---|
3 | * DevLsiLogicSCSI - LsiLogic LSI53c1030 SCSI controller.
|
---|
4 | */
|
---|
5 |
|
---|
6 | /*
|
---|
7 | * Copyright (C) 2006-2016 Oracle Corporation
|
---|
8 | *
|
---|
9 | * This file is part of VirtualBox Open Source Edition (OSE), as
|
---|
10 | * available from http://www.virtualbox.org. This file is free software;
|
---|
11 | * you can redistribute it and/or modify it under the terms of the GNU
|
---|
12 | * General Public License (GPL) as published by the Free Software
|
---|
13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
|
---|
14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
|
---|
15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
|
---|
16 | */
|
---|
17 |
|
---|
18 |
|
---|
19 | /*********************************************************************************************************************************
|
---|
20 | * Header Files *
|
---|
21 | *********************************************************************************************************************************/
|
---|
22 | #define LOG_GROUP LOG_GROUP_DEV_LSILOGICSCSI
|
---|
23 | #include <VBox/vmm/pdmdev.h>
|
---|
24 | #include <VBox/vmm/pdmstorageifs.h>
|
---|
25 | #include <VBox/vmm/pdmqueue.h>
|
---|
26 | #include <VBox/vmm/pdmthread.h>
|
---|
27 | #include <VBox/vmm/pdmcritsect.h>
|
---|
28 | #include <VBox/scsi.h>
|
---|
29 | #include <VBox/sup.h>
|
---|
30 | #include <iprt/assert.h>
|
---|
31 | #include <iprt/asm.h>
|
---|
32 | #include <iprt/string.h>
|
---|
33 | #include <iprt/list.h>
|
---|
34 | #ifdef IN_RING3
|
---|
35 | # include <iprt/memcache.h>
|
---|
36 | # include <iprt/mem.h>
|
---|
37 | # include <iprt/param.h>
|
---|
38 | # include <iprt/uuid.h>
|
---|
39 | # include <iprt/time.h>
|
---|
40 | #endif
|
---|
41 |
|
---|
42 | #include "DevLsiLogicSCSI.h"
|
---|
43 | #include "VBoxSCSI.h"
|
---|
44 |
|
---|
45 | #include "VBoxDD.h"
|
---|
46 |
|
---|
47 |
|
---|
48 | /*********************************************************************************************************************************
|
---|
49 | * Defined Constants And Macros *
|
---|
50 | *********************************************************************************************************************************/
|
---|
51 | /** The current saved state version. */
|
---|
52 | #define LSILOGIC_SAVED_STATE_VERSION 5
|
---|
53 | /** The saved state version used by VirtualBox before the diagnostic
|
---|
54 | * memory access was implemented. */
|
---|
55 | #define LSILOGIC_SAVED_STATE_VERSION_PRE_DIAG_MEM 4
|
---|
56 | /** The saved state version used by VirtualBox before the doorbell status flag
|
---|
57 | * was changed from bool to a 32bit enum. */
|
---|
58 | #define LSILOGIC_SAVED_STATE_VERSION_BOOL_DOORBELL 3
|
---|
59 | /** The saved state version used by VirtualBox before SAS support was added. */
|
---|
60 | #define LSILOGIC_SAVED_STATE_VERSION_PRE_SAS 2
|
---|
61 | /** The saved state version used by VirtualBox 3.0 and earlier. It does not
|
---|
62 | * include the device config part. */
|
---|
63 | #define LSILOGIC_SAVED_STATE_VERSION_VBOX_30 1
|
---|
64 |
|
---|
65 | /** Maximum number of entries in the release log. */
|
---|
66 | #define MAX_REL_LOG_ERRORS 1024
|
---|
67 |
|
---|
68 | #define LSILOGIC_RTGCPHYS_FROM_U32(Hi, Lo) ( (RTGCPHYS)RT_MAKE_U64(Lo, Hi) )
|
---|
69 |
|
---|
70 | /** Upper number a buffer is freed if it was too big before. */
|
---|
71 | #define LSILOGIC_MAX_ALLOC_TOO_MUCH 20
|
---|
72 |
|
---|
73 | /** Maximum size of the memory regions (prevents teh guest from DOSing the host by
|
---|
74 | * allocating loadds of memory). */
|
---|
75 | #define LSILOGIC_MEMORY_REGIONS_MAX (_1M)
|
---|
76 |
|
---|
77 |
|
---|
78 | /*********************************************************************************************************************************
|
---|
79 | * Structures and Typedefs *
|
---|
80 | *********************************************************************************************************************************/
|
---|
81 |
|
---|
82 | /** Pointer to the device instance data of the LsiLogic emulation. */
|
---|
83 | typedef struct LSILOGICSCSI *PLSILOGICSCSI;
|
---|
84 |
|
---|
85 | #ifdef IN_RING3
|
---|
86 | /**
|
---|
87 | * Memory buffer callback.
|
---|
88 | *
|
---|
89 | * @returns nothing.
|
---|
90 | * @param pThis The LsiLogic controller instance.
|
---|
91 | * @param GCPhys The guest physical address of the memory buffer.
|
---|
92 | * @param pSgBuf The pointer to the host R3 S/G buffer.
|
---|
93 | * @param cbCopy How many bytes to copy between the two buffers.
|
---|
94 | * @param pcbSkip Initially contains the amount of bytes to skip
|
---|
95 | * starting from the guest physical address before
|
---|
96 | * accessing the S/G buffer and start copying data.
|
---|
97 | * On return this contains the remaining amount if
|
---|
98 | * cbCopy < *pcbSkip or 0 otherwise.
|
---|
99 | */
|
---|
100 | typedef DECLCALLBACK(void) LSILOGICR3MEMCOPYCALLBACK(PLSILOGICSCSI pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf, size_t cbCopy,
|
---|
101 | size_t *pcbSkip);
|
---|
102 | /** Pointer to a memory copy buffer callback. */
|
---|
103 | typedef LSILOGICR3MEMCOPYCALLBACK *PLSILOGICR3MEMCOPYCALLBACK;
|
---|
104 | #endif
|
---|
105 |
|
---|
106 | /**
|
---|
107 | * Reply data.
|
---|
108 | */
|
---|
109 | typedef struct LSILOGICSCSIREPLY
|
---|
110 | {
|
---|
111 | /** Lower 32 bits of the reply address in memory. */
|
---|
112 | uint32_t u32HostMFALowAddress;
|
---|
113 | /** Full address of the reply in guest memory. */
|
---|
114 | RTGCPHYS GCPhysReplyAddress;
|
---|
115 | /** Size of the reply. */
|
---|
116 | uint32_t cbReply;
|
---|
117 | /** Different views to the reply depending on the request type. */
|
---|
118 | MptReplyUnion Reply;
|
---|
119 | } LSILOGICSCSIREPLY;
|
---|
120 | /** Pointer to reply data. */
|
---|
121 | typedef LSILOGICSCSIREPLY *PLSILOGICSCSIREPLY;
|
---|
122 |
|
---|
123 | /**
|
---|
124 | * Memory region of the IOC.
|
---|
125 | */
|
---|
126 | typedef struct LSILOGICMEMREGN
|
---|
127 | {
|
---|
128 | /** List node. */
|
---|
129 | RTLISTNODE NodeList;
|
---|
130 | /** 32bit address the region starts to describe. */
|
---|
131 | uint32_t u32AddrStart;
|
---|
132 | /** 32bit address the region ends (inclusive). */
|
---|
133 | uint32_t u32AddrEnd;
|
---|
134 | /** Data for this region - variable. */
|
---|
135 | uint32_t au32Data[1];
|
---|
136 | } LSILOGICMEMREGN;
|
---|
137 | /** Pointer to a memory region. */
|
---|
138 | typedef LSILOGICMEMREGN *PLSILOGICMEMREGN;
|
---|
139 |
|
---|
140 | /**
|
---|
141 | * State of a device attached to the buslogic host adapter.
|
---|
142 | *
|
---|
143 | * @implements PDMIBASE
|
---|
144 | * @implements PDMISCSIPORT
|
---|
145 | * @implements PDMILEDPORTS
|
---|
146 | */
|
---|
147 | typedef struct LSILOGICDEVICE
|
---|
148 | {
|
---|
149 | /** Pointer to the owning lsilogic device instance. - R3 pointer */
|
---|
150 | R3PTRTYPE(PLSILOGICSCSI) pLsiLogicR3;
|
---|
151 |
|
---|
152 | /** LUN of the device. */
|
---|
153 | uint32_t iLUN;
|
---|
154 | /** Number of outstanding tasks on the port. */
|
---|
155 | volatile uint32_t cOutstandingRequests;
|
---|
156 |
|
---|
157 | #if HC_ARCH_BITS == 64
|
---|
158 | uint32_t Alignment0;
|
---|
159 | #endif
|
---|
160 |
|
---|
161 | /** Our base interface. */
|
---|
162 | PDMIBASE IBase;
|
---|
163 | /** Media port interface. */
|
---|
164 | PDMIMEDIAPORT IMediaPort;
|
---|
165 | /** Extended media port interface. */
|
---|
166 | PDMIMEDIAEXPORT IMediaExPort;
|
---|
167 | /** Led interface. */
|
---|
168 | PDMILEDPORTS ILed;
|
---|
169 | /** Pointer to the attached driver's base interface. */
|
---|
170 | R3PTRTYPE(PPDMIBASE) pDrvBase;
|
---|
171 | /** Pointer to the attached driver's media interface. */
|
---|
172 | R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
|
---|
173 | /** Pointer to the attached driver's extended media interface. */
|
---|
174 | R3PTRTYPE(PPDMIMEDIAEX) pDrvMediaEx;
|
---|
175 | /** The status LED state for this device. */
|
---|
176 | PDMLED Led;
|
---|
177 |
|
---|
178 | } LSILOGICDEVICE;
|
---|
179 | /** Pointer to a device state. */
|
---|
180 | typedef LSILOGICDEVICE *PLSILOGICDEVICE;
|
---|
181 |
|
---|
182 | /** Pointer to a task state. */
|
---|
183 | typedef struct LSILOGICREQ *PLSILOGICREQ;
|
---|
184 |
|
---|
185 | /**
|
---|
186 | * Device instance data for the emulated SCSI controller.
|
---|
187 | */
|
---|
188 | typedef struct LSILOGICSCSI
|
---|
189 | {
|
---|
190 | /** PCI device structure. */
|
---|
191 | PDMPCIDEV PciDev;
|
---|
192 | /** Pointer to the device instance. - R3 ptr. */
|
---|
193 | PPDMDEVINSR3 pDevInsR3;
|
---|
194 | /** Pointer to the device instance. - R0 ptr. */
|
---|
195 | PPDMDEVINSR0 pDevInsR0;
|
---|
196 | /** Pointer to the device instance. - RC ptr. */
|
---|
197 | PPDMDEVINSRC pDevInsRC;
|
---|
198 |
|
---|
199 | /** Flag whether the GC part of the device is enabled. */
|
---|
200 | bool fGCEnabled;
|
---|
201 | /** Flag whether the R0 part of the device is enabled. */
|
---|
202 | bool fR0Enabled;
|
---|
203 |
|
---|
204 | /** The state the controller is currently in. */
|
---|
205 | LSILOGICSTATE enmState;
|
---|
206 | /** Who needs to init the driver to get into operational state. */
|
---|
207 | LSILOGICWHOINIT enmWhoInit;
|
---|
208 | /** Flag whether we are in doorbell function. */
|
---|
209 | LSILOGICDOORBELLSTATE enmDoorbellState;
|
---|
210 | /** Flag whether diagnostic access is enabled. */
|
---|
211 | bool fDiagnosticEnabled;
|
---|
212 | /** Flag whether a notification was send to R3. */
|
---|
213 | bool fNotificationSent;
|
---|
214 | /** Flag whether the guest enabled event notification from the IOC. */
|
---|
215 | bool fEventNotificationEnabled;
|
---|
216 | /** Flag whether the diagnostic address and RW registers are enabled. */
|
---|
217 | bool fDiagRegsEnabled;
|
---|
218 |
|
---|
219 | /** Queue to send tasks to R3. - R3 ptr */
|
---|
220 | R3PTRTYPE(PPDMQUEUE) pNotificationQueueR3;
|
---|
221 | /** Queue to send tasks to R3. - R0 ptr */
|
---|
222 | R0PTRTYPE(PPDMQUEUE) pNotificationQueueR0;
|
---|
223 | /** Queue to send tasks to R3. - RC ptr */
|
---|
224 | RCPTRTYPE(PPDMQUEUE) pNotificationQueueRC;
|
---|
225 |
|
---|
226 | /** Number of device states allocated. */
|
---|
227 | uint32_t cDeviceStates;
|
---|
228 |
|
---|
229 | /** States for attached devices. */
|
---|
230 | R3PTRTYPE(PLSILOGICDEVICE) paDeviceStates;
|
---|
231 | #if HC_ARCH_BITS == 32
|
---|
232 | RTR3PTR R3PtrPadding0;
|
---|
233 | #endif
|
---|
234 |
|
---|
235 | /** Interrupt mask. */
|
---|
236 | volatile uint32_t uInterruptMask;
|
---|
237 | /** Interrupt status register. */
|
---|
238 | volatile uint32_t uInterruptStatus;
|
---|
239 |
|
---|
240 | /** Buffer for messages which are passed through the doorbell using the
|
---|
241 | * handshake method. */
|
---|
242 | uint32_t aMessage[sizeof(MptConfigurationRequest)]; /** @todo r=bird: Looks like 4 tims the required size? Please explain in comment if this correct... */
|
---|
243 | /** Actual position in the buffer. */
|
---|
244 | uint32_t iMessage;
|
---|
245 | /** Size of the message which is given in the doorbell message in dwords. */
|
---|
246 | uint32_t cMessage;
|
---|
247 |
|
---|
248 | /** Reply buffer.
|
---|
249 | * @note 60 bytes */
|
---|
250 | MptReplyUnion ReplyBuffer;
|
---|
251 | /** Next entry to read. */
|
---|
252 | uint32_t uNextReplyEntryRead;
|
---|
253 | /** Size of the reply in the buffer in 16bit words. */
|
---|
254 | uint32_t cReplySize;
|
---|
255 |
|
---|
256 | /** The fault code of the I/O controller if we are in the fault state. */
|
---|
257 | uint16_t u16IOCFaultCode;
|
---|
258 |
|
---|
259 | /** I/O port address the device is mapped to. */
|
---|
260 | RTIOPORT IOPortBase;
|
---|
261 | /** MMIO address the device is mapped to. */
|
---|
262 | RTGCPHYS GCPhysMMIOBase;
|
---|
263 |
|
---|
264 | /** Upper 32 bits of the message frame address to locate requests in guest memory. */
|
---|
265 | uint32_t u32HostMFAHighAddr;
|
---|
266 | /** Upper 32 bits of the sense buffer address. */
|
---|
267 | uint32_t u32SenseBufferHighAddr;
|
---|
268 | /** Maximum number of devices the driver reported he can handle. */
|
---|
269 | uint8_t cMaxDevices;
|
---|
270 | /** Maximum number of buses the driver reported he can handle. */
|
---|
271 | uint8_t cMaxBuses;
|
---|
272 | /** Current size of reply message frames in the guest. */
|
---|
273 | uint16_t cbReplyFrame;
|
---|
274 |
|
---|
275 | /** Next key to write in the sequence to get access
|
---|
276 | * to diagnostic memory. */
|
---|
277 | uint32_t iDiagnosticAccess;
|
---|
278 |
|
---|
279 | /** Number entries allocated for the reply queue. */
|
---|
280 | uint32_t cReplyQueueEntries;
|
---|
281 | /** Number entries allocated for the outstanding request queue. */
|
---|
282 | uint32_t cRequestQueueEntries;
|
---|
283 |
|
---|
284 |
|
---|
285 | /** Critical section protecting the reply post queue. */
|
---|
286 | PDMCRITSECT ReplyPostQueueCritSect;
|
---|
287 | /** Critical section protecting the reply free queue. */
|
---|
288 | PDMCRITSECT ReplyFreeQueueCritSect;
|
---|
289 |
|
---|
290 | /** Pointer to the start of the reply free queue - R3. */
|
---|
291 | R3PTRTYPE(volatile uint32_t *) pReplyFreeQueueBaseR3;
|
---|
292 | /** Pointer to the start of the reply post queue - R3. */
|
---|
293 | R3PTRTYPE(volatile uint32_t *) pReplyPostQueueBaseR3;
|
---|
294 | /** Pointer to the start of the request queue - R3. */
|
---|
295 | R3PTRTYPE(volatile uint32_t *) pRequestQueueBaseR3;
|
---|
296 |
|
---|
297 | /** Pointer to the start of the reply queue - R0. */
|
---|
298 | R0PTRTYPE(volatile uint32_t *) pReplyFreeQueueBaseR0;
|
---|
299 | /** Pointer to the start of the reply queue - R0. */
|
---|
300 | R0PTRTYPE(volatile uint32_t *) pReplyPostQueueBaseR0;
|
---|
301 | /** Pointer to the start of the request queue - R0. */
|
---|
302 | R0PTRTYPE(volatile uint32_t *) pRequestQueueBaseR0;
|
---|
303 |
|
---|
304 | /** Pointer to the start of the reply queue - RC. */
|
---|
305 | RCPTRTYPE(volatile uint32_t *) pReplyFreeQueueBaseRC;
|
---|
306 | /** Pointer to the start of the reply queue - RC. */
|
---|
307 | RCPTRTYPE(volatile uint32_t *) pReplyPostQueueBaseRC;
|
---|
308 | /** Pointer to the start of the request queue - RC. */
|
---|
309 | RCPTRTYPE(volatile uint32_t *) pRequestQueueBaseRC;
|
---|
310 | /** End these RC pointers on a 64-bit boundrary. */
|
---|
311 | RTRCPTR RCPtrPadding1;
|
---|
312 |
|
---|
313 | /** Next free entry in the reply queue the guest can write a address to. */
|
---|
314 | volatile uint32_t uReplyFreeQueueNextEntryFreeWrite;
|
---|
315 | /** Next valid entry the controller can read a valid address for reply frames from. */
|
---|
316 | volatile uint32_t uReplyFreeQueueNextAddressRead;
|
---|
317 |
|
---|
318 | /** Next free entry in the reply queue the guest can write a address to. */
|
---|
319 | volatile uint32_t uReplyPostQueueNextEntryFreeWrite;
|
---|
320 | /** Next valid entry the controller can read a valid address for reply frames from. */
|
---|
321 | volatile uint32_t uReplyPostQueueNextAddressRead;
|
---|
322 |
|
---|
323 | /** Next free entry the guest can write a address to a request frame to. */
|
---|
324 | volatile uint32_t uRequestQueueNextEntryFreeWrite;
|
---|
325 | /** Next valid entry the controller can read a valid address for request frames from. */
|
---|
326 | volatile uint32_t uRequestQueueNextAddressRead;
|
---|
327 |
|
---|
328 | /** Emulated controller type */
|
---|
329 | LSILOGICCTRLTYPE enmCtrlType;
|
---|
330 | /** Handle counter */
|
---|
331 | uint16_t u16NextHandle;
|
---|
332 |
|
---|
333 | /** Number of ports this controller has. */
|
---|
334 | uint8_t cPorts;
|
---|
335 |
|
---|
336 | /** BIOS emulation. */
|
---|
337 | VBOXSCSI VBoxSCSI;
|
---|
338 |
|
---|
339 | /** Status LUN: The base interface. */
|
---|
340 | PDMIBASE IBase;
|
---|
341 | /** Status LUN: Leds interface. */
|
---|
342 | PDMILEDPORTS ILeds;
|
---|
343 | /** Status LUN: Partner of ILeds. */
|
---|
344 | R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
|
---|
345 | /** Status LUN: Media Notifys. */
|
---|
346 | R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
|
---|
347 | /** Pointer to the configuration page area. */
|
---|
348 | R3PTRTYPE(PMptConfigurationPagesSupported) pConfigurationPages;
|
---|
349 |
|
---|
350 | /** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
|
---|
351 | * a port is entering the idle state. */
|
---|
352 | bool volatile fSignalIdle;
|
---|
353 | /** Flag whether we have tasks which need to be processed again- */
|
---|
354 | bool volatile fRedo;
|
---|
355 | /** Flag whether the worker thread is sleeping. */
|
---|
356 | volatile bool fWrkThreadSleeping;
|
---|
357 | /** Flag whether a request from the BIOS is pending which the
|
---|
358 | * worker thread needs to process. */
|
---|
359 | volatile bool fBiosReqPending;
|
---|
360 | #if HC_ARCH_BITS == 64
|
---|
361 | /** Alignment padding. */
|
---|
362 | bool afPadding2[4];
|
---|
363 | #endif
|
---|
364 | /** List of tasks which can be redone. */
|
---|
365 | R3PTRTYPE(volatile PLSILOGICREQ) pTasksRedoHead;
|
---|
366 |
|
---|
367 | /** Current address to read from or write to in the diagnostic memory region. */
|
---|
368 | uint32_t u32DiagMemAddr;
|
---|
369 | /** Current size of the memory regions. */
|
---|
370 | uint32_t cbMemRegns;
|
---|
371 |
|
---|
372 | #if HC_ARCH_BITS ==32
|
---|
373 | uint32_t u32Padding3;
|
---|
374 | #endif
|
---|
375 |
|
---|
376 | union
|
---|
377 | {
|
---|
378 | /** List of memory regions - PLSILOGICMEMREGN. */
|
---|
379 | RTLISTANCHOR ListMemRegns;
|
---|
380 | uint8_t u8Padding[2 * sizeof(RTUINTPTR)];
|
---|
381 | };
|
---|
382 |
|
---|
383 | /** The support driver session handle. */
|
---|
384 | R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
|
---|
385 | /** Worker thread. */
|
---|
386 | R3PTRTYPE(PPDMTHREAD) pThreadWrk;
|
---|
387 | /** The event semaphore the processing thread waits on. */
|
---|
388 | SUPSEMEVENT hEvtProcess;
|
---|
389 |
|
---|
390 | } LSILOGISCSI;
|
---|
391 |
|
---|
392 | /**
|
---|
393 | * Task state object which holds all necessary data while
|
---|
394 | * processing the request from the guest.
|
---|
395 | */
|
---|
396 | typedef struct LSILOGICREQ
|
---|
397 | {
|
---|
398 | /** I/O request handle. */
|
---|
399 | PDMMEDIAEXIOREQ hIoReq;
|
---|
400 | /** Next in the redo list. */
|
---|
401 | PLSILOGICREQ pRedoNext;
|
---|
402 | /** Target device. */
|
---|
403 | PLSILOGICDEVICE pTargetDevice;
|
---|
404 | /** The message request from the guest. */
|
---|
405 | MptRequestUnion GuestRequest;
|
---|
406 | /** Address of the message request frame in guests memory.
|
---|
407 | * Used to read the S/G entries in the second step. */
|
---|
408 | RTGCPHYS GCPhysMessageFrameAddr;
|
---|
409 | /** Physical start address of the S/G list. */
|
---|
410 | RTGCPHYS GCPhysSgStart;
|
---|
411 | /** Chain offset */
|
---|
412 | uint32_t cChainOffset;
|
---|
413 | /** Pointer to the sense buffer. */
|
---|
414 | uint8_t abSenseBuffer[18];
|
---|
415 | /** Flag whether the request was issued from the BIOS. */
|
---|
416 | bool fBIOS;
|
---|
417 | /** SCSI status code. */
|
---|
418 | uint8_t u8ScsiSts;
|
---|
419 | } LSILOGICREQ;
|
---|
420 |
|
---|
421 |
|
---|
422 | #ifndef VBOX_DEVICE_STRUCT_TESTCASE
|
---|
423 |
|
---|
424 |
|
---|
425 | /*********************************************************************************************************************************
|
---|
426 | * Internal Functions *
|
---|
427 | *********************************************************************************************************************************/
|
---|
428 | RT_C_DECLS_BEGIN
|
---|
429 | #ifdef IN_RING3
|
---|
430 | static void lsilogicR3InitializeConfigurationPages(PLSILOGICSCSI pThis);
|
---|
431 | static void lsilogicR3ConfigurationPagesFree(PLSILOGICSCSI pThis);
|
---|
432 | static int lsilogicR3ProcessConfigurationRequest(PLSILOGICSCSI pThis, PMptConfigurationRequest pConfigurationReq,
|
---|
433 | PMptConfigurationReply pReply);
|
---|
434 | #endif
|
---|
435 | RT_C_DECLS_END
|
---|
436 |
|
---|
437 |
|
---|
438 | /*********************************************************************************************************************************
|
---|
439 | * Global Variables *
|
---|
440 | *********************************************************************************************************************************/
|
---|
441 | /** Key sequence the guest has to write to enable access
|
---|
442 | * to diagnostic memory. */
|
---|
443 | static const uint8_t g_lsilogicDiagnosticAccess[] = {0x04, 0x0b, 0x02, 0x07, 0x0d};
|
---|
444 |
|
---|
445 | /**
|
---|
446 | * Updates the status of the interrupt pin of the device.
|
---|
447 | *
|
---|
448 | * @returns nothing.
|
---|
449 | * @param pThis Pointer to the LsiLogic device state.
|
---|
450 | */
|
---|
451 | static void lsilogicUpdateInterrupt(PLSILOGICSCSI pThis)
|
---|
452 | {
|
---|
453 | uint32_t uIntSts;
|
---|
454 |
|
---|
455 | LogFlowFunc(("Updating interrupts\n"));
|
---|
456 |
|
---|
457 | /* Mask out doorbell status so that it does not affect interrupt updating. */
|
---|
458 | uIntSts = (ASMAtomicReadU32(&pThis->uInterruptStatus) & ~LSILOGIC_REG_HOST_INTR_STATUS_DOORBELL_STS);
|
---|
459 | /* Check maskable interrupts. */
|
---|
460 | uIntSts &= ~(ASMAtomicReadU32(&pThis->uInterruptMask) & ~LSILOGIC_REG_HOST_INTR_MASK_IRQ_ROUTING);
|
---|
461 |
|
---|
462 | if (uIntSts)
|
---|
463 | {
|
---|
464 | LogFlowFunc(("Setting interrupt\n"));
|
---|
465 | PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 1);
|
---|
466 | }
|
---|
467 | else
|
---|
468 | {
|
---|
469 | LogFlowFunc(("Clearing interrupt\n"));
|
---|
470 | PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 0);
|
---|
471 | }
|
---|
472 | }
|
---|
473 |
|
---|
474 | /**
|
---|
475 | * Sets a given interrupt status bit in the status register and
|
---|
476 | * updates the interrupt status.
|
---|
477 | *
|
---|
478 | * @returns nothing.
|
---|
479 | * @param pThis Pointer to the LsiLogic device state.
|
---|
480 | * @param uStatus The status bit to set.
|
---|
481 | */
|
---|
482 | DECLINLINE(void) lsilogicSetInterrupt(PLSILOGICSCSI pThis, uint32_t uStatus)
|
---|
483 | {
|
---|
484 | ASMAtomicOrU32(&pThis->uInterruptStatus, uStatus);
|
---|
485 | lsilogicUpdateInterrupt(pThis);
|
---|
486 | }
|
---|
487 |
|
---|
488 | /**
|
---|
489 | * Clears a given interrupt status bit in the status register and
|
---|
490 | * updates the interrupt status.
|
---|
491 | *
|
---|
492 | * @returns nothing.
|
---|
493 | * @param pThis Pointer to the LsiLogic device state.
|
---|
494 | * @param uStatus The status bit to set.
|
---|
495 | */
|
---|
496 | DECLINLINE(void) lsilogicClearInterrupt(PLSILOGICSCSI pThis, uint32_t uStatus)
|
---|
497 | {
|
---|
498 | ASMAtomicAndU32(&pThis->uInterruptStatus, ~uStatus);
|
---|
499 | lsilogicUpdateInterrupt(pThis);
|
---|
500 | }
|
---|
501 |
|
---|
502 |
|
---|
503 | #ifdef IN_RING3
|
---|
504 | /**
|
---|
505 | * Sets the I/O controller into fault state and sets the fault code.
|
---|
506 | *
|
---|
507 | * @returns nothing
|
---|
508 | * @param pThis Pointer to the LsiLogic device state.
|
---|
509 | * @param uIOCFaultCode Fault code to set.
|
---|
510 | */
|
---|
511 | DECLINLINE(void) lsilogicSetIOCFaultCode(PLSILOGICSCSI pThis, uint16_t uIOCFaultCode)
|
---|
512 | {
|
---|
513 | if (pThis->enmState != LSILOGICSTATE_FAULT)
|
---|
514 | {
|
---|
515 | LogFunc(("Setting I/O controller into FAULT state: uIOCFaultCode=%u\n", uIOCFaultCode));
|
---|
516 | pThis->enmState = LSILOGICSTATE_FAULT;
|
---|
517 | pThis->u16IOCFaultCode = uIOCFaultCode;
|
---|
518 | }
|
---|
519 | else
|
---|
520 | LogFunc(("We are already in FAULT state\n"));
|
---|
521 | }
|
---|
522 | #endif /* IN_RING3 */
|
---|
523 |
|
---|
524 |
|
---|
525 | /**
|
---|
526 | * Returns the number of frames in the reply free queue.
|
---|
527 | *
|
---|
528 | * @returns Number of frames in the reply free queue.
|
---|
529 | * @param pThis Pointer to the LsiLogic device state.
|
---|
530 | */
|
---|
531 | DECLINLINE(uint32_t) lsilogicReplyFreeQueueGetFrameCount(PLSILOGICSCSI pThis)
|
---|
532 | {
|
---|
533 | uint32_t cReplyFrames = 0;
|
---|
534 |
|
---|
535 | if (pThis->uReplyFreeQueueNextAddressRead <= pThis->uReplyFreeQueueNextEntryFreeWrite)
|
---|
536 | cReplyFrames = pThis->uReplyFreeQueueNextEntryFreeWrite - pThis->uReplyFreeQueueNextAddressRead;
|
---|
537 | else
|
---|
538 | cReplyFrames = pThis->cReplyQueueEntries - pThis->uReplyFreeQueueNextAddressRead + pThis->uReplyFreeQueueNextEntryFreeWrite;
|
---|
539 |
|
---|
540 | return cReplyFrames;
|
---|
541 | }
|
---|
542 |
|
---|
543 | #ifdef IN_RING3
|
---|
544 |
|
---|
545 | /**
|
---|
546 | * Returns the number of free entries in the reply post queue.
|
---|
547 | *
|
---|
548 | * @returns Number of frames in the reply free queue.
|
---|
549 | * @param pThis Pointer to the LsiLogic device state.
|
---|
550 | */
|
---|
551 | DECLINLINE(uint32_t) lsilogicReplyPostQueueGetFrameCount(PLSILOGICSCSI pThis)
|
---|
552 | {
|
---|
553 | uint32_t cReplyFrames = 0;
|
---|
554 |
|
---|
555 | if (pThis->uReplyPostQueueNextAddressRead <= pThis->uReplyPostQueueNextEntryFreeWrite)
|
---|
556 | cReplyFrames = pThis->cReplyQueueEntries - pThis->uReplyPostQueueNextEntryFreeWrite + pThis->uReplyPostQueueNextAddressRead;
|
---|
557 | else
|
---|
558 | cReplyFrames = pThis->uReplyPostQueueNextEntryFreeWrite - pThis->uReplyPostQueueNextAddressRead;
|
---|
559 |
|
---|
560 | return cReplyFrames;
|
---|
561 | }
|
---|
562 |
|
---|
563 |
|
---|
564 | /**
|
---|
565 | * Performs a hard reset on the controller.
|
---|
566 | *
|
---|
567 | * @returns VBox status code.
|
---|
568 | * @param pThis Pointer to the LsiLogic device state.
|
---|
569 | */
|
---|
570 | static int lsilogicR3HardReset(PLSILOGICSCSI pThis)
|
---|
571 | {
|
---|
572 | pThis->enmState = LSILOGICSTATE_RESET;
|
---|
573 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_NOT_IN_USE;
|
---|
574 |
|
---|
575 | /* The interrupts are masked out. */
|
---|
576 | pThis->uInterruptMask |= LSILOGIC_REG_HOST_INTR_MASK_DOORBELL
|
---|
577 | | LSILOGIC_REG_HOST_INTR_MASK_REPLY;
|
---|
578 | /* Reset interrupt states. */
|
---|
579 | pThis->uInterruptStatus = 0;
|
---|
580 | lsilogicUpdateInterrupt(pThis);
|
---|
581 |
|
---|
582 | /* Reset the queues. */
|
---|
583 | pThis->uReplyFreeQueueNextEntryFreeWrite = 0;
|
---|
584 | pThis->uReplyFreeQueueNextAddressRead = 0;
|
---|
585 | pThis->uReplyPostQueueNextEntryFreeWrite = 0;
|
---|
586 | pThis->uReplyPostQueueNextAddressRead = 0;
|
---|
587 | pThis->uRequestQueueNextEntryFreeWrite = 0;
|
---|
588 | pThis->uRequestQueueNextAddressRead = 0;
|
---|
589 |
|
---|
590 | /* Disable diagnostic access. */
|
---|
591 | pThis->iDiagnosticAccess = 0;
|
---|
592 | pThis->fDiagnosticEnabled = false;
|
---|
593 | pThis->fDiagRegsEnabled = false;
|
---|
594 |
|
---|
595 | /* Set default values. */
|
---|
596 | pThis->cMaxDevices = pThis->cDeviceStates;
|
---|
597 | pThis->cMaxBuses = 1;
|
---|
598 | pThis->cbReplyFrame = 128; /** @todo Figure out where it is needed. */
|
---|
599 | pThis->u16NextHandle = 1;
|
---|
600 | pThis->u32DiagMemAddr = 0;
|
---|
601 |
|
---|
602 | lsilogicR3ConfigurationPagesFree(pThis);
|
---|
603 | lsilogicR3InitializeConfigurationPages(pThis);
|
---|
604 |
|
---|
605 | /* Mark that we finished performing the reset. */
|
---|
606 | pThis->enmState = LSILOGICSTATE_READY;
|
---|
607 | return VINF_SUCCESS;
|
---|
608 | }
|
---|
609 |
|
---|
610 | /**
|
---|
611 | * Frees the configuration pages if allocated.
|
---|
612 | *
|
---|
613 | * @returns nothing.
|
---|
614 | * @param pThis The LsiLogic controller instance
|
---|
615 | */
|
---|
616 | static void lsilogicR3ConfigurationPagesFree(PLSILOGICSCSI pThis)
|
---|
617 | {
|
---|
618 |
|
---|
619 | if (pThis->pConfigurationPages)
|
---|
620 | {
|
---|
621 | /* Destroy device list if we emulate a SAS controller. */
|
---|
622 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
623 | {
|
---|
624 | PMptConfigurationPagesSas pSasPages = &pThis->pConfigurationPages->u.SasPages;
|
---|
625 | PMptSASDevice pSASDeviceCurr = pSasPages->pSASDeviceHead;
|
---|
626 |
|
---|
627 | while (pSASDeviceCurr)
|
---|
628 | {
|
---|
629 | PMptSASDevice pFree = pSASDeviceCurr;
|
---|
630 |
|
---|
631 | pSASDeviceCurr = pSASDeviceCurr->pNext;
|
---|
632 | RTMemFree(pFree);
|
---|
633 | }
|
---|
634 | if (pSasPages->paPHYs)
|
---|
635 | RTMemFree(pSasPages->paPHYs);
|
---|
636 | if (pSasPages->pManufacturingPage7)
|
---|
637 | RTMemFree(pSasPages->pManufacturingPage7);
|
---|
638 | if (pSasPages->pSASIOUnitPage0)
|
---|
639 | RTMemFree(pSasPages->pSASIOUnitPage0);
|
---|
640 | if (pSasPages->pSASIOUnitPage1)
|
---|
641 | RTMemFree(pSasPages->pSASIOUnitPage1);
|
---|
642 | }
|
---|
643 |
|
---|
644 | RTMemFree(pThis->pConfigurationPages);
|
---|
645 | }
|
---|
646 | }
|
---|
647 |
|
---|
648 | /**
|
---|
649 | * Finishes a context reply.
|
---|
650 | *
|
---|
651 | * @returns nothing
|
---|
652 | * @param pThis Pointer to the LsiLogic device state.
|
---|
653 | * @param u32MessageContext The message context ID to post.
|
---|
654 | */
|
---|
655 | static void lsilogicR3FinishContextReply(PLSILOGICSCSI pThis, uint32_t u32MessageContext)
|
---|
656 | {
|
---|
657 | int rc;
|
---|
658 |
|
---|
659 | LogFlowFunc(("pThis=%#p u32MessageContext=%#x\n", pThis, u32MessageContext));
|
---|
660 |
|
---|
661 | AssertMsg(pThis->enmDoorbellState == LSILOGICDOORBELLSTATE_NOT_IN_USE, ("We are in a doorbell function\n"));
|
---|
662 |
|
---|
663 | /* Write message context ID into reply post queue. */
|
---|
664 | rc = PDMCritSectEnter(&pThis->ReplyPostQueueCritSect, VINF_SUCCESS);
|
---|
665 | AssertRC(rc);
|
---|
666 |
|
---|
667 | /* Check for a entry in the queue. */
|
---|
668 | if (!lsilogicReplyPostQueueGetFrameCount(pThis))
|
---|
669 | {
|
---|
670 | /* Set error code. */
|
---|
671 | lsilogicSetIOCFaultCode(pThis, LSILOGIC_IOCSTATUS_INSUFFICIENT_RESOURCES);
|
---|
672 | PDMCritSectLeave(&pThis->ReplyPostQueueCritSect);
|
---|
673 | return;
|
---|
674 | }
|
---|
675 |
|
---|
676 | /* We have a context reply. */
|
---|
677 | ASMAtomicWriteU32(&pThis->CTX_SUFF(pReplyPostQueueBase)[pThis->uReplyPostQueueNextEntryFreeWrite], u32MessageContext);
|
---|
678 | ASMAtomicIncU32(&pThis->uReplyPostQueueNextEntryFreeWrite);
|
---|
679 | pThis->uReplyPostQueueNextEntryFreeWrite %= pThis->cReplyQueueEntries;
|
---|
680 |
|
---|
681 | /* Set interrupt. */
|
---|
682 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_REPLY_INTR);
|
---|
683 |
|
---|
684 | PDMCritSectLeave(&pThis->ReplyPostQueueCritSect);
|
---|
685 | }
|
---|
686 |
|
---|
687 |
|
---|
688 | /**
|
---|
689 | * Takes necessary steps to finish a reply frame.
|
---|
690 | *
|
---|
691 | * @returns nothing
|
---|
692 | * @param pThis Pointer to the LsiLogic device state.
|
---|
693 | * @param pReply Pointer to the reply message.
|
---|
694 | * @param fForceReplyFifo Flag whether the use of the reply post fifo is forced.
|
---|
695 | */
|
---|
696 | static void lsilogicFinishAddressReply(PLSILOGICSCSI pThis, PMptReplyUnion pReply, bool fForceReplyFifo)
|
---|
697 | {
|
---|
698 | /*
|
---|
699 | * If we are in a doorbell function we set the reply size now and
|
---|
700 | * set the system doorbell status interrupt to notify the guest that
|
---|
701 | * we are ready to send the reply.
|
---|
702 | */
|
---|
703 | if (pThis->enmDoorbellState != LSILOGICDOORBELLSTATE_NOT_IN_USE && !fForceReplyFifo)
|
---|
704 | {
|
---|
705 | /* Set size of the reply in 16bit words. The size in the reply is in 32bit dwords. */
|
---|
706 | pThis->cReplySize = pReply->Header.u8MessageLength * 2;
|
---|
707 | Log(("%s: cReplySize=%u\n", __FUNCTION__, pThis->cReplySize));
|
---|
708 | pThis->uNextReplyEntryRead = 0;
|
---|
709 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
710 | }
|
---|
711 | else
|
---|
712 | {
|
---|
713 | /*
|
---|
714 | * The reply queues are only used if the request was fetched from the request queue.
|
---|
715 | * Requests from the request queue are always transferred to R3. So it is not possible
|
---|
716 | * that this case happens in R0 or GC.
|
---|
717 | */
|
---|
718 | # ifdef IN_RING3
|
---|
719 | int rc;
|
---|
720 | /* Grab a free reply message from the queue. */
|
---|
721 | rc = PDMCritSectEnter(&pThis->ReplyFreeQueueCritSect, VINF_SUCCESS);
|
---|
722 | AssertRC(rc);
|
---|
723 |
|
---|
724 | /* Check for a free reply frame. */
|
---|
725 | if (!lsilogicReplyFreeQueueGetFrameCount(pThis))
|
---|
726 | {
|
---|
727 | /* Set error code. */
|
---|
728 | lsilogicSetIOCFaultCode(pThis, LSILOGIC_IOCSTATUS_INSUFFICIENT_RESOURCES);
|
---|
729 | PDMCritSectLeave(&pThis->ReplyFreeQueueCritSect);
|
---|
730 | return;
|
---|
731 | }
|
---|
732 |
|
---|
733 | uint32_t u32ReplyFrameAddressLow = pThis->CTX_SUFF(pReplyFreeQueueBase)[pThis->uReplyFreeQueueNextAddressRead];
|
---|
734 |
|
---|
735 | pThis->uReplyFreeQueueNextAddressRead++;
|
---|
736 | pThis->uReplyFreeQueueNextAddressRead %= pThis->cReplyQueueEntries;
|
---|
737 |
|
---|
738 | PDMCritSectLeave(&pThis->ReplyFreeQueueCritSect);
|
---|
739 |
|
---|
740 | /* Build 64bit physical address. */
|
---|
741 | RTGCPHYS GCPhysReplyMessage = LSILOGIC_RTGCPHYS_FROM_U32(pThis->u32HostMFAHighAddr, u32ReplyFrameAddressLow);
|
---|
742 | size_t cbReplyCopied = (pThis->cbReplyFrame < sizeof(MptReplyUnion)) ? pThis->cbReplyFrame : sizeof(MptReplyUnion);
|
---|
743 |
|
---|
744 | /* Write reply to guest memory. */
|
---|
745 | PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhysReplyMessage, pReply, cbReplyCopied);
|
---|
746 |
|
---|
747 | /* Write low 32bits of reply frame into post reply queue. */
|
---|
748 | rc = PDMCritSectEnter(&pThis->ReplyPostQueueCritSect, VINF_SUCCESS);
|
---|
749 | AssertRC(rc);
|
---|
750 |
|
---|
751 | /* Check for a entry in the queue. */
|
---|
752 | if (!lsilogicReplyPostQueueGetFrameCount(pThis))
|
---|
753 | {
|
---|
754 | /* Set error code. */
|
---|
755 | lsilogicSetIOCFaultCode(pThis, LSILOGIC_IOCSTATUS_INSUFFICIENT_RESOURCES);
|
---|
756 | PDMCritSectLeave(&pThis->ReplyPostQueueCritSect);
|
---|
757 | return;
|
---|
758 | }
|
---|
759 |
|
---|
760 | /* We have a address reply. Set the 31th bit to indicate that. */
|
---|
761 | ASMAtomicWriteU32(&pThis->CTX_SUFF(pReplyPostQueueBase)[pThis->uReplyPostQueueNextEntryFreeWrite],
|
---|
762 | RT_BIT(31) | (u32ReplyFrameAddressLow >> 1));
|
---|
763 | ASMAtomicIncU32(&pThis->uReplyPostQueueNextEntryFreeWrite);
|
---|
764 | pThis->uReplyPostQueueNextEntryFreeWrite %= pThis->cReplyQueueEntries;
|
---|
765 |
|
---|
766 | if (fForceReplyFifo)
|
---|
767 | {
|
---|
768 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_NOT_IN_USE;
|
---|
769 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
770 | }
|
---|
771 |
|
---|
772 | /* Set interrupt. */
|
---|
773 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_REPLY_INTR);
|
---|
774 |
|
---|
775 | PDMCritSectLeave(&pThis->ReplyPostQueueCritSect);
|
---|
776 | # else
|
---|
777 | AssertMsgFailed(("This is not allowed to happen.\n"));
|
---|
778 | # endif
|
---|
779 | }
|
---|
780 | }
|
---|
781 |
|
---|
782 |
|
---|
783 | /**
|
---|
784 | * Tries to find a memory region which covers the given address.
|
---|
785 | *
|
---|
786 | * @returns Pointer to memory region or NULL if not found.
|
---|
787 | * @param pThis Pointer to the LsiLogic device state.
|
---|
788 | * @param u32Addr The 32bit address to search for.
|
---|
789 | */
|
---|
790 | static PLSILOGICMEMREGN lsilogicR3MemRegionFindByAddr(PLSILOGICSCSI pThis, uint32_t u32Addr)
|
---|
791 | {
|
---|
792 | PLSILOGICMEMREGN pIt;
|
---|
793 | PLSILOGICMEMREGN pRegion = NULL;
|
---|
794 |
|
---|
795 | RTListForEach(&pThis->ListMemRegns, pIt, LSILOGICMEMREGN, NodeList)
|
---|
796 | {
|
---|
797 | if ( u32Addr >= pIt->u32AddrStart
|
---|
798 | && u32Addr <= pIt->u32AddrEnd)
|
---|
799 | {
|
---|
800 | pRegion = pIt;
|
---|
801 | break;
|
---|
802 | }
|
---|
803 | }
|
---|
804 |
|
---|
805 | return pRegion;
|
---|
806 | }
|
---|
807 |
|
---|
808 | /**
|
---|
809 | * Frees all allocated memory regions.
|
---|
810 | *
|
---|
811 | * @returns nothing.
|
---|
812 | * @param pThis Pointer to the LsiLogic device state.
|
---|
813 | */
|
---|
814 | static void lsilogicR3MemRegionsFree(PLSILOGICSCSI pThis)
|
---|
815 | {
|
---|
816 | PLSILOGICMEMREGN pIt;
|
---|
817 | PLSILOGICMEMREGN pItNext;
|
---|
818 |
|
---|
819 | RTListForEachSafe(&pThis->ListMemRegns, pIt, pItNext, LSILOGICMEMREGN, NodeList)
|
---|
820 | {
|
---|
821 | RTListNodeRemove(&pIt->NodeList);
|
---|
822 | RTMemFree(pIt);
|
---|
823 | }
|
---|
824 | pThis->cbMemRegns = 0;
|
---|
825 | }
|
---|
826 |
|
---|
827 | /**
|
---|
828 | * Inserts a given memory region into the list.
|
---|
829 | *
|
---|
830 | * @returns nothing.
|
---|
831 | * @param pThis Pointer to the LsiLogic device state.
|
---|
832 | * @param pRegion The region to insert.
|
---|
833 | */
|
---|
834 | static void lsilogicR3MemRegionInsert(PLSILOGICSCSI pThis, PLSILOGICMEMREGN pRegion)
|
---|
835 | {
|
---|
836 | PLSILOGICMEMREGN pIt;
|
---|
837 | bool fInserted = false;
|
---|
838 |
|
---|
839 | /* Insert at the right position. */
|
---|
840 | RTListForEach(&pThis->ListMemRegns, pIt, LSILOGICMEMREGN, NodeList)
|
---|
841 | {
|
---|
842 | if (pRegion->u32AddrEnd < pIt->u32AddrStart)
|
---|
843 | {
|
---|
844 | RTListNodeInsertBefore(&pIt->NodeList, &pRegion->NodeList);
|
---|
845 | fInserted = true;
|
---|
846 | break;
|
---|
847 | }
|
---|
848 | }
|
---|
849 | if (!fInserted)
|
---|
850 | RTListAppend(&pThis->ListMemRegns, &pRegion->NodeList);
|
---|
851 | }
|
---|
852 |
|
---|
853 | /**
|
---|
854 | * Count number of memory regions.
|
---|
855 | *
|
---|
856 | * @returns Number of memory regions.
|
---|
857 | * @param pThis Pointer to the LsiLogic device state.
|
---|
858 | */
|
---|
859 | static uint32_t lsilogicR3MemRegionsCount(PLSILOGICSCSI pThis)
|
---|
860 | {
|
---|
861 | uint32_t cRegions = 0;
|
---|
862 | PLSILOGICMEMREGN pIt;
|
---|
863 |
|
---|
864 | RTListForEach(&pThis->ListMemRegns, pIt, LSILOGICMEMREGN, NodeList)
|
---|
865 | {
|
---|
866 | cRegions++;
|
---|
867 | }
|
---|
868 |
|
---|
869 | return cRegions;
|
---|
870 | }
|
---|
871 |
|
---|
872 | /**
|
---|
873 | * Handles a write to the diagnostic data register.
|
---|
874 | *
|
---|
875 | * @returns nothing.
|
---|
876 | * @param pThis Pointer to the LsiLogic device state.
|
---|
877 | * @param u32Data Data to write.
|
---|
878 | */
|
---|
879 | static void lsilogicR3DiagRegDataWrite(PLSILOGICSCSI pThis, uint32_t u32Data)
|
---|
880 | {
|
---|
881 | PLSILOGICMEMREGN pRegion = lsilogicR3MemRegionFindByAddr(pThis, pThis->u32DiagMemAddr);
|
---|
882 |
|
---|
883 | if (pRegion)
|
---|
884 | {
|
---|
885 | uint32_t offRegion = pThis->u32DiagMemAddr - pRegion->u32AddrStart;
|
---|
886 |
|
---|
887 | AssertMsg( offRegion % 4 == 0
|
---|
888 | && pThis->u32DiagMemAddr <= pRegion->u32AddrEnd,
|
---|
889 | ("Region offset not on a word boundary or crosses memory region\n"));
|
---|
890 |
|
---|
891 | offRegion /= 4;
|
---|
892 | pRegion->au32Data[offRegion] = u32Data;
|
---|
893 | }
|
---|
894 | else
|
---|
895 | {
|
---|
896 | PLSILOGICMEMREGN pIt;
|
---|
897 |
|
---|
898 | pRegion = NULL;
|
---|
899 |
|
---|
900 | /* Create new region, first check whether we can extend another region. */
|
---|
901 | RTListForEach(&pThis->ListMemRegns, pIt, LSILOGICMEMREGN, NodeList)
|
---|
902 | {
|
---|
903 | if (pThis->u32DiagMemAddr == pIt->u32AddrEnd + sizeof(uint32_t))
|
---|
904 | {
|
---|
905 | pRegion = pIt;
|
---|
906 | break;
|
---|
907 | }
|
---|
908 | }
|
---|
909 |
|
---|
910 | if (pRegion)
|
---|
911 | {
|
---|
912 | /* Reallocate. */
|
---|
913 | RTListNodeRemove(&pRegion->NodeList);
|
---|
914 |
|
---|
915 | uint32_t cRegionSizeOld = (pRegion->u32AddrEnd - pRegion->u32AddrStart) / 4 + 1;
|
---|
916 | uint32_t cRegionSizeNew = cRegionSizeOld + 512;
|
---|
917 |
|
---|
918 | if (pThis->cbMemRegns + 512 * sizeof(uint32_t) < LSILOGIC_MEMORY_REGIONS_MAX)
|
---|
919 | {
|
---|
920 | PLSILOGICMEMREGN pRegionNew = (PLSILOGICMEMREGN)RTMemRealloc(pRegion, RT_OFFSETOF(LSILOGICMEMREGN, au32Data[cRegionSizeNew]));
|
---|
921 |
|
---|
922 | if (pRegionNew)
|
---|
923 | {
|
---|
924 | pRegion = pRegionNew;
|
---|
925 | memset(&pRegion->au32Data[cRegionSizeOld], 0, 512 * sizeof(uint32_t));
|
---|
926 | pRegion->au32Data[cRegionSizeOld] = u32Data;
|
---|
927 | pRegion->u32AddrEnd = pRegion->u32AddrStart + (cRegionSizeNew - 1) * sizeof(uint32_t);
|
---|
928 | pThis->cbMemRegns += 512 * sizeof(uint32_t);
|
---|
929 | }
|
---|
930 | /* else: Silently fail, there is nothing we can do here and the guest might work nevertheless. */
|
---|
931 |
|
---|
932 | lsilogicR3MemRegionInsert(pThis, pRegion);
|
---|
933 | }
|
---|
934 | }
|
---|
935 | else
|
---|
936 | {
|
---|
937 | if (pThis->cbMemRegns + 512 * sizeof(uint32_t) < LSILOGIC_MEMORY_REGIONS_MAX)
|
---|
938 | {
|
---|
939 | /* Create completely new. */
|
---|
940 | pRegion = (PLSILOGICMEMREGN)RTMemAllocZ(RT_OFFSETOF(LSILOGICMEMREGN, au32Data[512]));
|
---|
941 | if (pRegion)
|
---|
942 | {
|
---|
943 | pRegion->u32AddrStart = pThis->u32DiagMemAddr;
|
---|
944 | pRegion->u32AddrEnd = pRegion->u32AddrStart + (512 - 1) * sizeof(uint32_t);
|
---|
945 | pRegion->au32Data[0] = u32Data;
|
---|
946 | pThis->cbMemRegns += 512 * sizeof(uint32_t);
|
---|
947 |
|
---|
948 | lsilogicR3MemRegionInsert(pThis, pRegion);
|
---|
949 | }
|
---|
950 | /* else: Silently fail, there is nothing we can do here and the guest might work nevertheless. */
|
---|
951 | }
|
---|
952 | }
|
---|
953 |
|
---|
954 | }
|
---|
955 |
|
---|
956 | /* Memory access is always 32bit big. */
|
---|
957 | pThis->u32DiagMemAddr += sizeof(uint32_t);
|
---|
958 | }
|
---|
959 |
|
---|
960 | /**
|
---|
961 | * Handles a read from the diagnostic data register.
|
---|
962 | *
|
---|
963 | * @returns nothing.
|
---|
964 | * @param pThis Pointer to the LsiLogic device state.
|
---|
965 | * @param pu32Data Where to store the data.
|
---|
966 | */
|
---|
967 | static void lsilogicR3DiagRegDataRead(PLSILOGICSCSI pThis, uint32_t *pu32Data)
|
---|
968 | {
|
---|
969 | PLSILOGICMEMREGN pRegion = lsilogicR3MemRegionFindByAddr(pThis, pThis->u32DiagMemAddr);
|
---|
970 |
|
---|
971 | if (pRegion)
|
---|
972 | {
|
---|
973 | uint32_t offRegion = pThis->u32DiagMemAddr - pRegion->u32AddrStart;
|
---|
974 |
|
---|
975 | AssertMsg( offRegion % 4 == 0
|
---|
976 | && pThis->u32DiagMemAddr <= pRegion->u32AddrEnd,
|
---|
977 | ("Region offset not on a word boundary or crosses memory region\n"));
|
---|
978 |
|
---|
979 | offRegion /= 4;
|
---|
980 | *pu32Data = pRegion->au32Data[offRegion];
|
---|
981 | }
|
---|
982 | else /* No region, default value 0. */
|
---|
983 | *pu32Data = 0;
|
---|
984 |
|
---|
985 | /* Memory access is always 32bit big. */
|
---|
986 | pThis->u32DiagMemAddr += sizeof(uint32_t);
|
---|
987 | }
|
---|
988 |
|
---|
989 | /**
|
---|
990 | * Handles a write to the diagnostic memory address register.
|
---|
991 | *
|
---|
992 | * @returns nothing.
|
---|
993 | * @param pThis Pointer to the LsiLogic device state.
|
---|
994 | * @param u32Addr Address to write.
|
---|
995 | */
|
---|
996 | static void lsilogicR3DiagRegAddressWrite(PLSILOGICSCSI pThis, uint32_t u32Addr)
|
---|
997 | {
|
---|
998 | pThis->u32DiagMemAddr = u32Addr & ~UINT32_C(0x3); /* 32bit alignment. */
|
---|
999 | }
|
---|
1000 |
|
---|
1001 | /**
|
---|
1002 | * Handles a read from the diagnostic memory address register.
|
---|
1003 | *
|
---|
1004 | * @returns nothing.
|
---|
1005 | * @param pThis Pointer to the LsiLogic device state.
|
---|
1006 | * @param pu32Addr Where to store the current address.
|
---|
1007 | */
|
---|
1008 | static void lsilogicR3DiagRegAddressRead(PLSILOGICSCSI pThis, uint32_t *pu32Addr)
|
---|
1009 | {
|
---|
1010 | *pu32Addr = pThis->u32DiagMemAddr;
|
---|
1011 | }
|
---|
1012 |
|
---|
1013 | /**
|
---|
1014 | * Processes a given Request from the guest
|
---|
1015 | *
|
---|
1016 | * @returns VBox status code.
|
---|
1017 | * @param pThis Pointer to the LsiLogic device state.
|
---|
1018 | * @param pMessageHdr Pointer to the message header of the request.
|
---|
1019 | * @param pReply Pointer to the reply.
|
---|
1020 | */
|
---|
1021 | static int lsilogicR3ProcessMessageRequest(PLSILOGICSCSI pThis, PMptMessageHdr pMessageHdr, PMptReplyUnion pReply)
|
---|
1022 | {
|
---|
1023 | int rc = VINF_SUCCESS;
|
---|
1024 | bool fForceReplyPostFifo = false;
|
---|
1025 |
|
---|
1026 | # ifdef LOG_ENABLED
|
---|
1027 | if (pMessageHdr->u8Function < RT_ELEMENTS(g_apszMPTFunctionNames))
|
---|
1028 | Log(("Message request function: %s\n", g_apszMPTFunctionNames[pMessageHdr->u8Function]));
|
---|
1029 | else
|
---|
1030 | Log(("Message request function: <unknown>\n"));
|
---|
1031 | # endif
|
---|
1032 |
|
---|
1033 | memset(pReply, 0, sizeof(MptReplyUnion));
|
---|
1034 |
|
---|
1035 | switch (pMessageHdr->u8Function)
|
---|
1036 | {
|
---|
1037 | case MPT_MESSAGE_HDR_FUNCTION_SCSI_TASK_MGMT:
|
---|
1038 | {
|
---|
1039 | PMptSCSITaskManagementRequest pTaskMgmtReq = (PMptSCSITaskManagementRequest)pMessageHdr;
|
---|
1040 |
|
---|
1041 | LogFlow(("u8TaskType=%u\n", pTaskMgmtReq->u8TaskType));
|
---|
1042 | LogFlow(("u32TaskMessageContext=%#x\n", pTaskMgmtReq->u32TaskMessageContext));
|
---|
1043 |
|
---|
1044 | pReply->SCSITaskManagement.u8MessageLength = 6; /* 6 32bit dwords. */
|
---|
1045 | pReply->SCSITaskManagement.u8TaskType = pTaskMgmtReq->u8TaskType;
|
---|
1046 | pReply->SCSITaskManagement.u32TerminationCount = 0;
|
---|
1047 | fForceReplyPostFifo = true;
|
---|
1048 | break;
|
---|
1049 | }
|
---|
1050 | case MPT_MESSAGE_HDR_FUNCTION_IOC_INIT:
|
---|
1051 | {
|
---|
1052 | /*
|
---|
1053 | * This request sets the I/O controller to the
|
---|
1054 | * operational state.
|
---|
1055 | */
|
---|
1056 | PMptIOCInitRequest pIOCInitReq = (PMptIOCInitRequest)pMessageHdr;
|
---|
1057 |
|
---|
1058 | /* Update configuration values. */
|
---|
1059 | pThis->enmWhoInit = (LSILOGICWHOINIT)pIOCInitReq->u8WhoInit;
|
---|
1060 | pThis->cbReplyFrame = pIOCInitReq->u16ReplyFrameSize;
|
---|
1061 | pThis->cMaxBuses = pIOCInitReq->u8MaxBuses;
|
---|
1062 | pThis->cMaxDevices = pIOCInitReq->u8MaxDevices;
|
---|
1063 | pThis->u32HostMFAHighAddr = pIOCInitReq->u32HostMfaHighAddr;
|
---|
1064 | pThis->u32SenseBufferHighAddr = pIOCInitReq->u32SenseBufferHighAddr;
|
---|
1065 |
|
---|
1066 | if (pThis->enmState == LSILOGICSTATE_READY)
|
---|
1067 | {
|
---|
1068 | pThis->enmState = LSILOGICSTATE_OPERATIONAL;
|
---|
1069 | }
|
---|
1070 |
|
---|
1071 | /* Return reply. */
|
---|
1072 | pReply->IOCInit.u8MessageLength = 5;
|
---|
1073 | pReply->IOCInit.u8WhoInit = pThis->enmWhoInit;
|
---|
1074 | pReply->IOCInit.u8MaxDevices = pThis->cMaxDevices;
|
---|
1075 | pReply->IOCInit.u8MaxBuses = pThis->cMaxBuses;
|
---|
1076 | break;
|
---|
1077 | }
|
---|
1078 | case MPT_MESSAGE_HDR_FUNCTION_IOC_FACTS:
|
---|
1079 | {
|
---|
1080 | pReply->IOCFacts.u8MessageLength = 15; /* 15 32bit dwords. */
|
---|
1081 |
|
---|
1082 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
1083 | {
|
---|
1084 | pReply->IOCFacts.u16MessageVersion = 0x0102; /* Version from the specification. */
|
---|
1085 | pReply->IOCFacts.u8NumberOfPorts = pThis->cPorts;
|
---|
1086 | }
|
---|
1087 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
1088 | {
|
---|
1089 | pReply->IOCFacts.u16MessageVersion = 0x0105; /* Version from the specification. */
|
---|
1090 | pReply->IOCFacts.u8NumberOfPorts = pThis->cPorts;
|
---|
1091 | }
|
---|
1092 | else
|
---|
1093 | AssertMsgFailed(("Invalid controller type %d\n", pThis->enmCtrlType));
|
---|
1094 |
|
---|
1095 | pReply->IOCFacts.u8IOCNumber = 0; /* PCI function number. */
|
---|
1096 | pReply->IOCFacts.u16IOCExceptions = 0;
|
---|
1097 | pReply->IOCFacts.u8MaxChainDepth = LSILOGICSCSI_MAXIMUM_CHAIN_DEPTH;
|
---|
1098 | pReply->IOCFacts.u8WhoInit = pThis->enmWhoInit;
|
---|
1099 | pReply->IOCFacts.u8BlockSize = 12; /* Block size in 32bit dwords. This is the largest request we can get (SCSI I/O). */
|
---|
1100 | pReply->IOCFacts.u8Flags = 0; /* Bit 0 is set if the guest must upload the FW prior to using the controller. Obviously not needed here. */
|
---|
1101 | pReply->IOCFacts.u16ReplyQueueDepth = pThis->cReplyQueueEntries - 1; /* One entry is always free. */
|
---|
1102 | pReply->IOCFacts.u16RequestFrameSize = 128; /** @todo Figure out where it is needed. */
|
---|
1103 | pReply->IOCFacts.u32CurrentHostMFAHighAddr = pThis->u32HostMFAHighAddr;
|
---|
1104 | pReply->IOCFacts.u16GlobalCredits = pThis->cRequestQueueEntries - 1; /* One entry is always free. */
|
---|
1105 |
|
---|
1106 | pReply->IOCFacts.u8EventState = 0; /* Event notifications not enabled. */
|
---|
1107 | pReply->IOCFacts.u32CurrentSenseBufferHighAddr = pThis->u32SenseBufferHighAddr;
|
---|
1108 | pReply->IOCFacts.u16CurReplyFrameSize = pThis->cbReplyFrame;
|
---|
1109 | pReply->IOCFacts.u8MaxDevices = pThis->cMaxDevices;
|
---|
1110 | pReply->IOCFacts.u8MaxBuses = pThis->cMaxBuses;
|
---|
1111 |
|
---|
1112 | /* Check for a valid firmware image in the IOC memory which was downlaoded by tzhe guest earlier. */
|
---|
1113 | PLSILOGICMEMREGN pRegion = lsilogicR3MemRegionFindByAddr(pThis, LSILOGIC_FWIMGHDR_LOAD_ADDRESS);
|
---|
1114 |
|
---|
1115 | if (pRegion)
|
---|
1116 | {
|
---|
1117 | uint32_t offImgHdr = (LSILOGIC_FWIMGHDR_LOAD_ADDRESS - pRegion->u32AddrStart) / 4;
|
---|
1118 | PFwImageHdr pFwImgHdr = (PFwImageHdr)&pRegion->au32Data[offImgHdr];
|
---|
1119 |
|
---|
1120 | /* Check for the signature. */
|
---|
1121 | /** @todo Checksum validation. */
|
---|
1122 | if ( pFwImgHdr->u32Signature1 == LSILOGIC_FWIMGHDR_SIGNATURE1
|
---|
1123 | && pFwImgHdr->u32Signature2 == LSILOGIC_FWIMGHDR_SIGNATURE2
|
---|
1124 | && pFwImgHdr->u32Signature3 == LSILOGIC_FWIMGHDR_SIGNATURE3)
|
---|
1125 | {
|
---|
1126 | LogFlowFunc(("IOC Facts: Found valid firmware image header in memory, using version (%#x), size (%d) and product ID (%#x) from there\n",
|
---|
1127 | pFwImgHdr->u32FwVersion, pFwImgHdr->u32ImageSize, pFwImgHdr->u16ProductId));
|
---|
1128 |
|
---|
1129 | pReply->IOCFacts.u16ProductID = pFwImgHdr->u16ProductId;
|
---|
1130 | pReply->IOCFacts.u32FwImageSize = pFwImgHdr->u32ImageSize;
|
---|
1131 | pReply->IOCFacts.u32FWVersion = pFwImgHdr->u32FwVersion;
|
---|
1132 | }
|
---|
1133 | }
|
---|
1134 | else
|
---|
1135 | {
|
---|
1136 | pReply->IOCFacts.u16ProductID = 0xcafe; /* Our own product ID :) */
|
---|
1137 | pReply->IOCFacts.u32FwImageSize = 0; /* No image needed. */
|
---|
1138 | pReply->IOCFacts.u32FWVersion = 0;
|
---|
1139 | }
|
---|
1140 | break;
|
---|
1141 | }
|
---|
1142 | case MPT_MESSAGE_HDR_FUNCTION_PORT_FACTS:
|
---|
1143 | {
|
---|
1144 | PMptPortFactsRequest pPortFactsReq = (PMptPortFactsRequest)pMessageHdr;
|
---|
1145 |
|
---|
1146 | pReply->PortFacts.u8MessageLength = 10;
|
---|
1147 | pReply->PortFacts.u8PortNumber = pPortFactsReq->u8PortNumber;
|
---|
1148 |
|
---|
1149 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
1150 | {
|
---|
1151 | /* This controller only supports one bus with bus number 0. */
|
---|
1152 | if (pPortFactsReq->u8PortNumber >= pThis->cPorts)
|
---|
1153 | {
|
---|
1154 | pReply->PortFacts.u8PortType = 0; /* Not existant. */
|
---|
1155 | }
|
---|
1156 | else
|
---|
1157 | {
|
---|
1158 | pReply->PortFacts.u8PortType = 0x01; /* SCSI Port. */
|
---|
1159 | pReply->PortFacts.u16MaxDevices = LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX;
|
---|
1160 | pReply->PortFacts.u16ProtocolFlags = RT_BIT(3) | RT_BIT(0); /* SCSI initiator and LUN supported. */
|
---|
1161 | pReply->PortFacts.u16PortSCSIID = 7; /* Default */
|
---|
1162 | pReply->PortFacts.u16MaxPersistentIDs = 0;
|
---|
1163 | pReply->PortFacts.u16MaxPostedCmdBuffers = 0; /* Only applies for target mode which we dont support. */
|
---|
1164 | pReply->PortFacts.u16MaxLANBuckets = 0; /* Only for the LAN controller. */
|
---|
1165 | }
|
---|
1166 | }
|
---|
1167 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
1168 | {
|
---|
1169 | if (pPortFactsReq->u8PortNumber >= pThis->cPorts)
|
---|
1170 | {
|
---|
1171 | pReply->PortFacts.u8PortType = 0; /* Not existant. */
|
---|
1172 | }
|
---|
1173 | else
|
---|
1174 | {
|
---|
1175 | pReply->PortFacts.u8PortType = 0x30; /* SAS Port. */
|
---|
1176 | pReply->PortFacts.u16MaxDevices = pThis->cPorts;
|
---|
1177 | pReply->PortFacts.u16ProtocolFlags = RT_BIT(3) | RT_BIT(0); /* SCSI initiator and LUN supported. */
|
---|
1178 | pReply->PortFacts.u16PortSCSIID = pThis->cPorts;
|
---|
1179 | pReply->PortFacts.u16MaxPersistentIDs = 0;
|
---|
1180 | pReply->PortFacts.u16MaxPostedCmdBuffers = 0; /* Only applies for target mode which we dont support. */
|
---|
1181 | pReply->PortFacts.u16MaxLANBuckets = 0; /* Only for the LAN controller. */
|
---|
1182 | }
|
---|
1183 | }
|
---|
1184 | else
|
---|
1185 | AssertMsgFailed(("Invalid controller type %d\n", pThis->enmCtrlType));
|
---|
1186 | break;
|
---|
1187 | }
|
---|
1188 | case MPT_MESSAGE_HDR_FUNCTION_PORT_ENABLE:
|
---|
1189 | {
|
---|
1190 | /*
|
---|
1191 | * The port enable request notifies the IOC to make the port available and perform
|
---|
1192 | * appropriate discovery on the associated link.
|
---|
1193 | */
|
---|
1194 | PMptPortEnableRequest pPortEnableReq = (PMptPortEnableRequest)pMessageHdr;
|
---|
1195 |
|
---|
1196 | pReply->PortEnable.u8MessageLength = 5;
|
---|
1197 | pReply->PortEnable.u8PortNumber = pPortEnableReq->u8PortNumber;
|
---|
1198 | break;
|
---|
1199 | }
|
---|
1200 | case MPT_MESSAGE_HDR_FUNCTION_EVENT_NOTIFICATION:
|
---|
1201 | {
|
---|
1202 | PMptEventNotificationRequest pEventNotificationReq = (PMptEventNotificationRequest)pMessageHdr;
|
---|
1203 |
|
---|
1204 | if (pEventNotificationReq->u8Switch)
|
---|
1205 | pThis->fEventNotificationEnabled = true;
|
---|
1206 | else
|
---|
1207 | pThis->fEventNotificationEnabled = false;
|
---|
1208 |
|
---|
1209 | pReply->EventNotification.u16EventDataLength = 1; /* 1 32bit D-Word. */
|
---|
1210 | pReply->EventNotification.u8MessageLength = 8;
|
---|
1211 | pReply->EventNotification.u8MessageFlags = (1 << 7);
|
---|
1212 | pReply->EventNotification.u8AckRequired = 0;
|
---|
1213 | pReply->EventNotification.u32Event = MPT_EVENT_EVENT_CHANGE;
|
---|
1214 | pReply->EventNotification.u32EventContext = 0;
|
---|
1215 | pReply->EventNotification.u32EventData = pThis->fEventNotificationEnabled ? 1 : 0;
|
---|
1216 |
|
---|
1217 | break;
|
---|
1218 | }
|
---|
1219 | case MPT_MESSAGE_HDR_FUNCTION_EVENT_ACK:
|
---|
1220 | {
|
---|
1221 | AssertMsgFailed(("todo"));
|
---|
1222 | break;
|
---|
1223 | }
|
---|
1224 | case MPT_MESSAGE_HDR_FUNCTION_CONFIG:
|
---|
1225 | {
|
---|
1226 | PMptConfigurationRequest pConfigurationReq = (PMptConfigurationRequest)pMessageHdr;
|
---|
1227 |
|
---|
1228 | rc = lsilogicR3ProcessConfigurationRequest(pThis, pConfigurationReq, &pReply->Configuration);
|
---|
1229 | AssertRC(rc);
|
---|
1230 | break;
|
---|
1231 | }
|
---|
1232 | case MPT_MESSAGE_HDR_FUNCTION_FW_UPLOAD:
|
---|
1233 | {
|
---|
1234 | PMptFWUploadRequest pFWUploadReq = (PMptFWUploadRequest)pMessageHdr;
|
---|
1235 |
|
---|
1236 | pReply->FWUpload.u8ImageType = pFWUploadReq->u8ImageType;
|
---|
1237 | pReply->FWUpload.u8MessageLength = 6;
|
---|
1238 | pReply->FWUpload.u32ActualImageSize = 0;
|
---|
1239 | break;
|
---|
1240 | }
|
---|
1241 | case MPT_MESSAGE_HDR_FUNCTION_FW_DOWNLOAD:
|
---|
1242 | {
|
---|
1243 | //PMptFWDownloadRequest pFWDownloadReq = (PMptFWDownloadRequest)pMessageHdr;
|
---|
1244 |
|
---|
1245 | pReply->FWDownload.u8MessageLength = 5;
|
---|
1246 | LogFlowFunc(("FW Download request issued\n"));
|
---|
1247 | break;
|
---|
1248 | }
|
---|
1249 | case MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST: /* Should be handled already. */
|
---|
1250 | default:
|
---|
1251 | AssertMsgFailed(("Invalid request function %#x\n", pMessageHdr->u8Function));
|
---|
1252 | }
|
---|
1253 |
|
---|
1254 | /* Copy common bits from request message frame to reply. */
|
---|
1255 | pReply->Header.u8Function = pMessageHdr->u8Function;
|
---|
1256 | pReply->Header.u32MessageContext = pMessageHdr->u32MessageContext;
|
---|
1257 |
|
---|
1258 | lsilogicFinishAddressReply(pThis, pReply, fForceReplyPostFifo);
|
---|
1259 | return rc;
|
---|
1260 | }
|
---|
1261 |
|
---|
1262 | #endif /* IN_RING3 */
|
---|
1263 |
|
---|
1264 | /**
|
---|
1265 | * Writes a value to a register at a given offset.
|
---|
1266 | *
|
---|
1267 | * @returns VBox status code.
|
---|
1268 | * @param pThis Pointer to the LsiLogic device state.
|
---|
1269 | * @param offReg Offset of the register to write.
|
---|
1270 | * @param u32 The value being written.
|
---|
1271 | */
|
---|
1272 | static int lsilogicRegisterWrite(PLSILOGICSCSI pThis, uint32_t offReg, uint32_t u32)
|
---|
1273 | {
|
---|
1274 | LogFlowFunc(("pThis=%#p offReg=%#x u32=%#x\n", pThis, offReg, u32));
|
---|
1275 | switch (offReg)
|
---|
1276 | {
|
---|
1277 | case LSILOGIC_REG_REPLY_QUEUE:
|
---|
1278 | {
|
---|
1279 | /* Add the entry to the reply free queue. */
|
---|
1280 | ASMAtomicWriteU32(&pThis->CTX_SUFF(pReplyFreeQueueBase)[pThis->uReplyFreeQueueNextEntryFreeWrite], u32);
|
---|
1281 | pThis->uReplyFreeQueueNextEntryFreeWrite++;
|
---|
1282 | pThis->uReplyFreeQueueNextEntryFreeWrite %= pThis->cReplyQueueEntries;
|
---|
1283 | break;
|
---|
1284 | }
|
---|
1285 | case LSILOGIC_REG_REQUEST_QUEUE:
|
---|
1286 | {
|
---|
1287 | uint32_t uNextWrite = ASMAtomicReadU32(&pThis->uRequestQueueNextEntryFreeWrite);
|
---|
1288 |
|
---|
1289 | ASMAtomicWriteU32(&pThis->CTX_SUFF(pRequestQueueBase)[uNextWrite], u32);
|
---|
1290 |
|
---|
1291 | /*
|
---|
1292 | * Don't update the value in place. It can happen that we get preempted
|
---|
1293 | * after the increment but before the modulo.
|
---|
1294 | * Another EMT will read the wrong value when processing the queues
|
---|
1295 | * and hang in an endless loop creating thousands of requests.
|
---|
1296 | */
|
---|
1297 | uNextWrite++;
|
---|
1298 | uNextWrite %= pThis->cRequestQueueEntries;
|
---|
1299 | ASMAtomicWriteU32(&pThis->uRequestQueueNextEntryFreeWrite, uNextWrite);
|
---|
1300 |
|
---|
1301 | /* Send notification to R3 if there is not one sent already. Do this
|
---|
1302 | * only if the worker thread is not sleeping or might go sleeping. */
|
---|
1303 | if (!ASMAtomicXchgBool(&pThis->fNotificationSent, true))
|
---|
1304 | {
|
---|
1305 | if (ASMAtomicReadBool(&pThis->fWrkThreadSleeping))
|
---|
1306 | {
|
---|
1307 | #ifdef IN_RC
|
---|
1308 | PPDMQUEUEITEMCORE pNotificationItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotificationQueue));
|
---|
1309 | AssertPtr(pNotificationItem);
|
---|
1310 | PDMQueueInsert(pThis->CTX_SUFF(pNotificationQueue), pNotificationItem);
|
---|
1311 | #else
|
---|
1312 | LogFlowFunc(("Signal event semaphore\n"));
|
---|
1313 | int rc = SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
|
---|
1314 | AssertRC(rc);
|
---|
1315 | #endif
|
---|
1316 | }
|
---|
1317 | }
|
---|
1318 | break;
|
---|
1319 | }
|
---|
1320 | case LSILOGIC_REG_DOORBELL:
|
---|
1321 | {
|
---|
1322 | /*
|
---|
1323 | * When the guest writes to this register a real device would set the
|
---|
1324 | * doorbell status bit in the interrupt status register to indicate that the IOP
|
---|
1325 | * has still to process the message.
|
---|
1326 | * The guest needs to wait with posting new messages here until the bit is cleared.
|
---|
1327 | * Because the guest is not continuing execution while we are here we can skip this.
|
---|
1328 | */
|
---|
1329 | if (pThis->enmDoorbellState == LSILOGICDOORBELLSTATE_NOT_IN_USE)
|
---|
1330 | {
|
---|
1331 | uint32_t uFunction = LSILOGIC_REG_DOORBELL_GET_FUNCTION(u32);
|
---|
1332 |
|
---|
1333 | switch (uFunction)
|
---|
1334 | {
|
---|
1335 | case LSILOGIC_DOORBELL_FUNCTION_IO_UNIT_RESET:
|
---|
1336 | case LSILOGIC_DOORBELL_FUNCTION_IOC_MSG_UNIT_RESET:
|
---|
1337 | {
|
---|
1338 | /*
|
---|
1339 | * The I/O unit reset does much more on real hardware like
|
---|
1340 | * reloading the firmware, nothing we need to do here,
|
---|
1341 | * so this is like the IOC message unit reset.
|
---|
1342 | */
|
---|
1343 | pThis->enmState = LSILOGICSTATE_RESET;
|
---|
1344 |
|
---|
1345 | /* Reset interrupt status. */
|
---|
1346 | pThis->uInterruptStatus = 0;
|
---|
1347 | lsilogicUpdateInterrupt(pThis);
|
---|
1348 |
|
---|
1349 | /* Reset the queues. */
|
---|
1350 | pThis->uReplyFreeQueueNextEntryFreeWrite = 0;
|
---|
1351 | pThis->uReplyFreeQueueNextAddressRead = 0;
|
---|
1352 | pThis->uReplyPostQueueNextEntryFreeWrite = 0;
|
---|
1353 | pThis->uReplyPostQueueNextAddressRead = 0;
|
---|
1354 | pThis->uRequestQueueNextEntryFreeWrite = 0;
|
---|
1355 | pThis->uRequestQueueNextAddressRead = 0;
|
---|
1356 |
|
---|
1357 | /* Only the IOC message unit reset transisionts to the ready state. */
|
---|
1358 | if (uFunction == LSILOGIC_DOORBELL_FUNCTION_IOC_MSG_UNIT_RESET)
|
---|
1359 | pThis->enmState = LSILOGICSTATE_READY;
|
---|
1360 | break;
|
---|
1361 | }
|
---|
1362 | case LSILOGIC_DOORBELL_FUNCTION_HANDSHAKE:
|
---|
1363 | {
|
---|
1364 | pThis->cMessage = LSILOGIC_REG_DOORBELL_GET_SIZE(u32);
|
---|
1365 | pThis->iMessage = 0;
|
---|
1366 | AssertMsg(pThis->cMessage <= RT_ELEMENTS(pThis->aMessage),
|
---|
1367 | ("Message doesn't fit into the buffer, cMessage=%u", pThis->cMessage));
|
---|
1368 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_FN_HANDSHAKE;
|
---|
1369 | /* Update the interrupt status to notify the guest that a doorbell function was started. */
|
---|
1370 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
1371 | break;
|
---|
1372 | }
|
---|
1373 | case LSILOGIC_DOORBELL_FUNCTION_REPLY_FRAME_REMOVAL:
|
---|
1374 | {
|
---|
1375 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_RFR_FRAME_COUNT_LOW;
|
---|
1376 | /* Update the interrupt status to notify the guest that a doorbell function was started. */
|
---|
1377 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
1378 | break;
|
---|
1379 | }
|
---|
1380 | default:
|
---|
1381 | AssertMsgFailed(("Unknown function %u to perform\n", uFunction));
|
---|
1382 | }
|
---|
1383 | }
|
---|
1384 | else if (pThis->enmDoorbellState == LSILOGICDOORBELLSTATE_FN_HANDSHAKE)
|
---|
1385 | {
|
---|
1386 | /*
|
---|
1387 | * We are already performing a doorbell function.
|
---|
1388 | * Get the remaining parameters.
|
---|
1389 | */
|
---|
1390 | AssertMsg(pThis->iMessage < RT_ELEMENTS(pThis->aMessage), ("Message is too big to fit into the buffer\n"));
|
---|
1391 | /*
|
---|
1392 | * If the last byte of the message is written, force a switch to R3 because some requests might force
|
---|
1393 | * a reply through the FIFO which cannot be handled in GC or R0.
|
---|
1394 | */
|
---|
1395 | #ifndef IN_RING3
|
---|
1396 | if (pThis->iMessage == pThis->cMessage - 1)
|
---|
1397 | return VINF_IOM_R3_MMIO_WRITE;
|
---|
1398 | #endif
|
---|
1399 | pThis->aMessage[pThis->iMessage++] = u32;
|
---|
1400 | #ifdef IN_RING3
|
---|
1401 | if (pThis->iMessage == pThis->cMessage)
|
---|
1402 | {
|
---|
1403 | int rc = lsilogicR3ProcessMessageRequest(pThis, (PMptMessageHdr)pThis->aMessage, &pThis->ReplyBuffer);
|
---|
1404 | AssertRC(rc);
|
---|
1405 | }
|
---|
1406 | #endif
|
---|
1407 | }
|
---|
1408 | break;
|
---|
1409 | }
|
---|
1410 | case LSILOGIC_REG_HOST_INTR_STATUS:
|
---|
1411 | {
|
---|
1412 | /*
|
---|
1413 | * Clear the bits the guest wants except the system doorbell interrupt and the IO controller
|
---|
1414 | * status bit.
|
---|
1415 | * The former bit is always cleared no matter what the guest writes to the register and
|
---|
1416 | * the latter one is read only.
|
---|
1417 | */
|
---|
1418 | ASMAtomicAndU32(&pThis->uInterruptStatus, ~LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
1419 |
|
---|
1420 | /*
|
---|
1421 | * Check if there is still a doorbell function in progress. Set the
|
---|
1422 | * system doorbell interrupt bit again if it is.
|
---|
1423 | * We do not use lsilogicSetInterrupt here because the interrupt status
|
---|
1424 | * is updated afterwards anyway.
|
---|
1425 | */
|
---|
1426 | if ( (pThis->enmDoorbellState == LSILOGICDOORBELLSTATE_FN_HANDSHAKE)
|
---|
1427 | && (pThis->cMessage == pThis->iMessage))
|
---|
1428 | {
|
---|
1429 | if (pThis->uNextReplyEntryRead == pThis->cReplySize)
|
---|
1430 | {
|
---|
1431 | /* Reply finished. Reset doorbell in progress status. */
|
---|
1432 | Log(("%s: Doorbell function finished\n", __FUNCTION__));
|
---|
1433 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_NOT_IN_USE;
|
---|
1434 | }
|
---|
1435 | ASMAtomicOrU32(&pThis->uInterruptStatus, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
1436 | }
|
---|
1437 | else if ( pThis->enmDoorbellState != LSILOGICDOORBELLSTATE_NOT_IN_USE
|
---|
1438 | && pThis->enmDoorbellState != LSILOGICDOORBELLSTATE_FN_HANDSHAKE)
|
---|
1439 | {
|
---|
1440 | /* Reply frame removal, check whether the reply free queue is empty. */
|
---|
1441 | if ( pThis->uReplyFreeQueueNextAddressRead == pThis->uReplyFreeQueueNextEntryFreeWrite
|
---|
1442 | && pThis->enmDoorbellState == LSILOGICDOORBELLSTATE_RFR_NEXT_FRAME_LOW)
|
---|
1443 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_NOT_IN_USE;
|
---|
1444 | ASMAtomicOrU32(&pThis->uInterruptStatus, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
1445 | }
|
---|
1446 |
|
---|
1447 | lsilogicUpdateInterrupt(pThis);
|
---|
1448 | break;
|
---|
1449 | }
|
---|
1450 | case LSILOGIC_REG_HOST_INTR_MASK:
|
---|
1451 | {
|
---|
1452 | ASMAtomicWriteU32(&pThis->uInterruptMask, u32 & LSILOGIC_REG_HOST_INTR_MASK_W_MASK);
|
---|
1453 | lsilogicUpdateInterrupt(pThis);
|
---|
1454 | break;
|
---|
1455 | }
|
---|
1456 | case LSILOGIC_REG_WRITE_SEQUENCE:
|
---|
1457 | {
|
---|
1458 | if (pThis->fDiagnosticEnabled)
|
---|
1459 | {
|
---|
1460 | /* Any value will cause a reset and disabling access. */
|
---|
1461 | pThis->fDiagnosticEnabled = false;
|
---|
1462 | pThis->iDiagnosticAccess = 0;
|
---|
1463 | pThis->fDiagRegsEnabled = false;
|
---|
1464 | }
|
---|
1465 | else if ((u32 & 0xf) == g_lsilogicDiagnosticAccess[pThis->iDiagnosticAccess])
|
---|
1466 | {
|
---|
1467 | pThis->iDiagnosticAccess++;
|
---|
1468 | if (pThis->iDiagnosticAccess == RT_ELEMENTS(g_lsilogicDiagnosticAccess))
|
---|
1469 | {
|
---|
1470 | /*
|
---|
1471 | * Key sequence successfully written. Enable access to diagnostic
|
---|
1472 | * memory and register.
|
---|
1473 | */
|
---|
1474 | pThis->fDiagnosticEnabled = true;
|
---|
1475 | }
|
---|
1476 | }
|
---|
1477 | else
|
---|
1478 | {
|
---|
1479 | /* Wrong value written - reset to beginning. */
|
---|
1480 | pThis->iDiagnosticAccess = 0;
|
---|
1481 | }
|
---|
1482 | break;
|
---|
1483 | }
|
---|
1484 | case LSILOGIC_REG_HOST_DIAGNOSTIC:
|
---|
1485 | {
|
---|
1486 | if (pThis->fDiagnosticEnabled)
|
---|
1487 | {
|
---|
1488 | #ifndef IN_RING3
|
---|
1489 | return VINF_IOM_R3_MMIO_WRITE;
|
---|
1490 | #else
|
---|
1491 | if (u32 & LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_ADAPTER)
|
---|
1492 | lsilogicR3HardReset(pThis);
|
---|
1493 | else if (u32 & LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_RW_ENABLE)
|
---|
1494 | pThis->fDiagRegsEnabled = true;
|
---|
1495 | #endif
|
---|
1496 | }
|
---|
1497 | break;
|
---|
1498 | }
|
---|
1499 | case LSILOGIC_REG_DIAG_RW_DATA:
|
---|
1500 | {
|
---|
1501 | if (pThis->fDiagRegsEnabled)
|
---|
1502 | {
|
---|
1503 | #ifndef IN_RING3
|
---|
1504 | return VINF_IOM_R3_MMIO_WRITE;
|
---|
1505 | #else
|
---|
1506 | lsilogicR3DiagRegDataWrite(pThis, u32);
|
---|
1507 | #endif
|
---|
1508 | }
|
---|
1509 | break;
|
---|
1510 | }
|
---|
1511 | case LSILOGIC_REG_DIAG_RW_ADDRESS:
|
---|
1512 | {
|
---|
1513 | if (pThis->fDiagRegsEnabled)
|
---|
1514 | {
|
---|
1515 | #ifndef IN_RING3
|
---|
1516 | return VINF_IOM_R3_MMIO_WRITE;
|
---|
1517 | #else
|
---|
1518 | lsilogicR3DiagRegAddressWrite(pThis, u32);
|
---|
1519 | #endif
|
---|
1520 | }
|
---|
1521 | break;
|
---|
1522 | }
|
---|
1523 | default: /* Ignore. */
|
---|
1524 | {
|
---|
1525 | break;
|
---|
1526 | }
|
---|
1527 | }
|
---|
1528 | return VINF_SUCCESS;
|
---|
1529 | }
|
---|
1530 |
|
---|
1531 | /**
|
---|
1532 | * Reads the content of a register at a given offset.
|
---|
1533 | *
|
---|
1534 | * @returns VBox status code.
|
---|
1535 | * @param pThis Pointer to the LsiLogic device state.
|
---|
1536 | * @param offReg Offset of the register to read.
|
---|
1537 | * @param pu32 Where to store the content of the register.
|
---|
1538 | */
|
---|
1539 | static int lsilogicRegisterRead(PLSILOGICSCSI pThis, uint32_t offReg, uint32_t *pu32)
|
---|
1540 | {
|
---|
1541 | int rc = VINF_SUCCESS;
|
---|
1542 | uint32_t u32 = 0;
|
---|
1543 | Assert(!(offReg & 3));
|
---|
1544 |
|
---|
1545 | /* Align to a 4 byte offset. */
|
---|
1546 | switch (offReg)
|
---|
1547 | {
|
---|
1548 | case LSILOGIC_REG_REPLY_QUEUE:
|
---|
1549 | {
|
---|
1550 | rc = PDMCritSectEnter(&pThis->ReplyPostQueueCritSect, VINF_IOM_R3_MMIO_READ);
|
---|
1551 | if (rc != VINF_SUCCESS)
|
---|
1552 | break;
|
---|
1553 |
|
---|
1554 | uint32_t idxReplyPostQueueWrite = ASMAtomicUoReadU32(&pThis->uReplyPostQueueNextEntryFreeWrite);
|
---|
1555 | uint32_t idxReplyPostQueueRead = ASMAtomicUoReadU32(&pThis->uReplyPostQueueNextAddressRead);
|
---|
1556 |
|
---|
1557 | if (idxReplyPostQueueWrite != idxReplyPostQueueRead)
|
---|
1558 | {
|
---|
1559 | u32 = pThis->CTX_SUFF(pReplyPostQueueBase)[idxReplyPostQueueRead];
|
---|
1560 | idxReplyPostQueueRead++;
|
---|
1561 | idxReplyPostQueueRead %= pThis->cReplyQueueEntries;
|
---|
1562 | ASMAtomicWriteU32(&pThis->uReplyPostQueueNextAddressRead, idxReplyPostQueueRead);
|
---|
1563 | }
|
---|
1564 | else
|
---|
1565 | {
|
---|
1566 | /* The reply post queue is empty. Reset interrupt. */
|
---|
1567 | u32 = UINT32_C(0xffffffff);
|
---|
1568 | lsilogicClearInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_REPLY_INTR);
|
---|
1569 | }
|
---|
1570 | PDMCritSectLeave(&pThis->ReplyPostQueueCritSect);
|
---|
1571 |
|
---|
1572 | Log(("%s: Returning address %#x\n", __FUNCTION__, u32));
|
---|
1573 | break;
|
---|
1574 | }
|
---|
1575 | case LSILOGIC_REG_DOORBELL:
|
---|
1576 | {
|
---|
1577 | u32 = LSILOGIC_REG_DOORBELL_SET_STATE(pThis->enmState);
|
---|
1578 | u32 |= LSILOGIC_REG_DOORBELL_SET_USED(pThis->enmDoorbellState);
|
---|
1579 | u32 |= LSILOGIC_REG_DOORBELL_SET_WHOINIT(pThis->enmWhoInit);
|
---|
1580 | /*
|
---|
1581 | * If there is a doorbell function in progress we pass the return value
|
---|
1582 | * instead of the status code. We transfer 16bit of the reply
|
---|
1583 | * during one read.
|
---|
1584 | */
|
---|
1585 | switch (pThis->enmDoorbellState)
|
---|
1586 | {
|
---|
1587 | case LSILOGICDOORBELLSTATE_NOT_IN_USE:
|
---|
1588 | /* We return the status code of the I/O controller. */
|
---|
1589 | u32 |= pThis->u16IOCFaultCode;
|
---|
1590 | break;
|
---|
1591 | case LSILOGICDOORBELLSTATE_FN_HANDSHAKE:
|
---|
1592 | /* Return next 16bit value. */
|
---|
1593 | u32 |= pThis->ReplyBuffer.au16Reply[pThis->uNextReplyEntryRead++];
|
---|
1594 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
1595 | break;
|
---|
1596 | case LSILOGICDOORBELLSTATE_RFR_FRAME_COUNT_LOW:
|
---|
1597 | {
|
---|
1598 | uint32_t cReplyFrames = lsilogicReplyFreeQueueGetFrameCount(pThis);
|
---|
1599 |
|
---|
1600 | u32 |= cReplyFrames & UINT32_C(0xffff);
|
---|
1601 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_RFR_FRAME_COUNT_HIGH;
|
---|
1602 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
1603 | break;
|
---|
1604 | }
|
---|
1605 | case LSILOGICDOORBELLSTATE_RFR_FRAME_COUNT_HIGH:
|
---|
1606 | {
|
---|
1607 | uint32_t cReplyFrames = lsilogicReplyFreeQueueGetFrameCount(pThis);
|
---|
1608 |
|
---|
1609 | u32 |= cReplyFrames >> 16;
|
---|
1610 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_RFR_NEXT_FRAME_LOW;
|
---|
1611 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
1612 | break;
|
---|
1613 | }
|
---|
1614 | case LSILOGICDOORBELLSTATE_RFR_NEXT_FRAME_LOW:
|
---|
1615 | if (pThis->uReplyFreeQueueNextEntryFreeWrite != pThis->uReplyFreeQueueNextAddressRead)
|
---|
1616 | {
|
---|
1617 | u32 |= pThis->CTX_SUFF(pReplyFreeQueueBase)[pThis->uReplyFreeQueueNextAddressRead] & UINT32_C(0xffff);
|
---|
1618 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_RFR_NEXT_FRAME_HIGH;
|
---|
1619 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
1620 | }
|
---|
1621 | break;
|
---|
1622 | case LSILOGICDOORBELLSTATE_RFR_NEXT_FRAME_HIGH:
|
---|
1623 | u32 |= pThis->CTX_SUFF(pReplyFreeQueueBase)[pThis->uReplyFreeQueueNextAddressRead] >> 16;
|
---|
1624 | pThis->uReplyFreeQueueNextAddressRead++;
|
---|
1625 | pThis->uReplyFreeQueueNextAddressRead %= pThis->cReplyQueueEntries;
|
---|
1626 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_RFR_NEXT_FRAME_LOW;
|
---|
1627 | lsilogicSetInterrupt(pThis, LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL);
|
---|
1628 | break;
|
---|
1629 | default:
|
---|
1630 | AssertMsgFailed(("Invalid doorbell state %d\n", pThis->enmDoorbellState));
|
---|
1631 | }
|
---|
1632 |
|
---|
1633 | break;
|
---|
1634 | }
|
---|
1635 | case LSILOGIC_REG_HOST_INTR_STATUS:
|
---|
1636 | {
|
---|
1637 | u32 = ASMAtomicReadU32(&pThis->uInterruptStatus);
|
---|
1638 | break;
|
---|
1639 | }
|
---|
1640 | case LSILOGIC_REG_HOST_INTR_MASK:
|
---|
1641 | {
|
---|
1642 | u32 = ASMAtomicReadU32(&pThis->uInterruptMask);
|
---|
1643 | break;
|
---|
1644 | }
|
---|
1645 | case LSILOGIC_REG_HOST_DIAGNOSTIC:
|
---|
1646 | {
|
---|
1647 | if (pThis->fDiagnosticEnabled)
|
---|
1648 | u32 |= LSILOGIC_REG_HOST_DIAGNOSTIC_DRWE;
|
---|
1649 | if (pThis->fDiagRegsEnabled)
|
---|
1650 | u32 |= LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_RW_ENABLE;
|
---|
1651 | break;
|
---|
1652 | }
|
---|
1653 | case LSILOGIC_REG_DIAG_RW_DATA:
|
---|
1654 | {
|
---|
1655 | if (pThis->fDiagRegsEnabled)
|
---|
1656 | {
|
---|
1657 | #ifndef IN_RING3
|
---|
1658 | return VINF_IOM_R3_MMIO_READ;
|
---|
1659 | #else
|
---|
1660 | lsilogicR3DiagRegDataRead(pThis, &u32);
|
---|
1661 | #endif
|
---|
1662 | }
|
---|
1663 | }
|
---|
1664 | case LSILOGIC_REG_DIAG_RW_ADDRESS:
|
---|
1665 | {
|
---|
1666 | if (pThis->fDiagRegsEnabled)
|
---|
1667 | {
|
---|
1668 | #ifndef IN_RING3
|
---|
1669 | return VINF_IOM_R3_MMIO_READ;
|
---|
1670 | #else
|
---|
1671 | lsilogicR3DiagRegAddressRead(pThis, &u32);
|
---|
1672 | #endif
|
---|
1673 | }
|
---|
1674 | }
|
---|
1675 | case LSILOGIC_REG_TEST_BASE_ADDRESS: /* The spec doesn't say anything about these registers, so we just ignore them */
|
---|
1676 | default: /* Ignore. */
|
---|
1677 | {
|
---|
1678 | /** @todo LSILOGIC_REG_DIAG_* should return all F's when accessed by MMIO. We
|
---|
1679 | * return 0. Likely to apply to undefined offsets as well. */
|
---|
1680 | break;
|
---|
1681 | }
|
---|
1682 | }
|
---|
1683 |
|
---|
1684 | *pu32 = u32;
|
---|
1685 | LogFlowFunc(("pThis=%#p offReg=%#x u32=%#x\n", pThis, offReg, u32));
|
---|
1686 | return rc;
|
---|
1687 | }
|
---|
1688 |
|
---|
1689 | /**
|
---|
1690 | * @callback_method_impl{FNIOMIOPORTOUT}
|
---|
1691 | */
|
---|
1692 | PDMBOTHCBDECL(int) lsilogicIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
|
---|
1693 | {
|
---|
1694 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
1695 | uint32_t offReg = uPort - pThis->IOPortBase;
|
---|
1696 | int rc;
|
---|
1697 | RT_NOREF2(pvUser, cb);
|
---|
1698 |
|
---|
1699 | if (!(offReg & 3))
|
---|
1700 | {
|
---|
1701 | rc = lsilogicRegisterWrite(pThis, offReg, u32);
|
---|
1702 | if (rc == VINF_IOM_R3_MMIO_WRITE)
|
---|
1703 | rc = VINF_IOM_R3_IOPORT_WRITE;
|
---|
1704 | }
|
---|
1705 | else
|
---|
1706 | {
|
---|
1707 | Log(("lsilogicIOPortWrite: Ignoring misaligned write - offReg=%#x u32=%#x cb=%#x\n", offReg, u32, cb));
|
---|
1708 | rc = VINF_SUCCESS;
|
---|
1709 | }
|
---|
1710 |
|
---|
1711 | return rc;
|
---|
1712 | }
|
---|
1713 |
|
---|
1714 | /**
|
---|
1715 | * @callback_method_impl{FNIOMIOPORTIN}
|
---|
1716 | */
|
---|
1717 | PDMBOTHCBDECL(int) lsilogicIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb)
|
---|
1718 | {
|
---|
1719 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
1720 | uint32_t offReg = uPort - pThis->IOPortBase;
|
---|
1721 | RT_NOREF_PV(pvUser);
|
---|
1722 | RT_NOREF_PV(cb);
|
---|
1723 |
|
---|
1724 | int rc = lsilogicRegisterRead(pThis, offReg & ~(uint32_t)3, pu32);
|
---|
1725 | if (rc == VINF_IOM_R3_MMIO_READ)
|
---|
1726 | rc = VINF_IOM_R3_IOPORT_READ;
|
---|
1727 |
|
---|
1728 | return rc;
|
---|
1729 | }
|
---|
1730 |
|
---|
1731 | /**
|
---|
1732 | * @callback_method_impl{FNIOMMMIOWRITE}
|
---|
1733 | */
|
---|
1734 | PDMBOTHCBDECL(int) lsilogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
|
---|
1735 | {
|
---|
1736 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
1737 | uint32_t offReg = GCPhysAddr - pThis->GCPhysMMIOBase;
|
---|
1738 | uint32_t u32;
|
---|
1739 | int rc;
|
---|
1740 | RT_NOREF_PV(pvUser);
|
---|
1741 |
|
---|
1742 | /* See comments in lsilogicR3Map regarding size and alignment. */
|
---|
1743 | if (cb == 4)
|
---|
1744 | u32 = *(uint32_t const *)pv;
|
---|
1745 | else
|
---|
1746 | {
|
---|
1747 | if (cb > 4)
|
---|
1748 | u32 = *(uint32_t const *)pv;
|
---|
1749 | else if (cb >= 2)
|
---|
1750 | u32 = *(uint16_t const *)pv;
|
---|
1751 | else
|
---|
1752 | u32 = *(uint8_t const *)pv;
|
---|
1753 | Log(("lsilogicMMIOWrite: Non-DWORD write access - offReg=%#x u32=%#x cb=%#x\n", offReg, u32, cb));
|
---|
1754 | }
|
---|
1755 |
|
---|
1756 | if (!(offReg & 3))
|
---|
1757 | rc = lsilogicRegisterWrite(pThis, offReg, u32);
|
---|
1758 | else
|
---|
1759 | {
|
---|
1760 | Log(("lsilogicIOPortWrite: Ignoring misaligned write - offReg=%#x u32=%#x cb=%#x\n", offReg, u32, cb));
|
---|
1761 | rc = VINF_SUCCESS;
|
---|
1762 | }
|
---|
1763 | return rc;
|
---|
1764 | }
|
---|
1765 |
|
---|
1766 | /**
|
---|
1767 | * @callback_method_impl{FNIOMMMIOREAD}
|
---|
1768 | */
|
---|
1769 | PDMBOTHCBDECL(int) lsilogicMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
|
---|
1770 | {
|
---|
1771 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
1772 | uint32_t offReg = GCPhysAddr - pThis->GCPhysMMIOBase;
|
---|
1773 | Assert(!(offReg & 3)); Assert(cb == 4);
|
---|
1774 | RT_NOREF2(pvUser, cb);
|
---|
1775 |
|
---|
1776 | return lsilogicRegisterRead(pThis, offReg, (uint32_t *)pv);
|
---|
1777 | }
|
---|
1778 |
|
---|
1779 | PDMBOTHCBDECL(int) lsilogicDiagnosticWrite(PPDMDEVINS pDevIns, void *pvUser,
|
---|
1780 | RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
|
---|
1781 | {
|
---|
1782 | #ifdef LOG_ENABLED
|
---|
1783 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
1784 | LogFlowFunc(("pThis=%#p GCPhysAddr=%RGp pv=%#p{%.*Rhxs} cb=%u\n", pThis, GCPhysAddr, pv, cb, pv, cb));
|
---|
1785 | #endif
|
---|
1786 |
|
---|
1787 | RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
|
---|
1788 | return VINF_SUCCESS;
|
---|
1789 | }
|
---|
1790 |
|
---|
1791 | PDMBOTHCBDECL(int) lsilogicDiagnosticRead(PPDMDEVINS pDevIns, void *pvUser,
|
---|
1792 | RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
|
---|
1793 | {
|
---|
1794 | #ifdef LOG_ENABLED
|
---|
1795 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
1796 | LogFlowFunc(("pThis=%#p GCPhysAddr=%RGp pv=%#p{%.*Rhxs} cb=%u\n", pThis, GCPhysAddr, pv, cb, pv, cb));
|
---|
1797 | #endif
|
---|
1798 |
|
---|
1799 | RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
|
---|
1800 | return VINF_SUCCESS;
|
---|
1801 | }
|
---|
1802 |
|
---|
1803 | #ifdef IN_RING3
|
---|
1804 |
|
---|
1805 | # ifdef LOG_ENABLED
|
---|
1806 | /**
|
---|
1807 | * Dump an SG entry.
|
---|
1808 | *
|
---|
1809 | * @returns nothing.
|
---|
1810 | * @param pSGEntry Pointer to the SG entry to dump
|
---|
1811 | */
|
---|
1812 | static void lsilogicDumpSGEntry(PMptSGEntryUnion pSGEntry)
|
---|
1813 | {
|
---|
1814 | if (LogIsEnabled())
|
---|
1815 | {
|
---|
1816 | switch (pSGEntry->Simple32.u2ElementType)
|
---|
1817 | {
|
---|
1818 | case MPTSGENTRYTYPE_SIMPLE:
|
---|
1819 | {
|
---|
1820 | Log(("%s: Dumping info for SIMPLE SG entry:\n", __FUNCTION__));
|
---|
1821 | Log(("%s: u24Length=%u\n", __FUNCTION__, pSGEntry->Simple32.u24Length));
|
---|
1822 | Log(("%s: fEndOfList=%d\n", __FUNCTION__, pSGEntry->Simple32.fEndOfList));
|
---|
1823 | Log(("%s: f64BitAddress=%d\n", __FUNCTION__, pSGEntry->Simple32.f64BitAddress));
|
---|
1824 | Log(("%s: fBufferContainsData=%d\n", __FUNCTION__, pSGEntry->Simple32.fBufferContainsData));
|
---|
1825 | Log(("%s: fLocalAddress=%d\n", __FUNCTION__, pSGEntry->Simple32.fLocalAddress));
|
---|
1826 | Log(("%s: fEndOfBuffer=%d\n", __FUNCTION__, pSGEntry->Simple32.fEndOfBuffer));
|
---|
1827 | Log(("%s: fLastElement=%d\n", __FUNCTION__, pSGEntry->Simple32.fLastElement));
|
---|
1828 | Log(("%s: u32DataBufferAddressLow=%u\n", __FUNCTION__, pSGEntry->Simple32.u32DataBufferAddressLow));
|
---|
1829 | if (pSGEntry->Simple32.f64BitAddress)
|
---|
1830 | {
|
---|
1831 | Log(("%s: u32DataBufferAddressHigh=%u\n", __FUNCTION__, pSGEntry->Simple64.u32DataBufferAddressHigh));
|
---|
1832 | Log(("%s: GCDataBufferAddress=%RGp\n", __FUNCTION__,
|
---|
1833 | ((uint64_t)pSGEntry->Simple64.u32DataBufferAddressHigh << 32)
|
---|
1834 | | pSGEntry->Simple64.u32DataBufferAddressLow));
|
---|
1835 | }
|
---|
1836 | else
|
---|
1837 | Log(("%s: GCDataBufferAddress=%RGp\n", __FUNCTION__, pSGEntry->Simple32.u32DataBufferAddressLow));
|
---|
1838 |
|
---|
1839 | break;
|
---|
1840 | }
|
---|
1841 | case MPTSGENTRYTYPE_CHAIN:
|
---|
1842 | {
|
---|
1843 | Log(("%s: Dumping info for CHAIN SG entry:\n", __FUNCTION__));
|
---|
1844 | Log(("%s: u16Length=%u\n", __FUNCTION__, pSGEntry->Chain.u16Length));
|
---|
1845 | Log(("%s: u8NExtChainOffset=%d\n", __FUNCTION__, pSGEntry->Chain.u8NextChainOffset));
|
---|
1846 | Log(("%s: f64BitAddress=%d\n", __FUNCTION__, pSGEntry->Chain.f64BitAddress));
|
---|
1847 | Log(("%s: fLocalAddress=%d\n", __FUNCTION__, pSGEntry->Chain.fLocalAddress));
|
---|
1848 | Log(("%s: u32SegmentAddressLow=%u\n", __FUNCTION__, pSGEntry->Chain.u32SegmentAddressLow));
|
---|
1849 | Log(("%s: u32SegmentAddressHigh=%u\n", __FUNCTION__, pSGEntry->Chain.u32SegmentAddressHigh));
|
---|
1850 | if (pSGEntry->Chain.f64BitAddress)
|
---|
1851 | Log(("%s: GCSegmentAddress=%RGp\n", __FUNCTION__,
|
---|
1852 | ((uint64_t)pSGEntry->Chain.u32SegmentAddressHigh << 32) | pSGEntry->Chain.u32SegmentAddressLow));
|
---|
1853 | else
|
---|
1854 | Log(("%s: GCSegmentAddress=%RGp\n", __FUNCTION__, pSGEntry->Chain.u32SegmentAddressLow));
|
---|
1855 | break;
|
---|
1856 | }
|
---|
1857 | }
|
---|
1858 | }
|
---|
1859 | }
|
---|
1860 | # endif /* LOG_ENABLED */
|
---|
1861 |
|
---|
1862 | /**
|
---|
1863 | * Copy from guest to host memory worker.
|
---|
1864 | *
|
---|
1865 | * @copydoc LSILOGICR3MEMCOPYCALLBACK
|
---|
1866 | */
|
---|
1867 | static DECLCALLBACK(void) lsilogicR3CopyBufferFromGuestWorker(PLSILOGICSCSI pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
|
---|
1868 | size_t cbCopy, size_t *pcbSkip)
|
---|
1869 | {
|
---|
1870 | size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
|
---|
1871 | cbCopy -= cbSkipped;
|
---|
1872 | GCPhys += cbSkipped;
|
---|
1873 | *pcbSkip -= cbSkipped;
|
---|
1874 |
|
---|
1875 | while (cbCopy)
|
---|
1876 | {
|
---|
1877 | size_t cbSeg = cbCopy;
|
---|
1878 | void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
|
---|
1879 |
|
---|
1880 | AssertPtr(pvSeg);
|
---|
1881 | PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
|
---|
1882 | GCPhys += cbSeg;
|
---|
1883 | cbCopy -= cbSeg;
|
---|
1884 | }
|
---|
1885 | }
|
---|
1886 |
|
---|
1887 | /**
|
---|
1888 | * Copy from host to guest memory worker.
|
---|
1889 | *
|
---|
1890 | * @copydoc LSILOGICR3MEMCOPYCALLBACK
|
---|
1891 | */
|
---|
1892 | static DECLCALLBACK(void) lsilogicR3CopyBufferToGuestWorker(PLSILOGICSCSI pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
|
---|
1893 | size_t cbCopy, size_t *pcbSkip)
|
---|
1894 | {
|
---|
1895 | size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
|
---|
1896 | cbCopy -= cbSkipped;
|
---|
1897 | GCPhys += cbSkipped;
|
---|
1898 | *pcbSkip -= cbSkipped;
|
---|
1899 |
|
---|
1900 | while (cbCopy)
|
---|
1901 | {
|
---|
1902 | size_t cbSeg = cbCopy;
|
---|
1903 | void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
|
---|
1904 |
|
---|
1905 | AssertPtr(pvSeg);
|
---|
1906 | PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
|
---|
1907 | GCPhys += cbSeg;
|
---|
1908 | cbCopy -= cbSeg;
|
---|
1909 | }
|
---|
1910 | }
|
---|
1911 |
|
---|
1912 | /**
|
---|
1913 | * Walks the guest S/G buffer calling the given copy worker for every buffer.
|
---|
1914 | *
|
---|
1915 | * @returns The amout of bytes actually copied.
|
---|
1916 | * @param pThis Pointer to the LsiLogic device state.
|
---|
1917 | * @param pLsiReq LSI request state.
|
---|
1918 | * @param pfnCopyWorker The copy method to apply for each guest buffer.
|
---|
1919 | * @param pSgBuf The host S/G buffer.
|
---|
1920 | * @param cbSkip How many bytes to skip in advance before starting to copy.
|
---|
1921 | * @param cbCopy How many bytes to copy.
|
---|
1922 | */
|
---|
1923 | static size_t lsilogicSgBufWalker(PLSILOGICSCSI pThis, PLSILOGICREQ pLsiReq,
|
---|
1924 | PLSILOGICR3MEMCOPYCALLBACK pfnCopyWorker,
|
---|
1925 | PRTSGBUF pSgBuf, size_t cbSkip, size_t cbCopy)
|
---|
1926 | {
|
---|
1927 | bool fEndOfList = false;
|
---|
1928 | RTGCPHYS GCPhysSgEntryNext = pLsiReq->GCPhysSgStart;
|
---|
1929 | RTGCPHYS GCPhysSegmentStart = pLsiReq->GCPhysSgStart;
|
---|
1930 | uint32_t cChainOffsetNext = pLsiReq->cChainOffset;
|
---|
1931 | PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
|
---|
1932 | size_t cbCopied = 0;
|
---|
1933 |
|
---|
1934 | /*
|
---|
1935 | * Add the amount to skip to the host buffer size to avoid a
|
---|
1936 | * few conditionals later on.
|
---|
1937 | */
|
---|
1938 | cbCopy += cbSkip;
|
---|
1939 |
|
---|
1940 | /* Go through the list until we reach the end. */
|
---|
1941 | while ( !fEndOfList
|
---|
1942 | && cbCopy)
|
---|
1943 | {
|
---|
1944 | bool fEndOfSegment = false;
|
---|
1945 |
|
---|
1946 | while ( !fEndOfSegment
|
---|
1947 | && cbCopy)
|
---|
1948 | {
|
---|
1949 | MptSGEntryUnion SGEntry;
|
---|
1950 |
|
---|
1951 | Log(("%s: Reading SG entry from %RGp\n", __FUNCTION__, GCPhysSgEntryNext));
|
---|
1952 |
|
---|
1953 | /* Read the entry. */
|
---|
1954 | PDMDevHlpPhysRead(pDevIns, GCPhysSgEntryNext, &SGEntry, sizeof(MptSGEntryUnion));
|
---|
1955 |
|
---|
1956 | # ifdef LOG_ENABLED
|
---|
1957 | lsilogicDumpSGEntry(&SGEntry);
|
---|
1958 | # endif
|
---|
1959 |
|
---|
1960 | AssertMsg(SGEntry.Simple32.u2ElementType == MPTSGENTRYTYPE_SIMPLE, ("Invalid SG entry type\n"));
|
---|
1961 |
|
---|
1962 | /* Check if this is a zero element and abort. */
|
---|
1963 | if ( !SGEntry.Simple32.u24Length
|
---|
1964 | && SGEntry.Simple32.fEndOfList
|
---|
1965 | && SGEntry.Simple32.fEndOfBuffer)
|
---|
1966 | return cbCopied - RT_MIN(cbSkip, cbCopied);
|
---|
1967 |
|
---|
1968 | uint32_t cbCopyThis = SGEntry.Simple32.u24Length;
|
---|
1969 | RTGCPHYS GCPhysAddrDataBuffer = SGEntry.Simple32.u32DataBufferAddressLow;
|
---|
1970 |
|
---|
1971 | if (SGEntry.Simple32.f64BitAddress)
|
---|
1972 | {
|
---|
1973 | GCPhysAddrDataBuffer |= ((uint64_t)SGEntry.Simple64.u32DataBufferAddressHigh) << 32;
|
---|
1974 | GCPhysSgEntryNext += sizeof(MptSGEntrySimple64);
|
---|
1975 | }
|
---|
1976 | else
|
---|
1977 | GCPhysSgEntryNext += sizeof(MptSGEntrySimple32);
|
---|
1978 |
|
---|
1979 | pfnCopyWorker(pThis, GCPhysAddrDataBuffer, pSgBuf, cbCopyThis, &cbSkip);
|
---|
1980 | cbCopy -= cbCopyThis;
|
---|
1981 | cbCopied += cbCopyThis;
|
---|
1982 |
|
---|
1983 | /* Check if we reached the end of the list. */
|
---|
1984 | if (SGEntry.Simple32.fEndOfList)
|
---|
1985 | {
|
---|
1986 | /* We finished. */
|
---|
1987 | fEndOfSegment = true;
|
---|
1988 | fEndOfList = true;
|
---|
1989 | }
|
---|
1990 | else if (SGEntry.Simple32.fLastElement)
|
---|
1991 | fEndOfSegment = true;
|
---|
1992 | } /* while (!fEndOfSegment) */
|
---|
1993 |
|
---|
1994 | /* Get next chain element. */
|
---|
1995 | if (cChainOffsetNext)
|
---|
1996 | {
|
---|
1997 | MptSGEntryChain SGEntryChain;
|
---|
1998 |
|
---|
1999 | PDMDevHlpPhysRead(pDevIns, GCPhysSegmentStart + cChainOffsetNext, &SGEntryChain, sizeof(MptSGEntryChain));
|
---|
2000 |
|
---|
2001 | AssertMsg(SGEntryChain.u2ElementType == MPTSGENTRYTYPE_CHAIN, ("Invalid SG entry type\n"));
|
---|
2002 |
|
---|
2003 | /* Set the next address now. */
|
---|
2004 | GCPhysSgEntryNext = SGEntryChain.u32SegmentAddressLow;
|
---|
2005 | if (SGEntryChain.f64BitAddress)
|
---|
2006 | GCPhysSgEntryNext |= ((uint64_t)SGEntryChain.u32SegmentAddressHigh) << 32;
|
---|
2007 |
|
---|
2008 | GCPhysSegmentStart = GCPhysSgEntryNext;
|
---|
2009 | cChainOffsetNext = SGEntryChain.u8NextChainOffset * sizeof(uint32_t);
|
---|
2010 | }
|
---|
2011 | } /* while (!fEndOfList) */
|
---|
2012 |
|
---|
2013 | return cbCopied - RT_MIN(cbSkip, cbCopied);
|
---|
2014 | }
|
---|
2015 |
|
---|
2016 | /**
|
---|
2017 | * Copies a data buffer into the S/G buffer set up by the guest.
|
---|
2018 | *
|
---|
2019 | * @returns Amount of bytes copied to the guest.
|
---|
2020 | * @param pThis The LsiLogic controller device instance.
|
---|
2021 | * @param pReq Request structure.
|
---|
2022 | * @param pSgBuf The S/G buffer to copy from.
|
---|
2023 | * @param cbSkip How many bytes to skip in advance before starting to copy.
|
---|
2024 | * @param cbCopy How many bytes to copy.
|
---|
2025 | */
|
---|
2026 | static size_t lsilogicR3CopySgBufToGuest(PLSILOGICSCSI pThis, PLSILOGICREQ pReq, PRTSGBUF pSgBuf,
|
---|
2027 | size_t cbSkip, size_t cbCopy)
|
---|
2028 | {
|
---|
2029 | return lsilogicSgBufWalker(pThis, pReq, lsilogicR3CopyBufferToGuestWorker,
|
---|
2030 | pSgBuf, cbSkip, cbCopy);
|
---|
2031 | }
|
---|
2032 |
|
---|
2033 | /**
|
---|
2034 | * Copies the guest S/G buffer into a host data buffer.
|
---|
2035 | *
|
---|
2036 | * @returns Amount of bytes copied from the guest.
|
---|
2037 | * @param pThis The LsiLogic controller device instance.
|
---|
2038 | * @param pReq Request structure.
|
---|
2039 | * @param pSgBuf The S/G buffer to copy into.
|
---|
2040 | * @param cbSkip How many bytes to skip in advance before starting to copy.
|
---|
2041 | * @param cbCopy How many bytes to copy.
|
---|
2042 | */
|
---|
2043 | static size_t lsilogicR3CopySgBufFromGuest(PLSILOGICSCSI pThis, PLSILOGICREQ pReq, PRTSGBUF pSgBuf,
|
---|
2044 | size_t cbSkip, size_t cbCopy)
|
---|
2045 | {
|
---|
2046 | return lsilogicSgBufWalker(pThis, pReq, lsilogicR3CopyBufferFromGuestWorker,
|
---|
2047 | pSgBuf, cbSkip, cbCopy);
|
---|
2048 | }
|
---|
2049 |
|
---|
2050 | #if 0 /* unused */
|
---|
2051 | /**
|
---|
2052 | * Copy a simple memory buffer to the guest memory buffer.
|
---|
2053 | *
|
---|
2054 | * @returns Amount of bytes copied to the guest.
|
---|
2055 | * @param pThis The LsiLogic controller device instance.
|
---|
2056 | * @param pReq Request structure.
|
---|
2057 | * @param pvSrc The buffer to copy from.
|
---|
2058 | * @param cbSrc How many bytes to copy.
|
---|
2059 | * @param cbSkip How many bytes to skip initially.
|
---|
2060 | */
|
---|
2061 | static size_t lsilogicR3CopyBufferToGuest(PLSILOGICSCSI pThis, PLSILOGICREQ pReq, const void *pvSrc,
|
---|
2062 | size_t cbSrc, size_t cbSkip)
|
---|
2063 | {
|
---|
2064 | RTSGSEG Seg;
|
---|
2065 | RTSGBUF SgBuf;
|
---|
2066 | Seg.pvSeg = (void *)pvSrc;
|
---|
2067 | Seg.cbSeg = cbSrc;
|
---|
2068 | RTSgBufInit(&SgBuf, &Seg, 1);
|
---|
2069 | return lsilogicR3CopySgBufToGuest(pThis, pReq, &SgBuf, cbSkip, cbSrc);
|
---|
2070 | }
|
---|
2071 |
|
---|
2072 | /**
|
---|
2073 | * Copy a guest memry buffe into simple host memory buffer.
|
---|
2074 | *
|
---|
2075 | * @returns Amount of bytes copied to the guest.
|
---|
2076 | * @param pThis The LsiLogic controller device instance.
|
---|
2077 | * @param pReq Request structure.
|
---|
2078 | * @param pvSrc The buffer to copy from.
|
---|
2079 | * @param cbSrc How many bytes to copy.
|
---|
2080 | * @param cbSkip How many bytes to skip initially.
|
---|
2081 | */
|
---|
2082 | static size_t lsilogicR3CopyBufferFromGuest(PLSILOGICSCSI pThis, PLSILOGICREQ pReq, void *pvDst,
|
---|
2083 | size_t cbDst, size_t cbSkip)
|
---|
2084 | {
|
---|
2085 | RTSGSEG Seg;
|
---|
2086 | RTSGBUF SgBuf;
|
---|
2087 | Seg.pvSeg = (void *)pvDst;
|
---|
2088 | Seg.cbSeg = cbDst;
|
---|
2089 | RTSgBufInit(&SgBuf, &Seg, 1);
|
---|
2090 | return lsilogicR3CopySgBufFromGuest(pThis, pReq, &SgBuf, cbSkip, cbDst);
|
---|
2091 | }
|
---|
2092 | #endif
|
---|
2093 |
|
---|
2094 | # ifdef LOG_ENABLED
|
---|
2095 | static void lsilogicR3DumpSCSIIORequest(PMptSCSIIORequest pSCSIIORequest)
|
---|
2096 | {
|
---|
2097 | if (LogIsEnabled())
|
---|
2098 | {
|
---|
2099 | Log(("%s: u8TargetID=%d\n", __FUNCTION__, pSCSIIORequest->u8TargetID));
|
---|
2100 | Log(("%s: u8Bus=%d\n", __FUNCTION__, pSCSIIORequest->u8Bus));
|
---|
2101 | Log(("%s: u8ChainOffset=%d\n", __FUNCTION__, pSCSIIORequest->u8ChainOffset));
|
---|
2102 | Log(("%s: u8Function=%d\n", __FUNCTION__, pSCSIIORequest->u8Function));
|
---|
2103 | Log(("%s: u8CDBLength=%d\n", __FUNCTION__, pSCSIIORequest->u8CDBLength));
|
---|
2104 | Log(("%s: u8SenseBufferLength=%d\n", __FUNCTION__, pSCSIIORequest->u8SenseBufferLength));
|
---|
2105 | Log(("%s: u8MessageFlags=%d\n", __FUNCTION__, pSCSIIORequest->u8MessageFlags));
|
---|
2106 | Log(("%s: u32MessageContext=%#x\n", __FUNCTION__, pSCSIIORequest->u32MessageContext));
|
---|
2107 | for (unsigned i = 0; i < RT_ELEMENTS(pSCSIIORequest->au8LUN); i++)
|
---|
2108 | Log(("%s: u8LUN[%d]=%d\n", __FUNCTION__, i, pSCSIIORequest->au8LUN[i]));
|
---|
2109 | Log(("%s: u32Control=%#x\n", __FUNCTION__, pSCSIIORequest->u32Control));
|
---|
2110 | for (unsigned i = 0; i < RT_ELEMENTS(pSCSIIORequest->au8CDB); i++)
|
---|
2111 | Log(("%s: u8CDB[%d]=%d\n", __FUNCTION__, i, pSCSIIORequest->au8CDB[i]));
|
---|
2112 | Log(("%s: u32DataLength=%#x\n", __FUNCTION__, pSCSIIORequest->u32DataLength));
|
---|
2113 | Log(("%s: u32SenseBufferLowAddress=%#x\n", __FUNCTION__, pSCSIIORequest->u32SenseBufferLowAddress));
|
---|
2114 | }
|
---|
2115 | }
|
---|
2116 | # endif
|
---|
2117 |
|
---|
2118 | /**
|
---|
2119 | * Handles the completion of th given request.
|
---|
2120 | *
|
---|
2121 | * @returns nothing.
|
---|
2122 | * @param pThis Pointer to the LsiLogic device state.
|
---|
2123 | * @param pReq The request to complete.
|
---|
2124 | * @param rcReq Status code of the request.
|
---|
2125 | */
|
---|
2126 | static void lsilogicR3ReqComplete(PLSILOGICSCSI pThis, PLSILOGICREQ pReq, int rcReq)
|
---|
2127 | {
|
---|
2128 | PLSILOGICDEVICE pTgtDev = pReq->pTargetDevice;
|
---|
2129 |
|
---|
2130 | if (RT_UNLIKELY(pReq->fBIOS))
|
---|
2131 | {
|
---|
2132 | uint8_t u8ScsiSts = pReq->u8ScsiSts;
|
---|
2133 | pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
|
---|
2134 | int rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
|
---|
2135 | AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
|
---|
2136 | }
|
---|
2137 | else
|
---|
2138 | {
|
---|
2139 | RTGCPHYS GCPhysAddrSenseBuffer;
|
---|
2140 |
|
---|
2141 | GCPhysAddrSenseBuffer = pReq->GuestRequest.SCSIIO.u32SenseBufferLowAddress;
|
---|
2142 | GCPhysAddrSenseBuffer |= ((uint64_t)pThis->u32SenseBufferHighAddr << 32);
|
---|
2143 |
|
---|
2144 | /* Copy the sense buffer over. */
|
---|
2145 | PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhysAddrSenseBuffer, pReq->abSenseBuffer,
|
---|
2146 | RT_UNLIKELY( pReq->GuestRequest.SCSIIO.u8SenseBufferLength
|
---|
2147 | < sizeof(pReq->abSenseBuffer))
|
---|
2148 | ? pReq->GuestRequest.SCSIIO.u8SenseBufferLength
|
---|
2149 | : sizeof(pReq->abSenseBuffer));
|
---|
2150 |
|
---|
2151 | if (RT_SUCCESS(rcReq) && RT_LIKELY(pReq->u8ScsiSts == SCSI_STATUS_OK))
|
---|
2152 | {
|
---|
2153 | uint32_t u32MsgCtx = pReq->GuestRequest.SCSIIO.u32MessageContext;
|
---|
2154 |
|
---|
2155 | /* Free the request before posting completion. */
|
---|
2156 | pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
|
---|
2157 | lsilogicR3FinishContextReply(pThis, u32MsgCtx);
|
---|
2158 | }
|
---|
2159 | else
|
---|
2160 | {
|
---|
2161 | MptReplyUnion IOCReply;
|
---|
2162 | RT_ZERO(IOCReply);
|
---|
2163 |
|
---|
2164 | /* The SCSI target encountered an error during processing post a reply. */
|
---|
2165 | IOCReply.SCSIIOError.u8TargetID = pReq->GuestRequest.SCSIIO.u8TargetID;
|
---|
2166 | IOCReply.SCSIIOError.u8Bus = pReq->GuestRequest.SCSIIO.u8Bus;
|
---|
2167 | IOCReply.SCSIIOError.u8MessageLength = 8;
|
---|
2168 | IOCReply.SCSIIOError.u8Function = pReq->GuestRequest.SCSIIO.u8Function;
|
---|
2169 | IOCReply.SCSIIOError.u8CDBLength = pReq->GuestRequest.SCSIIO.u8CDBLength;
|
---|
2170 | IOCReply.SCSIIOError.u8SenseBufferLength = pReq->GuestRequest.SCSIIO.u8SenseBufferLength;
|
---|
2171 | IOCReply.SCSIIOError.u8MessageFlags = pReq->GuestRequest.SCSIIO.u8MessageFlags;
|
---|
2172 | IOCReply.SCSIIOError.u32MessageContext = pReq->GuestRequest.SCSIIO.u32MessageContext;
|
---|
2173 | IOCReply.SCSIIOError.u8SCSIStatus = pReq->u8ScsiSts;
|
---|
2174 | IOCReply.SCSIIOError.u8SCSIState = MPT_SCSI_IO_ERROR_SCSI_STATE_AUTOSENSE_VALID;
|
---|
2175 | IOCReply.SCSIIOError.u16IOCStatus = 0;
|
---|
2176 | IOCReply.SCSIIOError.u32IOCLogInfo = 0;
|
---|
2177 | IOCReply.SCSIIOError.u32TransferCount = 0;
|
---|
2178 | IOCReply.SCSIIOError.u32SenseCount = sizeof(pReq->abSenseBuffer);
|
---|
2179 | IOCReply.SCSIIOError.u32ResponseInfo = 0;
|
---|
2180 |
|
---|
2181 | /* Free the request before posting completion. */
|
---|
2182 | pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
|
---|
2183 | lsilogicFinishAddressReply(pThis, &IOCReply, false);
|
---|
2184 | }
|
---|
2185 | }
|
---|
2186 |
|
---|
2187 | ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
|
---|
2188 |
|
---|
2189 | if (pTgtDev->cOutstandingRequests == 0 && pThis->fSignalIdle)
|
---|
2190 | PDMDevHlpAsyncNotificationCompleted(pThis->pDevInsR3);
|
---|
2191 | }
|
---|
2192 |
|
---|
2193 | /**
|
---|
2194 | * Processes a SCSI I/O request by setting up the request
|
---|
2195 | * and sending it to the underlying SCSI driver.
|
---|
2196 | * Steps needed to complete request are done in the
|
---|
2197 | * callback called by the driver below upon completion of
|
---|
2198 | * the request.
|
---|
2199 | *
|
---|
2200 | * @returns VBox status code.
|
---|
2201 | * @param pThis Pointer to the LsiLogic device state.
|
---|
2202 | * @param GCPhysMessageFrameAddr Guest physical address where the request is located.
|
---|
2203 | * @param pGuestReq The request read fro th guest memory.
|
---|
2204 | */
|
---|
2205 | static int lsilogicR3ProcessSCSIIORequest(PLSILOGICSCSI pThis, RTGCPHYS GCPhysMessageFrameAddr,
|
---|
2206 | PMptRequestUnion pGuestReq)
|
---|
2207 | {
|
---|
2208 | MptReplyUnion IOCReply;
|
---|
2209 | int rc = VINF_SUCCESS;
|
---|
2210 |
|
---|
2211 | # ifdef LOG_ENABLED
|
---|
2212 | lsilogicR3DumpSCSIIORequest(&pGuestReq->SCSIIO);
|
---|
2213 | # endif
|
---|
2214 |
|
---|
2215 | if (RT_LIKELY( (pGuestReq->SCSIIO.u8TargetID < pThis->cDeviceStates)
|
---|
2216 | && (pGuestReq->SCSIIO.u8Bus == 0)))
|
---|
2217 | {
|
---|
2218 | PLSILOGICDEVICE pTgtDev = &pThis->paDeviceStates[pGuestReq->SCSIIO.u8TargetID];
|
---|
2219 |
|
---|
2220 | if (pTgtDev->pDrvBase)
|
---|
2221 | {
|
---|
2222 | /* Allocate and prepare a new request. */
|
---|
2223 | PDMMEDIAEXIOREQ hIoReq;
|
---|
2224 | PLSILOGICREQ pLsiReq = NULL;
|
---|
2225 | rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pLsiReq,
|
---|
2226 | pGuestReq->SCSIIO.u32MessageContext,
|
---|
2227 | PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
|
---|
2228 | if (RT_SUCCESS(rc))
|
---|
2229 | {
|
---|
2230 | pLsiReq->hIoReq = hIoReq;
|
---|
2231 | pLsiReq->pTargetDevice = pTgtDev;
|
---|
2232 | pLsiReq->GCPhysMessageFrameAddr = GCPhysMessageFrameAddr;
|
---|
2233 | pLsiReq->fBIOS = false;
|
---|
2234 | pLsiReq->GCPhysSgStart = GCPhysMessageFrameAddr + sizeof(MptSCSIIORequest);
|
---|
2235 | pLsiReq->cChainOffset = pGuestReq->SCSIIO.u8ChainOffset;
|
---|
2236 | if (pLsiReq->cChainOffset)
|
---|
2237 | pLsiReq->cChainOffset = pLsiReq->cChainOffset * sizeof(uint32_t) - sizeof(MptSCSIIORequest);
|
---|
2238 | memcpy(&pLsiReq->GuestRequest, pGuestReq, sizeof(MptRequestUnion));
|
---|
2239 | RT_BZERO(&pLsiReq->abSenseBuffer[0], sizeof(pLsiReq->abSenseBuffer));
|
---|
2240 |
|
---|
2241 | PDMMEDIAEXIOREQSCSITXDIR enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN;
|
---|
2242 | uint8_t uDataDirection = MPT_SCSIIO_REQUEST_CONTROL_TXDIR_GET(pLsiReq->GuestRequest.SCSIIO.u32Control);
|
---|
2243 |
|
---|
2244 | if (uDataDirection == MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE)
|
---|
2245 | enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_NONE;
|
---|
2246 | else if (uDataDirection == MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE)
|
---|
2247 | enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_TO_DEVICE;
|
---|
2248 | else if (uDataDirection == MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ)
|
---|
2249 | enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_FROM_DEVICE;
|
---|
2250 |
|
---|
2251 | ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
|
---|
2252 | rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pLsiReq->hIoReq, pLsiReq->GuestRequest.SCSIIO.au8LUN[1],
|
---|
2253 | &pLsiReq->GuestRequest.SCSIIO.au8CDB[0], pLsiReq->GuestRequest.SCSIIO.u8CDBLength,
|
---|
2254 | enmXferDir, pLsiReq->GuestRequest.SCSIIO.u32DataLength,
|
---|
2255 | &pLsiReq->abSenseBuffer[0], sizeof(pLsiReq->abSenseBuffer), &pLsiReq->u8ScsiSts,
|
---|
2256 | 30 * RT_MS_1SEC);
|
---|
2257 | if (rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
|
---|
2258 | lsilogicR3ReqComplete(pThis, pLsiReq, rc);
|
---|
2259 |
|
---|
2260 | return VINF_SUCCESS;
|
---|
2261 | }
|
---|
2262 | else
|
---|
2263 | IOCReply.SCSIIOError.u16IOCStatus = MPT_SCSI_IO_ERROR_IOCSTATUS_DEVICE_NOT_THERE;
|
---|
2264 | }
|
---|
2265 | else
|
---|
2266 | {
|
---|
2267 | /* Device is not present report SCSI selection timeout. */
|
---|
2268 | IOCReply.SCSIIOError.u16IOCStatus = MPT_SCSI_IO_ERROR_IOCSTATUS_DEVICE_NOT_THERE;
|
---|
2269 | }
|
---|
2270 | }
|
---|
2271 | else
|
---|
2272 | {
|
---|
2273 | /* Report out of bounds target ID or bus. */
|
---|
2274 | if (pGuestReq->SCSIIO.u8Bus != 0)
|
---|
2275 | IOCReply.SCSIIOError.u16IOCStatus = MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_BUS;
|
---|
2276 | else
|
---|
2277 | IOCReply.SCSIIOError.u16IOCStatus = MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_TARGETID;
|
---|
2278 | }
|
---|
2279 |
|
---|
2280 | static int g_cLogged = 0;
|
---|
2281 |
|
---|
2282 | if (g_cLogged++ < MAX_REL_LOG_ERRORS)
|
---|
2283 | {
|
---|
2284 | LogRel(("LsiLogic#%d: %d/%d (Bus/Target) doesn't exist\n", pThis->CTX_SUFF(pDevIns)->iInstance,
|
---|
2285 | pGuestReq->SCSIIO.u8TargetID, pGuestReq->SCSIIO.u8Bus));
|
---|
2286 | /* Log the CDB too */
|
---|
2287 | LogRel(("LsiLogic#%d: Guest issued CDB {%#x",
|
---|
2288 | pThis->CTX_SUFF(pDevIns)->iInstance, pGuestReq->SCSIIO.au8CDB[0]));
|
---|
2289 | for (unsigned i = 1; i < pGuestReq->SCSIIO.u8CDBLength; i++)
|
---|
2290 | LogRel((", %#x", pGuestReq->SCSIIO.au8CDB[i]));
|
---|
2291 | LogRel(("}\n"));
|
---|
2292 | }
|
---|
2293 |
|
---|
2294 | /* The rest is equal to both errors. */
|
---|
2295 | IOCReply.SCSIIOError.u8TargetID = pGuestReq->SCSIIO.u8TargetID;
|
---|
2296 | IOCReply.SCSIIOError.u8Bus = pGuestReq->SCSIIO.u8Bus;
|
---|
2297 | IOCReply.SCSIIOError.u8MessageLength = sizeof(MptSCSIIOErrorReply) / 4;
|
---|
2298 | IOCReply.SCSIIOError.u8Function = pGuestReq->SCSIIO.u8Function;
|
---|
2299 | IOCReply.SCSIIOError.u8CDBLength = pGuestReq->SCSIIO.u8CDBLength;
|
---|
2300 | IOCReply.SCSIIOError.u8SenseBufferLength = pGuestReq->SCSIIO.u8SenseBufferLength;
|
---|
2301 | IOCReply.SCSIIOError.u32MessageContext = pGuestReq->SCSIIO.u32MessageContext;
|
---|
2302 | IOCReply.SCSIIOError.u8SCSIStatus = SCSI_STATUS_OK;
|
---|
2303 | IOCReply.SCSIIOError.u8SCSIState = MPT_SCSI_IO_ERROR_SCSI_STATE_TERMINATED;
|
---|
2304 | IOCReply.SCSIIOError.u32IOCLogInfo = 0;
|
---|
2305 | IOCReply.SCSIIOError.u32TransferCount = 0;
|
---|
2306 | IOCReply.SCSIIOError.u32SenseCount = 0;
|
---|
2307 | IOCReply.SCSIIOError.u32ResponseInfo = 0;
|
---|
2308 |
|
---|
2309 | lsilogicFinishAddressReply(pThis, &IOCReply, false);
|
---|
2310 |
|
---|
2311 | return rc;
|
---|
2312 | }
|
---|
2313 |
|
---|
2314 |
|
---|
2315 | /**
|
---|
2316 | * @interface_method_impl{PDMIMEDIAPORT,pfnQueryDeviceLocation}
|
---|
2317 | */
|
---|
2318 | static DECLCALLBACK(int) lsilogicR3QueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
|
---|
2319 | uint32_t *piInstance, uint32_t *piLUN)
|
---|
2320 | {
|
---|
2321 | PLSILOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, LSILOGICDEVICE, IMediaPort);
|
---|
2322 | PPDMDEVINS pDevIns = pTgtDev->CTX_SUFF(pLsiLogic)->CTX_SUFF(pDevIns);
|
---|
2323 |
|
---|
2324 | AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
|
---|
2325 | AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
|
---|
2326 | AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
|
---|
2327 |
|
---|
2328 | *ppcszController = pDevIns->pReg->szName;
|
---|
2329 | *piInstance = pDevIns->iInstance;
|
---|
2330 | *piLUN = pTgtDev->iLUN;
|
---|
2331 |
|
---|
2332 | return VINF_SUCCESS;
|
---|
2333 | }
|
---|
2334 |
|
---|
2335 |
|
---|
2336 | /**
|
---|
2337 | * @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyFromBuf}
|
---|
2338 | */
|
---|
2339 | static DECLCALLBACK(int) lsilogicR3IoReqCopyFromBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
|
---|
2340 | void *pvIoReqAlloc, uint32_t offDst, PRTSGBUF pSgBuf,
|
---|
2341 | size_t cbCopy)
|
---|
2342 | {
|
---|
2343 | RT_NOREF1(hIoReq);
|
---|
2344 | PLSILOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, LSILOGICDEVICE, IMediaExPort);
|
---|
2345 | PLSILOGICREQ pReq = (PLSILOGICREQ)pvIoReqAlloc;
|
---|
2346 |
|
---|
2347 | size_t cbCopied = 0;
|
---|
2348 | if (RT_UNLIKELY(pReq->fBIOS))
|
---|
2349 | cbCopied = vboxscsiCopyToBuf(&pTgtDev->CTX_SUFF(pLsiLogic)->VBoxSCSI, pSgBuf, offDst, cbCopy);
|
---|
2350 | else
|
---|
2351 | cbCopied = lsilogicR3CopySgBufToGuest(pTgtDev->CTX_SUFF(pLsiLogic), pReq, pSgBuf, offDst, cbCopy);
|
---|
2352 | return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_OVERFLOW;
|
---|
2353 | }
|
---|
2354 |
|
---|
2355 | /**
|
---|
2356 | * @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyToBuf}
|
---|
2357 | */
|
---|
2358 | static DECLCALLBACK(int) lsilogicR3IoReqCopyToBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
|
---|
2359 | void *pvIoReqAlloc, uint32_t offSrc, PRTSGBUF pSgBuf,
|
---|
2360 | size_t cbCopy)
|
---|
2361 | {
|
---|
2362 | RT_NOREF1(hIoReq);
|
---|
2363 | PLSILOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, LSILOGICDEVICE, IMediaExPort);
|
---|
2364 | PLSILOGICREQ pReq = (PLSILOGICREQ)pvIoReqAlloc;
|
---|
2365 |
|
---|
2366 | size_t cbCopied = 0;
|
---|
2367 | if (RT_UNLIKELY(pReq->fBIOS))
|
---|
2368 | cbCopied = vboxscsiCopyFromBuf(&pTgtDev->CTX_SUFF(pLsiLogic)->VBoxSCSI, pSgBuf, offSrc, cbCopy);
|
---|
2369 | else
|
---|
2370 | cbCopied = lsilogicR3CopySgBufFromGuest(pTgtDev->CTX_SUFF(pLsiLogic), pReq, pSgBuf, offSrc, cbCopy);
|
---|
2371 | return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_UNDERRUN;
|
---|
2372 | }
|
---|
2373 |
|
---|
2374 | /**
|
---|
2375 | * @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCompleteNotify}
|
---|
2376 | */
|
---|
2377 | static DECLCALLBACK(int) lsilogicR3IoReqCompleteNotify(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
|
---|
2378 | void *pvIoReqAlloc, int rcReq)
|
---|
2379 | {
|
---|
2380 | RT_NOREF(hIoReq);
|
---|
2381 | PLSILOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, LSILOGICDEVICE, IMediaExPort);
|
---|
2382 | lsilogicR3ReqComplete(pTgtDev->CTX_SUFF(pLsiLogic), (PLSILOGICREQ)pvIoReqAlloc, rcReq);
|
---|
2383 | return VINF_SUCCESS;
|
---|
2384 | }
|
---|
2385 |
|
---|
2386 | /**
|
---|
2387 | * @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqStateChanged}
|
---|
2388 | */
|
---|
2389 | static DECLCALLBACK(void) lsilogicR3IoReqStateChanged(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
|
---|
2390 | void *pvIoReqAlloc, PDMMEDIAEXIOREQSTATE enmState)
|
---|
2391 | {
|
---|
2392 | RT_NOREF3(hIoReq, pvIoReqAlloc, enmState);
|
---|
2393 | PLSILOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, LSILOGICDEVICE, IMediaExPort);
|
---|
2394 |
|
---|
2395 | switch (enmState)
|
---|
2396 | {
|
---|
2397 | case PDMMEDIAEXIOREQSTATE_SUSPENDED:
|
---|
2398 | {
|
---|
2399 | /* Make sure the request is not accounted for so the VM can suspend successfully. */
|
---|
2400 | uint32_t cTasksActive = ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
|
---|
2401 | if (!cTasksActive && pTgtDev->CTX_SUFF(pLsiLogic)->fSignalIdle)
|
---|
2402 | PDMDevHlpAsyncNotificationCompleted(pTgtDev->CTX_SUFF(pLsiLogic)->pDevInsR3);
|
---|
2403 | break;
|
---|
2404 | }
|
---|
2405 | case PDMMEDIAEXIOREQSTATE_ACTIVE:
|
---|
2406 | /* Make sure the request is accounted for so the VM suspends only when the request is complete. */
|
---|
2407 | ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
|
---|
2408 | break;
|
---|
2409 | default:
|
---|
2410 | AssertMsgFailed(("Invalid request state given %u\n", enmState));
|
---|
2411 | }
|
---|
2412 | }
|
---|
2413 |
|
---|
2414 | /**
|
---|
2415 | * @interface_method_impl{PDMIMEDIAEXPORT,pfnMediumEjected}
|
---|
2416 | */
|
---|
2417 | static DECLCALLBACK(void) lsilogicR3MediumEjected(PPDMIMEDIAEXPORT pInterface)
|
---|
2418 | {
|
---|
2419 | PLSILOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, LSILOGICDEVICE, IMediaExPort);
|
---|
2420 | PLSILOGICSCSI pThis = pTgtDev->CTX_SUFF(pLsiLogic);
|
---|
2421 |
|
---|
2422 | if (pThis->pMediaNotify)
|
---|
2423 | {
|
---|
2424 | int rc = VMR3ReqCallNoWait(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), VMCPUID_ANY,
|
---|
2425 | (PFNRT)pThis->pMediaNotify->pfnEjected, 2,
|
---|
2426 | pThis->pMediaNotify, pTgtDev->iLUN);
|
---|
2427 | AssertRC(rc);
|
---|
2428 | }
|
---|
2429 | }
|
---|
2430 |
|
---|
2431 |
|
---|
2432 | /**
|
---|
2433 | * Return the configuration page header and data
|
---|
2434 | * which matches the given page type and number.
|
---|
2435 | *
|
---|
2436 | * @returns VINF_SUCCESS if successful
|
---|
2437 | * VERR_NOT_FOUND if the requested page could be found.
|
---|
2438 | * @param pThis The LsiLogic controller instance data.
|
---|
2439 | * @param pPages The pages supported by the controller.
|
---|
2440 | * @param u8PageNumber Number of the page to get.
|
---|
2441 | * @param ppPageHeader Where to store the pointer to the page header.
|
---|
2442 | * @param ppbPageData Where to store the pointer to the page data.
|
---|
2443 | * @param pcbPage Where to store the size of the page data in bytes on success.
|
---|
2444 | */
|
---|
2445 | static int lsilogicR3ConfigurationIOUnitPageGetFromNumber(PLSILOGICSCSI pThis,
|
---|
2446 | PMptConfigurationPagesSupported pPages,
|
---|
2447 | uint8_t u8PageNumber,
|
---|
2448 | PMptConfigurationPageHeader *ppPageHeader,
|
---|
2449 | uint8_t **ppbPageData, size_t *pcbPage)
|
---|
2450 | {
|
---|
2451 | RT_NOREF(pThis);
|
---|
2452 | int rc = VINF_SUCCESS;
|
---|
2453 |
|
---|
2454 | AssertPtr(ppPageHeader); Assert(ppbPageData);
|
---|
2455 |
|
---|
2456 | switch (u8PageNumber)
|
---|
2457 | {
|
---|
2458 | case 0:
|
---|
2459 | *ppPageHeader = &pPages->IOUnitPage0.u.fields.Header;
|
---|
2460 | *ppbPageData = pPages->IOUnitPage0.u.abPageData;
|
---|
2461 | *pcbPage = sizeof(pPages->IOUnitPage0);
|
---|
2462 | break;
|
---|
2463 | case 1:
|
---|
2464 | *ppPageHeader = &pPages->IOUnitPage1.u.fields.Header;
|
---|
2465 | *ppbPageData = pPages->IOUnitPage1.u.abPageData;
|
---|
2466 | *pcbPage = sizeof(pPages->IOUnitPage1);
|
---|
2467 | break;
|
---|
2468 | case 2:
|
---|
2469 | *ppPageHeader = &pPages->IOUnitPage2.u.fields.Header;
|
---|
2470 | *ppbPageData = pPages->IOUnitPage2.u.abPageData;
|
---|
2471 | *pcbPage = sizeof(pPages->IOUnitPage2);
|
---|
2472 | break;
|
---|
2473 | case 3:
|
---|
2474 | *ppPageHeader = &pPages->IOUnitPage3.u.fields.Header;
|
---|
2475 | *ppbPageData = pPages->IOUnitPage3.u.abPageData;
|
---|
2476 | *pcbPage = sizeof(pPages->IOUnitPage3);
|
---|
2477 | break;
|
---|
2478 | case 4:
|
---|
2479 | *ppPageHeader = &pPages->IOUnitPage4.u.fields.Header;
|
---|
2480 | *ppbPageData = pPages->IOUnitPage4.u.abPageData;
|
---|
2481 | *pcbPage = sizeof(pPages->IOUnitPage4);
|
---|
2482 | break;
|
---|
2483 | default:
|
---|
2484 | rc = VERR_NOT_FOUND;
|
---|
2485 | }
|
---|
2486 |
|
---|
2487 | return rc;
|
---|
2488 | }
|
---|
2489 |
|
---|
2490 | /**
|
---|
2491 | * Return the configuration page header and data
|
---|
2492 | * which matches the given page type and number.
|
---|
2493 | *
|
---|
2494 | * @returns VINF_SUCCESS if successful
|
---|
2495 | * VERR_NOT_FOUND if the requested page could be found.
|
---|
2496 | * @param pThis The LsiLogic controller instance data.
|
---|
2497 | * @param pPages The pages supported by the controller.
|
---|
2498 | * @param u8PageNumber Number of the page to get.
|
---|
2499 | * @param ppPageHeader Where to store the pointer to the page header.
|
---|
2500 | * @param ppbPageData Where to store the pointer to the page data.
|
---|
2501 | * @param pcbPage Where to store the size of the page data in bytes on success.
|
---|
2502 | */
|
---|
2503 | static int lsilogicR3ConfigurationIOCPageGetFromNumber(PLSILOGICSCSI pThis,
|
---|
2504 | PMptConfigurationPagesSupported pPages,
|
---|
2505 | uint8_t u8PageNumber,
|
---|
2506 | PMptConfigurationPageHeader *ppPageHeader,
|
---|
2507 | uint8_t **ppbPageData, size_t *pcbPage)
|
---|
2508 | {
|
---|
2509 | RT_NOREF(pThis);
|
---|
2510 | int rc = VINF_SUCCESS;
|
---|
2511 |
|
---|
2512 | AssertPtr(ppPageHeader); Assert(ppbPageData);
|
---|
2513 |
|
---|
2514 | switch (u8PageNumber)
|
---|
2515 | {
|
---|
2516 | case 0:
|
---|
2517 | *ppPageHeader = &pPages->IOCPage0.u.fields.Header;
|
---|
2518 | *ppbPageData = pPages->IOCPage0.u.abPageData;
|
---|
2519 | *pcbPage = sizeof(pPages->IOCPage0);
|
---|
2520 | break;
|
---|
2521 | case 1:
|
---|
2522 | *ppPageHeader = &pPages->IOCPage1.u.fields.Header;
|
---|
2523 | *ppbPageData = pPages->IOCPage1.u.abPageData;
|
---|
2524 | *pcbPage = sizeof(pPages->IOCPage1);
|
---|
2525 | break;
|
---|
2526 | case 2:
|
---|
2527 | *ppPageHeader = &pPages->IOCPage2.u.fields.Header;
|
---|
2528 | *ppbPageData = pPages->IOCPage2.u.abPageData;
|
---|
2529 | *pcbPage = sizeof(pPages->IOCPage2);
|
---|
2530 | break;
|
---|
2531 | case 3:
|
---|
2532 | *ppPageHeader = &pPages->IOCPage3.u.fields.Header;
|
---|
2533 | *ppbPageData = pPages->IOCPage3.u.abPageData;
|
---|
2534 | *pcbPage = sizeof(pPages->IOCPage3);
|
---|
2535 | break;
|
---|
2536 | case 4:
|
---|
2537 | *ppPageHeader = &pPages->IOCPage4.u.fields.Header;
|
---|
2538 | *ppbPageData = pPages->IOCPage4.u.abPageData;
|
---|
2539 | *pcbPage = sizeof(pPages->IOCPage4);
|
---|
2540 | break;
|
---|
2541 | case 6:
|
---|
2542 | *ppPageHeader = &pPages->IOCPage6.u.fields.Header;
|
---|
2543 | *ppbPageData = pPages->IOCPage6.u.abPageData;
|
---|
2544 | *pcbPage = sizeof(pPages->IOCPage6);
|
---|
2545 | break;
|
---|
2546 | default:
|
---|
2547 | rc = VERR_NOT_FOUND;
|
---|
2548 | }
|
---|
2549 |
|
---|
2550 | return rc;
|
---|
2551 | }
|
---|
2552 |
|
---|
2553 | /**
|
---|
2554 | * Return the configuration page header and data
|
---|
2555 | * which matches the given page type and number.
|
---|
2556 | *
|
---|
2557 | * @returns VINF_SUCCESS if successful
|
---|
2558 | * VERR_NOT_FOUND if the requested page could be found.
|
---|
2559 | * @param pThis The LsiLogic controller instance data.
|
---|
2560 | * @param pPages The pages supported by the controller.
|
---|
2561 | * @param u8PageNumber Number of the page to get.
|
---|
2562 | * @param ppPageHeader Where to store the pointer to the page header.
|
---|
2563 | * @param ppbPageData Where to store the pointer to the page data.
|
---|
2564 | * @param pcbPage Where to store the size of the page data in bytes on success.
|
---|
2565 | */
|
---|
2566 | static int lsilogicR3ConfigurationManufacturingPageGetFromNumber(PLSILOGICSCSI pThis,
|
---|
2567 | PMptConfigurationPagesSupported pPages,
|
---|
2568 | uint8_t u8PageNumber,
|
---|
2569 | PMptConfigurationPageHeader *ppPageHeader,
|
---|
2570 | uint8_t **ppbPageData, size_t *pcbPage)
|
---|
2571 | {
|
---|
2572 | int rc = VINF_SUCCESS;
|
---|
2573 |
|
---|
2574 | AssertPtr(ppPageHeader); Assert(ppbPageData);
|
---|
2575 |
|
---|
2576 | switch (u8PageNumber)
|
---|
2577 | {
|
---|
2578 | case 0:
|
---|
2579 | *ppPageHeader = &pPages->ManufacturingPage0.u.fields.Header;
|
---|
2580 | *ppbPageData = pPages->ManufacturingPage0.u.abPageData;
|
---|
2581 | *pcbPage = sizeof(pPages->ManufacturingPage0);
|
---|
2582 | break;
|
---|
2583 | case 1:
|
---|
2584 | *ppPageHeader = &pPages->ManufacturingPage1.u.fields.Header;
|
---|
2585 | *ppbPageData = pPages->ManufacturingPage1.u.abPageData;
|
---|
2586 | *pcbPage = sizeof(pPages->ManufacturingPage1);
|
---|
2587 | break;
|
---|
2588 | case 2:
|
---|
2589 | *ppPageHeader = &pPages->ManufacturingPage2.u.fields.Header;
|
---|
2590 | *ppbPageData = pPages->ManufacturingPage2.u.abPageData;
|
---|
2591 | *pcbPage = sizeof(pPages->ManufacturingPage2);
|
---|
2592 | break;
|
---|
2593 | case 3:
|
---|
2594 | *ppPageHeader = &pPages->ManufacturingPage3.u.fields.Header;
|
---|
2595 | *ppbPageData = pPages->ManufacturingPage3.u.abPageData;
|
---|
2596 | *pcbPage = sizeof(pPages->ManufacturingPage3);
|
---|
2597 | break;
|
---|
2598 | case 4:
|
---|
2599 | *ppPageHeader = &pPages->ManufacturingPage4.u.fields.Header;
|
---|
2600 | *ppbPageData = pPages->ManufacturingPage4.u.abPageData;
|
---|
2601 | *pcbPage = sizeof(pPages->ManufacturingPage4);
|
---|
2602 | break;
|
---|
2603 | case 5:
|
---|
2604 | *ppPageHeader = &pPages->ManufacturingPage5.u.fields.Header;
|
---|
2605 | *ppbPageData = pPages->ManufacturingPage5.u.abPageData;
|
---|
2606 | *pcbPage = sizeof(pPages->ManufacturingPage5);
|
---|
2607 | break;
|
---|
2608 | case 6:
|
---|
2609 | *ppPageHeader = &pPages->ManufacturingPage6.u.fields.Header;
|
---|
2610 | *ppbPageData = pPages->ManufacturingPage6.u.abPageData;
|
---|
2611 | *pcbPage = sizeof(pPages->ManufacturingPage6);
|
---|
2612 | break;
|
---|
2613 | case 7:
|
---|
2614 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
2615 | {
|
---|
2616 | *ppPageHeader = &pPages->u.SasPages.pManufacturingPage7->u.fields.Header;
|
---|
2617 | *ppbPageData = pPages->u.SasPages.pManufacturingPage7->u.abPageData;
|
---|
2618 | *pcbPage = pPages->u.SasPages.cbManufacturingPage7;
|
---|
2619 | }
|
---|
2620 | else
|
---|
2621 | rc = VERR_NOT_FOUND;
|
---|
2622 | break;
|
---|
2623 | case 8:
|
---|
2624 | *ppPageHeader = &pPages->ManufacturingPage8.u.fields.Header;
|
---|
2625 | *ppbPageData = pPages->ManufacturingPage8.u.abPageData;
|
---|
2626 | *pcbPage = sizeof(pPages->ManufacturingPage8);
|
---|
2627 | break;
|
---|
2628 | case 9:
|
---|
2629 | *ppPageHeader = &pPages->ManufacturingPage9.u.fields.Header;
|
---|
2630 | *ppbPageData = pPages->ManufacturingPage9.u.abPageData;
|
---|
2631 | *pcbPage = sizeof(pPages->ManufacturingPage9);
|
---|
2632 | break;
|
---|
2633 | case 10:
|
---|
2634 | *ppPageHeader = &pPages->ManufacturingPage10.u.fields.Header;
|
---|
2635 | *ppbPageData = pPages->ManufacturingPage10.u.abPageData;
|
---|
2636 | *pcbPage = sizeof(pPages->ManufacturingPage10);
|
---|
2637 | break;
|
---|
2638 | default:
|
---|
2639 | rc = VERR_NOT_FOUND;
|
---|
2640 | }
|
---|
2641 |
|
---|
2642 | return rc;
|
---|
2643 | }
|
---|
2644 |
|
---|
2645 | /**
|
---|
2646 | * Return the configuration page header and data
|
---|
2647 | * which matches the given page type and number.
|
---|
2648 | *
|
---|
2649 | * @returns VINF_SUCCESS if successful
|
---|
2650 | * VERR_NOT_FOUND if the requested page could be found.
|
---|
2651 | * @param pThis The LsiLogic controller instance data.
|
---|
2652 | * @param pPages The pages supported by the controller.
|
---|
2653 | * @param u8PageNumber Number of the page to get.
|
---|
2654 | * @param ppPageHeader Where to store the pointer to the page header.
|
---|
2655 | * @param ppbPageData Where to store the pointer to the page data.
|
---|
2656 | * @param pcbPage Where to store the size of the page data in bytes on success.
|
---|
2657 | */
|
---|
2658 | static int lsilogicR3ConfigurationBiosPageGetFromNumber(PLSILOGICSCSI pThis,
|
---|
2659 | PMptConfigurationPagesSupported pPages,
|
---|
2660 | uint8_t u8PageNumber,
|
---|
2661 | PMptConfigurationPageHeader *ppPageHeader,
|
---|
2662 | uint8_t **ppbPageData, size_t *pcbPage)
|
---|
2663 | {
|
---|
2664 | RT_NOREF(pThis);
|
---|
2665 | int rc = VINF_SUCCESS;
|
---|
2666 |
|
---|
2667 | AssertPtr(ppPageHeader); Assert(ppbPageData);
|
---|
2668 |
|
---|
2669 | switch (u8PageNumber)
|
---|
2670 | {
|
---|
2671 | case 1:
|
---|
2672 | *ppPageHeader = &pPages->BIOSPage1.u.fields.Header;
|
---|
2673 | *ppbPageData = pPages->BIOSPage1.u.abPageData;
|
---|
2674 | *pcbPage = sizeof(pPages->BIOSPage1);
|
---|
2675 | break;
|
---|
2676 | case 2:
|
---|
2677 | *ppPageHeader = &pPages->BIOSPage2.u.fields.Header;
|
---|
2678 | *ppbPageData = pPages->BIOSPage2.u.abPageData;
|
---|
2679 | *pcbPage = sizeof(pPages->BIOSPage2);
|
---|
2680 | break;
|
---|
2681 | case 4:
|
---|
2682 | *ppPageHeader = &pPages->BIOSPage4.u.fields.Header;
|
---|
2683 | *ppbPageData = pPages->BIOSPage4.u.abPageData;
|
---|
2684 | *pcbPage = sizeof(pPages->BIOSPage4);
|
---|
2685 | break;
|
---|
2686 | default:
|
---|
2687 | rc = VERR_NOT_FOUND;
|
---|
2688 | }
|
---|
2689 |
|
---|
2690 | return rc;
|
---|
2691 | }
|
---|
2692 |
|
---|
2693 | /**
|
---|
2694 | * Return the configuration page header and data
|
---|
2695 | * which matches the given page type and number.
|
---|
2696 | *
|
---|
2697 | * @returns VINF_SUCCESS if successful
|
---|
2698 | * VERR_NOT_FOUND if the requested page could be found.
|
---|
2699 | * @param pThis The LsiLogic controller instance data.
|
---|
2700 | * @param pPages The pages supported by the controller.
|
---|
2701 | * @param u8Port The port to retrieve the page for.
|
---|
2702 | * @param u8PageNumber Number of the page to get.
|
---|
2703 | * @param ppPageHeader Where to store the pointer to the page header.
|
---|
2704 | * @param ppbPageData Where to store the pointer to the page data.
|
---|
2705 | * @param pcbPage Where to store the size of the page data in bytes on success.
|
---|
2706 | */
|
---|
2707 | static int lsilogicR3ConfigurationSCSISPIPortPageGetFromNumber(PLSILOGICSCSI pThis,
|
---|
2708 | PMptConfigurationPagesSupported pPages,
|
---|
2709 | uint8_t u8Port,
|
---|
2710 | uint8_t u8PageNumber,
|
---|
2711 | PMptConfigurationPageHeader *ppPageHeader,
|
---|
2712 | uint8_t **ppbPageData, size_t *pcbPage)
|
---|
2713 | {
|
---|
2714 | RT_NOREF(pThis);
|
---|
2715 | int rc = VINF_SUCCESS;
|
---|
2716 | AssertPtr(ppPageHeader); Assert(ppbPageData);
|
---|
2717 |
|
---|
2718 |
|
---|
2719 | if (u8Port >= RT_ELEMENTS(pPages->u.SpiPages.aPortPages))
|
---|
2720 | return VERR_NOT_FOUND;
|
---|
2721 |
|
---|
2722 | switch (u8PageNumber)
|
---|
2723 | {
|
---|
2724 | case 0:
|
---|
2725 | *ppPageHeader = &pPages->u.SpiPages.aPortPages[u8Port].SCSISPIPortPage0.u.fields.Header;
|
---|
2726 | *ppbPageData = pPages->u.SpiPages.aPortPages[u8Port].SCSISPIPortPage0.u.abPageData;
|
---|
2727 | *pcbPage = sizeof(pPages->u.SpiPages.aPortPages[u8Port].SCSISPIPortPage0);
|
---|
2728 | break;
|
---|
2729 | case 1:
|
---|
2730 | *ppPageHeader = &pPages->u.SpiPages.aPortPages[u8Port].SCSISPIPortPage1.u.fields.Header;
|
---|
2731 | *ppbPageData = pPages->u.SpiPages.aPortPages[u8Port].SCSISPIPortPage1.u.abPageData;
|
---|
2732 | *pcbPage = sizeof(pPages->u.SpiPages.aPortPages[u8Port].SCSISPIPortPage1);
|
---|
2733 | break;
|
---|
2734 | case 2:
|
---|
2735 | *ppPageHeader = &pPages->u.SpiPages.aPortPages[u8Port].SCSISPIPortPage2.u.fields.Header;
|
---|
2736 | *ppbPageData = pPages->u.SpiPages.aPortPages[u8Port].SCSISPIPortPage2.u.abPageData;
|
---|
2737 | *pcbPage = sizeof(pPages->u.SpiPages.aPortPages[u8Port].SCSISPIPortPage2);
|
---|
2738 | break;
|
---|
2739 | default:
|
---|
2740 | rc = VERR_NOT_FOUND;
|
---|
2741 | }
|
---|
2742 |
|
---|
2743 | return rc;
|
---|
2744 | }
|
---|
2745 |
|
---|
2746 | /**
|
---|
2747 | * Return the configuration page header and data
|
---|
2748 | * which matches the given page type and number.
|
---|
2749 | *
|
---|
2750 | * @returns VINF_SUCCESS if successful
|
---|
2751 | * VERR_NOT_FOUND if the requested page could be found.
|
---|
2752 | * @param pThis The LsiLogic controller instance data.
|
---|
2753 | * @param pPages The pages supported by the controller.
|
---|
2754 | * @param u8Bus The bus the device is on the page should be returned.
|
---|
2755 | * @param u8TargetID The target ID of the device to return the page for.
|
---|
2756 | * @param u8PageNumber Number of the page to get.
|
---|
2757 | * @param ppPageHeader Where to store the pointer to the page header.
|
---|
2758 | * @param ppbPageData Where to store the pointer to the page data.
|
---|
2759 | * @param pcbPage Where to store the size of the page data in bytes on success.
|
---|
2760 | */
|
---|
2761 | static int lsilogicR3ConfigurationSCSISPIDevicePageGetFromNumber(PLSILOGICSCSI pThis,
|
---|
2762 | PMptConfigurationPagesSupported pPages,
|
---|
2763 | uint8_t u8Bus,
|
---|
2764 | uint8_t u8TargetID, uint8_t u8PageNumber,
|
---|
2765 | PMptConfigurationPageHeader *ppPageHeader,
|
---|
2766 | uint8_t **ppbPageData, size_t *pcbPage)
|
---|
2767 | {
|
---|
2768 | RT_NOREF(pThis);
|
---|
2769 | int rc = VINF_SUCCESS;
|
---|
2770 | AssertPtr(ppPageHeader); Assert(ppbPageData);
|
---|
2771 |
|
---|
2772 | if (u8Bus >= RT_ELEMENTS(pPages->u.SpiPages.aBuses))
|
---|
2773 | return VERR_NOT_FOUND;
|
---|
2774 |
|
---|
2775 | if (u8TargetID >= RT_ELEMENTS(pPages->u.SpiPages.aBuses[u8Bus].aDevicePages))
|
---|
2776 | return VERR_NOT_FOUND;
|
---|
2777 |
|
---|
2778 | switch (u8PageNumber)
|
---|
2779 | {
|
---|
2780 | case 0:
|
---|
2781 | *ppPageHeader = &pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage0.u.fields.Header;
|
---|
2782 | *ppbPageData = pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage0.u.abPageData;
|
---|
2783 | *pcbPage = sizeof(pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage0);
|
---|
2784 | break;
|
---|
2785 | case 1:
|
---|
2786 | *ppPageHeader = &pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage1.u.fields.Header;
|
---|
2787 | *ppbPageData = pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage1.u.abPageData;
|
---|
2788 | *pcbPage = sizeof(pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage1);
|
---|
2789 | break;
|
---|
2790 | case 2:
|
---|
2791 | *ppPageHeader = &pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage2.u.fields.Header;
|
---|
2792 | *ppbPageData = pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage2.u.abPageData;
|
---|
2793 | *pcbPage = sizeof(pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage2);
|
---|
2794 | break;
|
---|
2795 | case 3:
|
---|
2796 | *ppPageHeader = &pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage3.u.fields.Header;
|
---|
2797 | *ppbPageData = pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage3.u.abPageData;
|
---|
2798 | *pcbPage = sizeof(pPages->u.SpiPages.aBuses[u8Bus].aDevicePages[u8TargetID].SCSISPIDevicePage3);
|
---|
2799 | break;
|
---|
2800 | default:
|
---|
2801 | rc = VERR_NOT_FOUND;
|
---|
2802 | }
|
---|
2803 |
|
---|
2804 | return rc;
|
---|
2805 | }
|
---|
2806 |
|
---|
2807 | static int lsilogicR3ConfigurationSASIOUnitPageGetFromNumber(PLSILOGICSCSI pThis,
|
---|
2808 | PMptConfigurationPagesSupported pPages,
|
---|
2809 | uint8_t u8PageNumber,
|
---|
2810 | PMptExtendedConfigurationPageHeader *ppPageHeader,
|
---|
2811 | uint8_t **ppbPageData, size_t *pcbPage)
|
---|
2812 | {
|
---|
2813 | RT_NOREF(pThis);
|
---|
2814 | int rc = VINF_SUCCESS;
|
---|
2815 |
|
---|
2816 | switch (u8PageNumber)
|
---|
2817 | {
|
---|
2818 | case 0:
|
---|
2819 | *ppPageHeader = &pPages->u.SasPages.pSASIOUnitPage0->u.fields.ExtHeader;
|
---|
2820 | *ppbPageData = pPages->u.SasPages.pSASIOUnitPage0->u.abPageData;
|
---|
2821 | *pcbPage = pPages->u.SasPages.cbSASIOUnitPage0;
|
---|
2822 | break;
|
---|
2823 | case 1:
|
---|
2824 | *ppPageHeader = &pPages->u.SasPages.pSASIOUnitPage1->u.fields.ExtHeader;
|
---|
2825 | *ppbPageData = pPages->u.SasPages.pSASIOUnitPage1->u.abPageData;
|
---|
2826 | *pcbPage = pPages->u.SasPages.cbSASIOUnitPage1;
|
---|
2827 | break;
|
---|
2828 | case 2:
|
---|
2829 | *ppPageHeader = &pPages->u.SasPages.SASIOUnitPage2.u.fields.ExtHeader;
|
---|
2830 | *ppbPageData = pPages->u.SasPages.SASIOUnitPage2.u.abPageData;
|
---|
2831 | *pcbPage = sizeof(pPages->u.SasPages.SASIOUnitPage2);
|
---|
2832 | break;
|
---|
2833 | case 3:
|
---|
2834 | *ppPageHeader = &pPages->u.SasPages.SASIOUnitPage3.u.fields.ExtHeader;
|
---|
2835 | *ppbPageData = pPages->u.SasPages.SASIOUnitPage3.u.abPageData;
|
---|
2836 | *pcbPage = sizeof(pPages->u.SasPages.SASIOUnitPage3);
|
---|
2837 | break;
|
---|
2838 | default:
|
---|
2839 | rc = VERR_NOT_FOUND;
|
---|
2840 | }
|
---|
2841 |
|
---|
2842 | return rc;
|
---|
2843 | }
|
---|
2844 |
|
---|
2845 | static int lsilogicR3ConfigurationSASPHYPageGetFromNumber(PLSILOGICSCSI pThis,
|
---|
2846 | PMptConfigurationPagesSupported pPages,
|
---|
2847 | uint8_t u8PageNumber,
|
---|
2848 | MptConfigurationPageAddress PageAddress,
|
---|
2849 | PMptExtendedConfigurationPageHeader *ppPageHeader,
|
---|
2850 | uint8_t **ppbPageData, size_t *pcbPage)
|
---|
2851 | {
|
---|
2852 | RT_NOREF(pThis);
|
---|
2853 | int rc = VINF_SUCCESS;
|
---|
2854 | uint8_t uAddressForm = MPT_CONFIGURATION_PAGE_ADDRESS_GET_SAS_FORM(PageAddress);
|
---|
2855 | PMptConfigurationPagesSas pPagesSas = &pPages->u.SasPages;
|
---|
2856 | PMptPHY pPHYPages = NULL;
|
---|
2857 |
|
---|
2858 | Log(("Address form %d\n", uAddressForm));
|
---|
2859 |
|
---|
2860 | if (uAddressForm == 0) /* PHY number */
|
---|
2861 | {
|
---|
2862 | uint8_t u8PhyNumber = PageAddress.SASPHY.Form0.u8PhyNumber;
|
---|
2863 |
|
---|
2864 | Log(("PHY number %d\n", u8PhyNumber));
|
---|
2865 |
|
---|
2866 | if (u8PhyNumber >= pPagesSas->cPHYs)
|
---|
2867 | return VERR_NOT_FOUND;
|
---|
2868 |
|
---|
2869 | pPHYPages = &pPagesSas->paPHYs[u8PhyNumber];
|
---|
2870 | }
|
---|
2871 | else if (uAddressForm == 1) /* Index form */
|
---|
2872 | {
|
---|
2873 | uint16_t u16Index = PageAddress.SASPHY.Form1.u16Index;
|
---|
2874 |
|
---|
2875 | Log(("PHY index %d\n", u16Index));
|
---|
2876 |
|
---|
2877 | if (u16Index >= pPagesSas->cPHYs)
|
---|
2878 | return VERR_NOT_FOUND;
|
---|
2879 |
|
---|
2880 | pPHYPages = &pPagesSas->paPHYs[u16Index];
|
---|
2881 | }
|
---|
2882 | else
|
---|
2883 | rc = VERR_NOT_FOUND; /* Correct? */
|
---|
2884 |
|
---|
2885 | if (pPHYPages)
|
---|
2886 | {
|
---|
2887 | switch (u8PageNumber)
|
---|
2888 | {
|
---|
2889 | case 0:
|
---|
2890 | *ppPageHeader = &pPHYPages->SASPHYPage0.u.fields.ExtHeader;
|
---|
2891 | *ppbPageData = pPHYPages->SASPHYPage0.u.abPageData;
|
---|
2892 | *pcbPage = sizeof(pPHYPages->SASPHYPage0);
|
---|
2893 | break;
|
---|
2894 | case 1:
|
---|
2895 | *ppPageHeader = &pPHYPages->SASPHYPage1.u.fields.ExtHeader;
|
---|
2896 | *ppbPageData = pPHYPages->SASPHYPage1.u.abPageData;
|
---|
2897 | *pcbPage = sizeof(pPHYPages->SASPHYPage1);
|
---|
2898 | break;
|
---|
2899 | default:
|
---|
2900 | rc = VERR_NOT_FOUND;
|
---|
2901 | }
|
---|
2902 | }
|
---|
2903 | else
|
---|
2904 | rc = VERR_NOT_FOUND;
|
---|
2905 |
|
---|
2906 | return rc;
|
---|
2907 | }
|
---|
2908 |
|
---|
2909 | static int lsilogicR3ConfigurationSASDevicePageGetFromNumber(PLSILOGICSCSI pThis,
|
---|
2910 | PMptConfigurationPagesSupported pPages,
|
---|
2911 | uint8_t u8PageNumber,
|
---|
2912 | MptConfigurationPageAddress PageAddress,
|
---|
2913 | PMptExtendedConfigurationPageHeader *ppPageHeader,
|
---|
2914 | uint8_t **ppbPageData, size_t *pcbPage)
|
---|
2915 | {
|
---|
2916 | RT_NOREF(pThis);
|
---|
2917 | int rc = VINF_SUCCESS;
|
---|
2918 | uint8_t uAddressForm = MPT_CONFIGURATION_PAGE_ADDRESS_GET_SAS_FORM(PageAddress);
|
---|
2919 | PMptConfigurationPagesSas pPagesSas = &pPages->u.SasPages;
|
---|
2920 | PMptSASDevice pSASDevice = NULL;
|
---|
2921 |
|
---|
2922 | Log(("Address form %d\n", uAddressForm));
|
---|
2923 |
|
---|
2924 | if (uAddressForm == 0)
|
---|
2925 | {
|
---|
2926 | uint16_t u16Handle = PageAddress.SASDevice.Form0And2.u16Handle;
|
---|
2927 |
|
---|
2928 | Log(("Get next handle %#x\n", u16Handle));
|
---|
2929 |
|
---|
2930 | pSASDevice = pPagesSas->pSASDeviceHead;
|
---|
2931 |
|
---|
2932 | /* Get the first device? */
|
---|
2933 | if (u16Handle != 0xffff)
|
---|
2934 | {
|
---|
2935 | /* No, search for the right one. */
|
---|
2936 |
|
---|
2937 | while ( pSASDevice
|
---|
2938 | && pSASDevice->SASDevicePage0.u.fields.u16DevHandle != u16Handle)
|
---|
2939 | pSASDevice = pSASDevice->pNext;
|
---|
2940 |
|
---|
2941 | if (pSASDevice)
|
---|
2942 | pSASDevice = pSASDevice->pNext;
|
---|
2943 | }
|
---|
2944 | }
|
---|
2945 | else if (uAddressForm == 1)
|
---|
2946 | {
|
---|
2947 | uint8_t u8TargetID = PageAddress.SASDevice.Form1.u8TargetID;
|
---|
2948 | uint8_t u8Bus = PageAddress.SASDevice.Form1.u8Bus;
|
---|
2949 |
|
---|
2950 | Log(("u8TargetID=%d u8Bus=%d\n", u8TargetID, u8Bus));
|
---|
2951 |
|
---|
2952 | pSASDevice = pPagesSas->pSASDeviceHead;
|
---|
2953 |
|
---|
2954 | while ( pSASDevice
|
---|
2955 | && ( pSASDevice->SASDevicePage0.u.fields.u8TargetID != u8TargetID
|
---|
2956 | || pSASDevice->SASDevicePage0.u.fields.u8Bus != u8Bus))
|
---|
2957 | pSASDevice = pSASDevice->pNext;
|
---|
2958 | }
|
---|
2959 | else if (uAddressForm == 2)
|
---|
2960 | {
|
---|
2961 | uint16_t u16Handle = PageAddress.SASDevice.Form0And2.u16Handle;
|
---|
2962 |
|
---|
2963 | Log(("Handle %#x\n", u16Handle));
|
---|
2964 |
|
---|
2965 | pSASDevice = pPagesSas->pSASDeviceHead;
|
---|
2966 |
|
---|
2967 | while ( pSASDevice
|
---|
2968 | && pSASDevice->SASDevicePage0.u.fields.u16DevHandle != u16Handle)
|
---|
2969 | pSASDevice = pSASDevice->pNext;
|
---|
2970 | }
|
---|
2971 |
|
---|
2972 | if (pSASDevice)
|
---|
2973 | {
|
---|
2974 | switch (u8PageNumber)
|
---|
2975 | {
|
---|
2976 | case 0:
|
---|
2977 | *ppPageHeader = &pSASDevice->SASDevicePage0.u.fields.ExtHeader;
|
---|
2978 | *ppbPageData = pSASDevice->SASDevicePage0.u.abPageData;
|
---|
2979 | *pcbPage = sizeof(pSASDevice->SASDevicePage0);
|
---|
2980 | break;
|
---|
2981 | case 1:
|
---|
2982 | *ppPageHeader = &pSASDevice->SASDevicePage1.u.fields.ExtHeader;
|
---|
2983 | *ppbPageData = pSASDevice->SASDevicePage1.u.abPageData;
|
---|
2984 | *pcbPage = sizeof(pSASDevice->SASDevicePage1);
|
---|
2985 | break;
|
---|
2986 | case 2:
|
---|
2987 | *ppPageHeader = &pSASDevice->SASDevicePage2.u.fields.ExtHeader;
|
---|
2988 | *ppbPageData = pSASDevice->SASDevicePage2.u.abPageData;
|
---|
2989 | *pcbPage = sizeof(pSASDevice->SASDevicePage2);
|
---|
2990 | break;
|
---|
2991 | default:
|
---|
2992 | rc = VERR_NOT_FOUND;
|
---|
2993 | }
|
---|
2994 | }
|
---|
2995 | else
|
---|
2996 | rc = VERR_NOT_FOUND;
|
---|
2997 |
|
---|
2998 | return rc;
|
---|
2999 | }
|
---|
3000 |
|
---|
3001 | /**
|
---|
3002 | * Returns the extended configuration page header and data.
|
---|
3003 | * @returns VINF_SUCCESS if successful
|
---|
3004 | * VERR_NOT_FOUND if the requested page could be found.
|
---|
3005 | * @param pThis Pointer to the LsiLogic device state.
|
---|
3006 | * @param pConfigurationReq The configuration request.
|
---|
3007 | * @param ppPageHeader Where to return the pointer to the page header on success.
|
---|
3008 | * @param ppbPageData Where to store the pointer to the page data.
|
---|
3009 | * @param pcbPage Where to store the size of the page in bytes.
|
---|
3010 | */
|
---|
3011 | static int lsilogicR3ConfigurationPageGetExtended(PLSILOGICSCSI pThis, PMptConfigurationRequest pConfigurationReq,
|
---|
3012 | PMptExtendedConfigurationPageHeader *ppPageHeader,
|
---|
3013 | uint8_t **ppbPageData, size_t *pcbPage)
|
---|
3014 | {
|
---|
3015 | int rc = VINF_SUCCESS;
|
---|
3016 |
|
---|
3017 | Log(("Extended page requested:\n"));
|
---|
3018 | Log(("u8ExtPageType=%#x\n", pConfigurationReq->u8ExtPageType));
|
---|
3019 | Log(("u8ExtPageLength=%d\n", pConfigurationReq->u16ExtPageLength));
|
---|
3020 |
|
---|
3021 | switch (pConfigurationReq->u8ExtPageType)
|
---|
3022 | {
|
---|
3023 | case MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT:
|
---|
3024 | {
|
---|
3025 | rc = lsilogicR3ConfigurationSASIOUnitPageGetFromNumber(pThis,
|
---|
3026 | pThis->pConfigurationPages,
|
---|
3027 | pConfigurationReq->u8PageNumber,
|
---|
3028 | ppPageHeader, ppbPageData, pcbPage);
|
---|
3029 | break;
|
---|
3030 | }
|
---|
3031 | case MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASPHYS:
|
---|
3032 | {
|
---|
3033 | rc = lsilogicR3ConfigurationSASPHYPageGetFromNumber(pThis,
|
---|
3034 | pThis->pConfigurationPages,
|
---|
3035 | pConfigurationReq->u8PageNumber,
|
---|
3036 | pConfigurationReq->PageAddress,
|
---|
3037 | ppPageHeader, ppbPageData, pcbPage);
|
---|
3038 | break;
|
---|
3039 | }
|
---|
3040 | case MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASDEVICE:
|
---|
3041 | {
|
---|
3042 | rc = lsilogicR3ConfigurationSASDevicePageGetFromNumber(pThis,
|
---|
3043 | pThis->pConfigurationPages,
|
---|
3044 | pConfigurationReq->u8PageNumber,
|
---|
3045 | pConfigurationReq->PageAddress,
|
---|
3046 | ppPageHeader, ppbPageData, pcbPage);
|
---|
3047 | break;
|
---|
3048 | }
|
---|
3049 | case MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASEXPANDER: /* No expanders supported */
|
---|
3050 | case MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_ENCLOSURE: /* No enclosures supported */
|
---|
3051 | default:
|
---|
3052 | rc = VERR_NOT_FOUND;
|
---|
3053 | }
|
---|
3054 |
|
---|
3055 | return rc;
|
---|
3056 | }
|
---|
3057 |
|
---|
3058 | /**
|
---|
3059 | * Processes a Configuration request.
|
---|
3060 | *
|
---|
3061 | * @returns VBox status code.
|
---|
3062 | * @param pThis Pointer to the LsiLogic device state.
|
---|
3063 | * @param pConfigurationReq Pointer to the request structure.
|
---|
3064 | * @param pReply Pointer to the reply message frame
|
---|
3065 | */
|
---|
3066 | static int lsilogicR3ProcessConfigurationRequest(PLSILOGICSCSI pThis, PMptConfigurationRequest pConfigurationReq,
|
---|
3067 | PMptConfigurationReply pReply)
|
---|
3068 | {
|
---|
3069 | int rc = VINF_SUCCESS;
|
---|
3070 | uint8_t *pbPageData = NULL;
|
---|
3071 | PMptConfigurationPageHeader pPageHeader = NULL;
|
---|
3072 | PMptExtendedConfigurationPageHeader pExtPageHeader = NULL;
|
---|
3073 | uint8_t u8PageType;
|
---|
3074 | uint8_t u8PageAttribute;
|
---|
3075 | size_t cbPage = 0;
|
---|
3076 |
|
---|
3077 | LogFlowFunc(("pThis=%#p\n", pThis));
|
---|
3078 |
|
---|
3079 | u8PageType = MPT_CONFIGURATION_PAGE_TYPE_GET(pConfigurationReq->u8PageType);
|
---|
3080 | u8PageAttribute = MPT_CONFIGURATION_PAGE_ATTRIBUTE_GET(pConfigurationReq->u8PageType);
|
---|
3081 |
|
---|
3082 | Log(("GuestRequest:\n"));
|
---|
3083 | Log(("u8Action=%#x\n", pConfigurationReq->u8Action));
|
---|
3084 | Log(("u8PageType=%#x\n", u8PageType));
|
---|
3085 | Log(("u8PageNumber=%d\n", pConfigurationReq->u8PageNumber));
|
---|
3086 | Log(("u8PageLength=%d\n", pConfigurationReq->u8PageLength));
|
---|
3087 | Log(("u8PageVersion=%d\n", pConfigurationReq->u8PageVersion));
|
---|
3088 |
|
---|
3089 | /* Copy common bits from the request into the reply. */
|
---|
3090 | pReply->u8MessageLength = 6; /* 6 32bit D-Words. */
|
---|
3091 | pReply->u8Action = pConfigurationReq->u8Action;
|
---|
3092 | pReply->u8Function = pConfigurationReq->u8Function;
|
---|
3093 | pReply->u32MessageContext = pConfigurationReq->u32MessageContext;
|
---|
3094 |
|
---|
3095 | switch (u8PageType)
|
---|
3096 | {
|
---|
3097 | case MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT:
|
---|
3098 | {
|
---|
3099 | /* Get the page data. */
|
---|
3100 | rc = lsilogicR3ConfigurationIOUnitPageGetFromNumber(pThis,
|
---|
3101 | pThis->pConfigurationPages,
|
---|
3102 | pConfigurationReq->u8PageNumber,
|
---|
3103 | &pPageHeader, &pbPageData, &cbPage);
|
---|
3104 | break;
|
---|
3105 | }
|
---|
3106 | case MPT_CONFIGURATION_PAGE_TYPE_IOC:
|
---|
3107 | {
|
---|
3108 | /* Get the page data. */
|
---|
3109 | rc = lsilogicR3ConfigurationIOCPageGetFromNumber(pThis,
|
---|
3110 | pThis->pConfigurationPages,
|
---|
3111 | pConfigurationReq->u8PageNumber,
|
---|
3112 | &pPageHeader, &pbPageData, &cbPage);
|
---|
3113 | break;
|
---|
3114 | }
|
---|
3115 | case MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING:
|
---|
3116 | {
|
---|
3117 | /* Get the page data. */
|
---|
3118 | rc = lsilogicR3ConfigurationManufacturingPageGetFromNumber(pThis,
|
---|
3119 | pThis->pConfigurationPages,
|
---|
3120 | pConfigurationReq->u8PageNumber,
|
---|
3121 | &pPageHeader, &pbPageData, &cbPage);
|
---|
3122 | break;
|
---|
3123 | }
|
---|
3124 | case MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT:
|
---|
3125 | {
|
---|
3126 | /* Get the page data. */
|
---|
3127 | rc = lsilogicR3ConfigurationSCSISPIPortPageGetFromNumber(pThis,
|
---|
3128 | pThis->pConfigurationPages,
|
---|
3129 | pConfigurationReq->PageAddress.MPIPortNumber.u8PortNumber,
|
---|
3130 | pConfigurationReq->u8PageNumber,
|
---|
3131 | &pPageHeader, &pbPageData, &cbPage);
|
---|
3132 | break;
|
---|
3133 | }
|
---|
3134 | case MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE:
|
---|
3135 | {
|
---|
3136 | /* Get the page data. */
|
---|
3137 | rc = lsilogicR3ConfigurationSCSISPIDevicePageGetFromNumber(pThis,
|
---|
3138 | pThis->pConfigurationPages,
|
---|
3139 | pConfigurationReq->PageAddress.BusAndTargetId.u8Bus,
|
---|
3140 | pConfigurationReq->PageAddress.BusAndTargetId.u8TargetID,
|
---|
3141 | pConfigurationReq->u8PageNumber,
|
---|
3142 | &pPageHeader, &pbPageData, &cbPage);
|
---|
3143 | break;
|
---|
3144 | }
|
---|
3145 | case MPT_CONFIGURATION_PAGE_TYPE_BIOS:
|
---|
3146 | {
|
---|
3147 | rc = lsilogicR3ConfigurationBiosPageGetFromNumber(pThis,
|
---|
3148 | pThis->pConfigurationPages,
|
---|
3149 | pConfigurationReq->u8PageNumber,
|
---|
3150 | &pPageHeader, &pbPageData, &cbPage);
|
---|
3151 | break;
|
---|
3152 | }
|
---|
3153 | case MPT_CONFIGURATION_PAGE_TYPE_EXTENDED:
|
---|
3154 | {
|
---|
3155 | rc = lsilogicR3ConfigurationPageGetExtended(pThis,
|
---|
3156 | pConfigurationReq,
|
---|
3157 | &pExtPageHeader, &pbPageData, &cbPage);
|
---|
3158 | break;
|
---|
3159 | }
|
---|
3160 | default:
|
---|
3161 | rc = VERR_NOT_FOUND;
|
---|
3162 | }
|
---|
3163 |
|
---|
3164 | if (rc == VERR_NOT_FOUND)
|
---|
3165 | {
|
---|
3166 | Log(("Page not found\n"));
|
---|
3167 | pReply->u8PageType = pConfigurationReq->u8PageType;
|
---|
3168 | pReply->u8PageNumber = pConfigurationReq->u8PageNumber;
|
---|
3169 | pReply->u8PageLength = pConfigurationReq->u8PageLength;
|
---|
3170 | pReply->u8PageVersion = pConfigurationReq->u8PageVersion;
|
---|
3171 | pReply->u16IOCStatus = MPT_IOCSTATUS_CONFIG_INVALID_PAGE;
|
---|
3172 | return VINF_SUCCESS;
|
---|
3173 | }
|
---|
3174 |
|
---|
3175 | if (u8PageType == MPT_CONFIGURATION_PAGE_TYPE_EXTENDED)
|
---|
3176 | {
|
---|
3177 | pReply->u8PageType = pExtPageHeader->u8PageType;
|
---|
3178 | pReply->u8PageNumber = pExtPageHeader->u8PageNumber;
|
---|
3179 | pReply->u8PageVersion = pExtPageHeader->u8PageVersion;
|
---|
3180 | pReply->u8ExtPageType = pExtPageHeader->u8ExtPageType;
|
---|
3181 | pReply->u16ExtPageLength = pExtPageHeader->u16ExtPageLength;
|
---|
3182 |
|
---|
3183 | for (int i = 0; i < pExtPageHeader->u16ExtPageLength; i++)
|
---|
3184 | LogFlowFunc(("PageData[%d]=%#x\n", i, ((uint32_t *)pbPageData)[i]));
|
---|
3185 | }
|
---|
3186 | else
|
---|
3187 | {
|
---|
3188 | pReply->u8PageType = pPageHeader->u8PageType;
|
---|
3189 | pReply->u8PageNumber = pPageHeader->u8PageNumber;
|
---|
3190 | pReply->u8PageLength = pPageHeader->u8PageLength;
|
---|
3191 | pReply->u8PageVersion = pPageHeader->u8PageVersion;
|
---|
3192 |
|
---|
3193 | for (int i = 0; i < pReply->u8PageLength; i++)
|
---|
3194 | LogFlowFunc(("PageData[%d]=%#x\n", i, ((uint32_t *)pbPageData)[i]));
|
---|
3195 | }
|
---|
3196 |
|
---|
3197 | /*
|
---|
3198 | * Don't use the scatter gather handling code as the configuration request always have only one
|
---|
3199 | * simple element.
|
---|
3200 | */
|
---|
3201 | switch (pConfigurationReq->u8Action)
|
---|
3202 | {
|
---|
3203 | case MPT_CONFIGURATION_REQUEST_ACTION_DEFAULT: /* Nothing to do. We are always using the defaults. */
|
---|
3204 | case MPT_CONFIGURATION_REQUEST_ACTION_HEADER:
|
---|
3205 | {
|
---|
3206 | /* Already copied above nothing to do. */
|
---|
3207 | break;
|
---|
3208 | }
|
---|
3209 | case MPT_CONFIGURATION_REQUEST_ACTION_READ_NVRAM:
|
---|
3210 | case MPT_CONFIGURATION_REQUEST_ACTION_READ_CURRENT:
|
---|
3211 | case MPT_CONFIGURATION_REQUEST_ACTION_READ_DEFAULT:
|
---|
3212 | {
|
---|
3213 | uint32_t cbBuffer = pConfigurationReq->SimpleSGElement.u24Length;
|
---|
3214 | if (cbBuffer != 0)
|
---|
3215 | {
|
---|
3216 | RTGCPHYS GCPhysAddrPageBuffer = pConfigurationReq->SimpleSGElement.u32DataBufferAddressLow;
|
---|
3217 | if (pConfigurationReq->SimpleSGElement.f64BitAddress)
|
---|
3218 | GCPhysAddrPageBuffer |= (uint64_t)pConfigurationReq->SimpleSGElement.u32DataBufferAddressHigh << 32;
|
---|
3219 |
|
---|
3220 | PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhysAddrPageBuffer, pbPageData, RT_MIN(cbBuffer, cbPage));
|
---|
3221 | }
|
---|
3222 | break;
|
---|
3223 | }
|
---|
3224 | case MPT_CONFIGURATION_REQUEST_ACTION_WRITE_CURRENT:
|
---|
3225 | case MPT_CONFIGURATION_REQUEST_ACTION_WRITE_NVRAM:
|
---|
3226 | {
|
---|
3227 | uint32_t cbBuffer = pConfigurationReq->SimpleSGElement.u24Length;
|
---|
3228 | if (cbBuffer != 0)
|
---|
3229 | {
|
---|
3230 | RTGCPHYS GCPhysAddrPageBuffer = pConfigurationReq->SimpleSGElement.u32DataBufferAddressLow;
|
---|
3231 | if (pConfigurationReq->SimpleSGElement.f64BitAddress)
|
---|
3232 | GCPhysAddrPageBuffer |= (uint64_t)pConfigurationReq->SimpleSGElement.u32DataBufferAddressHigh << 32;
|
---|
3233 |
|
---|
3234 | LogFlow(("cbBuffer=%u cbPage=%u\n", cbBuffer, cbPage));
|
---|
3235 |
|
---|
3236 | PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhysAddrPageBuffer, pbPageData,
|
---|
3237 | RT_MIN(cbBuffer, cbPage));
|
---|
3238 | }
|
---|
3239 | break;
|
---|
3240 | }
|
---|
3241 | default:
|
---|
3242 | AssertMsgFailed(("todo\n"));
|
---|
3243 | }
|
---|
3244 |
|
---|
3245 | return VINF_SUCCESS;
|
---|
3246 | }
|
---|
3247 |
|
---|
3248 | /**
|
---|
3249 | * Initializes the configuration pages for the SPI SCSI controller.
|
---|
3250 | *
|
---|
3251 | * @returns nothing
|
---|
3252 | * @param pThis Pointer to the LsiLogic device state.
|
---|
3253 | */
|
---|
3254 | static void lsilogicR3InitializeConfigurationPagesSpi(PLSILOGICSCSI pThis)
|
---|
3255 | {
|
---|
3256 | PMptConfigurationPagesSpi pPages = &pThis->pConfigurationPages->u.SpiPages;
|
---|
3257 |
|
---|
3258 | AssertMsg(pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI, ("Controller is not the SPI SCSI one\n"));
|
---|
3259 |
|
---|
3260 | LogFlowFunc(("pThis=%#p\n", pThis));
|
---|
3261 |
|
---|
3262 | /* Clear everything first. */
|
---|
3263 | memset(pPages, 0, sizeof(MptConfigurationPagesSpi));
|
---|
3264 |
|
---|
3265 | for (unsigned i = 0; i < RT_ELEMENTS(pPages->aPortPages); i++)
|
---|
3266 | {
|
---|
3267 | /* SCSI-SPI port page 0. */
|
---|
3268 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.Header.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY
|
---|
3269 | | MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT;
|
---|
3270 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.Header.u8PageNumber = 0;
|
---|
3271 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.Header.u8PageLength = sizeof(MptConfigurationPageSCSISPIPort0) / 4;
|
---|
3272 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.fInformationUnitTransfersCapable = true;
|
---|
3273 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.fDTCapable = true;
|
---|
3274 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.fQASCapable = true;
|
---|
3275 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.u8MinimumSynchronousTransferPeriod = 0;
|
---|
3276 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.u8MaximumSynchronousOffset = 0xff;
|
---|
3277 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.fWide = true;
|
---|
3278 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.fAIPCapable = true;
|
---|
3279 | pPages->aPortPages[i].SCSISPIPortPage0.u.fields.u2SignalingType = 0x3; /* Single Ended. */
|
---|
3280 |
|
---|
3281 | /* SCSI-SPI port page 1. */
|
---|
3282 | pPages->aPortPages[i].SCSISPIPortPage1.u.fields.Header.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE
|
---|
3283 | | MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT;
|
---|
3284 | pPages->aPortPages[i].SCSISPIPortPage1.u.fields.Header.u8PageNumber = 1;
|
---|
3285 | pPages->aPortPages[i].SCSISPIPortPage1.u.fields.Header.u8PageLength = sizeof(MptConfigurationPageSCSISPIPort1) / 4;
|
---|
3286 | pPages->aPortPages[i].SCSISPIPortPage1.u.fields.u8SCSIID = 7;
|
---|
3287 | pPages->aPortPages[i].SCSISPIPortPage1.u.fields.u16PortResponseIDsBitmask = (1 << 7);
|
---|
3288 | pPages->aPortPages[i].SCSISPIPortPage1.u.fields.u32OnBusTimerValue = 0;
|
---|
3289 |
|
---|
3290 | /* SCSI-SPI port page 2. */
|
---|
3291 | pPages->aPortPages[i].SCSISPIPortPage2.u.fields.Header.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE
|
---|
3292 | | MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT;
|
---|
3293 | pPages->aPortPages[i].SCSISPIPortPage2.u.fields.Header.u8PageNumber = 2;
|
---|
3294 | pPages->aPortPages[i].SCSISPIPortPage2.u.fields.Header.u8PageLength = sizeof(MptConfigurationPageSCSISPIPort2) / 4;
|
---|
3295 | pPages->aPortPages[i].SCSISPIPortPage2.u.fields.u4HostSCSIID = 7;
|
---|
3296 | pPages->aPortPages[i].SCSISPIPortPage2.u.fields.u2InitializeHBA = 0x3;
|
---|
3297 | pPages->aPortPages[i].SCSISPIPortPage2.u.fields.fTerminationDisabled = true;
|
---|
3298 | for (unsigned iDevice = 0; iDevice < RT_ELEMENTS(pPages->aPortPages[i].SCSISPIPortPage2.u.fields.aDeviceSettings); iDevice++)
|
---|
3299 | {
|
---|
3300 | pPages->aPortPages[i].SCSISPIPortPage2.u.fields.aDeviceSettings[iDevice].fBootChoice = true;
|
---|
3301 | }
|
---|
3302 | /* Everything else 0 for now. */
|
---|
3303 | }
|
---|
3304 |
|
---|
3305 | for (unsigned uBusCurr = 0; uBusCurr < RT_ELEMENTS(pPages->aBuses); uBusCurr++)
|
---|
3306 | {
|
---|
3307 | for (unsigned uDeviceCurr = 0; uDeviceCurr < RT_ELEMENTS(pPages->aBuses[uBusCurr].aDevicePages); uDeviceCurr++)
|
---|
3308 | {
|
---|
3309 | /* SCSI-SPI device page 0. */
|
---|
3310 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage0.u.fields.Header.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY
|
---|
3311 | | MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE;
|
---|
3312 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage0.u.fields.Header.u8PageNumber = 0;
|
---|
3313 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage0.u.fields.Header.u8PageLength = sizeof(MptConfigurationPageSCSISPIDevice0) / 4;
|
---|
3314 | /* Everything else 0 for now. */
|
---|
3315 |
|
---|
3316 | /* SCSI-SPI device page 1. */
|
---|
3317 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage1.u.fields.Header.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE
|
---|
3318 | | MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE;
|
---|
3319 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage1.u.fields.Header.u8PageNumber = 1;
|
---|
3320 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage1.u.fields.Header.u8PageLength = sizeof(MptConfigurationPageSCSISPIDevice1) / 4;
|
---|
3321 | /* Everything else 0 for now. */
|
---|
3322 |
|
---|
3323 | /* SCSI-SPI device page 2. */
|
---|
3324 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage2.u.fields.Header.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE
|
---|
3325 | | MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE;
|
---|
3326 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage2.u.fields.Header.u8PageNumber = 2;
|
---|
3327 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage2.u.fields.Header.u8PageLength = sizeof(MptConfigurationPageSCSISPIDevice2) / 4;
|
---|
3328 | /* Everything else 0 for now. */
|
---|
3329 |
|
---|
3330 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage3.u.fields.Header.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY
|
---|
3331 | | MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE;
|
---|
3332 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage3.u.fields.Header.u8PageNumber = 3;
|
---|
3333 | pPages->aBuses[uBusCurr].aDevicePages[uDeviceCurr].SCSISPIDevicePage3.u.fields.Header.u8PageLength = sizeof(MptConfigurationPageSCSISPIDevice3) / 4;
|
---|
3334 | /* Everything else 0 for now. */
|
---|
3335 | }
|
---|
3336 | }
|
---|
3337 | }
|
---|
3338 |
|
---|
3339 | /**
|
---|
3340 | * Generates a handle.
|
---|
3341 | *
|
---|
3342 | * @returns the handle.
|
---|
3343 | * @param pThis Pointer to the LsiLogic device state.
|
---|
3344 | */
|
---|
3345 | DECLINLINE(uint16_t) lsilogicGetHandle(PLSILOGICSCSI pThis)
|
---|
3346 | {
|
---|
3347 | uint16_t u16Handle = pThis->u16NextHandle++;
|
---|
3348 | return u16Handle;
|
---|
3349 | }
|
---|
3350 |
|
---|
3351 | /**
|
---|
3352 | * Generates a SAS address (WWID)
|
---|
3353 | *
|
---|
3354 | * @returns nothing.
|
---|
3355 | * @param pSASAddress Pointer to an unitialised SAS address.
|
---|
3356 | * @param iId iId which will go into the address.
|
---|
3357 | *
|
---|
3358 | * @todo Generate better SAS addresses. (Request a block from SUN probably)
|
---|
3359 | */
|
---|
3360 | void lsilogicSASAddressGenerate(PSASADDRESS pSASAddress, unsigned iId)
|
---|
3361 | {
|
---|
3362 | pSASAddress->u8Address[0] = (0x5 << 5);
|
---|
3363 | pSASAddress->u8Address[1] = 0x01;
|
---|
3364 | pSASAddress->u8Address[2] = 0x02;
|
---|
3365 | pSASAddress->u8Address[3] = 0x03;
|
---|
3366 | pSASAddress->u8Address[4] = 0x04;
|
---|
3367 | pSASAddress->u8Address[5] = 0x05;
|
---|
3368 | pSASAddress->u8Address[6] = 0x06;
|
---|
3369 | pSASAddress->u8Address[7] = iId;
|
---|
3370 | }
|
---|
3371 |
|
---|
3372 | /**
|
---|
3373 | * Initializes the configuration pages for the SAS SCSI controller.
|
---|
3374 | *
|
---|
3375 | * @returns nothing
|
---|
3376 | * @param pThis Pointer to the LsiLogic device state.
|
---|
3377 | */
|
---|
3378 | static void lsilogicR3InitializeConfigurationPagesSas(PLSILOGICSCSI pThis)
|
---|
3379 | {
|
---|
3380 | PMptConfigurationPagesSas pPages = &pThis->pConfigurationPages->u.SasPages;
|
---|
3381 |
|
---|
3382 | AssertMsg(pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS, ("Controller is not the SAS SCSI one\n"));
|
---|
3383 |
|
---|
3384 | LogFlowFunc(("pThis=%#p\n", pThis));
|
---|
3385 |
|
---|
3386 | /* Manufacturing Page 7 - Connector settings. */
|
---|
3387 | pPages->cbManufacturingPage7 = LSILOGICSCSI_MANUFACTURING7_GET_SIZE(pThis->cPorts);
|
---|
3388 | PMptConfigurationPageManufacturing7 pManufacturingPage7 = (PMptConfigurationPageManufacturing7)RTMemAllocZ(pPages->cbManufacturingPage7);
|
---|
3389 | AssertPtr(pManufacturingPage7);
|
---|
3390 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(pManufacturingPage7,
|
---|
3391 | 0, 7,
|
---|
3392 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY);
|
---|
3393 | /* Set size manually. */
|
---|
3394 | if (pPages->cbManufacturingPage7 / 4 > 255)
|
---|
3395 | pManufacturingPage7->u.fields.Header.u8PageLength = 255;
|
---|
3396 | else
|
---|
3397 | pManufacturingPage7->u.fields.Header.u8PageLength = pPages->cbManufacturingPage7 / 4;
|
---|
3398 | pManufacturingPage7->u.fields.u8NumPhys = pThis->cPorts;
|
---|
3399 | pPages->pManufacturingPage7 = pManufacturingPage7;
|
---|
3400 |
|
---|
3401 | /* SAS I/O unit page 0 - Port specific information. */
|
---|
3402 | pPages->cbSASIOUnitPage0 = LSILOGICSCSI_SASIOUNIT0_GET_SIZE(pThis->cPorts);
|
---|
3403 | PMptConfigurationPageSASIOUnit0 pSASPage0 = (PMptConfigurationPageSASIOUnit0)RTMemAllocZ(pPages->cbSASIOUnitPage0);
|
---|
3404 | AssertPtr(pSASPage0);
|
---|
3405 |
|
---|
3406 | MPT_CONFIG_EXTENDED_PAGE_HEADER_INIT(pSASPage0, pPages->cbSASIOUnitPage0,
|
---|
3407 | 0, MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY,
|
---|
3408 | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT);
|
---|
3409 | pSASPage0->u.fields.u8NumPhys = pThis->cPorts;
|
---|
3410 | pPages->pSASIOUnitPage0 = pSASPage0;
|
---|
3411 |
|
---|
3412 | /* SAS I/O unit page 1 - Port specific settings. */
|
---|
3413 | pPages->cbSASIOUnitPage1 = LSILOGICSCSI_SASIOUNIT1_GET_SIZE(pThis->cPorts);
|
---|
3414 | PMptConfigurationPageSASIOUnit1 pSASPage1 = (PMptConfigurationPageSASIOUnit1)RTMemAllocZ(pPages->cbSASIOUnitPage1);
|
---|
3415 | AssertPtr(pSASPage1);
|
---|
3416 |
|
---|
3417 | MPT_CONFIG_EXTENDED_PAGE_HEADER_INIT(pSASPage1, pPages->cbSASIOUnitPage1,
|
---|
3418 | 1, MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE,
|
---|
3419 | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT);
|
---|
3420 | pSASPage1->u.fields.u8NumPhys = pSASPage0->u.fields.u8NumPhys;
|
---|
3421 | pSASPage1->u.fields.u16ControlFlags = 0;
|
---|
3422 | pSASPage1->u.fields.u16AdditionalControlFlags = 0;
|
---|
3423 | pPages->pSASIOUnitPage1 = pSASPage1;
|
---|
3424 |
|
---|
3425 | /* SAS I/O unit page 2 - Port specific information. */
|
---|
3426 | pPages->SASIOUnitPage2.u.fields.ExtHeader.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY
|
---|
3427 | | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED;
|
---|
3428 | pPages->SASIOUnitPage2.u.fields.ExtHeader.u8PageNumber = 2;
|
---|
3429 | pPages->SASIOUnitPage2.u.fields.ExtHeader.u8ExtPageType = MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT;
|
---|
3430 | pPages->SASIOUnitPage2.u.fields.ExtHeader.u16ExtPageLength = sizeof(MptConfigurationPageSASIOUnit2) / 4;
|
---|
3431 |
|
---|
3432 | /* SAS I/O unit page 3 - Port specific information. */
|
---|
3433 | pPages->SASIOUnitPage3.u.fields.ExtHeader.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY
|
---|
3434 | | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED;
|
---|
3435 | pPages->SASIOUnitPage3.u.fields.ExtHeader.u8PageNumber = 3;
|
---|
3436 | pPages->SASIOUnitPage3.u.fields.ExtHeader.u8ExtPageType = MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT;
|
---|
3437 | pPages->SASIOUnitPage3.u.fields.ExtHeader.u16ExtPageLength = sizeof(MptConfigurationPageSASIOUnit3) / 4;
|
---|
3438 |
|
---|
3439 | pPages->cPHYs = pThis->cPorts;
|
---|
3440 | pPages->paPHYs = (PMptPHY)RTMemAllocZ(pPages->cPHYs * sizeof(MptPHY));
|
---|
3441 | AssertPtr(pPages->paPHYs);
|
---|
3442 |
|
---|
3443 | /* Initialize the PHY configuration */
|
---|
3444 | for (unsigned i = 0; i < pThis->cPorts; i++)
|
---|
3445 | {
|
---|
3446 | PMptPHY pPHYPages = &pPages->paPHYs[i];
|
---|
3447 | uint16_t u16ControllerHandle = lsilogicGetHandle(pThis);
|
---|
3448 |
|
---|
3449 | pManufacturingPage7->u.fields.aPHY[i].u8Location = LSILOGICSCSI_MANUFACTURING7_LOCATION_AUTO;
|
---|
3450 |
|
---|
3451 | pSASPage0->u.fields.aPHY[i].u8Port = i;
|
---|
3452 | pSASPage0->u.fields.aPHY[i].u8PortFlags = 0;
|
---|
3453 | pSASPage0->u.fields.aPHY[i].u8PhyFlags = 0;
|
---|
3454 | pSASPage0->u.fields.aPHY[i].u8NegotiatedLinkRate = LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_FAILED;
|
---|
3455 | pSASPage0->u.fields.aPHY[i].u32ControllerPhyDeviceInfo = LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_NO);
|
---|
3456 | pSASPage0->u.fields.aPHY[i].u16ControllerDevHandle = u16ControllerHandle;
|
---|
3457 | pSASPage0->u.fields.aPHY[i].u16AttachedDevHandle = 0; /* No device attached. */
|
---|
3458 | pSASPage0->u.fields.aPHY[i].u32DiscoveryStatus = 0; /* No errors */
|
---|
3459 |
|
---|
3460 | pSASPage1->u.fields.aPHY[i].u8Port = i;
|
---|
3461 | pSASPage1->u.fields.aPHY[i].u8PortFlags = 0;
|
---|
3462 | pSASPage1->u.fields.aPHY[i].u8PhyFlags = 0;
|
---|
3463 | pSASPage1->u.fields.aPHY[i].u8MaxMinLinkRate = LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_SET(LSILOGICSCSI_SASIOUNIT1_LINK_RATE_15GB)
|
---|
3464 | | LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_SET(LSILOGICSCSI_SASIOUNIT1_LINK_RATE_30GB);
|
---|
3465 | pSASPage1->u.fields.aPHY[i].u32ControllerPhyDeviceInfo = LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_NO);
|
---|
3466 |
|
---|
3467 | /* SAS PHY page 0. */
|
---|
3468 | pPHYPages->SASPHYPage0.u.fields.ExtHeader.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY
|
---|
3469 | | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED;
|
---|
3470 | pPHYPages->SASPHYPage0.u.fields.ExtHeader.u8PageNumber = 0;
|
---|
3471 | pPHYPages->SASPHYPage0.u.fields.ExtHeader.u8ExtPageType = MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASPHYS;
|
---|
3472 | pPHYPages->SASPHYPage0.u.fields.ExtHeader.u16ExtPageLength = sizeof(MptConfigurationPageSASPHY0) / 4;
|
---|
3473 | pPHYPages->SASPHYPage0.u.fields.u8AttachedPhyIdentifier = i;
|
---|
3474 | pPHYPages->SASPHYPage0.u.fields.u32AttachedDeviceInfo = LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_SET(LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_NO);
|
---|
3475 | pPHYPages->SASPHYPage0.u.fields.u8ProgrammedLinkRate = LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_SET(LSILOGICSCSI_SASIOUNIT1_LINK_RATE_15GB)
|
---|
3476 | | LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_SET(LSILOGICSCSI_SASIOUNIT1_LINK_RATE_30GB);
|
---|
3477 | pPHYPages->SASPHYPage0.u.fields.u8HwLinkRate = LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_SET(LSILOGICSCSI_SASIOUNIT1_LINK_RATE_15GB)
|
---|
3478 | | LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_SET(LSILOGICSCSI_SASIOUNIT1_LINK_RATE_30GB);
|
---|
3479 |
|
---|
3480 | /* SAS PHY page 1. */
|
---|
3481 | pPHYPages->SASPHYPage1.u.fields.ExtHeader.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY
|
---|
3482 | | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED;
|
---|
3483 | pPHYPages->SASPHYPage1.u.fields.ExtHeader.u8PageNumber = 1;
|
---|
3484 | pPHYPages->SASPHYPage1.u.fields.ExtHeader.u8ExtPageType = MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASPHYS;
|
---|
3485 | pPHYPages->SASPHYPage1.u.fields.ExtHeader.u16ExtPageLength = sizeof(MptConfigurationPageSASPHY1) / 4;
|
---|
3486 |
|
---|
3487 | /* Settings for present devices. */
|
---|
3488 | if (pThis->paDeviceStates[i].pDrvBase)
|
---|
3489 | {
|
---|
3490 | uint16_t u16DeviceHandle = lsilogicGetHandle(pThis);
|
---|
3491 | SASADDRESS SASAddress;
|
---|
3492 | PMptSASDevice pSASDevice = (PMptSASDevice)RTMemAllocZ(sizeof(MptSASDevice));
|
---|
3493 | AssertPtr(pSASDevice);
|
---|
3494 |
|
---|
3495 | memset(&SASAddress, 0, sizeof(SASADDRESS));
|
---|
3496 | lsilogicSASAddressGenerate(&SASAddress, i);
|
---|
3497 |
|
---|
3498 | pSASPage0->u.fields.aPHY[i].u8NegotiatedLinkRate = LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SET(LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_30GB);
|
---|
3499 | pSASPage0->u.fields.aPHY[i].u32ControllerPhyDeviceInfo = LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_END)
|
---|
3500 | | LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_TARGET;
|
---|
3501 | pSASPage0->u.fields.aPHY[i].u16AttachedDevHandle = u16DeviceHandle;
|
---|
3502 | pSASPage1->u.fields.aPHY[i].u32ControllerPhyDeviceInfo = LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_END)
|
---|
3503 | | LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_TARGET;
|
---|
3504 | pSASPage0->u.fields.aPHY[i].u16ControllerDevHandle = u16DeviceHandle;
|
---|
3505 |
|
---|
3506 | pPHYPages->SASPHYPage0.u.fields.u32AttachedDeviceInfo = LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_SET(LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_END);
|
---|
3507 | pPHYPages->SASPHYPage0.u.fields.SASAddress = SASAddress;
|
---|
3508 | pPHYPages->SASPHYPage0.u.fields.u16OwnerDevHandle = u16DeviceHandle;
|
---|
3509 | pPHYPages->SASPHYPage0.u.fields.u16AttachedDevHandle = u16DeviceHandle;
|
---|
3510 |
|
---|
3511 | /* SAS device page 0. */
|
---|
3512 | pSASDevice->SASDevicePage0.u.fields.ExtHeader.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY
|
---|
3513 | | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED;
|
---|
3514 | pSASDevice->SASDevicePage0.u.fields.ExtHeader.u8PageNumber = 0;
|
---|
3515 | pSASDevice->SASDevicePage0.u.fields.ExtHeader.u8ExtPageType = MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASDEVICE;
|
---|
3516 | pSASDevice->SASDevicePage0.u.fields.ExtHeader.u16ExtPageLength = sizeof(MptConfigurationPageSASDevice0) / 4;
|
---|
3517 | pSASDevice->SASDevicePage0.u.fields.SASAddress = SASAddress;
|
---|
3518 | pSASDevice->SASDevicePage0.u.fields.u16ParentDevHandle = u16ControllerHandle;
|
---|
3519 | pSASDevice->SASDevicePage0.u.fields.u8PhyNum = i;
|
---|
3520 | pSASDevice->SASDevicePage0.u.fields.u8AccessStatus = LSILOGICSCSI_SASDEVICE0_STATUS_NO_ERRORS;
|
---|
3521 | pSASDevice->SASDevicePage0.u.fields.u16DevHandle = u16DeviceHandle;
|
---|
3522 | pSASDevice->SASDevicePage0.u.fields.u8TargetID = i;
|
---|
3523 | pSASDevice->SASDevicePage0.u.fields.u8Bus = 0;
|
---|
3524 | pSASDevice->SASDevicePage0.u.fields.u32DeviceInfo = LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_SET(LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_END)
|
---|
3525 | | LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_TARGET;
|
---|
3526 | pSASDevice->SASDevicePage0.u.fields.u16Flags = LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_PRESENT
|
---|
3527 | | LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPED_TO_BUS_AND_TARGET_ID
|
---|
3528 | | LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPING_PERSISTENT;
|
---|
3529 | pSASDevice->SASDevicePage0.u.fields.u8PhysicalPort = i;
|
---|
3530 |
|
---|
3531 | /* SAS device page 1. */
|
---|
3532 | pSASDevice->SASDevicePage1.u.fields.ExtHeader.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY
|
---|
3533 | | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED;
|
---|
3534 | pSASDevice->SASDevicePage1.u.fields.ExtHeader.u8PageNumber = 1;
|
---|
3535 | pSASDevice->SASDevicePage1.u.fields.ExtHeader.u8ExtPageType = MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASDEVICE;
|
---|
3536 | pSASDevice->SASDevicePage1.u.fields.ExtHeader.u16ExtPageLength = sizeof(MptConfigurationPageSASDevice1) / 4;
|
---|
3537 | pSASDevice->SASDevicePage1.u.fields.SASAddress = SASAddress;
|
---|
3538 | pSASDevice->SASDevicePage1.u.fields.u16DevHandle = u16DeviceHandle;
|
---|
3539 | pSASDevice->SASDevicePage1.u.fields.u8TargetID = i;
|
---|
3540 | pSASDevice->SASDevicePage1.u.fields.u8Bus = 0;
|
---|
3541 |
|
---|
3542 | /* SAS device page 2. */
|
---|
3543 | pSASDevice->SASDevicePage2.u.fields.ExtHeader.u8PageType = MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY
|
---|
3544 | | MPT_CONFIGURATION_PAGE_TYPE_EXTENDED;
|
---|
3545 | pSASDevice->SASDevicePage2.u.fields.ExtHeader.u8PageNumber = 2;
|
---|
3546 | pSASDevice->SASDevicePage2.u.fields.ExtHeader.u8ExtPageType = MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASDEVICE;
|
---|
3547 | pSASDevice->SASDevicePage2.u.fields.ExtHeader.u16ExtPageLength = sizeof(MptConfigurationPageSASDevice2) / 4;
|
---|
3548 | pSASDevice->SASDevicePage2.u.fields.SASAddress = SASAddress;
|
---|
3549 |
|
---|
3550 | /* Link into device list. */
|
---|
3551 | if (!pPages->cDevices)
|
---|
3552 | {
|
---|
3553 | pPages->pSASDeviceHead = pSASDevice;
|
---|
3554 | pPages->pSASDeviceTail = pSASDevice;
|
---|
3555 | pPages->cDevices = 1;
|
---|
3556 | }
|
---|
3557 | else
|
---|
3558 | {
|
---|
3559 | pSASDevice->pPrev = pPages->pSASDeviceTail;
|
---|
3560 | pPages->pSASDeviceTail->pNext = pSASDevice;
|
---|
3561 | pPages->pSASDeviceTail = pSASDevice;
|
---|
3562 | pPages->cDevices++;
|
---|
3563 | }
|
---|
3564 | }
|
---|
3565 | }
|
---|
3566 | }
|
---|
3567 |
|
---|
3568 | /**
|
---|
3569 | * Initializes the configuration pages.
|
---|
3570 | *
|
---|
3571 | * @returns nothing
|
---|
3572 | * @param pThis Pointer to the LsiLogic device state.
|
---|
3573 | */
|
---|
3574 | static void lsilogicR3InitializeConfigurationPages(PLSILOGICSCSI pThis)
|
---|
3575 | {
|
---|
3576 | /* Initialize the common pages. */
|
---|
3577 | PMptConfigurationPagesSupported pPages = (PMptConfigurationPagesSupported)RTMemAllocZ(sizeof(MptConfigurationPagesSupported));
|
---|
3578 |
|
---|
3579 | pThis->pConfigurationPages = pPages;
|
---|
3580 |
|
---|
3581 | LogFlowFunc(("pThis=%#p\n", pThis));
|
---|
3582 |
|
---|
3583 | /* Clear everything first. */
|
---|
3584 | memset(pPages, 0, sizeof(MptConfigurationPagesSupported));
|
---|
3585 |
|
---|
3586 | /* Manufacturing Page 0. */
|
---|
3587 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(&pPages->ManufacturingPage0,
|
---|
3588 | MptConfigurationPageManufacturing0, 0,
|
---|
3589 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY);
|
---|
3590 | strncpy((char *)pPages->ManufacturingPage0.u.fields.abChipName, "VBox MPT Fusion", 16);
|
---|
3591 | strncpy((char *)pPages->ManufacturingPage0.u.fields.abChipRevision, "1.0", 8);
|
---|
3592 | strncpy((char *)pPages->ManufacturingPage0.u.fields.abBoardName, "VBox MPT Fusion", 16);
|
---|
3593 | strncpy((char *)pPages->ManufacturingPage0.u.fields.abBoardAssembly, "SUN", 8);
|
---|
3594 | strncpy((char *)pPages->ManufacturingPage0.u.fields.abBoardTracerNumber, "CAFECAFECAFECAFE", 16);
|
---|
3595 |
|
---|
3596 | /* Manufacturing Page 1 - I don't know what this contains so we leave it 0 for now. */
|
---|
3597 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(&pPages->ManufacturingPage1,
|
---|
3598 | MptConfigurationPageManufacturing1, 1,
|
---|
3599 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY);
|
---|
3600 |
|
---|
3601 | /* Manufacturing Page 2. */
|
---|
3602 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(&pPages->ManufacturingPage2,
|
---|
3603 | MptConfigurationPageManufacturing2, 2,
|
---|
3604 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY);
|
---|
3605 |
|
---|
3606 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
3607 | {
|
---|
3608 | pPages->ManufacturingPage2.u.fields.u16PCIDeviceID = LSILOGICSCSI_PCI_SPI_DEVICE_ID;
|
---|
3609 | pPages->ManufacturingPage2.u.fields.u8PCIRevisionID = LSILOGICSCSI_PCI_SPI_REVISION_ID;
|
---|
3610 | }
|
---|
3611 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
3612 | {
|
---|
3613 | pPages->ManufacturingPage2.u.fields.u16PCIDeviceID = LSILOGICSCSI_PCI_SAS_DEVICE_ID;
|
---|
3614 | pPages->ManufacturingPage2.u.fields.u8PCIRevisionID = LSILOGICSCSI_PCI_SAS_REVISION_ID;
|
---|
3615 | }
|
---|
3616 |
|
---|
3617 | /* Manufacturing Page 3. */
|
---|
3618 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(&pPages->ManufacturingPage3,
|
---|
3619 | MptConfigurationPageManufacturing3, 3,
|
---|
3620 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY);
|
---|
3621 |
|
---|
3622 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
3623 | {
|
---|
3624 | pPages->ManufacturingPage3.u.fields.u16PCIDeviceID = LSILOGICSCSI_PCI_SPI_DEVICE_ID;
|
---|
3625 | pPages->ManufacturingPage3.u.fields.u8PCIRevisionID = LSILOGICSCSI_PCI_SPI_REVISION_ID;
|
---|
3626 | }
|
---|
3627 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
3628 | {
|
---|
3629 | pPages->ManufacturingPage3.u.fields.u16PCIDeviceID = LSILOGICSCSI_PCI_SAS_DEVICE_ID;
|
---|
3630 | pPages->ManufacturingPage3.u.fields.u8PCIRevisionID = LSILOGICSCSI_PCI_SAS_REVISION_ID;
|
---|
3631 | }
|
---|
3632 |
|
---|
3633 | /* Manufacturing Page 4 - I don't know what this contains so we leave it 0 for now. */
|
---|
3634 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(&pPages->ManufacturingPage4,
|
---|
3635 | MptConfigurationPageManufacturing4, 4,
|
---|
3636 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY);
|
---|
3637 |
|
---|
3638 | /* Manufacturing Page 5 - WWID settings. */
|
---|
3639 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(&pPages->ManufacturingPage5,
|
---|
3640 | MptConfigurationPageManufacturing5, 5,
|
---|
3641 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY);
|
---|
3642 |
|
---|
3643 | /* Manufacturing Page 6 - Product specific settings. */
|
---|
3644 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(&pPages->ManufacturingPage6,
|
---|
3645 | MptConfigurationPageManufacturing6, 6,
|
---|
3646 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE);
|
---|
3647 |
|
---|
3648 | /* Manufacturing Page 8 - Product specific settings. */
|
---|
3649 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(&pPages->ManufacturingPage8,
|
---|
3650 | MptConfigurationPageManufacturing8, 8,
|
---|
3651 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE);
|
---|
3652 |
|
---|
3653 | /* Manufacturing Page 9 - Product specific settings. */
|
---|
3654 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(&pPages->ManufacturingPage9,
|
---|
3655 | MptConfigurationPageManufacturing9, 9,
|
---|
3656 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE);
|
---|
3657 |
|
---|
3658 | /* Manufacturing Page 10 - Product specific settings. */
|
---|
3659 | MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(&pPages->ManufacturingPage10,
|
---|
3660 | MptConfigurationPageManufacturing10, 10,
|
---|
3661 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE);
|
---|
3662 |
|
---|
3663 | /* I/O Unit page 0. */
|
---|
3664 | MPT_CONFIG_PAGE_HEADER_INIT_IO_UNIT(&pPages->IOUnitPage0,
|
---|
3665 | MptConfigurationPageIOUnit0, 0,
|
---|
3666 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY);
|
---|
3667 | pPages->IOUnitPage0.u.fields.u64UniqueIdentifier = 0xcafe;
|
---|
3668 |
|
---|
3669 | /* I/O Unit page 1. */
|
---|
3670 | MPT_CONFIG_PAGE_HEADER_INIT_IO_UNIT(&pPages->IOUnitPage1,
|
---|
3671 | MptConfigurationPageIOUnit1, 1,
|
---|
3672 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY);
|
---|
3673 | pPages->IOUnitPage1.u.fields.fSingleFunction = true;
|
---|
3674 | pPages->IOUnitPage1.u.fields.fAllPathsMapped = false;
|
---|
3675 | pPages->IOUnitPage1.u.fields.fIntegratedRAIDDisabled = true;
|
---|
3676 | pPages->IOUnitPage1.u.fields.f32BitAccessForced = false;
|
---|
3677 |
|
---|
3678 | /* I/O Unit page 2. */
|
---|
3679 | MPT_CONFIG_PAGE_HEADER_INIT_IO_UNIT(&pPages->IOUnitPage2,
|
---|
3680 | MptConfigurationPageIOUnit2, 2,
|
---|
3681 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT);
|
---|
3682 | pPages->IOUnitPage2.u.fields.fPauseOnError = false;
|
---|
3683 | pPages->IOUnitPage2.u.fields.fVerboseModeEnabled = false;
|
---|
3684 | pPages->IOUnitPage2.u.fields.fDisableColorVideo = false;
|
---|
3685 | pPages->IOUnitPage2.u.fields.fNotHookInt40h = false;
|
---|
3686 | pPages->IOUnitPage2.u.fields.u32BIOSVersion = 0xcafecafe;
|
---|
3687 | pPages->IOUnitPage2.u.fields.aAdapterOrder[0].fAdapterEnabled = true;
|
---|
3688 | pPages->IOUnitPage2.u.fields.aAdapterOrder[0].fAdapterEmbedded = true;
|
---|
3689 | pPages->IOUnitPage2.u.fields.aAdapterOrder[0].u8PCIBusNumber = 0;
|
---|
3690 | pPages->IOUnitPage2.u.fields.aAdapterOrder[0].u8PCIDevFn = pThis->PciDev.uDevFn;
|
---|
3691 |
|
---|
3692 | /* I/O Unit page 3. */
|
---|
3693 | MPT_CONFIG_PAGE_HEADER_INIT_IO_UNIT(&pPages->IOUnitPage3,
|
---|
3694 | MptConfigurationPageIOUnit3, 3,
|
---|
3695 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE);
|
---|
3696 | pPages->IOUnitPage3.u.fields.u8GPIOCount = 0;
|
---|
3697 |
|
---|
3698 | /* I/O Unit page 4. */
|
---|
3699 | MPT_CONFIG_PAGE_HEADER_INIT_IO_UNIT(&pPages->IOUnitPage4,
|
---|
3700 | MptConfigurationPageIOUnit4, 4,
|
---|
3701 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE);
|
---|
3702 |
|
---|
3703 | /* IOC page 0. */
|
---|
3704 | MPT_CONFIG_PAGE_HEADER_INIT_IOC(&pPages->IOCPage0,
|
---|
3705 | MptConfigurationPageIOC0, 0,
|
---|
3706 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY);
|
---|
3707 | pPages->IOCPage0.u.fields.u32TotalNVStore = 0;
|
---|
3708 | pPages->IOCPage0.u.fields.u32FreeNVStore = 0;
|
---|
3709 |
|
---|
3710 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
3711 | {
|
---|
3712 | pPages->IOCPage0.u.fields.u16VendorId = LSILOGICSCSI_PCI_VENDOR_ID;
|
---|
3713 | pPages->IOCPage0.u.fields.u16DeviceId = LSILOGICSCSI_PCI_SPI_DEVICE_ID;
|
---|
3714 | pPages->IOCPage0.u.fields.u8RevisionId = LSILOGICSCSI_PCI_SPI_REVISION_ID;
|
---|
3715 | pPages->IOCPage0.u.fields.u32ClassCode = LSILOGICSCSI_PCI_SPI_CLASS_CODE;
|
---|
3716 | pPages->IOCPage0.u.fields.u16SubsystemVendorId = LSILOGICSCSI_PCI_SPI_SUBSYSTEM_VENDOR_ID;
|
---|
3717 | pPages->IOCPage0.u.fields.u16SubsystemId = LSILOGICSCSI_PCI_SPI_SUBSYSTEM_ID;
|
---|
3718 | }
|
---|
3719 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
3720 | {
|
---|
3721 | pPages->IOCPage0.u.fields.u16VendorId = LSILOGICSCSI_PCI_VENDOR_ID;
|
---|
3722 | pPages->IOCPage0.u.fields.u16DeviceId = LSILOGICSCSI_PCI_SAS_DEVICE_ID;
|
---|
3723 | pPages->IOCPage0.u.fields.u8RevisionId = LSILOGICSCSI_PCI_SAS_REVISION_ID;
|
---|
3724 | pPages->IOCPage0.u.fields.u32ClassCode = LSILOGICSCSI_PCI_SAS_CLASS_CODE;
|
---|
3725 | pPages->IOCPage0.u.fields.u16SubsystemVendorId = LSILOGICSCSI_PCI_SAS_SUBSYSTEM_VENDOR_ID;
|
---|
3726 | pPages->IOCPage0.u.fields.u16SubsystemId = LSILOGICSCSI_PCI_SAS_SUBSYSTEM_ID;
|
---|
3727 | }
|
---|
3728 |
|
---|
3729 | /* IOC page 1. */
|
---|
3730 | MPT_CONFIG_PAGE_HEADER_INIT_IOC(&pPages->IOCPage1,
|
---|
3731 | MptConfigurationPageIOC1, 1,
|
---|
3732 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE);
|
---|
3733 | pPages->IOCPage1.u.fields.fReplyCoalescingEnabled = false;
|
---|
3734 | pPages->IOCPage1.u.fields.u32CoalescingTimeout = 0;
|
---|
3735 | pPages->IOCPage1.u.fields.u8CoalescingDepth = 0;
|
---|
3736 |
|
---|
3737 | /* IOC page 2. */
|
---|
3738 | MPT_CONFIG_PAGE_HEADER_INIT_IOC(&pPages->IOCPage2,
|
---|
3739 | MptConfigurationPageIOC2, 2,
|
---|
3740 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY);
|
---|
3741 | /* Everything else here is 0. */
|
---|
3742 |
|
---|
3743 | /* IOC page 3. */
|
---|
3744 | MPT_CONFIG_PAGE_HEADER_INIT_IOC(&pPages->IOCPage3,
|
---|
3745 | MptConfigurationPageIOC3, 3,
|
---|
3746 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY);
|
---|
3747 | /* Everything else here is 0. */
|
---|
3748 |
|
---|
3749 | /* IOC page 4. */
|
---|
3750 | MPT_CONFIG_PAGE_HEADER_INIT_IOC(&pPages->IOCPage4,
|
---|
3751 | MptConfigurationPageIOC4, 4,
|
---|
3752 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY);
|
---|
3753 | /* Everything else here is 0. */
|
---|
3754 |
|
---|
3755 | /* IOC page 6. */
|
---|
3756 | MPT_CONFIG_PAGE_HEADER_INIT_IOC(&pPages->IOCPage6,
|
---|
3757 | MptConfigurationPageIOC6, 6,
|
---|
3758 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY);
|
---|
3759 | /* Everything else here is 0. */
|
---|
3760 |
|
---|
3761 | /* BIOS page 1. */
|
---|
3762 | MPT_CONFIG_PAGE_HEADER_INIT_BIOS(&pPages->BIOSPage1,
|
---|
3763 | MptConfigurationPageBIOS1, 1,
|
---|
3764 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE);
|
---|
3765 |
|
---|
3766 | /* BIOS page 2. */
|
---|
3767 | MPT_CONFIG_PAGE_HEADER_INIT_BIOS(&pPages->BIOSPage2,
|
---|
3768 | MptConfigurationPageBIOS2, 2,
|
---|
3769 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE);
|
---|
3770 |
|
---|
3771 | /* BIOS page 4. */
|
---|
3772 | MPT_CONFIG_PAGE_HEADER_INIT_BIOS(&pPages->BIOSPage4,
|
---|
3773 | MptConfigurationPageBIOS4, 4,
|
---|
3774 | MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE);
|
---|
3775 |
|
---|
3776 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
3777 | lsilogicR3InitializeConfigurationPagesSpi(pThis);
|
---|
3778 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
3779 | lsilogicR3InitializeConfigurationPagesSas(pThis);
|
---|
3780 | else
|
---|
3781 | AssertMsgFailed(("Invalid controller type %d\n", pThis->enmCtrlType));
|
---|
3782 | }
|
---|
3783 |
|
---|
3784 | /**
|
---|
3785 | * @callback_method_impl{FNPDMQUEUEDEV, Transmit queue consumer.}
|
---|
3786 | */
|
---|
3787 | static DECLCALLBACK(bool) lsilogicR3NotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
|
---|
3788 | {
|
---|
3789 | RT_NOREF(pItem);
|
---|
3790 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
3791 | int rc = VINF_SUCCESS;
|
---|
3792 |
|
---|
3793 | LogFlowFunc(("pDevIns=%#p pItem=%#p\n", pDevIns, pItem));
|
---|
3794 |
|
---|
3795 | rc = SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
|
---|
3796 | AssertRC(rc);
|
---|
3797 |
|
---|
3798 | return true;
|
---|
3799 | }
|
---|
3800 |
|
---|
3801 | /**
|
---|
3802 | * Sets the emulated controller type from a given string.
|
---|
3803 | *
|
---|
3804 | * @returns VBox status code.
|
---|
3805 | *
|
---|
3806 | * @param pThis Pointer to the LsiLogic device state.
|
---|
3807 | * @param pcszCtrlType The string to use.
|
---|
3808 | */
|
---|
3809 | static int lsilogicR3GetCtrlTypeFromString(PLSILOGICSCSI pThis, const char *pcszCtrlType)
|
---|
3810 | {
|
---|
3811 | int rc = VERR_INVALID_PARAMETER;
|
---|
3812 |
|
---|
3813 | if (!RTStrCmp(pcszCtrlType, LSILOGICSCSI_PCI_SPI_CTRLNAME))
|
---|
3814 | {
|
---|
3815 | pThis->enmCtrlType = LSILOGICCTRLTYPE_SCSI_SPI;
|
---|
3816 | rc = VINF_SUCCESS;
|
---|
3817 | }
|
---|
3818 | else if (!RTStrCmp(pcszCtrlType, LSILOGICSCSI_PCI_SAS_CTRLNAME))
|
---|
3819 | {
|
---|
3820 | pThis->enmCtrlType = LSILOGICCTRLTYPE_SCSI_SAS;
|
---|
3821 | rc = VINF_SUCCESS;
|
---|
3822 | }
|
---|
3823 |
|
---|
3824 | return rc;
|
---|
3825 | }
|
---|
3826 |
|
---|
3827 | /**
|
---|
3828 | * @callback_method_impl{FNIOMIOPORTIN, Legacy ISA port.}
|
---|
3829 | */
|
---|
3830 | static DECLCALLBACK(int) lsilogicR3IsaIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
|
---|
3831 | {
|
---|
3832 | RT_NOREF(pvUser, cb);
|
---|
3833 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
3834 |
|
---|
3835 | Assert(cb == 1);
|
---|
3836 |
|
---|
3837 | uint8_t iRegister = pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI
|
---|
3838 | ? Port - LSILOGIC_BIOS_IO_PORT
|
---|
3839 | : Port - LSILOGIC_SAS_BIOS_IO_PORT;
|
---|
3840 | int rc = vboxscsiReadRegister(&pThis->VBoxSCSI, iRegister, pu32);
|
---|
3841 |
|
---|
3842 | Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
|
---|
3843 | __FUNCTION__, pu32, 1, pu32, iRegister, rc));
|
---|
3844 |
|
---|
3845 | return rc;
|
---|
3846 | }
|
---|
3847 |
|
---|
3848 | /**
|
---|
3849 | * Prepares a request from the BIOS.
|
---|
3850 | *
|
---|
3851 | * @returns VBox status code.
|
---|
3852 | * @param pThis Pointer to the LsiLogic device state.
|
---|
3853 | */
|
---|
3854 | static int lsilogicR3PrepareBiosScsiRequest(PLSILOGICSCSI pThis)
|
---|
3855 | {
|
---|
3856 | int rc;
|
---|
3857 | uint32_t uTargetDevice;
|
---|
3858 | uint32_t uLun;
|
---|
3859 | uint8_t *pbCdb;
|
---|
3860 | size_t cbCdb;
|
---|
3861 | size_t cbBuf;
|
---|
3862 |
|
---|
3863 | rc = vboxscsiSetupRequest(&pThis->VBoxSCSI, &uLun, &pbCdb, &cbCdb, &cbBuf, &uTargetDevice);
|
---|
3864 | AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
|
---|
3865 |
|
---|
3866 | if ( uTargetDevice < pThis->cDeviceStates
|
---|
3867 | && pThis->paDeviceStates[uTargetDevice].pDrvBase)
|
---|
3868 | {
|
---|
3869 | PLSILOGICDEVICE pTgtDev = &pThis->paDeviceStates[uTargetDevice];
|
---|
3870 | PDMMEDIAEXIOREQ hIoReq;
|
---|
3871 | PLSILOGICREQ pReq;
|
---|
3872 |
|
---|
3873 | rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
|
---|
3874 | 0, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
|
---|
3875 | AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
|
---|
3876 |
|
---|
3877 | pReq->fBIOS = true;
|
---|
3878 | pReq->hIoReq = hIoReq;
|
---|
3879 | pReq->pTargetDevice = pTgtDev;
|
---|
3880 |
|
---|
3881 | ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
|
---|
3882 |
|
---|
3883 | rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
|
---|
3884 | pbCdb, cbCdb, PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN,
|
---|
3885 | cbBuf, NULL, 0, &pReq->u8ScsiSts, 30 * RT_MS_1SEC);
|
---|
3886 | if (rc == VINF_SUCCESS || rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
|
---|
3887 | {
|
---|
3888 | uint8_t u8ScsiSts = pReq->u8ScsiSts;
|
---|
3889 | pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
|
---|
3890 | rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
|
---|
3891 | }
|
---|
3892 | else if (rc == VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
|
---|
3893 | rc = VINF_SUCCESS;
|
---|
3894 |
|
---|
3895 | return rc;
|
---|
3896 | }
|
---|
3897 |
|
---|
3898 | /* Device is not present. */
|
---|
3899 | AssertMsg(pbCdb[0] == SCSI_INQUIRY,
|
---|
3900 | ("Device is not present but command is not inquiry\n"));
|
---|
3901 |
|
---|
3902 | SCSIINQUIRYDATA ScsiInquiryData;
|
---|
3903 |
|
---|
3904 | memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
|
---|
3905 | ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
|
---|
3906 | ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
|
---|
3907 |
|
---|
3908 | memcpy(pThis->VBoxSCSI.pbBuf, &ScsiInquiryData, 5);
|
---|
3909 |
|
---|
3910 | rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, SCSI_STATUS_OK);
|
---|
3911 | AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
|
---|
3912 |
|
---|
3913 | return rc;
|
---|
3914 | }
|
---|
3915 |
|
---|
3916 | /**
|
---|
3917 | * @callback_method_impl{FNIOMIOPORTOUT, Legacy ISA port.}
|
---|
3918 | */
|
---|
3919 | static DECLCALLBACK(int) lsilogicR3IsaIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
|
---|
3920 | {
|
---|
3921 | RT_NOREF(pvUser, cb);
|
---|
3922 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
3923 | Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port));
|
---|
3924 |
|
---|
3925 | Assert(cb == 1);
|
---|
3926 |
|
---|
3927 | /*
|
---|
3928 | * If there is already a request form the BIOS pending ignore this write
|
---|
3929 | * because it should not happen.
|
---|
3930 | */
|
---|
3931 | if (ASMAtomicReadBool(&pThis->fBiosReqPending))
|
---|
3932 | return VINF_SUCCESS;
|
---|
3933 |
|
---|
3934 | uint8_t iRegister = pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI
|
---|
3935 | ? Port - LSILOGIC_BIOS_IO_PORT
|
---|
3936 | : Port - LSILOGIC_SAS_BIOS_IO_PORT;
|
---|
3937 | int rc = vboxscsiWriteRegister(&pThis->VBoxSCSI, iRegister, (uint8_t)u32);
|
---|
3938 | if (rc == VERR_MORE_DATA)
|
---|
3939 | {
|
---|
3940 | ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
|
---|
3941 | /* Send a notifier to the PDM queue that there are pending requests. */
|
---|
3942 | PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotificationQueue));
|
---|
3943 | AssertMsg(pItem, ("Allocating item for queue failed\n"));
|
---|
3944 | PDMQueueInsert(pThis->CTX_SUFF(pNotificationQueue), (PPDMQUEUEITEMCORE)pItem);
|
---|
3945 | }
|
---|
3946 | else if (RT_FAILURE(rc))
|
---|
3947 | AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
|
---|
3948 |
|
---|
3949 | return VINF_SUCCESS;
|
---|
3950 | }
|
---|
3951 |
|
---|
3952 | /**
|
---|
3953 | * @callback_method_impl{FNIOMIOPORTOUTSTRING,
|
---|
3954 | * Port I/O Handler for primary port range OUT string operations.}
|
---|
3955 | */
|
---|
3956 | static DECLCALLBACK(int) lsilogicR3IsaIOPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
|
---|
3957 | uint8_t const *pbSrc, uint32_t *pcTransfers, unsigned cb)
|
---|
3958 | {
|
---|
3959 | RT_NOREF(pvUser);
|
---|
3960 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
3961 | Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
|
---|
3962 |
|
---|
3963 | uint8_t iRegister = pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI
|
---|
3964 | ? Port - LSILOGIC_BIOS_IO_PORT
|
---|
3965 | : Port - LSILOGIC_SAS_BIOS_IO_PORT;
|
---|
3966 | int rc = vboxscsiWriteString(pDevIns, &pThis->VBoxSCSI, iRegister, pbSrc, pcTransfers, cb);
|
---|
3967 | if (rc == VERR_MORE_DATA)
|
---|
3968 | {
|
---|
3969 | ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
|
---|
3970 | /* Send a notifier to the PDM queue that there are pending requests. */
|
---|
3971 | PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotificationQueue));
|
---|
3972 | AssertMsg(pItem, ("Allocating item for queue failed\n"));
|
---|
3973 | PDMQueueInsert(pThis->CTX_SUFF(pNotificationQueue), (PPDMQUEUEITEMCORE)pItem);
|
---|
3974 | }
|
---|
3975 | else if (RT_FAILURE(rc))
|
---|
3976 | AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
|
---|
3977 |
|
---|
3978 | return VINF_SUCCESS;
|
---|
3979 | }
|
---|
3980 |
|
---|
3981 | /**
|
---|
3982 | * @callback_method_impl{FNIOMIOPORTINSTRING,
|
---|
3983 | * Port I/O Handler for primary port range IN string operations.}
|
---|
3984 | */
|
---|
3985 | static DECLCALLBACK(int) lsilogicR3IsaIOPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
|
---|
3986 | uint8_t *pbDst, uint32_t *pcTransfers, unsigned cb)
|
---|
3987 | {
|
---|
3988 | RT_NOREF(pvUser);
|
---|
3989 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
3990 | LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
|
---|
3991 |
|
---|
3992 | uint8_t iRegister = pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI
|
---|
3993 | ? Port - LSILOGIC_BIOS_IO_PORT
|
---|
3994 | : Port - LSILOGIC_SAS_BIOS_IO_PORT;
|
---|
3995 | return vboxscsiReadString(pDevIns, &pThis->VBoxSCSI, iRegister, pbDst, pcTransfers, cb);
|
---|
3996 | }
|
---|
3997 |
|
---|
3998 | /**
|
---|
3999 | * @callback_method_impl{FNPCIIOREGIONMAP}
|
---|
4000 | */
|
---|
4001 | static DECLCALLBACK(int) lsilogicR3Map(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
|
---|
4002 | RTGCPHYS GCPhysAddress, RTGCPHYS cb,
|
---|
4003 | PCIADDRESSSPACE enmType)
|
---|
4004 | {
|
---|
4005 | RT_NOREF(pPciDev);
|
---|
4006 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
4007 | int rc = VINF_SUCCESS;
|
---|
4008 | const char *pcszCtrl = pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI
|
---|
4009 | ? "LsiLogic"
|
---|
4010 | : "LsiLogicSas";
|
---|
4011 | const char *pcszDiag = pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI
|
---|
4012 | ? "LsiLogicDiag"
|
---|
4013 | : "LsiLogicSasDiag";
|
---|
4014 |
|
---|
4015 | Log2(("%s: registering area at GCPhysAddr=%RGp cb=%RGp\n", __FUNCTION__, GCPhysAddress, cb));
|
---|
4016 |
|
---|
4017 | AssertMsg( (enmType == PCI_ADDRESS_SPACE_MEM && cb >= LSILOGIC_PCI_SPACE_MEM_SIZE)
|
---|
4018 | || (enmType == PCI_ADDRESS_SPACE_IO && cb >= LSILOGIC_PCI_SPACE_IO_SIZE),
|
---|
4019 | ("PCI region type and size do not match\n"));
|
---|
4020 |
|
---|
4021 | if (enmType == PCI_ADDRESS_SPACE_MEM && iRegion == 1)
|
---|
4022 | {
|
---|
4023 | /*
|
---|
4024 | * Non-4-byte read access to LSILOGIC_REG_REPLY_QUEUE may cause real strange behavior
|
---|
4025 | * because the data is part of a physical guest address. But some drivers use 1-byte
|
---|
4026 | * access to scan for SCSI controllers. So, we simplify our code by telling IOM to
|
---|
4027 | * read DWORDs.
|
---|
4028 | *
|
---|
4029 | * Regarding writes, we couldn't find anything specific in the specs about what should
|
---|
4030 | * happen. So far we've ignored unaligned writes and assumed the missing bytes of
|
---|
4031 | * byte and word access to be zero. We suspect that IOMMMIO_FLAGS_WRITE_ONLY_DWORD
|
---|
4032 | * or IOMMMIO_FLAGS_WRITE_DWORD_ZEROED would be the most appropriate here, but since we
|
---|
4033 | * don't have real hw to test one, the old behavior is kept exactly like it used to be.
|
---|
4034 | */
|
---|
4035 | /** @todo Check out unaligned writes and non-dword writes on real LsiLogic
|
---|
4036 | * hardware. */
|
---|
4037 | rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /*pvUser*/,
|
---|
4038 | IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_PASSTHRU,
|
---|
4039 | lsilogicMMIOWrite, lsilogicMMIORead, pcszCtrl);
|
---|
4040 | if (RT_FAILURE(rc))
|
---|
4041 | return rc;
|
---|
4042 |
|
---|
4043 | if (pThis->fR0Enabled)
|
---|
4044 | {
|
---|
4045 | rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /*pvUser*/,
|
---|
4046 | "lsilogicMMIOWrite", "lsilogicMMIORead");
|
---|
4047 | if (RT_FAILURE(rc))
|
---|
4048 | return rc;
|
---|
4049 | }
|
---|
4050 |
|
---|
4051 | if (pThis->fGCEnabled)
|
---|
4052 | {
|
---|
4053 | rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /*pvUser*/,
|
---|
4054 | "lsilogicMMIOWrite", "lsilogicMMIORead");
|
---|
4055 | if (RT_FAILURE(rc))
|
---|
4056 | return rc;
|
---|
4057 | }
|
---|
4058 |
|
---|
4059 | pThis->GCPhysMMIOBase = GCPhysAddress;
|
---|
4060 | }
|
---|
4061 | else if (enmType == PCI_ADDRESS_SPACE_MEM && iRegion == 2)
|
---|
4062 | {
|
---|
4063 | /* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
|
---|
4064 | rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /*pvUser*/,
|
---|
4065 | IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU,
|
---|
4066 | lsilogicDiagnosticWrite, lsilogicDiagnosticRead, pcszDiag);
|
---|
4067 | if (RT_FAILURE(rc))
|
---|
4068 | return rc;
|
---|
4069 |
|
---|
4070 | if (pThis->fR0Enabled)
|
---|
4071 | {
|
---|
4072 | rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /*pvUser*/,
|
---|
4073 | "lsilogicDiagnosticWrite", "lsilogicDiagnosticRead");
|
---|
4074 | if (RT_FAILURE(rc))
|
---|
4075 | return rc;
|
---|
4076 | }
|
---|
4077 |
|
---|
4078 | if (pThis->fGCEnabled)
|
---|
4079 | {
|
---|
4080 | rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /*pvUser*/,
|
---|
4081 | "lsilogicDiagnosticWrite", "lsilogicDiagnosticRead");
|
---|
4082 | if (RT_FAILURE(rc))
|
---|
4083 | return rc;
|
---|
4084 | }
|
---|
4085 | }
|
---|
4086 | else if (enmType == PCI_ADDRESS_SPACE_IO)
|
---|
4087 | {
|
---|
4088 | rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, LSILOGIC_PCI_SPACE_IO_SIZE,
|
---|
4089 | NULL, lsilogicIOPortWrite, lsilogicIOPortRead, NULL, NULL, pcszCtrl);
|
---|
4090 | if (RT_FAILURE(rc))
|
---|
4091 | return rc;
|
---|
4092 |
|
---|
4093 | if (pThis->fR0Enabled)
|
---|
4094 | {
|
---|
4095 | rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, LSILOGIC_PCI_SPACE_IO_SIZE,
|
---|
4096 | 0, "lsilogicIOPortWrite", "lsilogicIOPortRead", NULL, NULL, pcszCtrl);
|
---|
4097 | if (RT_FAILURE(rc))
|
---|
4098 | return rc;
|
---|
4099 | }
|
---|
4100 |
|
---|
4101 | if (pThis->fGCEnabled)
|
---|
4102 | {
|
---|
4103 | rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, LSILOGIC_PCI_SPACE_IO_SIZE,
|
---|
4104 | 0, "lsilogicIOPortWrite", "lsilogicIOPortRead", NULL, NULL, pcszCtrl);
|
---|
4105 | if (RT_FAILURE(rc))
|
---|
4106 | return rc;
|
---|
4107 | }
|
---|
4108 |
|
---|
4109 | pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
|
---|
4110 | }
|
---|
4111 | else
|
---|
4112 | AssertMsgFailed(("Invalid enmType=%d iRegion=%d\n", enmType, iRegion));
|
---|
4113 |
|
---|
4114 | return rc;
|
---|
4115 | }
|
---|
4116 |
|
---|
4117 | /**
|
---|
4118 | * @callback_method_impl{PFNDBGFHANDLERDEV}
|
---|
4119 | */
|
---|
4120 | static DECLCALLBACK(void) lsilogicR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
|
---|
4121 | {
|
---|
4122 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
4123 | bool fVerbose = false;
|
---|
4124 |
|
---|
4125 | /*
|
---|
4126 | * Parse args.
|
---|
4127 | */
|
---|
4128 | if (pszArgs)
|
---|
4129 | fVerbose = strstr(pszArgs, "verbose") != NULL;
|
---|
4130 |
|
---|
4131 | /*
|
---|
4132 | * Show info.
|
---|
4133 | */
|
---|
4134 | pHlp->pfnPrintf(pHlp,
|
---|
4135 | "%s#%d: port=%RTiop mmio=%RGp max-devices=%u GC=%RTbool R0=%RTbool\n",
|
---|
4136 | pDevIns->pReg->szName,
|
---|
4137 | pDevIns->iInstance,
|
---|
4138 | pThis->IOPortBase, pThis->GCPhysMMIOBase,
|
---|
4139 | pThis->cDeviceStates,
|
---|
4140 | pThis->fGCEnabled ? true : false,
|
---|
4141 | pThis->fR0Enabled ? true : false);
|
---|
4142 |
|
---|
4143 | /*
|
---|
4144 | * Show general state.
|
---|
4145 | */
|
---|
4146 | pHlp->pfnPrintf(pHlp, "enmState=%u\n", pThis->enmState);
|
---|
4147 | pHlp->pfnPrintf(pHlp, "enmWhoInit=%u\n", pThis->enmWhoInit);
|
---|
4148 | pHlp->pfnPrintf(pHlp, "enmDoorbellState=%d\n", pThis->enmDoorbellState);
|
---|
4149 | pHlp->pfnPrintf(pHlp, "fDiagnosticEnabled=%RTbool\n", pThis->fDiagnosticEnabled);
|
---|
4150 | pHlp->pfnPrintf(pHlp, "fNotificationSent=%RTbool\n", pThis->fNotificationSent);
|
---|
4151 | pHlp->pfnPrintf(pHlp, "fEventNotificationEnabled=%RTbool\n", pThis->fEventNotificationEnabled);
|
---|
4152 | pHlp->pfnPrintf(pHlp, "uInterruptMask=%#x\n", pThis->uInterruptMask);
|
---|
4153 | pHlp->pfnPrintf(pHlp, "uInterruptStatus=%#x\n", pThis->uInterruptStatus);
|
---|
4154 | pHlp->pfnPrintf(pHlp, "u16IOCFaultCode=%#06x\n", pThis->u16IOCFaultCode);
|
---|
4155 | pHlp->pfnPrintf(pHlp, "u32HostMFAHighAddr=%#x\n", pThis->u32HostMFAHighAddr);
|
---|
4156 | pHlp->pfnPrintf(pHlp, "u32SenseBufferHighAddr=%#x\n", pThis->u32SenseBufferHighAddr);
|
---|
4157 | pHlp->pfnPrintf(pHlp, "cMaxDevices=%u\n", pThis->cMaxDevices);
|
---|
4158 | pHlp->pfnPrintf(pHlp, "cMaxBuses=%u\n", pThis->cMaxBuses);
|
---|
4159 | pHlp->pfnPrintf(pHlp, "cbReplyFrame=%u\n", pThis->cbReplyFrame);
|
---|
4160 | pHlp->pfnPrintf(pHlp, "cReplyQueueEntries=%u\n", pThis->cReplyQueueEntries);
|
---|
4161 | pHlp->pfnPrintf(pHlp, "cRequestQueueEntries=%u\n", pThis->cRequestQueueEntries);
|
---|
4162 | pHlp->pfnPrintf(pHlp, "cPorts=%u\n", pThis->cPorts);
|
---|
4163 |
|
---|
4164 | /*
|
---|
4165 | * Show queue status.
|
---|
4166 | */
|
---|
4167 | pHlp->pfnPrintf(pHlp, "uReplyFreeQueueNextEntryFreeWrite=%u\n", pThis->uReplyFreeQueueNextEntryFreeWrite);
|
---|
4168 | pHlp->pfnPrintf(pHlp, "uReplyFreeQueueNextAddressRead=%u\n", pThis->uReplyFreeQueueNextAddressRead);
|
---|
4169 | pHlp->pfnPrintf(pHlp, "uReplyPostQueueNextEntryFreeWrite=%u\n", pThis->uReplyPostQueueNextEntryFreeWrite);
|
---|
4170 | pHlp->pfnPrintf(pHlp, "uReplyPostQueueNextAddressRead=%u\n", pThis->uReplyPostQueueNextAddressRead);
|
---|
4171 | pHlp->pfnPrintf(pHlp, "uRequestQueueNextEntryFreeWrite=%u\n", pThis->uRequestQueueNextEntryFreeWrite);
|
---|
4172 | pHlp->pfnPrintf(pHlp, "uRequestQueueNextAddressRead=%u\n", pThis->uRequestQueueNextAddressRead);
|
---|
4173 |
|
---|
4174 | /*
|
---|
4175 | * Show queue content if verbose
|
---|
4176 | */
|
---|
4177 | if (fVerbose)
|
---|
4178 | {
|
---|
4179 | for (unsigned i = 0; i < pThis->cReplyQueueEntries; i++)
|
---|
4180 | pHlp->pfnPrintf(pHlp, "RFQ[%u]=%#x\n", i, pThis->pReplyFreeQueueBaseR3[i]);
|
---|
4181 |
|
---|
4182 | pHlp->pfnPrintf(pHlp, "\n");
|
---|
4183 |
|
---|
4184 | for (unsigned i = 0; i < pThis->cReplyQueueEntries; i++)
|
---|
4185 | pHlp->pfnPrintf(pHlp, "RPQ[%u]=%#x\n", i, pThis->pReplyPostQueueBaseR3[i]);
|
---|
4186 |
|
---|
4187 | pHlp->pfnPrintf(pHlp, "\n");
|
---|
4188 |
|
---|
4189 | for (unsigned i = 0; i < pThis->cRequestQueueEntries; i++)
|
---|
4190 | pHlp->pfnPrintf(pHlp, "ReqQ[%u]=%#x\n", i, pThis->pRequestQueueBaseR3[i]);
|
---|
4191 | }
|
---|
4192 |
|
---|
4193 | /*
|
---|
4194 | * Print the device status.
|
---|
4195 | */
|
---|
4196 | for (unsigned i = 0; i < pThis->cDeviceStates; i++)
|
---|
4197 | {
|
---|
4198 | PLSILOGICDEVICE pDevice = &pThis->paDeviceStates[i];
|
---|
4199 |
|
---|
4200 | pHlp->pfnPrintf(pHlp, "\n");
|
---|
4201 |
|
---|
4202 | pHlp->pfnPrintf(pHlp, "Device[%u]: device-attached=%RTbool cOutstandingRequests=%u\n",
|
---|
4203 | i, pDevice->pDrvBase != NULL, pDevice->cOutstandingRequests);
|
---|
4204 | }
|
---|
4205 | }
|
---|
4206 |
|
---|
4207 | /**
|
---|
4208 | * Allocate the queues.
|
---|
4209 | *
|
---|
4210 | * @returns VBox status code.
|
---|
4211 | *
|
---|
4212 | * @param pThis Pointer to the LsiLogic device state.
|
---|
4213 | */
|
---|
4214 | static int lsilogicR3QueuesAlloc(PLSILOGICSCSI pThis)
|
---|
4215 | {
|
---|
4216 | PVM pVM = PDMDevHlpGetVM(pThis->pDevInsR3);
|
---|
4217 | uint32_t cbQueues;
|
---|
4218 |
|
---|
4219 | Assert(!pThis->pReplyFreeQueueBaseR3);
|
---|
4220 |
|
---|
4221 | cbQueues = 2*pThis->cReplyQueueEntries * sizeof(uint32_t);
|
---|
4222 | cbQueues += pThis->cRequestQueueEntries * sizeof(uint32_t);
|
---|
4223 | int rc = MMHyperAlloc(pVM, cbQueues, 1, MM_TAG_PDM_DEVICE_USER,
|
---|
4224 | (void **)&pThis->pReplyFreeQueueBaseR3);
|
---|
4225 | if (RT_FAILURE(rc))
|
---|
4226 | return VERR_NO_MEMORY;
|
---|
4227 | pThis->pReplyFreeQueueBaseR0 = MMHyperR3ToR0(pVM, (void *)pThis->pReplyFreeQueueBaseR3);
|
---|
4228 | pThis->pReplyFreeQueueBaseRC = MMHyperR3ToRC(pVM, (void *)pThis->pReplyFreeQueueBaseR3);
|
---|
4229 |
|
---|
4230 | pThis->pReplyPostQueueBaseR3 = pThis->pReplyFreeQueueBaseR3 + pThis->cReplyQueueEntries;
|
---|
4231 | pThis->pReplyPostQueueBaseR0 = MMHyperR3ToR0(pVM, (void *)pThis->pReplyPostQueueBaseR3);
|
---|
4232 | pThis->pReplyPostQueueBaseRC = MMHyperR3ToRC(pVM, (void *)pThis->pReplyPostQueueBaseR3);
|
---|
4233 |
|
---|
4234 | pThis->pRequestQueueBaseR3 = pThis->pReplyPostQueueBaseR3 + pThis->cReplyQueueEntries;
|
---|
4235 | pThis->pRequestQueueBaseR0 = MMHyperR3ToR0(pVM, (void *)pThis->pRequestQueueBaseR3);
|
---|
4236 | pThis->pRequestQueueBaseRC = MMHyperR3ToRC(pVM, (void *)pThis->pRequestQueueBaseR3);
|
---|
4237 |
|
---|
4238 | return VINF_SUCCESS;
|
---|
4239 | }
|
---|
4240 |
|
---|
4241 | /**
|
---|
4242 | * Free the hyper memory used or the queues.
|
---|
4243 | *
|
---|
4244 | * @returns nothing.
|
---|
4245 | *
|
---|
4246 | * @param pThis Pointer to the LsiLogic device state.
|
---|
4247 | */
|
---|
4248 | static void lsilogicR3QueuesFree(PLSILOGICSCSI pThis)
|
---|
4249 | {
|
---|
4250 | PVM pVM = PDMDevHlpGetVM(pThis->pDevInsR3);
|
---|
4251 | int rc = VINF_SUCCESS;
|
---|
4252 |
|
---|
4253 | AssertPtr(pThis->pReplyFreeQueueBaseR3);
|
---|
4254 |
|
---|
4255 | rc = MMHyperFree(pVM, (void *)pThis->pReplyFreeQueueBaseR3);
|
---|
4256 | AssertRC(rc);
|
---|
4257 |
|
---|
4258 | pThis->pReplyFreeQueueBaseR3 = NULL;
|
---|
4259 | pThis->pReplyPostQueueBaseR3 = NULL;
|
---|
4260 | pThis->pRequestQueueBaseR3 = NULL;
|
---|
4261 | }
|
---|
4262 |
|
---|
4263 |
|
---|
4264 | /* The worker thread. */
|
---|
4265 | static DECLCALLBACK(int) lsilogicR3Worker(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
|
---|
4266 | {
|
---|
4267 | PLSILOGICSCSI pThis = (PLSILOGICSCSI)pThread->pvUser;
|
---|
4268 | int rc = VINF_SUCCESS;
|
---|
4269 |
|
---|
4270 | if (pThread->enmState == PDMTHREADSTATE_INITIALIZING)
|
---|
4271 | return VINF_SUCCESS;
|
---|
4272 |
|
---|
4273 | while (pThread->enmState == PDMTHREADSTATE_RUNNING)
|
---|
4274 | {
|
---|
4275 | ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, true);
|
---|
4276 | bool fNotificationSent = ASMAtomicXchgBool(&pThis->fNotificationSent, false);
|
---|
4277 | if (!fNotificationSent)
|
---|
4278 | {
|
---|
4279 | Assert(ASMAtomicReadBool(&pThis->fWrkThreadSleeping));
|
---|
4280 | rc = SUPSemEventWaitNoResume(pThis->pSupDrvSession, pThis->hEvtProcess, RT_INDEFINITE_WAIT);
|
---|
4281 | AssertLogRelMsgReturn(RT_SUCCESS(rc) || rc == VERR_INTERRUPTED, ("%Rrc\n", rc), rc);
|
---|
4282 | if (RT_UNLIKELY(pThread->enmState != PDMTHREADSTATE_RUNNING))
|
---|
4283 | break;
|
---|
4284 | LogFlowFunc(("Woken up with rc=%Rrc\n", rc));
|
---|
4285 | ASMAtomicWriteBool(&pThis->fNotificationSent, false);
|
---|
4286 | }
|
---|
4287 |
|
---|
4288 | ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, false);
|
---|
4289 |
|
---|
4290 | /* Check whether there is a BIOS request pending and process it first. */
|
---|
4291 | if (ASMAtomicReadBool(&pThis->fBiosReqPending))
|
---|
4292 | {
|
---|
4293 | rc = lsilogicR3PrepareBiosScsiRequest(pThis);
|
---|
4294 | AssertRC(rc);
|
---|
4295 | ASMAtomicXchgBool(&pThis->fBiosReqPending, false);
|
---|
4296 | }
|
---|
4297 |
|
---|
4298 | /* Only process request which arrived before we received the notification. */
|
---|
4299 | uint32_t uRequestQueueNextEntryWrite = ASMAtomicReadU32(&pThis->uRequestQueueNextEntryFreeWrite);
|
---|
4300 |
|
---|
4301 | /* Go through the messages now and process them. */
|
---|
4302 | while ( RT_LIKELY(pThis->enmState == LSILOGICSTATE_OPERATIONAL)
|
---|
4303 | && (pThis->uRequestQueueNextAddressRead != uRequestQueueNextEntryWrite))
|
---|
4304 | {
|
---|
4305 | MptRequestUnion GuestRequest;
|
---|
4306 | uint32_t u32RequestMessageFrameDesc = pThis->CTX_SUFF(pRequestQueueBase)[pThis->uRequestQueueNextAddressRead];
|
---|
4307 | RTGCPHYS GCPhysMessageFrameAddr = LSILOGIC_RTGCPHYS_FROM_U32(pThis->u32HostMFAHighAddr,
|
---|
4308 | (u32RequestMessageFrameDesc & ~0x07));
|
---|
4309 |
|
---|
4310 | /* Read the message header from the guest first. */
|
---|
4311 | PDMDevHlpPhysRead(pDevIns, GCPhysMessageFrameAddr, &GuestRequest, sizeof(MptMessageHdr));
|
---|
4312 |
|
---|
4313 | /* Determine the size of the request. */
|
---|
4314 | uint32_t cbRequest = 0;
|
---|
4315 | switch (GuestRequest.Header.u8Function)
|
---|
4316 | {
|
---|
4317 | case MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST:
|
---|
4318 | cbRequest = sizeof(MptSCSIIORequest);
|
---|
4319 | break;
|
---|
4320 | case MPT_MESSAGE_HDR_FUNCTION_SCSI_TASK_MGMT:
|
---|
4321 | cbRequest = sizeof(MptSCSITaskManagementRequest);
|
---|
4322 | break;
|
---|
4323 | case MPT_MESSAGE_HDR_FUNCTION_IOC_INIT:
|
---|
4324 | cbRequest = sizeof(MptIOCInitRequest);
|
---|
4325 | break;
|
---|
4326 | case MPT_MESSAGE_HDR_FUNCTION_IOC_FACTS:
|
---|
4327 | cbRequest = sizeof(MptIOCFactsRequest);
|
---|
4328 | break;
|
---|
4329 | case MPT_MESSAGE_HDR_FUNCTION_CONFIG:
|
---|
4330 | cbRequest = sizeof(MptConfigurationRequest);
|
---|
4331 | break;
|
---|
4332 | case MPT_MESSAGE_HDR_FUNCTION_PORT_FACTS:
|
---|
4333 | cbRequest = sizeof(MptPortFactsRequest);
|
---|
4334 | break;
|
---|
4335 | case MPT_MESSAGE_HDR_FUNCTION_PORT_ENABLE:
|
---|
4336 | cbRequest = sizeof(MptPortEnableRequest);
|
---|
4337 | break;
|
---|
4338 | case MPT_MESSAGE_HDR_FUNCTION_EVENT_NOTIFICATION:
|
---|
4339 | cbRequest = sizeof(MptEventNotificationRequest);
|
---|
4340 | break;
|
---|
4341 | case MPT_MESSAGE_HDR_FUNCTION_EVENT_ACK:
|
---|
4342 | AssertMsgFailed(("todo\n"));
|
---|
4343 | //cbRequest = sizeof(MptEventAckRequest);
|
---|
4344 | break;
|
---|
4345 | case MPT_MESSAGE_HDR_FUNCTION_FW_DOWNLOAD:
|
---|
4346 | cbRequest = sizeof(MptFWDownloadRequest);
|
---|
4347 | break;
|
---|
4348 | case MPT_MESSAGE_HDR_FUNCTION_FW_UPLOAD:
|
---|
4349 | cbRequest = sizeof(MptFWUploadRequest);
|
---|
4350 | break;
|
---|
4351 | default:
|
---|
4352 | AssertMsgFailed(("Unknown function issued %u\n", GuestRequest.Header.u8Function));
|
---|
4353 | lsilogicSetIOCFaultCode(pThis, LSILOGIC_IOCSTATUS_INVALID_FUNCTION);
|
---|
4354 | }
|
---|
4355 |
|
---|
4356 | if (cbRequest != 0)
|
---|
4357 | {
|
---|
4358 | /* Read the complete message frame from guest memory now. */
|
---|
4359 | PDMDevHlpPhysRead(pDevIns, GCPhysMessageFrameAddr, &GuestRequest, cbRequest);
|
---|
4360 |
|
---|
4361 | /* Handle SCSI I/O requests now. */
|
---|
4362 | if (GuestRequest.Header.u8Function == MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST)
|
---|
4363 | {
|
---|
4364 | rc = lsilogicR3ProcessSCSIIORequest(pThis, GCPhysMessageFrameAddr, &GuestRequest);
|
---|
4365 | AssertRC(rc);
|
---|
4366 | }
|
---|
4367 | else
|
---|
4368 | {
|
---|
4369 | MptReplyUnion Reply;
|
---|
4370 | rc = lsilogicR3ProcessMessageRequest(pThis, &GuestRequest.Header, &Reply);
|
---|
4371 | AssertRC(rc);
|
---|
4372 | }
|
---|
4373 |
|
---|
4374 | pThis->uRequestQueueNextAddressRead++;
|
---|
4375 | pThis->uRequestQueueNextAddressRead %= pThis->cRequestQueueEntries;
|
---|
4376 | }
|
---|
4377 | } /* While request frames available. */
|
---|
4378 | } /* While running */
|
---|
4379 |
|
---|
4380 | return VINF_SUCCESS;
|
---|
4381 | }
|
---|
4382 |
|
---|
4383 |
|
---|
4384 | /**
|
---|
4385 | * Unblock the worker thread so it can respond to a state change.
|
---|
4386 | *
|
---|
4387 | * @returns VBox status code.
|
---|
4388 | * @param pDevIns The pcnet device instance.
|
---|
4389 | * @param pThread The send thread.
|
---|
4390 | */
|
---|
4391 | static DECLCALLBACK(int) lsilogicR3WorkerWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
|
---|
4392 | {
|
---|
4393 | RT_NOREF(pThread);
|
---|
4394 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
4395 | return SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
|
---|
4396 | }
|
---|
4397 |
|
---|
4398 |
|
---|
4399 | /**
|
---|
4400 | * Kicks the controller to process pending tasks after the VM was resumed
|
---|
4401 | * or loaded from a saved state.
|
---|
4402 | *
|
---|
4403 | * @returns nothing.
|
---|
4404 | * @param pThis Pointer to the LsiLogic device state.
|
---|
4405 | */
|
---|
4406 | static void lsilogicR3Kick(PLSILOGICSCSI pThis)
|
---|
4407 | {
|
---|
4408 | if (pThis->fNotificationSent)
|
---|
4409 | {
|
---|
4410 | /* Send a notifier to the PDM queue that there are pending requests. */
|
---|
4411 | PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotificationQueue));
|
---|
4412 | AssertMsg(pItem, ("Allocating item for queue failed\n"));
|
---|
4413 | PDMQueueInsert(pThis->CTX_SUFF(pNotificationQueue), (PPDMQUEUEITEMCORE)pItem);
|
---|
4414 | }
|
---|
4415 | }
|
---|
4416 |
|
---|
4417 |
|
---|
4418 | /*
|
---|
4419 | * Saved state.
|
---|
4420 | */
|
---|
4421 |
|
---|
4422 | /**
|
---|
4423 | * @callback_method_impl{FNSSMDEVLIVEEXEC}
|
---|
4424 | */
|
---|
4425 | static DECLCALLBACK(int) lsilogicR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
|
---|
4426 | {
|
---|
4427 | RT_NOREF(uPass);
|
---|
4428 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
4429 |
|
---|
4430 | SSMR3PutU32(pSSM, pThis->enmCtrlType);
|
---|
4431 | SSMR3PutU32(pSSM, pThis->cDeviceStates);
|
---|
4432 | SSMR3PutU32(pSSM, pThis->cPorts);
|
---|
4433 |
|
---|
4434 | /* Save the device config. */
|
---|
4435 | for (unsigned i = 0; i < pThis->cDeviceStates; i++)
|
---|
4436 | SSMR3PutBool(pSSM, pThis->paDeviceStates[i].pDrvBase != NULL);
|
---|
4437 |
|
---|
4438 | return VINF_SSM_DONT_CALL_AGAIN;
|
---|
4439 | }
|
---|
4440 |
|
---|
4441 | /**
|
---|
4442 | * @callback_method_impl{FNSSMDEVSAVEEXEC}
|
---|
4443 | */
|
---|
4444 | static DECLCALLBACK(int) lsilogicR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
|
---|
4445 | {
|
---|
4446 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
4447 |
|
---|
4448 | /* Every device first. */
|
---|
4449 | lsilogicR3LiveExec(pDevIns, pSSM, SSM_PASS_FINAL);
|
---|
4450 | for (unsigned i = 0; i < pThis->cDeviceStates; i++)
|
---|
4451 | {
|
---|
4452 | PLSILOGICDEVICE pDevice = &pThis->paDeviceStates[i];
|
---|
4453 |
|
---|
4454 | AssertMsg(!pDevice->cOutstandingRequests,
|
---|
4455 | ("There are still outstanding requests on this device\n"));
|
---|
4456 | SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
|
---|
4457 |
|
---|
4458 | /* Query all suspended requests and store them in the request queue. */
|
---|
4459 | if (pDevice->pDrvMediaEx)
|
---|
4460 | {
|
---|
4461 | uint32_t cReqsRedo = pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
|
---|
4462 | if (cReqsRedo)
|
---|
4463 | {
|
---|
4464 | PDMMEDIAEXIOREQ hIoReq;
|
---|
4465 | PLSILOGICREQ pReq;
|
---|
4466 | int rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedStart(pDevice->pDrvMediaEx, &hIoReq,
|
---|
4467 | (void **)&pReq);
|
---|
4468 | AssertRCBreak(rc);
|
---|
4469 |
|
---|
4470 | for (;;)
|
---|
4471 | {
|
---|
4472 | if (!pReq->fBIOS)
|
---|
4473 | {
|
---|
4474 | /* Write only the lower 32bit part of the address. */
|
---|
4475 | ASMAtomicWriteU32(&pThis->CTX_SUFF(pRequestQueueBase)[pThis->uRequestQueueNextEntryFreeWrite],
|
---|
4476 | pReq->GCPhysMessageFrameAddr & UINT32_C(0xffffffff));
|
---|
4477 |
|
---|
4478 | pThis->uRequestQueueNextEntryFreeWrite++;
|
---|
4479 | pThis->uRequestQueueNextEntryFreeWrite %= pThis->cRequestQueueEntries;
|
---|
4480 | }
|
---|
4481 | else
|
---|
4482 | {
|
---|
4483 | AssertMsg(!pReq->pRedoNext, ("Only one BIOS task can be active!\n"));
|
---|
4484 | vboxscsiSetRequestRedo(&pThis->VBoxSCSI);
|
---|
4485 | }
|
---|
4486 |
|
---|
4487 | cReqsRedo--;
|
---|
4488 | if (!cReqsRedo)
|
---|
4489 | break;
|
---|
4490 |
|
---|
4491 | rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedNext(pDevice->pDrvMediaEx, hIoReq,
|
---|
4492 | &hIoReq, (void **)&pReq);
|
---|
4493 | AssertRCBreak(rc);
|
---|
4494 | }
|
---|
4495 | }
|
---|
4496 | }
|
---|
4497 | }
|
---|
4498 |
|
---|
4499 | /* Now the main device state. */
|
---|
4500 | SSMR3PutU32 (pSSM, pThis->enmState);
|
---|
4501 | SSMR3PutU32 (pSSM, pThis->enmWhoInit);
|
---|
4502 | SSMR3PutU32 (pSSM, pThis->enmDoorbellState);
|
---|
4503 | SSMR3PutBool (pSSM, pThis->fDiagnosticEnabled);
|
---|
4504 | SSMR3PutBool (pSSM, pThis->fNotificationSent);
|
---|
4505 | SSMR3PutBool (pSSM, pThis->fEventNotificationEnabled);
|
---|
4506 | SSMR3PutU32 (pSSM, pThis->uInterruptMask);
|
---|
4507 | SSMR3PutU32 (pSSM, pThis->uInterruptStatus);
|
---|
4508 | for (unsigned i = 0; i < RT_ELEMENTS(pThis->aMessage); i++)
|
---|
4509 | SSMR3PutU32 (pSSM, pThis->aMessage[i]);
|
---|
4510 | SSMR3PutU32 (pSSM, pThis->iMessage);
|
---|
4511 | SSMR3PutU32 (pSSM, pThis->cMessage);
|
---|
4512 | SSMR3PutMem (pSSM, &pThis->ReplyBuffer, sizeof(pThis->ReplyBuffer));
|
---|
4513 | SSMR3PutU32 (pSSM, pThis->uNextReplyEntryRead);
|
---|
4514 | SSMR3PutU32 (pSSM, pThis->cReplySize);
|
---|
4515 | SSMR3PutU16 (pSSM, pThis->u16IOCFaultCode);
|
---|
4516 | SSMR3PutU32 (pSSM, pThis->u32HostMFAHighAddr);
|
---|
4517 | SSMR3PutU32 (pSSM, pThis->u32SenseBufferHighAddr);
|
---|
4518 | SSMR3PutU8 (pSSM, pThis->cMaxDevices);
|
---|
4519 | SSMR3PutU8 (pSSM, pThis->cMaxBuses);
|
---|
4520 | SSMR3PutU16 (pSSM, pThis->cbReplyFrame);
|
---|
4521 | SSMR3PutU32 (pSSM, pThis->iDiagnosticAccess);
|
---|
4522 | SSMR3PutU32 (pSSM, pThis->cReplyQueueEntries);
|
---|
4523 | SSMR3PutU32 (pSSM, pThis->cRequestQueueEntries);
|
---|
4524 | SSMR3PutU32 (pSSM, pThis->uReplyFreeQueueNextEntryFreeWrite);
|
---|
4525 | SSMR3PutU32 (pSSM, pThis->uReplyFreeQueueNextAddressRead);
|
---|
4526 | SSMR3PutU32 (pSSM, pThis->uReplyPostQueueNextEntryFreeWrite);
|
---|
4527 | SSMR3PutU32 (pSSM, pThis->uReplyPostQueueNextAddressRead);
|
---|
4528 | SSMR3PutU32 (pSSM, pThis->uRequestQueueNextEntryFreeWrite);
|
---|
4529 | SSMR3PutU32 (pSSM, pThis->uRequestQueueNextAddressRead);
|
---|
4530 |
|
---|
4531 | for (unsigned i = 0; i < pThis->cReplyQueueEntries; i++)
|
---|
4532 | SSMR3PutU32(pSSM, pThis->pReplyFreeQueueBaseR3[i]);
|
---|
4533 | for (unsigned i = 0; i < pThis->cReplyQueueEntries; i++)
|
---|
4534 | SSMR3PutU32(pSSM, pThis->pReplyPostQueueBaseR3[i]);
|
---|
4535 | for (unsigned i = 0; i < pThis->cRequestQueueEntries; i++)
|
---|
4536 | SSMR3PutU32(pSSM, pThis->pRequestQueueBaseR3[i]);
|
---|
4537 |
|
---|
4538 | SSMR3PutU16 (pSSM, pThis->u16NextHandle);
|
---|
4539 |
|
---|
4540 | /* Save diagnostic memory register and data regions. */
|
---|
4541 | SSMR3PutU32 (pSSM, pThis->u32DiagMemAddr);
|
---|
4542 | SSMR3PutU32 (pSSM, lsilogicR3MemRegionsCount(pThis));
|
---|
4543 |
|
---|
4544 | PLSILOGICMEMREGN pIt = NULL;
|
---|
4545 | RTListForEach(&pThis->ListMemRegns, pIt, LSILOGICMEMREGN, NodeList)
|
---|
4546 | {
|
---|
4547 | SSMR3PutU32(pSSM, pIt->u32AddrStart);
|
---|
4548 | SSMR3PutU32(pSSM, pIt->u32AddrEnd);
|
---|
4549 | SSMR3PutMem(pSSM, &pIt->au32Data[0], (pIt->u32AddrEnd - pIt->u32AddrStart + 1) * sizeof(uint32_t));
|
---|
4550 | }
|
---|
4551 |
|
---|
4552 | PMptConfigurationPagesSupported pPages = pThis->pConfigurationPages;
|
---|
4553 |
|
---|
4554 | SSMR3PutMem (pSSM, &pPages->ManufacturingPage0, sizeof(MptConfigurationPageManufacturing0));
|
---|
4555 | SSMR3PutMem (pSSM, &pPages->ManufacturingPage1, sizeof(MptConfigurationPageManufacturing1));
|
---|
4556 | SSMR3PutMem (pSSM, &pPages->ManufacturingPage2, sizeof(MptConfigurationPageManufacturing2));
|
---|
4557 | SSMR3PutMem (pSSM, &pPages->ManufacturingPage3, sizeof(MptConfigurationPageManufacturing3));
|
---|
4558 | SSMR3PutMem (pSSM, &pPages->ManufacturingPage4, sizeof(MptConfigurationPageManufacturing4));
|
---|
4559 | SSMR3PutMem (pSSM, &pPages->ManufacturingPage5, sizeof(MptConfigurationPageManufacturing5));
|
---|
4560 | SSMR3PutMem (pSSM, &pPages->ManufacturingPage6, sizeof(MptConfigurationPageManufacturing6));
|
---|
4561 | SSMR3PutMem (pSSM, &pPages->ManufacturingPage8, sizeof(MptConfigurationPageManufacturing8));
|
---|
4562 | SSMR3PutMem (pSSM, &pPages->ManufacturingPage9, sizeof(MptConfigurationPageManufacturing9));
|
---|
4563 | SSMR3PutMem (pSSM, &pPages->ManufacturingPage10, sizeof(MptConfigurationPageManufacturing10));
|
---|
4564 | SSMR3PutMem (pSSM, &pPages->IOUnitPage0, sizeof(MptConfigurationPageIOUnit0));
|
---|
4565 | SSMR3PutMem (pSSM, &pPages->IOUnitPage1, sizeof(MptConfigurationPageIOUnit1));
|
---|
4566 | SSMR3PutMem (pSSM, &pPages->IOUnitPage2, sizeof(MptConfigurationPageIOUnit2));
|
---|
4567 | SSMR3PutMem (pSSM, &pPages->IOUnitPage3, sizeof(MptConfigurationPageIOUnit3));
|
---|
4568 | SSMR3PutMem (pSSM, &pPages->IOUnitPage4, sizeof(MptConfigurationPageIOUnit4));
|
---|
4569 | SSMR3PutMem (pSSM, &pPages->IOCPage0, sizeof(MptConfigurationPageIOC0));
|
---|
4570 | SSMR3PutMem (pSSM, &pPages->IOCPage1, sizeof(MptConfigurationPageIOC1));
|
---|
4571 | SSMR3PutMem (pSSM, &pPages->IOCPage2, sizeof(MptConfigurationPageIOC2));
|
---|
4572 | SSMR3PutMem (pSSM, &pPages->IOCPage3, sizeof(MptConfigurationPageIOC3));
|
---|
4573 | SSMR3PutMem (pSSM, &pPages->IOCPage4, sizeof(MptConfigurationPageIOC4));
|
---|
4574 | SSMR3PutMem (pSSM, &pPages->IOCPage6, sizeof(MptConfigurationPageIOC6));
|
---|
4575 | SSMR3PutMem (pSSM, &pPages->BIOSPage1, sizeof(MptConfigurationPageBIOS1));
|
---|
4576 | SSMR3PutMem (pSSM, &pPages->BIOSPage2, sizeof(MptConfigurationPageBIOS2));
|
---|
4577 | SSMR3PutMem (pSSM, &pPages->BIOSPage4, sizeof(MptConfigurationPageBIOS4));
|
---|
4578 |
|
---|
4579 | /* Device dependent pages */
|
---|
4580 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
4581 | {
|
---|
4582 | PMptConfigurationPagesSpi pSpiPages = &pPages->u.SpiPages;
|
---|
4583 |
|
---|
4584 | SSMR3PutMem(pSSM, &pSpiPages->aPortPages[0].SCSISPIPortPage0, sizeof(MptConfigurationPageSCSISPIPort0));
|
---|
4585 | SSMR3PutMem(pSSM, &pSpiPages->aPortPages[0].SCSISPIPortPage1, sizeof(MptConfigurationPageSCSISPIPort1));
|
---|
4586 | SSMR3PutMem(pSSM, &pSpiPages->aPortPages[0].SCSISPIPortPage2, sizeof(MptConfigurationPageSCSISPIPort2));
|
---|
4587 |
|
---|
4588 | for (unsigned i = 0; i < RT_ELEMENTS(pSpiPages->aBuses[0].aDevicePages); i++)
|
---|
4589 | {
|
---|
4590 | SSMR3PutMem(pSSM, &pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage0, sizeof(MptConfigurationPageSCSISPIDevice0));
|
---|
4591 | SSMR3PutMem(pSSM, &pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage1, sizeof(MptConfigurationPageSCSISPIDevice1));
|
---|
4592 | SSMR3PutMem(pSSM, &pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage2, sizeof(MptConfigurationPageSCSISPIDevice2));
|
---|
4593 | SSMR3PutMem(pSSM, &pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage3, sizeof(MptConfigurationPageSCSISPIDevice3));
|
---|
4594 | }
|
---|
4595 | }
|
---|
4596 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
4597 | {
|
---|
4598 | PMptConfigurationPagesSas pSasPages = &pPages->u.SasPages;
|
---|
4599 |
|
---|
4600 | SSMR3PutU32(pSSM, pSasPages->cbManufacturingPage7);
|
---|
4601 | SSMR3PutU32(pSSM, pSasPages->cbSASIOUnitPage0);
|
---|
4602 | SSMR3PutU32(pSSM, pSasPages->cbSASIOUnitPage1);
|
---|
4603 |
|
---|
4604 | SSMR3PutMem(pSSM, pSasPages->pManufacturingPage7, pSasPages->cbManufacturingPage7);
|
---|
4605 | SSMR3PutMem(pSSM, pSasPages->pSASIOUnitPage0, pSasPages->cbSASIOUnitPage0);
|
---|
4606 | SSMR3PutMem(pSSM, pSasPages->pSASIOUnitPage1, pSasPages->cbSASIOUnitPage1);
|
---|
4607 |
|
---|
4608 | SSMR3PutMem(pSSM, &pSasPages->SASIOUnitPage2, sizeof(MptConfigurationPageSASIOUnit2));
|
---|
4609 | SSMR3PutMem(pSSM, &pSasPages->SASIOUnitPage3, sizeof(MptConfigurationPageSASIOUnit3));
|
---|
4610 |
|
---|
4611 | SSMR3PutU32(pSSM, pSasPages->cPHYs);
|
---|
4612 | for (unsigned i = 0; i < pSasPages->cPHYs; i++)
|
---|
4613 | {
|
---|
4614 | SSMR3PutMem(pSSM, &pSasPages->paPHYs[i].SASPHYPage0, sizeof(MptConfigurationPageSASPHY0));
|
---|
4615 | SSMR3PutMem(pSSM, &pSasPages->paPHYs[i].SASPHYPage1, sizeof(MptConfigurationPageSASPHY1));
|
---|
4616 | }
|
---|
4617 |
|
---|
4618 | /* The number of devices first. */
|
---|
4619 | SSMR3PutU32(pSSM, pSasPages->cDevices);
|
---|
4620 |
|
---|
4621 | PMptSASDevice pCurr = pSasPages->pSASDeviceHead;
|
---|
4622 |
|
---|
4623 | while (pCurr)
|
---|
4624 | {
|
---|
4625 | SSMR3PutMem(pSSM, &pCurr->SASDevicePage0, sizeof(MptConfigurationPageSASDevice0));
|
---|
4626 | SSMR3PutMem(pSSM, &pCurr->SASDevicePage1, sizeof(MptConfigurationPageSASDevice1));
|
---|
4627 | SSMR3PutMem(pSSM, &pCurr->SASDevicePage2, sizeof(MptConfigurationPageSASDevice2));
|
---|
4628 |
|
---|
4629 | pCurr = pCurr->pNext;
|
---|
4630 | }
|
---|
4631 | }
|
---|
4632 | else
|
---|
4633 | AssertMsgFailed(("Invalid controller type %d\n", pThis->enmCtrlType));
|
---|
4634 |
|
---|
4635 | vboxscsiR3SaveExec(&pThis->VBoxSCSI, pSSM);
|
---|
4636 | return SSMR3PutU32(pSSM, UINT32_MAX);
|
---|
4637 | }
|
---|
4638 |
|
---|
4639 | /**
|
---|
4640 | * @callback_method_impl{FNSSMDEVLOADDONE}
|
---|
4641 | */
|
---|
4642 | static DECLCALLBACK(int) lsilogicR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
|
---|
4643 | {
|
---|
4644 | RT_NOREF(pSSM);
|
---|
4645 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
4646 |
|
---|
4647 | lsilogicR3Kick(pThis);
|
---|
4648 | return VINF_SUCCESS;
|
---|
4649 | }
|
---|
4650 |
|
---|
4651 | /**
|
---|
4652 | * @callback_method_impl{FNSSMDEVLOADEXEC}
|
---|
4653 | */
|
---|
4654 | static DECLCALLBACK(int) lsilogicR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
|
---|
4655 | {
|
---|
4656 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
4657 | int rc;
|
---|
4658 |
|
---|
4659 | if ( uVersion != LSILOGIC_SAVED_STATE_VERSION
|
---|
4660 | && uVersion != LSILOGIC_SAVED_STATE_VERSION_PRE_DIAG_MEM
|
---|
4661 | && uVersion != LSILOGIC_SAVED_STATE_VERSION_BOOL_DOORBELL
|
---|
4662 | && uVersion != LSILOGIC_SAVED_STATE_VERSION_PRE_SAS
|
---|
4663 | && uVersion != LSILOGIC_SAVED_STATE_VERSION_VBOX_30)
|
---|
4664 | return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
|
---|
4665 |
|
---|
4666 | /* device config */
|
---|
4667 | if (uVersion > LSILOGIC_SAVED_STATE_VERSION_PRE_SAS)
|
---|
4668 | {
|
---|
4669 | LSILOGICCTRLTYPE enmCtrlType;
|
---|
4670 | uint32_t cDeviceStates, cPorts;
|
---|
4671 |
|
---|
4672 | rc = SSMR3GetU32(pSSM, (uint32_t *)&enmCtrlType);
|
---|
4673 | AssertRCReturn(rc, rc);
|
---|
4674 | rc = SSMR3GetU32(pSSM, &cDeviceStates);
|
---|
4675 | AssertRCReturn(rc, rc);
|
---|
4676 | rc = SSMR3GetU32(pSSM, &cPorts);
|
---|
4677 | AssertRCReturn(rc, rc);
|
---|
4678 |
|
---|
4679 | if (enmCtrlType != pThis->enmCtrlType)
|
---|
4680 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target config mismatch (Controller type): config=%d state=%d"),
|
---|
4681 | pThis->enmCtrlType, enmCtrlType);
|
---|
4682 | if (cDeviceStates != pThis->cDeviceStates)
|
---|
4683 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target config mismatch (Device states): config=%u state=%u"),
|
---|
4684 | pThis->cDeviceStates, cDeviceStates);
|
---|
4685 | if (cPorts != pThis->cPorts)
|
---|
4686 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target config mismatch (Ports): config=%u state=%u"),
|
---|
4687 | pThis->cPorts, cPorts);
|
---|
4688 | }
|
---|
4689 | if (uVersion > LSILOGIC_SAVED_STATE_VERSION_VBOX_30)
|
---|
4690 | {
|
---|
4691 | for (unsigned i = 0; i < pThis->cDeviceStates; i++)
|
---|
4692 | {
|
---|
4693 | bool fPresent;
|
---|
4694 | rc = SSMR3GetBool(pSSM, &fPresent);
|
---|
4695 | AssertRCReturn(rc, rc);
|
---|
4696 | if (fPresent != (pThis->paDeviceStates[i].pDrvBase != NULL))
|
---|
4697 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"),
|
---|
4698 | i, pThis->paDeviceStates[i].pDrvBase != NULL, fPresent);
|
---|
4699 | }
|
---|
4700 | }
|
---|
4701 | if (uPass != SSM_PASS_FINAL)
|
---|
4702 | return VINF_SUCCESS;
|
---|
4703 |
|
---|
4704 | /* Every device first. */
|
---|
4705 | for (unsigned i = 0; i < pThis->cDeviceStates; i++)
|
---|
4706 | {
|
---|
4707 | PLSILOGICDEVICE pDevice = &pThis->paDeviceStates[i];
|
---|
4708 |
|
---|
4709 | AssertMsg(!pDevice->cOutstandingRequests,
|
---|
4710 | ("There are still outstanding requests on this device\n"));
|
---|
4711 | SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
|
---|
4712 | }
|
---|
4713 | /* Now the main device state. */
|
---|
4714 | SSMR3GetU32 (pSSM, (uint32_t *)&pThis->enmState);
|
---|
4715 | SSMR3GetU32 (pSSM, (uint32_t *)&pThis->enmWhoInit);
|
---|
4716 | if (uVersion <= LSILOGIC_SAVED_STATE_VERSION_BOOL_DOORBELL)
|
---|
4717 | {
|
---|
4718 | bool fDoorbellInProgress = false;
|
---|
4719 |
|
---|
4720 | /*
|
---|
4721 | * The doorbell status flag distinguishes only between
|
---|
4722 | * doorbell not in use or a Function handshake is currently in progress.
|
---|
4723 | */
|
---|
4724 | SSMR3GetBool (pSSM, &fDoorbellInProgress);
|
---|
4725 | if (fDoorbellInProgress)
|
---|
4726 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_FN_HANDSHAKE;
|
---|
4727 | else
|
---|
4728 | pThis->enmDoorbellState = LSILOGICDOORBELLSTATE_NOT_IN_USE;
|
---|
4729 | }
|
---|
4730 | else
|
---|
4731 | SSMR3GetU32(pSSM, (uint32_t *)&pThis->enmDoorbellState);
|
---|
4732 | SSMR3GetBool (pSSM, &pThis->fDiagnosticEnabled);
|
---|
4733 | SSMR3GetBool (pSSM, &pThis->fNotificationSent);
|
---|
4734 | SSMR3GetBool (pSSM, &pThis->fEventNotificationEnabled);
|
---|
4735 | SSMR3GetU32 (pSSM, (uint32_t *)&pThis->uInterruptMask);
|
---|
4736 | SSMR3GetU32 (pSSM, (uint32_t *)&pThis->uInterruptStatus);
|
---|
4737 | for (unsigned i = 0; i < RT_ELEMENTS(pThis->aMessage); i++)
|
---|
4738 | SSMR3GetU32 (pSSM, &pThis->aMessage[i]);
|
---|
4739 | SSMR3GetU32 (pSSM, &pThis->iMessage);
|
---|
4740 | SSMR3GetU32 (pSSM, &pThis->cMessage);
|
---|
4741 | SSMR3GetMem (pSSM, &pThis->ReplyBuffer, sizeof(pThis->ReplyBuffer));
|
---|
4742 | SSMR3GetU32 (pSSM, &pThis->uNextReplyEntryRead);
|
---|
4743 | SSMR3GetU32 (pSSM, &pThis->cReplySize);
|
---|
4744 | SSMR3GetU16 (pSSM, &pThis->u16IOCFaultCode);
|
---|
4745 | SSMR3GetU32 (pSSM, &pThis->u32HostMFAHighAddr);
|
---|
4746 | SSMR3GetU32 (pSSM, &pThis->u32SenseBufferHighAddr);
|
---|
4747 | SSMR3GetU8 (pSSM, &pThis->cMaxDevices);
|
---|
4748 | SSMR3GetU8 (pSSM, &pThis->cMaxBuses);
|
---|
4749 | SSMR3GetU16 (pSSM, &pThis->cbReplyFrame);
|
---|
4750 | SSMR3GetU32 (pSSM, &pThis->iDiagnosticAccess);
|
---|
4751 |
|
---|
4752 | uint32_t cReplyQueueEntries, cRequestQueueEntries;
|
---|
4753 | SSMR3GetU32 (pSSM, &cReplyQueueEntries);
|
---|
4754 | SSMR3GetU32 (pSSM, &cRequestQueueEntries);
|
---|
4755 |
|
---|
4756 | if ( cReplyQueueEntries != pThis->cReplyQueueEntries
|
---|
4757 | || cRequestQueueEntries != pThis->cRequestQueueEntries)
|
---|
4758 | {
|
---|
4759 | LogFlow(("Reallocating queues cReplyQueueEntries=%u cRequestQueuEntries=%u\n",
|
---|
4760 | cReplyQueueEntries, cRequestQueueEntries));
|
---|
4761 | lsilogicR3QueuesFree(pThis);
|
---|
4762 | pThis->cReplyQueueEntries = cReplyQueueEntries;
|
---|
4763 | pThis->cRequestQueueEntries = cRequestQueueEntries;
|
---|
4764 | rc = lsilogicR3QueuesAlloc(pThis);
|
---|
4765 | if (RT_FAILURE(rc))
|
---|
4766 | return rc;
|
---|
4767 | }
|
---|
4768 |
|
---|
4769 | SSMR3GetU32 (pSSM, (uint32_t *)&pThis->uReplyFreeQueueNextEntryFreeWrite);
|
---|
4770 | SSMR3GetU32 (pSSM, (uint32_t *)&pThis->uReplyFreeQueueNextAddressRead);
|
---|
4771 | SSMR3GetU32 (pSSM, (uint32_t *)&pThis->uReplyPostQueueNextEntryFreeWrite);
|
---|
4772 | SSMR3GetU32 (pSSM, (uint32_t *)&pThis->uReplyPostQueueNextAddressRead);
|
---|
4773 | SSMR3GetU32 (pSSM, (uint32_t *)&pThis->uRequestQueueNextEntryFreeWrite);
|
---|
4774 | SSMR3GetU32 (pSSM, (uint32_t *)&pThis->uRequestQueueNextAddressRead);
|
---|
4775 |
|
---|
4776 | PMptConfigurationPagesSupported pPages = pThis->pConfigurationPages;
|
---|
4777 |
|
---|
4778 | if (uVersion <= LSILOGIC_SAVED_STATE_VERSION_PRE_SAS)
|
---|
4779 | {
|
---|
4780 | PMptConfigurationPagesSpi pSpiPages = &pPages->u.SpiPages;
|
---|
4781 | MptConfigurationPagesSupported_SSM_V2 ConfigPagesV2;
|
---|
4782 |
|
---|
4783 | if (pThis->enmCtrlType != LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
4784 | return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch: Expected SPI SCSI controller"));
|
---|
4785 |
|
---|
4786 | SSMR3GetMem(pSSM, &ConfigPagesV2,
|
---|
4787 | sizeof(MptConfigurationPagesSupported_SSM_V2));
|
---|
4788 |
|
---|
4789 | pPages->ManufacturingPage0 = ConfigPagesV2.ManufacturingPage0;
|
---|
4790 | pPages->ManufacturingPage1 = ConfigPagesV2.ManufacturingPage1;
|
---|
4791 | pPages->ManufacturingPage2 = ConfigPagesV2.ManufacturingPage2;
|
---|
4792 | pPages->ManufacturingPage3 = ConfigPagesV2.ManufacturingPage3;
|
---|
4793 | pPages->ManufacturingPage4 = ConfigPagesV2.ManufacturingPage4;
|
---|
4794 | pPages->IOUnitPage0 = ConfigPagesV2.IOUnitPage0;
|
---|
4795 | pPages->IOUnitPage1 = ConfigPagesV2.IOUnitPage1;
|
---|
4796 | pPages->IOUnitPage2 = ConfigPagesV2.IOUnitPage2;
|
---|
4797 | pPages->IOUnitPage3 = ConfigPagesV2.IOUnitPage3;
|
---|
4798 | pPages->IOCPage0 = ConfigPagesV2.IOCPage0;
|
---|
4799 | pPages->IOCPage1 = ConfigPagesV2.IOCPage1;
|
---|
4800 | pPages->IOCPage2 = ConfigPagesV2.IOCPage2;
|
---|
4801 | pPages->IOCPage3 = ConfigPagesV2.IOCPage3;
|
---|
4802 | pPages->IOCPage4 = ConfigPagesV2.IOCPage4;
|
---|
4803 | pPages->IOCPage6 = ConfigPagesV2.IOCPage6;
|
---|
4804 |
|
---|
4805 | pSpiPages->aPortPages[0].SCSISPIPortPage0 = ConfigPagesV2.aPortPages[0].SCSISPIPortPage0;
|
---|
4806 | pSpiPages->aPortPages[0].SCSISPIPortPage1 = ConfigPagesV2.aPortPages[0].SCSISPIPortPage1;
|
---|
4807 | pSpiPages->aPortPages[0].SCSISPIPortPage2 = ConfigPagesV2.aPortPages[0].SCSISPIPortPage2;
|
---|
4808 |
|
---|
4809 | for (unsigned i = 0; i < RT_ELEMENTS(pPages->u.SpiPages.aBuses[0].aDevicePages); i++)
|
---|
4810 | {
|
---|
4811 | pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage0 = ConfigPagesV2.aBuses[0].aDevicePages[i].SCSISPIDevicePage0;
|
---|
4812 | pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage1 = ConfigPagesV2.aBuses[0].aDevicePages[i].SCSISPIDevicePage1;
|
---|
4813 | pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage2 = ConfigPagesV2.aBuses[0].aDevicePages[i].SCSISPIDevicePage2;
|
---|
4814 | pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage3 = ConfigPagesV2.aBuses[0].aDevicePages[i].SCSISPIDevicePage3;
|
---|
4815 | }
|
---|
4816 | }
|
---|
4817 | else
|
---|
4818 | {
|
---|
4819 | /* Queue content */
|
---|
4820 | for (unsigned i = 0; i < pThis->cReplyQueueEntries; i++)
|
---|
4821 | SSMR3GetU32(pSSM, (uint32_t *)&pThis->pReplyFreeQueueBaseR3[i]);
|
---|
4822 | for (unsigned i = 0; i < pThis->cReplyQueueEntries; i++)
|
---|
4823 | SSMR3GetU32(pSSM, (uint32_t *)&pThis->pReplyPostQueueBaseR3[i]);
|
---|
4824 | for (unsigned i = 0; i < pThis->cRequestQueueEntries; i++)
|
---|
4825 | SSMR3GetU32(pSSM, (uint32_t *)&pThis->pRequestQueueBaseR3[i]);
|
---|
4826 |
|
---|
4827 | SSMR3GetU16(pSSM, &pThis->u16NextHandle);
|
---|
4828 |
|
---|
4829 | if (uVersion > LSILOGIC_SAVED_STATE_VERSION_PRE_DIAG_MEM)
|
---|
4830 | {
|
---|
4831 | uint32_t cMemRegions = 0;
|
---|
4832 |
|
---|
4833 | /* Save diagnostic memory register and data regions. */
|
---|
4834 | SSMR3GetU32 (pSSM, &pThis->u32DiagMemAddr);
|
---|
4835 | SSMR3GetU32 (pSSM, &cMemRegions);
|
---|
4836 |
|
---|
4837 | while (cMemRegions)
|
---|
4838 | {
|
---|
4839 | uint32_t u32AddrStart = 0;
|
---|
4840 | uint32_t u32AddrEnd = 0;
|
---|
4841 | uint32_t cRegion = 0;
|
---|
4842 | PLSILOGICMEMREGN pRegion = NULL;
|
---|
4843 |
|
---|
4844 | SSMR3GetU32(pSSM, &u32AddrStart);
|
---|
4845 | SSMR3GetU32(pSSM, &u32AddrEnd);
|
---|
4846 |
|
---|
4847 | cRegion = u32AddrEnd - u32AddrStart + 1;
|
---|
4848 | pRegion = (PLSILOGICMEMREGN)RTMemAllocZ(RT_OFFSETOF(LSILOGICMEMREGN, au32Data[cRegion]));
|
---|
4849 | if (pRegion)
|
---|
4850 | {
|
---|
4851 | pRegion->u32AddrStart = u32AddrStart;
|
---|
4852 | pRegion->u32AddrEnd = u32AddrEnd;
|
---|
4853 | SSMR3GetMem(pSSM, &pRegion->au32Data[0], cRegion * sizeof(uint32_t));
|
---|
4854 | lsilogicR3MemRegionInsert(pThis, pRegion);
|
---|
4855 | pThis->cbMemRegns += cRegion * sizeof(uint32_t);
|
---|
4856 | }
|
---|
4857 | else
|
---|
4858 | {
|
---|
4859 | /* Leave a log message but continue. */
|
---|
4860 | LogRel(("LsiLogic: Out of memory while restoring the state, might not work as expected\n"));
|
---|
4861 | SSMR3Skip(pSSM, cRegion * sizeof(uint32_t));
|
---|
4862 | }
|
---|
4863 | cMemRegions--;
|
---|
4864 | }
|
---|
4865 | }
|
---|
4866 |
|
---|
4867 | /* Configuration pages */
|
---|
4868 | SSMR3GetMem(pSSM, &pPages->ManufacturingPage0, sizeof(MptConfigurationPageManufacturing0));
|
---|
4869 | SSMR3GetMem(pSSM, &pPages->ManufacturingPage1, sizeof(MptConfigurationPageManufacturing1));
|
---|
4870 | SSMR3GetMem(pSSM, &pPages->ManufacturingPage2, sizeof(MptConfigurationPageManufacturing2));
|
---|
4871 | SSMR3GetMem(pSSM, &pPages->ManufacturingPage3, sizeof(MptConfigurationPageManufacturing3));
|
---|
4872 | SSMR3GetMem(pSSM, &pPages->ManufacturingPage4, sizeof(MptConfigurationPageManufacturing4));
|
---|
4873 | SSMR3GetMem(pSSM, &pPages->ManufacturingPage5, sizeof(MptConfigurationPageManufacturing5));
|
---|
4874 | SSMR3GetMem(pSSM, &pPages->ManufacturingPage6, sizeof(MptConfigurationPageManufacturing6));
|
---|
4875 | SSMR3GetMem(pSSM, &pPages->ManufacturingPage8, sizeof(MptConfigurationPageManufacturing8));
|
---|
4876 | SSMR3GetMem(pSSM, &pPages->ManufacturingPage9, sizeof(MptConfigurationPageManufacturing9));
|
---|
4877 | SSMR3GetMem(pSSM, &pPages->ManufacturingPage10, sizeof(MptConfigurationPageManufacturing10));
|
---|
4878 | SSMR3GetMem(pSSM, &pPages->IOUnitPage0, sizeof(MptConfigurationPageIOUnit0));
|
---|
4879 | SSMR3GetMem(pSSM, &pPages->IOUnitPage1, sizeof(MptConfigurationPageIOUnit1));
|
---|
4880 | SSMR3GetMem(pSSM, &pPages->IOUnitPage2, sizeof(MptConfigurationPageIOUnit2));
|
---|
4881 | SSMR3GetMem(pSSM, &pPages->IOUnitPage3, sizeof(MptConfigurationPageIOUnit3));
|
---|
4882 | SSMR3GetMem(pSSM, &pPages->IOUnitPage4, sizeof(MptConfigurationPageIOUnit4));
|
---|
4883 | SSMR3GetMem(pSSM, &pPages->IOCPage0, sizeof(MptConfigurationPageIOC0));
|
---|
4884 | SSMR3GetMem(pSSM, &pPages->IOCPage1, sizeof(MptConfigurationPageIOC1));
|
---|
4885 | SSMR3GetMem(pSSM, &pPages->IOCPage2, sizeof(MptConfigurationPageIOC2));
|
---|
4886 | SSMR3GetMem(pSSM, &pPages->IOCPage3, sizeof(MptConfigurationPageIOC3));
|
---|
4887 | SSMR3GetMem(pSSM, &pPages->IOCPage4, sizeof(MptConfigurationPageIOC4));
|
---|
4888 | SSMR3GetMem(pSSM, &pPages->IOCPage6, sizeof(MptConfigurationPageIOC6));
|
---|
4889 | SSMR3GetMem(pSSM, &pPages->BIOSPage1, sizeof(MptConfigurationPageBIOS1));
|
---|
4890 | SSMR3GetMem(pSSM, &pPages->BIOSPage2, sizeof(MptConfigurationPageBIOS2));
|
---|
4891 | SSMR3GetMem(pSSM, &pPages->BIOSPage4, sizeof(MptConfigurationPageBIOS4));
|
---|
4892 |
|
---|
4893 | /* Device dependent pages */
|
---|
4894 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
4895 | {
|
---|
4896 | PMptConfigurationPagesSpi pSpiPages = &pPages->u.SpiPages;
|
---|
4897 |
|
---|
4898 | SSMR3GetMem(pSSM, &pSpiPages->aPortPages[0].SCSISPIPortPage0, sizeof(MptConfigurationPageSCSISPIPort0));
|
---|
4899 | SSMR3GetMem(pSSM, &pSpiPages->aPortPages[0].SCSISPIPortPage1, sizeof(MptConfigurationPageSCSISPIPort1));
|
---|
4900 | SSMR3GetMem(pSSM, &pSpiPages->aPortPages[0].SCSISPIPortPage2, sizeof(MptConfigurationPageSCSISPIPort2));
|
---|
4901 |
|
---|
4902 | for (unsigned i = 0; i < RT_ELEMENTS(pSpiPages->aBuses[0].aDevicePages); i++)
|
---|
4903 | {
|
---|
4904 | SSMR3GetMem(pSSM, &pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage0, sizeof(MptConfigurationPageSCSISPIDevice0));
|
---|
4905 | SSMR3GetMem(pSSM, &pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage1, sizeof(MptConfigurationPageSCSISPIDevice1));
|
---|
4906 | SSMR3GetMem(pSSM, &pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage2, sizeof(MptConfigurationPageSCSISPIDevice2));
|
---|
4907 | SSMR3GetMem(pSSM, &pSpiPages->aBuses[0].aDevicePages[i].SCSISPIDevicePage3, sizeof(MptConfigurationPageSCSISPIDevice3));
|
---|
4908 | }
|
---|
4909 | }
|
---|
4910 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
4911 | {
|
---|
4912 | uint32_t cbPage0, cbPage1, cPHYs, cbManufacturingPage7;
|
---|
4913 | PMptConfigurationPagesSas pSasPages = &pPages->u.SasPages;
|
---|
4914 |
|
---|
4915 | SSMR3GetU32(pSSM, &cbManufacturingPage7);
|
---|
4916 | SSMR3GetU32(pSSM, &cbPage0);
|
---|
4917 | SSMR3GetU32(pSSM, &cbPage1);
|
---|
4918 |
|
---|
4919 | if ( (cbPage0 != pSasPages->cbSASIOUnitPage0)
|
---|
4920 | || (cbPage1 != pSasPages->cbSASIOUnitPage1)
|
---|
4921 | || (cbManufacturingPage7 != pSasPages->cbManufacturingPage7))
|
---|
4922 | return VERR_SSM_LOAD_CONFIG_MISMATCH;
|
---|
4923 |
|
---|
4924 | AssertPtr(pSasPages->pManufacturingPage7);
|
---|
4925 | AssertPtr(pSasPages->pSASIOUnitPage0);
|
---|
4926 | AssertPtr(pSasPages->pSASIOUnitPage1);
|
---|
4927 |
|
---|
4928 | SSMR3GetMem(pSSM, pSasPages->pManufacturingPage7, pSasPages->cbManufacturingPage7);
|
---|
4929 | SSMR3GetMem(pSSM, pSasPages->pSASIOUnitPage0, pSasPages->cbSASIOUnitPage0);
|
---|
4930 | SSMR3GetMem(pSSM, pSasPages->pSASIOUnitPage1, pSasPages->cbSASIOUnitPage1);
|
---|
4931 |
|
---|
4932 | SSMR3GetMem(pSSM, &pSasPages->SASIOUnitPage2, sizeof(MptConfigurationPageSASIOUnit2));
|
---|
4933 | SSMR3GetMem(pSSM, &pSasPages->SASIOUnitPage3, sizeof(MptConfigurationPageSASIOUnit3));
|
---|
4934 |
|
---|
4935 | SSMR3GetU32(pSSM, &cPHYs);
|
---|
4936 | if (cPHYs != pSasPages->cPHYs)
|
---|
4937 | return VERR_SSM_LOAD_CONFIG_MISMATCH;
|
---|
4938 |
|
---|
4939 | AssertPtr(pSasPages->paPHYs);
|
---|
4940 | for (unsigned i = 0; i < pSasPages->cPHYs; i++)
|
---|
4941 | {
|
---|
4942 | SSMR3GetMem(pSSM, &pSasPages->paPHYs[i].SASPHYPage0, sizeof(MptConfigurationPageSASPHY0));
|
---|
4943 | SSMR3GetMem(pSSM, &pSasPages->paPHYs[i].SASPHYPage1, sizeof(MptConfigurationPageSASPHY1));
|
---|
4944 | }
|
---|
4945 |
|
---|
4946 | /* The number of devices first. */
|
---|
4947 | SSMR3GetU32(pSSM, &pSasPages->cDevices);
|
---|
4948 |
|
---|
4949 | PMptSASDevice pCurr = pSasPages->pSASDeviceHead;
|
---|
4950 |
|
---|
4951 | for (unsigned i = 0; i < pSasPages->cDevices; i++)
|
---|
4952 | {
|
---|
4953 | SSMR3GetMem(pSSM, &pCurr->SASDevicePage0, sizeof(MptConfigurationPageSASDevice0));
|
---|
4954 | SSMR3GetMem(pSSM, &pCurr->SASDevicePage1, sizeof(MptConfigurationPageSASDevice1));
|
---|
4955 | SSMR3GetMem(pSSM, &pCurr->SASDevicePage2, sizeof(MptConfigurationPageSASDevice2));
|
---|
4956 |
|
---|
4957 | pCurr = pCurr->pNext;
|
---|
4958 | }
|
---|
4959 |
|
---|
4960 | Assert(!pCurr);
|
---|
4961 | }
|
---|
4962 | else
|
---|
4963 | AssertMsgFailed(("Invalid controller type %d\n", pThis->enmCtrlType));
|
---|
4964 | }
|
---|
4965 |
|
---|
4966 | rc = vboxscsiR3LoadExec(&pThis->VBoxSCSI, pSSM);
|
---|
4967 | if (RT_FAILURE(rc))
|
---|
4968 | {
|
---|
4969 | LogRel(("LsiLogic: Failed to restore BIOS state: %Rrc.\n", rc));
|
---|
4970 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
4971 | N_("LsiLogic: Failed to restore BIOS state\n"));
|
---|
4972 | }
|
---|
4973 |
|
---|
4974 | uint32_t u32;
|
---|
4975 | rc = SSMR3GetU32(pSSM, &u32);
|
---|
4976 | if (RT_FAILURE(rc))
|
---|
4977 | return rc;
|
---|
4978 | AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
|
---|
4979 |
|
---|
4980 | return VINF_SUCCESS;
|
---|
4981 | }
|
---|
4982 |
|
---|
4983 |
|
---|
4984 | /*
|
---|
4985 | * The device level IBASE and LED interfaces.
|
---|
4986 | */
|
---|
4987 |
|
---|
4988 | /**
|
---|
4989 | * @interface_method_impl{PDMILEDPORTS,pfnQueryStatusLed, For a SCSI device.}
|
---|
4990 | *
|
---|
4991 | * @remarks Called by the scsi driver, proxying the main calls.
|
---|
4992 | */
|
---|
4993 | static DECLCALLBACK(int) lsilogicR3DeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
|
---|
4994 | {
|
---|
4995 | PLSILOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, LSILOGICDEVICE, ILed);
|
---|
4996 | if (iLUN == 0)
|
---|
4997 | {
|
---|
4998 | *ppLed = &pDevice->Led;
|
---|
4999 | Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
|
---|
5000 | return VINF_SUCCESS;
|
---|
5001 | }
|
---|
5002 | return VERR_PDM_LUN_NOT_FOUND;
|
---|
5003 | }
|
---|
5004 |
|
---|
5005 |
|
---|
5006 | /**
|
---|
5007 | * @interface_method_impl{PDMIBASE,pfnQueryInterface}
|
---|
5008 | */
|
---|
5009 | static DECLCALLBACK(void *) lsilogicR3DeviceQueryInterface(PPDMIBASE pInterface, const char *pszIID)
|
---|
5010 | {
|
---|
5011 | PLSILOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, LSILOGICDEVICE, IBase);
|
---|
5012 |
|
---|
5013 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
|
---|
5014 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDevice->IMediaPort);
|
---|
5015 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAEXPORT, &pDevice->IMediaExPort);
|
---|
5016 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
|
---|
5017 | return NULL;
|
---|
5018 | }
|
---|
5019 |
|
---|
5020 |
|
---|
5021 | /*
|
---|
5022 | * The controller level IBASE and LED interfaces.
|
---|
5023 | */
|
---|
5024 |
|
---|
5025 | /**
|
---|
5026 | * Gets the pointer to the status LED of a unit.
|
---|
5027 | *
|
---|
5028 | * @returns VBox status code.
|
---|
5029 | * @param pInterface Pointer to the interface structure containing the called function pointer.
|
---|
5030 | * @param iLUN The unit which status LED we desire.
|
---|
5031 | * @param ppLed Where to store the LED pointer.
|
---|
5032 | */
|
---|
5033 | static DECLCALLBACK(int) lsilogicR3StatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
|
---|
5034 | {
|
---|
5035 | PLSILOGICSCSI pThis = RT_FROM_MEMBER(pInterface, LSILOGICSCSI, ILeds);
|
---|
5036 | if (iLUN < pThis->cDeviceStates)
|
---|
5037 | {
|
---|
5038 | *ppLed = &pThis->paDeviceStates[iLUN].Led;
|
---|
5039 | Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
|
---|
5040 | return VINF_SUCCESS;
|
---|
5041 | }
|
---|
5042 | return VERR_PDM_LUN_NOT_FOUND;
|
---|
5043 | }
|
---|
5044 |
|
---|
5045 | /**
|
---|
5046 | * @interface_method_impl{PDMIBASE,pfnQueryInterface}
|
---|
5047 | */
|
---|
5048 | static DECLCALLBACK(void *) lsilogicR3StatusQueryInterface(PPDMIBASE pInterface, const char *pszIID)
|
---|
5049 | {
|
---|
5050 | PLSILOGICSCSI pThis = RT_FROM_MEMBER(pInterface, LSILOGICSCSI, IBase);
|
---|
5051 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
|
---|
5052 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
|
---|
5053 | return NULL;
|
---|
5054 | }
|
---|
5055 |
|
---|
5056 |
|
---|
5057 | /*
|
---|
5058 | * The PDM device interface and some helpers.
|
---|
5059 | */
|
---|
5060 |
|
---|
5061 | /**
|
---|
5062 | * Checks if all asynchronous I/O is finished.
|
---|
5063 | *
|
---|
5064 | * Used by lsilogicR3Reset, lsilogicR3Suspend and lsilogicR3PowerOff.
|
---|
5065 | *
|
---|
5066 | * @returns true if quiesced, false if busy.
|
---|
5067 | * @param pDevIns The device instance.
|
---|
5068 | */
|
---|
5069 | static bool lsilogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
|
---|
5070 | {
|
---|
5071 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5072 |
|
---|
5073 | for (uint32_t i = 0; i < pThis->cDeviceStates; i++)
|
---|
5074 | {
|
---|
5075 | PLSILOGICDEVICE pThisDevice = &pThis->paDeviceStates[i];
|
---|
5076 | if (pThisDevice->pDrvBase)
|
---|
5077 | {
|
---|
5078 | if (pThisDevice->cOutstandingRequests != 0)
|
---|
5079 | return false;
|
---|
5080 | }
|
---|
5081 | }
|
---|
5082 |
|
---|
5083 | return true;
|
---|
5084 | }
|
---|
5085 |
|
---|
5086 | /**
|
---|
5087 | * @callback_method_impl{FNPDMDEVASYNCNOTIFY,
|
---|
5088 | * Callback employed by lsilogicR3Suspend and lsilogicR3PowerOff.}
|
---|
5089 | */
|
---|
5090 | static DECLCALLBACK(bool) lsilogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
|
---|
5091 | {
|
---|
5092 | if (!lsilogicR3AllAsyncIOIsFinished(pDevIns))
|
---|
5093 | return false;
|
---|
5094 |
|
---|
5095 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5096 | ASMAtomicWriteBool(&pThis->fSignalIdle, false);
|
---|
5097 | return true;
|
---|
5098 | }
|
---|
5099 |
|
---|
5100 | /**
|
---|
5101 | * Common worker for ahciR3Suspend and ahciR3PowerOff.
|
---|
5102 | */
|
---|
5103 | static void lsilogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns)
|
---|
5104 | {
|
---|
5105 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5106 |
|
---|
5107 | ASMAtomicWriteBool(&pThis->fSignalIdle, true);
|
---|
5108 | if (!lsilogicR3AllAsyncIOIsFinished(pDevIns))
|
---|
5109 | PDMDevHlpSetAsyncNotification(pDevIns, lsilogicR3IsAsyncSuspendOrPowerOffDone);
|
---|
5110 | else
|
---|
5111 | {
|
---|
5112 | ASMAtomicWriteBool(&pThis->fSignalIdle, false);
|
---|
5113 |
|
---|
5114 | AssertMsg(!pThis->fNotificationSent, ("The PDM Queue should be empty at this point\n"));
|
---|
5115 | }
|
---|
5116 | }
|
---|
5117 |
|
---|
5118 | /**
|
---|
5119 | * @interface_method_impl{PDMDEVREG,pfnSuspend}
|
---|
5120 | */
|
---|
5121 | static DECLCALLBACK(void) lsilogicR3Suspend(PPDMDEVINS pDevIns)
|
---|
5122 | {
|
---|
5123 | Log(("lsilogicR3Suspend\n"));
|
---|
5124 | lsilogicR3SuspendOrPowerOff(pDevIns);
|
---|
5125 | }
|
---|
5126 |
|
---|
5127 | /**
|
---|
5128 | * @interface_method_impl{PDMDEVREG,pfnResume}
|
---|
5129 | */
|
---|
5130 | static DECLCALLBACK(void) lsilogicR3Resume(PPDMDEVINS pDevIns)
|
---|
5131 | {
|
---|
5132 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5133 |
|
---|
5134 | Log(("lsilogicR3Resume\n"));
|
---|
5135 |
|
---|
5136 | lsilogicR3Kick(pThis);
|
---|
5137 | }
|
---|
5138 |
|
---|
5139 | /**
|
---|
5140 | * @interface_method_impl{PDMDEVREG,pfnDetach}
|
---|
5141 | *
|
---|
5142 | * One harddisk at one port has been unplugged.
|
---|
5143 | * The VM is suspended at this point.
|
---|
5144 | */
|
---|
5145 | static DECLCALLBACK(void) lsilogicR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
|
---|
5146 | {
|
---|
5147 | RT_NOREF(fFlags);
|
---|
5148 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5149 | PLSILOGICDEVICE pDevice = &pThis->paDeviceStates[iLUN];
|
---|
5150 |
|
---|
5151 | if (iLUN >= pThis->cDeviceStates)
|
---|
5152 | return;
|
---|
5153 |
|
---|
5154 | AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
|
---|
5155 | ("LsiLogic: Device does not support hotplugging\n"));
|
---|
5156 |
|
---|
5157 | Log(("%s:\n", __FUNCTION__));
|
---|
5158 |
|
---|
5159 | /*
|
---|
5160 | * Zero some important members.
|
---|
5161 | */
|
---|
5162 | pDevice->pDrvBase = NULL;
|
---|
5163 | pDevice->pDrvMedia = NULL;
|
---|
5164 | pDevice->pDrvMediaEx = NULL;
|
---|
5165 | }
|
---|
5166 |
|
---|
5167 | /**
|
---|
5168 | * @interface_method_impl{PDMDEVREG,pfnAttach}
|
---|
5169 | */
|
---|
5170 | static DECLCALLBACK(int) lsilogicR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
|
---|
5171 | {
|
---|
5172 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5173 | PLSILOGICDEVICE pDevice = &pThis->paDeviceStates[iLUN];
|
---|
5174 | int rc;
|
---|
5175 |
|
---|
5176 | if (iLUN >= pThis->cDeviceStates)
|
---|
5177 | return VERR_PDM_LUN_NOT_FOUND;
|
---|
5178 |
|
---|
5179 | AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
|
---|
5180 | ("LsiLogic: Device does not support hotplugging\n"),
|
---|
5181 | VERR_INVALID_PARAMETER);
|
---|
5182 |
|
---|
5183 | /* the usual paranoia */
|
---|
5184 | AssertRelease(!pDevice->pDrvBase);
|
---|
5185 | AssertRelease(!pDevice->pDrvMedia);
|
---|
5186 | AssertRelease(!pDevice->pDrvMediaEx);
|
---|
5187 | Assert(pDevice->iLUN == iLUN);
|
---|
5188 |
|
---|
5189 | /*
|
---|
5190 | * Try attach the block device and get the interfaces,
|
---|
5191 | * required as well as optional.
|
---|
5192 | */
|
---|
5193 | rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
|
---|
5194 | if (RT_SUCCESS(rc))
|
---|
5195 | {
|
---|
5196 | /* Query the media interface. */
|
---|
5197 | pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
|
---|
5198 | AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
|
---|
5199 | ("LsiLogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
|
---|
5200 | VERR_PDM_MISSING_INTERFACE);
|
---|
5201 |
|
---|
5202 | /* Get the extended media interface. */
|
---|
5203 | pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
|
---|
5204 | AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
|
---|
5205 | ("LsiLogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
|
---|
5206 | VERR_PDM_MISSING_INTERFACE);
|
---|
5207 |
|
---|
5208 | rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(LSILOGICREQ));
|
---|
5209 | AssertMsgRCReturn(rc, ("LsiLogic configuration error: LUN#%u: Failed to set I/O request size!", pDevice->iLUN),
|
---|
5210 | rc);
|
---|
5211 | }
|
---|
5212 | else
|
---|
5213 | AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
|
---|
5214 |
|
---|
5215 | if (RT_FAILURE(rc))
|
---|
5216 | {
|
---|
5217 | pDevice->pDrvBase = NULL;
|
---|
5218 | pDevice->pDrvMedia = NULL;
|
---|
5219 | pDevice->pDrvMediaEx = NULL;
|
---|
5220 | }
|
---|
5221 | return rc;
|
---|
5222 | }
|
---|
5223 |
|
---|
5224 | /**
|
---|
5225 | * Common reset worker.
|
---|
5226 | *
|
---|
5227 | * @param pDevIns The device instance data.
|
---|
5228 | */
|
---|
5229 | static void lsilogicR3ResetCommon(PPDMDEVINS pDevIns)
|
---|
5230 | {
|
---|
5231 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5232 | int rc;
|
---|
5233 |
|
---|
5234 | rc = lsilogicR3HardReset(pThis);
|
---|
5235 | AssertRC(rc);
|
---|
5236 |
|
---|
5237 | vboxscsiInitialize(&pThis->VBoxSCSI);
|
---|
5238 | }
|
---|
5239 |
|
---|
5240 | /**
|
---|
5241 | * @callback_method_impl{FNPDMDEVASYNCNOTIFY,
|
---|
5242 | * Callback employed by lsilogicR3Reset.}
|
---|
5243 | */
|
---|
5244 | static DECLCALLBACK(bool) lsilogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
|
---|
5245 | {
|
---|
5246 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5247 |
|
---|
5248 | if (!lsilogicR3AllAsyncIOIsFinished(pDevIns))
|
---|
5249 | return false;
|
---|
5250 | ASMAtomicWriteBool(&pThis->fSignalIdle, false);
|
---|
5251 |
|
---|
5252 | lsilogicR3ResetCommon(pDevIns);
|
---|
5253 | return true;
|
---|
5254 | }
|
---|
5255 |
|
---|
5256 | /**
|
---|
5257 | * @interface_method_impl{PDMDEVREG,pfnReset}
|
---|
5258 | */
|
---|
5259 | static DECLCALLBACK(void) lsilogicR3Reset(PPDMDEVINS pDevIns)
|
---|
5260 | {
|
---|
5261 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5262 |
|
---|
5263 | ASMAtomicWriteBool(&pThis->fSignalIdle, true);
|
---|
5264 | if (!lsilogicR3AllAsyncIOIsFinished(pDevIns))
|
---|
5265 | PDMDevHlpSetAsyncNotification(pDevIns, lsilogicR3IsAsyncResetDone);
|
---|
5266 | else
|
---|
5267 | {
|
---|
5268 | ASMAtomicWriteBool(&pThis->fSignalIdle, false);
|
---|
5269 | lsilogicR3ResetCommon(pDevIns);
|
---|
5270 | }
|
---|
5271 | }
|
---|
5272 |
|
---|
5273 | /**
|
---|
5274 | * @interface_method_impl{PDMDEVREG,pfnRelocate}
|
---|
5275 | */
|
---|
5276 | static DECLCALLBACK(void) lsilogicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
|
---|
5277 | {
|
---|
5278 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5279 |
|
---|
5280 | pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
|
---|
5281 | pThis->pNotificationQueueRC = PDMQueueRCPtr(pThis->pNotificationQueueR3);
|
---|
5282 |
|
---|
5283 | /* Relocate queues. */
|
---|
5284 | pThis->pReplyFreeQueueBaseRC += offDelta;
|
---|
5285 | pThis->pReplyPostQueueBaseRC += offDelta;
|
---|
5286 | pThis->pRequestQueueBaseRC += offDelta;
|
---|
5287 | }
|
---|
5288 |
|
---|
5289 | /**
|
---|
5290 | * @interface_method_impl{PDMDEVREG,pfnPowerOff}
|
---|
5291 | */
|
---|
5292 | static DECLCALLBACK(void) lsilogicR3PowerOff(PPDMDEVINS pDevIns)
|
---|
5293 | {
|
---|
5294 | Log(("lsilogicR3PowerOff\n"));
|
---|
5295 | lsilogicR3SuspendOrPowerOff(pDevIns);
|
---|
5296 | }
|
---|
5297 |
|
---|
5298 | /**
|
---|
5299 | * @interface_method_impl{PDMDEVREG,pfnDestruct}
|
---|
5300 | */
|
---|
5301 | static DECLCALLBACK(int) lsilogicR3Destruct(PPDMDEVINS pDevIns)
|
---|
5302 | {
|
---|
5303 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5304 | PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
|
---|
5305 |
|
---|
5306 | PDMR3CritSectDelete(&pThis->ReplyFreeQueueCritSect);
|
---|
5307 | PDMR3CritSectDelete(&pThis->ReplyPostQueueCritSect);
|
---|
5308 |
|
---|
5309 | RTMemFree(pThis->paDeviceStates);
|
---|
5310 | pThis->paDeviceStates = NULL;
|
---|
5311 |
|
---|
5312 | if (pThis->hEvtProcess != NIL_SUPSEMEVENT)
|
---|
5313 | {
|
---|
5314 | SUPSemEventClose(pThis->pSupDrvSession, pThis->hEvtProcess);
|
---|
5315 | pThis->hEvtProcess = NIL_SUPSEMEVENT;
|
---|
5316 | }
|
---|
5317 |
|
---|
5318 | lsilogicR3ConfigurationPagesFree(pThis);
|
---|
5319 | lsilogicR3MemRegionsFree(pThis);
|
---|
5320 |
|
---|
5321 | return VINF_SUCCESS;
|
---|
5322 | }
|
---|
5323 |
|
---|
5324 | /**
|
---|
5325 | * @interface_method_impl{PDMDEVREG,pfnConstruct}
|
---|
5326 | */
|
---|
5327 | static DECLCALLBACK(int) lsilogicR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
|
---|
5328 | {
|
---|
5329 | PLSILOGICSCSI pThis = PDMINS_2_DATA(pDevIns, PLSILOGICSCSI);
|
---|
5330 | int rc = VINF_SUCCESS;
|
---|
5331 | PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
|
---|
5332 |
|
---|
5333 | /*
|
---|
5334 | * Initialize enought of the state to make the destructure not trip up.
|
---|
5335 | */
|
---|
5336 | pThis->hEvtProcess = NIL_SUPSEMEVENT;
|
---|
5337 | pThis->fBiosReqPending = false;
|
---|
5338 | RTListInit(&pThis->ListMemRegns);
|
---|
5339 |
|
---|
5340 | /*
|
---|
5341 | * Validate and read configuration.
|
---|
5342 | */
|
---|
5343 | rc = CFGMR3AreValuesValid(pCfg, "GCEnabled\0"
|
---|
5344 | "R0Enabled\0"
|
---|
5345 | "ReplyQueueDepth\0"
|
---|
5346 | "RequestQueueDepth\0"
|
---|
5347 | "ControllerType\0"
|
---|
5348 | "NumPorts\0"
|
---|
5349 | "Bootable\0");
|
---|
5350 | if (RT_FAILURE(rc))
|
---|
5351 | return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
|
---|
5352 | N_("LsiLogic configuration error: unknown option specified"));
|
---|
5353 | rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
|
---|
5354 | if (RT_FAILURE(rc))
|
---|
5355 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
5356 | N_("LsiLogic configuration error: failed to read GCEnabled as boolean"));
|
---|
5357 | Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
|
---|
5358 |
|
---|
5359 | rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
|
---|
5360 | if (RT_FAILURE(rc))
|
---|
5361 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
5362 | N_("LsiLogic configuration error: failed to read R0Enabled as boolean"));
|
---|
5363 | Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
|
---|
5364 |
|
---|
5365 | rc = CFGMR3QueryU32Def(pCfg, "ReplyQueueDepth",
|
---|
5366 | &pThis->cReplyQueueEntries,
|
---|
5367 | LSILOGICSCSI_REPLY_QUEUE_DEPTH_DEFAULT);
|
---|
5368 | if (RT_FAILURE(rc))
|
---|
5369 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
5370 | N_("LsiLogic configuration error: failed to read ReplyQueue as integer"));
|
---|
5371 | Log(("%s: ReplyQueueDepth=%u\n", __FUNCTION__, pThis->cReplyQueueEntries));
|
---|
5372 |
|
---|
5373 | rc = CFGMR3QueryU32Def(pCfg, "RequestQueueDepth",
|
---|
5374 | &pThis->cRequestQueueEntries,
|
---|
5375 | LSILOGICSCSI_REQUEST_QUEUE_DEPTH_DEFAULT);
|
---|
5376 | if (RT_FAILURE(rc))
|
---|
5377 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
5378 | N_("LsiLogic configuration error: failed to read RequestQueue as integer"));
|
---|
5379 | Log(("%s: RequestQueueDepth=%u\n", __FUNCTION__, pThis->cRequestQueueEntries));
|
---|
5380 |
|
---|
5381 | char *pszCtrlType;
|
---|
5382 | rc = CFGMR3QueryStringAllocDef(pCfg, "ControllerType",
|
---|
5383 | &pszCtrlType, LSILOGICSCSI_PCI_SPI_CTRLNAME);
|
---|
5384 | if (RT_FAILURE(rc))
|
---|
5385 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
5386 | N_("LsiLogic configuration error: failed to read ControllerType as string"));
|
---|
5387 | Log(("%s: ControllerType=%s\n", __FUNCTION__, pszCtrlType));
|
---|
5388 |
|
---|
5389 | rc = lsilogicR3GetCtrlTypeFromString(pThis, pszCtrlType);
|
---|
5390 | MMR3HeapFree(pszCtrlType);
|
---|
5391 |
|
---|
5392 | char szDevTag[20];
|
---|
5393 | RTStrPrintf(szDevTag, sizeof(szDevTag), "LSILOGIC%s-%u",
|
---|
5394 | pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI ? "SPI" : "SAS",
|
---|
5395 | iInstance);
|
---|
5396 |
|
---|
5397 |
|
---|
5398 | if (RT_FAILURE(rc))
|
---|
5399 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
5400 | N_("LsiLogic configuration error: failed to determine controller type from string"));
|
---|
5401 |
|
---|
5402 | rc = CFGMR3QueryU8(pCfg, "NumPorts",
|
---|
5403 | &pThis->cPorts);
|
---|
5404 | if (rc == VERR_CFGM_VALUE_NOT_FOUND)
|
---|
5405 | {
|
---|
5406 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
5407 | pThis->cPorts = LSILOGICSCSI_PCI_SPI_PORTS_MAX;
|
---|
5408 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
5409 | pThis->cPorts = LSILOGICSCSI_PCI_SAS_PORTS_DEFAULT;
|
---|
5410 | else
|
---|
5411 | AssertMsgFailed(("Invalid controller type: %d\n", pThis->enmCtrlType));
|
---|
5412 | }
|
---|
5413 | else if (RT_FAILURE(rc))
|
---|
5414 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
5415 | N_("LsiLogic configuration error: failed to read NumPorts as integer"));
|
---|
5416 |
|
---|
5417 | bool fBootable;
|
---|
5418 | rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
|
---|
5419 | if (RT_FAILURE(rc))
|
---|
5420 | return PDMDEV_SET_ERROR(pDevIns, rc,
|
---|
5421 | N_("LsiLogic configuration error: failed to read Bootable as boolean"));
|
---|
5422 | Log(("%s: Bootable=%RTbool\n", __FUNCTION__, fBootable));
|
---|
5423 |
|
---|
5424 | /* Init static parts. */
|
---|
5425 | PCIDevSetVendorId(&pThis->PciDev, LSILOGICSCSI_PCI_VENDOR_ID); /* LsiLogic */
|
---|
5426 |
|
---|
5427 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
5428 | {
|
---|
5429 | PCIDevSetDeviceId (&pThis->PciDev, LSILOGICSCSI_PCI_SPI_DEVICE_ID); /* LSI53C1030 */
|
---|
5430 | PCIDevSetSubSystemVendorId(&pThis->PciDev, LSILOGICSCSI_PCI_SPI_SUBSYSTEM_VENDOR_ID);
|
---|
5431 | PCIDevSetSubSystemId (&pThis->PciDev, LSILOGICSCSI_PCI_SPI_SUBSYSTEM_ID);
|
---|
5432 | }
|
---|
5433 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
5434 | {
|
---|
5435 | PCIDevSetDeviceId (&pThis->PciDev, LSILOGICSCSI_PCI_SAS_DEVICE_ID); /* SAS1068 */
|
---|
5436 | PCIDevSetSubSystemVendorId(&pThis->PciDev, LSILOGICSCSI_PCI_SAS_SUBSYSTEM_VENDOR_ID);
|
---|
5437 | PCIDevSetSubSystemId (&pThis->PciDev, LSILOGICSCSI_PCI_SAS_SUBSYSTEM_ID);
|
---|
5438 | }
|
---|
5439 | else
|
---|
5440 | AssertMsgFailed(("Invalid controller type: %d\n", pThis->enmCtrlType));
|
---|
5441 |
|
---|
5442 | PCIDevSetClassProg (&pThis->PciDev, 0x00); /* SCSI */
|
---|
5443 | PCIDevSetClassSub (&pThis->PciDev, 0x00); /* SCSI */
|
---|
5444 | PCIDevSetClassBase (&pThis->PciDev, 0x01); /* Mass storage */
|
---|
5445 | PCIDevSetInterruptPin(&pThis->PciDev, 0x01); /* Interrupt pin A */
|
---|
5446 |
|
---|
5447 | # ifdef VBOX_WITH_MSI_DEVICES
|
---|
5448 | PCIDevSetStatus(&pThis->PciDev, VBOX_PCI_STATUS_CAP_LIST);
|
---|
5449 | PCIDevSetCapabilityList(&pThis->PciDev, 0x80);
|
---|
5450 | # endif
|
---|
5451 |
|
---|
5452 | pThis->pDevInsR3 = pDevIns;
|
---|
5453 | pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
|
---|
5454 | pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
|
---|
5455 | pThis->pSupDrvSession = PDMDevHlpGetSupDrvSession(pDevIns);
|
---|
5456 | pThis->IBase.pfnQueryInterface = lsilogicR3StatusQueryInterface;
|
---|
5457 | pThis->ILeds.pfnQueryStatusLed = lsilogicR3StatusQueryStatusLed;
|
---|
5458 |
|
---|
5459 | /*
|
---|
5460 | * Create critical sections protecting the reply post and free queues.
|
---|
5461 | * Note! We do our own syncronization, so NOP the default crit sect for the device.
|
---|
5462 | */
|
---|
5463 | rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
|
---|
5464 | AssertRCReturn(rc, rc);
|
---|
5465 |
|
---|
5466 | rc = PDMDevHlpCritSectInit(pDevIns, &pThis->ReplyFreeQueueCritSect, RT_SRC_POS, "%sRFQ", szDevTag);
|
---|
5467 | if (RT_FAILURE(rc))
|
---|
5468 | return PDMDEV_SET_ERROR(pDevIns, rc, N_("LsiLogic: cannot create critical section for reply free queue"));
|
---|
5469 |
|
---|
5470 | rc = PDMDevHlpCritSectInit(pDevIns, &pThis->ReplyPostQueueCritSect, RT_SRC_POS, "%sRPQ", szDevTag);
|
---|
5471 | if (RT_FAILURE(rc))
|
---|
5472 | return PDMDEV_SET_ERROR(pDevIns, rc, N_("LsiLogic: cannot create critical section for reply post queue"));
|
---|
5473 |
|
---|
5474 | /*
|
---|
5475 | * Register the PCI device, it's I/O regions.
|
---|
5476 | */
|
---|
5477 | rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev);
|
---|
5478 | if (RT_FAILURE(rc))
|
---|
5479 | return rc;
|
---|
5480 |
|
---|
5481 | # ifdef VBOX_WITH_MSI_DEVICES
|
---|
5482 | PDMMSIREG MsiReg;
|
---|
5483 | RT_ZERO(MsiReg);
|
---|
5484 | /* use this code for MSI-X support */
|
---|
5485 | # if 0
|
---|
5486 | MsiReg.cMsixVectors = 1;
|
---|
5487 | MsiReg.iMsixCapOffset = 0x80;
|
---|
5488 | MsiReg.iMsixNextOffset = 0x00;
|
---|
5489 | MsiReg.iMsixBar = 3;
|
---|
5490 | # else
|
---|
5491 | MsiReg.cMsiVectors = 1;
|
---|
5492 | MsiReg.iMsiCapOffset = 0x80;
|
---|
5493 | MsiReg.iMsiNextOffset = 0x00;
|
---|
5494 | # endif
|
---|
5495 | rc = PDMDevHlpPCIRegisterMsi(pDevIns, &MsiReg);
|
---|
5496 | if (RT_FAILURE (rc))
|
---|
5497 | {
|
---|
5498 | /* That's OK, we can work without MSI */
|
---|
5499 | PCIDevSetCapabilityList(&pThis->PciDev, 0x0);
|
---|
5500 | }
|
---|
5501 | # endif
|
---|
5502 |
|
---|
5503 | rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, LSILOGIC_PCI_SPACE_IO_SIZE, PCI_ADDRESS_SPACE_IO, lsilogicR3Map);
|
---|
5504 | if (RT_FAILURE(rc))
|
---|
5505 | return rc;
|
---|
5506 |
|
---|
5507 | rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, LSILOGIC_PCI_SPACE_MEM_SIZE, PCI_ADDRESS_SPACE_MEM, lsilogicR3Map);
|
---|
5508 | if (RT_FAILURE(rc))
|
---|
5509 | return rc;
|
---|
5510 |
|
---|
5511 | rc = PDMDevHlpPCIIORegionRegister(pDevIns, 2, LSILOGIC_PCI_SPACE_MEM_SIZE, PCI_ADDRESS_SPACE_MEM, lsilogicR3Map);
|
---|
5512 | if (RT_FAILURE(rc))
|
---|
5513 | return rc;
|
---|
5514 |
|
---|
5515 | /* Initialize task queue. (Need two items to handle SMP guest concurrency.) */
|
---|
5516 | char szTaggedText[64];
|
---|
5517 | RTStrPrintf(szTaggedText, sizeof(szTaggedText), "%s-Task", szDevTag);
|
---|
5518 | rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 2, 0,
|
---|
5519 | lsilogicR3NotifyQueueConsumer, true,
|
---|
5520 | szTaggedText,
|
---|
5521 | &pThis->pNotificationQueueR3);
|
---|
5522 | if (RT_FAILURE(rc))
|
---|
5523 | return rc;
|
---|
5524 | pThis->pNotificationQueueR0 = PDMQueueR0Ptr(pThis->pNotificationQueueR3);
|
---|
5525 | pThis->pNotificationQueueRC = PDMQueueRCPtr(pThis->pNotificationQueueR3);
|
---|
5526 |
|
---|
5527 | /*
|
---|
5528 | * We need one entry free in the queue.
|
---|
5529 | */
|
---|
5530 | pThis->cReplyQueueEntries++;
|
---|
5531 | pThis->cRequestQueueEntries++;
|
---|
5532 |
|
---|
5533 | /*
|
---|
5534 | * Allocate memory for the queues.
|
---|
5535 | */
|
---|
5536 | rc = lsilogicR3QueuesAlloc(pThis);
|
---|
5537 | if (RT_FAILURE(rc))
|
---|
5538 | return rc;
|
---|
5539 |
|
---|
5540 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
5541 | pThis->cDeviceStates = pThis->cPorts * LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX;
|
---|
5542 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
5543 | pThis->cDeviceStates = pThis->cPorts * LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX;
|
---|
5544 | else
|
---|
5545 | AssertMsgFailed(("Invalid controller type: %d\n", pThis->enmCtrlType));
|
---|
5546 |
|
---|
5547 | /*
|
---|
5548 | * Create event semaphore and worker thread.
|
---|
5549 | */
|
---|
5550 | rc = PDMDevHlpThreadCreate(pDevIns, &pThis->pThreadWrk, pThis, lsilogicR3Worker,
|
---|
5551 | lsilogicR3WorkerWakeUp, 0, RTTHREADTYPE_IO, szDevTag);
|
---|
5552 | if (RT_FAILURE(rc))
|
---|
5553 | return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
|
---|
5554 | N_("LsiLogic: Failed to create worker thread %s"), szDevTag);
|
---|
5555 |
|
---|
5556 | rc = SUPSemEventCreate(pThis->pSupDrvSession, &pThis->hEvtProcess);
|
---|
5557 | if (RT_FAILURE(rc))
|
---|
5558 | return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
|
---|
5559 | N_("LsiLogic: Failed to create SUP event semaphore"));
|
---|
5560 |
|
---|
5561 | /*
|
---|
5562 | * Allocate device states.
|
---|
5563 | */
|
---|
5564 | pThis->paDeviceStates = (PLSILOGICDEVICE)RTMemAllocZ(sizeof(LSILOGICDEVICE) * pThis->cDeviceStates);
|
---|
5565 | if (!pThis->paDeviceStates)
|
---|
5566 | return PDMDEV_SET_ERROR(pDevIns, rc, N_("Failed to allocate memory for device states"));
|
---|
5567 |
|
---|
5568 | for (unsigned i = 0; i < pThis->cDeviceStates; i++)
|
---|
5569 | {
|
---|
5570 | char szName[24];
|
---|
5571 | PLSILOGICDEVICE pDevice = &pThis->paDeviceStates[i];
|
---|
5572 |
|
---|
5573 | /* Initialize static parts of the device. */
|
---|
5574 | pDevice->iLUN = i;
|
---|
5575 | pDevice->pLsiLogicR3 = pThis;
|
---|
5576 | pDevice->Led.u32Magic = PDMLED_MAGIC;
|
---|
5577 | pDevice->IBase.pfnQueryInterface = lsilogicR3DeviceQueryInterface;
|
---|
5578 | pDevice->IMediaPort.pfnQueryDeviceLocation = lsilogicR3QueryDeviceLocation;
|
---|
5579 | pDevice->IMediaExPort.pfnIoReqCompleteNotify = lsilogicR3IoReqCompleteNotify;
|
---|
5580 | pDevice->IMediaExPort.pfnIoReqCopyFromBuf = lsilogicR3IoReqCopyFromBuf;
|
---|
5581 | pDevice->IMediaExPort.pfnIoReqCopyToBuf = lsilogicR3IoReqCopyToBuf;
|
---|
5582 | pDevice->IMediaExPort.pfnIoReqQueryBuf = NULL;
|
---|
5583 | pDevice->IMediaExPort.pfnIoReqQueryDiscardRanges = NULL;
|
---|
5584 | pDevice->IMediaExPort.pfnIoReqStateChanged = lsilogicR3IoReqStateChanged;
|
---|
5585 | pDevice->IMediaExPort.pfnMediumEjected = lsilogicR3MediumEjected;
|
---|
5586 | pDevice->ILed.pfnQueryStatusLed = lsilogicR3DeviceQueryStatusLed;
|
---|
5587 |
|
---|
5588 | RTStrPrintf(szName, sizeof(szName), "Device%u", i);
|
---|
5589 |
|
---|
5590 | /* Attach SCSI driver. */
|
---|
5591 | rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, szName);
|
---|
5592 | if (RT_SUCCESS(rc))
|
---|
5593 | {
|
---|
5594 | /* Query the media interface. */
|
---|
5595 | pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
|
---|
5596 | AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
|
---|
5597 | ("LsiLogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
|
---|
5598 | VERR_PDM_MISSING_INTERFACE);
|
---|
5599 |
|
---|
5600 | /* Get the extended media interface. */
|
---|
5601 | pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
|
---|
5602 | AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
|
---|
5603 | ("LsiLogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
|
---|
5604 | VERR_PDM_MISSING_INTERFACE);
|
---|
5605 |
|
---|
5606 | rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(LSILOGICREQ));
|
---|
5607 | if (RT_FAILURE(rc))
|
---|
5608 | return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
|
---|
5609 | N_("LsiLogic configuration error: LUN#%u: Failed to set I/O request size!"),
|
---|
5610 | pDevice->iLUN);
|
---|
5611 | }
|
---|
5612 | else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
|
---|
5613 | {
|
---|
5614 | pDevice->pDrvBase = NULL;
|
---|
5615 | rc = VINF_SUCCESS;
|
---|
5616 | Log(("LsiLogic: no driver attached to device %s\n", szName));
|
---|
5617 | }
|
---|
5618 | else
|
---|
5619 | {
|
---|
5620 | AssertLogRelMsgFailed(("LsiLogic: Failed to attach %s\n", szName));
|
---|
5621 | return rc;
|
---|
5622 | }
|
---|
5623 | }
|
---|
5624 |
|
---|
5625 | /*
|
---|
5626 | * Attach status driver (optional).
|
---|
5627 | */
|
---|
5628 | PPDMIBASE pBase;
|
---|
5629 | rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
|
---|
5630 | if (RT_SUCCESS(rc))
|
---|
5631 | {
|
---|
5632 | pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
|
---|
5633 | pThis->pMediaNotify = PDMIBASE_QUERY_INTERFACE(pBase, PDMIMEDIANOTIFY);
|
---|
5634 | }
|
---|
5635 | else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
|
---|
5636 | {
|
---|
5637 | AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
|
---|
5638 | return PDMDEV_SET_ERROR(pDevIns, rc, N_("LsiLogic cannot attach to status driver"));
|
---|
5639 | }
|
---|
5640 |
|
---|
5641 | /* Initialize the SCSI emulation for the BIOS. */
|
---|
5642 | rc = vboxscsiInitialize(&pThis->VBoxSCSI);
|
---|
5643 | AssertRC(rc);
|
---|
5644 |
|
---|
5645 | /*
|
---|
5646 | * Register I/O port space in ISA region for BIOS access
|
---|
5647 | * if the controller is marked as bootable.
|
---|
5648 | */
|
---|
5649 | if (fBootable)
|
---|
5650 | {
|
---|
5651 | if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI)
|
---|
5652 | rc = PDMDevHlpIOPortRegister(pDevIns, LSILOGIC_BIOS_IO_PORT, 4, NULL,
|
---|
5653 | lsilogicR3IsaIOPortWrite, lsilogicR3IsaIOPortRead,
|
---|
5654 | lsilogicR3IsaIOPortWriteStr, lsilogicR3IsaIOPortReadStr,
|
---|
5655 | "LsiLogic BIOS");
|
---|
5656 | else if (pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SAS)
|
---|
5657 | rc = PDMDevHlpIOPortRegister(pDevIns, LSILOGIC_SAS_BIOS_IO_PORT, 4, NULL,
|
---|
5658 | lsilogicR3IsaIOPortWrite, lsilogicR3IsaIOPortRead,
|
---|
5659 | lsilogicR3IsaIOPortWriteStr, lsilogicR3IsaIOPortReadStr,
|
---|
5660 | "LsiLogic SAS BIOS");
|
---|
5661 | else
|
---|
5662 | AssertMsgFailed(("Invalid controller type %d\n", pThis->enmCtrlType));
|
---|
5663 |
|
---|
5664 | if (RT_FAILURE(rc))
|
---|
5665 | return PDMDEV_SET_ERROR(pDevIns, rc, N_("LsiLogic cannot register legacy I/O handlers"));
|
---|
5666 | }
|
---|
5667 |
|
---|
5668 | /* Register save state handlers. */
|
---|
5669 | rc = PDMDevHlpSSMRegisterEx(pDevIns, LSILOGIC_SAVED_STATE_VERSION, sizeof(*pThis), NULL,
|
---|
5670 | NULL, lsilogicR3LiveExec, NULL,
|
---|
5671 | NULL, lsilogicR3SaveExec, NULL,
|
---|
5672 | NULL, lsilogicR3LoadExec, lsilogicR3LoadDone);
|
---|
5673 | if (RT_FAILURE(rc))
|
---|
5674 | return PDMDEV_SET_ERROR(pDevIns, rc, N_("LsiLogic cannot register save state handlers"));
|
---|
5675 |
|
---|
5676 | pThis->enmWhoInit = LSILOGICWHOINIT_SYSTEM_BIOS;
|
---|
5677 |
|
---|
5678 | /*
|
---|
5679 | * Register the info item.
|
---|
5680 | */
|
---|
5681 | char szTmp[128];
|
---|
5682 | RTStrPrintf(szTmp, sizeof(szTmp), "%s%u", pDevIns->pReg->szName, pDevIns->iInstance);
|
---|
5683 | PDMDevHlpDBGFInfoRegister(pDevIns, szTmp,
|
---|
5684 | pThis->enmCtrlType == LSILOGICCTRLTYPE_SCSI_SPI
|
---|
5685 | ? "LsiLogic SPI info."
|
---|
5686 | : "LsiLogic SAS info.", lsilogicR3Info);
|
---|
5687 |
|
---|
5688 | /* Perform hard reset. */
|
---|
5689 | rc = lsilogicR3HardReset(pThis);
|
---|
5690 | AssertRC(rc);
|
---|
5691 |
|
---|
5692 | return rc;
|
---|
5693 | }
|
---|
5694 |
|
---|
5695 | /**
|
---|
5696 | * The device registration structure - SPI SCSI controller.
|
---|
5697 | */
|
---|
5698 | const PDMDEVREG g_DeviceLsiLogicSCSI =
|
---|
5699 | {
|
---|
5700 | /* u32Version */
|
---|
5701 | PDM_DEVREG_VERSION,
|
---|
5702 | /* szName */
|
---|
5703 | "lsilogicscsi",
|
---|
5704 | /* szRCMod */
|
---|
5705 | "VBoxDDRC.rc",
|
---|
5706 | /* szR0Mod */
|
---|
5707 | "VBoxDDR0.r0",
|
---|
5708 | /* pszDescription */
|
---|
5709 | "LSI Logic 53c1030 SCSI controller.\n",
|
---|
5710 | /* fFlags */
|
---|
5711 | PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0 |
|
---|
5712 | PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION | PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION,
|
---|
5713 | /* fClass */
|
---|
5714 | PDM_DEVREG_CLASS_STORAGE,
|
---|
5715 | /* cMaxInstances */
|
---|
5716 | ~0U,
|
---|
5717 | /* cbInstance */
|
---|
5718 | sizeof(LSILOGICSCSI),
|
---|
5719 | /* pfnConstruct */
|
---|
5720 | lsilogicR3Construct,
|
---|
5721 | /* pfnDestruct */
|
---|
5722 | lsilogicR3Destruct,
|
---|
5723 | /* pfnRelocate */
|
---|
5724 | lsilogicR3Relocate,
|
---|
5725 | /* pfnMemSetup */
|
---|
5726 | NULL,
|
---|
5727 | /* pfnPowerOn */
|
---|
5728 | NULL,
|
---|
5729 | /* pfnReset */
|
---|
5730 | lsilogicR3Reset,
|
---|
5731 | /* pfnSuspend */
|
---|
5732 | lsilogicR3Suspend,
|
---|
5733 | /* pfnResume */
|
---|
5734 | lsilogicR3Resume,
|
---|
5735 | /* pfnAttach */
|
---|
5736 | lsilogicR3Attach,
|
---|
5737 | /* pfnDetach */
|
---|
5738 | lsilogicR3Detach,
|
---|
5739 | /* pfnQueryInterface. */
|
---|
5740 | NULL,
|
---|
5741 | /* pfnInitComplete */
|
---|
5742 | NULL,
|
---|
5743 | /* pfnPowerOff */
|
---|
5744 | lsilogicR3PowerOff,
|
---|
5745 | /* pfnSoftReset */
|
---|
5746 | NULL,
|
---|
5747 | /* u32VersionEnd */
|
---|
5748 | PDM_DEVREG_VERSION
|
---|
5749 | };
|
---|
5750 |
|
---|
5751 | /**
|
---|
5752 | * The device registration structure - SAS controller.
|
---|
5753 | */
|
---|
5754 | const PDMDEVREG g_DeviceLsiLogicSAS =
|
---|
5755 | {
|
---|
5756 | /* u32Version */
|
---|
5757 | PDM_DEVREG_VERSION,
|
---|
5758 | /* szName */
|
---|
5759 | "lsilogicsas",
|
---|
5760 | /* szRCMod */
|
---|
5761 | "VBoxDDRC.rc",
|
---|
5762 | /* szR0Mod */
|
---|
5763 | "VBoxDDR0.r0",
|
---|
5764 | /* pszDescription */
|
---|
5765 | "LSI Logic SAS1068 controller.\n",
|
---|
5766 | /* fFlags */
|
---|
5767 | PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0 |
|
---|
5768 | PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION | PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION |
|
---|
5769 | PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
|
---|
5770 | /* fClass */
|
---|
5771 | PDM_DEVREG_CLASS_STORAGE,
|
---|
5772 | /* cMaxInstances */
|
---|
5773 | ~0U,
|
---|
5774 | /* cbInstance */
|
---|
5775 | sizeof(LSILOGICSCSI),
|
---|
5776 | /* pfnConstruct */
|
---|
5777 | lsilogicR3Construct,
|
---|
5778 | /* pfnDestruct */
|
---|
5779 | lsilogicR3Destruct,
|
---|
5780 | /* pfnRelocate */
|
---|
5781 | lsilogicR3Relocate,
|
---|
5782 | /* pfnMemSetup */
|
---|
5783 | NULL,
|
---|
5784 | /* pfnPowerOn */
|
---|
5785 | NULL,
|
---|
5786 | /* pfnReset */
|
---|
5787 | lsilogicR3Reset,
|
---|
5788 | /* pfnSuspend */
|
---|
5789 | lsilogicR3Suspend,
|
---|
5790 | /* pfnResume */
|
---|
5791 | lsilogicR3Resume,
|
---|
5792 | /* pfnAttach */
|
---|
5793 | lsilogicR3Attach,
|
---|
5794 | /* pfnDetach */
|
---|
5795 | lsilogicR3Detach,
|
---|
5796 | /* pfnQueryInterface. */
|
---|
5797 | NULL,
|
---|
5798 | /* pfnInitComplete */
|
---|
5799 | NULL,
|
---|
5800 | /* pfnPowerOff */
|
---|
5801 | lsilogicR3PowerOff,
|
---|
5802 | /* pfnSoftReset */
|
---|
5803 | NULL,
|
---|
5804 | /* u32VersionEnd */
|
---|
5805 | PDM_DEVREG_VERSION
|
---|
5806 | };
|
---|
5807 |
|
---|
5808 | #endif /* IN_RING3 */
|
---|
5809 | #endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
|
---|