DevLsiLogicSCSI.h@ 25536

Last change on this file since 25536 was 25509, checked in by vboxsync, 15 years ago
LsiLogic: Start for the SAS controller. Define neccessary pages and separate the spi from the sas pages. Move the structs in a separate header file to make the source file smaller
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File size: 97.4 KB

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1	/* $Id: DevLsiLogicSCSI.h 25509 2009-12-18 23:03:25Z vboxsync $ */
2	/** @file
3	* VBox storage devices: LsiLogic LSI53c1030 SCSI controller - Defines and structures.
4	*/
5
6	/*
7	* Copyright (C) 2006-2009 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21	#ifndef __DEVLSILOGICSCSI_H__
22	#define __DEVLSILOGICSCSI_H__
23
24	#include <iprt/stdint.h>
25
26	/*
27	* I/O port registered in the ISA compatible range to let the BIOS access
28	* the controller.
29	*/
30	#define LSILOGIC_ISA_IO_PORT 0x340
31
32	#define LSILOGICSCSI_REQUEST_QUEUE_DEPTH_DEFAULT 1024
33	#define LSILOGICSCSI_REPLY_QUEUE_DEPTH_DEFAULT 128
34
35	#define LSILOGICSCSI_MAXIMUM_CHAIN_DEPTH 3
36
37	#define LSILOGIC_NR_OF_ALLOWED_BIGGER_LISTS 100
38
39	/** Equal for all devices */
40	#define LSILOGICSCSI_PCI_VENDOR_ID (0x1000)
41
42	/** SPI SCSI controller (LSI53C1030) */
43	#define LSILOGICSCSI_PCI_SPI_CTRLNAME "LSI53C1030"
44	#define LSILOGICSCSI_PCI_SPI_DEVICE_ID (0x0030)
45	#define LSILOGICSCSI_PCI_SPI_REVISION_ID (0x00)
46	#define LSILOGICSCSI_PCI_SPI_CLASS_CODE (0x01)
47	#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_VENDOR_ID (0x1000)
48	#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_ID (0x8000)
49	#define LSILOGICSCSI_PCI_SPI_PORTS_MAX 1
50	#define LSILOGICSCSI_PCI_SPI_BUSES_MAX 1
51	#define LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX 16
52	#define LSILOGICSCSI_PCI_SPI_DEVICES_MAX (LSILOGICSCSI_PCI_SPI_BUSES_MAX*LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX)
53
54	/** SAS SCSI controller (SAS1068 PCI-X Fusion-MPT SAS) */
55	#define LSILOGICSCSI_PCI_SAS_CTRLNAME "SAS1068"
56	#define LSILOGICSCSI_PCI_SAS_DEVICE_ID (0x0054)
57	#define LSILOGICSCSI_PCI_SAS_REVISION_ID (0x00)
58	#define LSILOGICSCSI_PCI_SAS_CLASS_CODE (0x00)
59	#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_VENDOR_ID (0x1000)
60	#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_ID (0x8000)
61	#define LSILOGICSCSI_PCI_SAS_PORTS_MAX 8
62	#define LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX 1
63	#define LSILOGICSCSI_PCI_SAS_DEVICES_MAX (LSILOGICSCSI_PCI_SAS_PORTS_MAX * LSILOGICSCSI_PCI_SAS_DEVICES_MAX)
64
65	/** Maximum number of devices for both types */
66	#define LSILOGIC_DEVICES_MAX LSILOGICSCSI_PCI_SPI_DEVICES_MAX
67
68	/** The current saved state version. */
69	#define LSILOGIC_SAVED_STATE_VERSION 2
70	/** The saved state version used by VirtualBox 3.0 and earlier. It does not
71	* include the device config part. */
72	#define LSILOGIC_SAVED_STATE_VERSION_VBOX_30 1
73
74	/**
75	* Possible device types we support.
76	*/
77	typedef enum LSILOGICCTRLTYPE
78	{
79	/** SPI SCSI controller (PCI dev id 0x0030) */
80	LSILOGICCTRLTYPE_SCSI_SPI = 0,
81	/** SAS SCSI controller (PCI dev id 0x0054) */
82	LSILOGICCTRLTYPE_SCSI_SAS = 1,
83	/** 32bit hack */
84	LSILOGICCTRLTYPE_32BIT_HACK = 0x7fffffff
85	} LSILOGICCTRLTYPE, *PLSILOGICCTRLTYPE;
86
87	/**
88	* A simple SG element for a 64bit adress.
89	*/
90	#pragma pack(1)
91	typedef struct MptSGEntrySimple64
92	{
93	/** Length of the buffer this entry describes. */
94	unsigned u24Length: 24;
95	/** Flag whether this element is the end of the list. */
96	unsigned fEndOfList: 1;
97	/** Flag whether the address is 32bit or 64bits wide. */
98	unsigned f64BitAddress: 1;
99	/** Flag whether this buffer contains data to be transfered or is the destination. */
100	unsigned fBufferContainsData: 1;
101	/** Flag whether this is a local address or a system address. */
102	unsigned fLocalAddress: 1;
103	/** Element type. */
104	unsigned u2ElementType: 2;
105	/** Flag whether this is the last element of the buffer. */
106	unsigned fEndOfBuffer: 1;
107	/** Flag whether this is the last element of the current segment. */
108	unsigned fLastElement: 1;
109	/** Lower 32bits of the address of the data buffer. */
110	unsigned u32DataBufferAddressLow: 32;
111	/** Upper 32bits of the address of the data buffer. */
112	unsigned u32DataBufferAddressHigh: 32;
113	} MptSGEntrySimple64, *PMptSGEntrySimple64;
114	#pragma pack()
115	AssertCompileSize(MptSGEntrySimple64, 12);
116
117	/**
118	* A simple SG element for a 32bit adress.
119	*/
120	#pragma pack(1)
121	typedef struct MptSGEntrySimple32
122	{
123	/** Length of the buffer this entry describes. */
124	unsigned u24Length: 24;
125	/** Flag whether this element is the end of the list. */
126	unsigned fEndOfList: 1;
127	/** Flag whether the address is 32bit or 64bits wide. */
128	unsigned f64BitAddress: 1;
129	/** Flag whether this buffer contains data to be transfered or is the destination. */
130	unsigned fBufferContainsData: 1;
131	/** Flag whether this is a local address or a system address. */
132	unsigned fLocalAddress: 1;
133	/** Element type. */
134	unsigned u2ElementType: 2;
135	/** Flag whether this is the last element of the buffer. */
136	unsigned fEndOfBuffer: 1;
137	/** Flag whether this is the last element of the current segment. */
138	unsigned fLastElement: 1;
139	/** Lower 32bits of the address of the data buffer. */
140	unsigned u32DataBufferAddressLow: 32;
141	} MptSGEntrySimple32, *PMptSGEntrySimple32;
142	#pragma pack()
143	AssertCompileSize(MptSGEntrySimple32, 8);
144
145	/**
146	* A chain SG element.
147	*/
148	#pragma pack(1)
149	typedef struct MptSGEntryChain
150	{
151	/** Size of the segment. */
152	unsigned u16Length: 16;
153	/** Offset in 32bit words of the next chain element in the segment
154	* identified by this element. */
155	unsigned u8NextChainOffset: 8;
156	/** Reserved. */
157	unsigned fReserved0: 1;
158	/** Flag whether the address is 32bit or 64bits wide. */
159	unsigned f64BitAddress: 1;
160	/** Reserved. */
161	unsigned fReserved1: 1;
162	/** Flag whether this is a local address or a system address. */
163	unsigned fLocalAddress: 1;
164	/** Element type. */
165	unsigned u2ElementType: 2;
166	/** Flag whether this is the last element of the buffer. */
167	unsigned u2Reserved2: 2;
168	/** Lower 32bits of the address of the data buffer. */
169	unsigned u32SegmentAddressLow: 32;
170	/** Upper 32bits of the address of the data buffer. */
171	unsigned u32SegmentAddressHigh: 32;
172	} MptSGEntryChain, *PMptSGEntryChain;
173	#pragma pack()
174	AssertCompileSize(MptSGEntryChain, 12);
175
176	typedef union MptSGEntryUnion
177	{
178	MptSGEntrySimple64 Simple64;
179	MptSGEntrySimple32 Simple32;
180	MptSGEntryChain Chain;
181	} MptSGEntryUnion, *PMptSGEntryUnion;
182
183	/**
184	* MPT Fusion message header - Common for all message frames.
185	* This is filled in by the guest.
186	*/
187	#pragma pack(1)
188	typedef struct MptMessageHdr
189	{
190	/** Function dependent data. */
191	uint16_t u16FunctionDependent;
192	/** Chain offset. */
193	uint8_t u8ChainOffset;
194	/** The function code. */
195	uint8_t u8Function;
196	/** Function dependent data. */
197	uint8_t au8FunctionDependent[3];
198	/** Message flags. */
199	uint8_t u8MessageFlags;
200	/** Message context - Unique ID from the guest unmodified by the device. */
201	uint32_t u32MessageContext;
202	} MptMessageHdr, *PMptMessageHdr;
203	#pragma pack()
204	AssertCompileSize(MptMessageHdr, 12);
205
206	/** Defined function codes found in the message header. */
207	#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST (0x00)
208	#define MPT_MESSAGE_HDR_FUNCTION_SCSI_TASK_MGMT (0x01)
209	#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT (0x02)
210	#define MPT_MESSAGE_HDR_FUNCTION_IOC_FACTS (0x03)
211	#define MPT_MESSAGE_HDR_FUNCTION_CONFIG (0x04)
212	#define MPT_MESSAGE_HDR_FUNCTION_PORT_FACTS (0x05)
213	#define MPT_MESSAGE_HDR_FUNCTION_PORT_ENABLE (0x06)
214	#define MPT_MESSAGE_HDR_FUNCTION_EVENT_NOTIFICATION (0x07)
215	#define MPT_MESSAGE_HDR_FUNCTION_EVENT_ACK (0x08)
216	#define MPT_MESSAGE_HDR_FUNCTION_FW_DOWNLOAD (0x09)
217	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
218	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_ASSIST (0x0B)
219	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_STATUS_SEND (0x0C)
220	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_MODE_ABORT (0x0D)
221
222	#ifdef DEBUG
223	/**
224	* Function names
225	*/
226	static const char * const g_apszMPTFunctionNames[] =
227	{
228	"SCSI I/O Request",
229	"SCSI Task Management",
230	"IOC Init",
231	"IOC Facts",
232	"Config",
233	"Port Facts",
234	"Port Enable",
235	"Event Notification",
236	"Event Ack",
237	"Firmware Download"
238	};
239	#endif
240
241	/**
242	* Default reply message.
243	* Send from the device to the guest upon completion of a request.
244	*/
245	#pragma pack(1)
246	typedef struct MptDefaultReplyMessage
247	{
248	/** Function dependent data. */
249	uint16_t u16FunctionDependent;
250	/** Length of the message in 32bit DWords. */
251	uint8_t u8MessageLength;
252	/** Function which completed. */
253	uint8_t u8Function;
254	/** Function dependent. */
255	uint8_t au8FunctionDependent[3];
256	/** Message flags. */
257	uint8_t u8MessageFlags;
258	/** Message context given in the request. */
259	uint32_t u32MessageContext;
260	/** Function dependent status code. */
261	uint16_t u16FunctionDependentStatus;
262	/** Status of the IOC. */
263	uint16_t u16IOCStatus;
264	/** Additional log info. */
265	uint32_t u32IOCLogInfo;
266	} MptDefaultReplyMessage, *PMptDefaultReplyMessage;
267	#pragma pack()
268	AssertCompileSize(MptDefaultReplyMessage, 20);
269
270	/**
271	* IO controller init request.
272	*/
273	#pragma pack(1)
274	typedef struct MptIOCInitRequest
275	{
276	/** Which system send this init request. */
277	uint8_t u8WhoInit;
278	/** Reserved */
279	uint8_t u8Reserved;
280	/** Chain offset in the SG list. */
281	uint8_t u8ChainOffset;
282	/** Function to execute. */
283	uint8_t u8Function;
284	/** Flags */
285	uint8_t u8Flags;
286	/** Maximum number of devices the driver can handle. */
287	uint8_t u8MaxDevices;
288	/** Maximum number of buses the driver can handle. */
289	uint8_t u8MaxBuses;
290	/** Message flags. */
291	uint8_t u8MessageFlags;
292	/** Message context ID. */
293	uint32_t u32MessageContext;
294	/** Reply frame size. */
295	uint16_t u16ReplyFrameSize;
296	/** Reserved */
297	uint16_t u16Reserved;
298	/** Upper 32bit part of the 64bit address the message frames are in.
299	* That means all frames must be in the same 4GB segment. */
300	uint32_t u32HostMfaHighAddr;
301	/** Upper 32bit of the sense buffer. */
302	uint32_t u32SenseBufferHighAddr;
303	} MptIOCInitRequest, *PMptIOCInitRequest;
304	#pragma pack()
305	AssertCompileSize(MptIOCInitRequest, 24);
306
307	/**
308	* IO controller init reply.
309	*/
310	#pragma pack(1)
311	typedef struct MptIOCInitReply
312	{
313	/** Which subsystem send this init request. */
314	uint8_t u8WhoInit;
315	/** Reserved */
316	uint8_t u8Reserved;
317	/** Message length */
318	uint8_t u8MessageLength;
319	/** Function. */
320	uint8_t u8Function;
321	/** Flags */
322	uint8_t u8Flags;
323	/** Maximum number of devices the driver can handle. */
324	uint8_t u8MaxDevices;
325	/** Maximum number of busses the driver can handle. */
326	uint8_t u8MaxBuses;
327	/** Message flags. */
328	uint8_t u8MessageFlags;
329	/** Message context ID */
330	uint32_t u32MessageContext;
331	/** Reserved */
332	uint16_t u16Reserved;
333	/** IO controller status. */
334	uint16_t u16IOCStatus;
335	/** IO controller log information. */
336	uint32_t u32IOCLogInfo;
337	} MptIOCInitReply, *PMptIOCInitReply;
338	#pragma pack()
339	AssertCompileSize(MptIOCInitReply, 20);
340
341	/**
342	* IO controller facts request.
343	*/
344	#pragma pack(1)
345	typedef struct MptIOCFactsRequest
346	{
347	/** Reserved. */
348	uint16_t u16Reserved;
349	/** Chain offset in SG list. */
350	uint8_t u8ChainOffset;
351	/** Function number. */
352	uint8_t u8Function;
353	/** Reserved */
354	uint8_t u8Reserved[3];
355	/** Message flags. */
356	uint8_t u8MessageFlags;
357	/** Message context ID. */
358	uint32_t u32MessageContext;
359	} MptIOCFactsRequest, *PMptIOCFactsRequest;
360	#pragma pack()
361	AssertCompileSize(MptIOCFactsRequest, 12);
362
363	/**
364	* IO controller facts reply.
365	*/
366	#pragma pack(1)
367	typedef struct MptIOCFactsReply
368	{
369	/** Message version. */
370	uint16_t u16MessageVersion;
371	/** Message length. */
372	uint8_t u8MessageLength;
373	/** Function number. */
374	uint8_t u8Function;
375	/** Reserved */
376	uint16_t u16Reserved1;
377	/** IO controller number */
378	uint8_t u8IOCNumber;
379	/** Message flags. */
380	uint8_t u8MessageFlags;
381	/** Message context ID. */
382	uint32_t u32MessageContext;
383	/** IO controller exceptions */
384	uint16_t u16IOCExceptions;
385	/** IO controller status. */
386	uint16_t u16IOCStatus;
387	/** IO controller log information. */
388	uint32_t u32IOCLogInfo;
389	/** Maximum chain depth. */
390	uint8_t u8MaxChainDepth;
391	/** The current value of the WhoInit field. */
392	uint8_t u8WhoInit;
393	/** Block size. */
394	uint8_t u8BlockSize;
395	/** Flags. */
396	uint8_t u8Flags;
397	/** Depth of the reply queue. */
398	uint16_t u16ReplyQueueDepth;
399	/** Size of a request frame. */
400	uint16_t u16RequestFrameSize;
401	/** Reserved */
402	uint16_t u16Reserved2;
403	/** Product ID. */
404	uint16_t u16ProductID;
405	/** Current value of the high 32bit MFA address. */
406	uint32_t u32CurrentHostMFAHighAddr;
407	/** Global credits - Number of entries allocated to queues */
408	uint16_t u16GlobalCredits;
409	/** Number of ports on the IO controller */
410	uint8_t u8NumberOfPorts;
411	/** Event state. */
412	uint8_t u8EventState;
413	/** Current value of the high 32bit sense buffer address. */
414	uint32_t u32CurrentSenseBufferHighAddr;
415	/** Current reply frame size. */
416	uint16_t u16CurReplyFrameSize;
417	/** Maximum number of devices. */
418	uint8_t u8MaxDevices;
419	/** Maximum number of buses. */
420	uint8_t u8MaxBuses;
421	/** Size of the firmware image. */
422	uint32_t u32FwImageSize;
423	/** Reserved. */
424	uint32_t u32Reserved;
425	/** Firmware version */
426	uint32_t u32FWVersion;
427	} MptIOCFactsReply, *PMptIOCFactsReply;
428	#pragma pack()
429	AssertCompileSize(MptIOCFactsReply, 60);
430
431	/**
432	* Port facts request
433	*/
434	#pragma pack(1)
435	typedef struct MptPortFactsRequest
436	{
437	/** Reserved */
438	uint16_t u16Reserved1;
439	/** Message length. */
440	uint8_t u8MessageLength;
441	/** Function number. */
442	uint8_t u8Function;
443	/** Reserved */
444	uint16_t u16Reserved2;
445	/** Port number to get facts for. */
446	uint8_t u8PortNumber;
447	/** Message flags. */
448	uint8_t u8MessageFlags;
449	/** Message context ID. */
450	uint32_t u32MessageContext;
451	} MptPortFactsRequest, *PMptPortFactsRequest;
452	#pragma pack()
453	AssertCompileSize(MptPortFactsRequest, 12);
454
455	/**
456	* Port facts reply.
457	*/
458	#pragma pack(1)
459	typedef struct MptPortFactsReply
460	{
461	/** Reserved. */
462	uint16_t u16Reserved1;
463	/** Message length. */
464	uint8_t u8MessageLength;
465	/** Function number. */
466	uint8_t u8Function;
467	/** Reserved */
468	uint16_t u16Reserved2;
469	/** Port number the facts are for. */
470	uint8_t u8PortNumber;
471	/** Message flags. */
472	uint8_t u8MessageFlags;
473	/** Message context ID. */
474	uint32_t u32MessageContext;
475	/** Reserved. */
476	uint16_t u16Reserved3;
477	/** IO controller status. */
478	uint16_t u16IOCStatus;
479	/** IO controller log information. */
480	uint32_t u32IOCLogInfo;
481	/** Reserved */
482	uint8_t u8Reserved;
483	/** Port type */
484	uint8_t u8PortType;
485	/** Maximum number of devices on this port. */
486	uint16_t u16MaxDevices;
487	/** SCSI ID of this port on the attached bus. */
488	uint16_t u16PortSCSIID;
489	/** Protocol flags. */
490	uint16_t u16ProtocolFlags;
491	/** Maxmimum number of target command buffers which can be posted to this port at a time. */
492	uint16_t u16MaxPostedCmdBuffers;
493	/** Maximum number of target IDs that remain persistent between power/reset cycles. */
494	uint16_t u16MaxPersistentIDs;
495	/** Maximum number of LAN buckets. */
496	uint16_t u16MaxLANBuckets;
497	/** Reserved. */
498	uint16_t u16Reserved4;
499	/** Reserved. */
500	uint32_t u32Reserved;
501	} MptPortFactsReply, *PMptPortFactsReply;
502	#pragma pack()
503	AssertCompileSize(MptPortFactsReply, 40);
504
505	/**
506	* Port Enable request.
507	*/
508	#pragma pack(1)
509	typedef struct MptPortEnableRequest
510	{
511	/** Reserved. */
512	uint16_t u16Reserved1;
513	/** Message length. */
514	uint8_t u8MessageLength;
515	/** Function number. */
516	uint8_t u8Function;
517	/** Reserved. */
518	uint16_t u16Reserved2;
519	/** Port number to enable. */
520	uint8_t u8PortNumber;
521	/** Message flags. */
522	uint8_t u8MessageFlags;
523	/** Message context ID. */
524	uint32_t u32MessageContext;
525	} MptPortEnableRequest, *PMptPortEnableRequest;
526	#pragma pack()
527	AssertCompileSize(MptPortEnableRequest, 12);
528
529	/**
530	* Port enable reply.
531	*/
532	#pragma pack(1)
533	typedef struct MptPortEnableReply
534	{
535	/** Reserved. */
536	uint16_t u16Reserved1;
537	/** Message length. */
538	uint8_t u8MessageLength;
539	/** Function number. */
540	uint8_t u8Function;
541	/** Reserved */
542	uint16_t u16Reserved2;
543	/** Port number which was enabled. */
544	uint8_t u8PortNumber;
545	/** Message flags. */
546	uint8_t u8MessageFlags;
547	/** Message context ID. */
548	uint32_t u32MessageContext;
549	/** Reserved. */
550	uint16_t u16Reserved3;
551	/** IO controller status */
552	uint16_t u16IOCStatus;
553	/** IO controller log information. */
554	uint32_t u32IOCLogInfo;
555	} MptPortEnableReply, *PMptPortEnableReply;
556	#pragma pack()
557	AssertCompileSize(MptPortEnableReply, 20);
558
559	/**
560	* Event notification request.
561	*/
562	#pragma pack(1)
563	typedef struct MptEventNotificationRequest
564	{
565	/** Switch - Turns event notification on and off. */
566	uint8_t u8Switch;
567	/** Reserved. */
568	uint8_t u8Reserved1;
569	/** Chain offset. */
570	uint8_t u8ChainOffset;
571	/** Function number. */
572	uint8_t u8Function;
573	/** Reserved. */
574	uint8_t u8reserved2[3];
575	/** Message flags. */
576	uint8_t u8MessageFlags;
577	/** Message context ID. */
578	uint32_t u32MessageContext;
579	} MptEventNotificationRequest, *PMptEventNotificationRequest;
580	#pragma pack()
581	AssertCompileSize(MptEventNotificationRequest, 12);
582
583	/**
584	* Event notification reply.
585	*/
586	#pragma pack(1)
587	typedef struct MptEventNotificationReply
588	{
589	/** Event data length. */
590	uint16_t u16EventDataLength;
591	/** Message length. */
592	uint8_t u8MessageLength;
593	/** Function number. */
594	uint8_t u8Function;
595	/** Reserved. */
596	uint16_t u16Reserved1;
597	/** Ack required. */
598	uint8_t u8AckRequired;
599	/** Message flags. */
600	uint8_t u8MessageFlags;
601	/** Message context ID. */
602	uint32_t u32MessageContext;
603	/** Reserved. */
604	uint16_t u16Reserved2;
605	/** IO controller status. */
606	uint16_t u16IOCStatus;
607	/** IO controller log information. */
608	uint32_t u32IOCLogInfo;
609	/** Notification event. */
610	uint32_t u32Event;
611	/** Event context. */
612	uint32_t u32EventContext;
613	/** Event data. */
614	uint32_t u32EventData;
615	} MptEventNotificationReply, *PMptEventNotificationReply;
616	#pragma pack()
617	AssertCompileSize(MptEventNotificationReply, 32);
618
619	#define MPT_EVENT_EVENT_CHANGE (0x0000000a)
620
621	/**
622	* SCSI IO Request
623	*/
624	#pragma pack(1)
625	typedef struct MptSCSIIORequest
626	{
627	/** Target ID */
628	uint8_t u8TargetID;
629	/** Bus number */
630	uint8_t u8Bus;
631	/** Chain offset */
632	uint8_t u8ChainOffset;
633	/** Function number. */
634	uint8_t u8Function;
635	/** CDB length. */
636	uint8_t u8CDBLength;
637	/** Sense buffer length. */
638	uint8_t u8SenseBufferLength;
639	/** Rserved */
640	uint8_t u8Reserved;
641	/** Message flags. */
642	uint8_t u8MessageFlags;
643	/** Message context ID. */
644	uint32_t u32MessageContext;
645	/** LUN */
646	uint8_t au8LUN[8];
647	/** Control values. */
648	uint32_t u32Control;
649	/** The CDB. */
650	uint8_t au8CDB[16];
651	/** Data length. */
652	uint32_t u32DataLength;
653	/** Sense buffer low 32bit address. */
654	uint32_t u32SenseBufferLowAddress;
655	} MptSCSIIORequest, *PMptSCSIIORequest;
656	#pragma pack()
657	AssertCompileSize(MptSCSIIORequest, 48);
658
659	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_GET(x) (((x) & 0x3000000) >> 24)
660	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x0)
661	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x1)
662	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x2)
663
664	/**
665	* SCSI IO error reply.
666	*/
667	#pragma pack(1)
668	typedef struct MptSCSIIOErrorReply
669	{
670	/** Target ID */
671	uint8_t u8TargetID;
672	/** Bus number */
673	uint8_t u8Bus;
674	/** Message length. */
675	uint8_t u8MessageLength;
676	/** Function number. */
677	uint8_t u8Function;
678	/** CDB length */
679	uint8_t u8CDBLength;
680	/** Sense buffer length */
681	uint8_t u8SenseBufferLength;
682	/** Reserved */
683	uint8_t u8Reserved;
684	/** Message flags */
685	uint8_t u8MessageFlags;
686	/** Message context ID */
687	uint32_t u32MessageContext;
688	/** SCSI status. */
689	uint8_t u8SCSIStatus;
690	/** SCSI state */
691	uint8_t u8SCSIState;
692	/** IO controller status */
693	uint16_t u16IOCStatus;
694	/** IO controller log information */
695	uint32_t u32IOCLogInfo;
696	/** Transfer count */
697	uint32_t u32TransferCount;
698	/** Sense count */
699	uint32_t u32SenseCount;
700	/** Response information */
701	uint32_t u32ResponseInfo;
702	} MptSCSIIOErrorReply, *PMptSCSIIOErrorReply;
703	#pragma pack()
704	AssertCompileSize(MptSCSIIOErrorReply, 32);
705
706	#define MPT_SCSI_IO_ERROR_SCSI_STATE_AUTOSENSE_VALID (0x01)
707	#define MPT_SCSI_IO_ERROR_SCSI_STATE_TERMINATED (0x08)
708
709	/**
710	* IOC status codes sepcific to the SCSI I/O error reply.
711	*/
712	#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_BUS (0x0041)
713	#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_TARGETID (0x0042)
714	#define MPT_SCSI_IO_ERROR_IOCSTATUS_DEVICE_NOT_THERE (0x0043)
715
716	/**
717	* SCSI task management request.
718	*/
719	#pragma pack(1)
720	typedef struct MptSCSITaskManagementRequest
721	{
722	/** Target ID */
723	uint8_t u8TargetID;
724	/** Bus number */
725	uint8_t u8Bus;
726	/** Chain offset */
727	uint8_t u8ChainOffset;
728	/** Function number */
729	uint8_t u8Function;
730	/** Reserved */
731	uint8_t u8Reserved1;
732	/** Task type */
733	uint8_t u8TaskType;
734	/** Reserved */
735	uint8_t u8Reserved2;
736	/** Message flags */
737	uint8_t u8MessageFlags;
738	/** Message context ID */
739	uint32_t u32MessageContext;
740	/** LUN */
741	uint8_t au8LUN[8];
742	/** Reserved */
743	uint8_t auReserved[28];
744	/** Task message context ID. */
745	uint32_t u32TaskMessageContext;
746	} MptSCSITaskManagementRequest, *PMptSCSITaskManagementRequest;
747	#pragma pack()
748	AssertCompileSize(MptSCSITaskManagementRequest, 52);
749
750	/**
751	* SCSI task management reply.
752	*/
753	#pragma pack(1)
754	typedef struct MptSCSITaskManagementReply
755	{
756	/** Target ID */
757	uint8_t u8TargetID;
758	/** Bus number */
759	uint8_t u8Bus;
760	/** Message length */
761	uint8_t u8MessageLength;
762	/** Function number */
763	uint8_t u8Function;
764	/** Reserved */
765	uint8_t u8Reserved1;
766	/** Task type */
767	uint8_t u8TaskType;
768	/** Reserved */
769	uint8_t u8Reserved2;
770	/** Message flags */
771	uint8_t u8MessageFlags;
772	/** Message context ID */
773	uint32_t u32MessageContext;
774	/** Reserved */
775	uint16_t u16Reserved;
776	/** IO controller status */
777	uint16_t u16IOCStatus;
778	/** IO controller log information */
779	uint32_t u32IOCLogInfo;
780	/** Termination count */
781	uint32_t u32TerminationCount;
782	} MptSCSITaskManagementReply, *PMptSCSITaskManagementReply;
783	#pragma pack()
784	AssertCompileSize(MptSCSITaskManagementReply, 24);
785
786	/**
787	* Configuration request
788	*/
789	#pragma pack(1)
790	typedef struct MptConfigurationRequest
791	{
792	/** Action code. */
793	uint8_t u8Action;
794	/** Reserved. */
795	uint8_t u8Reserved1;
796	/** Chain offset. */
797	uint8_t u8ChainOffset;
798	/** Function number. */
799	uint8_t u8Function;
800	/** Extended page length. */
801	uint16_t u16ExtPageLength;
802	/** Extended page type */
803	uint8_t u8ExtPageType;
804	/** Message flags. */
805	uint8_t u8MessageFlags;
806	/** Message context ID. */
807	uint32_t u32MessageContext;
808	/** Reserved. */
809	uint8_t u8Reserved2[8];
810	/** Version number of the page. */
811	uint8_t u8PageVersion;
812	/** Length of the page in 32bit Dwords. */
813	uint8_t u8PageLength;
814	/** Page number to access. */
815	uint8_t u8PageNumber;
816	/** Type of the page beeing accessed. */
817	uint8_t u8PageType;
818	/** Page type dependent address. */
819	union
820	{
821	/** 32bit view. */
822	uint32_t u32PageAddress;
823	struct
824	{
825	/** Port number to get the configuration page for. */
826	uint8_t u8PortNumber;
827	/** Reserved. */
828	uint8_t u8Reserved[3];
829	} MPIPortNumber;
830	struct
831	{
832	/** Target ID to get the configuration page for. */
833	uint8_t u8TargetID;
834	/** Bus number to get the configuration page for. */
835	uint8_t u8Bus;
836	/** Reserved. */
837	uint8_t u8Reserved[2];
838	} BusAndTargetId;
839	} u;
840	MptSGEntrySimple64 SimpleSGElement;
841	} MptConfigurationRequest, *PMptConfigurationRequest;
842	#pragma pack()
843	AssertCompileSize(MptConfigurationRequest, 40);
844
845	/** Possible action codes. */
846	#define MPT_CONFIGURATION_REQUEST_ACTION_HEADER (0x00)
847	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_CURRENT (0x01)
848	#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_CURRENT (0x02)
849	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_DEFAULT (0x03)
850	#define MPT_CONFIGURATION_REQUEST_ACTION_DEFAULT (0x04)
851	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_NVRAM (0x05)
852	#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_NVRAM (0x06)
853
854	/** Page type codes. */
855	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IO_UNIT (0x00)
856	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IOC (0x01)
857	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_BIOS (0x02)
858	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_SCSI_PORT (0x03)
859	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_EXTENDED (0x0F)
860
861	/**
862	* Configuration reply.
863	*/
864	#pragma pack(1)
865	typedef struct MptConfigurationReply
866	{
867	/** Action code. */
868	uint8_t u8Action;
869	/** Reserved. */
870	uint8_t u8Reserved;
871	/** Message length. */
872	uint8_t u8MessageLength;
873	/** Function number. */
874	uint8_t u8Function;
875	/** Reserved. */
876	uint8_t u8Reserved2[3];
877	/** Message flags. */
878	uint8_t u8MessageFlags;
879	/** Message context ID. */
880	uint32_t u32MessageContext;
881	/** Reserved. */
882	uint16_t u16Reserved;
883	/** I/O controller status. */
884	uint16_t u16IOCStatus;
885	/** I/O controller log information. */
886	uint32_t u32IOCLogInfo;
887	/** Version number of the page. */
888	uint8_t u8PageVersion;
889	/** Length of the page in 32bit Dwords. */
890	uint8_t u8PageLength;
891	/** Page number to access. */
892	uint8_t u8PageNumber;
893	/** Type of the page beeing accessed. */
894	uint8_t u8PageType;
895	} MptConfigurationReply, *PMptConfigurationReply;
896	#pragma pack()
897	AssertCompileSize(MptConfigurationReply, 24);
898
899	/** Additional I/O controller status codes for the configuration reply. */
900	#define MPT_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
901	#define MPT_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
902	#define MPT_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
903	#define MPT_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
904	#define MPT_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
905	#define MPT_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
906
907	/**
908	* Union of all possible request messages.
909	*/
910	typedef union MptRequestUnion
911	{
912	MptMessageHdr Header;
913	MptIOCInitRequest IOCInit;
914	MptIOCFactsRequest IOCFacts;
915	MptPortFactsRequest PortFacts;
916	MptPortEnableRequest PortEnable;
917	MptEventNotificationRequest EventNotification;
918	MptSCSIIORequest SCSIIO;
919	MptSCSITaskManagementRequest SCSITaskManagement;
920	MptConfigurationRequest Configuration;
921	} MptRequestUnion, *PMptRequestUnion;
922
923	/**
924	* Union of all possible reply messages.
925	*/
926	typedef union MptReplyUnion
927	{
928	/** 16bit view. */
929	uint16_t au16Reply[30];
930	MptDefaultReplyMessage Header;
931	MptIOCInitReply IOCInit;
932	MptIOCFactsReply IOCFacts;
933	MptPortFactsReply PortFacts;
934	MptPortEnableReply PortEnable;
935	MptEventNotificationReply EventNotification;
936	MptSCSIIOErrorReply SCSIIOError;
937	MptSCSITaskManagementReply SCSITaskManagement;
938	MptConfigurationReply Configuration;
939	} MptReplyUnion, *PMptReplyUnion;
940
941
942	/**
943	* Configuration Page attributes.
944	*/
945	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY (0x00)
946	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE (0x10)
947	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT (0x20)
948	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY (0x30)
949
950	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_GET(u8PageType) ((u8PageType) & 0xf0)
951
952	/**
953	* Configuration Page types.
954	*/
955	#define MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT (0x00)
956	#define MPT_CONFIGURATION_PAGE_TYPE_IOC (0x01)
957	#define MPT_CONFIGURATION_PAGE_TYPE_BIOS (0x02)
958	#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT (0x03)
959	#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE (0x04)
960	#define MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING (0x09)
961
962	#define MPT_CONFIGURATION_PAGE_TYPE_GET(u8PageType) ((u8PageType) & 0x0f)
963
964	/**
965	* Configuration Page header - Common to all pages.
966	*/
967	#pragma pack(1)
968	typedef struct MptConfigurationPageHeader
969	{
970	/** Version of the page. */
971	uint8_t u8PageVersion;
972	/** The length of the page in 32bit D-Words. */
973	uint8_t u8PageLength;
974	/** Number of the page. */
975	uint8_t u8PageNumber;
976	/** Type of the page. */
977	uint8_t u8PageType;
978	} MptConfigurationPageHeader, *PMptConfigurationPageHeader;
979	#pragma pack()
980	AssertCompileSize(MptConfigurationPageHeader, 4);
981
982	/**
983	* Extended configuration page header - Common to all extended pages.
984	*/
985	#pragma pack(1)
986	typedef struct MptExtendedConfigurationPageHeader
987	{
988	/** Version of the page. */
989	uint8_t u8PageVersion;
990	/** Reserved. */
991	uint8_t u8Reserved1;
992	/** Number of the page. */
993	uint8_t u8PageNumber;
994	/** Type of the page. */
995	uint8_t u8PageType;
996	/** Extended page length. */
997	uint16_t u16ExtPageLength;
998	/** Extended page type. */
999	uint8_t u8ExtPageType;
1000	/** Reserved */
1001	uint8_t u8Reserved2;
1002	} MptExtendedConfigurationPageHeader, *PMptExtendedConfigurationPageHeader;
1003	#pragma pack()
1004	AssertCompileSize(MptExtendedConfigurationPageHeader, 8);
1005
1006	/**
1007	* Manufacturing page 0. - Readonly.
1008	*/
1009	#pragma pack(1)
1010	typedef struct MptConfigurationPageManufacturing0
1011	{
1012	/** Union. */
1013	union
1014	{
1015	/** Byte view. */
1016	uint8_t abPageData[76];
1017	/** Field view. */
1018	struct
1019	{
1020	/** The omnipresent header. */
1021	MptConfigurationPageHeader Header;
1022	/** Name of the chip. */
1023	uint8_t abChipName[16];
1024	/** Chip revision. */
1025	uint8_t abChipRevision[8];
1026	/** Board name. */
1027	uint8_t abBoardName[16];
1028	/** Board assembly. */
1029	uint8_t abBoardAssembly[16];
1030	/** Board tracer number. */
1031	uint8_t abBoardTracerNumber[16];
1032	} fields;
1033	} u;
1034	} MptConfigurationPageManufacturing0, *PMptConfigurationPageManufacturing0;
1035	#pragma pack()
1036	AssertCompileSize(MptConfigurationPageManufacturing0, 76);
1037
1038	/**
1039	* Manufacturing page 1. - Readonly Persistent.
1040	*/
1041	#pragma pack(1)
1042	typedef struct MptConfigurationPageManufacturing1
1043	{
1044	/** The omnipresent header. */
1045	MptConfigurationPageHeader Header;
1046	/** VPD info - don't know what belongs here so all zero. */
1047	uint8_t abVPDInfo[256];
1048	} MptConfigurationPageManufacturing1, *PMptConfigurationPageManufacturing1;
1049	#pragma pack()
1050	AssertCompileSize(MptConfigurationPageManufacturing1, 260);
1051
1052	/**
1053	* Manufacturing page 2. - Readonly.
1054	*/
1055	#pragma pack(1)
1056	typedef struct MptConfigurationPageManufacturing2
1057	{
1058	/** Union. */
1059	union
1060	{
1061	/** Byte view. */
1062	uint8_t abPageData[8];
1063	/** Field view. */
1064	struct
1065	{
1066	/** The omnipresent header. */
1067	MptConfigurationPageHeader Header;
1068	/** PCI Device ID. */
1069	uint16_t u16PCIDeviceID;
1070	/** PCI Revision ID. */
1071	uint8_t u8PCIRevisionID;
1072	/** Reserved. */
1073	uint8_t u8Reserved;
1074	/** Hardware specific settings... */
1075	} fields;
1076	} u;
1077	} MptConfigurationPageManufacturing2, *PMptConfigurationPageManufacturing2;
1078	#pragma pack()
1079	AssertCompileSize(MptConfigurationPageManufacturing2, 8);
1080
1081	/**
1082	* Manufacturing page 3. - Readonly.
1083	*/
1084	#pragma pack(1)
1085	typedef struct MptConfigurationPageManufacturing3
1086	{
1087	/** Union. */
1088	union
1089	{
1090	/** Byte view. */
1091	uint8_t abPageData[8];
1092	/** Field view. */
1093	struct
1094	{
1095	/** The omnipresent header. */
1096	MptConfigurationPageHeader Header;
1097	/** PCI Device ID. */
1098	uint16_t u16PCIDeviceID;
1099	/** PCI Revision ID. */
1100	uint8_t u8PCIRevisionID;
1101	/** Reserved. */
1102	uint8_t u8Reserved;
1103	/** Chip specific settings... */
1104	} fields;
1105	} u;
1106	} MptConfigurationPageManufacturing3, *PMptConfigurationPageManufacturing3;
1107	#pragma pack()
1108	AssertCompileSize(MptConfigurationPageManufacturing3, 8);
1109
1110	/**
1111	* Manufacturing page 4. - Readonly.
1112	*/
1113	#pragma pack(1)
1114	typedef struct MptConfigurationPageManufacturing4
1115	{
1116	/** Union. */
1117	union
1118	{
1119	/** Byte view. */
1120	uint8_t abPageData[84];
1121	/** Field view. */
1122	struct
1123	{
1124	/** The omnipresent header. */
1125	MptConfigurationPageHeader Header;
1126	/** Reserved. */
1127	uint32_t u32Reserved;
1128	/** InfoOffset0. */
1129	uint8_t u8InfoOffset0;
1130	/** Info size. */
1131	uint8_t u8InfoSize0;
1132	/** InfoOffset1. */
1133	uint8_t u8InfoOffset1;
1134	/** Info size. */
1135	uint8_t u8InfoSize1;
1136	/** Size of the inquiry data. */
1137	uint8_t u8InquirySize;
1138	/** Reserved. */
1139	uint8_t abReserved[3];
1140	/** Inquiry data. */
1141	uint8_t abInquiryData[56];
1142	/** IS volume settings. */
1143	uint32_t u32ISVolumeSettings;
1144	/** IME volume settings. */
1145	uint32_t u32IMEVolumeSettings;
1146	/** IM volume settings. */
1147	uint32_t u32IMVolumeSettings;
1148	} fields;
1149	} u;
1150	} MptConfigurationPageManufacturing4, *PMptConfigurationPageManufacturing4;
1151	#pragma pack()
1152	AssertCompileSize(MptConfigurationPageManufacturing4, 84);
1153
1154	/**
1155	* Manufacturing page 5 - Readonly.
1156	*/
1157	#pragma pack(1)
1158	typedef struct MptConfigurationPageManufacturing5
1159	{
1160	/** Union. */
1161	union
1162	{
1163	/** Byte view. */
1164	uint8_t abPageData[88];
1165	/** Field view. */
1166	struct
1167	{
1168	/** The omnipresent header. */
1169	MptConfigurationPageHeader Header;
1170	/** Base WWID. */
1171	uint64_t u64BaseWWID;
1172	/** Flags */
1173	uint8_t u8Flags;
1174	/** Number of ForceWWID fields in this page. */
1175	uint8_t u8NumForceWWID;
1176	/** Reserved */
1177	uint16_t u16Reserved;
1178	/** Reserved */
1179	uint32_t au32Reserved[2];
1180	/** ForceWWID entries Maximum of 8 because the SAS controller doesn't has more */
1181	uint64_t au64ForceWWID[8];
1182	} fields;
1183	} u;
1184	} MptConfigurationPageManufacturing5, *PMptConfigurationPageManufacturing5;
1185	#pragma pack()
1186	AssertCompileSize(MptConfigurationPageManufacturing5, 24+64);
1187
1188	/**
1189	* Manufacturing page 6 - Readonly.
1190	*/
1191	#pragma pack(1)
1192	typedef struct MptConfigurationPageManufacturing6
1193	{
1194	/** Union. */
1195	union
1196	{
1197	/** Byte view. */
1198	uint8_t abPageData[4];
1199	/** Field view. */
1200	struct
1201	{
1202	/** The omnipresent header. */
1203	MptConfigurationPageHeader Header;
1204	/** Product specific data - 0 for now */
1205	} fields;
1206	} u;
1207	} MptConfigurationPageManufacturing6, *PMptConfigurationPageManufacturing6;
1208	#pragma pack()
1209	AssertCompileSize(MptConfigurationPageManufacturing6, 4);
1210
1211	/**
1212	* Manufacturing page 7 - Readonly.
1213	*/
1214	#pragma pack(1)
1215	typedef struct MptConfigurationPageManufacturing7
1216	{
1217	/** Union. */
1218	union
1219	{
1220	/** Byte view. */
1221	uint8_t abPageData[228];
1222	/** Field view. */
1223	struct
1224	{
1225	/** The omnipresent header. */
1226	MptConfigurationPageHeader Header;
1227	/** Reserved */
1228	uint32_t au32Reserved[2];
1229	/** Flags */
1230	uint32_t u32Flags;
1231	/** Enclosure name */
1232	uint8_t szEnclosureName[16];
1233	/** Nummber of PHYs */
1234	uint8_t u8NumPhys;
1235	/** Reserved */
1236	uint8_t au8Reserved[3];
1237	/** PHY list for the SAS controller */
1238	struct
1239	{
1240	/** Pinout */
1241	uint32_t u32Pinout;
1242	/** Connector name */
1243	uint8_t szConnector[16];
1244	/** Location */
1245	uint8_t u8Location;
1246	/** reserved */
1247	uint8_t u8Reserved;
1248	/** Slot */
1249	uint16_t u16Slot;
1250	} aPHYs[LSILOGICSCSI_PCI_SAS_PORTS_MAX];
1251	} fields;
1252	} u;
1253	} MptConfigurationPageManufacturing7, *PMptConfigurationPageManufacturing7;
1254	#pragma pack()
1255	AssertCompileSize(MptConfigurationPageManufacturing7, 36+(LSILOGICSCSI_PCI_SAS_PORTS_MAX * 24));
1256
1257	/** Flags for the flags field */
1258	#define LSILOGICSCSI_MANUFACTURING7_FLAGS_USE_PROVIDED_INFORMATION RT_BIT(0)
1259
1260	/** Flags for the pinout field */
1261	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_UNKNOWN RT_BIT(0)
1262	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8482 RT_BIT(1)
1263	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE1 RT_BIT(8)
1264	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE2 RT_BIT(9)
1265	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE3 RT_BIT(10)
1266	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE4 RT_BIT(11)
1267	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE1 RT_BIT(16)
1268	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE2 RT_BIT(17)
1269	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE3 RT_BIT(18)
1270	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE4 RT_BIT(19)
1271
1272	/** Flags for the location field */
1273	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_UNKNOWN 0x01
1274	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_INTERNAL 0x02
1275	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_EXTERNAL 0x04
1276	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_SWITCHABLE 0x08
1277	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_AUTO 0x10
1278	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_PRESENT 0x20
1279	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_CONNECTED 0x80
1280
1281	/**
1282	* Manufacturing page 8 - Readonly.
1283	*/
1284	#pragma pack(1)
1285	typedef struct MptConfigurationPageManufacturing8
1286	{
1287	/** Union. */
1288	union
1289	{
1290	/** Byte view. */
1291	uint8_t abPageData[4];
1292	/** Field view. */
1293	struct
1294	{
1295	/** The omnipresent header. */
1296	MptConfigurationPageHeader Header;
1297	/** Product specific information */
1298	} fields;
1299	} u;
1300	} MptConfigurationPageManufacturing8, *PMptConfigurationPageManufacturing8;
1301	#pragma pack()
1302	AssertCompileSize(MptConfigurationPageManufacturing8, 4);
1303
1304	/**
1305	* Manufacturing page 9 - Readonly.
1306	*/
1307	#pragma pack(1)
1308	typedef struct MptConfigurationPageManufacturing9
1309	{
1310	/** Union. */
1311	union
1312	{
1313	/** Byte view. */
1314	uint8_t abPageData[4];
1315	/** Field view. */
1316	struct
1317	{
1318	/** The omnipresent header. */
1319	MptConfigurationPageHeader Header;
1320	/** Product specific information */
1321	} fields;
1322	} u;
1323	} MptConfigurationPageManufacturing9, *PMptConfigurationPageManufacturing9;
1324	#pragma pack()
1325	AssertCompileSize(MptConfigurationPageManufacturing9, 4);
1326
1327	/**
1328	* Manufacturing page 10 - Readonly.
1329	*/
1330	#pragma pack(1)
1331	typedef struct MptConfigurationPageManufacturing10
1332	{
1333	/** Union. */
1334	union
1335	{
1336	/** Byte view. */
1337	uint8_t abPageData[4];
1338	/** Field view. */
1339	struct
1340	{
1341	/** The omnipresent header. */
1342	MptConfigurationPageHeader Header;
1343	/** Product specific information */
1344	} fields;
1345	} u;
1346	} MptConfigurationPageManufacturing10, *PMptConfigurationPageManufacturing10;
1347	#pragma pack()
1348	AssertCompileSize(MptConfigurationPageManufacturing10, 4);
1349
1350	/**
1351	* IO Unit page 0. - Readonly.
1352	*/
1353	#pragma pack(1)
1354	typedef struct MptConfigurationPageIOUnit0
1355	{
1356	/** Union. */
1357	union
1358	{
1359	/** Byte view. */
1360	uint8_t abPageData[12];
1361	/** Field view. */
1362	struct
1363	{
1364	/** The omnipresent header. */
1365	MptConfigurationPageHeader Header;
1366	/** A unique identifier. */
1367	uint64_t u64UniqueIdentifier;
1368	} fields;
1369	} u;
1370	} MptConfigurationPageIOUnit0, *PMptConfigurationPageIOUnit0;
1371	#pragma pack()
1372	AssertCompileSize(MptConfigurationPageIOUnit0, 12);
1373
1374	/**
1375	* IO Unit page 1. - Read/Write.
1376	*/
1377	#pragma pack(1)
1378	typedef struct MptConfigurationPageIOUnit1
1379	{
1380	/** Union. */
1381	union
1382	{
1383	/** Byte view. */
1384	uint8_t abPageData[8];
1385	/** Field view. */
1386	struct
1387	{
1388	/** The omnipresent header. */
1389	MptConfigurationPageHeader Header;
1390	/** Flag whether this is a single function PCI device. */
1391	unsigned fSingleFunction: 1;
1392	/** Flag whether all possible paths to a device are mapped. */
1393	unsigned fAllPathsMapped: 1;
1394	/** Reserved. */
1395	unsigned u4Reserved: 4;
1396	/** Flag whether all RAID functionality is disabled. */
1397	unsigned fIntegratedRAIDDisabled: 1;
1398	/** Flag whether 32bit PCI accesses are forced. */
1399	unsigned f32BitAccessForced: 1;
1400	/** Reserved. */
1401	unsigned abReserved: 24;
1402	} fields;
1403	} u;
1404	} MptConfigurationPageIOUnit1, *PMptConfigurationPageIOUnit1;
1405	#pragma pack()
1406	AssertCompileSize(MptConfigurationPageIOUnit1, 8);
1407
1408	/**
1409	* Adapter Ordering.
1410	*/
1411	#pragma pack(1)
1412	typedef struct MptConfigurationPageIOUnit2AdapterOrdering
1413	{
1414	/** PCI bus number. */
1415	unsigned u8PCIBusNumber: 8;
1416	/** PCI device and function number. */
1417	unsigned u8PCIDevFn: 8;
1418	/** Flag whether the adapter is embedded. */
1419	unsigned fAdapterEmbedded: 1;
1420	/** Flag whether the adapter is enabled. */
1421	unsigned fAdapterEnabled: 1;
1422	/** Reserved. */
1423	unsigned u6Reserved: 6;
1424	/** Reserved. */
1425	unsigned u8Reserved: 8;
1426	} MptConfigurationPageIOUnit2AdapterOrdering, *PMptConfigurationPageIOUnit2AdapterOrdering;
1427	#pragma pack()
1428	AssertCompileSize(MptConfigurationPageIOUnit2AdapterOrdering, 4);
1429
1430	/**
1431	* IO Unit page 2. - Read/Write.
1432	*/
1433	#pragma pack(1)
1434	typedef struct MptConfigurationPageIOUnit2
1435	{
1436	/** Union. */
1437	union
1438	{
1439	/** Byte view. */
1440	uint8_t abPageData[28];
1441	/** Field view. */
1442	struct
1443	{
1444	/** The omnipresent header. */
1445	MptConfigurationPageHeader Header;
1446	/** Reserved. */
1447	unsigned fReserved: 1;
1448	/** Flag whether Pause on error is enabled. */
1449	unsigned fPauseOnError: 1;
1450	/** Flag whether verbose mode is enabled. */
1451	unsigned fVerboseModeEnabled: 1;
1452	/** Set to disable color video. */
1453	unsigned fDisableColorVideo: 1;
1454	/** Flag whether int 40h is hooked. */
1455	unsigned fNotHookInt40h: 1;
1456	/** Reserved. */
1457	unsigned u3Reserved: 3;
1458	/** Reserved. */
1459	unsigned abReserved: 24;
1460	/** BIOS version. */
1461	uint32_t u32BIOSVersion;
1462	/** Adapter ordering. */
1463	MptConfigurationPageIOUnit2AdapterOrdering aAdapterOrder[4];
1464	} fields;
1465	} u;
1466	} MptConfigurationPageIOUnit2, *PMptConfigurationPageIOUnit2;
1467	#pragma pack()
1468	AssertCompileSize(MptConfigurationPageIOUnit2, 28);
1469
1470	/*
1471	* IO Unit page 3. - Read/Write.
1472	*/
1473	#pragma pack(1)
1474	typedef struct MptConfigurationPageIOUnit3
1475	{
1476	/** Union. */
1477	union
1478	{
1479	/** Byte view. */
1480	uint8_t abPageData[8];
1481	/** Field view. */
1482	struct
1483	{
1484	/** The omnipresent header. */
1485	MptConfigurationPageHeader Header;
1486	/** Number of GPIO values. */
1487	uint8_t u8GPIOCount;
1488	/** Reserved. */
1489	uint8_t abReserved[3];
1490	} fields;
1491	} u;
1492	} MptConfigurationPageIOUnit3, *PMptConfigurationPageIOUnit3;
1493	#pragma pack()
1494	AssertCompileSize(MptConfigurationPageIOUnit3, 8);
1495
1496	/*
1497	* IO Unit page 4. - Readonly for everyone except the BIOS.
1498	*/
1499	#pragma pack(1)
1500	typedef struct MptConfigurationPageIOUnit4
1501	{
1502	/** Union. */
1503	union
1504	{
1505	/** Byte view. */
1506	uint8_t abPageData[20];
1507	/** Field view. */
1508	struct
1509	{
1510	/** The omnipresent header. */
1511	MptConfigurationPageHeader Header;
1512	/** Reserved */
1513	uint32_t u32Reserved;
1514	/** SG entry describing the Firmware location. */
1515	MptSGEntrySimple64 FWImageSGE;
1516	} fields;
1517	} u;
1518	} MptConfigurationPageIOUnit4, *PMptConfigurationPageIOUnit4;
1519	#pragma pack()
1520	AssertCompileSize(MptConfigurationPageIOUnit4, 20);
1521
1522	/**
1523	* IOC page 0. - Readonly
1524	*/
1525	#pragma pack(1)
1526	typedef struct MptConfigurationPageIOC0
1527	{
1528	/** Union. */
1529	union
1530	{
1531	/** Byte view. */
1532	uint8_t abPageData[28];
1533	/** Field view. */
1534	struct
1535	{
1536	/** The omnipresent header. */
1537	MptConfigurationPageHeader Header;
1538	/** Total ammount of NV memory in bytes. */
1539	uint32_t u32TotalNVStore;
1540	/** Number of free bytes in the NV store. */
1541	uint32_t u32FreeNVStore;
1542	/** PCI vendor ID. */
1543	uint16_t u16VendorId;
1544	/** PCI device ID. */
1545	uint16_t u16DeviceId;
1546	/** PCI revision ID. */
1547	uint8_t u8RevisionId;
1548	/** Reserved. */
1549	uint8_t abReserved[3];
1550	/** PCI class code. */
1551	uint32_t u32ClassCode;
1552	/** Subsystem vendor Id. */
1553	uint16_t u16SubsystemVendorId;
1554	/** Subsystem Id. */
1555	uint16_t u16SubsystemId;
1556	} fields;
1557	} u;
1558	} MptConfigurationPageIOC0, *PMptConfigurationPageIOC0;
1559	#pragma pack()
1560	AssertCompileSize(MptConfigurationPageIOC0, 28);
1561
1562	/**
1563	* IOC page 1. - Read/Write
1564	*/
1565	#pragma pack(1)
1566	typedef struct MptConfigurationPageIOC1
1567	{
1568	/** Union. */
1569	union
1570	{
1571	/** Byte view. */
1572	uint8_t abPageData[16];
1573	/** Field view. */
1574	struct
1575	{
1576	/** The omnipresent header. */
1577	MptConfigurationPageHeader Header;
1578	/** Flag whether reply coalescing is enabled. */
1579	unsigned fReplyCoalescingEnabled: 1;
1580	/** Reserved. */
1581	unsigned u31Reserved: 31;
1582	/** Coalescing Timeout in microseconds. */
1583	unsigned u32CoalescingTimeout: 32;
1584	/** Coalescing depth. */
1585	unsigned u8CoalescingDepth: 8;
1586	/** Reserved. */
1587	unsigned u8Reserved0: 8;
1588	unsigned u8Reserved1: 8;
1589	unsigned u8Reserved2: 8;
1590	} fields;
1591	} u;
1592	} MptConfigurationPageIOC1, *PMptConfigurationPageIOC1;
1593	#pragma pack()
1594	AssertCompileSize(MptConfigurationPageIOC1, 16);
1595
1596	/**
1597	* IOC page 2. - Readonly
1598	*/
1599	#pragma pack(1)
1600	typedef struct MptConfigurationPageIOC2
1601	{
1602	/** Union. */
1603	union
1604	{
1605	/** Byte view. */
1606	uint8_t abPageData[12];
1607	/** Field view. */
1608	struct
1609	{
1610	/** The omnipresent header. */
1611	MptConfigurationPageHeader Header;
1612	/** Flag whether striping is supported. */
1613	unsigned fStripingSupported: 1;
1614	/** Flag whether enhanced mirroring is supported. */
1615	unsigned fEnhancedMirroringSupported: 1;
1616	/** Flag whether mirroring is supported. */
1617	unsigned fMirroringSupported: 1;
1618	/** Reserved. */
1619	unsigned u26Reserved: 26;
1620	/** Flag whether SES is supported. */
1621	unsigned fSESSupported: 1;
1622	/** Flag whether SAF-TE is supported. */
1623	unsigned fSAFTESupported: 1;
1624	/** Flag whether cross channel volumes are supported. */
1625	unsigned fCrossChannelVolumesSupported: 1;
1626	/** Number of active integrated RAID volumes. */
1627	unsigned u8NumActiveVolumes: 8;
1628	/** Maximum number of integrated RAID volumes supported. */
1629	unsigned u8MaxVolumes: 8;
1630	/** Number of active integrated RAID physical disks. */
1631	unsigned u8NumActivePhysDisks: 8;
1632	/** Maximum number of integrated RAID physical disks supported. */
1633	unsigned u8MaxPhysDisks: 8;
1634	/** RAID volumes... - not supported. */
1635	} fields;
1636	} u;
1637	} MptConfigurationPageIOC2, *PMptConfigurationPageIOC2;
1638	#pragma pack()
1639	AssertCompileSize(MptConfigurationPageIOC2, 12);
1640
1641	/**
1642	* IOC page 3. - Readonly
1643	*/
1644	#pragma pack(1)
1645	typedef struct MptConfigurationPageIOC3
1646	{
1647	/** Union. */
1648	union
1649	{
1650	/** Byte view. */
1651	uint8_t abPageData[8];
1652	/** Field view. */
1653	struct
1654	{
1655	/** The omnipresent header. */
1656	MptConfigurationPageHeader Header;
1657	/** Number of active integrated RAID physical disks. */
1658	uint8_t u8NumPhysDisks;
1659	/** Reserved. */
1660	uint8_t abReserved[3];
1661	} fields;
1662	} u;
1663	} MptConfigurationPageIOC3, *PMptConfigurationPageIOC3;
1664	#pragma pack()
1665	AssertCompileSize(MptConfigurationPageIOC3, 8);
1666
1667	/**
1668	* IOC page 4. - Read/Write
1669	*/
1670	#pragma pack(1)
1671	typedef struct MptConfigurationPageIOC4
1672	{
1673	/** Union. */
1674	union
1675	{
1676	/** Byte view. */
1677	uint8_t abPageData[8];
1678	/** Field view. */
1679	struct
1680	{
1681	/** The omnipresent header. */
1682	MptConfigurationPageHeader Header;
1683	/** Number of SEP entries in this page. */
1684	uint8_t u8ActiveSEP;
1685	/** Maximum number of SEp entries supported. */
1686	uint8_t u8MaxSEP;
1687	/** Reserved. */
1688	uint16_t u16Reserved;
1689	/** SEP entries... - not supported. */
1690	} fields;
1691	} u;
1692	} MptConfigurationPageIOC4, *PMptConfigurationPageIOC4;
1693	#pragma pack()
1694	AssertCompileSize(MptConfigurationPageIOC4, 8);
1695
1696	/**
1697	* IOC page 6. - Read/Write
1698	*/
1699	#pragma pack(1)
1700	typedef struct MptConfigurationPageIOC6
1701	{
1702	/** Union. */
1703	union
1704	{
1705	/** Byte view. */
1706	uint8_t abPageData[60];
1707	/** Field view. */
1708	struct
1709	{
1710	/** The omnipresent header. */
1711	MptConfigurationPageHeader Header;
1712	uint32_t u32CapabilitiesFlags;
1713	uint8_t u8MaxDrivesIS;
1714	uint8_t u8MaxDrivesIM;
1715	uint8_t u8MaxDrivesIME;
1716	uint8_t u8Reserved1;
1717	uint8_t u8MinDrivesIS;
1718	uint8_t u8MinDrivesIM;
1719	uint8_t u8MinDrivesIME;
1720	uint8_t u8Reserved2;
1721	uint8_t u8MaxGlobalHotSpares;
1722	uint8_t u8Reserved3;
1723	uint16_t u16Reserved4;
1724	uint32_t u32Reserved5;
1725	uint32_t u32SupportedStripeSizeMapIS;
1726	uint32_t u32SupportedStripeSizeMapIME;
1727	uint32_t u32Reserved6;
1728	uint8_t u8MetadataSize;
1729	uint8_t u8Reserved7;
1730	uint16_t u16Reserved8;
1731	uint16_t u16MaxBadBlockTableEntries;
1732	uint16_t u16Reserved9;
1733	uint16_t u16IRNvsramUsage;
1734	uint16_t u16Reserved10;
1735	uint32_t u32IRNvsramVersion;
1736	uint32_t u32Reserved11;
1737	} fields;
1738	} u;
1739	} MptConfigurationPageIOC6, *PMptConfigurationPageIOC6;
1740	#pragma pack()
1741	AssertCompileSize(MptConfigurationPageIOC6, 60);
1742
1743	/**
1744	* BIOS page 1 - Read/write.
1745	*/
1746	#pragma pack(1)
1747	typedef struct MptConfigurationPageBIOS1
1748	{
1749	/** Union. */
1750	union
1751	{
1752	/** Byte view. */
1753	uint8_t abPageData[48];
1754	/** Field view. */
1755	struct
1756	{
1757	/** The omnipresent header. */
1758	MptConfigurationPageHeader Header;
1759	/** BIOS options */
1760	uint32_t u32BiosOptions;
1761	/** IOC settings */
1762	uint32_t u32IOCSettings;
1763	/** Reserved */
1764	uint32_t u32Reserved;
1765	/** Device settings */
1766	uint32_t u32DeviceSettings;
1767	/** Number of devices */
1768	uint16_t u16NumberOfDevices;
1769	/** Expander spinup */
1770	uint8_t u8ExpanderSpinup;
1771	/** Reserved */
1772	uint8_t u8Reserved;
1773	/** I/O timeout of block devices without removable media */
1774	uint16_t u16IOTimeoutBlockDevicesNonRM;
1775	/** I/O timeout sequential */
1776	uint16_t u16IOTimeoutSequential;
1777	/** I/O timeout other */
1778	uint16_t u16IOTimeoutOther;
1779	/** I/O timeout of block devices with removable media */
1780	uint16_t u16IOTimeoutBlockDevicesRM;
1781	} fields;
1782	} u;
1783	} MptConfigurationPageBIOS1, *PMptConfigurationPageBIOS1;
1784	#pragma pack()
1785	AssertCompileSize(MptConfigurationPageBIOS1, 48);
1786
1787	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_DISABLE RT_BIT(0)
1788	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_SCAN_FROM_HIGH_TO_LOW RT_BIT(1)
1789	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SAS_SUPPORT RT_BIT(8)
1790	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_FC_SUPPORT RT_BIT(9)
1791	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SPI_SUPPORT RT_BIT(10)
1792
1793	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ALTERNATE_CHS RT_BIT(3)
1794
1795	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_SET(x) ((x) << 4)
1796	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_DISABLED 0x00
1797	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BIOS_ONLY 0x01
1798	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_OS_ONLY 0x02
1799	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BOT 0x03
1800
1801	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_SET(x) ((x) << 6)
1802	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_NO_INT13H 0x00
1803	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_BOOT_MEDIA_INT13H 0x01
1804	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_INT13H 0x02
1805
1806	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_SET(x) ((x & 0xF) << 8)
1807	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_GET(x) ((x >> 8) & 0x0F)
1808	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_SET(x) ((x & 0xF) << 12)
1809	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_GET(x) ((x >> 12) & 0x0F)
1810
1811	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SET(x) (((x) & 0x3) << 16)
1812	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_ENCLOSURE 0x0
1813	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SAS_ADDRESS 0x1
1814
1815	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_DIRECT_ATTACH_SPINUP_MODE_ALL RT_BIT(18)
1816	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_AUTO_PORT_ENABLE RT_BIT(19)
1817
1818	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_SET(x) (((x) & 0xF) << 20)
1819	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_GET(x) ((x >> 20) & 0x0F)
1820
1821	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_SET(x) (((x) & 0xF) << 24)
1822	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_GET(x) ((x >> 24) & 0x0F)
1823
1824	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS RT_BIT(0)
1825	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_NON_REMOVABLE_DEVICES RT_BIT(1)
1826	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_REMOVABLE_DEVICES RT_BIT(2)
1827	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS2 RT_BIT(3)
1828	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_SMART_POLLING RT_BIT(4)
1829
1830	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_SET(x) ((x) & 0x0F)
1831	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_GET(x) ((x) & 0x0F)
1832	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_SET(x) (((x) & 0x0F) << 4)
1833	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_GET(x) ((x >> 4) & 0x0F)
1834
1835	/**
1836	* BIOS page 2 - Read/write.
1837	*/
1838	#pragma pack(1)
1839	typedef struct MptConfigurationPageBIOS2
1840	{
1841	/** Union. */
1842	union
1843	{
1844	/** Byte view. */
1845	uint8_t abPageData[384];
1846	/** Field view. */
1847	struct
1848	{
1849	/** The omnipresent header. */
1850	MptConfigurationPageHeader Header;
1851	/** Reserved */
1852	uint32_t au32Reserved[6];
1853	/** Format of the boot device field. */
1854	uint8_t u8BootDeviceForm;
1855	/** Previous format of the boot device field. */
1856	uint8_t u8PrevBootDeviceForm;
1857	/** Reserved */
1858	uint16_t u16Reserved;
1859	/** Boot device fields - dependent on the format */
1860	union
1861	{
1862	/** Device for AdapterNumber:Bus:Target:LUN */
1863	struct
1864	{
1865	/** Target ID */
1866	uint8_t u8TargetID;
1867	/** Bus */
1868	uint8_t u8Bus;
1869	/** Adapter Number */
1870	uint8_t u8AdapterNumber;
1871	/** Reserved */
1872	uint8_t u8Reserved;
1873	/** Reserved */
1874	uint32_t au32Reserved[3];
1875	/** LUN */
1876	uint32_t aLUN[5];
1877	/** Reserved */
1878	uint32_t au32Reserved2[56];
1879	} AdapterNumberBusTargetLUN;
1880	/** Device for PCIAddress:Bus:Target:LUN */
1881	struct
1882	{
1883	/** Target ID */
1884	uint8_t u8TargetID;
1885	/** Bus */
1886	uint8_t u8Bus;
1887	/** Adapter Number */
1888	uint16_t u16PCIAddress;
1889	/** Reserved */
1890	uint32_t au32Reserved[3];
1891	/** LUN */
1892	uint32_t aLUN[5];
1893	/** Reserved */
1894	uint32_t au32Reserved2[56];
1895	} PCIAddressBusTargetLUN;
1896	/** Device for PCISlotNo:Bus:Target:LUN */
1897	struct
1898	{
1899	/** Target ID */
1900	uint8_t u8TargetID;
1901	/** Bus */
1902	uint8_t u8Bus;
1903	/** PCI Slot Number */
1904	uint8_t u16PCISlotNo;
1905	/** Reserved */
1906	uint32_t au32Reserved[3];
1907	/** LUN */
1908	uint32_t aLUN[5];
1909	/** Reserved */
1910	uint32_t au32Reserved2[56];
1911	} PCIAddressBusSlotLUN;
1912	/** Device for FC channel world wide name */
1913	struct
1914	{
1915	/** World wide port name low */
1916	uint32_t u32WorldWidePortNameLow;
1917	/** World wide port name high */
1918	uint32_t u32WorldWidePortNameHigh;
1919	/** Reserved */
1920	uint32_t au32Reserved[3];
1921	/** LUN */
1922	uint32_t aLUN[5];
1923	/** Reserved */
1924	uint32_t au32Reserved2[56];
1925	} FCWorldWideName;
1926	/** Device for FC channel world wide name */
1927	struct
1928	{
1929	/** SAS address */
1930	uint64_t u64SASAddress;
1931	/** Reserved */
1932	uint32_t au32Reserved[3];
1933	/** LUN */
1934	uint32_t aLUN[5];
1935	/** Reserved */
1936	uint32_t au32Reserved2[56];
1937	} SASWorldWideName;
1938	/** Device for Enclosure/Slot */
1939	struct
1940	{
1941	/** Enclosure logical ID */
1942	uint64_t u64EnclosureLogicalID;
1943	/** Reserved */
1944	uint32_t au32Reserved[3];
1945	/** LUN */
1946	uint32_t aLUN[5];
1947	/** Reserved */
1948	uint32_t au32Reserved2[56];
1949	} EnclosureSlot;
1950	} BootDevice;
1951	} fields;
1952	} u;
1953	} MptConfigurationPageBIOS2, *PMptConfigurationPageBIOS2;
1954	#pragma pack()
1955	AssertCompileSize(MptConfigurationPageBIOS2, 384);
1956
1957	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SET(x) ((x) & 0x0F)
1958	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FIRST 0x0
1959	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ADAPTER_BUS_TARGET_LUN 0x1
1960	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCIADDR_BUS_TARGET_LUN 0x2
1961	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCISLOT_BUS_TARGET_LUN 0x3
1962	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FC_WWN 0x4
1963	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SAS_WWN 0x5
1964	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ENCLOSURE_SLOT 0x6
1965
1966	/**
1967	* BIOS page 4 - Read/Write (Where is 3? - not defined in the spec)
1968	*/
1969	#pragma pack(1)
1970	typedef struct MptConfigurationPageBIOS4
1971	{
1972	/** Union. */
1973	union
1974	{
1975	/** Byte view. */
1976	uint8_t abPageData[12];
1977	/** Field view. */
1978	struct
1979	{
1980	/** The omnipresent header. */
1981	MptConfigurationPageHeader Header;
1982	/** Reassignment Base WWID */
1983	uint64_t u64ReassignmentBaseWWID;
1984	} fields;
1985	} u;
1986	} MptConfigurationPageBIOS4, *PMptConfigurationPageBIOS4;
1987	#pragma pack()
1988	AssertCompileSize(MptConfigurationPageBIOS4, 12);
1989
1990	/**
1991	* SCSI-SPI port page 0. - Readonly
1992	*/
1993	#pragma pack(1)
1994	typedef struct MptConfigurationPageSCSISPIPort0
1995	{
1996	/** Union. */
1997	union
1998	{
1999	/** Byte view. */
2000	uint8_t abPageData[12];
2001	/** Field view. */
2002	struct
2003	{
2004	/** The omnipresent header. */
2005	MptConfigurationPageHeader Header;
2006	/** Flag whether this port is information unit trnafsers capable. */
2007	unsigned fInformationUnitTransfersCapable: 1;
2008	/** Flag whether the port is DT (Dual Transfer) capable. */
2009	unsigned fDTCapable: 1;
2010	/** Flag whether the port is QAS (Quick Arbitrate and Select) capable. */
2011	unsigned fQASCapable: 1;
2012	/** Reserved. */
2013	unsigned u5Reserved1: 5;
2014	/** Minimum Synchronous transfer period. */
2015	unsigned u8MinimumSynchronousTransferPeriod: 8;
2016	/** Maximum synchronous offset. */
2017	unsigned u8MaximumSynchronousOffset: 8;
2018	/** Reserved. */
2019	unsigned u5Reserved2: 5;
2020	/** Flag whether indicating the width of the bus - 0 narrow and 1 for wide. */
2021	unsigned fWide: 1;
2022	/** Reserved */
2023	unsigned fReserved: 1;
2024	/** Flag whether the port is AIP (Asynchronous Information Protection) capable. */
2025	unsigned fAIPCapable: 1;
2026	/** Signaling Type. */
2027	unsigned u2SignalingType: 2;
2028	/** Reserved. */
2029	unsigned u30Reserved: 30;
2030	} fields;
2031	} u;
2032	} MptConfigurationPageSCSISPIPort0, *PMptConfigurationPageSCSISPIPort0;
2033	#pragma pack()
2034	AssertCompileSize(MptConfigurationPageSCSISPIPort0, 12);
2035
2036	/**
2037	* SCSI-SPI port page 1. - Read/Write
2038	*/
2039	#pragma pack(1)
2040	typedef struct MptConfigurationPageSCSISPIPort1
2041	{
2042	/** Union. */
2043	union
2044	{
2045	/** Byte view. */
2046	uint8_t abPageData[12];
2047	/** Field view. */
2048	struct
2049	{
2050	/** The omnipresent header. */
2051	MptConfigurationPageHeader Header;
2052	/** The SCSI ID of the port. */
2053	uint8_t u8SCSIID;
2054	/** Reserved. */
2055	uint8_t u8Reserved;
2056	/** Port response IDs Bit mask field. */
2057	uint16_t u16PortResponseIDsBitmask;
2058	/** Value for the on BUS timer. */
2059	uint32_t u32OnBusTimerValue;
2060	} fields;
2061	} u;
2062	} MptConfigurationPageSCSISPIPort1, *PMptConfigurationPageSCSISPIPort1;
2063	#pragma pack()
2064	AssertCompileSize(MptConfigurationPageSCSISPIPort1, 12);
2065
2066	/**
2067	* Device settings for one device.
2068	*/
2069	#pragma pack(1)
2070	typedef struct MptDeviceSettings
2071	{
2072	/** Timeout for I/O in seconds. */
2073	unsigned u8Timeout: 8;
2074	/** Minimum synchronous factor. */
2075	unsigned u8SyncFactor: 8;
2076	/** Flag whether disconnect is enabled. */
2077	unsigned fDisconnectEnable: 1;
2078	/** Flag whether Scan ID is enabled. */
2079	unsigned fScanIDEnable: 1;
2080	/** Flag whether Scan LUNs is enabled. */
2081	unsigned fScanLUNEnable: 1;
2082	/** Flag whether tagged queuing is enabled. */
2083	unsigned fTaggedQueuingEnabled: 1;
2084	/** Flag whether wide is enabled. */
2085	unsigned fWideDisable: 1;
2086	/** Flag whether this device is bootable. */
2087	unsigned fBootChoice: 1;
2088	/** Reserved. */
2089	unsigned u10Reserved: 10;
2090	} MptDeviceSettings, *PMptDeviceSettings;
2091	#pragma pack()
2092	AssertCompileSize(MptDeviceSettings, 4);
2093
2094	/**
2095	* SCSI-SPI port page 2. - Read/Write for the BIOS
2096	*/
2097	#pragma pack(1)
2098	typedef struct MptConfigurationPageSCSISPIPort2
2099	{
2100	/** Union. */
2101	union
2102	{
2103	/** Byte view. */
2104	uint8_t abPageData[76];
2105	/** Field view. */
2106	struct
2107	{
2108	/** The omnipresent header. */
2109	MptConfigurationPageHeader Header;
2110	/** Flag indicating the bus scan order. */
2111	unsigned fBusScanOrderHighToLow: 1;
2112	/** Reserved. */
2113	unsigned fReserved: 1;
2114	/** Flag whether SCSI Bus resets are avoided. */
2115	unsigned fAvoidSCSIBusResets: 1;
2116	/** Flag whether alternate CHS is used. */
2117	unsigned fAlternateCHS: 1;
2118	/** Flag whether termination is disabled. */
2119	unsigned fTerminationDisabled: 1;
2120	/** Reserved. */
2121	unsigned u27Reserved: 27;
2122	/** Host SCSI ID. */
2123	unsigned u4HostSCSIID: 4;
2124	/** Initialize HBA. */
2125	unsigned u2InitializeHBA: 2;
2126	/** Removeable media setting. */
2127	unsigned u2RemovableMediaSetting: 2;
2128	/** Spinup delay. */
2129	unsigned u4SpinupDelay: 4;
2130	/** Negotiating settings. */
2131	unsigned u2NegotitatingSettings: 2;
2132	/** Reserved. */
2133	unsigned u18Reserved: 18;
2134	/** Device Settings. */
2135	MptDeviceSettings aDeviceSettings[16];
2136	} fields;
2137	} u;
2138	} MptConfigurationPageSCSISPIPort2, *PMptConfigurationPageSCSISPIPort2;
2139	#pragma pack()
2140	AssertCompileSize(MptConfigurationPageSCSISPIPort2, 76);
2141
2142	/**
2143	* SCSI-SPI device page 0. - Readonly
2144	*/
2145	#pragma pack(1)
2146	typedef struct MptConfigurationPageSCSISPIDevice0
2147	{
2148	/** Union. */
2149	union
2150	{
2151	/** Byte view. */
2152	uint8_t abPageData[12];
2153	/** Field view. */
2154	struct
2155	{
2156	/** The omnipresent header. */
2157	MptConfigurationPageHeader Header;
2158	/** Negotiated Parameters. */
2159	/** Information Units enabled. */
2160	unsigned fInformationUnitsEnabled: 1;
2161	/** Dual Transfers Enabled. */
2162	unsigned fDTEnabled: 1;
2163	/** QAS enabled. */
2164	unsigned fQASEnabled: 1;
2165	/** Reserved. */
2166	unsigned u5Reserved1: 5;
2167	/** Synchronous Transfer period. */
2168	unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2169	/** Synchronous offset. */
2170	unsigned u8NegotiatedSynchronousOffset: 8;
2171	/** Reserved. */
2172	unsigned u5Reserved2: 5;
2173	/** Width - 0 for narrow and 1 for wide. */
2174	unsigned fWide: 1;
2175	/** Reserved. */
2176	unsigned fReserved: 1;
2177	/** AIP enabled. */
2178	unsigned fAIPEnabled: 1;
2179	/** Flag whether negotiation occurred. */
2180	unsigned fNegotationOccured: 1;
2181	/** Flag whether a SDTR message was rejected. */
2182	unsigned fSDTRRejected: 1;
2183	/** Flag whether a WDTR message was rejected. */
2184	unsigned fWDTRRejected: 1;
2185	/** Flag whether a PPR message was rejected. */
2186	unsigned fPPRRejected: 1;
2187	/** Reserved. */
2188	unsigned u28Reserved: 28;
2189	} fields;
2190	} u;
2191	} MptConfigurationPageSCSISPIDevice0, *PMptConfigurationPageSCSISPIDevice0;
2192	#pragma pack()
2193	AssertCompileSize(MptConfigurationPageSCSISPIDevice0, 12);
2194
2195	/**
2196	* SCSI-SPI device page 1. - Read/Write
2197	*/
2198	#pragma pack(1)
2199	typedef struct MptConfigurationPageSCSISPIDevice1
2200	{
2201	/** Union. */
2202	union
2203	{
2204	/** Byte view. */
2205	uint8_t abPageData[16];
2206	/** Field view. */
2207	struct
2208	{
2209	/** The omnipresent header. */
2210	MptConfigurationPageHeader Header;
2211	/** Requested Parameters. */
2212	/** Information Units enable. */
2213	bool fInformationUnitsEnable: 1;
2214	/** Dual Transfers Enable. */
2215	bool fDTEnable: 1;
2216	/** QAS enable. */
2217	bool fQASEnable: 1;
2218	/** Reserved. */
2219	unsigned u5Reserved1: 5;
2220	/** Synchronous Transfer period. */
2221	unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2222	/** Synchronous offset. */
2223	unsigned u8NegotiatedSynchronousOffset: 8;
2224	/** Reserved. */
2225	unsigned u5Reserved2: 5;
2226	/** Width - 0 for narrow and 1 for wide. */
2227	bool fWide: 1;
2228	/** Reserved. */
2229	bool fReserved1: 1;
2230	/** AIP enable. */
2231	bool fAIPEnable: 1;
2232	/** Reserved. */
2233	bool fReserved2: 1;
2234	/** WDTR disallowed. */
2235	bool fWDTRDisallowed: 1;
2236	/** SDTR disallowed. */
2237	bool fSDTRDisallowed: 1;
2238	/** Reserved. */
2239	unsigned u29Reserved: 29;
2240	} fields;
2241	} u;
2242	} MptConfigurationPageSCSISPIDevice1, *PMptConfigurationPageSCSISPIDevice1;
2243	#pragma pack()
2244	AssertCompileSize(MptConfigurationPageSCSISPIDevice1, 16);
2245
2246	/**
2247	* SCSI-SPI device page 2. - Read/Write
2248	*/
2249	#pragma pack(1)
2250	typedef struct MptConfigurationPageSCSISPIDevice2
2251	{
2252	/** Union. */
2253	union
2254	{
2255	/** Byte view. */
2256	uint8_t abPageData[16];
2257	/** Field view. */
2258	struct
2259	{
2260	/** The omnipresent header. */
2261	MptConfigurationPageHeader Header;
2262	/** Reserved. */
2263	unsigned u4Reserved: 4;
2264	/** ISI enable. */
2265	unsigned fISIEnable: 1;
2266	/** Secondary driver enable. */
2267	unsigned fSecondaryDriverEnable: 1;
2268	/** Reserved. */
2269	unsigned fReserved: 1;
2270	/** Slew reate controler. */
2271	unsigned u3SlewRateControler: 3;
2272	/** Primary drive strength controler. */
2273	unsigned u3PrimaryDriveStrengthControl: 3;
2274	/** Secondary drive strength controler. */
2275	unsigned u3SecondaryDriveStrengthControl: 3;
2276	/** Reserved. */
2277	unsigned u12Reserved: 12;
2278	/** XCLKH_ST. */
2279	unsigned fXCLKH_ST: 1;
2280	/** XCLKS_ST. */
2281	unsigned fXCLKS_ST: 1;
2282	/** XCLKH_DT. */
2283	unsigned fXCLKH_DT: 1;
2284	/** XCLKS_DT. */
2285	unsigned fXCLKS_DT: 1;
2286	/** Parity pipe select. */
2287	unsigned u2ParityPipeSelect: 2;
2288	/** Reserved. */
2289	unsigned u30Reserved: 30;
2290	/** Data bit pipeline select. */
2291	unsigned u32DataPipelineSelect: 32;
2292	} fields;
2293	} u;
2294	} MptConfigurationPageSCSISPIDevice2, *PMptConfigurationPageSCSISPIDevice2;
2295	#pragma pack()
2296	AssertCompileSize(MptConfigurationPageSCSISPIDevice2, 16);
2297
2298	/**
2299	* SCSI-SPI device page 3 (Revision G). - Readonly
2300	*/
2301	#pragma pack(1)
2302	typedef struct MptConfigurationPageSCSISPIDevice3
2303	{
2304	/** Union. */
2305	union
2306	{
2307	/** Byte view. */
2308	uint8_t abPageData[1];
2309	/** Field view. */
2310	struct
2311	{
2312	/** The omnipresent header. */
2313	MptConfigurationPageHeader Header;
2314	/** Number of times the IOC rejected a message because it doesn't support the operation. */
2315	uint16_t u16MsgRejectCount;
2316	/** Number of times the SCSI bus entered an invalid operation state. */
2317	uint16_t u16PhaseErrorCount;
2318	/** Number of parity errors. */
2319	uint16_t u16ParityCount;
2320	/** Reserved. */
2321	uint16_t u16Reserved;
2322	} fields;
2323	} u;
2324	} MptConfigurationPageSCSISPIDevice3, *PMptConfigurationPageSCSISPIDevice3;
2325	#pragma pack()
2326	AssertCompileSize(MptConfigurationPageSCSISPIDevice3, 12);
2327
2328	/**
2329	* SAS I/O Unit page 0 - Readonly
2330	*/
2331	#pragma pack(1)
2332	typedef struct MptConfigurationPageSASIOUnit0
2333	{
2334	/** Union. */
2335	union
2336	{
2337	/** Byte view - variable. */
2338	uint8_t abPageData[1];
2339	/** Field view. */
2340	struct
2341	{
2342	/** The omnipresent header. */
2343	MptExtendedConfigurationPageHeader ExtHeader;
2344	/** Nvdata version default */
2345	uint16_t u16NvdataVersionDefault;
2346	/** Nvdata version persisent */
2347	uint16_t u16NvdataVersionPersistent;
2348	/** Number of physical ports */
2349	uint8_t u8NumPhys;
2350	/** Reserved */
2351	uint8_t au8Reserved[3];
2352	/** Content for each physical port */
2353	struct
2354	{
2355	/** Port number */
2356	uint8_t u8Port;
2357	/** Port flags */
2358	uint8_t u8PortFlags;
2359	/** Phy flags */
2360	uint8_t u8PhyFlags;
2361	/** negotiated link rate */
2362	uint8_t u8NegotiatedLinkRate;
2363	/** Controller phy device info */
2364	uint32_t u32ControllerPhyDeviceInfo;
2365	/** Attached device handle */
2366	uint16_t u16AttachedDevHandle;
2367	/** Controller device handle */
2368	uint16_t u16ControllerDevHandle;
2369	/** Discovery status */
2370	uint32_t u32DiscoveryStatus;
2371	} aPHY[LSILOGICSCSI_PCI_SAS_PORTS_MAX];
2372	} fields;
2373	} u;
2374	} MptConfigurationPageSASIOUnit0, *PMptConfigurationPageSASIOUnit0;
2375	#pragma pack()
2376	AssertCompileSize(MptConfigurationPageSASIOUnit0, 8+2+2+1+3+(LSILOGICSCSI_PCI_SAS_PORTS_MAX*16));
2377
2378	#define LSILOGICSCSI_SASIOUNIT0_PORT_CONFIGURATION_AUTO RT_BIT(0)
2379	#define LSILOGICSCSI_SASIOUNIT0_PORT_TARGET_IOC RT_BIT(2)
2380	#define LSILOGICSCSI_SASIOUNIT0_PORT_DISCOVERY_IN_STATUS RT_BIT(3)
2381
2382	#define LSILOGICSCSI_SASIOUNIT0_PHY_RX_INVERTED RT_BIT(0)
2383	#define LSILOGICSCSI_SASIOUNIT0_PHY_TX_INVERTED RT_BIT(1)
2384	#define LSILOGICSCSI_SASIOUNIT0_PHY_DISABLED RT_BIT(2)
2385
2386	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SET(x) ((x) & 0x0F)
2387	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_GET(x) ((x) & 0x0F)
2388	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_UNKNOWN 0x00
2389	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_DISABLED 0x01
2390	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_FAILED 0x02
2391	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SATA_OOB 0x03
2392	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_15GB 0x08
2393	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_30GB 0x09
2394
2395	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(x) ((x) & 0x3)
2396	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_NO 0x0
2397	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_END 0x1
2398	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_EDGE_EXPANDER 0x2
2399	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2400
2401	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA_HOST RT_BIT(3)
2402	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_INITIATOR RT_BIT(4)
2403	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_INITIATOR RT_BIT(5)
2404	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_INITIATOR RT_BIT(6)
2405	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA RT_BIT(7)
2406	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_TARGET RT_BIT(8)
2407	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_TARGET RT_BIT(9)
2408	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_TARGET RT_BIT(10)
2409	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2410	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_LSI RT_BIT(12)
2411	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_ATAPI_DEVICE RT_BIT(13)
2412	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SEP_DEVICE RT_BIT(14)
2413
2414	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_LOOP RT_BIT(0)
2415	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNADDRESSABLE RT_BIT(1)
2416	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SAME_SAS_ADDR RT_BIT(2)
2417	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXPANDER_ERROR RT_BIT(3)
2418	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_TIMEOUT RT_BIT(4)
2419	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_OOE RT_BIT(5)
2420	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_IDX RT_BIT(6)
2421	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_FUNC_FAILED RT_BIT(7)
2422	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_CRC_ERROR RT_BIT(8)
2423	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SUBTRSCTIVE_LNK RT_BIT(9)
2424	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_TBL_LNK RT_BIT(10)
2425	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNSUPPORTED_DEV RT_BIT(11)
2426	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MAX_SATA_TGTS RT_BIT(12)
2427	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MULT_CTRLS RT_BIT(13)
2428
2429	/**
2430	* SAS I/O Unit page 1 - Read/Write
2431	*/
2432	#pragma pack(1)
2433	typedef struct MptConfigurationPageSASIOUnit1
2434	{
2435	/** Union. */
2436	union
2437	{
2438	/** Byte view - variable. */
2439	uint8_t abPageData[1];
2440	/** Field view. */
2441	struct
2442	{
2443	/** The omnipresent header. */
2444	MptExtendedConfigurationPageHeader ExtHeader;
2445	/** Control flags */
2446	uint16_t u16ControlFlags;
2447	/** maximum number of SATA targets */
2448	uint16_t u16MaxNumSATATargets;
2449	/** additional control flags */
2450	uint16_t u16AdditionalControlFlags;
2451	/** Reserved */
2452	uint16_t u16Reserved;
2453	/** Number of PHYs */
2454	uint8_t u8NumPhys;
2455	/** maximum SATA queue depth */
2456	uint8_t u8SATAMaxQDepth;
2457	/** Delay for reporting missing devices. */
2458	uint8_t u8ReportDeviceMissingDelay;
2459	/** I/O device missing delay */
2460	uint8_t u8IODeviceMissingDelay;
2461	/** Content for each physical port */
2462	struct
2463	{
2464	/** Port number */
2465	uint8_t u8Port;
2466	/** Port flags */
2467	uint8_t u8PortFlags;
2468	/** Phy flags */
2469	uint8_t u8PhyFlags;
2470	/** Max link rate */
2471	uint8_t u8MaxLinkRate;
2472	/** Controller phy device info */
2473	uint32_t u32ControllerPhyDeviceInfo;
2474	/** Maximum target port connect time */
2475	uint16_t u16MaxTargetPortConnectTime;
2476	/** Reserved */
2477	uint16_t u16Reserved;
2478	} aPHY[LSILOGICSCSI_PCI_SAS_PORTS_MAX];
2479	} fields;
2480	} u;
2481	} MptConfigurationPageSASIOUnit1, *PMptConfigurationPageSASIOUnit1;
2482	#pragma pack()
2483	AssertCompileSize(MptConfigurationPageSASIOUnit1, 8+12+(LSILOGICSCSI_PCI_SAS_PORTS_MAX*12));
2484
2485	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_CLEAR_SATA_AFFILIATION RT_BIT(0)
2486	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_FIRST_LEVEL_DISCOVERY_ONLY RT_BIT(1)
2487	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SUBTRACTIVE_LNK_ILLEGAL RT_BIT(2)
2488	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_IOC_ENABLE_HIGH_PHY RT_BIT(3)
2489	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED RT_BIT(4)
2490	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED RT_BIT(5)
2491	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED RT_BIT(6)
2492	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LBA48_REQUIRED RT_BIT(7)
2493	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_INIT_POSTPONED RT_BIT(8)
2494
2495	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SET(x) (((x) & 0x3) << 9)
2496	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_GET(x) (((x) >> 9) & 0x3)
2497	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS_AND_SATA 0x00
2498	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS 0x01
2499	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SATA 0x02
2500
2501	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_EXP_ADDR RT_BIT(11)
2502	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SETTINGS_PRESERV_REQUIRED RT_BIT(12)
2503	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_15GB RT_BIT(13)
2504	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_30GB RT_BIT(14)
2505	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SAS_SELF_TEST_ENABLED RT_BIT(15)
2506
2507	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_TBL_LNKS_ALLOW RT_BIT(0)
2508	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_NO_AFFIL RT_BIT(1)
2509	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_SELF_AFFIL RT_BIT(2)
2510	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_OTHER_AFFIL RT_BIT(3)
2511	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_PORT_EN_ONLY RT_BIT(4)
2512	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_HIDE_NON_ZERO_PHYS RT_BIT(5)
2513	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_ASYNC_NOTIF RT_BIT(6)
2514	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_MULT_PORTS_ILL_SAME_DOMAIN RT_BIT(7)
2515
2516	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_UNITS_16_SEC RT_BIT(7)
2517	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_SET(x) ((x) & 0x7F)
2518	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_GET(x) ((x) & 0x7F)
2519
2520	#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_AUTO RT_BIT(0)
2521	#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_IOC1 RT_BIT(2)
2522
2523	#define LSILOGICSCSI_SASIOUNIT1_PHY_RX_INVERT RT_BIT(0)
2524	#define LSILOGICSCSI_SASIOUNIT1_PHY_TX_INVERT RT_BIT(1)
2525	#define LSILOGICSCSI_SASIOUNIT1_PHY_DISABLE RT_BIT(2)
2526
2527	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_SET(x) ((x) & 0x0F)
2528	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_GET(x) ((x) & 0x0F)
2529	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_SET(x) (((x) & 0x0F) << 4)
2530	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_GET(x) ((x >> 4) & 0x0F)
2531	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_15GB 0x8
2532	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_30GB 0x9
2533
2534	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_SET(x) ((x) & 0x3)
2535	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_GET(x) ((x) & 0x3)
2536	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_NO 0x0
2537	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_END 0x1
2538	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_EDGE_EXPANDER 0x2
2539	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2540	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_INITIATOR RT_BIT(4)
2541	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_INITIATOR RT_BIT(5)
2542	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_INITIATOR RT_BIT(6)
2543	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_TARGET RT_BIT(8)
2544	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_TARGET RT_BIT(9)
2545	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_TARGET RT_BIT(10)
2546	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2547	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_LSI RT_BIT(12)
2548	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_ATAPI RT_BIT(13)
2549	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SEP RT_BIT(14)
2550
2551	/**
2552	* SAS I/O unit page 2 - Read/Write
2553	*/
2554	#pragma pack(1)
2555	typedef struct MptConfigurationPageSASIOUnit2
2556	{
2557	/** Union. */
2558	union
2559	{
2560	/** Byte view - variable. */
2561	uint8_t abPageData[1];
2562	/** Field view. */
2563	struct
2564	{
2565	/** The omnipresent header. */
2566	MptExtendedConfigurationPageHeader ExtHeader;
2567	/** Device numbers per enclosure */
2568	uint8_t u8NumDevsPerEnclosure;
2569	/** Boot device wait time */
2570	uint8_t u8BootDeviceWaitTime;
2571	/** Reserved */
2572	uint16_t u16Reserved;
2573	/** Maximum number of persistent Bus and target ID mappings */
2574	uint16_t u16MaxPersistentIDs;
2575	/** Number of persistent IDs used */
2576	uint16_t u16NumPersistentIDsUsed;
2577	/** Status */
2578	uint8_t u8Status;
2579	/** Flags */
2580	uint8_t u8Flags;
2581	/** Maximum number of physical mapped IDs */
2582	uint16_t u16MaxNumPhysicalMappedIDs;
2583	} fields;
2584	} u;
2585	} MptConfigurationPageSASIOUnit2, *PMptConfigurationPageSASIOUnit2;
2586	#pragma pack()
2587	AssertCompileSize(MptConfigurationPageSASIOUnit2, 20);
2588
2589	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_TBL_FULL RT_BIT(0)
2590	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_DISABLED RT_BIT(1)
2591	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_ENC_DEV_UNMAPPED RT_BIT(2)
2592	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_DEV_LIMIT_EXCEEDED RT_BIT(3)
2593
2594	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_MAP_DISABLE RT_BIT(0)
2595	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_SET(x) ((x & 0x7) << 1)
2596	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_GET(x) ((x >> 1) & 0x7)
2597	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_NO 0x0
2598	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_DIRECT_ATTACHED 0x1
2599	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_ENC 0x2
2600	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_HOST 0x7
2601	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_RESERVE_TARGET_ID_ZERO RT_BIT(4)
2602	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_START_SLOT_NUMBER_ONE RT_BIT(5)
2603
2604	/**
2605	* SAS I/O unit page 3 - Read/Write
2606	*/
2607	#pragma pack(1)
2608	typedef struct MptConfigurationPageSASIOUnit3
2609	{
2610	/** Union. */
2611	union
2612	{
2613	/** Byte view - variable. */
2614	uint8_t abPageData[1];
2615	/** Field view. */
2616	struct
2617	{
2618	/** The omnipresent header. */
2619	MptExtendedConfigurationPageHeader ExtHeader;
2620	/** Reserved */
2621	uint32_t u32Reserved;
2622	uint32_t u32MaxInvalidDwordCount;
2623	uint32_t u32InvalidDwordCountTime;
2624	uint32_t u32MaxRunningDisparityErrorCount;
2625	uint32_t u32RunningDisparityErrorTime;
2626	uint32_t u32MaxLossDwordSynchCount;
2627	uint32_t u32LossDwordSynchCountTime;
2628	uint32_t u32MaxPhysResetProblemCount;
2629	uint32_t u32PhyResetProblemTime;
2630	} fields;
2631	} u;
2632	} MptConfigurationPageSASIOUnit3, *PMptConfigurationPageSASIOUnit3;
2633	#pragma pack()
2634	AssertCompileSize(MptConfigurationPageSASIOUnit3, 44);
2635
2636	/**
2637	* Structure of all supported pages for the SCSI SPI controller.
2638	*/
2639	typedef struct MptConfigurationPagesSupportedSpi
2640	{
2641	MptConfigurationPageManufacturing0 ManufacturingPage0;
2642	MptConfigurationPageManufacturing1 ManufacturingPage1;
2643	MptConfigurationPageManufacturing2 ManufacturingPage2;
2644	MptConfigurationPageManufacturing3 ManufacturingPage3;
2645	MptConfigurationPageManufacturing4 ManufacturingPage4;
2646	MptConfigurationPageIOUnit0 IOUnitPage0;
2647	MptConfigurationPageIOUnit1 IOUnitPage1;
2648	MptConfigurationPageIOUnit2 IOUnitPage2;
2649	MptConfigurationPageIOUnit3 IOUnitPage3;
2650	MptConfigurationPageIOC0 IOCPage0;
2651	MptConfigurationPageIOC1 IOCPage1;
2652	MptConfigurationPageIOC2 IOCPage2;
2653	MptConfigurationPageIOC3 IOCPage3;
2654	MptConfigurationPageIOC4 IOCPage4;
2655	MptConfigurationPageIOC6 IOCPage6;
2656	struct
2657	{
2658	MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
2659	MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
2660	MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
2661	} aPortPages[1]; /* Currently only one port supported. */
2662	struct
2663	{
2664	struct
2665	{
2666	MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
2667	MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
2668	MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
2669	MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
2670	} aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
2671	} aBuses[1]; /* Only one bus at the moment. */
2672	} MptConfigurationPagesSupportedSpi, *PMptConfigurationPagesSupportedSpi;
2673
2674	/**
2675	* Structure of all supported pages for the SCSI SAS controller.
2676	*/
2677	typedef struct MptConfigurationPagesSupportedSas
2678	{
2679	MptConfigurationPageManufacturing0 ManufacturingPage0;
2680	MptConfigurationPageManufacturing1 ManufacturingPage1;
2681	MptConfigurationPageManufacturing2 ManufacturingPage2;
2682	MptConfigurationPageManufacturing3 ManufacturingPage3;
2683	MptConfigurationPageManufacturing4 ManufacturingPage4;
2684	MptConfigurationPageManufacturing5 ManufacturingPage5;
2685	MptConfigurationPageManufacturing6 ManufacturingPage6;
2686	MptConfigurationPageManufacturing7 ManufacturingPage7;
2687	MptConfigurationPageManufacturing9 ManufacturingPage8;
2688	MptConfigurationPageManufacturing10 ManufacturingPage10;
2689	MptConfigurationPageIOUnit0 IOUnitPage0;
2690	MptConfigurationPageIOUnit1 IOUnitPage1;
2691	MptConfigurationPageIOUnit2 IOUnitPage2;
2692	MptConfigurationPageIOUnit3 IOUnitPage3;
2693	MptConfigurationPageIOUnit4 IOUnitPage4;
2694	MptConfigurationPageIOC0 IOCPage0;
2695	MptConfigurationPageIOC1 IOCPage1;
2696	MptConfigurationPageIOC2 IOCPage2;
2697	MptConfigurationPageIOC3 IOCPage3;
2698	MptConfigurationPageIOC4 IOCPage4;
2699	MptConfigurationPageIOC6 IOCPage6;
2700	/* BIOS page 0 is not described */
2701	MptConfigurationPageBIOS1 BIOSPage1;
2702	MptConfigurationPageBIOS2 BIOSPage2;
2703	/* BIOS page 3 is not described */
2704	MptConfigurationPageBIOS4 BIOSPage4;
2705	MptConfigurationPageSASIOUnit0 SASIOUnitPage0;
2706	MptConfigurationPageSASIOUnit1 SASIOUnitPage1;
2707	MptConfigurationPageSASIOUnit2 SASIOUnitPage2;
2708	MptConfigurationPageSASIOUnit3 SASIOUnitPage3;
2709	} MptConfigurationPagesSupportedSas, *PMptConfigurationPagesSupportedSas;
2710
2711	/**
2712	* Possible SG element types.
2713	*/
2714	enum MPTSGENTRYTYPE
2715	{
2716	MPTSGENTRYTYPE_TRANSACTION_CONTEXT = 0x00,
2717	MPTSGENTRYTYPE_SIMPLE = 0x01,
2718	MPTSGENTRYTYPE_CHAIN = 0x03
2719	};
2720
2721	#endif /* __DEVLSILOGICSCSI_H__ */

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source: vbox/trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.h@ 25536

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