DevLsiLogicSCSI.h@ 45795

Last change on this file since 45795 was 45795, checked in by vboxsync, 12 years ago
32-bit burn fixes.
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1	/* $Id: DevLsiLogicSCSI.h 45795 2013-04-28 22:16:52Z vboxsync $ */
2	/** @file
3	* VBox storage devices: LsiLogic LSI53c1030 SCSI controller - Defines and structures.
4	*/
5
6	/*
7	* Copyright (C) 2006-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17	#ifndef __DEVLSILOGICSCSI_H__
18	#define __DEVLSILOGICSCSI_H__
19
20	#include <iprt/stdint.h>
21
22	/*
23	* Custom fixed I/O ports for BIOS controller access. Note that these should
24	* not be in the ISA range (below 400h) to avoid conflicts with ISA device
25	* probing. Addresses in the 300h-340h range should be especially avoided.
26	*/
27	#define LSILOGIC_BIOS_IO_PORT 0x434
28	#define LSILOGIC_SAS_BIOS_IO_PORT 0x438
29
30	#define LSILOGICSCSI_REQUEST_QUEUE_DEPTH_DEFAULT 256
31	#define LSILOGICSCSI_REPLY_QUEUE_DEPTH_DEFAULT 256
32
33	#define LSILOGICSCSI_MAXIMUM_CHAIN_DEPTH 3
34
35	#define LSILOGIC_NR_OF_ALLOWED_BIGGER_LISTS 100
36
37	/** Equal for all devices */
38	#define LSILOGICSCSI_PCI_VENDOR_ID (0x1000)
39
40	/** SPI SCSI controller (LSI53C1030) */
41	#define LSILOGICSCSI_PCI_SPI_CTRLNAME "LSI53C1030"
42	#define LSILOGICSCSI_PCI_SPI_DEVICE_ID (0x0030)
43	#define LSILOGICSCSI_PCI_SPI_REVISION_ID (0x00)
44	#define LSILOGICSCSI_PCI_SPI_CLASS_CODE (0x01)
45	#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_VENDOR_ID (0x1000)
46	#define LSILOGICSCSI_PCI_SPI_SUBSYSTEM_ID (0x8000)
47	#define LSILOGICSCSI_PCI_SPI_PORTS_MAX 1
48	#define LSILOGICSCSI_PCI_SPI_BUSES_MAX 1
49	#define LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX 16
50	#define LSILOGICSCSI_PCI_SPI_DEVICES_MAX (LSILOGICSCSI_PCI_SPI_BUSES_MAX*LSILOGICSCSI_PCI_SPI_DEVICES_PER_BUS_MAX)
51
52	/** SAS SCSI controller (SAS1068 PCI-X Fusion-MPT SAS) */
53	#define LSILOGICSCSI_PCI_SAS_CTRLNAME "SAS1068"
54	#define LSILOGICSCSI_PCI_SAS_DEVICE_ID (0x0054)
55	#define LSILOGICSCSI_PCI_SAS_REVISION_ID (0x00)
56	#define LSILOGICSCSI_PCI_SAS_CLASS_CODE (0x00)
57	#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_VENDOR_ID (0x1000)
58	#define LSILOGICSCSI_PCI_SAS_SUBSYSTEM_ID (0x8000)
59	#define LSILOGICSCSI_PCI_SAS_PORTS_MAX 256
60	#define LSILOGICSCSI_PCI_SAS_PORTS_DEFAULT 8
61	#define LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX 1
62	#define LSILOGICSCSI_PCI_SAS_DEVICES_MAX (LSILOGICSCSI_PCI_SAS_PORTS_MAX * LSILOGICSCSI_PCI_SAS_DEVICES_PER_PORT_MAX)
63
64	/**
65	* A SAS address.
66	*/
67	#pragma pack(1)
68	typedef union SASADDRESS
69	{
70	/** 64bit view. */
71	uint64_t u64Address;
72	/** 32bit view. */
73	uint32_t u32Address[2];
74	/** 16bit view. */
75	uint16_t u16Address[4];
76	/** Byte view. */
77	uint8_t u8Address[8];
78	} SASADDRESS, *PSASADDRESS;
79	#pragma pack()
80	AssertCompileSize(SASADDRESS, 8);
81
82	/**
83	* Possible device types we support.
84	*/
85	typedef enum LSILOGICCTRLTYPE
86	{
87	/** SPI SCSI controller (PCI dev id 0x0030) */
88	LSILOGICCTRLTYPE_SCSI_SPI = 0,
89	/** SAS SCSI controller (PCI dev id 0x0054) */
90	LSILOGICCTRLTYPE_SCSI_SAS = 1,
91	/** 32bit hack */
92	LSILOGICCTRLTYPE_32BIT_HACK = 0x7fffffff
93	} LSILOGICCTRLTYPE, *PLSILOGICCTRLTYPE;
94
95	/**
96	* A simple SG element for a 64bit address.
97	*/
98	#pragma pack(1)
99	typedef struct MptSGEntrySimple64
100	{
101	/** Length of the buffer this entry describes. */
102	unsigned u24Length: 24;
103	/** Flag whether this element is the end of the list. */
104	unsigned fEndOfList: 1;
105	/** Flag whether the address is 32bit or 64bits wide. */
106	unsigned f64BitAddress: 1;
107	/** Flag whether this buffer contains data to be transferred or is the destination. */
108	unsigned fBufferContainsData: 1;
109	/** Flag whether this is a local address or a system address. */
110	unsigned fLocalAddress: 1;
111	/** Element type. */
112	unsigned u2ElementType: 2;
113	/** Flag whether this is the last element of the buffer. */
114	unsigned fEndOfBuffer: 1;
115	/** Flag whether this is the last element of the current segment. */
116	unsigned fLastElement: 1;
117	/** Lower 32bits of the address of the data buffer. */
118	unsigned u32DataBufferAddressLow: 32;
119	/** Upper 32bits of the address of the data buffer. */
120	unsigned u32DataBufferAddressHigh: 32;
121	} MptSGEntrySimple64, *PMptSGEntrySimple64;
122	#pragma pack()
123	AssertCompileSize(MptSGEntrySimple64, 12);
124
125	/**
126	* A simple SG element for a 32bit address.
127	*/
128	#pragma pack(1)
129	typedef struct MptSGEntrySimple32
130	{
131	/** Length of the buffer this entry describes. */
132	unsigned u24Length: 24;
133	/** Flag whether this element is the end of the list. */
134	unsigned fEndOfList: 1;
135	/** Flag whether the address is 32bit or 64bits wide. */
136	unsigned f64BitAddress: 1;
137	/** Flag whether this buffer contains data to be transferred or is the destination. */
138	unsigned fBufferContainsData: 1;
139	/** Flag whether this is a local address or a system address. */
140	unsigned fLocalAddress: 1;
141	/** Element type. */
142	unsigned u2ElementType: 2;
143	/** Flag whether this is the last element of the buffer. */
144	unsigned fEndOfBuffer: 1;
145	/** Flag whether this is the last element of the current segment. */
146	unsigned fLastElement: 1;
147	/** Lower 32bits of the address of the data buffer. */
148	unsigned u32DataBufferAddressLow: 32;
149	} MptSGEntrySimple32, *PMptSGEntrySimple32;
150	#pragma pack()
151	AssertCompileSize(MptSGEntrySimple32, 8);
152
153	/**
154	* A chain SG element.
155	*/
156	#pragma pack(1)
157	typedef struct MptSGEntryChain
158	{
159	/** Size of the segment. */
160	unsigned u16Length: 16;
161	/** Offset in 32bit words of the next chain element in the segment
162	* identified by this element. */
163	unsigned u8NextChainOffset: 8;
164	/** Reserved. */
165	unsigned fReserved0: 1;
166	/** Flag whether the address is 32bit or 64bits wide. */
167	unsigned f64BitAddress: 1;
168	/** Reserved. */
169	unsigned fReserved1: 1;
170	/** Flag whether this is a local address or a system address. */
171	unsigned fLocalAddress: 1;
172	/** Element type. */
173	unsigned u2ElementType: 2;
174	/** Flag whether this is the last element of the buffer. */
175	unsigned u2Reserved2: 2;
176	/** Lower 32bits of the address of the data buffer. */
177	unsigned u32SegmentAddressLow: 32;
178	/** Upper 32bits of the address of the data buffer. */
179	unsigned u32SegmentAddressHigh: 32;
180	} MptSGEntryChain, *PMptSGEntryChain;
181	#pragma pack()
182	AssertCompileSize(MptSGEntryChain, 12);
183
184	typedef union MptSGEntryUnion
185	{
186	MptSGEntrySimple64 Simple64;
187	MptSGEntrySimple32 Simple32;
188	MptSGEntryChain Chain;
189	} MptSGEntryUnion, *PMptSGEntryUnion;
190
191	/**
192	* MPT Fusion message header - Common for all message frames.
193	* This is filled in by the guest.
194	*/
195	#pragma pack(1)
196	typedef struct MptMessageHdr
197	{
198	/** Function dependent data. */
199	uint16_t u16FunctionDependent;
200	/** Chain offset. */
201	uint8_t u8ChainOffset;
202	/** The function code. */
203	uint8_t u8Function;
204	/** Function dependent data. */
205	uint8_t au8FunctionDependent[3];
206	/** Message flags. */
207	uint8_t u8MessageFlags;
208	/** Message context - Unique ID from the guest unmodified by the device. */
209	uint32_t u32MessageContext;
210	} MptMessageHdr, *PMptMessageHdr;
211	#pragma pack()
212	AssertCompileSize(MptMessageHdr, 12);
213
214	/** Defined function codes found in the message header. */
215	#define MPT_MESSAGE_HDR_FUNCTION_SCSI_IO_REQUEST (0x00)
216	#define MPT_MESSAGE_HDR_FUNCTION_SCSI_TASK_MGMT (0x01)
217	#define MPT_MESSAGE_HDR_FUNCTION_IOC_INIT (0x02)
218	#define MPT_MESSAGE_HDR_FUNCTION_IOC_FACTS (0x03)
219	#define MPT_MESSAGE_HDR_FUNCTION_CONFIG (0x04)
220	#define MPT_MESSAGE_HDR_FUNCTION_PORT_FACTS (0x05)
221	#define MPT_MESSAGE_HDR_FUNCTION_PORT_ENABLE (0x06)
222	#define MPT_MESSAGE_HDR_FUNCTION_EVENT_NOTIFICATION (0x07)
223	#define MPT_MESSAGE_HDR_FUNCTION_EVENT_ACK (0x08)
224	#define MPT_MESSAGE_HDR_FUNCTION_FW_DOWNLOAD (0x09)
225	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_CMD_BUFFER_POST (0x0A)
226	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_ASSIST (0x0B)
227	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_STATUS_SEND (0x0C)
228	#define MPT_MESSAGE_HDR_FUNCTION_TARGET_MODE_ABORT (0x0D)
229	#define MPT_MESSAGE_HDR_FUNCTION_FW_UPLOAD (0x12)
230
231	#ifdef DEBUG
232	/**
233	* Function names
234	*/
235	static const char * const g_apszMPTFunctionNames[] =
236	{
237	"SCSI I/O Request",
238	"SCSI Task Management",
239	"IOC Init",
240	"IOC Facts",
241	"Config",
242	"Port Facts",
243	"Port Enable",
244	"Event Notification",
245	"Event Ack",
246	"Firmware Download"
247	};
248	#endif
249
250	/**
251	* Default reply message.
252	* Send from the device to the guest upon completion of a request.
253	*/
254	#pragma pack(1)
255	typedef struct MptDefaultReplyMessage
256	{
257	/** Function dependent data. */
258	uint16_t u16FunctionDependent;
259	/** Length of the message in 32bit DWords. */
260	uint8_t u8MessageLength;
261	/** Function which completed. */
262	uint8_t u8Function;
263	/** Function dependent. */
264	uint8_t au8FunctionDependent[3];
265	/** Message flags. */
266	uint8_t u8MessageFlags;
267	/** Message context given in the request. */
268	uint32_t u32MessageContext;
269	/** Function dependent status code. */
270	uint16_t u16FunctionDependentStatus;
271	/** Status of the IOC. */
272	uint16_t u16IOCStatus;
273	/** Additional log info. */
274	uint32_t u32IOCLogInfo;
275	} MptDefaultReplyMessage, *PMptDefaultReplyMessage;
276	#pragma pack()
277	AssertCompileSize(MptDefaultReplyMessage, 20);
278
279	/**
280	* IO controller init request.
281	*/
282	#pragma pack(1)
283	typedef struct MptIOCInitRequest
284	{
285	/** Which system send this init request. */
286	uint8_t u8WhoInit;
287	/** Reserved */
288	uint8_t u8Reserved;
289	/** Chain offset in the SG list. */
290	uint8_t u8ChainOffset;
291	/** Function to execute. */
292	uint8_t u8Function;
293	/** Flags */
294	uint8_t u8Flags;
295	/** Maximum number of devices the driver can handle. */
296	uint8_t u8MaxDevices;
297	/** Maximum number of buses the driver can handle. */
298	uint8_t u8MaxBuses;
299	/** Message flags. */
300	uint8_t u8MessageFlags;
301	/** Message context ID. */
302	uint32_t u32MessageContext;
303	/** Reply frame size. */
304	uint16_t u16ReplyFrameSize;
305	/** Reserved */
306	uint16_t u16Reserved;
307	/** Upper 32bit part of the 64bit address the message frames are in.
308	* That means all frames must be in the same 4GB segment. */
309	uint32_t u32HostMfaHighAddr;
310	/** Upper 32bit of the sense buffer. */
311	uint32_t u32SenseBufferHighAddr;
312	} MptIOCInitRequest, *PMptIOCInitRequest;
313	#pragma pack()
314	AssertCompileSize(MptIOCInitRequest, 24);
315
316	/**
317	* IO controller init reply.
318	*/
319	#pragma pack(1)
320	typedef struct MptIOCInitReply
321	{
322	/** Which subsystem send this init request. */
323	uint8_t u8WhoInit;
324	/** Reserved */
325	uint8_t u8Reserved;
326	/** Message length */
327	uint8_t u8MessageLength;
328	/** Function. */
329	uint8_t u8Function;
330	/** Flags */
331	uint8_t u8Flags;
332	/** Maximum number of devices the driver can handle. */
333	uint8_t u8MaxDevices;
334	/** Maximum number of busses the driver can handle. */
335	uint8_t u8MaxBuses;
336	/** Message flags. */
337	uint8_t u8MessageFlags;
338	/** Message context ID */
339	uint32_t u32MessageContext;
340	/** Reserved */
341	uint16_t u16Reserved;
342	/** IO controller status. */
343	uint16_t u16IOCStatus;
344	/** IO controller log information. */
345	uint32_t u32IOCLogInfo;
346	} MptIOCInitReply, *PMptIOCInitReply;
347	#pragma pack()
348	AssertCompileSize(MptIOCInitReply, 20);
349
350	/**
351	* IO controller facts request.
352	*/
353	#pragma pack(1)
354	typedef struct MptIOCFactsRequest
355	{
356	/** Reserved. */
357	uint16_t u16Reserved;
358	/** Chain offset in SG list. */
359	uint8_t u8ChainOffset;
360	/** Function number. */
361	uint8_t u8Function;
362	/** Reserved */
363	uint8_t u8Reserved[3];
364	/** Message flags. */
365	uint8_t u8MessageFlags;
366	/** Message context ID. */
367	uint32_t u32MessageContext;
368	} MptIOCFactsRequest, *PMptIOCFactsRequest;
369	#pragma pack()
370	AssertCompileSize(MptIOCFactsRequest, 12);
371
372	/**
373	* IO controller facts reply.
374	*/
375	#pragma pack(1)
376	typedef struct MptIOCFactsReply
377	{
378	/** Message version. */
379	uint16_t u16MessageVersion;
380	/** Message length. */
381	uint8_t u8MessageLength;
382	/** Function number. */
383	uint8_t u8Function;
384	/** Reserved */
385	uint16_t u16Reserved1;
386	/** IO controller number */
387	uint8_t u8IOCNumber;
388	/** Message flags. */
389	uint8_t u8MessageFlags;
390	/** Message context ID. */
391	uint32_t u32MessageContext;
392	/** IO controller exceptions */
393	uint16_t u16IOCExceptions;
394	/** IO controller status. */
395	uint16_t u16IOCStatus;
396	/** IO controller log information. */
397	uint32_t u32IOCLogInfo;
398	/** Maximum chain depth. */
399	uint8_t u8MaxChainDepth;
400	/** The current value of the WhoInit field. */
401	uint8_t u8WhoInit;
402	/** Block size. */
403	uint8_t u8BlockSize;
404	/** Flags. */
405	uint8_t u8Flags;
406	/** Depth of the reply queue. */
407	uint16_t u16ReplyQueueDepth;
408	/** Size of a request frame. */
409	uint16_t u16RequestFrameSize;
410	/** Reserved */
411	uint16_t u16Reserved2;
412	/** Product ID. */
413	uint16_t u16ProductID;
414	/** Current value of the high 32bit MFA address. */
415	uint32_t u32CurrentHostMFAHighAddr;
416	/** Global credits - Number of entries allocated to queues */
417	uint16_t u16GlobalCredits;
418	/** Number of ports on the IO controller */
419	uint8_t u8NumberOfPorts;
420	/** Event state. */
421	uint8_t u8EventState;
422	/** Current value of the high 32bit sense buffer address. */
423	uint32_t u32CurrentSenseBufferHighAddr;
424	/** Current reply frame size. */
425	uint16_t u16CurReplyFrameSize;
426	/** Maximum number of devices. */
427	uint8_t u8MaxDevices;
428	/** Maximum number of buses. */
429	uint8_t u8MaxBuses;
430	/** Size of the firmware image. */
431	uint32_t u32FwImageSize;
432	/** Reserved. */
433	uint32_t u32Reserved;
434	/** Firmware version */
435	uint32_t u32FWVersion;
436	} MptIOCFactsReply, *PMptIOCFactsReply;
437	#pragma pack()
438	AssertCompileSize(MptIOCFactsReply, 60);
439
440	/**
441	* Port facts request
442	*/
443	#pragma pack(1)
444	typedef struct MptPortFactsRequest
445	{
446	/** Reserved */
447	uint16_t u16Reserved1;
448	/** Message length. */
449	uint8_t u8MessageLength;
450	/** Function number. */
451	uint8_t u8Function;
452	/** Reserved */
453	uint16_t u16Reserved2;
454	/** Port number to get facts for. */
455	uint8_t u8PortNumber;
456	/** Message flags. */
457	uint8_t u8MessageFlags;
458	/** Message context ID. */
459	uint32_t u32MessageContext;
460	} MptPortFactsRequest, *PMptPortFactsRequest;
461	#pragma pack()
462	AssertCompileSize(MptPortFactsRequest, 12);
463
464	/**
465	* Port facts reply.
466	*/
467	#pragma pack(1)
468	typedef struct MptPortFactsReply
469	{
470	/** Reserved. */
471	uint16_t u16Reserved1;
472	/** Message length. */
473	uint8_t u8MessageLength;
474	/** Function number. */
475	uint8_t u8Function;
476	/** Reserved */
477	uint16_t u16Reserved2;
478	/** Port number the facts are for. */
479	uint8_t u8PortNumber;
480	/** Message flags. */
481	uint8_t u8MessageFlags;
482	/** Message context ID. */
483	uint32_t u32MessageContext;
484	/** Reserved. */
485	uint16_t u16Reserved3;
486	/** IO controller status. */
487	uint16_t u16IOCStatus;
488	/** IO controller log information. */
489	uint32_t u32IOCLogInfo;
490	/** Reserved */
491	uint8_t u8Reserved;
492	/** Port type */
493	uint8_t u8PortType;
494	/** Maximum number of devices on this port. */
495	uint16_t u16MaxDevices;
496	/** SCSI ID of this port on the attached bus. */
497	uint16_t u16PortSCSIID;
498	/** Protocol flags. */
499	uint16_t u16ProtocolFlags;
500	/** Maximum number of target command buffers which can be posted to this port at a time. */
501	uint16_t u16MaxPostedCmdBuffers;
502	/** Maximum number of target IDs that remain persistent between power/reset cycles. */
503	uint16_t u16MaxPersistentIDs;
504	/** Maximum number of LAN buckets. */
505	uint16_t u16MaxLANBuckets;
506	/** Reserved. */
507	uint16_t u16Reserved4;
508	/** Reserved. */
509	uint32_t u32Reserved;
510	} MptPortFactsReply, *PMptPortFactsReply;
511	#pragma pack()
512	AssertCompileSize(MptPortFactsReply, 40);
513
514	/**
515	* Port Enable request.
516	*/
517	#pragma pack(1)
518	typedef struct MptPortEnableRequest
519	{
520	/** Reserved. */
521	uint16_t u16Reserved1;
522	/** Message length. */
523	uint8_t u8MessageLength;
524	/** Function number. */
525	uint8_t u8Function;
526	/** Reserved. */
527	uint16_t u16Reserved2;
528	/** Port number to enable. */
529	uint8_t u8PortNumber;
530	/** Message flags. */
531	uint8_t u8MessageFlags;
532	/** Message context ID. */
533	uint32_t u32MessageContext;
534	} MptPortEnableRequest, *PMptPortEnableRequest;
535	#pragma pack()
536	AssertCompileSize(MptPortEnableRequest, 12);
537
538	/**
539	* Port enable reply.
540	*/
541	#pragma pack(1)
542	typedef struct MptPortEnableReply
543	{
544	/** Reserved. */
545	uint16_t u16Reserved1;
546	/** Message length. */
547	uint8_t u8MessageLength;
548	/** Function number. */
549	uint8_t u8Function;
550	/** Reserved */
551	uint16_t u16Reserved2;
552	/** Port number which was enabled. */
553	uint8_t u8PortNumber;
554	/** Message flags. */
555	uint8_t u8MessageFlags;
556	/** Message context ID. */
557	uint32_t u32MessageContext;
558	/** Reserved. */
559	uint16_t u16Reserved3;
560	/** IO controller status */
561	uint16_t u16IOCStatus;
562	/** IO controller log information. */
563	uint32_t u32IOCLogInfo;
564	} MptPortEnableReply, *PMptPortEnableReply;
565	#pragma pack()
566	AssertCompileSize(MptPortEnableReply, 20);
567
568	/**
569	* Event notification request.
570	*/
571	#pragma pack(1)
572	typedef struct MptEventNotificationRequest
573	{
574	/** Switch - Turns event notification on and off. */
575	uint8_t u8Switch;
576	/** Reserved. */
577	uint8_t u8Reserved1;
578	/** Chain offset. */
579	uint8_t u8ChainOffset;
580	/** Function number. */
581	uint8_t u8Function;
582	/** Reserved. */
583	uint8_t u8reserved2[3];
584	/** Message flags. */
585	uint8_t u8MessageFlags;
586	/** Message context ID. */
587	uint32_t u32MessageContext;
588	} MptEventNotificationRequest, *PMptEventNotificationRequest;
589	#pragma pack()
590	AssertCompileSize(MptEventNotificationRequest, 12);
591
592	/**
593	* Event notification reply.
594	*/
595	#pragma pack(1)
596	typedef struct MptEventNotificationReply
597	{
598	/** Event data length. */
599	uint16_t u16EventDataLength;
600	/** Message length. */
601	uint8_t u8MessageLength;
602	/** Function number. */
603	uint8_t u8Function;
604	/** Reserved. */
605	uint16_t u16Reserved1;
606	/** Ack required. */
607	uint8_t u8AckRequired;
608	/** Message flags. */
609	uint8_t u8MessageFlags;
610	/** Message context ID. */
611	uint32_t u32MessageContext;
612	/** Reserved. */
613	uint16_t u16Reserved2;
614	/** IO controller status. */
615	uint16_t u16IOCStatus;
616	/** IO controller log information. */
617	uint32_t u32IOCLogInfo;
618	/** Notification event. */
619	uint32_t u32Event;
620	/** Event context. */
621	uint32_t u32EventContext;
622	/** Event data. */
623	uint32_t u32EventData;
624	} MptEventNotificationReply, *PMptEventNotificationReply;
625	#pragma pack()
626	AssertCompileSize(MptEventNotificationReply, 32);
627
628	#define MPT_EVENT_EVENT_CHANGE (0x0000000a)
629
630	/**
631	* FW download request.
632	*/
633	#pragma pack(1)
634	typedef struct MptFWDownloadRequest
635	{
636	/** Switch - Turns event notification on and off. */
637	uint8_t u8ImageType;
638	/** Reserved. */
639	uint8_t u8Reserved1;
640	/** Chain offset. */
641	uint8_t u8ChainOffset;
642	/** Function number. */
643	uint8_t u8Function;
644	/** Reserved. */
645	uint8_t u8Reserved2[3];
646	/** Message flags. */
647	uint8_t u8MessageFlags;
648	/** Message context ID. */
649	uint32_t u32MessageContext;
650	} MptFWDownloadRequest, *PMptFWDownloadRequest;
651	#pragma pack()
652	AssertCompileSize(MptFWDownloadRequest, 12);
653
654	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_RESERVED 0
655	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_FIRMWARE 1
656	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_MPI_BIOS 2
657	#define MPT_FW_DOWNLOAD_REQUEST_IMAGE_TYPE_NVDATA 3
658
659	/**
660	* FW download reply.
661	*/
662	#pragma pack(1)
663	typedef struct MptFWDownloadReply
664	{
665	/** Reserved. */
666	uint16_t u16Reserved1;
667	/** Message length. */
668	uint8_t u8MessageLength;
669	/** Function number. */
670	uint8_t u8Function;
671	/** Reserved. */
672	uint8_t u8Reserved2[3];
673	/** Message flags. */
674	uint8_t u8MessageFlags;
675	/** Message context ID. */
676	uint32_t u32MessageContext;
677	/** Reserved. */
678	uint16_t u16Reserved2;
679	/** IO controller status. */
680	uint16_t u16IOCStatus;
681	/** IO controller log information. */
682	uint32_t u32IOCLogInfo;
683	} MptFWDownloadReply, *PMptFWDownloadReply;
684	#pragma pack()
685	AssertCompileSize(MptFWDownloadReply, 20);
686
687	/**
688	* FW upload request.
689	*/
690	#pragma pack(1)
691	typedef struct MptFWUploadRequest
692	{
693	/** Requested image type. */
694	uint8_t u8ImageType;
695	/** Reserved. */
696	uint8_t u8Reserved1;
697	/** Chain offset. */
698	uint8_t u8ChainOffset;
699	/** Function number. */
700	uint8_t u8Function;
701	/** Reserved. */
702	uint8_t u8Reserved2[3];
703	/** Message flags. */
704	uint8_t u8MessageFlags;
705	/** Message context ID. */
706	uint32_t u32MessageContext;
707	} MptFWUploadRequest, *PMptFWUploadRequest;
708	#pragma pack()
709	AssertCompileSize(MptFWUploadRequest, 12);
710
711	/**
712	* FW upload reply.
713	*/
714	#pragma pack(1)
715	typedef struct MptFWUploadReply
716	{
717	/** Image type. */
718	uint8_t u8ImageType;
719	/** Reserved. */
720	uint8_t u8Reserved1;
721	/** Message length. */
722	uint8_t u8MessageLength;
723	/** Function number. */
724	uint8_t u8Function;
725	/** Reserved. */
726	uint8_t u8Reserved2[3];
727	/** Message flags. */
728	uint8_t u8MessageFlags;
729	/** Message context ID. */
730	uint32_t u32MessageContext;
731	/** Reserved. */
732	uint16_t u16Reserved2;
733	/** IO controller status. */
734	uint16_t u16IOCStatus;
735	/** IO controller log information. */
736	uint32_t u32IOCLogInfo;
737	/** Uploaded image size. */
738	uint32_t u32ActualImageSize;
739	} MptFWUploadReply, *PMptFWUploadReply;
740	#pragma pack()
741	AssertCompileSize(MptFWUploadReply, 24);
742
743	/**
744	* SCSI IO Request
745	*/
746	#pragma pack(1)
747	typedef struct MptSCSIIORequest
748	{
749	/** Target ID */
750	uint8_t u8TargetID;
751	/** Bus number */
752	uint8_t u8Bus;
753	/** Chain offset */
754	uint8_t u8ChainOffset;
755	/** Function number. */
756	uint8_t u8Function;
757	/** CDB length. */
758	uint8_t u8CDBLength;
759	/** Sense buffer length. */
760	uint8_t u8SenseBufferLength;
761	/** Reserved */
762	uint8_t u8Reserved;
763	/** Message flags. */
764	uint8_t u8MessageFlags;
765	/** Message context ID. */
766	uint32_t u32MessageContext;
767	/** LUN */
768	uint8_t au8LUN[8];
769	/** Control values. */
770	uint32_t u32Control;
771	/** The CDB. */
772	uint8_t au8CDB[16];
773	/** Data length. */
774	uint32_t u32DataLength;
775	/** Sense buffer low 32bit address. */
776	uint32_t u32SenseBufferLowAddress;
777	} MptSCSIIORequest, *PMptSCSIIORequest;
778	#pragma pack()
779	AssertCompileSize(MptSCSIIORequest, 48);
780
781	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_GET(x) (((x) & 0x3000000) >> 24)
782	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_NONE (0x0)
783	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_WRITE (0x1)
784	#define MPT_SCSIIO_REQUEST_CONTROL_TXDIR_READ (0x2)
785
786	/**
787	* SCSI IO error reply.
788	*/
789	#pragma pack(1)
790	typedef struct MptSCSIIOErrorReply
791	{
792	/** Target ID */
793	uint8_t u8TargetID;
794	/** Bus number */
795	uint8_t u8Bus;
796	/** Message length. */
797	uint8_t u8MessageLength;
798	/** Function number. */
799	uint8_t u8Function;
800	/** CDB length */
801	uint8_t u8CDBLength;
802	/** Sense buffer length */
803	uint8_t u8SenseBufferLength;
804	/** Reserved */
805	uint8_t u8Reserved;
806	/** Message flags */
807	uint8_t u8MessageFlags;
808	/** Message context ID */
809	uint32_t u32MessageContext;
810	/** SCSI status. */
811	uint8_t u8SCSIStatus;
812	/** SCSI state */
813	uint8_t u8SCSIState;
814	/** IO controller status */
815	uint16_t u16IOCStatus;
816	/** IO controller log information */
817	uint32_t u32IOCLogInfo;
818	/** Transfer count */
819	uint32_t u32TransferCount;
820	/** Sense count */
821	uint32_t u32SenseCount;
822	/** Response information */
823	uint32_t u32ResponseInfo;
824	} MptSCSIIOErrorReply, *PMptSCSIIOErrorReply;
825	#pragma pack()
826	AssertCompileSize(MptSCSIIOErrorReply, 32);
827
828	#define MPT_SCSI_IO_ERROR_SCSI_STATE_AUTOSENSE_VALID (0x01)
829	#define MPT_SCSI_IO_ERROR_SCSI_STATE_TERMINATED (0x08)
830
831	/**
832	* IOC status codes specific to the SCSI I/O error reply.
833	*/
834	#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_BUS (0x0041)
835	#define MPT_SCSI_IO_ERROR_IOCSTATUS_INVALID_TARGETID (0x0042)
836	#define MPT_SCSI_IO_ERROR_IOCSTATUS_DEVICE_NOT_THERE (0x0043)
837
838	/**
839	* SCSI task management request.
840	*/
841	#pragma pack(1)
842	typedef struct MptSCSITaskManagementRequest
843	{
844	/** Target ID */
845	uint8_t u8TargetID;
846	/** Bus number */
847	uint8_t u8Bus;
848	/** Chain offset */
849	uint8_t u8ChainOffset;
850	/** Function number */
851	uint8_t u8Function;
852	/** Reserved */
853	uint8_t u8Reserved1;
854	/** Task type */
855	uint8_t u8TaskType;
856	/** Reserved */
857	uint8_t u8Reserved2;
858	/** Message flags */
859	uint8_t u8MessageFlags;
860	/** Message context ID */
861	uint32_t u32MessageContext;
862	/** LUN */
863	uint8_t au8LUN[8];
864	/** Reserved */
865	uint8_t auReserved[28];
866	/** Task message context ID. */
867	uint32_t u32TaskMessageContext;
868	} MptSCSITaskManagementRequest, *PMptSCSITaskManagementRequest;
869	#pragma pack()
870	AssertCompileSize(MptSCSITaskManagementRequest, 52);
871
872	/**
873	* SCSI task management reply.
874	*/
875	#pragma pack(1)
876	typedef struct MptSCSITaskManagementReply
877	{
878	/** Target ID */
879	uint8_t u8TargetID;
880	/** Bus number */
881	uint8_t u8Bus;
882	/** Message length */
883	uint8_t u8MessageLength;
884	/** Function number */
885	uint8_t u8Function;
886	/** Reserved */
887	uint8_t u8Reserved1;
888	/** Task type */
889	uint8_t u8TaskType;
890	/** Reserved */
891	uint8_t u8Reserved2;
892	/** Message flags */
893	uint8_t u8MessageFlags;
894	/** Message context ID */
895	uint32_t u32MessageContext;
896	/** Reserved */
897	uint16_t u16Reserved;
898	/** IO controller status */
899	uint16_t u16IOCStatus;
900	/** IO controller log information */
901	uint32_t u32IOCLogInfo;
902	/** Termination count */
903	uint32_t u32TerminationCount;
904	} MptSCSITaskManagementReply, *PMptSCSITaskManagementReply;
905	#pragma pack()
906	AssertCompileSize(MptSCSITaskManagementReply, 24);
907
908	/**
909	* Page address for SAS expander page types.
910	*/
911	#pragma pack(1)
912	typedef union MptConfigurationPageAddressSASExpander
913	{
914	struct
915	{
916	uint16_t u16Handle;
917	uint16_t u16Reserved;
918	} Form0And2;
919	struct
920	{
921	uint16_t u16Handle;
922	uint8_t u8PhyNum;
923	uint8_t u8Reserved;
924	} Form1;
925	} MptConfigurationPageAddressSASExpander, *PMptConfigurationPageAddressSASExpander;
926	#pragma pack()
927
928	/**
929	* Page address for SAS device page types.
930	*/
931	#pragma pack(1)
932	typedef union MptConfigurationPageAddressSASDevice
933	{
934	struct
935	{
936	uint16_t u16Handle;
937	uint16_t u16Reserved;
938	} Form0And2;
939	struct
940	{
941	uint8_t u8TargetID;
942	uint8_t u8Bus;
943	uint8_t u8Reserved;
944	} Form1;
945	} MptConfigurationPageAddressSASDevice, *PMptConfigurationPageAddressSASDevice;
946	#pragma pack()
947
948	/**
949	* Page address for SAS PHY page types.
950	*/
951	#pragma pack(1)
952	typedef union MptConfigurationPageAddressSASPHY
953	{
954	struct
955	{
956	uint8_t u8PhyNumber;
957	uint8_t u8Reserved[3];
958	} Form0;
959	struct
960	{
961	uint16_t u16Index;
962	uint16_t u16Reserved;
963	} Form1;
964	} MptConfigurationPageAddressSASPHY, *PMptConfigurationPageAddressSASPHY;
965	#pragma pack()
966
967	/**
968	* Page address for SAS Enclosure page types.
969	*/
970	#pragma pack(1)
971	typedef struct MptConfigurationPageAddressSASEnclosure
972	{
973	uint16_t u16Handle;
974	uint16_t u16Reserved;
975	} MptConfigurationPageAddressSASEnclosure, *PMptConfigurationPageAddressSASEnclosure;
976	#pragma pack()
977
978	/**
979	* Union of all possible address types.
980	*/
981	#pragma pack(1)
982	typedef union MptConfigurationPageAddress
983	{
984	/** 32bit view. */
985	uint32_t u32PageAddress;
986	struct
987	{
988	/** Port number to get the configuration page for. */
989	uint8_t u8PortNumber;
990	/** Reserved. */
991	uint8_t u8Reserved[3];
992	} MPIPortNumber;
993	struct
994	{
995	/** Target ID to get the configuration page for. */
996	uint8_t u8TargetID;
997	/** Bus number to get the configuration page for. */
998	uint8_t u8Bus;
999	/** Reserved. */
1000	uint8_t u8Reserved[2];
1001	} BusAndTargetId;
1002	MptConfigurationPageAddressSASExpander SASExpander;
1003	MptConfigurationPageAddressSASDevice SASDevice;
1004	MptConfigurationPageAddressSASPHY SASPHY;
1005	MptConfigurationPageAddressSASEnclosure SASEnclosure;
1006	} MptConfigurationPageAddress, *PMptConfigurationPageAddress;
1007	#pragma pack()
1008	AssertCompileSize(MptConfigurationPageAddress, 4);
1009
1010	#define MPT_CONFIGURATION_PAGE_ADDRESS_GET_SAS_FORM(x) (((x).u32PageAddress >> 28) & 0x0f)
1011
1012	/**
1013	* Configuration request
1014	*/
1015	#pragma pack(1)
1016	typedef struct MptConfigurationRequest
1017	{
1018	/** Action code. */
1019	uint8_t u8Action;
1020	/** Reserved. */
1021	uint8_t u8Reserved1;
1022	/** Chain offset. */
1023	uint8_t u8ChainOffset;
1024	/** Function number. */
1025	uint8_t u8Function;
1026	/** Extended page length. */
1027	uint16_t u16ExtPageLength;
1028	/** Extended page type */
1029	uint8_t u8ExtPageType;
1030	/** Message flags. */
1031	uint8_t u8MessageFlags;
1032	/** Message context ID. */
1033	uint32_t u32MessageContext;
1034	/** Reserved. */
1035	uint8_t u8Reserved2[8];
1036	/** Version number of the page. */
1037	uint8_t u8PageVersion;
1038	/** Length of the page in 32bit Dwords. */
1039	uint8_t u8PageLength;
1040	/** Page number to access. */
1041	uint8_t u8PageNumber;
1042	/** Type of the page being accessed. */
1043	uint8_t u8PageType;
1044	/** Page type dependent address. */
1045	MptConfigurationPageAddress PageAddress;
1046	/** Simple SG element describing the buffer. */
1047	MptSGEntrySimple64 SimpleSGElement;
1048	} MptConfigurationRequest, *PMptConfigurationRequest;
1049	#pragma pack()
1050	AssertCompileSize(MptConfigurationRequest, 40);
1051
1052	/** Possible action codes. */
1053	#define MPT_CONFIGURATION_REQUEST_ACTION_HEADER (0x00)
1054	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_CURRENT (0x01)
1055	#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_CURRENT (0x02)
1056	#define MPT_CONFIGURATION_REQUEST_ACTION_DEFAULT (0x03)
1057	#define MPT_CONFIGURATION_REQUEST_ACTION_WRITE_NVRAM (0x04)
1058	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_DEFAULT (0x05)
1059	#define MPT_CONFIGURATION_REQUEST_ACTION_READ_NVRAM (0x06)
1060
1061	/** Page type codes. */
1062	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IO_UNIT (0x00)
1063	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_IOC (0x01)
1064	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_BIOS (0x02)
1065	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_SCSI_PORT (0x03)
1066	#define MPT_CONFIGURATION_REQUEST_PAGE_TYPE_EXTENDED (0x0F)
1067
1068	/**
1069	* Configuration reply.
1070	*/
1071	#pragma pack(1)
1072	typedef struct MptConfigurationReply
1073	{
1074	/** Action code. */
1075	uint8_t u8Action;
1076	/** Reserved. */
1077	uint8_t u8Reserved;
1078	/** Message length. */
1079	uint8_t u8MessageLength;
1080	/** Function number. */
1081	uint8_t u8Function;
1082	/** Extended page length. */
1083	uint16_t u16ExtPageLength;
1084	/** Extended page type */
1085	uint8_t u8ExtPageType;
1086	/** Message flags. */
1087	uint8_t u8MessageFlags;
1088	/** Message context ID. */
1089	uint32_t u32MessageContext;
1090	/** Reserved. */
1091	uint16_t u16Reserved;
1092	/** I/O controller status. */
1093	uint16_t u16IOCStatus;
1094	/** I/O controller log information. */
1095	uint32_t u32IOCLogInfo;
1096	/** Version number of the page. */
1097	uint8_t u8PageVersion;
1098	/** Length of the page in 32bit Dwords. */
1099	uint8_t u8PageLength;
1100	/** Page number to access. */
1101	uint8_t u8PageNumber;
1102	/** Type of the page being accessed. */
1103	uint8_t u8PageType;
1104	} MptConfigurationReply, *PMptConfigurationReply;
1105	#pragma pack()
1106	AssertCompileSize(MptConfigurationReply, 24);
1107
1108	/** Additional I/O controller status codes for the configuration reply. */
1109	#define MPT_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
1110	#define MPT_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
1111	#define MPT_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
1112	#define MPT_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
1113	#define MPT_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
1114	#define MPT_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
1115
1116	/**
1117	* Union of all possible request messages.
1118	*/
1119	typedef union MptRequestUnion
1120	{
1121	MptMessageHdr Header;
1122	MptIOCInitRequest IOCInit;
1123	MptIOCFactsRequest IOCFacts;
1124	MptPortFactsRequest PortFacts;
1125	MptPortEnableRequest PortEnable;
1126	MptEventNotificationRequest EventNotification;
1127	MptSCSIIORequest SCSIIO;
1128	MptSCSITaskManagementRequest SCSITaskManagement;
1129	MptConfigurationRequest Configuration;
1130	MptFWDownloadRequest FWDownload;
1131	MptFWUploadRequest FWUpload;
1132	} MptRequestUnion, *PMptRequestUnion;
1133
1134	/**
1135	* Union of all possible reply messages.
1136	*/
1137	typedef union MptReplyUnion
1138	{
1139	/** 16bit view. */
1140	uint16_t au16Reply[30];
1141	MptDefaultReplyMessage Header;
1142	MptIOCInitReply IOCInit;
1143	MptIOCFactsReply IOCFacts;
1144	MptPortFactsReply PortFacts;
1145	MptPortEnableReply PortEnable;
1146	MptEventNotificationReply EventNotification;
1147	MptSCSIIOErrorReply SCSIIOError;
1148	MptSCSITaskManagementReply SCSITaskManagement;
1149	MptConfigurationReply Configuration;
1150	MptFWDownloadReply FWDownload;
1151	MptFWUploadReply FWUpload;
1152	} MptReplyUnion, *PMptReplyUnion;
1153	AssertCompileSize(MptReplyUnion, 60);
1154
1155
1156	/**
1157	* Configuration Page attributes.
1158	*/
1159	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_READONLY (0x00)
1160	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_CHANGEABLE (0x10)
1161	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT (0x20)
1162	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_PERSISTENT_READONLY (0x30)
1163
1164	#define MPT_CONFIGURATION_PAGE_ATTRIBUTE_GET(u8PageType) ((u8PageType) & 0xf0)
1165
1166	/**
1167	* Configuration Page types.
1168	*/
1169	#define MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT (0x00)
1170	#define MPT_CONFIGURATION_PAGE_TYPE_IOC (0x01)
1171	#define MPT_CONFIGURATION_PAGE_TYPE_BIOS (0x02)
1172	#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_PORT (0x03)
1173	#define MPT_CONFIGURATION_PAGE_TYPE_SCSI_SPI_DEVICE (0x04)
1174	#define MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING (0x09)
1175	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED (0x0F)
1176
1177	#define MPT_CONFIGURATION_PAGE_TYPE_GET(u8PageType) ((u8PageType) & 0x0f)
1178
1179	/**
1180	* Extented page types.
1181	*/
1182	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASIOUNIT (0x10)
1183	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASEXPANDER (0x11)
1184	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASDEVICE (0x12)
1185	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_SASPHYS (0x13)
1186	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_LOG (0x14)
1187	#define MPT_CONFIGURATION_PAGE_TYPE_EXTENDED_ENCLOSURE (0x15)
1188
1189	/**
1190	* Configuration Page header - Common to all pages.
1191	*/
1192	#pragma pack(1)
1193	typedef struct MptConfigurationPageHeader
1194	{
1195	/** Version of the page. */
1196	uint8_t u8PageVersion;
1197	/** The length of the page in 32bit D-Words. */
1198	uint8_t u8PageLength;
1199	/** Number of the page. */
1200	uint8_t u8PageNumber;
1201	/** Type of the page. */
1202	uint8_t u8PageType;
1203	} MptConfigurationPageHeader, *PMptConfigurationPageHeader;
1204	#pragma pack()
1205	AssertCompileSize(MptConfigurationPageHeader, 4);
1206
1207	/**
1208	* Extended configuration page header - Common to all extended pages.
1209	*/
1210	#pragma pack(1)
1211	typedef struct MptExtendedConfigurationPageHeader
1212	{
1213	/** Version of the page. */
1214	uint8_t u8PageVersion;
1215	/** Reserved. */
1216	uint8_t u8Reserved1;
1217	/** Number of the page. */
1218	uint8_t u8PageNumber;
1219	/** Type of the page. */
1220	uint8_t u8PageType;
1221	/** Extended page length. */
1222	uint16_t u16ExtPageLength;
1223	/** Extended page type. */
1224	uint8_t u8ExtPageType;
1225	/** Reserved */
1226	uint8_t u8Reserved2;
1227	} MptExtendedConfigurationPageHeader, *PMptExtendedConfigurationPageHeader;
1228	#pragma pack()
1229	AssertCompileSize(MptExtendedConfigurationPageHeader, 8);
1230
1231	/**
1232	* Manufacturing page 0. - Readonly.
1233	*/
1234	#pragma pack(1)
1235	typedef struct MptConfigurationPageManufacturing0
1236	{
1237	/** Union. */
1238	union
1239	{
1240	/** Byte view. */
1241	uint8_t abPageData[76];
1242	/** Field view. */
1243	struct
1244	{
1245	/** The omnipresent header. */
1246	MptConfigurationPageHeader Header;
1247	/** Name of the chip. */
1248	uint8_t abChipName[16];
1249	/** Chip revision. */
1250	uint8_t abChipRevision[8];
1251	/** Board name. */
1252	uint8_t abBoardName[16];
1253	/** Board assembly. */
1254	uint8_t abBoardAssembly[16];
1255	/** Board tracer number. */
1256	uint8_t abBoardTracerNumber[16];
1257	} fields;
1258	} u;
1259	} MptConfigurationPageManufacturing0, *PMptConfigurationPageManufacturing0;
1260	#pragma pack()
1261	AssertCompileSize(MptConfigurationPageManufacturing0, 76);
1262
1263	/**
1264	* Manufacturing page 1. - Readonly Persistent.
1265	*/
1266	#pragma pack(1)
1267	typedef struct MptConfigurationPageManufacturing1
1268	{
1269	/** Union */
1270	union
1271	{
1272	/** Byte view */
1273	uint8_t abPageData[260];
1274	/** Field view */
1275	struct
1276	{
1277	/** The omnipresent header. */
1278	MptConfigurationPageHeader Header;
1279	/** VPD info - don't know what belongs here so all zero. */
1280	uint8_t abVPDInfo[256];
1281	} fields;
1282	} u;
1283	} MptConfigurationPageManufacturing1, *PMptConfigurationPageManufacturing1;
1284	#pragma pack()
1285	AssertCompileSize(MptConfigurationPageManufacturing1, 260);
1286
1287	/**
1288	* Manufacturing page 2. - Readonly.
1289	*/
1290	#pragma pack(1)
1291	typedef struct MptConfigurationPageManufacturing2
1292	{
1293	/** Union. */
1294	union
1295	{
1296	/** Byte view. */
1297	uint8_t abPageData[8];
1298	/** Field view. */
1299	struct
1300	{
1301	/** The omnipresent header. */
1302	MptConfigurationPageHeader Header;
1303	/** PCI Device ID. */
1304	uint16_t u16PCIDeviceID;
1305	/** PCI Revision ID. */
1306	uint8_t u8PCIRevisionID;
1307	/** Reserved. */
1308	uint8_t u8Reserved;
1309	/** Hardware specific settings... */
1310	} fields;
1311	} u;
1312	} MptConfigurationPageManufacturing2, *PMptConfigurationPageManufacturing2;
1313	#pragma pack()
1314	AssertCompileSize(MptConfigurationPageManufacturing2, 8);
1315
1316	/**
1317	* Manufacturing page 3. - Readonly.
1318	*/
1319	#pragma pack(1)
1320	typedef struct MptConfigurationPageManufacturing3
1321	{
1322	/** Union. */
1323	union
1324	{
1325	/** Byte view. */
1326	uint8_t abPageData[8];
1327	/** Field view. */
1328	struct
1329	{
1330	/** The omnipresent header. */
1331	MptConfigurationPageHeader Header;
1332	/** PCI Device ID. */
1333	uint16_t u16PCIDeviceID;
1334	/** PCI Revision ID. */
1335	uint8_t u8PCIRevisionID;
1336	/** Reserved. */
1337	uint8_t u8Reserved;
1338	/** Chip specific settings... */
1339	} fields;
1340	} u;
1341	} MptConfigurationPageManufacturing3, *PMptConfigurationPageManufacturing3;
1342	#pragma pack()
1343	AssertCompileSize(MptConfigurationPageManufacturing3, 8);
1344
1345	/**
1346	* Manufacturing page 4. - Readonly.
1347	*/
1348	#pragma pack(1)
1349	typedef struct MptConfigurationPageManufacturing4
1350	{
1351	/** Union. */
1352	union
1353	{
1354	/** Byte view. */
1355	uint8_t abPageData[84];
1356	/** Field view. */
1357	struct
1358	{
1359	/** The omnipresent header. */
1360	MptConfigurationPageHeader Header;
1361	/** Reserved. */
1362	uint32_t u32Reserved;
1363	/** InfoOffset0. */
1364	uint8_t u8InfoOffset0;
1365	/** Info size. */
1366	uint8_t u8InfoSize0;
1367	/** InfoOffset1. */
1368	uint8_t u8InfoOffset1;
1369	/** Info size. */
1370	uint8_t u8InfoSize1;
1371	/** Size of the inquiry data. */
1372	uint8_t u8InquirySize;
1373	/** Reserved. */
1374	uint8_t abReserved[3];
1375	/** Inquiry data. */
1376	uint8_t abInquiryData[56];
1377	/** IS volume settings. */
1378	uint32_t u32ISVolumeSettings;
1379	/** IME volume settings. */
1380	uint32_t u32IMEVolumeSettings;
1381	/** IM volume settings. */
1382	uint32_t u32IMVolumeSettings;
1383	} fields;
1384	} u;
1385	} MptConfigurationPageManufacturing4, *PMptConfigurationPageManufacturing4;
1386	#pragma pack()
1387	AssertCompileSize(MptConfigurationPageManufacturing4, 84);
1388
1389	/**
1390	* Manufacturing page 5 - Readonly.
1391	*/
1392	#pragma pack(1)
1393	typedef struct MptConfigurationPageManufacturing5
1394	{
1395	/** Union. */
1396	union
1397	{
1398	/** Byte view. */
1399	uint8_t abPageData[88];
1400	/** Field view. */
1401	struct
1402	{
1403	/** The omnipresent header. */
1404	MptConfigurationPageHeader Header;
1405	/** Base WWID. */
1406	uint64_t u64BaseWWID;
1407	/** Flags */
1408	uint8_t u8Flags;
1409	/** Number of ForceWWID fields in this page. */
1410	uint8_t u8NumForceWWID;
1411	/** Reserved */
1412	uint16_t u16Reserved;
1413	/** Reserved */
1414	uint32_t au32Reserved[2];
1415	/** ForceWWID entries Maximum of 8 because the SAS controller doesn't has more */
1416	uint64_t au64ForceWWID[8];
1417	} fields;
1418	} u;
1419	} MptConfigurationPageManufacturing5, *PMptConfigurationPageManufacturing5;
1420	#pragma pack()
1421	AssertCompileSize(MptConfigurationPageManufacturing5, 24+64);
1422
1423	/**
1424	* Manufacturing page 6 - Readonly.
1425	*/
1426	#pragma pack(1)
1427	typedef struct MptConfigurationPageManufacturing6
1428	{
1429	/** Union. */
1430	union
1431	{
1432	/** Byte view. */
1433	uint8_t abPageData[4];
1434	/** Field view. */
1435	struct
1436	{
1437	/** The omnipresent header. */
1438	MptConfigurationPageHeader Header;
1439	/** Product specific data - 0 for now */
1440	} fields;
1441	} u;
1442	} MptConfigurationPageManufacturing6, *PMptConfigurationPageManufacturing6;
1443	#pragma pack()
1444	AssertCompileSize(MptConfigurationPageManufacturing6, 4);
1445
1446	/**
1447	* Manufacutring page 7 - PHY element.
1448	*/
1449	#pragma pack(1)
1450	typedef struct MptConfigurationPageManufacturing7PHY
1451	{
1452	/** Pinout */
1453	uint32_t u32Pinout;
1454	/** Connector name */
1455	uint8_t szConnector[16];
1456	/** Location */
1457	uint8_t u8Location;
1458	/** reserved */
1459	uint8_t u8Reserved;
1460	/** Slot */
1461	uint16_t u16Slot;
1462	} MptConfigurationPageManufacturing7PHY, *PMptConfigurationPageManufacturing7PHY;
1463	#pragma pack()
1464	AssertCompileSize(MptConfigurationPageManufacturing7PHY, 24);
1465
1466	/**
1467	* Manufacturing page 7 - Readonly.
1468	*/
1469	#pragma pack(1)
1470	typedef struct MptConfigurationPageManufacturing7
1471	{
1472	/** Union. */
1473	union
1474	{
1475	/** Byte view. */
1476	uint8_t abPageData[1];
1477	/** Field view. */
1478	struct
1479	{
1480	/** The omnipresent header. */
1481	MptConfigurationPageHeader Header;
1482	/** Reserved */
1483	uint32_t au32Reserved[2];
1484	/** Flags */
1485	uint32_t u32Flags;
1486	/** Enclosure name */
1487	uint8_t szEnclosureName[16];
1488	/** Number of PHYs */
1489	uint8_t u8NumPhys;
1490	/** Reserved */
1491	uint8_t au8Reserved[3];
1492	/** PHY list for the SAS controller - variable depending on the number of ports */
1493	MptConfigurationPageManufacturing7PHY aPHY[1];
1494	} fields;
1495	} u;
1496	} MptConfigurationPageManufacturing7, *PMptConfigurationPageManufacturing7;
1497	#pragma pack()
1498	AssertCompileSize(MptConfigurationPageManufacturing7, 36+sizeof(MptConfigurationPageManufacturing7PHY));
1499
1500	#define LSILOGICSCSI_MANUFACTURING7_GET_SIZE(ports) (sizeof(MptConfigurationPageManufacturing7) + ((ports) - 1) * sizeof(MptConfigurationPageManufacturing7PHY))
1501
1502	/** Flags for the flags field */
1503	#define LSILOGICSCSI_MANUFACTURING7_FLAGS_USE_PROVIDED_INFORMATION RT_BIT(0)
1504
1505	/** Flags for the pinout field */
1506	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_UNKNOWN RT_BIT(0)
1507	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8482 RT_BIT(1)
1508	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE1 RT_BIT(8)
1509	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE2 RT_BIT(9)
1510	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE3 RT_BIT(10)
1511	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8470_LANE4 RT_BIT(11)
1512	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE1 RT_BIT(16)
1513	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE2 RT_BIT(17)
1514	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE3 RT_BIT(18)
1515	#define LSILOGICSCSI_MANUFACTURING7_PINOUT_SFF8484_LANE4 RT_BIT(19)
1516
1517	/** Flags for the location field */
1518	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_UNKNOWN 0x01
1519	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_INTERNAL 0x02
1520	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_EXTERNAL 0x04
1521	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_SWITCHABLE 0x08
1522	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_AUTO 0x10
1523	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_PRESENT 0x20
1524	#define LSILOGICSCSI_MANUFACTURING7_LOCATION_NOT_CONNECTED 0x80
1525
1526	/**
1527	* Manufacturing page 8 - Readonly.
1528	*/
1529	#pragma pack(1)
1530	typedef struct MptConfigurationPageManufacturing8
1531	{
1532	/** Union. */
1533	union
1534	{
1535	/** Byte view. */
1536	uint8_t abPageData[4];
1537	/** Field view. */
1538	struct
1539	{
1540	/** The omnipresent header. */
1541	MptConfigurationPageHeader Header;
1542	/** Product specific information */
1543	} fields;
1544	} u;
1545	} MptConfigurationPageManufacturing8, *PMptConfigurationPageManufacturing8;
1546	#pragma pack()
1547	AssertCompileSize(MptConfigurationPageManufacturing8, 4);
1548
1549	/**
1550	* Manufacturing page 9 - Readonly.
1551	*/
1552	#pragma pack(1)
1553	typedef struct MptConfigurationPageManufacturing9
1554	{
1555	/** Union. */
1556	union
1557	{
1558	/** Byte view. */
1559	uint8_t abPageData[4];
1560	/** Field view. */
1561	struct
1562	{
1563	/** The omnipresent header. */
1564	MptConfigurationPageHeader Header;
1565	/** Product specific information */
1566	} fields;
1567	} u;
1568	} MptConfigurationPageManufacturing9, *PMptConfigurationPageManufacturing9;
1569	#pragma pack()
1570	AssertCompileSize(MptConfigurationPageManufacturing9, 4);
1571
1572	/**
1573	* Manufacturing page 10 - Readonly.
1574	*/
1575	#pragma pack(1)
1576	typedef struct MptConfigurationPageManufacturing10
1577	{
1578	/** Union. */
1579	union
1580	{
1581	/** Byte view. */
1582	uint8_t abPageData[4];
1583	/** Field view. */
1584	struct
1585	{
1586	/** The omnipresent header. */
1587	MptConfigurationPageHeader Header;
1588	/** Product specific information */
1589	} fields;
1590	} u;
1591	} MptConfigurationPageManufacturing10, *PMptConfigurationPageManufacturing10;
1592	#pragma pack()
1593	AssertCompileSize(MptConfigurationPageManufacturing10, 4);
1594
1595	/**
1596	* IO Unit page 0. - Readonly.
1597	*/
1598	#pragma pack(1)
1599	typedef struct MptConfigurationPageIOUnit0
1600	{
1601	/** Union. */
1602	union
1603	{
1604	/** Byte view. */
1605	uint8_t abPageData[12];
1606	/** Field view. */
1607	struct
1608	{
1609	/** The omnipresent header. */
1610	MptConfigurationPageHeader Header;
1611	/** A unique identifier. */
1612	uint64_t u64UniqueIdentifier;
1613	} fields;
1614	} u;
1615	} MptConfigurationPageIOUnit0, *PMptConfigurationPageIOUnit0;
1616	#pragma pack()
1617	AssertCompileSize(MptConfigurationPageIOUnit0, 12);
1618
1619	/**
1620	* IO Unit page 1. - Read/Write.
1621	*/
1622	#pragma pack(1)
1623	typedef struct MptConfigurationPageIOUnit1
1624	{
1625	/** Union. */
1626	union
1627	{
1628	/** Byte view. */
1629	uint8_t abPageData[8];
1630	/** Field view. */
1631	struct
1632	{
1633	/** The omnipresent header. */
1634	MptConfigurationPageHeader Header;
1635	/** Flag whether this is a single function PCI device. */
1636	unsigned fSingleFunction: 1;
1637	/** Flag whether all possible paths to a device are mapped. */
1638	unsigned fAllPathsMapped: 1;
1639	/** Reserved. */
1640	unsigned u4Reserved: 4;
1641	/** Flag whether all RAID functionality is disabled. */
1642	unsigned fIntegratedRAIDDisabled: 1;
1643	/** Flag whether 32bit PCI accesses are forced. */
1644	unsigned f32BitAccessForced: 1;
1645	/** Reserved. */
1646	unsigned abReserved: 24;
1647	} fields;
1648	} u;
1649	} MptConfigurationPageIOUnit1, *PMptConfigurationPageIOUnit1;
1650	#pragma pack()
1651	AssertCompileSize(MptConfigurationPageIOUnit1, 8);
1652
1653	/**
1654	* Adapter Ordering.
1655	*/
1656	#pragma pack(1)
1657	typedef struct MptConfigurationPageIOUnit2AdapterOrdering
1658	{
1659	/** PCI bus number. */
1660	unsigned u8PCIBusNumber: 8;
1661	/** PCI device and function number. */
1662	unsigned u8PCIDevFn: 8;
1663	/** Flag whether the adapter is embedded. */
1664	unsigned fAdapterEmbedded: 1;
1665	/** Flag whether the adapter is enabled. */
1666	unsigned fAdapterEnabled: 1;
1667	/** Reserved. */
1668	unsigned u6Reserved: 6;
1669	/** Reserved. */
1670	unsigned u8Reserved: 8;
1671	} MptConfigurationPageIOUnit2AdapterOrdering, *PMptConfigurationPageIOUnit2AdapterOrdering;
1672	#pragma pack()
1673	AssertCompileSize(MptConfigurationPageIOUnit2AdapterOrdering, 4);
1674
1675	/**
1676	* IO Unit page 2. - Read/Write.
1677	*/
1678	#pragma pack(1)
1679	typedef struct MptConfigurationPageIOUnit2
1680	{
1681	/** Union. */
1682	union
1683	{
1684	/** Byte view. */
1685	uint8_t abPageData[28];
1686	/** Field view. */
1687	struct
1688	{
1689	/** The omnipresent header. */
1690	MptConfigurationPageHeader Header;
1691	/** Reserved. */
1692	unsigned fReserved: 1;
1693	/** Flag whether Pause on error is enabled. */
1694	unsigned fPauseOnError: 1;
1695	/** Flag whether verbose mode is enabled. */
1696	unsigned fVerboseModeEnabled: 1;
1697	/** Set to disable color video. */
1698	unsigned fDisableColorVideo: 1;
1699	/** Flag whether int 40h is hooked. */
1700	unsigned fNotHookInt40h: 1;
1701	/** Reserved. */
1702	unsigned u3Reserved: 3;
1703	/** Reserved. */
1704	unsigned abReserved: 24;
1705	/** BIOS version. */
1706	uint32_t u32BIOSVersion;
1707	/** Adapter ordering. */
1708	MptConfigurationPageIOUnit2AdapterOrdering aAdapterOrder[4];
1709	} fields;
1710	} u;
1711	} MptConfigurationPageIOUnit2, *PMptConfigurationPageIOUnit2;
1712	#pragma pack()
1713	AssertCompileSize(MptConfigurationPageIOUnit2, 28);
1714
1715	/*
1716	* IO Unit page 3. - Read/Write.
1717	*/
1718	#pragma pack(1)
1719	typedef struct MptConfigurationPageIOUnit3
1720	{
1721	/** Union. */
1722	union
1723	{
1724	/** Byte view. */
1725	uint8_t abPageData[8];
1726	/** Field view. */
1727	struct
1728	{
1729	/** The omnipresent header. */
1730	MptConfigurationPageHeader Header;
1731	/** Number of GPIO values. */
1732	uint8_t u8GPIOCount;
1733	/** Reserved. */
1734	uint8_t abReserved[3];
1735	} fields;
1736	} u;
1737	} MptConfigurationPageIOUnit3, *PMptConfigurationPageIOUnit3;
1738	#pragma pack()
1739	AssertCompileSize(MptConfigurationPageIOUnit3, 8);
1740
1741	/*
1742	* IO Unit page 4. - Readonly for everyone except the BIOS.
1743	*/
1744	#pragma pack(1)
1745	typedef struct MptConfigurationPageIOUnit4
1746	{
1747	/** Union. */
1748	union
1749	{
1750	/** Byte view. */
1751	uint8_t abPageData[20];
1752	/** Field view. */
1753	struct
1754	{
1755	/** The omnipresent header. */
1756	MptConfigurationPageHeader Header;
1757	/** Reserved */
1758	uint32_t u32Reserved;
1759	/** SG entry describing the Firmware location. */
1760	MptSGEntrySimple64 FWImageSGE;
1761	} fields;
1762	} u;
1763	} MptConfigurationPageIOUnit4, *PMptConfigurationPageIOUnit4;
1764	#pragma pack()
1765	AssertCompileSize(MptConfigurationPageIOUnit4, 20);
1766
1767	/**
1768	* IOC page 0. - Readonly
1769	*/
1770	#pragma pack(1)
1771	typedef struct MptConfigurationPageIOC0
1772	{
1773	/** Union. */
1774	union
1775	{
1776	/** Byte view. */
1777	uint8_t abPageData[28];
1778	/** Field view. */
1779	struct
1780	{
1781	/** The omnipresent header. */
1782	MptConfigurationPageHeader Header;
1783	/** Total amount of NV memory in bytes. */
1784	uint32_t u32TotalNVStore;
1785	/** Number of free bytes in the NV store. */
1786	uint32_t u32FreeNVStore;
1787	/** PCI vendor ID. */
1788	uint16_t u16VendorId;
1789	/** PCI device ID. */
1790	uint16_t u16DeviceId;
1791	/** PCI revision ID. */
1792	uint8_t u8RevisionId;
1793	/** Reserved. */
1794	uint8_t abReserved[3];
1795	/** PCI class code. */
1796	uint32_t u32ClassCode;
1797	/** Subsystem vendor Id. */
1798	uint16_t u16SubsystemVendorId;
1799	/** Subsystem Id. */
1800	uint16_t u16SubsystemId;
1801	} fields;
1802	} u;
1803	} MptConfigurationPageIOC0, *PMptConfigurationPageIOC0;
1804	#pragma pack()
1805	AssertCompileSize(MptConfigurationPageIOC0, 28);
1806
1807	/**
1808	* IOC page 1. - Read/Write
1809	*/
1810	#pragma pack(1)
1811	typedef struct MptConfigurationPageIOC1
1812	{
1813	/** Union. */
1814	union
1815	{
1816	/** Byte view. */
1817	uint8_t abPageData[16];
1818	/** Field view. */
1819	struct
1820	{
1821	/** The omnipresent header. */
1822	MptConfigurationPageHeader Header;
1823	/** Flag whether reply coalescing is enabled. */
1824	unsigned fReplyCoalescingEnabled: 1;
1825	/** Reserved. */
1826	unsigned u31Reserved: 31;
1827	/** Coalescing Timeout in microseconds. */
1828	unsigned u32CoalescingTimeout: 32;
1829	/** Coalescing depth. */
1830	unsigned u8CoalescingDepth: 8;
1831	/** Reserved. */
1832	unsigned u8Reserved0: 8;
1833	unsigned u8Reserved1: 8;
1834	unsigned u8Reserved2: 8;
1835	} fields;
1836	} u;
1837	} MptConfigurationPageIOC1, *PMptConfigurationPageIOC1;
1838	#pragma pack()
1839	AssertCompileSize(MptConfigurationPageIOC1, 16);
1840
1841	/**
1842	* IOC page 2. - Readonly
1843	*/
1844	#pragma pack(1)
1845	typedef struct MptConfigurationPageIOC2
1846	{
1847	/** Union. */
1848	union
1849	{
1850	/** Byte view. */
1851	uint8_t abPageData[12];
1852	/** Field view. */
1853	struct
1854	{
1855	/** The omnipresent header. */
1856	MptConfigurationPageHeader Header;
1857	/** Flag whether striping is supported. */
1858	unsigned fStripingSupported: 1;
1859	/** Flag whether enhanced mirroring is supported. */
1860	unsigned fEnhancedMirroringSupported: 1;
1861	/** Flag whether mirroring is supported. */
1862	unsigned fMirroringSupported: 1;
1863	/** Reserved. */
1864	unsigned u26Reserved: 26;
1865	/** Flag whether SES is supported. */
1866	unsigned fSESSupported: 1;
1867	/** Flag whether SAF-TE is supported. */
1868	unsigned fSAFTESupported: 1;
1869	/** Flag whether cross channel volumes are supported. */
1870	unsigned fCrossChannelVolumesSupported: 1;
1871	/** Number of active integrated RAID volumes. */
1872	unsigned u8NumActiveVolumes: 8;
1873	/** Maximum number of integrated RAID volumes supported. */
1874	unsigned u8MaxVolumes: 8;
1875	/** Number of active integrated RAID physical disks. */
1876	unsigned u8NumActivePhysDisks: 8;
1877	/** Maximum number of integrated RAID physical disks supported. */
1878	unsigned u8MaxPhysDisks: 8;
1879	/** RAID volumes... - not supported. */
1880	} fields;
1881	} u;
1882	} MptConfigurationPageIOC2, *PMptConfigurationPageIOC2;
1883	#pragma pack()
1884	AssertCompileSize(MptConfigurationPageIOC2, 12);
1885
1886	/**
1887	* IOC page 3. - Readonly
1888	*/
1889	#pragma pack(1)
1890	typedef struct MptConfigurationPageIOC3
1891	{
1892	/** Union. */
1893	union
1894	{
1895	/** Byte view. */
1896	uint8_t abPageData[8];
1897	/** Field view. */
1898	struct
1899	{
1900	/** The omnipresent header. */
1901	MptConfigurationPageHeader Header;
1902	/** Number of active integrated RAID physical disks. */
1903	uint8_t u8NumPhysDisks;
1904	/** Reserved. */
1905	uint8_t abReserved[3];
1906	} fields;
1907	} u;
1908	} MptConfigurationPageIOC3, *PMptConfigurationPageIOC3;
1909	#pragma pack()
1910	AssertCompileSize(MptConfigurationPageIOC3, 8);
1911
1912	/**
1913	* IOC page 4. - Read/Write
1914	*/
1915	#pragma pack(1)
1916	typedef struct MptConfigurationPageIOC4
1917	{
1918	/** Union. */
1919	union
1920	{
1921	/** Byte view. */
1922	uint8_t abPageData[8];
1923	/** Field view. */
1924	struct
1925	{
1926	/** The omnipresent header. */
1927	MptConfigurationPageHeader Header;
1928	/** Number of SEP entries in this page. */
1929	uint8_t u8ActiveSEP;
1930	/** Maximum number of SEp entries supported. */
1931	uint8_t u8MaxSEP;
1932	/** Reserved. */
1933	uint16_t u16Reserved;
1934	/** SEP entries... - not supported. */
1935	} fields;
1936	} u;
1937	} MptConfigurationPageIOC4, *PMptConfigurationPageIOC4;
1938	#pragma pack()
1939	AssertCompileSize(MptConfigurationPageIOC4, 8);
1940
1941	/**
1942	* IOC page 6. - Read/Write
1943	*/
1944	#pragma pack(1)
1945	typedef struct MptConfigurationPageIOC6
1946	{
1947	/** Union. */
1948	union
1949	{
1950	/** Byte view. */
1951	uint8_t abPageData[60];
1952	/** Field view. */
1953	struct
1954	{
1955	/** The omnipresent header. */
1956	MptConfigurationPageHeader Header;
1957	uint32_t u32CapabilitiesFlags;
1958	uint8_t u8MaxDrivesIS;
1959	uint8_t u8MaxDrivesIM;
1960	uint8_t u8MaxDrivesIME;
1961	uint8_t u8Reserved1;
1962	uint8_t u8MinDrivesIS;
1963	uint8_t u8MinDrivesIM;
1964	uint8_t u8MinDrivesIME;
1965	uint8_t u8Reserved2;
1966	uint8_t u8MaxGlobalHotSpares;
1967	uint8_t u8Reserved3;
1968	uint16_t u16Reserved4;
1969	uint32_t u32Reserved5;
1970	uint32_t u32SupportedStripeSizeMapIS;
1971	uint32_t u32SupportedStripeSizeMapIME;
1972	uint32_t u32Reserved6;
1973	uint8_t u8MetadataSize;
1974	uint8_t u8Reserved7;
1975	uint16_t u16Reserved8;
1976	uint16_t u16MaxBadBlockTableEntries;
1977	uint16_t u16Reserved9;
1978	uint16_t u16IRNvsramUsage;
1979	uint16_t u16Reserved10;
1980	uint32_t u32IRNvsramVersion;
1981	uint32_t u32Reserved11;
1982	} fields;
1983	} u;
1984	} MptConfigurationPageIOC6, *PMptConfigurationPageIOC6;
1985	#pragma pack()
1986	AssertCompileSize(MptConfigurationPageIOC6, 60);
1987
1988	/**
1989	* BIOS page 1 - Read/write.
1990	*/
1991	#pragma pack(1)
1992	typedef struct MptConfigurationPageBIOS1
1993	{
1994	/** Union. */
1995	union
1996	{
1997	/** Byte view. */
1998	uint8_t abPageData[48];
1999	/** Field view. */
2000	struct
2001	{
2002	/** The omnipresent header. */
2003	MptConfigurationPageHeader Header;
2004	/** BIOS options */
2005	uint32_t u32BiosOptions;
2006	/** IOC settings */
2007	uint32_t u32IOCSettings;
2008	/** Reserved */
2009	uint32_t u32Reserved;
2010	/** Device settings */
2011	uint32_t u32DeviceSettings;
2012	/** Number of devices */
2013	uint16_t u16NumberOfDevices;
2014	/** Expander spinup */
2015	uint8_t u8ExpanderSpinup;
2016	/** Reserved */
2017	uint8_t u8Reserved;
2018	/** I/O timeout of block devices without removable media */
2019	uint16_t u16IOTimeoutBlockDevicesNonRM;
2020	/** I/O timeout sequential */
2021	uint16_t u16IOTimeoutSequential;
2022	/** I/O timeout other */
2023	uint16_t u16IOTimeoutOther;
2024	/** I/O timeout of block devices with removable media */
2025	uint16_t u16IOTimeoutBlockDevicesRM;
2026	} fields;
2027	} u;
2028	} MptConfigurationPageBIOS1, *PMptConfigurationPageBIOS1;
2029	#pragma pack()
2030	AssertCompileSize(MptConfigurationPageBIOS1, 48);
2031
2032	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_DISABLE RT_BIT(0)
2033	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_SCAN_FROM_HIGH_TO_LOW RT_BIT(1)
2034	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SAS_SUPPORT RT_BIT(8)
2035	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_FC_SUPPORT RT_BIT(9)
2036	#define LSILOGICSCSI_BIOS1_BIOSOPTIONS_BIOS_EXTENDED_SPI_SUPPORT RT_BIT(10)
2037
2038	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ALTERNATE_CHS RT_BIT(3)
2039
2040	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_SET(x) ((x) << 4)
2041	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_DISABLED 0x00
2042	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BIOS_ONLY 0x01
2043	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_OS_ONLY 0x02
2044	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_ADAPTER_SUPPORT_BOT 0x03
2045
2046	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_SET(x) ((x) << 6)
2047	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_NO_INT13H 0x00
2048	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_BOOT_MEDIA_INT13H 0x01
2049	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_REMOVABLE_MEDIA_INT13H 0x02
2050
2051	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_SET(x) ((x & 0xF) << 8)
2052	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_SPINUP_DELAY_GET(x) ((x >> 8) & 0x0F)
2053	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_SET(x) ((x & 0xF) << 12)
2054	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_MAX_TARGET_SPINUP_GET(x) ((x >> 12) & 0x0F)
2055
2056	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SET(x) (((x) & 0x3) << 16)
2057	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_ENCLOSURE 0x0
2058	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_BOOT_PREFERENCE_SAS_ADDRESS 0x1
2059
2060	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_DIRECT_ATTACH_SPINUP_MODE_ALL RT_BIT(18)
2061	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_AUTO_PORT_ENABLE RT_BIT(19)
2062
2063	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_SET(x) (((x) & 0xF) << 20)
2064	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_REPLY_DELAY_GET(x) ((x >> 20) & 0x0F)
2065
2066	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_SET(x) (((x) & 0xF) << 24)
2067	#define LSILOGICSCSI_BIOS1_IOCSETTINGS_PORT_ENABLE_SPINUP_DELAY_GET(x) ((x >> 24) & 0x0F)
2068
2069	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS RT_BIT(0)
2070	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_NON_REMOVABLE_DEVICES RT_BIT(1)
2071	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS_FOR_REMOVABLE_DEVICES RT_BIT(2)
2072	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_LUN_SCANS2 RT_BIT(3)
2073	#define LSILOGICSCSI_BIOS1_DEVICESETTINGS_DISABLE_SMART_POLLING RT_BIT(4)
2074
2075	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_SET(x) ((x) & 0x0F)
2076	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_SPINUP_DELAY_GET(x) ((x) & 0x0F)
2077	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_SET(x) (((x) & 0x0F) << 4)
2078	#define LSILOGICSCSI_BIOS1_EXPANDERSPINUP_MAX_SPINUP_DELAY_GET(x) ((x >> 4) & 0x0F)
2079
2080	/**
2081	* BIOS page 2 - Read/write.
2082	*/
2083	#pragma pack(1)
2084	typedef struct MptConfigurationPageBIOS2
2085	{
2086	/** Union. */
2087	union
2088	{
2089	/** Byte view. */
2090	uint8_t abPageData[384];
2091	/** Field view. */
2092	struct
2093	{
2094	/** The omnipresent header. */
2095	MptConfigurationPageHeader Header;
2096	/** Reserved */
2097	uint32_t au32Reserved[6];
2098	/** Format of the boot device field. */
2099	uint8_t u8BootDeviceForm;
2100	/** Previous format of the boot device field. */
2101	uint8_t u8PrevBootDeviceForm;
2102	/** Reserved */
2103	uint16_t u16Reserved;
2104	/** Boot device fields - dependent on the format */
2105	union
2106	{
2107	/** Device for AdapterNumber:Bus:Target:LUN */
2108	struct
2109	{
2110	/** Target ID */
2111	uint8_t u8TargetID;
2112	/** Bus */
2113	uint8_t u8Bus;
2114	/** Adapter Number */
2115	uint8_t u8AdapterNumber;
2116	/** Reserved */
2117	uint8_t u8Reserved;
2118	/** Reserved */
2119	uint32_t au32Reserved[3];
2120	/** LUN */
2121	uint32_t aLUN[5];
2122	/** Reserved */
2123	uint32_t au32Reserved2[56];
2124	} AdapterNumberBusTargetLUN;
2125	/** Device for PCIAddress:Bus:Target:LUN */
2126	struct
2127	{
2128	/** Target ID */
2129	uint8_t u8TargetID;
2130	/** Bus */
2131	uint8_t u8Bus;
2132	/** Adapter Number */
2133	uint16_t u16PCIAddress;
2134	/** Reserved */
2135	uint32_t au32Reserved[3];
2136	/** LUN */
2137	uint32_t aLUN[5];
2138	/** Reserved */
2139	uint32_t au32Reserved2[56];
2140	} PCIAddressBusTargetLUN;
2141	/** Device for PCISlotNo:Bus:Target:LUN */
2142	struct
2143	{
2144	/** Target ID */
2145	uint8_t u8TargetID;
2146	/** Bus */
2147	uint8_t u8Bus;
2148	/** PCI Slot Number */
2149	uint8_t u16PCISlotNo;
2150	/** Reserved */
2151	uint32_t au32Reserved[3];
2152	/** LUN */
2153	uint32_t aLUN[5];
2154	/** Reserved */
2155	uint32_t au32Reserved2[56];
2156	} PCIAddressBusSlotLUN;
2157	/** Device for FC channel world wide name */
2158	struct
2159	{
2160	/** World wide port name low */
2161	uint32_t u32WorldWidePortNameLow;
2162	/** World wide port name high */
2163	uint32_t u32WorldWidePortNameHigh;
2164	/** Reserved */
2165	uint32_t au32Reserved[3];
2166	/** LUN */
2167	uint32_t aLUN[5];
2168	/** Reserved */
2169	uint32_t au32Reserved2[56];
2170	} FCWorldWideName;
2171	/** Device for FC channel world wide name */
2172	struct
2173	{
2174	/** SAS address */
2175	SASADDRESS SASAddress;
2176	/** Reserved */
2177	uint32_t au32Reserved[3];
2178	/** LUN */
2179	uint32_t aLUN[5];
2180	/** Reserved */
2181	uint32_t au32Reserved2[56];
2182	} SASWorldWideName;
2183	/** Device for Enclosure/Slot */
2184	struct
2185	{
2186	/** Enclosure logical ID */
2187	uint64_t u64EnclosureLogicalID;
2188	/** Reserved */
2189	uint32_t au32Reserved[3];
2190	/** LUN */
2191	uint32_t aLUN[5];
2192	/** Reserved */
2193	uint32_t au32Reserved2[56];
2194	} EnclosureSlot;
2195	} BootDevice;
2196	} fields;
2197	} u;
2198	} MptConfigurationPageBIOS2, *PMptConfigurationPageBIOS2;
2199	#pragma pack()
2200	AssertCompileSize(MptConfigurationPageBIOS2, 384);
2201
2202	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SET(x) ((x) & 0x0F)
2203	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FIRST 0x0
2204	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ADAPTER_BUS_TARGET_LUN 0x1
2205	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCIADDR_BUS_TARGET_LUN 0x2
2206	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_PCISLOT_BUS_TARGET_LUN 0x3
2207	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_FC_WWN 0x4
2208	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_SAS_WWN 0x5
2209	#define LSILOGICSCSI_BIOS2_BOOT_DEVICE_FORM_ENCLOSURE_SLOT 0x6
2210
2211	/**
2212	* BIOS page 4 - Read/Write (Where is 3? - not defined in the spec)
2213	*/
2214	#pragma pack(1)
2215	typedef struct MptConfigurationPageBIOS4
2216	{
2217	/** Union. */
2218	union
2219	{
2220	/** Byte view. */
2221	uint8_t abPageData[12];
2222	/** Field view. */
2223	struct
2224	{
2225	/** The omnipresent header. */
2226	MptConfigurationPageHeader Header;
2227	/** Reassignment Base WWID */
2228	uint64_t u64ReassignmentBaseWWID;
2229	} fields;
2230	} u;
2231	} MptConfigurationPageBIOS4, *PMptConfigurationPageBIOS4;
2232	#pragma pack()
2233	AssertCompileSize(MptConfigurationPageBIOS4, 12);
2234
2235	/**
2236	* SCSI-SPI port page 0. - Readonly
2237	*/
2238	#pragma pack(1)
2239	typedef struct MptConfigurationPageSCSISPIPort0
2240	{
2241	/** Union. */
2242	union
2243	{
2244	/** Byte view. */
2245	uint8_t abPageData[12];
2246	/** Field view. */
2247	struct
2248	{
2249	/** The omnipresent header. */
2250	MptConfigurationPageHeader Header;
2251	/** Flag whether this port is information unit transfers capable. */
2252	unsigned fInformationUnitTransfersCapable: 1;
2253	/** Flag whether the port is DT (Dual Transfer) capable. */
2254	unsigned fDTCapable: 1;
2255	/** Flag whether the port is QAS (Quick Arbitrate and Select) capable. */
2256	unsigned fQASCapable: 1;
2257	/** Reserved. */
2258	unsigned u5Reserved1: 5;
2259	/** Minimum Synchronous transfer period. */
2260	unsigned u8MinimumSynchronousTransferPeriod: 8;
2261	/** Maximum synchronous offset. */
2262	unsigned u8MaximumSynchronousOffset: 8;
2263	/** Reserved. */
2264	unsigned u5Reserved2: 5;
2265	/** Flag whether indicating the width of the bus - 0 narrow and 1 for wide. */
2266	unsigned fWide: 1;
2267	/** Reserved */
2268	unsigned fReserved: 1;
2269	/** Flag whether the port is AIP (Asynchronous Information Protection) capable. */
2270	unsigned fAIPCapable: 1;
2271	/** Signaling Type. */
2272	unsigned u2SignalingType: 2;
2273	/** Reserved. */
2274	unsigned u30Reserved: 30;
2275	} fields;
2276	} u;
2277	} MptConfigurationPageSCSISPIPort0, *PMptConfigurationPageSCSISPIPort0;
2278	#pragma pack()
2279	AssertCompileSize(MptConfigurationPageSCSISPIPort0, 12);
2280
2281	/**
2282	* SCSI-SPI port page 1. - Read/Write
2283	*/
2284	#pragma pack(1)
2285	typedef struct MptConfigurationPageSCSISPIPort1
2286	{
2287	/** Union. */
2288	union
2289	{
2290	/** Byte view. */
2291	uint8_t abPageData[12];
2292	/** Field view. */
2293	struct
2294	{
2295	/** The omnipresent header. */
2296	MptConfigurationPageHeader Header;
2297	/** The SCSI ID of the port. */
2298	uint8_t u8SCSIID;
2299	/** Reserved. */
2300	uint8_t u8Reserved;
2301	/** Port response IDs Bit mask field. */
2302	uint16_t u16PortResponseIDsBitmask;
2303	/** Value for the on BUS timer. */
2304	uint32_t u32OnBusTimerValue;
2305	} fields;
2306	} u;
2307	} MptConfigurationPageSCSISPIPort1, *PMptConfigurationPageSCSISPIPort1;
2308	#pragma pack()
2309	AssertCompileSize(MptConfigurationPageSCSISPIPort1, 12);
2310
2311	/**
2312	* Device settings for one device.
2313	*/
2314	#pragma pack(1)
2315	typedef struct MptDeviceSettings
2316	{
2317	/** Timeout for I/O in seconds. */
2318	unsigned u8Timeout: 8;
2319	/** Minimum synchronous factor. */
2320	unsigned u8SyncFactor: 8;
2321	/** Flag whether disconnect is enabled. */
2322	unsigned fDisconnectEnable: 1;
2323	/** Flag whether Scan ID is enabled. */
2324	unsigned fScanIDEnable: 1;
2325	/** Flag whether Scan LUNs is enabled. */
2326	unsigned fScanLUNEnable: 1;
2327	/** Flag whether tagged queuing is enabled. */
2328	unsigned fTaggedQueuingEnabled: 1;
2329	/** Flag whether wide is enabled. */
2330	unsigned fWideDisable: 1;
2331	/** Flag whether this device is bootable. */
2332	unsigned fBootChoice: 1;
2333	/** Reserved. */
2334	unsigned u10Reserved: 10;
2335	} MptDeviceSettings, *PMptDeviceSettings;
2336	#pragma pack()
2337	AssertCompileSize(MptDeviceSettings, 4);
2338
2339	/**
2340	* SCSI-SPI port page 2. - Read/Write for the BIOS
2341	*/
2342	#pragma pack(1)
2343	typedef struct MptConfigurationPageSCSISPIPort2
2344	{
2345	/** Union. */
2346	union
2347	{
2348	/** Byte view. */
2349	uint8_t abPageData[76];
2350	/** Field view. */
2351	struct
2352	{
2353	/** The omnipresent header. */
2354	MptConfigurationPageHeader Header;
2355	/** Flag indicating the bus scan order. */
2356	unsigned fBusScanOrderHighToLow: 1;
2357	/** Reserved. */
2358	unsigned fReserved: 1;
2359	/** Flag whether SCSI Bus resets are avoided. */
2360	unsigned fAvoidSCSIBusResets: 1;
2361	/** Flag whether alternate CHS is used. */
2362	unsigned fAlternateCHS: 1;
2363	/** Flag whether termination is disabled. */
2364	unsigned fTerminationDisabled: 1;
2365	/** Reserved. */
2366	unsigned u27Reserved: 27;
2367	/** Host SCSI ID. */
2368	unsigned u4HostSCSIID: 4;
2369	/** Initialize HBA. */
2370	unsigned u2InitializeHBA: 2;
2371	/** Removeable media setting. */
2372	unsigned u2RemovableMediaSetting: 2;
2373	/** Spinup delay. */
2374	unsigned u4SpinupDelay: 4;
2375	/** Negotiating settings. */
2376	unsigned u2NegotitatingSettings: 2;
2377	/** Reserved. */
2378	unsigned u18Reserved: 18;
2379	/** Device Settings. */
2380	MptDeviceSettings aDeviceSettings[16];
2381	} fields;
2382	} u;
2383	} MptConfigurationPageSCSISPIPort2, *PMptConfigurationPageSCSISPIPort2;
2384	#pragma pack()
2385	AssertCompileSize(MptConfigurationPageSCSISPIPort2, 76);
2386
2387	/**
2388	* SCSI-SPI device page 0. - Readonly
2389	*/
2390	#pragma pack(1)
2391	typedef struct MptConfigurationPageSCSISPIDevice0
2392	{
2393	/** Union. */
2394	union
2395	{
2396	/** Byte view. */
2397	uint8_t abPageData[12];
2398	/** Field view. */
2399	struct
2400	{
2401	/** The omnipresent header. */
2402	MptConfigurationPageHeader Header;
2403	/** Negotiated Parameters. */
2404	/** Information Units enabled. */
2405	unsigned fInformationUnitsEnabled: 1;
2406	/** Dual Transfers Enabled. */
2407	unsigned fDTEnabled: 1;
2408	/** QAS enabled. */
2409	unsigned fQASEnabled: 1;
2410	/** Reserved. */
2411	unsigned u5Reserved1: 5;
2412	/** Synchronous Transfer period. */
2413	unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2414	/** Synchronous offset. */
2415	unsigned u8NegotiatedSynchronousOffset: 8;
2416	/** Reserved. */
2417	unsigned u5Reserved2: 5;
2418	/** Width - 0 for narrow and 1 for wide. */
2419	unsigned fWide: 1;
2420	/** Reserved. */
2421	unsigned fReserved: 1;
2422	/** AIP enabled. */
2423	unsigned fAIPEnabled: 1;
2424	/** Flag whether negotiation occurred. */
2425	unsigned fNegotationOccured: 1;
2426	/** Flag whether a SDTR message was rejected. */
2427	unsigned fSDTRRejected: 1;
2428	/** Flag whether a WDTR message was rejected. */
2429	unsigned fWDTRRejected: 1;
2430	/** Flag whether a PPR message was rejected. */
2431	unsigned fPPRRejected: 1;
2432	/** Reserved. */
2433	unsigned u28Reserved: 28;
2434	} fields;
2435	} u;
2436	} MptConfigurationPageSCSISPIDevice0, *PMptConfigurationPageSCSISPIDevice0;
2437	#pragma pack()
2438	AssertCompileSize(MptConfigurationPageSCSISPIDevice0, 12);
2439
2440	/**
2441	* SCSI-SPI device page 1. - Read/Write
2442	*/
2443	#pragma pack(1)
2444	typedef struct MptConfigurationPageSCSISPIDevice1
2445	{
2446	/** Union. */
2447	union
2448	{
2449	/** Byte view. */
2450	uint8_t abPageData[16];
2451	/** Field view. */
2452	struct
2453	{
2454	/** The omnipresent header. */
2455	MptConfigurationPageHeader Header;
2456	/** Requested Parameters. */
2457	/** Information Units enable. */
2458	bool fInformationUnitsEnable: 1;
2459	/** Dual Transfers Enable. */
2460	bool fDTEnable: 1;
2461	/** QAS enable. */
2462	bool fQASEnable: 1;
2463	/** Reserved. */
2464	unsigned u5Reserved1: 5;
2465	/** Synchronous Transfer period. */
2466	unsigned u8NegotiatedSynchronousTransferPeriod: 8;
2467	/** Synchronous offset. */
2468	unsigned u8NegotiatedSynchronousOffset: 8;
2469	/** Reserved. */
2470	unsigned u5Reserved2: 5;
2471	/** Width - 0 for narrow and 1 for wide. */
2472	bool fWide: 1;
2473	/** Reserved. */
2474	bool fReserved1: 1;
2475	/** AIP enable. */
2476	bool fAIPEnable: 1;
2477	/** Reserved. */
2478	bool fReserved2: 1;
2479	/** WDTR disallowed. */
2480	bool fWDTRDisallowed: 1;
2481	/** SDTR disallowed. */
2482	bool fSDTRDisallowed: 1;
2483	/** Reserved. */
2484	unsigned u29Reserved: 29;
2485	} fields;
2486	} u;
2487	} MptConfigurationPageSCSISPIDevice1, *PMptConfigurationPageSCSISPIDevice1;
2488	#pragma pack()
2489	AssertCompileSize(MptConfigurationPageSCSISPIDevice1, 16);
2490
2491	/**
2492	* SCSI-SPI device page 2. - Read/Write
2493	*/
2494	#pragma pack(1)
2495	typedef struct MptConfigurationPageSCSISPIDevice2
2496	{
2497	/** Union. */
2498	union
2499	{
2500	/** Byte view. */
2501	uint8_t abPageData[16];
2502	/** Field view. */
2503	struct
2504	{
2505	/** The omnipresent header. */
2506	MptConfigurationPageHeader Header;
2507	/** Reserved. */
2508	unsigned u4Reserved: 4;
2509	/** ISI enable. */
2510	unsigned fISIEnable: 1;
2511	/** Secondary driver enable. */
2512	unsigned fSecondaryDriverEnable: 1;
2513	/** Reserved. */
2514	unsigned fReserved: 1;
2515	/** Slew create controller. */
2516	unsigned u3SlewRateControler: 3;
2517	/** Primary drive strength controller. */
2518	unsigned u3PrimaryDriveStrengthControl: 3;
2519	/** Secondary drive strength controller. */
2520	unsigned u3SecondaryDriveStrengthControl: 3;
2521	/** Reserved. */
2522	unsigned u12Reserved: 12;
2523	/** XCLKH_ST. */
2524	unsigned fXCLKH_ST: 1;
2525	/** XCLKS_ST. */
2526	unsigned fXCLKS_ST: 1;
2527	/** XCLKH_DT. */
2528	unsigned fXCLKH_DT: 1;
2529	/** XCLKS_DT. */
2530	unsigned fXCLKS_DT: 1;
2531	/** Parity pipe select. */
2532	unsigned u2ParityPipeSelect: 2;
2533	/** Reserved. */
2534	unsigned u30Reserved: 30;
2535	/** Data bit pipeline select. */
2536	unsigned u32DataPipelineSelect: 32;
2537	} fields;
2538	} u;
2539	} MptConfigurationPageSCSISPIDevice2, *PMptConfigurationPageSCSISPIDevice2;
2540	#pragma pack()
2541	AssertCompileSize(MptConfigurationPageSCSISPIDevice2, 16);
2542
2543	/**
2544	* SCSI-SPI device page 3 (Revision G). - Readonly
2545	*/
2546	#pragma pack(1)
2547	typedef struct MptConfigurationPageSCSISPIDevice3
2548	{
2549	/** Union. */
2550	union
2551	{
2552	/** Byte view. */
2553	uint8_t abPageData[1];
2554	/** Field view. */
2555	struct
2556	{
2557	/** The omnipresent header. */
2558	MptConfigurationPageHeader Header;
2559	/** Number of times the IOC rejected a message because it doesn't support the operation. */
2560	uint16_t u16MsgRejectCount;
2561	/** Number of times the SCSI bus entered an invalid operation state. */
2562	uint16_t u16PhaseErrorCount;
2563	/** Number of parity errors. */
2564	uint16_t u16ParityCount;
2565	/** Reserved. */
2566	uint16_t u16Reserved;
2567	} fields;
2568	} u;
2569	} MptConfigurationPageSCSISPIDevice3, *PMptConfigurationPageSCSISPIDevice3;
2570	#pragma pack()
2571	AssertCompileSize(MptConfigurationPageSCSISPIDevice3, 12);
2572
2573	/**
2574	* PHY entry for the SAS I/O unit page 0
2575	*/
2576	#pragma pack(1)
2577	typedef struct MptConfigurationPageSASIOUnit0PHY
2578	{
2579	/** Port number */
2580	uint8_t u8Port;
2581	/** Port flags */
2582	uint8_t u8PortFlags;
2583	/** Phy flags */
2584	uint8_t u8PhyFlags;
2585	/** negotiated link rate */
2586	uint8_t u8NegotiatedLinkRate;
2587	/** Controller phy device info */
2588	uint32_t u32ControllerPhyDeviceInfo;
2589	/** Attached device handle */
2590	uint16_t u16AttachedDevHandle;
2591	/** Controller device handle */
2592	uint16_t u16ControllerDevHandle;
2593	/** Discovery status */
2594	uint32_t u32DiscoveryStatus;
2595	} MptConfigurationPageSASIOUnit0PHY, *PMptConfigurationPageSASIOUnit0PHY;
2596	#pragma pack()
2597	AssertCompileSize(MptConfigurationPageSASIOUnit0PHY, 16);
2598
2599	/**
2600	* SAS I/O Unit page 0 - Readonly
2601	*/
2602	#pragma pack(1)
2603	typedef struct MptConfigurationPageSASIOUnit0
2604	{
2605	/** Union. */
2606	union
2607	{
2608	/** Byte view - variable. */
2609	uint8_t abPageData[1];
2610	/** Field view. */
2611	struct
2612	{
2613	/** The omnipresent header. */
2614	MptExtendedConfigurationPageHeader ExtHeader;
2615	/** Nvdata version default */
2616	uint16_t u16NvdataVersionDefault;
2617	/** Nvdata version persistent */
2618	uint16_t u16NvdataVersionPersistent;
2619	/** Number of physical ports */
2620	uint8_t u8NumPhys;
2621	/** Reserved */
2622	uint8_t au8Reserved[3];
2623	/** Content for each physical port - variable depending on the amount of ports. */
2624	MptConfigurationPageSASIOUnit0PHY aPHY[1];
2625	} fields;
2626	} u;
2627	} MptConfigurationPageSASIOUnit0, *PMptConfigurationPageSASIOUnit0;
2628	#pragma pack()
2629	AssertCompileSize(MptConfigurationPageSASIOUnit0, 8+2+2+1+3+sizeof(MptConfigurationPageSASIOUnit0PHY));
2630
2631	#define LSILOGICSCSI_SASIOUNIT0_GET_SIZE(ports) (sizeof(MptConfigurationPageSASIOUnit0) + ((ports) - 1) * sizeof(MptConfigurationPageSASIOUnit0PHY))
2632
2633	#define LSILOGICSCSI_SASIOUNIT0_PORT_CONFIGURATION_AUTO RT_BIT(0)
2634	#define LSILOGICSCSI_SASIOUNIT0_PORT_TARGET_IOC RT_BIT(2)
2635	#define LSILOGICSCSI_SASIOUNIT0_PORT_DISCOVERY_IN_STATUS RT_BIT(3)
2636
2637	#define LSILOGICSCSI_SASIOUNIT0_PHY_RX_INVERTED RT_BIT(0)
2638	#define LSILOGICSCSI_SASIOUNIT0_PHY_TX_INVERTED RT_BIT(1)
2639	#define LSILOGICSCSI_SASIOUNIT0_PHY_DISABLED RT_BIT(2)
2640
2641	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SET(x) ((x) & 0x0F)
2642	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_GET(x) ((x) & 0x0F)
2643	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_UNKNOWN 0x00
2644	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_DISABLED 0x01
2645	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_FAILED 0x02
2646	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_SATA_OOB 0x03
2647	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_15GB 0x08
2648	#define LSILOGICSCSI_SASIOUNIT0_NEGOTIATED_RATE_30GB 0x09
2649
2650	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_SET(x) ((x) & 0x3)
2651	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_NO 0x0
2652	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_END 0x1
2653	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_EDGE_EXPANDER 0x2
2654	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2655
2656	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA_HOST RT_BIT(3)
2657	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_INITIATOR RT_BIT(4)
2658	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_INITIATOR RT_BIT(5)
2659	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_INITIATOR RT_BIT(6)
2660	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SATA RT_BIT(7)
2661	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SMP_TARGET RT_BIT(8)
2662	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_STP_TARGET RT_BIT(9)
2663	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SSP_TARGET RT_BIT(10)
2664	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2665	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_LSI RT_BIT(12)
2666	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_ATAPI_DEVICE RT_BIT(13)
2667	#define LSILOGICSCSI_SASIOUNIT0_DEVICE_SEP_DEVICE RT_BIT(14)
2668
2669	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_LOOP RT_BIT(0)
2670	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNADDRESSABLE RT_BIT(1)
2671	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SAME_SAS_ADDR RT_BIT(2)
2672	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXPANDER_ERROR RT_BIT(3)
2673	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_TIMEOUT RT_BIT(4)
2674	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_OOE RT_BIT(5)
2675	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_EXP_ROUTE_IDX RT_BIT(6)
2676	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_FUNC_FAILED RT_BIT(7)
2677	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SMP_CRC_ERROR RT_BIT(8)
2678	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_SUBTRSCTIVE_LNK RT_BIT(9)
2679	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_TBL_LNK RT_BIT(10)
2680	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_UNSUPPORTED_DEV RT_BIT(11)
2681	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MAX_SATA_TGTS RT_BIT(12)
2682	#define LSILOGICSCSI_SASIOUNIT0_DISCOVERY_STATUS_MULT_CTRLS RT_BIT(13)
2683
2684	/**
2685	* PHY entry for the SAS I/O unit page 1
2686	*/
2687	#pragma pack(1)
2688	typedef struct MptConfigurationPageSASIOUnit1PHY
2689	{
2690	/** Port number */
2691	uint8_t u8Port;
2692	/** Port flags */
2693	uint8_t u8PortFlags;
2694	/** Phy flags */
2695	uint8_t u8PhyFlags;
2696	/** Max link rate */
2697	uint8_t u8MaxMinLinkRate;
2698	/** Controller phy device info */
2699	uint32_t u32ControllerPhyDeviceInfo;
2700	/** Maximum target port connect time */
2701	uint16_t u16MaxTargetPortConnectTime;
2702	/** Reserved */
2703	uint16_t u16Reserved;
2704	} MptConfigurationPageSASIOUnit1PHY, *PMptConfigurationPageSASIOUnit1PHY;
2705	#pragma pack()
2706	AssertCompileSize(MptConfigurationPageSASIOUnit1PHY, 12);
2707
2708	/**
2709	* SAS I/O Unit page 1 - Read/Write
2710	*/
2711	#pragma pack(1)
2712	typedef struct MptConfigurationPageSASIOUnit1
2713	{
2714	/** Union. */
2715	union
2716	{
2717	/** Byte view - variable. */
2718	uint8_t abPageData[1];
2719	/** Field view. */
2720	struct
2721	{
2722	/** The omnipresent header. */
2723	MptExtendedConfigurationPageHeader ExtHeader;
2724	/** Control flags */
2725	uint16_t u16ControlFlags;
2726	/** maximum number of SATA targets */
2727	uint16_t u16MaxNumSATATargets;
2728	/** additional control flags */
2729	uint16_t u16AdditionalControlFlags;
2730	/** Reserved */
2731	uint16_t u16Reserved;
2732	/** Number of PHYs */
2733	uint8_t u8NumPhys;
2734	/** maximum SATA queue depth */
2735	uint8_t u8SATAMaxQDepth;
2736	/** Delay for reporting missing devices. */
2737	uint8_t u8ReportDeviceMissingDelay;
2738	/** I/O device missing delay */
2739	uint8_t u8IODeviceMissingDelay;
2740	/** Content for each physical port - variable depending on the number of ports */
2741	MptConfigurationPageSASIOUnit1PHY aPHY[1];
2742	} fields;
2743	} u;
2744	} MptConfigurationPageSASIOUnit1, *PMptConfigurationPageSASIOUnit1;
2745	#pragma pack()
2746	AssertCompileSize(MptConfigurationPageSASIOUnit1, 8+12+sizeof(MptConfigurationPageSASIOUnit1PHY));
2747
2748	#define LSILOGICSCSI_SASIOUNIT1_GET_SIZE(ports) (sizeof(MptConfigurationPageSASIOUnit1) + ((ports) - 1) * sizeof(MptConfigurationPageSASIOUnit1PHY))
2749
2750	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_CLEAR_SATA_AFFILIATION RT_BIT(0)
2751	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_FIRST_LEVEL_DISCOVERY_ONLY RT_BIT(1)
2752	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SUBTRACTIVE_LNK_ILLEGAL RT_BIT(2)
2753	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_IOC_ENABLE_HIGH_PHY RT_BIT(3)
2754	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED RT_BIT(4)
2755	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED RT_BIT(5)
2756	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED RT_BIT(6)
2757	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LBA48_REQUIRED RT_BIT(7)
2758	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_INIT_POSTPONED RT_BIT(8)
2759
2760	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SET(x) (((x) & 0x3) << 9)
2761	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_GET(x) (((x) >> 9) & 0x3)
2762	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS_AND_SATA 0x00
2763	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SAS 0x01
2764	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_DEVICE_SUPPORT_SATA 0x02
2765
2766	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_EXP_ADDR RT_BIT(11)
2767	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_SETTINGS_PRESERV_REQUIRED RT_BIT(12)
2768	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_15GB RT_BIT(13)
2769	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SATA_LIMIT_RATE_30GB RT_BIT(14)
2770	#define LSILOGICSCSI_SASIOUNIT1_CONTROL_SAS_SELF_TEST_ENABLED RT_BIT(15)
2771
2772	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_TBL_LNKS_ALLOW RT_BIT(0)
2773	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_NO_AFFIL RT_BIT(1)
2774	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_SELF_AFFIL RT_BIT(2)
2775	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_OTHER_AFFIL RT_BIT(3)
2776	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_RST_PORT_EN_ONLY RT_BIT(4)
2777	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_HIDE_NON_ZERO_PHYS RT_BIT(5)
2778	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_SATA_ASYNC_NOTIF RT_BIT(6)
2779	#define LSILOGICSCSI_SASIOUNIT1_ADDITIONAL_CONTROL_MULT_PORTS_ILL_SAME_DOMAIN RT_BIT(7)
2780
2781	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_UNITS_16_SEC RT_BIT(7)
2782	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_SET(x) ((x) & 0x7F)
2783	#define LSILOGICSCSI_SASIOUNIT1_MISSING_DEVICE_DELAY_GET(x) ((x) & 0x7F)
2784
2785	#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_AUTO RT_BIT(0)
2786	#define LSILOGICSCSI_SASIOUNIT1_PORT_CONFIGURATION_IOC1 RT_BIT(2)
2787
2788	#define LSILOGICSCSI_SASIOUNIT1_PHY_RX_INVERT RT_BIT(0)
2789	#define LSILOGICSCSI_SASIOUNIT1_PHY_TX_INVERT RT_BIT(1)
2790	#define LSILOGICSCSI_SASIOUNIT1_PHY_DISABLE RT_BIT(2)
2791
2792	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_SET(x) ((x) & 0x0F)
2793	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MIN_GET(x) ((x) & 0x0F)
2794	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_SET(x) (((x) & 0x0F) << 4)
2795	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_MAX_GET(x) ((x >> 4) & 0x0F)
2796	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_15GB 0x8
2797	#define LSILOGICSCSI_SASIOUNIT1_LINK_RATE_30GB 0x9
2798
2799	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_SET(x) ((x) & 0x3)
2800	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_GET(x) ((x) & 0x3)
2801	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_NO 0x0
2802	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_END 0x1
2803	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_EDGE_EXPANDER 0x2
2804	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2805	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_INITIATOR RT_BIT(4)
2806	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_INITIATOR RT_BIT(5)
2807	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_INITIATOR RT_BIT(6)
2808	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SMP_TARGET RT_BIT(8)
2809	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_STP_TARGET RT_BIT(9)
2810	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SSP_TARGET RT_BIT(10)
2811	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2812	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_LSI RT_BIT(12)
2813	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_ATAPI RT_BIT(13)
2814	#define LSILOGICSCSI_SASIOUNIT1_CTL_PHY_DEVICE_SEP RT_BIT(14)
2815
2816	/**
2817	* SAS I/O unit page 2 - Read/Write
2818	*/
2819	#pragma pack(1)
2820	typedef struct MptConfigurationPageSASIOUnit2
2821	{
2822	/** Union. */
2823	union
2824	{
2825	/** Byte view - variable. */
2826	uint8_t abPageData[1];
2827	/** Field view. */
2828	struct
2829	{
2830	/** The omnipresent header. */
2831	MptExtendedConfigurationPageHeader ExtHeader;
2832	/** Device numbers per enclosure */
2833	uint8_t u8NumDevsPerEnclosure;
2834	/** Boot device wait time */
2835	uint8_t u8BootDeviceWaitTime;
2836	/** Reserved */
2837	uint16_t u16Reserved;
2838	/** Maximum number of persistent Bus and target ID mappings */
2839	uint16_t u16MaxPersistentIDs;
2840	/** Number of persistent IDs used */
2841	uint16_t u16NumPersistentIDsUsed;
2842	/** Status */
2843	uint8_t u8Status;
2844	/** Flags */
2845	uint8_t u8Flags;
2846	/** Maximum number of physical mapped IDs */
2847	uint16_t u16MaxNumPhysicalMappedIDs;
2848	} fields;
2849	} u;
2850	} MptConfigurationPageSASIOUnit2, *PMptConfigurationPageSASIOUnit2;
2851	#pragma pack()
2852	AssertCompileSize(MptConfigurationPageSASIOUnit2, 20);
2853
2854	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_TBL_FULL RT_BIT(0)
2855	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_MAP_DISABLED RT_BIT(1)
2856	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_ENC_DEV_UNMAPPED RT_BIT(2)
2857	#define LSILOGICSCSI_SASIOUNIT2_STATUS_PERSISTENT_DEV_LIMIT_EXCEEDED RT_BIT(3)
2858
2859	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_MAP_DISABLE RT_BIT(0)
2860	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_SET(x) ((x & 0x7) << 1)
2861	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_GET(x) ((x >> 1) & 0x7)
2862	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_NO 0x0
2863	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_DIRECT_ATTACHED 0x1
2864	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_ENC 0x2
2865	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_PERSISTENT_PHYS_MAP_MODE_HOST 0x7
2866	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_RESERVE_TARGET_ID_ZERO RT_BIT(4)
2867	#define LSILOGICSCSI_SASIOUNIT2_FLAGS_START_SLOT_NUMBER_ONE RT_BIT(5)
2868
2869	/**
2870	* SAS I/O unit page 3 - Read/Write
2871	*/
2872	#pragma pack(1)
2873	typedef struct MptConfigurationPageSASIOUnit3
2874	{
2875	/** Union. */
2876	union
2877	{
2878	/** Byte view - variable. */
2879	uint8_t abPageData[1];
2880	/** Field view. */
2881	struct
2882	{
2883	/** The omnipresent header. */
2884	MptExtendedConfigurationPageHeader ExtHeader;
2885	/** Reserved */
2886	uint32_t u32Reserved;
2887	uint32_t u32MaxInvalidDwordCount;
2888	uint32_t u32InvalidDwordCountTime;
2889	uint32_t u32MaxRunningDisparityErrorCount;
2890	uint32_t u32RunningDisparityErrorTime;
2891	uint32_t u32MaxLossDwordSynchCount;
2892	uint32_t u32LossDwordSynchCountTime;
2893	uint32_t u32MaxPhysResetProblemCount;
2894	uint32_t u32PhyResetProblemTime;
2895	} fields;
2896	} u;
2897	} MptConfigurationPageSASIOUnit3, *PMptConfigurationPageSASIOUnit3;
2898	#pragma pack()
2899	AssertCompileSize(MptConfigurationPageSASIOUnit3, 44);
2900
2901	/**
2902	* SAS PHY page 0 - Readonly
2903	*/
2904	#pragma pack(1)
2905	typedef struct MptConfigurationPageSASPHY0
2906	{
2907	/** Union. */
2908	union
2909	{
2910	/** Byte view - variable. */
2911	uint8_t abPageData[1];
2912	/** Field view. */
2913	struct
2914	{
2915	/** The omnipresent header. */
2916	MptExtendedConfigurationPageHeader ExtHeader;
2917	/** Owner dev handle. */
2918	uint16_t u16OwnerDevHandle;
2919	/** Reserved */
2920	uint16_t u16Reserved0;
2921	/** SAS address */
2922	SASADDRESS SASAddress;
2923	/** Attached device handle */
2924	uint16_t u16AttachedDevHandle;
2925	/** Attached phy identifier */
2926	uint8_t u8AttachedPhyIdentifier;
2927	/** Reserved */
2928	uint8_t u8Reserved1;
2929	/** Attached device information */
2930	uint32_t u32AttachedDeviceInfo;
2931	/** Programmed link rate */
2932	uint8_t u8ProgrammedLinkRate;
2933	/** Hardware link rate */
2934	uint8_t u8HwLinkRate;
2935	/** Change count */
2936	uint8_t u8ChangeCount;
2937	/** Flags */
2938	uint8_t u8Flags;
2939	/** Phy information */
2940	uint32_t u32PhyInfo;
2941	} fields;
2942	} u;
2943	} MptConfigurationPageSASPHY0, *PMptConfigurationPageSASPHY0;
2944	#pragma pack()
2945	AssertCompileSize(MptConfigurationPageSASPHY0, 36);
2946
2947	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
2948	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
2949	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_NO 0x0
2950	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_END 0x1
2951	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
2952	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
2953	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
2954	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
2955	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
2956	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
2957	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
2958	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
2959	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
2960	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_LSI RT_BIT(12)
2961	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
2962	#define LSILOGICSCSI_SASPHY0_DEV_INFO_DEVICE_SEP RT_BIT(14)
2963
2964	/**
2965	* SAS PHY page 1 - Readonly
2966	*/
2967	#pragma pack(1)
2968	typedef struct MptConfigurationPageSASPHY1
2969	{
2970	/** Union. */
2971	union
2972	{
2973	/** Byte view - variable. */
2974	uint8_t abPageData[1];
2975	/** Field view. */
2976	struct
2977	{
2978	/** The omnipresent header. */
2979	MptExtendedConfigurationPageHeader ExtHeader;
2980	/** Reserved */
2981	uint32_t u32Reserved0;
2982	uint32_t u32InvalidDwordCound;
2983	uint32_t u32RunningDisparityErrorCount;
2984	uint32_t u32LossDwordSynchCount;
2985	uint32_t u32PhyResetProblemCount;
2986	} fields;
2987	} u;
2988	} MptConfigurationPageSASPHY1, *PMptConfigurationPageSASPHY1;
2989	#pragma pack()
2990	AssertCompileSize(MptConfigurationPageSASPHY1, 28);
2991
2992	/**
2993	* SAS Device page 0 - Readonly
2994	*/
2995	#pragma pack(1)
2996	typedef struct MptConfigurationPageSASDevice0
2997	{
2998	/** Union. */
2999	union
3000	{
3001	/** Byte view - variable. */
3002	uint8_t abPageData[1];
3003	/** Field view. */
3004	struct
3005	{
3006	/** The omnipresent header. */
3007	MptExtendedConfigurationPageHeader ExtHeader;
3008	/** Slot number */
3009	uint16_t u16Slot;
3010	/** Enclosure handle. */
3011	uint16_t u16EnclosureHandle;
3012	/** SAS address */
3013	SASADDRESS SASAddress;
3014	/** Parent device handle */
3015	uint16_t u16ParentDevHandle;
3016	/** Phy number */
3017	uint8_t u8PhyNum;
3018	/** Access status */
3019	uint8_t u8AccessStatus;
3020	/** Device handle */
3021	uint16_t u16DevHandle;
3022	/** Target ID */
3023	uint8_t u8TargetID;
3024	/** Bus */
3025	uint8_t u8Bus;
3026	/** Device info */
3027	uint32_t u32DeviceInfo;
3028	/** Flags */
3029	uint16_t u16Flags;
3030	/** Physical port */
3031	uint8_t u8PhysicalPort;
3032	/** Reserved */
3033	uint8_t u8Reserved0;
3034	} fields;
3035	} u;
3036	} MptConfigurationPageSASDevice0, *PMptConfigurationPageSASDevice0;
3037	#pragma pack()
3038	AssertCompileSize(MptConfigurationPageSASDevice0, 36);
3039
3040	#define LSILOGICSCSI_SASDEVICE0_STATUS_NO_ERRORS (0x00)
3041
3042	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_SET(x) ((x) & 0x3)
3043	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_GET(x) ((x) & 0x3)
3044	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_NO 0x0
3045	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_END 0x1
3046	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_EDGE_EXPANDER 0x2
3047	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_TYPE_FANOUT_EXPANDER 0x3
3048	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_INITIATOR RT_BIT(4)
3049	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_INITIATOR RT_BIT(5)
3050	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_INITIATOR RT_BIT(6)
3051	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SMP_TARGET RT_BIT(8)
3052	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_STP_TARGET RT_BIT(9)
3053	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SSP_TARGET RT_BIT(10)
3054	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_DIRECT_ATTACHED RT_BIT(11)
3055	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_LSI RT_BIT(12)
3056	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_ATAPI RT_BIT(13)
3057	#define LSILOGICSCSI_SASDEVICE0_DEV_INFO_DEVICE_SEP RT_BIT(14)
3058
3059	#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_PRESENT (RT_BIT(0))
3060	#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPED_TO_BUS_AND_TARGET_ID (RT_BIT(1))
3061	#define LSILOGICSCSI_SASDEVICE0_FLAGS_DEVICE_MAPPING_PERSISTENT (RT_BIT(2))
3062
3063	/**
3064	* SAS Device page 1 - Readonly
3065	*/
3066	#pragma pack(1)
3067	typedef struct MptConfigurationPageSASDevice1
3068	{
3069	/** Union. */
3070	union
3071	{
3072	/** Byte view - variable. */
3073	uint8_t abPageData[1];
3074	/** Field view. */
3075	struct
3076	{
3077	/** The omnipresent header. */
3078	MptExtendedConfigurationPageHeader ExtHeader;
3079	/** Reserved */
3080	uint32_t u32Reserved0;
3081	/** SAS address */
3082	SASADDRESS SASAddress;
3083	/** Reserved */
3084	uint32_t u32Reserved;
3085	/** Device handle */
3086	uint16_t u16DevHandle;
3087	/** Target ID */
3088	uint8_t u8TargetID;
3089	/** Bus */
3090	uint8_t u8Bus;
3091	/** Initial REgister device FIS */
3092	uint32_t au32InitialRegDeviceFIS[5];
3093	} fields;
3094	} u;
3095	} MptConfigurationPageSASDevice1, *PMptConfigurationPageSASDevice1;
3096	#pragma pack()
3097	AssertCompileSize(MptConfigurationPageSASDevice1, 48);
3098
3099	/**
3100	* SAS Device page 2 - Read/Write persistent
3101	*/
3102	#pragma pack(1)
3103	typedef struct MptConfigurationPageSASDevice2
3104	{
3105	/** Union. */
3106	union
3107	{
3108	/** Byte view - variable. */
3109	uint8_t abPageData[1];
3110	/** Field view. */
3111	struct
3112	{
3113	/** The omnipresent header. */
3114	MptExtendedConfigurationPageHeader ExtHeader;
3115	/** Physical identifier */
3116	SASADDRESS SASAddress;
3117	/** Enclosure mapping */
3118	uint32_t u32EnclosureMapping;
3119	} fields;
3120	} u;
3121	} MptConfigurationPageSASDevice2, *PMptConfigurationPageSASDevice2;
3122	#pragma pack()
3123	AssertCompileSize(MptConfigurationPageSASDevice2, 20);
3124
3125	/**
3126	* A device entitiy containing all pages.
3127	*/
3128	typedef struct MptSASDevice
3129	{
3130	/** Pointer to the next device if any. */
3131	struct MptSASDevice *pNext;
3132	/** Pointer to the previous device if any. */
3133	struct MptSASDevice *pPrev;
3134
3135	MptConfigurationPageSASDevice0 SASDevicePage0;
3136	MptConfigurationPageSASDevice1 SASDevicePage1;
3137	MptConfigurationPageSASDevice2 SASDevicePage2;
3138	} MptSASDevice, *PMptSASDevice;
3139
3140	/**
3141	* SAS Expander page 0 - Readonly
3142	*/
3143	#pragma pack(1)
3144	typedef struct MptConfigurationPageSASExpander0
3145	{
3146	/** Union. */
3147	union
3148	{
3149	/** Byte view - variable. */
3150	uint8_t abPageData[1];
3151	/** Field view. */
3152	struct
3153	{
3154	/** The omnipresent header. */
3155	MptExtendedConfigurationPageHeader ExtHeader;
3156	/** Physical port */
3157	uint8_t u8PhysicalPort;
3158	/** Reserved */
3159	uint8_t u8Reserved0;
3160	/** Enclosure handle */
3161	uint16_t u16EnclosureHandle;
3162	/** SAS address */
3163	SASADDRESS SASAddress;
3164	/** Discovery status */
3165	uint32_t u32DiscoveryStatus;
3166	/** Device handle. */
3167	uint16_t u16DevHandle;
3168	/** Parent device handle */
3169	uint16_t u16ParentDevHandle;
3170	/** Expander change count */
3171	uint16_t u16ExpanderChangeCount;
3172	/** Expander route indexes */
3173	uint16_t u16ExpanderRouteIndexes;
3174	/** Number of PHys in this expander */
3175	uint8_t u8NumPhys;
3176	/** SAS level */
3177	uint8_t u8SASLevel;
3178	/** Flags */
3179	uint8_t u8Flags;
3180	/** Reserved */
3181	uint8_t u8Reserved1;
3182	} fields;
3183	} u;
3184	} MptConfigurationPageSASExpander0, *PMptConfigurationPageSASExpander0;
3185	#pragma pack()
3186	AssertCompileSize(MptConfigurationPageSASExpander0, 36);
3187
3188	/**
3189	* SAS Expander page 1 - Readonly
3190	*/
3191	#pragma pack(1)
3192	typedef struct MptConfigurationPageSASExpander1
3193	{
3194	/** Union. */
3195	union
3196	{
3197	/** Byte view - variable. */
3198	uint8_t abPageData[1];
3199	/** Field view. */
3200	struct
3201	{
3202	/** The omnipresent header. */
3203	MptExtendedConfigurationPageHeader ExtHeader;
3204	/** Physical port */
3205	uint8_t u8PhysicalPort;
3206	/** Reserved */
3207	uint8_t u8Reserved0[3];
3208	/** Number of PHYs */
3209	uint8_t u8NumPhys;
3210	/** Number of the Phy the information in this page is for. */
3211	uint8_t u8Phy;
3212	/** Number of routing table entries */
3213	uint16_t u16NumTableEntriesProgrammed;
3214	/** Programmed link rate */
3215	uint8_t u8ProgrammedLinkRate;
3216	/** Hardware link rate */
3217	uint8_t u8HwLinkRate;
3218	/** Attached device handle */
3219	uint16_t u16AttachedDevHandle;
3220	/** Phy information */
3221	uint32_t u32PhyInfo;
3222	/** Attached device information */
3223	uint32_t u32AttachedDeviceInfo;
3224	/** Owner device handle. */
3225	uint16_t u16OwnerDevHandle;
3226	/** Change count */
3227	uint8_t u8ChangeCount;
3228	/** Negotiated link rate */
3229	uint8_t u8NegotiatedLinkRate;
3230	/** Phy identifier */
3231	uint8_t u8PhyIdentifier;
3232	/** Attached phy identifier */
3233	uint8_t u8AttachedPhyIdentifier;
3234	/** Reserved */
3235	uint8_t u8Reserved1;
3236	/** Discovery information */
3237	uint8_t u8DiscoveryInfo;
3238	/** Reserved */
3239	uint32_t u32Reserved;
3240	} fields;
3241	} u;
3242	} MptConfigurationPageSASExpander1, *PMptConfigurationPageSASExpander1;
3243	#pragma pack()
3244	AssertCompileSize(MptConfigurationPageSASExpander1, 40);
3245
3246	/**
3247	* Structure of all supported pages for the SCSI SPI controller.
3248	* Used to load the device state from older versions.
3249	*/
3250	typedef struct MptConfigurationPagesSupported_SSM_V2
3251	{
3252	MptConfigurationPageManufacturing0 ManufacturingPage0;
3253	MptConfigurationPageManufacturing1 ManufacturingPage1;
3254	MptConfigurationPageManufacturing2 ManufacturingPage2;
3255	MptConfigurationPageManufacturing3 ManufacturingPage3;
3256	MptConfigurationPageManufacturing4 ManufacturingPage4;
3257	MptConfigurationPageIOUnit0 IOUnitPage0;
3258	MptConfigurationPageIOUnit1 IOUnitPage1;
3259	MptConfigurationPageIOUnit2 IOUnitPage2;
3260	MptConfigurationPageIOUnit3 IOUnitPage3;
3261	MptConfigurationPageIOC0 IOCPage0;
3262	MptConfigurationPageIOC1 IOCPage1;
3263	MptConfigurationPageIOC2 IOCPage2;
3264	MptConfigurationPageIOC3 IOCPage3;
3265	MptConfigurationPageIOC4 IOCPage4;
3266	MptConfigurationPageIOC6 IOCPage6;
3267	struct
3268	{
3269	MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
3270	MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
3271	MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
3272	} aPortPages[1]; /* Currently only one port supported. */
3273	struct
3274	{
3275	struct
3276	{
3277	MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
3278	MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
3279	MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
3280	MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
3281	} aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
3282	} aBuses[1]; /* Only one bus at the moment. */
3283	} MptConfigurationPagesSupported_SSM_V2, *PMptConfigurationPagesSupported_SSM_V2;
3284
3285	typedef struct MptConfigurationPagesSpi
3286	{
3287	struct
3288	{
3289	MptConfigurationPageSCSISPIPort0 SCSISPIPortPage0;
3290	MptConfigurationPageSCSISPIPort1 SCSISPIPortPage1;
3291	MptConfigurationPageSCSISPIPort2 SCSISPIPortPage2;
3292	} aPortPages[1]; /* Currently only one port supported. */
3293	struct
3294	{
3295	struct
3296	{
3297	MptConfigurationPageSCSISPIDevice0 SCSISPIDevicePage0;
3298	MptConfigurationPageSCSISPIDevice1 SCSISPIDevicePage1;
3299	MptConfigurationPageSCSISPIDevice2 SCSISPIDevicePage2;
3300	MptConfigurationPageSCSISPIDevice3 SCSISPIDevicePage3;
3301	} aDevicePages[LSILOGICSCSI_PCI_SPI_DEVICES_MAX];
3302	} aBuses[1]; /* Only one bus at the moment. */
3303	} MptConfigurationPagesSpi, *PMptConfigurationPagesSpi;
3304
3305	typedef struct MptPHY
3306	{
3307	MptConfigurationPageSASPHY0 SASPHYPage0;
3308	MptConfigurationPageSASPHY1 SASPHYPage1;
3309	} MptPHY, *PMptPHY;
3310
3311	#pragma pack(1)
3312	typedef struct MptConfigurationPagesSas
3313	{
3314	/** Size of the manufacturing page 7 */
3315	uint32_t cbManufacturingPage7;
3316	/** Pointer to the manufacturing page 7 */
3317	PMptConfigurationPageManufacturing7 pManufacturingPage7;
3318	/** Size of the I/O unit page 0 */
3319	uint32_t cbSASIOUnitPage0;
3320	/** Pointer to the I/O unit page 0 */
3321	PMptConfigurationPageSASIOUnit0 pSASIOUnitPage0;
3322	/** Size of the I/O unit page 1 */
3323	uint32_t cbSASIOUnitPage1;
3324	/** Pointer to the I/O unit page 1 */
3325	PMptConfigurationPageSASIOUnit1 pSASIOUnitPage1;
3326	/** I/O unit page 2 */
3327	MptConfigurationPageSASIOUnit2 SASIOUnitPage2;
3328	/** I/O unit page 3 */
3329	MptConfigurationPageSASIOUnit3 SASIOUnitPage3;
3330
3331	/** Number of PHYs in the array. */
3332	uint32_t cPHYs;
3333	/** Pointer to an array of per PHYS pages. */
3334	R3PTRTYPE(PMptPHY) paPHYs;
3335
3336	/** Number of devices detected. */
3337	uint32_t cDevices;
3338	/** Pointer to the first SAS device. */
3339	R3PTRTYPE(PMptSASDevice) pSASDeviceHead;
3340	/** Pointer to the last SAS device. */
3341	R3PTRTYPE(PMptSASDevice) pSASDeviceTail;
3342	} MptConfigurationPagesSas, *PMptConfigurationPagesSas;
3343	#pragma pack()
3344
3345	/**
3346	* Structure of all supported pages for both controllers.
3347	*/
3348	typedef struct MptConfigurationPagesSupported
3349	{
3350	MptConfigurationPageManufacturing0 ManufacturingPage0;
3351	MptConfigurationPageManufacturing1 ManufacturingPage1;
3352	MptConfigurationPageManufacturing2 ManufacturingPage2;
3353	MptConfigurationPageManufacturing3 ManufacturingPage3;
3354	MptConfigurationPageManufacturing4 ManufacturingPage4;
3355	MptConfigurationPageManufacturing5 ManufacturingPage5;
3356	MptConfigurationPageManufacturing6 ManufacturingPage6;
3357	MptConfigurationPageManufacturing8 ManufacturingPage8;
3358	MptConfigurationPageManufacturing9 ManufacturingPage9;
3359	MptConfigurationPageManufacturing10 ManufacturingPage10;
3360	MptConfigurationPageIOUnit0 IOUnitPage0;
3361	MptConfigurationPageIOUnit1 IOUnitPage1;
3362	MptConfigurationPageIOUnit2 IOUnitPage2;
3363	MptConfigurationPageIOUnit3 IOUnitPage3;
3364	MptConfigurationPageIOUnit4 IOUnitPage4;
3365	MptConfigurationPageIOC0 IOCPage0;
3366	MptConfigurationPageIOC1 IOCPage1;
3367	MptConfigurationPageIOC2 IOCPage2;
3368	MptConfigurationPageIOC3 IOCPage3;
3369	MptConfigurationPageIOC4 IOCPage4;
3370	MptConfigurationPageIOC6 IOCPage6;
3371	/* BIOS page 0 is not described */
3372	MptConfigurationPageBIOS1 BIOSPage1;
3373	MptConfigurationPageBIOS2 BIOSPage2;
3374	/* BIOS page 3 is not described */
3375	MptConfigurationPageBIOS4 BIOSPage4;
3376
3377	/** Controller dependent data. */
3378	union
3379	{
3380	MptConfigurationPagesSpi SpiPages;
3381	MptConfigurationPagesSas SasPages;
3382	} u;
3383	} MptConfigurationPagesSupported, *PMptConfigurationPagesSupported;
3384
3385	/**
3386	* Initializes a page header.
3387	*/
3388	#define MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags) \
3389	(pg)->u.fields.Header.u8PageType = flags; \
3390	(pg)->u.fields.Header.u8PageNumber = nr; \
3391	(pg)->u.fields.Header.u8PageLength = sizeof(type) / 4
3392
3393	#define MPT_CONFIG_PAGE_HEADER_INIT_MANUFACTURING(pg, type, nr, flags) \
3394	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_MANUFACTURING)
3395
3396	#define MPT_CONFIG_PAGE_HEADER_INIT_IO_UNIT(pg, type, nr, flags) \
3397	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_IO_UNIT)
3398
3399	#define MPT_CONFIG_PAGE_HEADER_INIT_IOC(pg, type, nr, flags) \
3400	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_IOC)
3401
3402	#define MPT_CONFIG_PAGE_HEADER_INIT_BIOS(pg, type, nr, flags) \
3403	MPT_CONFIG_PAGE_HEADER_INIT(pg, type, nr, flags \| MPT_CONFIGURATION_PAGE_TYPE_BIOS)
3404
3405	/**
3406	* Initializes a extended page header.
3407	*/
3408	#define MPT_CONFIG_EXTENDED_PAGE_HEADER_INIT(pg, cb, nr, flags, exttype) \
3409	(pg)->u.fields.ExtHeader.u8PageType = flags \| MPT_CONFIGURATION_PAGE_TYPE_EXTENDED; \
3410	(pg)->u.fields.ExtHeader.u8PageNumber = nr; \
3411	(pg)->u.fields.ExtHeader.u8ExtPageType = exttype; \
3412	(pg)->u.fields.ExtHeader.u16ExtPageLength = cb / 4
3413
3414	/**
3415	* Possible SG element types.
3416	*/
3417	enum MPTSGENTRYTYPE
3418	{
3419	MPTSGENTRYTYPE_TRANSACTION_CONTEXT = 0x00,
3420	MPTSGENTRYTYPE_SIMPLE = 0x01,
3421	MPTSGENTRYTYPE_CHAIN = 0x03
3422	};
3423
3424	/**
3425	* Register interface.
3426	*/
3427
3428	/**
3429	* Defined states that the SCSI controller can have.
3430	*/
3431	typedef enum LSILOGICSTATE
3432	{
3433	/** Reset state. */
3434	LSILOGICSTATE_RESET = 0x00,
3435	/** Ready state. */
3436	LSILOGICSTATE_READY = 0x01,
3437	/** Operational state. */
3438	LSILOGICSTATE_OPERATIONAL = 0x02,
3439	/** Fault state. */
3440	LSILOGICSTATE_FAULT = 0x04,
3441	/** 32bit size hack */
3442	LSILOGICSTATE_32BIT_HACK = 0x7fffffff
3443	} LSILOGICSTATE;
3444
3445	/**
3446	* Which entity needs to initialize the controller
3447	* to get into the operational state.
3448	*/
3449	typedef enum LSILOGICWHOINIT
3450	{
3451	/** Not initialized. */
3452	LSILOGICWHOINIT_NOT_INITIALIZED = 0x00,
3453	/** System BIOS. */
3454	LSILOGICWHOINIT_SYSTEM_BIOS = 0x01,
3455	/** ROM Bios. */
3456	LSILOGICWHOINIT_ROM_BIOS = 0x02,
3457	/** PCI Peer. */
3458	LSILOGICWHOINIT_PCI_PEER = 0x03,
3459	/** Host driver. */
3460	LSILOGICWHOINIT_HOST_DRIVER = 0x04,
3461	/** Manufacturing. */
3462	LSILOGICWHOINIT_MANUFACTURING = 0x05,
3463	/** 32bit size hack. */
3464	LSILOGICWHOINIT_32BIT_HACK = 0x7fffffff
3465	} LSILOGICWHOINIT;
3466
3467
3468	/**
3469	* Doorbell state.
3470	*/
3471	typedef enum LSILOGICDOORBELLSTATE
3472	{
3473	/** Invalid value. */
3474	LSILOGICDOORBELLSTATE_INVALID = 0,
3475	/** Doorbell not in use. */
3476	LSILOGICDOORBELLSTATE_NOT_IN_USE,
3477	/** Reply frame removal, transfer number of entries, low 16bits. */
3478	LSILOGICDOORBELLSTATE_RFR_FRAME_COUNT_LOW,
3479	/** Reply frame removal, transfer number of entries, high 16bits. */
3480	LSILOGICDOORBELLSTATE_RFR_FRAME_COUNT_HIGH,
3481	/** Reply frame removal, remove next free frame, low part. */
3482	LSILOGICDOORBELLSTATE_RFR_NEXT_FRAME_LOW,
3483	/** Reply frame removal, remove next free frame, high part. */
3484	LSILOGICDOORBELLSTATE_RFR_NEXT_FRAME_HIGH,
3485	/** Function handshake. */
3486	LSILOGICDOORBELLSTATE_FN_HANDSHAKE,
3487	/** 32bit hack. */
3488	LSILOGICDOORBELLSTATE_32BIT_HACK = 0x7fffffff
3489	} LSILOGICDOORBELLSTATE;
3490	/** Pointer to a doorbell state. */
3491	typedef LSILOGICDOORBELLSTATE *PLSILOGICDOORBELLSTATE;
3492
3493
3494	/**
3495	* IOC status codes.
3496	*/
3497	#define LSILOGIC_IOCSTATUS_SUCCESS 0x0000
3498	#define LSILOGIC_IOCSTATUS_INVALID_FUNCTION 0x0001
3499	#define LSILOGIC_IOCSTATUS_BUSY 0x0002
3500	#define LSILOGIC_IOCSTATUS_INVALID_SGL 0x0003
3501	#define LSILOGIC_IOCSTATUS_INTERNAL_ERROR 0x0004
3502	#define LSILOGIC_IOCSTATUS_RESERVED 0x0005
3503	#define LSILOGIC_IOCSTATUS_INSUFFICIENT_RESOURCES 0x0006
3504	#define LSILOGIC_IOCSTATUS_INVALID_FIELD 0x0007
3505	#define LSILOGIC_IOCSTATUS_INVALID_STATE 0x0008
3506	#define LSILOGIC_IOCSTATUS_OP_STATE_NOT_SUPPOTED 0x0009
3507
3508	/**
3509	* Size of the I/O and MMIO space.
3510	*/
3511	#define LSILOGIC_PCI_SPACE_IO_SIZE 256
3512	#define LSILOGIC_PCI_SPACE_MEM_SIZE 128 * _1K
3513
3514	/**
3515	* Doorbell register - Used to get the status of the controller and
3516	* initialise it.
3517	*/
3518	#define LSILOGIC_REG_DOORBELL 0x00
3519	# define LSILOGIC_REG_DOORBELL_SET_STATE(enmState) (((enmState) & 0x0f) << 28)
3520	# define LSILOGIC_REG_DOORBELL_SET_USED(enmDoorbell) (((enmDoorbell != LSILOGICDOORBELLSTATE_NOT_IN_USE) ? 1 : 0) << 27)
3521	# define LSILOGIC_REG_DOORBELL_SET_WHOINIT(enmWhoInit) (((enmWhoInit) & 0x07) << 24)
3522	# define LSILOGIC_REG_DOORBELL_SET_FAULT_CODE(u16Code) (u16Code)
3523	# define LSILOGIC_REG_DOORBELL_GET_FUNCTION(x) (((x) & 0xff000000) >> 24)
3524	# define LSILOGIC_REG_DOORBELL_GET_SIZE(x) (((x) & 0x00ff0000) >> 16)
3525
3526	/**
3527	* Functions which can be passed through the system doorbell.
3528	*/
3529	#define LSILOGIC_DOORBELL_FUNCTION_IOC_MSG_UNIT_RESET 0x40
3530	#define LSILOGIC_DOORBELL_FUNCTION_IO_UNIT_RESET 0x41
3531	#define LSILOGIC_DOORBELL_FUNCTION_HANDSHAKE 0x42
3532	#define LSILOGIC_DOORBELL_FUNCTION_REPLY_FRAME_REMOVAL 0x43
3533
3534	/**
3535	* Write sequence register for the diagnostic register.
3536	*/
3537	#define LSILOGIC_REG_WRITE_SEQUENCE 0x04
3538
3539	/**
3540	* Diagnostic register - used to reset the controller.
3541	*/
3542	#define LSILOGIC_REG_HOST_DIAGNOSTIC 0x08
3543	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_MEM_ENABLE (RT_BIT(0))
3544	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DISABLE_ARM (RT_BIT(1))
3545	# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_ADAPTER (RT_BIT(2))
3546	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DIAG_RW_ENABLE (RT_BIT(4))
3547	# define LSILOGIC_REG_HOST_DIAGNOSTIC_RESET_HISTORY (RT_BIT(5))
3548	# define LSILOGIC_REG_HOST_DIAGNOSTIC_FLASH_BAD_SIG (RT_BIT(6))
3549	# define LSILOGIC_REG_HOST_DIAGNOSTIC_DRWE (RT_BIT(7))
3550	# define LSILOGIC_REG_HOST_DIAGNOSTIC_PREVENT_IOC_BOOT (RT_BIT(9))
3551	# define LSILOGIC_REG_HOST_DIAGNOSTIC_CLEAR_FLASH_BAD_SIG (RT_BIT(10))
3552
3553	#define LSILOGIC_REG_TEST_BASE_ADDRESS 0x0c
3554	#define LSILOGIC_REG_DIAG_RW_DATA 0x10
3555	#define LSILOGIC_REG_DIAG_RW_ADDRESS 0x14
3556
3557	/**
3558	* Interrupt status register.
3559	*/
3560	#define LSILOGIC_REG_HOST_INTR_STATUS 0x30
3561	# define LSILOGIC_REG_HOST_INTR_STATUS_W_MASK (RT_BIT(3))
3562	# define LSILOGIC_REG_HOST_INTR_STATUS_DOORBELL_STS (RT_BIT(31))
3563	# define LSILOGIC_REG_HOST_INTR_STATUS_REPLY_INTR (RT_BIT(3))
3564	# define LSILOGIC_REG_HOST_INTR_STATUS_SYSTEM_DOORBELL (RT_BIT(0))
3565
3566	/**
3567	* Interrupt mask register.
3568	*/
3569	#define LSILOGIC_REG_HOST_INTR_MASK 0x34
3570	# define LSILOGIC_REG_HOST_INTR_MASK_W_MASK (RT_BIT(0) \| RT_BIT(3) \| RT_BIT(8) \| RT_BIT(9))
3571	# define LSILOGIC_REG_HOST_INTR_MASK_IRQ_ROUTING (RT_BIT(8) \| RT_BIT(9))
3572	# define LSILOGIC_REG_HOST_INTR_MASK_DOORBELL RT_BIT(0)
3573	# define LSILOGIC_REG_HOST_INTR_MASK_REPLY RT_BIT(3)
3574
3575	/**
3576	* Queue registers.
3577	*/
3578	#define LSILOGIC_REG_REQUEST_QUEUE 0x40
3579	#define LSILOGIC_REG_REPLY_QUEUE 0x44
3580
3581	#endif /* __DEVLSILOGICSCSI_H__ */

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source: vbox/trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.h@ 45795

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