1 | /* $Id: Virtio.cpp 29917 2010-05-31 16:05:25Z vboxsync $ */
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2 | /** @file
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3 | * Virtio - Virtio Common Functions (VRing, VQueue, Virtio PCI)
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2009-2010 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | */
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17 |
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18 |
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19 | #define LOG_GROUP LOG_GROUP_DEV_VIRTIO
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20 |
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21 | #include <iprt/param.h>
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22 | #include <iprt/uuid.h>
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23 | #include <VBox/pdmdev.h>
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24 | #include "Virtio.h"
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25 |
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26 | #define INSTANCE(pState) pState->szInstance
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27 | #define IFACE_TO_STATE(pIface, ifaceName) ((VPCISTATE *)((char*)pIface - RT_OFFSETOF(VPCISTATE, ifaceName)))
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28 |
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29 | #ifdef LOG_ENABLED
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30 | #define QUEUENAME(s, q) (q->pcszName)
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31 | #endif /* DEBUG */
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32 |
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33 |
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34 |
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35 | #ifndef VBOX_DEVICE_STRUCT_TESTCASE
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36 |
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37 | //RT_C_DECLS_BEGIN
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38 | //RT_C_DECLS_END
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39 |
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40 |
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41 | static void vqueueReset(PVQUEUE pQueue)
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42 | {
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43 | pQueue->VRing.addrDescriptors = 0;
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44 | pQueue->VRing.addrAvail = 0;
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45 | pQueue->VRing.addrUsed = 0;
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46 | pQueue->uNextAvailIndex = 0;
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47 | pQueue->uNextUsedIndex = 0;
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48 | pQueue->uPageNumber = 0;
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49 | }
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50 |
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51 | static void vqueueInit(PVQUEUE pQueue, uint32_t uPageNumber)
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52 | {
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53 | pQueue->VRing.addrDescriptors = (uint64_t)uPageNumber << PAGE_SHIFT;
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54 | pQueue->VRing.addrAvail = pQueue->VRing.addrDescriptors
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55 | + sizeof(VRINGDESC) * pQueue->VRing.uSize;
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56 | pQueue->VRing.addrUsed = RT_ALIGN(
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57 | pQueue->VRing.addrAvail + RT_OFFSETOF(VRINGAVAIL, auRing[pQueue->VRing.uSize]),
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58 | PAGE_SIZE); /* The used ring must start from the next page. */
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59 | pQueue->uNextAvailIndex = 0;
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60 | pQueue->uNextUsedIndex = 0;
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61 | }
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62 |
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63 | // void vqueueElemFree(PVQUEUEELEM pElem)
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64 | // {
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65 | // }
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66 |
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67 | void vringReadDesc(PVPCISTATE pState, PVRING pVRing, uint32_t uIndex, PVRINGDESC pDesc)
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68 | {
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69 | //Log(("%s vringReadDesc: ring=%p idx=%u\n", INSTANCE(pState), pVRing, uIndex));
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70 | PDMDevHlpPhysRead(pState->CTX_SUFF(pDevIns),
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71 | pVRing->addrDescriptors + sizeof(VRINGDESC) * (uIndex % pVRing->uSize),
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72 | pDesc, sizeof(VRINGDESC));
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73 | }
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74 |
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75 | uint16_t vringReadAvail(PVPCISTATE pState, PVRING pVRing, uint32_t uIndex)
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76 | {
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77 | uint16_t tmp;
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78 |
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79 | PDMDevHlpPhysRead(pState->CTX_SUFF(pDevIns),
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80 | pVRing->addrAvail + RT_OFFSETOF(VRINGAVAIL, auRing[uIndex % pVRing->uSize]),
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81 | &tmp, sizeof(tmp));
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82 | return tmp;
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83 | }
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84 |
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85 | uint16_t vringReadAvailFlags(PVPCISTATE pState, PVRING pVRing)
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86 | {
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87 | uint16_t tmp;
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88 |
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89 | PDMDevHlpPhysRead(pState->CTX_SUFF(pDevIns),
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90 | pVRing->addrAvail + RT_OFFSETOF(VRINGAVAIL, uFlags),
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91 | &tmp, sizeof(tmp));
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92 | return tmp;
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93 | }
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94 |
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95 | void vringSetNotification(PVPCISTATE pState, PVRING pVRing, bool fEnabled)
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96 | {
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97 | uint16_t tmp;
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98 |
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99 | PDMDevHlpPhysRead(pState->CTX_SUFF(pDevIns),
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100 | pVRing->addrUsed + RT_OFFSETOF(VRINGUSED, uFlags),
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101 | &tmp, sizeof(tmp));
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102 |
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103 | if (fEnabled)
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104 | tmp &= ~ VRINGUSED_F_NO_NOTIFY;
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105 | else
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106 | tmp |= VRINGUSED_F_NO_NOTIFY;
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107 |
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108 | PDMDevHlpPhysWrite(pState->CTX_SUFF(pDevIns),
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109 | pVRing->addrUsed + RT_OFFSETOF(VRINGUSED, uFlags),
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110 | &tmp, sizeof(tmp));
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111 | }
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112 |
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113 | bool vqueueGet(PVPCISTATE pState, PVQUEUE pQueue, PVQUEUEELEM pElem)
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114 | {
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115 | if (vqueueIsEmpty(pState, pQueue))
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116 | return false;
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117 |
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118 | pElem->nIn = pElem->nOut = 0;
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119 |
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120 | Log2(("%s vqueueGet: %s avail_idx=%u\n", INSTANCE(pState),
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121 | QUEUENAME(pState, pQueue), pQueue->uNextAvailIndex));
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122 |
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123 | VRINGDESC desc;
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124 | uint16_t idx = vringReadAvail(pState, &pQueue->VRing, pQueue->uNextAvailIndex++);
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125 | pElem->uIndex = idx;
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126 | do
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127 | {
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128 | VQUEUESEG *pSeg;
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129 |
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130 | vringReadDesc(pState, &pQueue->VRing, idx, &desc);
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131 | if (desc.u16Flags & VRINGDESC_F_WRITE)
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132 | {
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133 | Log2(("%s vqueueGet: %s IN seg=%u desc_idx=%u addr=%p cb=%u\n", INSTANCE(pState),
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134 | QUEUENAME(pState, pQueue), pElem->nIn, idx, desc.u64Addr, desc.uLen));
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135 | pSeg = &pElem->aSegsIn[pElem->nIn++];
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136 | }
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137 | else
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138 | {
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139 | Log2(("%s vqueueGet: %s OUT seg=%u desc_idx=%u addr=%p cb=%u\n", INSTANCE(pState),
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140 | QUEUENAME(pState, pQueue), pElem->nOut, idx, desc.u64Addr, desc.uLen));
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141 | pSeg = &pElem->aSegsOut[pElem->nOut++];
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142 | }
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143 |
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144 | pSeg->addr = desc.u64Addr;
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145 | pSeg->cb = desc.uLen;
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146 | pSeg->pv = NULL;
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147 |
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148 | idx = desc.u16Next;
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149 | } while (desc.u16Flags & VRINGDESC_F_NEXT);
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150 |
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151 | Log2(("%s vqueueGet: %s head_desc_idx=%u nIn=%u nOut=%u\n", INSTANCE(pState),
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152 | QUEUENAME(pState, pQueue), pElem->uIndex, pElem->nIn, pElem->nOut));
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153 | return true;
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154 | }
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155 |
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156 | uint16_t vringReadUsedIndex(PVPCISTATE pState, PVRING pVRing)
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157 | {
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158 | uint16_t tmp;
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159 | PDMDevHlpPhysRead(pState->CTX_SUFF(pDevIns),
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160 | pVRing->addrUsed + RT_OFFSETOF(VRINGUSED, uIndex),
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161 | &tmp, sizeof(tmp));
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162 | return tmp;
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163 | }
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164 |
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165 | void vringWriteUsedIndex(PVPCISTATE pState, PVRING pVRing, uint16_t u16Value)
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166 | {
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167 | PDMDevHlpPhysWrite(pState->CTX_SUFF(pDevIns),
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168 | pVRing->addrUsed + RT_OFFSETOF(VRINGUSED, uIndex),
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169 | &u16Value, sizeof(u16Value));
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170 | }
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171 |
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172 | void vringWriteUsedElem(PVPCISTATE pState, PVRING pVRing, uint32_t uIndex, uint32_t uId, uint32_t uLen)
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173 | {
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174 | VRINGUSEDELEM elem;
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175 |
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176 | elem.uId = uId;
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177 | elem.uLen = uLen;
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178 | PDMDevHlpPhysWrite(pState->CTX_SUFF(pDevIns),
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179 | pVRing->addrUsed + RT_OFFSETOF(VRINGUSED, aRing[uIndex % pVRing->uSize]),
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180 | &elem, sizeof(elem));
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181 | }
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182 |
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183 | void vqueuePut(PVPCISTATE pState, PVQUEUE pQueue, PVQUEUEELEM pElem, uint32_t uLen)
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184 | {
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185 | unsigned int i, uOffset;
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186 |
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187 | Log2(("%s vqueuePut: %s desc_idx=%u acb=%u\n", INSTANCE(pState),
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188 | QUEUENAME(pState, pQueue), pElem->uIndex, uLen));
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189 | for (i = uOffset = 0; i < pElem->nIn && uOffset < uLen; i++)
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190 | {
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191 | uint32_t cbSegLen = RT_MIN(uLen - uOffset, pElem->aSegsIn[i].cb);
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192 | if (pElem->aSegsIn[i].pv)
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193 | {
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194 | Log2(("%s vqueuePut: %s used_idx=%u seg=%u addr=%p pv=%p cb=%u acb=%u\n", INSTANCE(pState),
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195 | QUEUENAME(pState, pQueue), pQueue->uNextUsedIndex, i, pElem->aSegsIn[i].addr, pElem->aSegsIn[i].pv, pElem->aSegsIn[i].cb, cbSegLen));
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196 | PDMDevHlpPhysWrite(pState->CTX_SUFF(pDevIns), pElem->aSegsIn[i].addr,
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197 | pElem->aSegsIn[i].pv, cbSegLen);
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198 | }
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199 | uOffset += cbSegLen;
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200 | }
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201 |
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202 | Log2(("%s vqueuePut: %s used_idx=%u guest_used_idx=%u id=%u len=%u\n", INSTANCE(pState),
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203 | QUEUENAME(pState, pQueue), pQueue->uNextUsedIndex, vringReadUsedIndex(pState, &pQueue->VRing), pElem->uIndex, uLen));
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204 | vringWriteUsedElem(pState, &pQueue->VRing, pQueue->uNextUsedIndex++, pElem->uIndex, uLen);
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205 | }
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206 |
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207 | void vqueueNotify(PVPCISTATE pState, PVQUEUE pQueue)
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208 | {
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209 | LogFlow(("%s vqueueNotify: %s availFlags=%x guestFeatures=%x vqueue is %sempty\n",
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210 | INSTANCE(pState), QUEUENAME(pState, pQueue),
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211 | vringReadAvailFlags(pState, &pQueue->VRing),
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212 | pState->uGuestFeatures, vqueueIsEmpty(pState, pQueue)?"":"not "));
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213 | if (!(vringReadAvailFlags(pState, &pQueue->VRing) & VRINGAVAIL_F_NO_INTERRUPT)
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214 | || ((pState->uGuestFeatures & VPCI_F_NOTIFY_ON_EMPTY) && vqueueIsEmpty(pState, pQueue)))
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215 | {
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216 | int rc = vpciRaiseInterrupt(pState, VERR_INTERNAL_ERROR, VPCI_ISR_QUEUE);
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217 | if (RT_FAILURE(rc))
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218 | Log(("%s vqueueNotify: Failed to raise an interrupt (%Rrc).\n", INSTANCE(pState), rc));
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219 | }
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220 | else
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221 | {
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222 | STAM_COUNTER_INC(&pState->StatIntsSkipped);
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223 | }
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224 |
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225 | }
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226 |
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227 | void vqueueSync(PVPCISTATE pState, PVQUEUE pQueue)
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228 | {
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229 | Log2(("%s vqueueSync: %s old_used_idx=%u new_used_idx=%u\n", INSTANCE(pState),
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230 | QUEUENAME(pState, pQueue), vringReadUsedIndex(pState, &pQueue->VRing), pQueue->uNextUsedIndex));
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231 | vringWriteUsedIndex(pState, &pQueue->VRing, pQueue->uNextUsedIndex);
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232 | vqueueNotify(pState, pQueue);
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233 | }
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234 |
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235 | void vpciReset(PVPCISTATE pState)
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236 | {
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237 | pState->uGuestFeatures = 0;
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238 | pState->uQueueSelector = 0;
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239 | pState->uStatus = 0;
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240 | pState->uISR = 0;
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241 |
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242 | for (unsigned i = 0; i < pState->nQueues; i++)
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243 | vqueueReset(&pState->Queues[i]);
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244 | }
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245 |
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246 |
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247 | /**
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248 | * Raise interrupt.
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249 | *
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250 | * @param pState The device state structure.
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251 | * @param rcBusy Status code to return when the critical section is busy.
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252 | * @param u8IntCause Interrupt cause bit mask to set in PCI ISR port.
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253 | */
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254 | int vpciRaiseInterrupt(VPCISTATE *pState, int rcBusy, uint8_t u8IntCause)
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255 | {
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256 | // int rc = vpciCsEnter(pState, rcBusy);
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257 | // if (RT_UNLIKELY(rc != VINF_SUCCESS))
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258 | // return rc;
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259 |
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260 | STAM_COUNTER_INC(&pState->StatIntsRaised);
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261 | LogFlow(("%s vpciRaiseInterrupt: u8IntCause=%x\n",
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262 | INSTANCE(pState), u8IntCause));
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263 |
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264 | pState->uISR |= u8IntCause;
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265 | PDMDevHlpPCISetIrq(pState->CTX_SUFF(pDevIns), 0, 1);
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266 | // vpciCsLeave(pState);
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267 | return VINF_SUCCESS;
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268 | }
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269 |
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270 | /**
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271 | * Lower interrupt.
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272 | *
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273 | * @param pState The device state structure.
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274 | */
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275 | PDMBOTHCBDECL(void) vpciLowerInterrupt(VPCISTATE *pState)
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276 | {
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277 | LogFlow(("%s vpciLowerInterrupt\n", INSTANCE(pState)));
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278 | PDMDevHlpPCISetIrq(pState->CTX_SUFF(pDevIns), 0, 0);
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279 | }
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280 |
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281 | DECLINLINE(uint32_t) vpciGetHostFeatures(PVPCISTATE pState,
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282 | PFNGETHOSTFEATURES pfnGetHostFeatures)
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283 | {
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284 | return pfnGetHostFeatures(pState)
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285 | | VPCI_F_NOTIFY_ON_EMPTY;
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286 | }
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287 |
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288 | /**
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289 | * Port I/O Handler for IN operations.
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290 | *
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291 | * @returns VBox status code.
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292 | *
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293 | * @param pDevIns The device instance.
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294 | * @param pvUser Pointer to the device state structure.
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295 | * @param port Port number used for the IN operation.
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296 | * @param pu32 Where to store the result.
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297 | * @param cb Number of bytes read.
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298 | * @thread EMT
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299 | */
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300 | int vpciIOPortIn(PPDMDEVINS pDevIns,
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301 | void *pvUser,
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302 | RTIOPORT port,
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303 | uint32_t *pu32,
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304 | unsigned cb,
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305 | PFNGETHOSTFEATURES pfnGetHostFeatures,
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306 | PFNGETCONFIG pfnGetConfig)
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307 | {
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308 | VPCISTATE *pState = PDMINS_2_DATA(pDevIns, VPCISTATE *);
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309 | int rc = VINF_SUCCESS;
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310 | const char *szInst = INSTANCE(pState);
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311 | STAM_PROFILE_ADV_START(&pState->CTXSUFF(StatIORead), a);
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312 |
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313 | /*
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314 | * We probably do not need to enter critical section when reading registers
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315 | * as the most of them are either constant or being changed during
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316 | * initialization only, the exception being ISR which can be raced by all
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317 | * threads but I see no big harm in it. It also happens to be the most read
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318 | * register as it gets read in interrupt handler. By dropping cs protection
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319 | * here we gain the ability to deliver RX packets to the guest while TX is
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320 | * holding cs transmitting queued packets.
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321 | *
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322 | rc = vpciCsEnter(pState, VINF_IOM_HC_IOPORT_READ);
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323 | if (RT_UNLIKELY(rc != VINF_SUCCESS))
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324 | {
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325 | STAM_PROFILE_ADV_STOP(&pState->CTXSUFF(StatIORead), a);
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326 | return rc;
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327 | }*/
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328 |
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329 | port -= pState->addrIOPort;
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330 | switch (port)
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331 | {
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332 | case VPCI_HOST_FEATURES:
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333 | /* Tell the guest what features we support. */
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334 | *pu32 = vpciGetHostFeatures(pState, pfnGetHostFeatures)
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335 | | VPCI_F_BAD_FEATURE;
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336 | break;
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337 |
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338 | case VPCI_GUEST_FEATURES:
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339 | *pu32 = pState->uGuestFeatures;
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340 | break;
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341 |
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342 | case VPCI_QUEUE_PFN:
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343 | *pu32 = pState->Queues[pState->uQueueSelector].uPageNumber;
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344 | break;
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345 |
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346 | case VPCI_QUEUE_NUM:
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347 | Assert(cb == 2);
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348 | *(uint16_t*)pu32 = pState->Queues[pState->uQueueSelector].VRing.uSize;
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349 | break;
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350 |
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351 | case VPCI_QUEUE_SEL:
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352 | Assert(cb == 2);
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353 | *(uint16_t*)pu32 = pState->uQueueSelector;
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354 | break;
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355 |
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356 | case VPCI_STATUS:
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357 | Assert(cb == 1);
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358 | *(uint8_t*)pu32 = pState->uStatus;
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359 | break;
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360 |
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361 | case VPCI_ISR:
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362 | Assert(cb == 1);
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363 | *(uint8_t*)pu32 = pState->uISR;
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364 | pState->uISR = 0; /* read clears all interrupts */
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365 | vpciLowerInterrupt(pState);
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366 | break;
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367 |
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368 | default:
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369 | if (port >= VPCI_CONFIG)
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370 | {
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371 | rc = pfnGetConfig(pState, port - VPCI_CONFIG, cb, pu32);
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372 | }
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373 | else
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374 | {
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375 | *pu32 = 0xFFFFFFFF;
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376 | rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "%s vpciIOPortIn: "
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377 | "no valid port at offset port=%RTiop "
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378 | "cb=%08x\n", szInst, port, cb);
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379 | }
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380 | break;
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381 | }
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382 | Log3(("%s vpciIOPortIn: At %RTiop in %0*x\n",
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383 | szInst, port, cb*2, *pu32));
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384 | STAM_PROFILE_ADV_STOP(&pState->CTXSUFF(StatIORead), a);
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385 | //vpciCsLeave(pState);
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386 | return rc;
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387 | }
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388 |
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389 |
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390 | /**
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391 | * Port I/O Handler for OUT operations.
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392 | *
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393 | * @returns VBox status code.
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394 | *
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395 | * @param pDevIns The device instance.
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396 | * @param pvUser User argument.
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397 | * @param Port Port number used for the IN operation.
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398 | * @param u32 The value to output.
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399 | * @param cb The value size in bytes.
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400 | * @thread EMT
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401 | */
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402 | int vpciIOPortOut(PPDMDEVINS pDevIns,
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403 | void *pvUser,
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404 | RTIOPORT port,
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405 | uint32_t u32,
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406 | unsigned cb,
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407 | PFNGETHOSTMINIMALFEATURES pfnGetHostMinimalFeatures,
|
---|
408 | PFNGETHOSTFEATURES pfnGetHostFeatures,
|
---|
409 | PFNSETHOSTFEATURES pfnSetHostFeatures,
|
---|
410 | PFNRESET pfnReset,
|
---|
411 | PFNREADY pfnReady,
|
---|
412 | PFNSETCONFIG pfnSetConfig)
|
---|
413 |
|
---|
414 | {
|
---|
415 | VPCISTATE *pState = PDMINS_2_DATA(pDevIns, VPCISTATE *);
|
---|
416 | int rc = VINF_SUCCESS;
|
---|
417 | const char *szInst = INSTANCE(pState);
|
---|
418 | bool fHasBecomeReady;
|
---|
419 | STAM_PROFILE_ADV_START(&pState->CTXSUFF(StatIOWrite), a);
|
---|
420 |
|
---|
421 | port -= pState->addrIOPort;
|
---|
422 | Log3(("%s virtioIOPortOut: At %RTiop out %0*x\n", szInst, port, cb*2, u32));
|
---|
423 |
|
---|
424 | switch (port)
|
---|
425 | {
|
---|
426 | case VPCI_GUEST_FEATURES:
|
---|
427 | /* Check if the guest negotiates properly, fall back to basics if it does not. */
|
---|
428 | if (VPCI_F_BAD_FEATURE & u32)
|
---|
429 | {
|
---|
430 | Log(("%s WARNING! Guest failed to negotiate properly (guest=%x)\n",
|
---|
431 | INSTANCE(pState), u32));
|
---|
432 | pState->uGuestFeatures = pfnGetHostMinimalFeatures(pState);
|
---|
433 | }
|
---|
434 | /* The guest may potentially desire features we don't support! */
|
---|
435 | else if (~vpciGetHostFeatures(pState, pfnGetHostFeatures) & u32)
|
---|
436 | {
|
---|
437 | Log(("%s Guest asked for features host does not support! (host=%x guest=%x)\n",
|
---|
438 | INSTANCE(pState),
|
---|
439 | vpciGetHostFeatures(pState, pfnGetHostFeatures), u32));
|
---|
440 | pState->uGuestFeatures =
|
---|
441 | vpciGetHostFeatures(pState, pfnGetHostFeatures);
|
---|
442 | }
|
---|
443 | else
|
---|
444 | pState->uGuestFeatures = u32;
|
---|
445 | pfnSetHostFeatures(pState, pState->uGuestFeatures);
|
---|
446 | break;
|
---|
447 |
|
---|
448 | case VPCI_QUEUE_PFN:
|
---|
449 | /*
|
---|
450 | * The guest is responsible for allocating the pages for queues,
|
---|
451 | * here it provides us with the page number of descriptor table.
|
---|
452 | * Note that we provide the size of the queue to the guest via
|
---|
453 | * VIRTIO_PCI_QUEUE_NUM.
|
---|
454 | */
|
---|
455 | pState->Queues[pState->uQueueSelector].uPageNumber = u32;
|
---|
456 | if (u32)
|
---|
457 | vqueueInit(&pState->Queues[pState->uQueueSelector], u32);
|
---|
458 | else
|
---|
459 | rc = pfnReset(pState);
|
---|
460 | break;
|
---|
461 |
|
---|
462 | case VPCI_QUEUE_SEL:
|
---|
463 | Assert(cb == 2);
|
---|
464 | u32 &= 0xFFFF;
|
---|
465 | if (u32 < pState->nQueues)
|
---|
466 | pState->uQueueSelector = u32;
|
---|
467 | else
|
---|
468 | Log3(("%s vpciIOPortOut: Invalid queue selector %08x\n", szInst, u32));
|
---|
469 | break;
|
---|
470 |
|
---|
471 | case VPCI_QUEUE_NOTIFY:
|
---|
472 | #ifdef IN_RING3
|
---|
473 | Assert(cb == 2);
|
---|
474 | u32 &= 0xFFFF;
|
---|
475 | if (u32 < pState->nQueues)
|
---|
476 | if (pState->Queues[u32].VRing.addrDescriptors)
|
---|
477 | {
|
---|
478 | // rc = vpciCsEnter(pState, VERR_SEM_BUSY);
|
---|
479 | // if (RT_LIKELY(rc == VINF_SUCCESS))
|
---|
480 | // {
|
---|
481 | pState->Queues[u32].pfnCallback(pState, &pState->Queues[u32]);
|
---|
482 | // vpciCsLeave(pState);
|
---|
483 | // }
|
---|
484 | }
|
---|
485 | else
|
---|
486 | Log(("%s The queue (#%d) being notified has not been initialized.\n",
|
---|
487 | INSTANCE(pState), u32));
|
---|
488 | else
|
---|
489 | Log(("%s Invalid queue number (%d)\n", INSTANCE(pState), u32));
|
---|
490 | #else
|
---|
491 | rc = VINF_IOM_HC_IOPORT_WRITE;
|
---|
492 | #endif
|
---|
493 | break;
|
---|
494 |
|
---|
495 | case VPCI_STATUS:
|
---|
496 | Assert(cb == 1);
|
---|
497 | u32 &= 0xFF;
|
---|
498 | fHasBecomeReady = !(pState->uStatus & VPCI_STATUS_DRV_OK) && (u32 & VPCI_STATUS_DRV_OK);
|
---|
499 | pState->uStatus = u32;
|
---|
500 | /* Writing 0 to the status port triggers device reset. */
|
---|
501 | if (u32 == 0)
|
---|
502 | rc = pfnReset(pState);
|
---|
503 | else if (fHasBecomeReady)
|
---|
504 | pfnReady(pState);
|
---|
505 | break;
|
---|
506 |
|
---|
507 | default:
|
---|
508 | if (port >= VPCI_CONFIG)
|
---|
509 | rc = pfnSetConfig(pState, port - VPCI_CONFIG, cb, &u32);
|
---|
510 | else
|
---|
511 | rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "%s vpciIOPortOut: no valid port at offset port=%RTiop cb=%08x\n", szInst, port, cb);
|
---|
512 | break;
|
---|
513 | }
|
---|
514 |
|
---|
515 | STAM_PROFILE_ADV_STOP(&pState->CTXSUFF(StatIOWrite), a);
|
---|
516 | return rc;
|
---|
517 | }
|
---|
518 |
|
---|
519 | #ifdef IN_RING3
|
---|
520 |
|
---|
521 | /**
|
---|
522 | * @interface_method_impl{PDMIBASE,pfnQueryInterface}
|
---|
523 | */
|
---|
524 | void *vpciQueryInterface(struct PDMIBASE *pInterface, const char *pszIID)
|
---|
525 | {
|
---|
526 | VPCISTATE *pThis = IFACE_TO_STATE(pInterface, IBase);
|
---|
527 | Assert(&pThis->IBase == pInterface);
|
---|
528 |
|
---|
529 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
|
---|
530 | PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
|
---|
531 | return NULL;
|
---|
532 | }
|
---|
533 |
|
---|
534 | /**
|
---|
535 | * Gets the pointer to the status LED of a unit.
|
---|
536 | *
|
---|
537 | * @returns VBox status code.
|
---|
538 | * @param pInterface Pointer to the interface structure.
|
---|
539 | * @param iLUN The unit which status LED we desire.
|
---|
540 | * @param ppLed Where to store the LED pointer.
|
---|
541 | * @thread EMT
|
---|
542 | */
|
---|
543 | static DECLCALLBACK(int) vpciQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
|
---|
544 | {
|
---|
545 | VPCISTATE *pState = IFACE_TO_STATE(pInterface, ILeds);
|
---|
546 | int rc = VERR_PDM_LUN_NOT_FOUND;
|
---|
547 |
|
---|
548 | if (iLUN == 0)
|
---|
549 | {
|
---|
550 | *ppLed = &pState->led;
|
---|
551 | rc = VINF_SUCCESS;
|
---|
552 | }
|
---|
553 | return rc;
|
---|
554 | }
|
---|
555 |
|
---|
556 | /**
|
---|
557 | * Turns on/off the write status LED.
|
---|
558 | *
|
---|
559 | * @returns VBox status code.
|
---|
560 | * @param pState Pointer to the device state structure.
|
---|
561 | * @param fOn New LED state.
|
---|
562 | */
|
---|
563 | void vpciSetWriteLed(PVPCISTATE pState, bool fOn)
|
---|
564 | {
|
---|
565 | LogFlow(("%s vpciSetWriteLed: %s\n", INSTANCE(pState), fOn?"on":"off"));
|
---|
566 | if (fOn)
|
---|
567 | pState->led.Asserted.s.fWriting = pState->led.Actual.s.fWriting = 1;
|
---|
568 | else
|
---|
569 | pState->led.Actual.s.fWriting = fOn;
|
---|
570 | }
|
---|
571 |
|
---|
572 | /**
|
---|
573 | * Turns on/off the read status LED.
|
---|
574 | *
|
---|
575 | * @returns VBox status code.
|
---|
576 | * @param pState Pointer to the device state structure.
|
---|
577 | * @param fOn New LED state.
|
---|
578 | */
|
---|
579 | void vpciSetReadLed(PVPCISTATE pState, bool fOn)
|
---|
580 | {
|
---|
581 | LogFlow(("%s vpciSetReadLed: %s\n", INSTANCE(pState), fOn?"on":"off"));
|
---|
582 | if (fOn)
|
---|
583 | pState->led.Asserted.s.fReading = pState->led.Actual.s.fReading = 1;
|
---|
584 | else
|
---|
585 | pState->led.Actual.s.fReading = fOn;
|
---|
586 | }
|
---|
587 |
|
---|
588 | /**
|
---|
589 | * Sets 8-bit register in PCI configuration space.
|
---|
590 | * @param refPciDev The PCI device.
|
---|
591 | * @param uOffset The register offset.
|
---|
592 | * @param u16Value The value to store in the register.
|
---|
593 | * @thread EMT
|
---|
594 | */
|
---|
595 | DECLINLINE(void) vpciCfgSetU8(PCIDEVICE& refPciDev, uint32_t uOffset, uint8_t u8Value)
|
---|
596 | {
|
---|
597 | Assert(uOffset < sizeof(refPciDev.config));
|
---|
598 | refPciDev.config[uOffset] = u8Value;
|
---|
599 | }
|
---|
600 |
|
---|
601 | /**
|
---|
602 | * Sets 16-bit register in PCI configuration space.
|
---|
603 | * @param refPciDev The PCI device.
|
---|
604 | * @param uOffset The register offset.
|
---|
605 | * @param u16Value The value to store in the register.
|
---|
606 | * @thread EMT
|
---|
607 | */
|
---|
608 | DECLINLINE(void) vpciCfgSetU16(PCIDEVICE& refPciDev, uint32_t uOffset, uint16_t u16Value)
|
---|
609 | {
|
---|
610 | Assert(uOffset+sizeof(u16Value) <= sizeof(refPciDev.config));
|
---|
611 | *(uint16_t*)&refPciDev.config[uOffset] = u16Value;
|
---|
612 | }
|
---|
613 |
|
---|
614 | /**
|
---|
615 | * Sets 32-bit register in PCI configuration space.
|
---|
616 | * @param refPciDev The PCI device.
|
---|
617 | * @param uOffset The register offset.
|
---|
618 | * @param u32Value The value to store in the register.
|
---|
619 | * @thread EMT
|
---|
620 | */
|
---|
621 | DECLINLINE(void) vpciCfgSetU32(PCIDEVICE& refPciDev, uint32_t uOffset, uint32_t u32Value)
|
---|
622 | {
|
---|
623 | Assert(uOffset+sizeof(u32Value) <= sizeof(refPciDev.config));
|
---|
624 | *(uint32_t*)&refPciDev.config[uOffset] = u32Value;
|
---|
625 | }
|
---|
626 |
|
---|
627 |
|
---|
628 | #ifdef DEBUG
|
---|
629 | static void vpciDumpState(PVPCISTATE pState, const char *pcszCaller)
|
---|
630 | {
|
---|
631 | Log2(("vpciDumpState: (called from %s)\n"
|
---|
632 | " uGuestFeatures = 0x%08x\n"
|
---|
633 | " uQueueSelector = 0x%04x\n"
|
---|
634 | " uStatus = 0x%02x\n"
|
---|
635 | " uISR = 0x%02x\n",
|
---|
636 | pcszCaller,
|
---|
637 | pState->uGuestFeatures,
|
---|
638 | pState->uQueueSelector,
|
---|
639 | pState->uStatus,
|
---|
640 | pState->uISR));
|
---|
641 |
|
---|
642 | for (unsigned i = 0; i < pState->nQueues; i++)
|
---|
643 | Log2((" %s queue:\n"
|
---|
644 | " VRing.uSize = %u\n"
|
---|
645 | " VRing.addrDescriptors = %p\n"
|
---|
646 | " VRing.addrAvail = %p\n"
|
---|
647 | " VRing.addrUsed = %p\n"
|
---|
648 | " uNextAvailIndex = %u\n"
|
---|
649 | " uNextUsedIndex = %u\n"
|
---|
650 | " uPageNumber = %x\n",
|
---|
651 | pState->Queues[i].pcszName,
|
---|
652 | pState->Queues[i].VRing.uSize,
|
---|
653 | pState->Queues[i].VRing.addrDescriptors,
|
---|
654 | pState->Queues[i].VRing.addrAvail,
|
---|
655 | pState->Queues[i].VRing.addrUsed,
|
---|
656 | pState->Queues[i].uNextAvailIndex,
|
---|
657 | pState->Queues[i].uNextUsedIndex,
|
---|
658 | pState->Queues[i].uPageNumber));
|
---|
659 | }
|
---|
660 | #else
|
---|
661 | # define vpciDumpState(x, s) do {} while (0)
|
---|
662 | #endif
|
---|
663 |
|
---|
664 | /**
|
---|
665 | * Saves the state of device.
|
---|
666 | *
|
---|
667 | * @returns VBox status code.
|
---|
668 | * @param pDevIns The device instance.
|
---|
669 | * @param pSSM The handle to the saved state.
|
---|
670 | */
|
---|
671 | int vpciSaveExec(PVPCISTATE pState, PSSMHANDLE pSSM)
|
---|
672 | {
|
---|
673 | int rc;
|
---|
674 |
|
---|
675 | vpciDumpState(pState, "vpciSaveExec");
|
---|
676 |
|
---|
677 | rc = SSMR3PutU32(pSSM, pState->uGuestFeatures);
|
---|
678 | AssertRCReturn(rc, rc);
|
---|
679 | rc = SSMR3PutU16(pSSM, pState->uQueueSelector);
|
---|
680 | AssertRCReturn(rc, rc);
|
---|
681 | rc = SSMR3PutU8( pSSM, pState->uStatus);
|
---|
682 | AssertRCReturn(rc, rc);
|
---|
683 | rc = SSMR3PutU8( pSSM, pState->uISR);
|
---|
684 | AssertRCReturn(rc, rc);
|
---|
685 |
|
---|
686 | /* Save queue states */
|
---|
687 | rc = SSMR3PutU32(pSSM, pState->nQueues);
|
---|
688 | AssertRCReturn(rc, rc);
|
---|
689 | for (unsigned i = 0; i < pState->nQueues; i++)
|
---|
690 | {
|
---|
691 | rc = SSMR3PutU16(pSSM, pState->Queues[i].VRing.uSize);
|
---|
692 | AssertRCReturn(rc, rc);
|
---|
693 | rc = SSMR3PutU32(pSSM, pState->Queues[i].uPageNumber);
|
---|
694 | AssertRCReturn(rc, rc);
|
---|
695 | rc = SSMR3PutU16(pSSM, pState->Queues[i].uNextAvailIndex);
|
---|
696 | AssertRCReturn(rc, rc);
|
---|
697 | rc = SSMR3PutU16(pSSM, pState->Queues[i].uNextUsedIndex);
|
---|
698 | AssertRCReturn(rc, rc);
|
---|
699 | }
|
---|
700 |
|
---|
701 | return VINF_SUCCESS;
|
---|
702 | }
|
---|
703 |
|
---|
704 | /**
|
---|
705 | * Loads a saved device state.
|
---|
706 | *
|
---|
707 | * @returns VBox status code.
|
---|
708 | * @param pDevIns The device instance.
|
---|
709 | * @param pSSM The handle to the saved state.
|
---|
710 | * @param uVersion The data unit version number.
|
---|
711 | * @param uPass The data pass.
|
---|
712 | */
|
---|
713 | int vpciLoadExec(PVPCISTATE pState, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass, uint32_t nQueues)
|
---|
714 | {
|
---|
715 | int rc;
|
---|
716 |
|
---|
717 | if (uPass == SSM_PASS_FINAL)
|
---|
718 | {
|
---|
719 | /* Restore state data */
|
---|
720 | rc = SSMR3GetU32(pSSM, &pState->uGuestFeatures);
|
---|
721 | AssertRCReturn(rc, rc);
|
---|
722 | rc = SSMR3GetU16(pSSM, &pState->uQueueSelector);
|
---|
723 | AssertRCReturn(rc, rc);
|
---|
724 | rc = SSMR3GetU8( pSSM, &pState->uStatus);
|
---|
725 | AssertRCReturn(rc, rc);
|
---|
726 | rc = SSMR3GetU8( pSSM, &pState->uISR);
|
---|
727 | AssertRCReturn(rc, rc);
|
---|
728 |
|
---|
729 | /* Restore queues */
|
---|
730 | if (uVersion > VIRTIO_SAVEDSTATE_VERSION_3_1_BETA1)
|
---|
731 | {
|
---|
732 | rc = SSMR3GetU32(pSSM, &pState->nQueues);
|
---|
733 | AssertRCReturn(rc, rc);
|
---|
734 | }
|
---|
735 | else
|
---|
736 | pState->nQueues = nQueues;
|
---|
737 | for (unsigned i = 0; i < pState->nQueues; i++)
|
---|
738 | {
|
---|
739 | rc = SSMR3GetU16(pSSM, &pState->Queues[i].VRing.uSize);
|
---|
740 | AssertRCReturn(rc, rc);
|
---|
741 | rc = SSMR3GetU32(pSSM, &pState->Queues[i].uPageNumber);
|
---|
742 | AssertRCReturn(rc, rc);
|
---|
743 |
|
---|
744 | if (pState->Queues[i].uPageNumber)
|
---|
745 | vqueueInit(&pState->Queues[i], pState->Queues[i].uPageNumber);
|
---|
746 |
|
---|
747 | rc = SSMR3GetU16(pSSM, &pState->Queues[i].uNextAvailIndex);
|
---|
748 | AssertRCReturn(rc, rc);
|
---|
749 | rc = SSMR3GetU16(pSSM, &pState->Queues[i].uNextUsedIndex);
|
---|
750 | AssertRCReturn(rc, rc);
|
---|
751 | }
|
---|
752 | }
|
---|
753 |
|
---|
754 | vpciDumpState(pState, "vpciLoadExec");
|
---|
755 |
|
---|
756 | return VINF_SUCCESS;
|
---|
757 | }
|
---|
758 |
|
---|
759 | /**
|
---|
760 | * Set PCI configuration space registers.
|
---|
761 | *
|
---|
762 | * @param pci Reference to PCI device structure.
|
---|
763 | * @param uSubsystemId PCI Subsystem Id
|
---|
764 | * @param uClass Class of PCI device (network, etc)
|
---|
765 | * @thread EMT
|
---|
766 | */
|
---|
767 | static DECLCALLBACK(void) vpciConfigure(PCIDEVICE& pci,
|
---|
768 | uint16_t uSubsystemId,
|
---|
769 | uint16_t uClass)
|
---|
770 | {
|
---|
771 | /* Configure PCI Device, assume 32-bit mode ******************************/
|
---|
772 | PCIDevSetVendorId(&pci, DEVICE_PCI_VENDOR_ID);
|
---|
773 | PCIDevSetDeviceId(&pci, DEVICE_PCI_DEVICE_ID);
|
---|
774 | vpciCfgSetU16(pci, VBOX_PCI_SUBSYSTEM_VENDOR_ID, DEVICE_PCI_SUBSYSTEM_VENDOR_ID);
|
---|
775 | vpciCfgSetU16(pci, VBOX_PCI_SUBSYSTEM_ID, uSubsystemId);
|
---|
776 |
|
---|
777 | /* ABI version, must be equal 0 as of 2.6.30 kernel. */
|
---|
778 | vpciCfgSetU8( pci, VBOX_PCI_REVISION_ID, 0x00);
|
---|
779 | /* Ethernet adapter */
|
---|
780 | vpciCfgSetU8( pci, VBOX_PCI_CLASS_PROG, 0x00);
|
---|
781 | vpciCfgSetU16(pci, VBOX_PCI_CLASS_DEVICE, uClass);
|
---|
782 | /* Interrupt Pin: INTA# */
|
---|
783 | vpciCfgSetU8( pci, VBOX_PCI_INTERRUPT_PIN, 0x01);
|
---|
784 | }
|
---|
785 |
|
---|
786 | /* WARNING! This function must never be used in multithreaded context! */
|
---|
787 | static const char *vpciCounter(const char *pszDevFmt,
|
---|
788 | const char *pszCounter)
|
---|
789 | {
|
---|
790 | static char g_szCounterName[80];
|
---|
791 |
|
---|
792 | RTStrPrintf(g_szCounterName, sizeof(g_szCounterName),
|
---|
793 | "/Devices/%s/%s", pszDevFmt, pszCounter);
|
---|
794 |
|
---|
795 | return g_szCounterName;
|
---|
796 | }
|
---|
797 |
|
---|
798 | // TODO: header
|
---|
799 | DECLCALLBACK(int) vpciConstruct(PPDMDEVINS pDevIns, VPCISTATE *pState,
|
---|
800 | int iInstance, const char *pcszNameFmt,
|
---|
801 | uint16_t uSubsystemId, uint16_t uClass,
|
---|
802 | uint32_t nQueues)
|
---|
803 | {
|
---|
804 | int rc = VINF_SUCCESS;
|
---|
805 | /* Init handles and log related stuff. */
|
---|
806 | RTStrPrintf(pState->szInstance, sizeof(pState->szInstance),
|
---|
807 | pcszNameFmt, iInstance);
|
---|
808 |
|
---|
809 | pState->pDevInsR3 = pDevIns;
|
---|
810 | pState->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
|
---|
811 | pState->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
|
---|
812 | pState->led.u32Magic = PDMLED_MAGIC;
|
---|
813 |
|
---|
814 | pState->ILeds.pfnQueryStatusLed = vpciQueryStatusLed;
|
---|
815 |
|
---|
816 | /* Initialize critical section. */
|
---|
817 | rc = PDMDevHlpCritSectInit(pDevIns, &pState->cs, RT_SRC_POS, "%s", pState->szInstance);
|
---|
818 | if (RT_FAILURE(rc))
|
---|
819 | return rc;
|
---|
820 |
|
---|
821 | /* Set PCI config registers */
|
---|
822 | vpciConfigure(pState->pciDevice, uSubsystemId, uClass);
|
---|
823 | /* Register PCI device */
|
---|
824 | rc = PDMDevHlpPCIRegister(pDevIns, &pState->pciDevice);
|
---|
825 | if (RT_FAILURE(rc))
|
---|
826 | return rc;
|
---|
827 |
|
---|
828 | /* Status driver */
|
---|
829 | PPDMIBASE pBase;
|
---|
830 | rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pState->IBase, &pBase, "Status Port");
|
---|
831 | if (RT_FAILURE(rc))
|
---|
832 | return PDMDEV_SET_ERROR(pDevIns, rc, N_("Failed to attach the status LUN"));
|
---|
833 | pState->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
|
---|
834 |
|
---|
835 | pState->nQueues = nQueues;
|
---|
836 |
|
---|
837 | #if defined(VBOX_WITH_STATISTICS)
|
---|
838 | PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIOReadGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO reads in GC", vpciCounter(pcszNameFmt, "IO/ReadGC"), iInstance);
|
---|
839 | PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIOReadHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO reads in HC", vpciCounter(pcszNameFmt, "IO/ReadHC"), iInstance);
|
---|
840 | PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIOWriteGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO writes in GC", vpciCounter(pcszNameFmt, "IO/WriteGC"), iInstance);
|
---|
841 | PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIOWriteHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling IO writes in HC", vpciCounter(pcszNameFmt, "IO/WriteHC"), iInstance);
|
---|
842 | PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIntsRaised, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of raised interrupts", vpciCounter(pcszNameFmt, "Interrupts/Raised"), iInstance);
|
---|
843 | PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatIntsSkipped, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of skipped interrupts", vpciCounter(pcszNameFmt, "Interrupts/Skipped"), iInstance);
|
---|
844 | PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatCsGC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling CS wait in GC", vpciCounter(pcszNameFmt, "Cs/CsGC"), iInstance);
|
---|
845 | PDMDevHlpSTAMRegisterF(pDevIns, &pState->StatCsHC, STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling CS wait in HC", vpciCounter(pcszNameFmt, "Cs/CsHC"), iInstance);
|
---|
846 | #endif /* VBOX_WITH_STATISTICS */
|
---|
847 |
|
---|
848 | return rc;
|
---|
849 | }
|
---|
850 |
|
---|
851 | /**
|
---|
852 | * Destruct PCI-related part of device.
|
---|
853 | *
|
---|
854 | * We need to free non-VM resources only.
|
---|
855 | *
|
---|
856 | * @returns VBox status.
|
---|
857 | * @param pState The device state structure.
|
---|
858 | */
|
---|
859 | int vpciDestruct(VPCISTATE* pState)
|
---|
860 | {
|
---|
861 | Log(("%s Destroying PCI instance\n", INSTANCE(pState)));
|
---|
862 |
|
---|
863 | if (PDMCritSectIsInitialized(&pState->cs))
|
---|
864 | PDMR3CritSectDelete(&pState->cs);
|
---|
865 |
|
---|
866 | return VINF_SUCCESS;
|
---|
867 | }
|
---|
868 |
|
---|
869 | /**
|
---|
870 | * Device relocation callback.
|
---|
871 | *
|
---|
872 | * When this callback is called the device instance data, and if the
|
---|
873 | * device have a GC component, is being relocated, or/and the selectors
|
---|
874 | * have been changed. The device must use the chance to perform the
|
---|
875 | * necessary pointer relocations and data updates.
|
---|
876 | *
|
---|
877 | * Before the GC code is executed the first time, this function will be
|
---|
878 | * called with a 0 delta so GC pointer calculations can be one in one place.
|
---|
879 | *
|
---|
880 | * @param pDevIns Pointer to the device instance.
|
---|
881 | * @param offDelta The relocation delta relative to the old location.
|
---|
882 | *
|
---|
883 | * @remark A relocation CANNOT fail.
|
---|
884 | */
|
---|
885 | void vpciRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
|
---|
886 | {
|
---|
887 | VPCISTATE* pState = PDMINS_2_DATA(pDevIns, VPCISTATE*);
|
---|
888 | pState->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
|
---|
889 | // TBD
|
---|
890 | }
|
---|
891 |
|
---|
892 | PVQUEUE vpciAddQueue(VPCISTATE* pState, unsigned uSize,
|
---|
893 | void (*pfnCallback)(void *pvState, PVQUEUE pQueue),
|
---|
894 | const char *pcszName)
|
---|
895 | {
|
---|
896 | PVQUEUE pQueue = NULL;
|
---|
897 | /* Find an empty queue slot */
|
---|
898 | for (unsigned i = 0; i < pState->nQueues; i++)
|
---|
899 | {
|
---|
900 | if (pState->Queues[i].VRing.uSize == 0)
|
---|
901 | {
|
---|
902 | pQueue = &pState->Queues[i];
|
---|
903 | break;
|
---|
904 | }
|
---|
905 | }
|
---|
906 |
|
---|
907 | if (!pQueue)
|
---|
908 | {
|
---|
909 | Log(("%s Too many queues being added, no empty slots available!\n", INSTANCE(pState)));
|
---|
910 | }
|
---|
911 | else
|
---|
912 | {
|
---|
913 | pQueue->VRing.uSize = uSize;
|
---|
914 | pQueue->VRing.addrDescriptors = 0;
|
---|
915 | pQueue->uPageNumber = 0;
|
---|
916 | pQueue->pfnCallback = pfnCallback;
|
---|
917 | pQueue->pcszName = pcszName;
|
---|
918 | }
|
---|
919 |
|
---|
920 | return pQueue;
|
---|
921 | }
|
---|
922 |
|
---|
923 | #endif /* IN_RING3 */
|
---|
924 |
|
---|
925 | #endif /* VBOX_DEVICE_STRUCT_TESTCASE */
|
---|