Virtio_1_0.cpp@ 81402

Last change on this file since 81402 was 81402, checked in by vboxsync, 5 years ago
VirtIO: Fix access to the VirtIO registers through the PCI config space window
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1	/* $Id: Virtio_1_0.cpp 81402 2019-10-21 12:23:24Z vboxsync $ */
2	/** @file
3	* Virtio_1_0 - Virtio Common (PCI, feature & config mgt, queue mgt & proxy, notification mgt)
4	*/
5
6	/*
7	* Copyright (C) 2009-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_VIRTIO
23
24	#include <VBox/log.h>
25	#include <VBox/msi.h>
26	#include <iprt/param.h>
27	#include <iprt/assert.h>
28	#include <iprt/uuid.h>
29	#include <iprt/mem.h>
30	#include <iprt/assert.h>
31	#include <iprt/sg.h>
32	#include <VBox/vmm/pdmdev.h>
33	#include "Virtio_1_0_impl.h"
34	#include "Virtio_1_0.h"
35
36	#define INSTANCE(pVirtio) pVirtio->szInstance
37	#define QUEUENAME(qIdx) (pVirtio->virtqState[qIdx].szVirtqName)
38
39
40	/**
41	* See API comments in header file for description
42	*/
43	int virtioQueueAttach(VIRTIOHANDLE hVirtio, uint16_t qIdx, const char *pcszName)
44	{
45	LogFunc(("%s\n", pcszName));
46	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)hVirtio;
47	PVIRTQSTATE pVirtq = &(pVirtio->virtqState[qIdx]);
48	pVirtq->uAvailIdx = 0;
49	pVirtq->uUsedIdx = 0;
50	pVirtq->fEventThresholdReached = false;
51	RTStrCopy((char *)pVirtq->szVirtqName, sizeof(pVirtq->szVirtqName), pcszName);
52	return VINF_SUCCESS;
53	}
54
55	/**
56	* See API comments in header file for description
57	*/
58	const char *virtioQueueGetName(VIRTIOHANDLE hVirtio, uint16_t qIdx)
59	{
60	return (const char *)((PVIRTIOSTATE)hVirtio)->virtqState[qIdx].szVirtqName;
61	}
62
63	/**
64	* See API comments in header file for description
65	*/
66	int virtioQueueSkip(VIRTIOHANDLE hVirtio, uint16_t qIdx)
67	{
68	Assert(qIdx < sizeof(VIRTQSTATE));
69
70	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)hVirtio;
71	PVIRTQSTATE pVirtq = &pVirtio->virtqState[qIdx];
72
73	AssertMsgReturn(DRIVER_OK(pVirtio) && pVirtio->uQueueEnable[qIdx],
74	("Guest driver not in ready state.\n"), VERR_INVALID_STATE);
75
76	if (virtioQueueIsEmpty(pVirtio, qIdx))
77	return VERR_NOT_AVAILABLE;
78
79	Log2Func(("%s avail_idx=%u\n", pVirtq->szVirtqName, pVirtq->uAvailIdx));
80	pVirtq->uAvailIdx++;
81
82	return VINF_SUCCESS;
83	}
84
85	/**
86	* See API comments in header file for description
87	*/
88	uint64_t virtioGetNegotiatedFeatures(VIRTIOHANDLE hVirtio)
89	{
90	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)hVirtio;
91	return pVirtio->uDriverFeatures;
92	}
93
94	/**
95	* See API comments in header file for description
96	*/
97	bool virtioQueueIsEmpty(VIRTIOHANDLE hVirtio, uint16_t qIdx)
98	{
99	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)hVirtio;
100	if (!(pVirtio->uDeviceStatus & VIRTIO_STATUS_DRIVER_OK))
101	return true;
102	return virtqIsEmpty(pVirtio, qIdx);
103	}
104
105	/**
106	* See API comments in header file for description
107	*/
108	int virtioQueueGet(VIRTIOHANDLE hVirtio, uint16_t qIdx, PPVIRTIO_DESC_CHAIN_T ppDescChain, bool fRemove)
109	{
110	AssertReturn(ppDescChain, VERR_INVALID_PARAMETER);
111
112	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)hVirtio;
113	PVIRTQSTATE pVirtq = &pVirtio->virtqState[qIdx];
114
115	PRTSGSEG paSegsIn = (PRTSGSEG)RTMemAlloc(VIRTQ_MAX_SIZE * sizeof(RTSGSEG));
116	AssertReturn(paSegsIn, VERR_NO_MEMORY);
117
118	PRTSGSEG paSegsOut = (PRTSGSEG)RTMemAlloc(VIRTQ_MAX_SIZE * sizeof(RTSGSEG));
119	AssertReturn(paSegsOut, VERR_NO_MEMORY);
120
121	AssertMsgReturn(DRIVER_OK(pVirtio) && pVirtio->uQueueEnable[qIdx],
122	("Guest driver not in ready state.\n"), VERR_INVALID_STATE);
123
124	if (virtqIsEmpty(pVirtio, qIdx))
125	return VERR_NOT_AVAILABLE;
126
127	uint16_t uHeadIdx = virtioReadAvailDescIdx(pVirtio, qIdx, pVirtq->uAvailIdx);
128	uint16_t uDescIdx = uHeadIdx;
129
130	Log3Func(("%s DESC CHAIN: (head) desc_idx=%u [avail_idx=%u]\n",
131	pVirtq->szVirtqName, uHeadIdx, pVirtq->uAvailIdx));
132
133	if (fRemove)
134	pVirtq->uAvailIdx++;
135
136	VIRTQ_DESC_T desc;
137
138	uint32_t cbIn = 0, cbOut = 0, cSegsIn = 0, cSegsOut = 0;
139
140	do
141	{
142	RTSGSEG *pSeg;
143
144	/**
145	* Malicious guests may go beyond paSegsIn or paSegsOut boundaries by linking
146	* several descriptors into a loop. Since there is no legitimate way to get a sequences of
147	* linked descriptors exceeding the total number of descriptors in the ring (see @bugref{8620}),
148	* the following aborts I/O if breach and employs a simple log throttling algorithm to notify.
149	*/
150	if (cSegsIn + cSegsOut >= VIRTQ_MAX_SIZE)
151	{
152	static volatile uint32_t s_cMessages = 0;
153	static volatile uint32_t s_cThreshold = 1;
154	if (ASMAtomicIncU32(&s_cMessages) == ASMAtomicReadU32(&s_cThreshold))
155	{
156	LogRel(("Too many linked descriptors; "
157	"check if the guest arranges descriptors in a loop.\n"));
158	if (ASMAtomicReadU32(&s_cMessages) != 1)
159	LogRel(("(the above error has occured %u times so far)\n",
160	ASMAtomicReadU32(&s_cMessages)));
161	ASMAtomicWriteU32(&s_cThreshold, ASMAtomicReadU32(&s_cThreshold) * 10);
162	}
163	break;
164	}
165	RT_UNTRUSTED_VALIDATED_FENCE();
166
167	virtioReadDesc(pVirtio, qIdx, uDescIdx, &desc);
168
169	if (desc.fFlags & VIRTQ_DESC_F_WRITE)
170	{
171	Log3Func(("%s IN desc_idx=%u seg=%u addr=%RGp cb=%u\n",
172	QUEUENAME(qIdx), uDescIdx, cSegsIn, desc.pGcPhysBuf, desc.cb));
173	cbIn += desc.cb;
174	pSeg = &(paSegsIn[cSegsIn++]);
175	}
176	else
177	{
178	Log3Func(("%s OUT desc_idx=%u seg=%u addr=%RGp cb=%u\n",
179	QUEUENAME(qIdx), uDescIdx, cSegsOut, desc.pGcPhysBuf, desc.cb));
180	cbOut += desc.cb;
181	pSeg = &(paSegsOut[cSegsOut++]);
182	}
183
184	pSeg->pvSeg = (void *)desc.pGcPhysBuf;
185	pSeg->cbSeg = desc.cb;
186
187	uDescIdx = desc.uDescIdxNext;
188	} while (desc.fFlags & VIRTQ_DESC_F_NEXT);
189
190	PRTSGBUF pSgPhysIn = (PRTSGBUF)RTMemAllocZ(sizeof(RTSGBUF));
191	AssertReturn(pSgPhysIn, VERR_NO_MEMORY);
192
193	RTSgBufInit(pSgPhysIn, (PCRTSGSEG)paSegsIn, cSegsIn);
194
195	PRTSGBUF pSgPhysOut = (PRTSGBUF)RTMemAllocZ(sizeof(RTSGBUF));
196	AssertReturn(pSgPhysOut, VERR_NO_MEMORY);
197
198	RTSgBufInit(pSgPhysOut, (PCRTSGSEG)paSegsOut, cSegsOut);
199
200	PVIRTIO_DESC_CHAIN_T pDescChain = (PVIRTIO_DESC_CHAIN_T)RTMemAllocZ(sizeof(VIRTIO_DESC_CHAIN_T));
201	AssertReturn(pDescChain, VERR_NO_MEMORY);
202
203	pDescChain->uHeadIdx = uHeadIdx;
204	pDescChain->cbPhysSend = cbOut;
205	pDescChain->pSgPhysSend = pSgPhysOut;
206	pDescChain->cbPhysReturn = cbIn;
207	pDescChain->pSgPhysReturn = pSgPhysIn;
208	*ppDescChain = pDescChain;
209
210	Log3Func(("%s -- segs OUT: %u (%u bytes) IN: %u (%u bytes) --\n",
211	pVirtq->szVirtqName, cSegsOut, cbOut, cSegsIn, cbIn));
212
213	return VINF_SUCCESS;
214	}
215
216	/** See API comments in header file prototype for description */
217	int virtioQueuePut(VIRTIOHANDLE hVirtio, uint16_t qIdx, PRTSGBUF pSgVirtReturn,
218	PVIRTIO_DESC_CHAIN_T pDescChain, bool fFence)
219	{
220	Assert(qIdx < VIRTQ_MAX_CNT);
221
222	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)hVirtio;
223	PVIRTQSTATE pVirtq = &pVirtio->virtqState[qIdx];
224	PRTSGBUF pSgPhysReturn = pDescChain->pSgPhysReturn;
225
226
227	AssertMsgReturn(DRIVER_OK(pVirtio) /&& pVirtio->uQueueEnable[qIdx]/,
228	("Guest driver not in ready state.\n"), VERR_INVALID_STATE);
229
230	uint16_t uUsedIdx = virtioReadUsedRingIdx(pVirtio, qIdx);
231	Log3Func(("Copying client data to %s, desc chain (head desc_idx %d)\n",
232	QUEUENAME(qIdx), uUsedIdx));
233	(void)uUsedIdx;
234
235	/*
236	* Copy s/g buf (virtual memory) to guest phys mem (IN direction). This virtual memory
237	* block will be small (fixed portion of response header + sense buffer area or
238	* control commands or error return values)... The bulk of req data xfers to phys mem
239	* is handled by client */
240
241	size_t cbCopy = 0;
242	size_t cbRemain = RTSgBufCalcTotalLength(pSgVirtReturn);
243	RTSgBufReset(pSgPhysReturn); /* Reset ptr because req data may have already been written */
244	while (cbRemain)
245	{
246	PCRTSGSEG paSeg = &pSgPhysReturn->paSegs[pSgPhysReturn->idxSeg];
247	uint64_t dstSgStart = (uint64_t)paSeg->pvSeg;
248	uint64_t dstSgLen = (uint64_t)paSeg->cbSeg;
249	uint64_t dstSgCur = (uint64_t)pSgPhysReturn->pvSegCur;
250	cbCopy = RT_MIN((uint64_t)pSgVirtReturn->cbSegLeft, dstSgLen - (dstSgCur - dstSgStart));
251	PDMDevHlpPhysWrite(pVirtio->CTX_SUFF(pDevIns),
252	(RTGCPHYS)pSgPhysReturn->pvSegCur, pSgVirtReturn->pvSegCur, cbCopy);
253	RTSgBufAdvance(pSgVirtReturn, cbCopy);
254	RTSgBufAdvance(pSgPhysReturn, cbCopy);
255	cbRemain -= cbCopy;
256	}
257
258	if (fFence)
259	RT_UNTRUSTED_NONVOLATILE_COPY_FENCE(); /* needed? */
260
261	/** If this write-ahead crosses threshold where the driver wants to get an event flag it */
262	if (pVirtio->uDriverFeatures & VIRTIO_F_EVENT_IDX)
263	if (pVirtq->uUsedIdx == virtioReadAvailUsedEvent(pVirtio, qIdx))
264	pVirtq->fEventThresholdReached = true;
265
266	Assert(!(cbCopy & 0xffffffff00000000));
267
268	/**
269	* Place used buffer's descriptor in used ring but don't update used ring's slot index.
270	* That will be done with a subsequent client call to virtioQueueSync() */
271	virtioWriteUsedElem(pVirtio, qIdx, pVirtq->uUsedIdx++, pDescChain->uHeadIdx,
272	(uint32_t)(cbCopy & 0xffffffff));
273
274	Log2Func((".... Copied %lu bytes to %lu byte buffer, residual=%lu\n",
275	cbCopy, pDescChain->cbPhysReturn, pDescChain->cbPhysReturn - cbCopy));
276
277	Log6Func(("Write ahead used_idx=%d, %s used_idx=%d\n",
278	pVirtq->uUsedIdx, QUEUENAME(qIdx), uUsedIdx));
279
280	RTMemFree((void *)pSgPhysReturn->paSegs);
281	RTMemFree(pSgPhysReturn);
282	RTMemFree(pDescChain);
283
284	return VINF_SUCCESS;
285	}
286
287	/**
288	* See API comments in header file for description
289	*/
290	int virtioQueueSync(VIRTIOHANDLE hVirtio, uint16_t qIdx)
291	{
292	Assert(qIdx < sizeof(VIRTQSTATE));
293
294	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)hVirtio;
295	PVIRTQSTATE pVirtq = &pVirtio->virtqState[qIdx];
296
297	AssertMsgReturn(DRIVER_OK(pVirtio) && pVirtio->uQueueEnable[qIdx],
298	("Guest driver not in ready state.\n"), VERR_INVALID_STATE);
299
300	uint16_t uIdx = virtioReadUsedRingIdx(pVirtio, qIdx);
301	Log6Func(("Updating %s used_idx from %u to %u\n",
302	QUEUENAME(qIdx), uIdx, pVirtq->uUsedIdx));
303	(void)uIdx;
304
305	virtioWriteUsedRingIdx(pVirtio, qIdx, pVirtq->uUsedIdx);
306	virtioNotifyGuestDriver(pVirtio, qIdx, false);
307
308	return VINF_SUCCESS;
309	}
310
311	/**
312	* See API comments in header file for description
313	*/
314	static void virtioQueueNotified(PVIRTIOSTATE pVirtio, uint16_t qIdx, uint16_t uNotifyIdx)
315	{
316	Assert(uNotifyIdx == qIdx);
317	(void)uNotifyIdx;
318
319	PVIRTQSTATE pVirtq = &pVirtio->virtqState[qIdx];
320	Log6Func(("%s\n", pVirtq->szVirtqName));
321	(void)pVirtq;
322
323	/** Inform client */
324	pVirtio->virtioCallbacks.pfnVirtioQueueNotified((VIRTIOHANDLE)pVirtio, pVirtio->pClientContext, qIdx);
325	}
326
327	/**
328	* See API comments in header file for description
329	*/
330	void virtioPropagateResumeNotification(VIRTIOHANDLE hVirtio)
331	{
332	virtioNotifyGuestDriver((PVIRTIOSTATE)hVirtio, (uint16_t)NULL /* qIdx /, true / fForce */);
333	}
334
335	/**
336	* Trigger MSI-X or INT# interrupt to notify guest of data added to used ring of
337	* the specified virtq, depending on the interrupt configuration of the device
338	* and depending on negotiated and realtime constraints flagged by the guest driver.
339	* See VirtIO 1.0 specification (section 2.4.7).
340	*
341	* @param pVirtio - Instance state
342	* @param qIdx - Queue to check for guest interrupt handling preference
343	* @param fForce - Overrides qIdx, forcing notification regardless of driver's
344	* notification preferences. This is a safeguard to prevent
345	* stalls upon resuming the VM. VirtIO 1.0 specification Section 4.1.5.5
346	* indicates spurious interrupts are harmless to guest driver's state,
347	* as they only cause the guest driver to [re]scan queues for work to do.
348	*/
349	static void virtioNotifyGuestDriver(PVIRTIOSTATE pVirtio, uint16_t qIdx, bool fForce)
350	{
351	PVIRTQSTATE pVirtq = &pVirtio->virtqState[qIdx];
352
353	AssertMsgReturnVoid(DRIVER_OK(pVirtio), ("Guest driver not in ready state.\n"));
354	if (pVirtio->uDriverFeatures & VIRTIO_F_EVENT_IDX)
355	{
356	if (pVirtq->fEventThresholdReached)
357	{
358	virtioKick(pVirtio, VIRTIO_ISR_VIRTQ_INTERRUPT, pVirtio->uQueueMsixVector[qIdx], fForce);
359	pVirtq->fEventThresholdReached = false;
360	return;
361	}
362	Log6Func(("...skipping interrupt: VIRTIO_F_EVENT_IDX set but threshold not reached\n"));
363	}
364	else
365	{
366	/** If guest driver hasn't suppressed interrupts, interrupt */
367	if (fForce \|\| !(virtioReadUsedFlags(pVirtio, qIdx) & VIRTQ_AVAIL_F_NO_INTERRUPT))
368	{
369	virtioKick(pVirtio, VIRTIO_ISR_VIRTQ_INTERRUPT, pVirtio->uQueueMsixVector[qIdx], fForce);
370	return;
371	}
372	Log6Func(("...skipping interrupt. Guest flagged VIRTQ_AVAIL_F_NO_INTERRUPT for queue\n"));
373	}
374	}
375
376	/**
377	* NOTE: The consumer (PDM device) must call this function to 'forward' a relocation call.
378	*
379	* Device relocation callback.
380	*
381	* When this callback is called the device instance data, and if the
382	* device have a GC component, is being relocated, or/and the selectors
383	* have been changed. The device must use the chance to perform the
384	* necessary pointer relocations and data updates.
385	*
386	* Before the GC code is executed the first time, this function will be
387	* called with a 0 delta so GC pointer calculations can be one in one place.
388	*
389	* @param pDevIns Pointer to the device instance.
390	* @param offDelta The relocation delta relative to the old location.
391	*
392	* @remark A relocation CANNOT fail.
393	*/
394	void virtioRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
395	{
396	RT_NOREF(offDelta);
397	PVIRTIOSTATE pVirtio = PDMINS_2_DATA(pDevIns, PVIRTIOSTATE );
398	LogFunc(("\n"));
399
400	pVirtio->pDevInsR3 = pDevIns;
401	pVirtio->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
402	pVirtio->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
403	}
404
405
406	/**
407	* Raise interrupt or MSI-X
408	*
409	* @param pVirtio The device state structure.
410	* @param uCause Interrupt cause bit mask to set in PCI ISR port.
411	* @param uVec MSI-X vector, if enabled
412	* @param uForce True of out-of-band
413	*/
414	static int virtioKick(PVIRTIOSTATE pVirtio, uint8_t uCause, uint16_t uMsixVector, bool fForce)
415	{
416
417	if (fForce)
418	Log6Func(("reason: resumed after suspend\n"));
419	else
420	if (uCause == VIRTIO_ISR_VIRTQ_INTERRUPT)
421	Log6Func(("reason: buffer added to 'used' ring.\n"));
422	else
423	if (uCause == VIRTIO_ISR_DEVICE_CONFIG)
424	Log6Func(("reason: device config change\n"));
425
426	if (!pVirtio->fMsiSupport)
427	{
428	pVirtio->uISR \|= uCause;
429	PDMDevHlpPCISetIrq(pVirtio->CTX_SUFF(pDevIns), 0, PDM_IRQ_LEVEL_HIGH);
430	}
431	else if (uMsixVector != VIRTIO_MSI_NO_VECTOR)
432	{
433	Log6Func(("MSI-X enabled, calling PDMDevHlpPCISetIrq with vector: 0x%x\n", uMsixVector));
434	PDMDevHlpPCISetIrq(pVirtio->CTX_SUFF(pDevIns), uMsixVector, 1);
435	}
436	return VINF_SUCCESS;
437	}
438
439	/**
440	* Lower interrupt. (Called when guest reads ISR)
441	*
442	* @param pVirtio The device state structure.
443	*/
444	static void virtioLowerInterrupt(PVIRTIOSTATE pVirtio)
445	{
446	PDMDevHlpPCISetIrq(pVirtio->CTX_SUFF(pDevIns), 0, PDM_IRQ_LEVEL_LOW);
447	}
448
449	static void virtioResetQueue(PVIRTIOSTATE pVirtio, uint16_t qIdx)
450	{
451	PVIRTQSTATE pVirtQ = &pVirtio->virtqState[qIdx];
452	pVirtQ->uAvailIdx = 0;
453	pVirtQ->uUsedIdx = 0;
454	pVirtio->uQueueEnable[qIdx] = false;
455	pVirtio->uQueueSize[qIdx] = VIRTQ_MAX_SIZE;
456	pVirtio->uQueueNotifyOff[qIdx] = qIdx;
457
458	pVirtio->uQueueMsixVector[qIdx] = qIdx + 2;
459	if (!pVirtio->fMsiSupport) /* VirtIO 1.0, 4.1.4.3 and 4.1.5.1.2 */
460	pVirtio->uQueueMsixVector[qIdx] = VIRTIO_MSI_NO_VECTOR;
461	}
462
463	static void virtioResetDevice(PVIRTIOSTATE pVirtio)
464	{
465	Log2Func(("\n"));
466	pVirtio->uDeviceFeaturesSelect = 0;
467	pVirtio->uDriverFeaturesSelect = 0;
468	pVirtio->uConfigGeneration = 0;
469	pVirtio->uDeviceStatus = 0;
470	pVirtio->uISR = 0;
471
472
473	if (!pVirtio->fMsiSupport) /* VirtIO 1.0, 4.1.4.3 and 4.1.5.1.2 */
474	pVirtio->uMsixConfig = VIRTIO_MSI_NO_VECTOR;
475
476	pVirtio->uNumQueues = VIRTQ_MAX_CNT;
477	for (uint16_t qIdx = 0; qIdx < pVirtio->uNumQueues; qIdx++)
478	virtioResetQueue(pVirtio, qIdx);
479	}
480
481	/**
482	* See API comments in header file for description
483	*/
484	bool virtioIsQueueEnabled(VIRTIOHANDLE hVirtio, uint16_t qIdx)
485	{
486	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)hVirtio;
487	return pVirtio->uQueueEnable[qIdx] != 0;
488	}
489
490	/**
491	* See API comments in header file for description
492	*/
493	void virtioQueueEnable(VIRTIOHANDLE hVirtio, uint16_t qIdx, bool fEnabled)
494	{
495	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)hVirtio;
496	if (fEnabled)
497	pVirtio->uQueueSize[qIdx] = VIRTQ_MAX_SIZE;
498	else
499	pVirtio->uQueueSize[qIdx] = 0;
500	}
501
502	/**
503	* Initiate orderly reset procedure.
504	* Invoked by client to reset the device and driver (see VirtIO 1.0 section 2.1.1/2.1.2)
505	*/
506	void virtioResetAll(VIRTIOHANDLE hVirtio)
507	{
508	LogFunc(("VIRTIO RESET REQUESTED!!!\n"));
509	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)hVirtio;
510	pVirtio->uDeviceStatus \|= VIRTIO_STATUS_DEVICE_NEEDS_RESET;
511	if (pVirtio->uDeviceStatus & VIRTIO_STATUS_DRIVER_OK)
512	{
513	pVirtio->fGenUpdatePending = true;
514	virtioKick(pVirtio, VIRTIO_ISR_DEVICE_CONFIG, pVirtio->uMsixConfig, false /* fForce */);
515	}
516	}
517
518	/**
519	* Invoked by this implementation when guest driver resets the device.
520	* The driver itself will not until the device has read the status change.
521	*/
522	static void virtioGuestResetted(PVIRTIOSTATE pVirtio)
523	{
524	LogFunc(("Guest reset the device\n"));
525
526	/** Let the client know */
527	pVirtio->virtioCallbacks.pfnVirtioStatusChanged((VIRTIOHANDLE)pVirtio, pVirtio->pClientContext, 0);
528	virtioResetDevice(pVirtio);
529	}
530
531	/**
532	* Handle accesses to Common Configuration capability
533	*
534	* @returns VBox status code
535	*
536	* @param pVirtio Virtio instance state
537	* @param fWrite Set if write access, clear if read access.
538	* @param pv Pointer to location to write to or read from
539	* @param cb Number of bytes to read or write
540	*/
541	static int virtioCommonCfgAccessed(PVIRTIOSTATE pVirtio, int fWrite, off_t uOffset, unsigned cb, void const *pv)
542	{
543	int rc = VINF_SUCCESS;
544	uint64_t val;
545	if (MATCH_COMMON_CFG(uDeviceFeatures))
546	{
547	if (fWrite) /* Guest WRITE pCommonCfg>uDeviceFeatures */
548	{
549	LogFunc(("Guest attempted to write readonly virtio_pci_common_cfg.device_feature\n"));
550	return VINF_SUCCESS;
551	}
552	else /* Guest READ pCommonCfg->uDeviceFeatures */
553	{
554	uint32_t uIntraOff = uOffset - RT_UOFFSETOF(VIRTIO_PCI_COMMON_CFG_T, uDeviceFeatures);
555	switch(pVirtio->uDeviceFeaturesSelect)
556	{
557	case 0:
558	val = pVirtio->uDeviceFeatures & 0xffffffff;
559	memcpy((void )pv, (const void )&val, cb);
560	LOG_COMMON_CFG_ACCESS(uDeviceFeatures);
561	break;
562	case 1:
563	val = (pVirtio->uDeviceFeatures >> 32) & 0xffffffff;
564	uIntraOff += 4;
565	memcpy((void )pv, (const void )&val, cb);
566	LOG_COMMON_CFG_ACCESS(uDeviceFeatures);
567	break;
568	default:
569	LogFunc(("Guest read uDeviceFeatures with out of range selector (%d), returning 0\n",
570	pVirtio->uDeviceFeaturesSelect));
571	return VINF_IOM_MMIO_UNUSED_00;
572	}
573	}
574	}
575	else if (MATCH_COMMON_CFG(uDriverFeatures))
576	{
577	if (fWrite) /* Guest WRITE pCommonCfg->udriverFeatures */
578	{
579	uint32_t uIntraOff = uOffset - RT_UOFFSETOF(VIRTIO_PCI_COMMON_CFG_T, uDriverFeatures);
580	switch(pVirtio->uDriverFeaturesSelect)
581	{
582	case 0:
583	memcpy(&pVirtio->uDriverFeatures, pv, cb);
584	LOG_COMMON_CFG_ACCESS(uDriverFeatures);
585	break;
586	case 1:
587	memcpy(((char *)&pVirtio->uDriverFeatures) + sizeof(uint32_t), pv, cb);
588	uIntraOff += 4;
589	LOG_COMMON_CFG_ACCESS(uDriverFeatures);
590	break;
591	default:
592	LogFunc(("Guest wrote uDriverFeatures with out of range selector (%d), returning 0\n",
593	pVirtio->uDriverFeaturesSelect));
594	return VINF_SUCCESS;
595	}
596	}
597	else /* Guest READ pCommonCfg->udriverFeatures */
598	{
599	uint32_t uIntraOff = uOffset - RT_UOFFSETOF(VIRTIO_PCI_COMMON_CFG_T, uDriverFeatures);
600	switch(pVirtio->uDriverFeaturesSelect)
601	{
602	case 0:
603	val = pVirtio->uDriverFeatures & 0xffffffff;
604	memcpy((void )pv, (const void )&val, cb);
605	LOG_COMMON_CFG_ACCESS(uDriverFeatures);
606	break;
607	case 1:
608	val = (pVirtio->uDriverFeatures >> 32) & 0xffffffff;
609	uIntraOff += 4;
610	memcpy((void )pv, (const void )&val, cb);
611	LOG_COMMON_CFG_ACCESS(uDriverFeatures);
612	break;
613	default:
614	LogFunc(("Guest read uDriverFeatures with out of range selector (%d), returning 0\n",
615	pVirtio->uDriverFeaturesSelect));
616	return VINF_IOM_MMIO_UNUSED_00;
617	}
618	}
619	}
620	else if (MATCH_COMMON_CFG(uNumQueues))
621	{
622	if (fWrite)
623	{
624	Log2Func(("Guest attempted to write readonly virtio_pci_common_cfg.num_queues\n"));
625	return VINF_SUCCESS;
626	}
627	else
628	{
629	uint32_t uIntraOff = 0;
630	(uint16_t )pv = VIRTQ_MAX_CNT;
631	LOG_COMMON_CFG_ACCESS(uNumQueues);
632	}
633	}
634	else if (MATCH_COMMON_CFG(uDeviceStatus))
635	{
636	if (fWrite) /* Guest WRITE pCommonCfg->uDeviceStatus */
637	{
638	pVirtio->uDeviceStatus = (uint8_t )pv;
639	Log6Func(("Guest wrote uDeviceStatus ................ ("));
640	virtioLogDeviceStatus(pVirtio->uDeviceStatus);
641	Log6((")\n"));
642	if (pVirtio->uDeviceStatus == 0)
643	virtioGuestResetted(pVirtio);
644	/**
645	* Notify client only if status actually changed from last time.
646	*/
647	uint32_t fOkayNow = pVirtio->uDeviceStatus & VIRTIO_STATUS_DRIVER_OK;
648	uint32_t fWasOkay = pVirtio->uPrevDeviceStatus & VIRTIO_STATUS_DRIVER_OK;
649	uint32_t fDrvOk = pVirtio->uDeviceStatus & VIRTIO_STATUS_DRIVER_OK;
650	if ((fOkayNow && !fWasOkay) \|\| (!fOkayNow && fWasOkay))
651	pVirtio->virtioCallbacks.pfnVirtioStatusChanged((VIRTIOHANDLE)pVirtio, pVirtio->pClientContext, fDrvOk);
652	pVirtio->uPrevDeviceStatus = pVirtio->uDeviceStatus;
653	}
654	else /* Guest READ pCommonCfg->uDeviceStatus */
655	{
656	Log6Func(("Guest read uDeviceStatus ................ ("));
657	(uint32_t )pv = pVirtio->uDeviceStatus;
658	virtioLogDeviceStatus(pVirtio->uDeviceStatus);
659	Log6((")\n"));
660	}
661	}
662	else
663	if (MATCH_COMMON_CFG(uMsixConfig))
664	COMMON_CFG_ACCESSOR(uMsixConfig);
665	else
666	if (MATCH_COMMON_CFG(uDeviceFeaturesSelect))
667	COMMON_CFG_ACCESSOR(uDeviceFeaturesSelect);
668	else
669	if (MATCH_COMMON_CFG(uDriverFeaturesSelect))
670	COMMON_CFG_ACCESSOR(uDriverFeaturesSelect);
671	else
672	if (MATCH_COMMON_CFG(uConfigGeneration))
673	COMMON_CFG_ACCESSOR_READONLY(uConfigGeneration);
674	else
675	if (MATCH_COMMON_CFG(uQueueSelect))
676	COMMON_CFG_ACCESSOR(uQueueSelect);
677	else
678	if (MATCH_COMMON_CFG(uQueueSize))
679	COMMON_CFG_ACCESSOR_INDEXED(uQueueSize, pVirtio->uQueueSelect);
680	else
681	if (MATCH_COMMON_CFG(uQueueMsixVector))
682	COMMON_CFG_ACCESSOR_INDEXED(uQueueMsixVector, pVirtio->uQueueSelect);
683	else
684	if (MATCH_COMMON_CFG(uQueueEnable))
685	COMMON_CFG_ACCESSOR_INDEXED(uQueueEnable, pVirtio->uQueueSelect);
686	else
687	if (MATCH_COMMON_CFG(uQueueNotifyOff))
688	COMMON_CFG_ACCESSOR_INDEXED_READONLY(uQueueNotifyOff, pVirtio->uQueueSelect);
689	else
690	if (MATCH_COMMON_CFG(pGcPhysQueueDesc))
691	COMMON_CFG_ACCESSOR_INDEXED(pGcPhysQueueDesc, pVirtio->uQueueSelect);
692	else
693	if (MATCH_COMMON_CFG(pGcPhysQueueAvail))
694	COMMON_CFG_ACCESSOR_INDEXED(pGcPhysQueueAvail, pVirtio->uQueueSelect);
695	else
696	if (MATCH_COMMON_CFG(pGcPhysQueueUsed))
697	COMMON_CFG_ACCESSOR_INDEXED(pGcPhysQueueUsed, pVirtio->uQueueSelect);
698	else
699	{
700	Log2Func(("Bad guest %s access to virtio_pci_common_cfg: uOffset=%d, cb=%d\n",
701	fWrite ? "write" : "read ", uOffset, cb));
702	return fWrite ? VINF_SUCCESS : VINF_IOM_MMIO_UNUSED_00;
703	}
704	return rc;
705	}
706
707	/**
708	* Memory mapped I/O Handler for PCI Capabilities read operations.
709	*
710	* @returns VBox status code.
711	*
712	* @param pDevIns The device instance.
713	* @param pvUser User argument.
714	* @param GCPhysAddr Physical address (in GC) where the read starts.
715	* @param pv Where to store the result.
716	* @param cb Number of bytes read.
717	*/
718	PDMBOTHCBDECL(int) virtioR3MmioRead(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void pv, unsigned cb)
719	{
720	RT_NOREF(pvUser);
721	PVIRTIOSTATE pVirtio = PDMINS_2_DATA(pDevIns, PVIRTIOSTATE );
722	int rc = VINF_SUCCESS;
723
724	MATCH_VIRTIO_CAP_STRUCT(pVirtio->pGcPhysDeviceCap, pVirtio->pDeviceCap, fDevSpecific);
725	MATCH_VIRTIO_CAP_STRUCT(pVirtio->pGcPhysCommonCfg, pVirtio->pCommonCfgCap, fCommonCfg);
726	MATCH_VIRTIO_CAP_STRUCT(pVirtio->pGcPhysIsrCap, pVirtio->pIsrCap, fIsr);
727
728	if (fDevSpecific)
729	{
730	uint32_t uOffset = GCPhysAddr - pVirtio->pGcPhysDeviceCap;
731	/*
732	* Callback to client to manage device-specific configuration.
733	*/
734	rc = pVirtio->virtioCallbacks.pfnVirtioDevCapRead(pDevIns, uOffset, pv, cb);
735
736	/*
737	* Additionally, anytime any part of the device-specific configuration (which our client maintains)
738	* is READ it needs to be checked to see if it changed since the last time any part was read, in
739	* order to maintain the config generation (see VirtIO 1.0 spec, section 4.1.4.3.1)
740	*/
741	bool fDevSpecificFieldChanged = !!memcmp((char *)pVirtio->pDevSpecificCfg + uOffset,
742	(char *)pVirtio->pPrevDevSpecificCfg + uOffset, cb);
743
744	memcpy(pVirtio->pPrevDevSpecificCfg, pVirtio->pDevSpecificCfg, pVirtio->cbDevSpecificCfg);
745
746	if (pVirtio->fGenUpdatePending \|\| fDevSpecificFieldChanged)
747	{
748	++pVirtio->uConfigGeneration;
749	Log6Func(("Bumped cfg. generation to %d because %s%s\n",
750	pVirtio->uConfigGeneration,
751	fDevSpecificFieldChanged ? "<dev cfg changed> " : "",
752	pVirtio->fGenUpdatePending ? "<update was pending>" : ""));
753	pVirtio->fGenUpdatePending = false;
754	}
755	}
756	else
757	if (fCommonCfg)
758	{
759	uint32_t uOffset = GCPhysAddr - pVirtio->pGcPhysCommonCfg;
760	rc = virtioCommonCfgAccessed(pVirtio, false /* fWrite /, uOffset, cb, (void const )pv);
761	}
762	else
763	if (fIsr && cb == sizeof(uint8_t))
764	{
765	(uint8_t )pv = pVirtio->uISR;
766	Log6Func(("Read and clear ISR\n"));
767	pVirtio->uISR = 0; /* VirtIO specification requires reads of ISR to clear it */
768	virtioLowerInterrupt(pVirtio);
769	}
770	else {
771	LogFunc(("Bad read access to mapped capabilities region:\n"
772	" pVirtio=%#p GCPhysAddr=%RGp cb=%u\n",
773	pVirtio, GCPhysAddr, cb));
774	return VINF_IOM_MMIO_UNUSED_00;
775	}
776	return rc;
777	}
778	/**
779	* Memory mapped I/O Handler for PCI Capabilities write operations.
780	*
781	* @returns VBox status code.
782	*
783	* @param pDevIns The device instance.
784	* @param pvUser User argument.
785	* @param GCPhysAddr Physical address (in GC) where the write starts.
786	* @param pv Where to fetch the result.
787	* @param cb Number of bytes to write.
788	*/
789	PDMBOTHCBDECL(int) virtioR3MmioWrite(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void const pv, unsigned cb)
790	{
791	RT_NOREF(pvUser);
792	PVIRTIOSTATE pVirtio = PDMINS_2_DATA(pDevIns, PVIRTIOSTATE );
793
794	MATCH_VIRTIO_CAP_STRUCT(pVirtio->pGcPhysDeviceCap, pVirtio->pDeviceCap, fDevSpecific);
795	MATCH_VIRTIO_CAP_STRUCT(pVirtio->pGcPhysCommonCfg, pVirtio->pCommonCfgCap, fCommonCfg);
796	MATCH_VIRTIO_CAP_STRUCT(pVirtio->pGcPhysIsrCap, pVirtio->pIsrCap, fIsr);
797	MATCH_VIRTIO_CAP_STRUCT(pVirtio->pGcPhysNotifyCap, pVirtio->pNotifyCap, fNotify);
798
799	if (fDevSpecific)
800	{
801	uint32_t uOffset = GCPhysAddr - pVirtio->pGcPhysDeviceCap;
802	/*
803	* Pass this MMIO write access back to the client to handle
804	*/
805	(void)pVirtio->virtioCallbacks.pfnVirtioDevCapWrite(pDevIns, uOffset, pv, cb);
806	}
807	else
808	if (fCommonCfg)
809	{
810	uint32_t uOffset = GCPhysAddr - pVirtio->pGcPhysCommonCfg;
811	(void)virtioCommonCfgAccessed(pVirtio, true /* fWrite */, uOffset, cb, pv);
812	}
813	else
814	if (fIsr && cb == sizeof(uint8_t))
815	{
816	pVirtio->uISR = (uint8_t )pv;
817	Log6Func(("Setting uISR = 0x%02x (virtq interrupt: %d, dev confg interrupt: %d)\n",
818	pVirtio->uISR & 0xff,
819	pVirtio->uISR & VIRTIO_ISR_VIRTQ_INTERRUPT,
820	!!(pVirtio->uISR & VIRTIO_ISR_DEVICE_CONFIG)));
821	}
822	else
823	/* This should be guest driver dropping index of a new descriptor in avail ring */
824	if (fNotify && cb == sizeof(uint16_t))
825	{
826	uint32_t uNotifyBaseOffset = GCPhysAddr - pVirtio->pGcPhysNotifyCap;
827	uint16_t qIdx = uNotifyBaseOffset / VIRTIO_NOTIFY_OFFSET_MULTIPLIER;
828	uint16_t uAvailDescIdx = (uint16_t )pv;
829	virtioQueueNotified(pVirtio, qIdx, uAvailDescIdx);
830	}
831	else
832	{
833	Log2Func(("Bad write access to mapped capabilities region:\n"
834	" pVirtio=%#p GCPhysAddr=%RGp pv=%#p{%.*Rhxs} cb=%u\n",
835	pVirtio, GCPhysAddr, pv, cb, pv, cb));
836	}
837	return VINF_SUCCESS;
838	}
839
840	/**
841	* @callback_method_impl{FNPCIIOREGIONMAP}
842	*/
843	static DECLCALLBACK(int) virtioR3Map(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
844	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
845	{
846	PVIRTIOSTATE pVirtio = PDMINS_2_DATA(pDevIns, PVIRTIOSTATE );
847	int rc = VINF_SUCCESS;
848	RT_NOREF3(pPciDev, iRegion, enmType);
849	Assert(pPciDev == pDevIns->apPciDevs[0]);
850
851	Assert(cb >= 32);
852
853	if (iRegion == VIRTIO_REGION_PCI_CAP)
854	{
855	/* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
856	rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /pvUser/,
857	IOMMMIO_FLAGS_READ_PASSTHRU \| IOMMMIO_FLAGS_WRITE_PASSTHRU,
858	virtioR3MmioWrite, virtioR3MmioRead,
859	"virtio-scsi MMIO");
860
861	if (RT_FAILURE(rc))
862	{
863	Log2Func(("virtio: PCI Capabilities failed to map GCPhysAddr=%RGp cb=%RGp, region=%d\n",
864	GCPhysAddress, cb, iRegion));
865	return rc;
866	}
867	Log2Func(("virtio: PCI Capabilities mapped at GCPhysAddr=%RGp cb=%RGp, region=%d\n",
868	GCPhysAddress, cb, iRegion));
869	pVirtio->pGcPhysPciCapBase = GCPhysAddress;
870	pVirtio->pGcPhysCommonCfg = GCPhysAddress + pVirtio->pCommonCfgCap->uOffset;
871	pVirtio->pGcPhysNotifyCap = GCPhysAddress + pVirtio->pNotifyCap->pciCap.uOffset;
872	pVirtio->pGcPhysIsrCap = GCPhysAddress + pVirtio->pIsrCap->uOffset;
873	if (pVirtio->pPrevDevSpecificCfg)
874	pVirtio->pGcPhysDeviceCap = GCPhysAddress + pVirtio->pDeviceCap->uOffset;
875	}
876	return rc;
877	}
878
879	/**
880	* @callback_method_impl{FNPCICONFIGRead}
881	*/
882	static DECLCALLBACK(VBOXSTRICTRC) virtioR3PciConfigRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
883	uint32_t uAddress, unsigned cb, uint32_t *pu32Value)
884	{
885	PVIRTIOSTATE pVirtio = PDMINS_2_DATA(pDevIns, PVIRTIOSTATE );
886	RT_NOREF(pPciDev);
887
888	LogFlowFunc(("pDevIns=%p pPciDev=%p uAddress=%#x cb=%u pu32Value=%p\n",
889	pDevIns, pPciDev, uAddress, cb, pu32Value));
890	if (uAddress == pVirtio->uPciCfgDataOff)
891	{
892	/*
893	* VirtIO 1.0 spec section 4.1.4.7 describes a required alternative access capability
894	* whereby the guest driver can specify a bar, offset, and length via the PCI configuration space
895	* (the virtio_pci_cfg_cap capability), and access data items.
896	*/
897	uint32_t uLength = pVirtio->pPciCfgCap->pciCap.uLength;
898	uint32_t uOffset = pVirtio->pPciCfgCap->pciCap.uOffset;
899	uint8_t uBar = pVirtio->pPciCfgCap->pciCap.uBar;
900
901	if ( (uLength != 1 && uLength != 2 && uLength != 4)
902	\|\| cb != uLength
903	\|\| uBar != VIRTIO_REGION_PCI_CAP)
904	{
905	Log2Func(("Guest read virtio_pci_cfg_cap.pci_cfg_data using mismatching config. Ignoring\n"));
906	*pu32Value = UINT32_MAX;
907	return VINF_SUCCESS;
908	}
909
910	int rc = virtioR3MmioRead(pDevIns, NULL, pVirtio->pGcPhysPciCapBase + uOffset, pu32Value, cb);
911	Log2Func(("virtio: Guest read virtio_pci_cfg_cap.pci_cfg_data, bar=%d, offset=%d, length=%d, result=%d -> %Rrc\n",
912	uBar, uOffset, uLength, *pu32Value, rc));
913	return rc;
914	}
915	return VINF_PDM_PCI_DO_DEFAULT;
916	}
917
918	/**
919	* @callback_method_impl{FNPCICONFIGWRITE}
920	*/
921	static DECLCALLBACK(VBOXSTRICTRC) virtioR3PciConfigWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
922	uint32_t uAddress, unsigned cb, uint32_t u32Value)
923	{
924	PVIRTIOSTATE pVirtio = PDMINS_2_DATA(pDevIns, PVIRTIOSTATE );
925	RT_NOREF(pPciDev);
926
927	LogFlowFunc(("pDevIns=%p pPciDev=%p uAddress=%#x cb=%u u32Value=%#x\n",
928	pDevIns, pPciDev, uAddress, cb, u32Value));
929	if (uAddress == pVirtio->uPciCfgDataOff)
930	{
931	/* VirtIO 1.0 spec section 4.1.4.7 describes a required alternative access capability
932	* whereby the guest driver can specify a bar, offset, and length via the PCI configuration space
933	* (the virtio_pci_cfg_cap capability), and access data items. */
934
935	uint32_t uLength = pVirtio->pPciCfgCap->pciCap.uLength;
936	uint32_t uOffset = pVirtio->pPciCfgCap->pciCap.uOffset;
937	uint8_t uBar = pVirtio->pPciCfgCap->pciCap.uBar;
938
939	if ( (uLength != 1 && uLength != 2 && uLength != 4)
940	\|\| cb != uLength
941	\|\| uBar != VIRTIO_REGION_PCI_CAP)
942	{
943	Log2Func(("Guest write virtio_pci_cfg_cap.pci_cfg_data using mismatching config. Ignoring\n"));
944	return VINF_SUCCESS;
945	}
946
947	int rc = virtioR3MmioWrite(pDevIns, NULL, pVirtio->pGcPhysPciCapBase + uOffset, &u32Value, cb);
948	Log2Func(("Guest wrote virtio_pci_cfg_cap.pci_cfg_data, bar=%d, offset=%x, length=%x, value=%d -> %Rrc\n",
949	uBar, uOffset, uLength, u32Value, rc));
950	return rc;
951	}
952	return VINF_PDM_PCI_DO_DEFAULT;
953	}
954
955	/**
956	* Get VirtIO accepted host-side features
957	*
958	* @returns feature bits selected or 0 if selector out of range.
959	*
960	* @param pState Virtio state
961	*/
962	uint64_t virtioGetAcceptedFeatures(PVIRTIOSTATE pVirtio)
963	{
964	return pVirtio->uDriverFeatures;
965	}
966
967	/**
968	* Destruct PCI-related part of device.
969	*
970	* We need to free non-VM resources only.
971	*
972	* @returns VBox status code.
973	* @param pState The device state structure.
974	*/
975	int virtioDestruct(PVIRTIOSTATE pVirtio)
976	{
977	RT_NOREF(pVirtio);
978	Log(("%s Destroying PCI instance\n", INSTANCE(pVirtio)));
979	return VINF_SUCCESS;
980	}
981
982	/**
983	* Setup PCI device controller and Virtio state
984	*
985	* @param pDevIns Device instance data
986	* @param pClientContext Opaque client context (such as state struct, ...)
987	* @param pVirtio Device State
988	* @param pPciParams Values to populate industry standard PCI Configuration Space data structure
989	* @param pcszInstance Device instance name (format-specifier)
990	* @param uDevSpecificFeatures VirtIO device-specific features offered by client
991	* @param devCapReadCallback Client handler to call upon guest read to device specific capabilities.
992	* @param devCapWriteCallback Client handler to call upon guest write to device specific capabilities.
993	* @param devStatusChangedCallback Client handler to call for major device status changes
994	* @param queueNotifiedCallback Client handler for guest-to-host notifications that avail queue has ring data
995	* @param ssmLiveExecCallback Client handler for SSM live exec
996	* @param ssmSaveExecCallback Client handler for SSM save exec
997	* @param ssmLoadExecCallback Client handler for SSM load exec
998	* @param ssmLoadDoneCallback Client handler for SSM load done
999	* @param cbDevSpecificCfg Size of virtio_pci_device_cap device-specific struct
1000	* @param pDevSpecificCfg Address of client's dev-specific configuration struct.
1001	*/
1002	int virtioConstruct(PPDMDEVINS pDevIns,
1003	void *pClientContext,
1004	VIRTIOHANDLE *phVirtio,
1005	PVIRTIOPCIPARAMS pPciParams,
1006	const char *pcszInstance,
1007	uint64_t uDevSpecificFeatures,
1008	PFNVIRTIODEVCAPREAD devCapReadCallback,
1009	PFNVIRTIODEVCAPWRITE devCapWriteCallback,
1010	PFNVIRTIOSTATUSCHANGED devStatusChangedCallback,
1011	PFNVIRTIOQUEUENOTIFIED queueNotifiedCallback,
1012	PFNSSMDEVLIVEEXEC ssmLiveExecCallback,
1013	PFNSSMDEVSAVEEXEC ssmSaveExecCallback,
1014	PFNSSMDEVLOADEXEC ssmLoadExecCallback,
1015	PFNSSMDEVLOADDONE ssmLoadDoneCallback,
1016	uint16_t cbDevSpecificCfg,
1017	void *pDevSpecificCfg)
1018	{
1019
1020	PVIRTIOSTATE pVirtio = (PVIRTIOSTATE)RTMemAllocZ(sizeof(VIRTIOSTATE));
1021	if (!pVirtio)
1022	{
1023	PDMDEV_SET_ERROR(pDevIns, VERR_NO_MEMORY, N_("virtio: out of memory"));
1024	return VERR_NO_MEMORY;
1025	}
1026
1027	#if 0 /* Until pdmR3DvHlp_PCISetIrq() impl is fixed and Assert that limits vec to 0 is removed */
1028	# ifdef VBOX_WITH_MSI_DEVICES
1029	pVirtio->fMsiSupport = true;
1030	# endif
1031	#endif
1032
1033	pVirtio->pClientContext = pClientContext;
1034
1035	/*
1036	* The host features offered include both device-specific features
1037	* and reserved feature bits (device independent)
1038	*/
1039	pVirtio->uDeviceFeatures = VIRTIO_F_VERSION_1
1040	\| VIRTIO_DEV_INDEPENDENT_FEATURES_OFFERED
1041	\| uDevSpecificFeatures;
1042
1043	RTStrCopy(pVirtio->szInstance, sizeof(pVirtio->szInstance), pcszInstance);
1044
1045	pVirtio->pDevInsR3 = pDevIns;
1046	pVirtio->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1047	pVirtio->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1048	pVirtio->uDeviceStatus = 0;
1049	pVirtio->cbDevSpecificCfg = cbDevSpecificCfg;
1050	pVirtio->pDevSpecificCfg = pDevSpecificCfg;
1051
1052	pVirtio->pPrevDevSpecificCfg = RTMemAllocZ(cbDevSpecificCfg);
1053	if (!pVirtio->pPrevDevSpecificCfg)
1054	{
1055	RTMemFree(pVirtio);
1056	PDMDEV_SET_ERROR(pDevIns, VERR_NO_MEMORY, N_("virtio: out of memory"));
1057	return VERR_NO_MEMORY;
1058	}
1059
1060	memcpy(pVirtio->pPrevDevSpecificCfg, pVirtio->pDevSpecificCfg, cbDevSpecificCfg);
1061	pVirtio->virtioCallbacks.pfnVirtioDevCapRead = devCapReadCallback;
1062	pVirtio->virtioCallbacks.pfnVirtioDevCapWrite = devCapWriteCallback;
1063	pVirtio->virtioCallbacks.pfnVirtioStatusChanged = devStatusChangedCallback;
1064	pVirtio->virtioCallbacks.pfnVirtioQueueNotified = queueNotifiedCallback;
1065	pVirtio->virtioCallbacks.pfnSSMDevLiveExec = ssmLiveExecCallback;
1066	pVirtio->virtioCallbacks.pfnSSMDevSaveExec = ssmSaveExecCallback;
1067	pVirtio->virtioCallbacks.pfnSSMDevLoadExec = ssmLoadExecCallback;
1068	pVirtio->virtioCallbacks.pfnSSMDevLoadDone = ssmLoadDoneCallback;
1069
1070	/* Set PCI config registers (assume 32-bit mode) */
1071	PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0];
1072	PDMPCIDEV_ASSERT_VALID(pDevIns, pPciDev);
1073
1074	PDMPciDevSetRevisionId(pPciDev, DEVICE_PCI_REVISION_ID_VIRTIO);
1075	PDMPciDevSetVendorId(pPciDev, DEVICE_PCI_VENDOR_ID_VIRTIO);
1076	PDMPciDevSetSubSystemVendorId(pPciDev, DEVICE_PCI_VENDOR_ID_VIRTIO);
1077	PDMPciDevSetDeviceId(pPciDev, pPciParams->uDeviceId);
1078	PDMPciDevSetClassBase(pPciDev, pPciParams->uClassBase);
1079	PDMPciDevSetClassSub(pPciDev, pPciParams->uClassSub);
1080	PDMPciDevSetClassProg(pPciDev, pPciParams->uClassProg);
1081	PDMPciDevSetSubSystemId(pPciDev, pPciParams->uSubsystemId);
1082	PDMPciDevSetInterruptLine(pPciDev, pPciParams->uInterruptLine);
1083	PDMPciDevSetInterruptPin(pPciDev, pPciParams->uInterruptPin);
1084
1085	/* Register PCI device */
1086	int rc = PDMDevHlpPCIRegister(pDevIns, pPciDev);
1087	if (RT_FAILURE(rc))
1088	{
1089	RTMemFree(pVirtio);
1090	return PDMDEV_SET_ERROR(pDevIns, rc, N_("virtio: cannot register PCI Device")); /* can we put params in this error? */
1091	}
1092
1093	rc = PDMDevHlpSSMRegisterEx(pDevIns, VIRTIO_SAVEDSTATE_VERSION, sizeof(*pVirtio), NULL,
1094	NULL, virtioR3LiveExec, NULL, NULL, virtioR3SaveExec, NULL,
1095	NULL, virtioR3LoadExec, virtioR3LoadDone);
1096	if (RT_FAILURE(rc))
1097	{
1098	RTMemFree(pVirtio);
1099	return PDMDEV_SET_ERROR(pDevIns, rc, N_("virtio: cannot register SSM callbacks"));
1100	}
1101
1102	rc = PDMDevHlpPCIInterceptConfigAccesses(pDevIns, pPciDev, virtioR3PciConfigRead, virtioR3PciConfigWrite);
1103	AssertRCReturnStmt(rc, RTMemFree(pVirtio), rc);
1104
1105
1106	/* Construct & map PCI vendor-specific capabilities for virtio host negotiation with guest driver */
1107
1108	/* The following capability mapped via VirtIO 1.0: struct virtio_pci_cfg_cap (VIRTIO_PCI_CFG_CAP_T)
1109	* as a mandatory but suboptimal alternative interface to host device capabilities, facilitating
1110	* access the memory of any BAR. If the guest uses it (the VirtIO driver on Linux doesn't),
1111	* Unlike Common, Notify, ISR and Device capabilities, it is accessed directly via PCI Config region.
1112	* therefore does not contribute to the capabilities region (BAR) the other capabilities use.
1113	*/
1114	#define CFGADDR2IDX(addr) ((uint8_t)(((uintptr_t)(addr) - (uintptr_t)&pPciDev->abConfig[0])))
1115
1116	PVIRTIO_PCI_CAP_T pCfg;
1117	uint32_t cbRegion = 0;
1118
1119	/* Common capability (VirtIO 1.0 spec, section 4.1.4.3) */
1120	pCfg = (PVIRTIO_PCI_CAP_T)&pPciDev->abConfig[0x40];
1121	pCfg->uCfgType = VIRTIO_PCI_CAP_COMMON_CFG;
1122	pCfg->uCapVndr = VIRTIO_PCI_CAP_ID_VENDOR;
1123	pCfg->uCapLen = sizeof(VIRTIO_PCI_CAP_T);
1124	pCfg->uCapNext = CFGADDR2IDX(pCfg) + pCfg->uCapLen;
1125	pCfg->uBar = VIRTIO_REGION_PCI_CAP;
1126	pCfg->uOffset = RT_ALIGN_32(0, 4); /* reminder, in case someone changes offset */
1127	pCfg->uLength = sizeof(VIRTIO_PCI_COMMON_CFG_T);
1128	cbRegion += pCfg->uLength;
1129	pVirtio->pCommonCfgCap = pCfg;
1130
1131	/*
1132	* Notify capability (VirtIO 1.0 spec, section 4.1.4.4). Note: uLength is based the choice
1133	* of this implementation that each queue's uQueueNotifyOff is set equal to (QueueSelect) ordinal
1134	* value of the queue */
1135	pCfg = (PVIRTIO_PCI_CAP_T)&pPciDev->abConfig[pCfg->uCapNext];
1136	pCfg->uCfgType = VIRTIO_PCI_CAP_NOTIFY_CFG;
1137	pCfg->uCapVndr = VIRTIO_PCI_CAP_ID_VENDOR;
1138	pCfg->uCapLen = sizeof(VIRTIO_PCI_NOTIFY_CAP_T);
1139	pCfg->uCapNext = CFGADDR2IDX(pCfg) + pCfg->uCapLen;
1140	pCfg->uBar = VIRTIO_REGION_PCI_CAP;
1141	pCfg->uOffset = pVirtio->pCommonCfgCap->uOffset + pVirtio->pCommonCfgCap->uLength;
1142	pCfg->uOffset = RT_ALIGN_32(pCfg->uOffset, 2);
1143	pCfg->uLength = VIRTQ_MAX_CNT * VIRTIO_NOTIFY_OFFSET_MULTIPLIER + 2; /* will change in VirtIO 1.1 */
1144	cbRegion += pCfg->uLength;
1145	pVirtio->pNotifyCap = (PVIRTIO_PCI_NOTIFY_CAP_T)pCfg;
1146	pVirtio->pNotifyCap->uNotifyOffMultiplier = VIRTIO_NOTIFY_OFFSET_MULTIPLIER;
1147
1148	/* ISR capability (VirtIO 1.0 spec, section 4.1.4.5)
1149	*
1150	* VirtIO 1.0 spec says 8-bit, unaligned in MMIO space. Example/diagram
1151	* of spec shows it as a 32-bit field with upper bits 'reserved'
1152	* Will take spec words more literally than the diagram for now.
1153	*/
1154	pCfg = (PVIRTIO_PCI_CAP_T)&pPciDev->abConfig[pCfg->uCapNext];
1155	pCfg->uCfgType = VIRTIO_PCI_CAP_ISR_CFG;
1156	pCfg->uCapVndr = VIRTIO_PCI_CAP_ID_VENDOR;
1157	pCfg->uCapLen = sizeof(VIRTIO_PCI_CAP_T);
1158	pCfg->uCapNext = CFGADDR2IDX(pCfg) + pCfg->uCapLen;
1159	pCfg->uBar = VIRTIO_REGION_PCI_CAP;
1160	pCfg->uOffset = pVirtio->pNotifyCap->pciCap.uOffset + pVirtio->pNotifyCap->pciCap.uLength;
1161	pCfg->uLength = sizeof(uint8_t);
1162	cbRegion += pCfg->uLength;
1163	pVirtio->pIsrCap = pCfg;
1164
1165	/* PCI Cfg capability (VirtIO 1.0 spec, section 4.1.4.7)
1166	* This capability doesn't get page-MMIO mapped. Instead uBar, uOffset and uLength are intercepted
1167	* by trapping PCI configuration I/O and get modulated by consumers to locate fetch and read/write
1168	* values from any region. NOTE: The linux driver not only doesn't use this feature, it will not
1169	* even list it as present if uLength isn't non-zero and 4-byte-aligned as the linux driver is
1170	* initializing. */
1171
1172	pVirtio->uPciCfgDataOff = pCfg->uCapNext + RT_OFFSETOF(VIRTIO_PCI_CFG_CAP_T, uPciCfgData);
1173	pCfg = (PVIRTIO_PCI_CAP_T)&pPciDev->abConfig[pCfg->uCapNext];
1174	pCfg->uCfgType = VIRTIO_PCI_CAP_PCI_CFG;
1175	pCfg->uCapVndr = VIRTIO_PCI_CAP_ID_VENDOR;
1176	pCfg->uCapLen = sizeof(VIRTIO_PCI_CFG_CAP_T);
1177	pCfg->uCapNext = (pVirtio->fMsiSupport \|\| pVirtio->pDevSpecificCfg) ? CFGADDR2IDX(pCfg) + pCfg->uCapLen : 0;
1178	pCfg->uBar = 0;
1179	pCfg->uOffset = 0;
1180	pCfg->uLength = 0;
1181	cbRegion += pCfg->uLength;
1182	pVirtio->pPciCfgCap = (PVIRTIO_PCI_CFG_CAP_T)pCfg;
1183
1184	if (pVirtio->pDevSpecificCfg)
1185	{
1186	/* Following capability (via VirtIO 1.0, section 4.1.4.6). Client defines the
1187	* device-specific config fields struct and passes size to this constructor */
1188	pCfg = (PVIRTIO_PCI_CAP_T)&pPciDev->abConfig[pCfg->uCapNext];
1189	pCfg->uCfgType = VIRTIO_PCI_CAP_DEVICE_CFG;
1190	pCfg->uCapVndr = VIRTIO_PCI_CAP_ID_VENDOR;
1191	pCfg->uCapLen = sizeof(VIRTIO_PCI_CAP_T);
1192	pCfg->uCapNext = pVirtio->fMsiSupport ? CFGADDR2IDX(pCfg) + pCfg->uCapLen : 0;
1193	pCfg->uBar = VIRTIO_REGION_PCI_CAP;
1194	pCfg->uOffset = pVirtio->pIsrCap->uOffset + pVirtio->pIsrCap->uLength;
1195	pCfg->uOffset = RT_ALIGN_32(pCfg->uOffset, 4);
1196	pCfg->uLength = cbDevSpecificCfg;
1197	cbRegion += pCfg->uLength;
1198	pVirtio->pDeviceCap = pCfg;
1199	}
1200
1201	if (pVirtio->fMsiSupport)
1202	{
1203	PDMMSIREG aMsiReg;
1204	RT_ZERO(aMsiReg);
1205	aMsiReg.iMsixCapOffset = pCfg->uCapNext;
1206	aMsiReg.iMsixNextOffset = 0;
1207	aMsiReg.iMsixBar = VIRTIO_REGION_MSIX_CAP;
1208	aMsiReg.cMsixVectors = VBOX_MSIX_MAX_ENTRIES;
1209	rc = PDMDevHlpPCIRegisterMsi(pDevIns, &aMsiReg); /* see MsixR3init() */
1210	if (RT_FAILURE(rc))
1211	{
1212	/* See PDMDevHlp.cpp:pdmR3DevHlp_PCIRegisterMsi */
1213	LogFunc(("Failed to configure MSI-X (%Rrc). Reverting to INTx\n", rc));
1214	pVirtio->fMsiSupport = false;
1215	}
1216	else
1217	Log2Func(("Using MSI-X for guest driver notification\n"));
1218	}
1219	else
1220	LogFunc(("MSI-X not available for VBox, using INTx notification\n"));
1221
1222
1223	/* Set offset to first capability and enable PCI dev capabilities */
1224	PDMPciDevSetCapabilityList(pPciDev, 0x40);
1225	PDMPciDevSetStatus(pPciDev, VBOX_PCI_STATUS_CAP_LIST);
1226
1227	/* Linux drivers/virtio/virtio_pci_modern.c tries to map at least a page for the
1228	* 'unknown' device-specific capability without querying the capability to figure
1229	* out size, so pad with an extra page */
1230
1231	rc = PDMDevHlpPCIIORegionRegister(pDevIns, VIRTIO_REGION_PCI_CAP, RT_ALIGN_32(cbRegion + 0x1000, 0x1000),
1232	PCI_ADDRESS_SPACE_MEM, virtioR3Map);
1233	if (RT_FAILURE(rc))
1234	{
1235	RTMemFree(pVirtio->pPrevDevSpecificCfg);
1236	RTMemFree(pVirtio);
1237	return PDMDEV_SET_ERROR(pDevIns, rc,
1238	N_("virtio: cannot register PCI Capabilities address space"));
1239	}
1240	*phVirtio = (VIRTIOHANDLE)pVirtio;
1241	return rc;
1242	}
1243
1244	#ifdef IN_RING3
1245
1246	/** @callback_method_impl{FNSSMDEVSAVEEXEC} */
1247	static DECLCALLBACK(int) virtioR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
1248	{
1249	PVIRTIOSTATE pVirtio = PDMINS_2_DATA(pDevIns, PVIRTIOSTATE );
1250
1251	int rc = VINF_SUCCESS;
1252
1253	rc = SSMR3PutBool(pSSM, pVirtio->fGenUpdatePending);
1254	rc = SSMR3PutU8(pSSM, pVirtio->uDeviceStatus);
1255	rc = SSMR3PutU8(pSSM, pVirtio->uConfigGeneration);
1256	rc = SSMR3PutU8(pSSM, pVirtio->uPciCfgDataOff);
1257	rc = SSMR3PutU8(pSSM, pVirtio->uISR);
1258	rc = SSMR3PutU16(pSSM, pVirtio->uQueueSelect);
1259	rc = SSMR3PutU32(pSSM, pVirtio->uDeviceFeaturesSelect);
1260	rc = SSMR3PutU32(pSSM, pVirtio->uDriverFeaturesSelect);
1261	rc = SSMR3PutU32(pSSM, pVirtio->uNumQueues);
1262	rc = SSMR3PutU32(pSSM, pVirtio->cbDevSpecificCfg);
1263	rc = SSMR3PutU64(pSSM, pVirtio->uDeviceFeatures);
1264	rc = SSMR3PutU64(pSSM, pVirtio->uDriverFeatures);
1265	rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->pDevSpecificCfg);
1266	rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->virtioCallbacks.pfnVirtioStatusChanged);
1267	rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->virtioCallbacks.pfnVirtioQueueNotified);
1268	rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->virtioCallbacks.pfnVirtioDevCapRead);
1269	rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->virtioCallbacks.pfnVirtioDevCapWrite);
1270	rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->virtioCallbacks.pfnSSMDevLiveExec);
1271	rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->virtioCallbacks.pfnSSMDevSaveExec);
1272	rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->virtioCallbacks.pfnSSMDevLoadExec);
1273	rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->virtioCallbacks.pfnSSMDevLoadDone);
1274	rc = SSMR3PutGCPhys(pSSM, pVirtio->pGcPhysCommonCfg);
1275	rc = SSMR3PutGCPhys(pSSM, pVirtio->pGcPhysNotifyCap);
1276	rc = SSMR3PutGCPhys(pSSM, pVirtio->pGcPhysIsrCap);
1277	rc = SSMR3PutGCPhys(pSSM, pVirtio->pGcPhysDeviceCap);
1278	rc = SSMR3PutGCPhys(pSSM, pVirtio->pGcPhysPciCapBase);
1279
1280	for (uint16_t i = 0; i < pVirtio->uNumQueues; i++)
1281	{
1282	rc = SSMR3PutGCPhys64(pSSM, pVirtio->pGcPhysQueueDesc[i]);
1283	rc = SSMR3PutGCPhys64(pSSM, pVirtio->pGcPhysQueueAvail[i]);
1284	rc = SSMR3PutGCPhys64(pSSM, pVirtio->pGcPhysQueueUsed[i]);
1285	rc = SSMR3PutU16(pSSM, pVirtio->uQueueNotifyOff[i]);
1286	rc = SSMR3PutU16(pSSM, pVirtio->uQueueMsixVector[i]);
1287	rc = SSMR3PutU16(pSSM, pVirtio->uQueueEnable[i]);
1288	rc = SSMR3PutU16(pSSM, pVirtio->uQueueSize[i]);
1289	rc = SSMR3PutU16(pSSM, pVirtio->virtqState[i].uAvailIdx);
1290	rc = SSMR3PutU16(pSSM, pVirtio->virtqState[i].uUsedIdx);
1291	rc = SSMR3PutMem(pSSM, pVirtio->virtqState[i].szVirtqName, 32);
1292	}
1293
1294	rc = pVirtio->virtioCallbacks.pfnSSMDevSaveExec(pDevIns, pSSM);
1295	return rc;
1296	}
1297
1298	/** @callback_method_impl{FNSSMDEVLOADEXEC} */
1299	static DECLCALLBACK(int) virtioR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1300	{
1301	RT_NOREF(uVersion);
1302
1303	PVIRTIOSTATE pVirtio = PDMINS_2_DATA(pDevIns, PVIRTIOSTATE );
1304
1305	int rc = VINF_SUCCESS;
1306
1307	if (uPass == SSM_PASS_FINAL)
1308	{
1309	rc = SSMR3GetBool(pSSM, &pVirtio->fGenUpdatePending);
1310	rc = SSMR3GetU8(pSSM, &pVirtio->uDeviceStatus);
1311	rc = SSMR3GetU8(pSSM, &pVirtio->uConfigGeneration);
1312	rc = SSMR3GetU8(pSSM, &pVirtio->uPciCfgDataOff);
1313	rc = SSMR3GetU8(pSSM, &pVirtio->uISR);
1314	rc = SSMR3GetU16(pSSM, &pVirtio->uQueueSelect);
1315	rc = SSMR3GetU32(pSSM, &pVirtio->uDeviceFeaturesSelect);
1316	rc = SSMR3GetU32(pSSM, &pVirtio->uDriverFeaturesSelect);
1317	rc = SSMR3GetU32(pSSM, &pVirtio->uNumQueues);
1318	rc = SSMR3GetU32(pSSM, &pVirtio->cbDevSpecificCfg);
1319	rc = SSMR3GetU64(pSSM, &pVirtio->uDeviceFeatures);
1320	rc = SSMR3GetU64(pSSM, &pVirtio->uDriverFeatures);
1321	rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->pDevSpecificCfg);
1322	rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->virtioCallbacks.pfnVirtioStatusChanged);
1323	rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->virtioCallbacks.pfnVirtioQueueNotified);
1324	rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->virtioCallbacks.pfnVirtioDevCapRead);
1325	rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->virtioCallbacks.pfnVirtioDevCapWrite);
1326	rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->virtioCallbacks.pfnSSMDevLiveExec);
1327	rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->virtioCallbacks.pfnSSMDevSaveExec);
1328	rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->virtioCallbacks.pfnSSMDevLoadExec);
1329	rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->virtioCallbacks.pfnSSMDevLoadDone);
1330	rc = SSMR3GetGCPhys(pSSM, &pVirtio->pGcPhysCommonCfg);
1331	rc = SSMR3GetGCPhys(pSSM, &pVirtio->pGcPhysNotifyCap);
1332	rc = SSMR3GetGCPhys(pSSM, &pVirtio->pGcPhysIsrCap);
1333	rc = SSMR3GetGCPhys(pSSM, &pVirtio->pGcPhysDeviceCap);
1334	rc = SSMR3GetGCPhys(pSSM, &pVirtio->pGcPhysPciCapBase);
1335
1336	for (uint16_t i = 0; i < pVirtio->uNumQueues; i++)
1337	{
1338	rc = SSMR3GetGCPhys64(pSSM, &pVirtio->pGcPhysQueueDesc[i]);
1339	rc = SSMR3GetGCPhys64(pSSM, &pVirtio->pGcPhysQueueAvail[i]);
1340	rc = SSMR3GetGCPhys64(pSSM, &pVirtio->pGcPhysQueueUsed[i]);
1341	rc = SSMR3GetU16(pSSM, &pVirtio->uQueueNotifyOff[i]);
1342	rc = SSMR3GetU16(pSSM, &pVirtio->uQueueMsixVector[i]);
1343	rc = SSMR3GetU16(pSSM, &pVirtio->uQueueEnable[i]);
1344	rc = SSMR3GetU16(pSSM, &pVirtio->uQueueSize[i]);
1345	rc = SSMR3GetU16(pSSM, &pVirtio->virtqState[i].uAvailIdx);
1346	rc = SSMR3GetU16(pSSM, &pVirtio->virtqState[i].uUsedIdx);
1347	rc = SSMR3GetMem(pSSM, (void *)&pVirtio->virtqState[i].szVirtqName, 32);
1348	}
1349	}
1350
1351	rc = pVirtio->virtioCallbacks.pfnSSMDevLoadExec(pDevIns, pSSM, uVersion, uPass);
1352
1353	return rc;
1354	}
1355
1356	/** @callback_method_impl{FNSSMDEVLOADDONE} */
1357	static DECLCALLBACK(int) virtioR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
1358	{
1359	PVIRTIOSTATE pVirtio = PDMINS_2_DATA(pDevIns, PVIRTIOSTATE );
1360
1361	int rc = VINF_SUCCESS;
1362	rc = pVirtio->virtioCallbacks.pfnSSMDevLoadDone(pDevIns, pSSM);
1363
1364	return rc;
1365	}
1366
1367	/** @callback_method_impl{FNSSMDEVLIVEEXEC} */
1368	static DECLCALLBACK(int) virtioR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
1369	{
1370	PVIRTIOSTATE pVirtio = PDMINS_2_DATA(pDevIns, PVIRTIOSTATE );
1371
1372	int rc = VINF_SUCCESS;
1373	rc = pVirtio->virtioCallbacks.pfnSSMDevLiveExec(pDevIns, pSSM, uPass);
1374
1375	return rc;
1376	}
1377
1378	/**
1379	* Do a hex dump of a buffer
1380	*
1381	* @param pv Pointer to array to dump
1382	* @param cb Number of characters to dump
1383	* @param uBase Base address of offset addresses displayed
1384	* @param pszTitle Header line/title for the dump
1385	*
1386	*/
1387	void virtioHexDump(uint8_t pv, uint32_t cb, uint32_t uBase, const char pszTitle)
1388	{
1389	if (pszTitle)
1390	Log(("%s [%d bytes]:\n", pszTitle, cb));
1391	for (uint32_t row = 0; row < RT_MAX(1, (cb / 16) + 1) && row * 16 < cb; row++)
1392	{
1393	Log(("%04x: ", row * 16 + uBase)); /* line address */
1394	for (uint8_t col = 0; col < 16; col++)
1395	{
1396	uint32_t idx = row * 16 + col;
1397	if (idx >= cb)
1398	Log(("-- %s", (col + 1) % 8 ? "" : " "));
1399	else
1400	Log(("%02x %s", pv[idx], (col + 1) % 8 ? "" : " "));
1401	}
1402	for (uint32_t idx = row * 16; idx < row * 16 + 16; idx++)
1403	Log(("%c", (idx >= cb) ? ' ' : (pv[idx] >= 0x20 && pv[idx] <= 0x7e ? pv[idx] : '.')));
1404	Log(("\n"));
1405	}
1406	Log(("\n"));
1407	RT_NOREF2(uBase, pv);
1408	}
1409
1410
1411	/**
1412	* Formats the logging of a memory-mapped I/O input or output value
1413	*
1414	* @param pszFunc - To avoid displaying this function's name via __FUNCTION__ or Log2Func()
1415	* @param pszMember - Name of struct member
1416	* @param pv - Pointer to value
1417	* @param cb - Size of value
1418	* @param uOffset - Offset into member where value starts
1419	* @param fWrite - True if write I/O
1420	* @param fHasIndex - True if the member is indexed
1421	* @param idx - The index, if fHasIndex is true
1422	*/
1423	void virtioLogMappedIoValue(const char pszFunc, const char pszMember, uint32_t uMemberSize,
1424	const void *pv, uint32_t cb, uint32_t uOffset, int fWrite,
1425	int fHasIndex, uint32_t idx)
1426	{
1427
1428	#define FMTHEX(fmtout, val, cNybbles) \
1429	fmtout[cNybbles] = '\0'; \
1430	for (uint8_t i = 0; i < cNybbles; i++) \
1431	fmtout[(cNybbles - i) - 1] = "0123456789abcdef"[(val >> (i * 4)) & 0xf];
1432
1433	#define MAX_STRING 64
1434	char pszIdx[MAX_STRING] = { 0 };
1435	char pszDepiction[MAX_STRING] = { 0 };
1436	char pszFormattedVal[MAX_STRING] = { 0 };
1437	if (fHasIndex)
1438	RTStrPrintf(pszIdx, sizeof(pszIdx), "[%d]", idx);
1439	if (cb == 1 \|\| cb == 2 \|\| cb == 4 \|\| cb == 8)
1440	{
1441	/* manually padding with 0's instead of \b due to different impl of %x precision than printf() */
1442	uint64_t val = 0;
1443	memcpy((char *)&val, pv, cb);
1444	FMTHEX(pszFormattedVal, val, cb * 2);
1445	if (uOffset != 0 \|\| cb != uMemberSize) /* display bounds if partial member access */
1446	RTStrPrintf(pszDepiction, sizeof(pszDepiction), "%s%s[%d:%d]",
1447	pszMember, pszIdx, uOffset, uOffset + cb - 1);
1448	else
1449	RTStrPrintf(pszDepiction, sizeof(pszDepiction), "%s%s", pszMember, pszIdx);
1450	RTStrPrintf(pszDepiction, sizeof(pszDepiction), "%-30s", pszDepiction);
1451	uint32_t first = 0;
1452	for (uint8_t i = 0; i < sizeof(pszDepiction); i++)
1453	if (pszDepiction[i] == ' ' && first++)
1454	pszDepiction[i] = '.';
1455	Log6Func(("%s: Guest %s %s 0x%s\n",
1456	pszFunc, fWrite ? "wrote" : "read ", pszDepiction, pszFormattedVal));
1457	}
1458	else /* odd number or oversized access, ... log inline hex-dump style */
1459	{
1460	Log6Func(("%s: Guest %s %s%s[%d:%d]: %.*Rhxs\n",
1461	pszFunc, fWrite ? "wrote" : "read ", pszMember,
1462	pszIdx, uOffset, uOffset + cb, cb, pv));
1463	}
1464	RT_NOREF2(fWrite, pszFunc);
1465	}
1466
1467	#endif /* IN_RING3 */

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source: vbox/trunk/src/VBox/Devices/VirtIO/Virtio_1_0.cpp@ 81402

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