1 | /* $Id: DisasmCore-armv8.cpp 99334 2023-04-07 10:10:07Z vboxsync $ */
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2 | /** @file
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3 | * VBox Disassembler - Core Components.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2023 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 |
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29 | /*********************************************************************************************************************************
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30 | * Header Files *
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31 | *********************************************************************************************************************************/
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32 | #define LOG_GROUP LOG_GROUP_DIS
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33 | #include <VBox/dis.h>
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34 | #include <VBox/log.h>
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35 | #include <iprt/assert.h>
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36 | #include <iprt/errcore.h>
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37 | #include <iprt/param.h>
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38 | #include <iprt/string.h>
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39 | #include <iprt/stdarg.h>
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40 | #include "DisasmInternal-armv8.h"
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41 |
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42 |
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43 | /*********************************************************************************************************************************
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44 | * Structures and Typedefs *
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45 | *********************************************************************************************************************************/
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46 |
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47 | /** Parser callback.
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48 | * @remark no DECLCALLBACK() here because it's considered to be internal and
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49 | * there is no point in enforcing CDECL. */
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50 | typedef int FNDISPARSEARMV8(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit);
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51 | /** Pointer to a disassembler parser function. */
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52 | typedef FNDISPARSEARMV8 *PFNDISPARSEARMV8;
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53 |
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54 |
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55 | /** Opcode decoder callback.
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56 | * @remark no DECLCALLBACK() here because it's considered to be internal and
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57 | * there is no point in enforcing CDECL. */
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58 | typedef uint32_t FNDISDECODEARMV8(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass);
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59 | /** Pointer to a disassembler parser function. */
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60 | typedef FNDISDECODEARMV8 *PFNDISDECODEARMV8;
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61 |
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62 |
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63 | /*********************************************************************************************************************************
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64 | * Defined Constants And Macros *
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65 | *********************************************************************************************************************************/
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66 |
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67 |
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68 | /*********************************************************************************************************************************
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69 | * Internal Functions *
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70 | *********************************************************************************************************************************/
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71 | /** @name Parsers
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72 | * @{ */
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73 | static FNDISPARSEARMV8 disArmV8ParseIllegal;
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74 | static FNDISPARSEARMV8 disArmV8ParseImm;
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75 | static FNDISPARSEARMV8 disArmV8ParseImmRel;
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76 | static FNDISPARSEARMV8 disArmV8ParseImmAdr;
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77 | static FNDISPARSEARMV8 disArmV8ParseReg;
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78 | static FNDISPARSEARMV8 disArmV8ParseImmsImmrN;
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79 | static FNDISPARSEARMV8 disArmV8ParseHw;
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80 | static FNDISPARSEARMV8 disArmV8ParseCond;
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81 | static FNDISPARSEARMV8 disArmV8ParsePState;
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82 | /** @} */
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83 |
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84 |
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85 | /** @name Decoders
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86 | * @{ */
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87 | static FNDISDECODEARMV8 disArmV8DecodeIllegal;
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88 | static FNDISDECODEARMV8 disArmV8DecodeLookup;
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89 | /** @} */
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90 |
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91 |
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92 | /*********************************************************************************************************************************
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93 | * Global Variables *
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94 | *********************************************************************************************************************************/
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95 | /** Parser opcode table for full disassembly. */
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96 | static PFNDISPARSEARMV8 const g_apfnDisasm[kDisParmParseMax] =
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97 | {
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98 | disArmV8ParseIllegal,
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99 | disArmV8ParseImm,
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100 | disArmV8ParseImmRel,
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101 | disArmV8ParseImmAdr,
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102 | disArmV8ParseReg,
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103 | disArmV8ParseImmsImmrN,
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104 | disArmV8ParseHw,
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105 | disArmV8ParseCond,
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106 | disArmV8ParsePState,
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107 | };
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108 |
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109 |
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110 | /** Opcode decoder table. */
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111 | static PFNDISDECODEARMV8 const g_apfnOpcDecode[kDisArmV8OpcDecodeMax] =
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112 | {
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113 | disArmV8DecodeIllegal,
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114 | disArmV8DecodeLookup,
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115 | };
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116 |
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117 |
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118 | DECLINLINE(uint32_t) disArmV8ExtractBitVecFromInsn(uint32_t u32Insn, uint8_t idxBitStart, uint8_t cBits)
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119 | {
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120 | uint32_t fMask = RT_BIT_32(idxBitStart + cBits) - 1;
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121 | return (u32Insn & fMask) >> idxBitStart;
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122 | }
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123 |
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124 |
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125 | DECLINLINE(int32_t) disArmV8ExtractBitVecFromInsnSignExtend(uint32_t u32Insn, uint8_t idxBitStart, uint8_t cBits)
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126 | {
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127 | uint32_t fMask = RT_BIT_32(idxBitStart + cBits) - 1;
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128 | uint32_t fSign = ~(UINT32_MAX & (RT_BIT_32(cBits - 1) - 1));
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129 | uint32_t fValue = (u32Insn & fMask) >> idxBitStart;
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130 | if (fValue & fSign)
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131 | return (int32_t)(fValue | fSign);
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132 |
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133 | return (int32_t)fValue;
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134 | }
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135 |
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136 |
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137 | static int disArmV8ParseIllegal(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)
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138 | {
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139 | RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, f64Bit);
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140 | AssertFailed();
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141 | return VERR_INTERNAL_ERROR;
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142 | }
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143 |
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144 |
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145 | static int disArmV8ParseImm(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)
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146 | {
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147 | RT_NOREF(pDis, pInsnClass, f64Bit);
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148 |
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149 | AssertReturn(pInsnParm->idxBitStart + pInsnParm->cBits < 32, VERR_INTERNAL_ERROR_2);
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150 |
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151 | pParam->uValue = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits);
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152 | if (pInsnParm->cBits <= 8)
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153 | {
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154 | pParam->arch.armv8.cb = sizeof(uint8_t);
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155 | pParam->fUse |= DISUSE_IMMEDIATE8;
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156 | }
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157 | else if (pInsnParm->cBits <= 16)
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158 | {
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159 | pParam->arch.armv8.cb = sizeof(uint16_t);
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160 | pParam->fUse |= DISUSE_IMMEDIATE16;
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161 | }
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162 | else if (pInsnParm->cBits <= 32)
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163 | {
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164 | pParam->arch.armv8.cb = sizeof(uint32_t);
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165 | pParam->fUse |= DISUSE_IMMEDIATE32;
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166 | }
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167 | else
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168 | AssertReleaseFailed();
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169 |
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170 | return VINF_SUCCESS;
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171 | }
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172 |
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173 |
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174 | static int disArmV8ParseImmRel(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)
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175 | {
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176 | RT_NOREF(pDis, pInsnClass, f64Bit);
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177 |
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178 | AssertReturn(pInsnParm->idxBitStart + pInsnParm->cBits < 32, VERR_INTERNAL_ERROR_2);
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179 |
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180 | pParam->uValue = (int64_t)disArmV8ExtractBitVecFromInsnSignExtend(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits);
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181 | if (pInsnParm->cBits <= 8)
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182 | {
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183 | pParam->arch.armv8.cb = sizeof(int8_t);
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184 | pParam->fUse |= DISUSE_IMMEDIATE8_REL;
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185 | }
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186 | else if (pInsnParm->cBits <= 16)
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187 | {
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188 | pParam->arch.armv8.cb = sizeof(int16_t);
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189 | pParam->fUse |= DISUSE_IMMEDIATE16_REL;
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190 | }
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191 | else if (pInsnParm->cBits <= 32)
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192 | {
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193 | pParam->arch.armv8.cb = sizeof(int32_t);
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194 | pParam->fUse |= DISUSE_IMMEDIATE32_REL;
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195 | }
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196 | else
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197 | AssertReleaseFailed();
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198 |
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199 | return VINF_SUCCESS;
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200 | }
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201 |
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202 |
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203 | static int disArmV8ParseImmAdr(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)
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204 | {
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205 | RT_NOREF(pDis, pInsnClass, f64Bit, pInsnParm);
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206 |
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207 | pParam->uValue = disArmV8ExtractBitVecFromInsn(u32Insn, 5, 19);
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208 | pParam->uValue |= disArmV8ExtractBitVecFromInsn(u32Insn, 29, 2) << 29;
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209 | pParam->fUse |= DISUSE_IMMEDIATE32;
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210 | return VINF_SUCCESS;
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211 | }
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212 |
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213 |
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214 | static int disArmV8ParseReg(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)
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215 | {
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216 | RT_NOREF(pDis, pInsnClass);
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217 | pParam->arch.armv8.Reg.idxGenReg = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits);
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218 | pParam->arch.armv8.cb = f64Bit ? sizeof(uint64_t) : sizeof(uint32_t);
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219 | pParam->fUse |= f64Bit ? DISUSE_REG_GEN64 : DISUSE_REG_GEN32;
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220 | return VINF_SUCCESS;
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221 | }
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222 |
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223 |
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224 | static int disArmV8ParseImmsImmrN(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)
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225 | {
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226 | RT_NOREF(pDis);
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227 | AssertReturn(pInsnParm->cBits == 13, VERR_INTERNAL_ERROR_2);
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228 |
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229 | uint32_t u32ImmRaw = disArmV8ExtractBitVecFromInsn(u32Insn, pInsnParm->idxBitStart, pInsnParm->cBits);
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230 | /* N bit must be 0 if 32-bit variant is used. */
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231 | if ( ( (u32ImmRaw & RT_BIT_32(12))
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232 | && !f64Bit)
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233 | || ( !(u32ImmRaw & RT_BIT_32(12))
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234 | && f64Bit
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235 | && (pInsnClass->fClass & DISARMV8INSNCLASS_F_N_FORCED_1_ON_64BIT)))
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236 | return VERR_DIS_INVALID_OPCODE;
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237 |
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238 | /** @todo Decode according to spec. */
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239 | pParam->uValue = u32ImmRaw;
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240 | pParam->arch.armv8.cb = sizeof(uint32_t);
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241 | pParam->fUse |= DISUSE_IMMEDIATE32;
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242 | return VINF_SUCCESS;
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243 | }
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244 |
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245 |
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246 | static int disArmV8ParseHw(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)
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247 | {
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248 | RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, f64Bit);
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249 | AssertFailed();
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250 | /** @todo */
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251 | return VINF_SUCCESS;
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252 | }
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253 |
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254 |
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255 | static int disArmV8ParseCond(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)
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256 | {
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257 | RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, f64Bit);
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258 | //AssertFailed();
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259 | /** @todo */
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260 | return VINF_SUCCESS;
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261 | }
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262 |
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263 |
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264 | static int disArmV8ParsePState(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass, PDISOPPARAM pParam, PCDISARMV8INSNPARAM pInsnParm, bool f64Bit)
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265 | {
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266 | RT_NOREF(pDis, u32Insn, pInsnClass, pParam, pInsnParm, f64Bit);
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267 | //AssertFailed();
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268 | /** @todo */
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269 | return VINF_SUCCESS;
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270 | }
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271 |
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272 |
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273 | static uint32_t disArmV8DecodeIllegal(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass)
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274 | {
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275 | RT_NOREF(pDis, u32Insn, pInsnClass);
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276 | AssertFailed();
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277 | return UINT32_MAX;
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278 | }
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279 |
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280 |
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281 | static uint32_t disArmV8DecodeLookup(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8INSNCLASS pInsnClass)
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282 | {
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283 | RT_NOREF(pDis);
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284 |
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285 | for (uint32_t i = 0; i < pInsnClass->Hdr.cDecode; i++)
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286 | {
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287 | PCDISARMV8OPCODE pOp = &pInsnClass->paOpcodes[i];
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288 | if (u32Insn == pOp->fValue)
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289 | return i;
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290 | }
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291 |
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292 | return UINT32_MAX;
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293 | }
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294 |
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295 |
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296 | static int disArmV8A64ParseInstruction(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8OPCODE pOp, PCDISARMV8INSNCLASS pInsnClass)
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297 | {
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298 | AssertPtr(pOp);
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299 | AssertPtr(pDis);
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300 | Assert((u32Insn & pOp->fMask) == pOp->fValue);
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301 |
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302 | /* Should contain the parameter type on input. */
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303 | pDis->Param1.arch.armv8.fParam = pOp->Opc.fParam1;
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304 | pDis->Param2.arch.armv8.fParam = pOp->Opc.fParam2;
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305 | pDis->Param3.arch.armv8.fParam = pOp->Opc.fParam3;
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306 | pDis->Param4.arch.armv8.fParam = pOp->Opc.fParam4;
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307 |
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308 | pDis->pCurInstr = &pOp->Opc;
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309 | Assert(&pOp->Opc != &g_ArmV8A64InvalidOpcode[0]);
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310 |
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311 | bool f64Bit = false;
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312 |
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313 | if (pInsnClass->fClass & DISARMV8INSNCLASS_F_SF)
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314 | f64Bit = RT_BOOL(u32Insn & RT_BIT_32(31));
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315 | else if (pInsnClass->fClass & DISARMV8INSNCLASS_F_FORCED_64BIT)
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316 | f64Bit = true;
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317 |
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318 | int rc = VINF_SUCCESS;
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319 | if (pInsnClass->aParms[0].idxParse != kDisParmParseNop)
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320 | rc = g_apfnDisasm[pInsnClass->aParms[0].idxParse](pDis, u32Insn, pInsnClass, &pDis->Param1, &pInsnClass->aParms[0], f64Bit);
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321 |
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322 | if ( pInsnClass->aParms[1].idxParse != kDisParmParseNop
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323 | && RT_SUCCESS(rc))
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324 | rc = g_apfnDisasm[pInsnClass->aParms[1].idxParse](pDis, u32Insn, pInsnClass, &pDis->Param2, &pInsnClass->aParms[1], f64Bit);
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325 |
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326 | if ( pInsnClass->aParms[2].idxParse != kDisParmParseNop
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327 | && RT_SUCCESS(rc))
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328 | rc = g_apfnDisasm[pInsnClass->aParms[2].idxParse](pDis, u32Insn, pInsnClass, &pDis->Param3, &pInsnClass->aParms[2], f64Bit);
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329 |
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330 | if ( pInsnClass->aParms[3].idxParse != kDisParmParseNop
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331 | && RT_SUCCESS(rc))
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332 | rc = g_apfnDisasm[pInsnClass->aParms[3].idxParse](pDis, u32Insn, pInsnClass, &pDis->Param4, &pInsnClass->aParms[3], f64Bit);
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333 |
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334 | /* If parameter parsing returned an invalid opcode error the encoding is invalid. */
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335 | if (rc == VERR_DIS_INVALID_OPCODE)
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336 | {
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337 | pDis->pCurInstr = &g_ArmV8A64InvalidOpcode[0];
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338 |
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339 | pDis->Param1.arch.armv8.fParam = g_ArmV8A64InvalidOpcode[0].fParam1;
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340 | pDis->Param2.arch.armv8.fParam = g_ArmV8A64InvalidOpcode[0].fParam2;
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341 | pDis->Param3.arch.armv8.fParam = g_ArmV8A64InvalidOpcode[0].fParam3;
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342 | pDis->Param4.arch.armv8.fParam = g_ArmV8A64InvalidOpcode[0].fParam4;
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343 | }
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344 | pDis->rc = rc;
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345 | return rc;
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346 | }
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347 |
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348 |
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349 | static int disArmV8A64ParseInvOpcode(PDISSTATE pDis)
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350 | {
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351 | pDis->pCurInstr = &g_ArmV8A64InvalidOpcode[0];
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352 | pDis->rc = VERR_DIS_INVALID_OPCODE;
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353 | return VERR_DIS_INVALID_OPCODE;
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354 | }
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355 |
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356 |
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357 | static int disInstrArmV8DecodeWorker(PDISSTATE pDis, uint32_t u32Insn, PCDISARMV8DECODEHDR pHdr)
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358 | {
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359 | while ( pHdr
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360 | && pHdr->enmDecodeType != kDisArmV8DecodeType_InsnClass)
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361 | {
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362 | if (pHdr->enmDecodeType == kDisArmV8DecodeType_Map)
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363 | {
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364 | PCDISARMV8DECODEMAP pMap = (PCDISARMV8DECODEMAP)pHdr;
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365 |
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366 | uint32_t idxNext = (u32Insn & pMap->fMask) >> pMap->cShift;
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367 | if (RT_LIKELY(idxNext < pMap->Hdr.cDecode))
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368 | pHdr = pMap->papNext[idxNext];
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369 | else
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370 | {
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371 | pHdr = NULL;
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372 | break;
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373 | }
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374 | }
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375 | else
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376 | {
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377 | Assert(pHdr->enmDecodeType == kDisArmV8DecodeType_Table);
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378 | PCDISARMV8DECODETBL pTbl = (PCDISARMV8DECODETBL)pHdr;
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379 |
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380 | /* Walk all entries in the table and select the best match. */
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381 | pHdr = NULL;
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382 | for (uint32_t i = 0; i < pTbl->Hdr.cDecode; i++)
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383 | {
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384 | PCDISARMV8DECODETBLENTRY pEntry = &pTbl->paEntries[i];
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385 | if ((u32Insn & pEntry->fMask) == pEntry->fValue)
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386 | {
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387 | pHdr = pEntry->pHdrNext;
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388 | break;
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389 | }
|
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390 | }
|
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391 | }
|
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392 | }
|
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393 |
|
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394 | if (pHdr)
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395 | {
|
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396 | Assert(pHdr->enmDecodeType == kDisArmV8DecodeType_InsnClass);
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397 | PCDISARMV8INSNCLASS pInsnClass = (PCDISARMV8INSNCLASS)pHdr;
|
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398 |
|
---|
399 | /* Decode the opcode from the instruction class. */
|
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400 | uint32_t uOpcRaw = 0;
|
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401 | if (pInsnClass->Hdr.cDecode > 1)
|
---|
402 | {
|
---|
403 | uOpcRaw = (u32Insn & pInsnClass->fMask) >> pInsnClass->cShift;
|
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404 | if (pInsnClass->enmOpcDecode != kDisArmV8OpcDecodeNop)
|
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405 | uOpcRaw = g_apfnOpcDecode[pInsnClass->enmOpcDecode](pDis, uOpcRaw, pInsnClass);
|
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406 | }
|
---|
407 |
|
---|
408 | if (uOpcRaw < pInsnClass->Hdr.cDecode)
|
---|
409 | {
|
---|
410 | PCDISARMV8OPCODE pOp = &pInsnClass->paOpcodes[uOpcRaw];
|
---|
411 | return disArmV8A64ParseInstruction(pDis, u32Insn, pOp, pInsnClass);
|
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412 | }
|
---|
413 | }
|
---|
414 |
|
---|
415 | return disArmV8A64ParseInvOpcode(pDis);
|
---|
416 | }
|
---|
417 |
|
---|
418 |
|
---|
419 | /**
|
---|
420 | * Internal worker for DISInstrEx and DISInstrWithPrefetchedBytes.
|
---|
421 | *
|
---|
422 | * @returns VBox status code.
|
---|
423 | * @param pDis Initialized disassembler state.
|
---|
424 | * @param paOneByteMap The one byte opcode map to use.
|
---|
425 | * @param pcbInstr Where to store the instruction size. Can be NULL.
|
---|
426 | */
|
---|
427 | DECLHIDDEN(int) disInstrWorkerArmV8(PDISSTATE pDis, PCDISOPCODE paOneByteMap, uint32_t *pcbInstr)
|
---|
428 | {
|
---|
429 | RT_NOREF(paOneByteMap);
|
---|
430 |
|
---|
431 | if (pDis->uCpuMode == DISCPUMODE_ARMV8_A64)
|
---|
432 | {
|
---|
433 | *pcbInstr = sizeof(uint32_t);
|
---|
434 |
|
---|
435 | /* Instructions are always little endian and 4 bytes. */
|
---|
436 | uint32_t u32Insn = disReadDWord(pDis, 0 /*offInstr*/);
|
---|
437 | if (RT_FAILURE(pDis->rc))
|
---|
438 | return pDis->rc;
|
---|
439 |
|
---|
440 | pDis->u.u32 = RT_LE2H_U32(u32Insn);
|
---|
441 | pDis->cbInstr = sizeof(u32Insn);
|
---|
442 |
|
---|
443 | return disInstrArmV8DecodeWorker(pDis, u32Insn, &g_ArmV8A64DecodeL0.Hdr);
|
---|
444 | }
|
---|
445 |
|
---|
446 | AssertReleaseFailed();
|
---|
447 | return VERR_NOT_IMPLEMENTED;
|
---|
448 | }
|
---|
449 |
|
---|
450 |
|
---|
451 | /**
|
---|
452 | * Inlined worker that initializes the disassembler state.
|
---|
453 | *
|
---|
454 | * @returns The primary opcode map to use.
|
---|
455 | * @param pDis The disassembler state.
|
---|
456 | * @param uInstrAddr The instruction address.
|
---|
457 | * @param enmCpuMode The CPU mode.
|
---|
458 | * @param fFilter The instruction filter settings.
|
---|
459 | * @param pfnReadBytes The byte reader, can be NULL.
|
---|
460 | * @param pvUser The user data for the reader.
|
---|
461 | */
|
---|
462 | DECLHIDDEN(PCDISOPCODE) disInitializeStateArmV8(PDISSTATE pDis, DISCPUMODE enmCpuMode, uint32_t fFilter)
|
---|
463 | {
|
---|
464 | RT_NOREF(pDis, enmCpuMode, fFilter);
|
---|
465 | return NULL;
|
---|
466 | }
|
---|