1 | /*
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2 | * CDDL HEADER START
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3 | *
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4 | * The contents of this file are subject to the terms of the
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5 | * Common Development and Distribution License (the "License").
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6 | * You may not use this file except in compliance with the License.
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7 | *
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8 | * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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9 | * or http://www.opensolaris.org/os/licensing.
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10 | * See the License for the specific language governing permissions
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11 | * and limitations under the License.
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12 | *
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13 | * When distributing Covered Code, include this CDDL HEADER in each
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14 | * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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15 | * If applicable, add the following below this CDDL HEADER, with the
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16 | * fields enclosed by brackets "[]" replaced with your own identifying
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17 | * information: Portions Copyright [yyyy] [name of copyright owner]
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18 | *
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19 | * CDDL HEADER END
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20 | */
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21 |
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22 | /*
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23 | * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
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24 | * Use is subject to license terms.
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25 | */
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26 |
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27 | #include <sys/errno.h>
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28 | #include <sys/cpuvar.h>
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29 | #include <sys/stat.h>
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30 | #include <sys/modctl.h>
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31 | #include <sys/cmn_err.h>
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32 | #include <sys/ddi.h>
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33 | #include <sys/sunddi.h>
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34 | #include <sys/ksynch.h>
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35 | #include <sys/conf.h>
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36 | #include <sys/kmem.h>
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37 | #include <sys/kcpc.h>
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38 | #include <sys/cap_util.h>
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39 | #include <sys/cpc_pcbe.h>
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40 | #include <sys/cpc_impl.h>
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41 | #include <sys/dtrace_impl.h>
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42 |
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43 | /*
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44 | * DTrace CPU Performance Counter Provider
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45 | * ---------------------------------------
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46 | *
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47 | * The DTrace cpc provider allows DTrace consumers to access the CPU
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48 | * performance counter overflow mechanism of a CPU. The configuration
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49 | * presented in a probe specification is programmed into the performance
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50 | * counter hardware of all available CPUs on a system. Programming the
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51 | * hardware causes a counter on each CPU to begin counting events of the
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52 | * given type. When the specified number of events have occurred, an overflow
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53 | * interrupt will be generated and the probe is fired.
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54 | *
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55 | * The required configuration for the performance counter is encoded into
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56 | * the probe specification and this includes the performance counter event
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57 | * name, processor mode, overflow rate and an optional unit mask.
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58 | *
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59 | * Most processors provide several counters (PICs) which can count all or a
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60 | * subset of the events available for a given CPU. However, when overflow
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61 | * profiling is being used, not all CPUs can detect which counter generated the
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62 | * overflow interrupt. In this case we cannot reliably determine which counter
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63 | * overflowed and we therefore only allow such CPUs to configure one event at
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64 | * a time. Processors that can determine the counter which overflowed are
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65 | * allowed to program as many events at one time as possible (in theory up to
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66 | * the number of instrumentation counters supported by that platform).
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67 | * Therefore, multiple consumers can enable multiple probes at the same time
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68 | * on such platforms. Platforms which cannot determine the source of an
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69 | * overflow interrupt are only allowed to program a single event at one time.
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70 | *
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71 | * The performance counter hardware is made available to consumers on a
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72 | * first-come, first-served basis. Only a finite amount of hardware resource
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73 | * is available and, while we make every attempt to accomodate requests from
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74 | * consumers, we must deny requests when hardware resources have been exhausted.
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75 | * A consumer will fail to enable probes when resources are currently in use.
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76 | *
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77 | * The cpc provider contends for shared hardware resources along with other
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78 | * consumers of the kernel CPU performance counter subsystem (e.g. cpustat(1M)).
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79 | * Only one such consumer can use the performance counters at any one time and
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80 | * counters are made available on a first-come, first-served basis. As with
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81 | * cpustat, the cpc provider has priority over per-LWP libcpc usage (e.g.
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82 | * cputrack(1)). Invoking the cpc provider will cause all existing per-LWP
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83 | * counter contexts to be invalidated.
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84 | */
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85 |
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86 | typedef struct dcpc_probe {
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87 | char dcpc_event_name[CPC_MAX_EVENT_LEN];
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88 | int dcpc_flag; /* flags (USER/SYS) */
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89 | uint32_t dcpc_ovfval; /* overflow value */
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90 | int64_t dcpc_umask; /* umask/emask for this event */
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91 | int dcpc_picno; /* pic this event is programmed in */
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92 | int dcpc_enabled; /* probe is actually enabled? */
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93 | int dcpc_disabling; /* probe is currently being disabled */
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94 | dtrace_id_t dcpc_id; /* probeid this request is enabling */
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95 | int dcpc_actv_req_idx; /* idx into dcpc_actv_reqs[] */
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96 | } dcpc_probe_t;
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97 |
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98 | static dev_info_t *dcpc_devi;
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99 | static dtrace_provider_id_t dcpc_pid;
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100 | static dcpc_probe_t **dcpc_actv_reqs;
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101 | static uint32_t dcpc_enablings = 0;
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102 | static int dcpc_ovf_mask = 0;
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103 | static int dcpc_mult_ovf_cap = 0;
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104 | static int dcpc_mask_type = 0;
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105 |
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106 | /*
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107 | * When the dcpc provider is loaded, dcpc_min_overflow is set to either
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108 | * DCPC_MIN_OVF_DEFAULT or the value that dcpc-min-overflow is set to in
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109 | * the dcpc.conf file. Decrease this value to set probes with smaller
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110 | * overflow values. Remember that very small values could render a system
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111 | * unusable with frequently occurring events.
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112 | */
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113 | #define DCPC_MIN_OVF_DEFAULT 5000
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114 | static uint32_t dcpc_min_overflow;
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115 |
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116 | static int dcpc_aframes = 0; /* override for artificial frame setting */
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117 | #if defined(__x86)
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118 | #define DCPC_ARTIFICIAL_FRAMES 8
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119 | #elif defined(__sparc)
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120 | #define DCPC_ARTIFICIAL_FRAMES 2
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121 | #endif
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122 |
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123 | /*
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124 | * Called from the platform overflow interrupt handler. 'bitmap' is a mask
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125 | * which contains the pic(s) that have overflowed.
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126 | */
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127 | static void
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128 | dcpc_fire(uint64_t bitmap)
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129 | {
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130 | int i;
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131 |
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132 | /*
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133 | * No counter was marked as overflowing. Shout about it and get out.
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134 | */
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135 | if ((bitmap & dcpc_ovf_mask) == 0) {
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136 | cmn_err(CE_NOTE, "dcpc_fire: no counter overflow found\n");
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137 | return;
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138 | }
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139 |
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140 | /*
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141 | * This is the common case of a processor that doesn't support
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142 | * multiple overflow events. Such systems are only allowed a single
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143 | * enabling and therefore we just look for the first entry in
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144 | * the active request array.
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145 | */
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146 | if (!dcpc_mult_ovf_cap) {
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147 | for (i = 0; i < cpc_ncounters; i++) {
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148 | if (dcpc_actv_reqs[i] != NULL) {
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149 | dtrace_probe(dcpc_actv_reqs[i]->dcpc_id,
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150 | CPU->cpu_cpcprofile_pc,
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151 | CPU->cpu_cpcprofile_upc, 0, 0, 0);
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152 | return;
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153 | }
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154 | }
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155 | return;
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156 | }
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157 |
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158 | /*
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159 | * This is a processor capable of handling multiple overflow events.
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160 | * Iterate over the array of active requests and locate the counters
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161 | * that overflowed (note: it is possible for more than one counter to
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162 | * have overflowed at the same time).
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163 | */
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164 | for (i = 0; i < cpc_ncounters; i++) {
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165 | if (dcpc_actv_reqs[i] != NULL &&
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166 | (bitmap & (1ULL << dcpc_actv_reqs[i]->dcpc_picno))) {
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167 | dtrace_probe(dcpc_actv_reqs[i]->dcpc_id,
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168 | CPU->cpu_cpcprofile_pc,
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169 | CPU->cpu_cpcprofile_upc, 0, 0, 0);
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170 | }
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171 | }
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172 | }
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173 |
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174 | static void
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175 | dcpc_create_probe(dtrace_provider_id_t id, const char *probename,
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176 | char *eventname, int64_t umask, uint32_t ovfval, char flag)
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177 | {
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178 | dcpc_probe_t *pp;
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179 | int nr_frames = DCPC_ARTIFICIAL_FRAMES + dtrace_mach_aframes();
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180 |
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181 | if (dcpc_aframes)
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182 | nr_frames = dcpc_aframes;
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183 |
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184 | if (dtrace_probe_lookup(id, NULL, NULL, probename) != 0)
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185 | return;
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186 |
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187 | pp = kmem_zalloc(sizeof (dcpc_probe_t), KM_SLEEP);
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188 | (void) strncpy(pp->dcpc_event_name, eventname,
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189 | sizeof (pp->dcpc_event_name) - 1);
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190 | pp->dcpc_event_name[sizeof (pp->dcpc_event_name) - 1] = '\0';
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191 | pp->dcpc_flag = flag | CPC_OVF_NOTIFY_EMT;
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192 | pp->dcpc_ovfval = ovfval;
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193 | pp->dcpc_umask = umask;
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194 | pp->dcpc_actv_req_idx = pp->dcpc_picno = pp->dcpc_disabling = -1;
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195 |
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196 | pp->dcpc_id = dtrace_probe_create(id, NULL, NULL, probename,
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197 | nr_frames, pp);
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198 | }
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199 |
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200 | /*ARGSUSED*/
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201 | static void
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202 | dcpc_provide(void *arg, const dtrace_probedesc_t *desc)
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203 | {
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204 | /*
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205 | * The format of a probe is:
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206 | *
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207 | * event_name-mode-{optional_umask}-overflow_rate
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208 | * e.g.
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209 | * DC_refill_from_system-user-0x1e-50000, or,
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210 | * DC_refill_from_system-all-10000
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211 | *
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212 | */
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213 | char *str, *end, *p;
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214 | int i, flag = 0;
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215 | char event[CPC_MAX_EVENT_LEN];
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216 | long umask = -1, val = 0;
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217 | size_t evlen, len;
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218 |
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219 | /*
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220 | * The 'cpc' provider offers no probes by default.
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221 | */
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222 | if (desc == NULL)
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223 | return;
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224 |
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225 | len = strlen(desc->dtpd_name);
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226 | p = str = kmem_alloc(len + 1, KM_SLEEP);
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227 | (void) strcpy(str, desc->dtpd_name);
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228 |
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229 | /*
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230 | * We have a poor man's strtok() going on here. Replace any hyphens
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231 | * in the the probe name with NULL characters in order to make it
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232 | * easy to parse the string with regular string functions.
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233 | */
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234 | for (i = 0; i < len; i++) {
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235 | if (str[i] == '-')
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236 | str[i] = '\0';
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237 | }
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238 |
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239 | /*
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240 | * The first part of the string must be either a platform event
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241 | * name or a generic event name.
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242 | */
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243 | evlen = strlen(p);
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244 | (void) strncpy(event, p, CPC_MAX_EVENT_LEN - 1);
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245 | event[CPC_MAX_EVENT_LEN - 1] = '\0';
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246 |
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247 | /*
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248 | * The next part of the name is the mode specification. Valid
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249 | * settings are "user", "kernel" or "all".
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250 | */
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251 | p += evlen + 1;
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252 |
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253 | if (strcmp(p, "user") == 0)
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254 | flag |= CPC_COUNT_USER;
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255 | else if (strcmp(p, "kernel") == 0)
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256 | flag |= CPC_COUNT_SYSTEM;
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257 | else if (strcmp(p, "all") == 0)
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258 | flag |= CPC_COUNT_USER | CPC_COUNT_SYSTEM;
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259 | else
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260 | goto err;
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261 |
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262 | /*
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263 | * Next we either have a mask specification followed by an overflow
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264 | * rate or just an overflow rate on its own.
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265 | */
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266 | p += strlen(p) + 1;
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267 | if (p[0] == '0' && (p[1] == 'x' || p[1] == 'X')) {
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268 | /*
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269 | * A unit mask can only be specified if:
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270 | * 1) this performance counter back end supports masks.
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271 | * 2) the specified event is platform specific.
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272 | * 3) a valid hex number is converted.
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273 | * 4) no extraneous characters follow the mask specification.
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274 | */
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275 | if (dcpc_mask_type != 0 && strncmp(event, "PAPI", 4) != 0 &&
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276 | ddi_strtol(p, &end, 16, &umask) == 0 &&
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277 | end == p + strlen(p)) {
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278 | p += strlen(p) + 1;
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279 | } else {
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280 | goto err;
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281 | }
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282 | }
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283 |
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284 | /*
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285 | * This final part must be an overflow value which has to be greater
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286 | * than the minimum permissible overflow rate.
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287 | */
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288 | if ((ddi_strtol(p, &end, 10, &val) != 0) || end != p + strlen(p) ||
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289 | val < dcpc_min_overflow)
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290 | goto err;
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291 |
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292 | /*
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293 | * Validate the event and create the probe.
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294 | */
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295 | for (i = 0; i < cpc_ncounters; i++) {
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296 | char *events, *cp, *p, *end;
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297 | int found = 0, j;
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298 | size_t llen;
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299 |
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300 | if ((events = kcpc_list_events(i)) == NULL)
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301 | goto err;
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302 |
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303 | llen = strlen(events);
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304 | p = cp = ddi_strdup(events, KM_NOSLEEP);
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305 | end = cp + llen;
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306 |
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307 | for (j = 0; j < llen; j++) {
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308 | if (cp[j] == ',')
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309 | cp[j] = '\0';
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310 | }
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311 |
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312 | while (p < end && found == 0) {
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313 | if (strcmp(p, event) == 0) {
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314 | dcpc_create_probe(dcpc_pid, desc->dtpd_name,
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315 | event, umask, (uint32_t)val, flag);
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316 | found = 1;
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317 | }
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318 | p += strlen(p) + 1;
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319 | }
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320 | kmem_free(cp, llen + 1);
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321 |
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322 | if (found)
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323 | break;
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324 | }
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325 |
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326 | err:
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327 | kmem_free(str, len + 1);
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328 | }
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329 |
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330 | /*ARGSUSED*/
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331 | static void
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332 | dcpc_destroy(void *arg, dtrace_id_t id, void *parg)
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333 | {
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334 | dcpc_probe_t *pp = parg;
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335 |
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336 | ASSERT(pp->dcpc_enabled == 0);
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337 | kmem_free(pp, sizeof (dcpc_probe_t));
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338 | }
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339 |
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340 | /*ARGSUSED*/
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341 | static int
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342 | dcpc_usermode(void *arg, dtrace_id_t id, void *parg)
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343 | {
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344 | return (CPU->cpu_cpcprofile_pc == 0);
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345 | }
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346 |
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347 | static void
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348 | dcpc_populate_set(cpu_t *c, dcpc_probe_t *pp, kcpc_set_t *set, int reqno)
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349 | {
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350 | kcpc_set_t *oset;
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351 | int i;
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352 |
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353 | (void) strncpy(set->ks_req[reqno].kr_event, pp->dcpc_event_name,
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354 | CPC_MAX_EVENT_LEN);
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355 | set->ks_req[reqno].kr_config = NULL;
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356 | set->ks_req[reqno].kr_index = reqno;
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357 | set->ks_req[reqno].kr_picnum = -1;
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358 | set->ks_req[reqno].kr_flags = pp->dcpc_flag;
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359 |
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360 | /*
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361 | * If a unit mask has been specified then detect which attribute
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362 | * the platform needs. For now, it's either "umask" or "emask".
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363 | */
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364 | if (pp->dcpc_umask >= 0) {
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365 | set->ks_req[reqno].kr_attr =
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366 | kmem_zalloc(sizeof (kcpc_attr_t), KM_SLEEP);
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367 | set->ks_req[reqno].kr_nattrs = 1;
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368 | if (dcpc_mask_type & DCPC_UMASK)
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369 | (void) strncpy(set->ks_req[reqno].kr_attr->ka_name,
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370 | "umask", 5);
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371 | else
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372 | (void) strncpy(set->ks_req[reqno].kr_attr->ka_name,
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373 | "emask", 5);
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374 | set->ks_req[reqno].kr_attr->ka_val = pp->dcpc_umask;
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375 | } else {
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376 | set->ks_req[reqno].kr_attr = NULL;
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377 | set->ks_req[reqno].kr_nattrs = 0;
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378 | }
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379 |
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380 | /*
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381 | * If this probe is enabled, obtain its current countdown value
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382 | * and use that. The CPUs cpc context might not exist yet if we
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383 | * are dealing with a CPU that is just coming online.
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384 | */
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385 | if (pp->dcpc_enabled && (c->cpu_cpc_ctx != NULL)) {
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386 | oset = c->cpu_cpc_ctx->kc_set;
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387 |
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388 | for (i = 0; i < oset->ks_nreqs; i++) {
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389 | if (strcmp(oset->ks_req[i].kr_event,
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390 | set->ks_req[reqno].kr_event) == 0) {
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391 | set->ks_req[reqno].kr_preset =
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392 | *(oset->ks_req[i].kr_data);
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393 | }
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394 | }
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395 | } else {
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396 | set->ks_req[reqno].kr_preset = UINT64_MAX - pp->dcpc_ovfval;
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397 | }
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398 |
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399 | set->ks_nreqs++;
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400 | }
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401 |
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402 |
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403 | /*
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404 | * Create a fresh request set for the enablings represented in the
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405 | * 'dcpc_actv_reqs' array which contains the probes we want to be
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406 | * in the set. This can be called for several reasons:
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407 | *
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408 | * 1) We are on a single or multi overflow platform and we have no
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409 | * current events so we can just create the set and initialize it.
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410 | * 2) We are on a multi-overflow platform and we already have one or
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411 | * more existing events and we are adding a new enabling. Create a
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412 | * new set and copy old requests in and then add the new request.
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413 | * 3) We are on a multi-overflow platform and we have just removed an
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414 | * enabling but we still have enablings whch are valid. Create a new
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415 | * set and copy in still valid requests.
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416 | */
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417 | static kcpc_set_t *
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418 | dcpc_create_set(cpu_t *c)
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419 | {
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420 | int i, reqno = 0;
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421 | int active_requests = 0;
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422 | kcpc_set_t *set;
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423 |
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424 | /*
|
---|
425 | * First get a count of the number of currently active requests.
|
---|
426 | * Note that dcpc_actv_reqs[] should always reflect which requests
|
---|
427 | * we want to be in the set that is to be created. It is the
|
---|
428 | * responsibility of the caller of dcpc_create_set() to adjust that
|
---|
429 | * array accordingly beforehand.
|
---|
430 | */
|
---|
431 | for (i = 0; i < cpc_ncounters; i++) {
|
---|
432 | if (dcpc_actv_reqs[i] != NULL)
|
---|
433 | active_requests++;
|
---|
434 | }
|
---|
435 |
|
---|
436 | set = kmem_zalloc(sizeof (kcpc_set_t), KM_SLEEP);
|
---|
437 |
|
---|
438 | set->ks_req =
|
---|
439 | kmem_zalloc(sizeof (kcpc_request_t) * active_requests, KM_SLEEP);
|
---|
440 |
|
---|
441 | set->ks_data =
|
---|
442 | kmem_zalloc(active_requests * sizeof (uint64_t), KM_SLEEP);
|
---|
443 |
|
---|
444 | /*
|
---|
445 | * Look for valid entries in the active requests array and populate
|
---|
446 | * the request set for any entries found.
|
---|
447 | */
|
---|
448 | for (i = 0; i < cpc_ncounters; i++) {
|
---|
449 | if (dcpc_actv_reqs[i] != NULL) {
|
---|
450 | dcpc_populate_set(c, dcpc_actv_reqs[i], set, reqno);
|
---|
451 | reqno++;
|
---|
452 | }
|
---|
453 | }
|
---|
454 |
|
---|
455 | return (set);
|
---|
456 | }
|
---|
457 |
|
---|
458 | static int
|
---|
459 | dcpc_program_cpu_event(cpu_t *c)
|
---|
460 | {
|
---|
461 | int i, j, subcode;
|
---|
462 | kcpc_ctx_t *ctx, *octx;
|
---|
463 | kcpc_set_t *set;
|
---|
464 |
|
---|
465 | set = dcpc_create_set(c);
|
---|
466 |
|
---|
467 | set->ks_ctx = ctx = kcpc_ctx_alloc(KM_SLEEP);
|
---|
468 | ctx->kc_set = set;
|
---|
469 | ctx->kc_cpuid = c->cpu_id;
|
---|
470 |
|
---|
471 | if (kcpc_assign_reqs(set, ctx) != 0)
|
---|
472 | goto err;
|
---|
473 |
|
---|
474 | if (kcpc_configure_reqs(ctx, set, &subcode) != 0)
|
---|
475 | goto err;
|
---|
476 |
|
---|
477 | for (i = 0; i < set->ks_nreqs; i++) {
|
---|
478 | for (j = 0; j < cpc_ncounters; j++) {
|
---|
479 | if (dcpc_actv_reqs[j] != NULL &&
|
---|
480 | strcmp(set->ks_req[i].kr_event,
|
---|
481 | dcpc_actv_reqs[j]->dcpc_event_name) == 0) {
|
---|
482 | dcpc_actv_reqs[j]->dcpc_picno =
|
---|
483 | set->ks_req[i].kr_picnum;
|
---|
484 | }
|
---|
485 | }
|
---|
486 | }
|
---|
487 |
|
---|
488 | /*
|
---|
489 | * If we already have an active enabling then save the current cpc
|
---|
490 | * context away.
|
---|
491 | */
|
---|
492 | octx = c->cpu_cpc_ctx;
|
---|
493 |
|
---|
494 | kcpc_cpu_program(c, ctx);
|
---|
495 |
|
---|
496 | if (octx != NULL) {
|
---|
497 | kcpc_set_t *oset = octx->kc_set;
|
---|
498 | kmem_free(oset->ks_data, oset->ks_nreqs * sizeof (uint64_t));
|
---|
499 | kcpc_free_configs(oset);
|
---|
500 | kcpc_free_set(oset);
|
---|
501 | kcpc_ctx_free(octx);
|
---|
502 | }
|
---|
503 |
|
---|
504 | return (0);
|
---|
505 |
|
---|
506 | err:
|
---|
507 | /*
|
---|
508 | * We failed to configure this request up so free things up and
|
---|
509 | * get out.
|
---|
510 | */
|
---|
511 | kcpc_free_configs(set);
|
---|
512 | kmem_free(set->ks_data, set->ks_nreqs * sizeof (uint64_t));
|
---|
513 | kcpc_free_set(set);
|
---|
514 | kcpc_ctx_free(ctx);
|
---|
515 |
|
---|
516 | return (-1);
|
---|
517 | }
|
---|
518 |
|
---|
519 | static void
|
---|
520 | dcpc_disable_cpu(cpu_t *c)
|
---|
521 | {
|
---|
522 | kcpc_ctx_t *ctx;
|
---|
523 | kcpc_set_t *set;
|
---|
524 |
|
---|
525 | /*
|
---|
526 | * Leave this CPU alone if it's already offline.
|
---|
527 | */
|
---|
528 | if (c->cpu_flags & CPU_OFFLINE)
|
---|
529 | return;
|
---|
530 |
|
---|
531 | /*
|
---|
532 | * Grab CPUs CPC context before kcpc_cpu_stop() stops counters and
|
---|
533 | * changes it.
|
---|
534 | */
|
---|
535 | ctx = c->cpu_cpc_ctx;
|
---|
536 |
|
---|
537 | kcpc_cpu_stop(c, B_FALSE);
|
---|
538 |
|
---|
539 | set = ctx->kc_set;
|
---|
540 |
|
---|
541 | kcpc_free_configs(set);
|
---|
542 | kmem_free(set->ks_data, set->ks_nreqs * sizeof (uint64_t));
|
---|
543 | kcpc_free_set(set);
|
---|
544 | kcpc_ctx_free(ctx);
|
---|
545 | }
|
---|
546 |
|
---|
547 | /*
|
---|
548 | * The dcpc_*_interrupts() routines are responsible for manipulating the
|
---|
549 | * per-CPU dcpc interrupt state byte. The purpose of the state byte is to
|
---|
550 | * synchronize processing of hardware overflow interrupts wth configuration
|
---|
551 | * changes made to the CPU performance counter subsystem by the dcpc provider.
|
---|
552 | *
|
---|
553 | * The dcpc provider claims ownership of the overflow interrupt mechanism
|
---|
554 | * by transitioning the state byte from DCPC_INTR_INACTIVE (indicating the
|
---|
555 | * dcpc provider is not in use) to DCPC_INTR_FREE (the dcpc provider owns the
|
---|
556 | * overflow mechanism and interrupts may be processed). Before modifying
|
---|
557 | * a CPUs configuration state the state byte is transitioned from
|
---|
558 | * DCPC_INTR_FREE to DCPC_INTR_CONFIG ("configuration in process" state).
|
---|
559 | * The hardware overflow handler, kcpc_hw_overflow_intr(), will only process
|
---|
560 | * an interrupt when a configuration is not in process (i.e. the state is
|
---|
561 | * marked as free). During interrupt processing the state is set to
|
---|
562 | * DCPC_INTR_PROCESSING by the overflow handler. When the last dcpc based
|
---|
563 | * enabling is removed, the state byte is set to DCPC_INTR_INACTIVE to indicate
|
---|
564 | * the dcpc provider is no longer interested in overflow interrupts.
|
---|
565 | */
|
---|
566 | static void
|
---|
567 | dcpc_block_interrupts(void)
|
---|
568 | {
|
---|
569 | cpu_t *c = cpu_list;
|
---|
570 | uint8_t *state;
|
---|
571 |
|
---|
572 | ASSERT(cpu_core[c->cpu_id].cpuc_dcpc_intr_state != DCPC_INTR_INACTIVE);
|
---|
573 |
|
---|
574 | do {
|
---|
575 | state = &cpu_core[c->cpu_id].cpuc_dcpc_intr_state;
|
---|
576 |
|
---|
577 | while (atomic_cas_8(state, DCPC_INTR_FREE,
|
---|
578 | DCPC_INTR_CONFIG) != DCPC_INTR_FREE)
|
---|
579 | continue;
|
---|
580 |
|
---|
581 | } while ((c = c->cpu_next) != cpu_list);
|
---|
582 | }
|
---|
583 |
|
---|
584 | /*
|
---|
585 | * Set all CPUs dcpc interrupt state to DCPC_INTR_FREE to indicate that
|
---|
586 | * overflow interrupts can be processed safely.
|
---|
587 | */
|
---|
588 | static void
|
---|
589 | dcpc_release_interrupts(void)
|
---|
590 | {
|
---|
591 | cpu_t *c = cpu_list;
|
---|
592 |
|
---|
593 | ASSERT(cpu_core[c->cpu_id].cpuc_dcpc_intr_state != DCPC_INTR_INACTIVE);
|
---|
594 |
|
---|
595 | do {
|
---|
596 | cpu_core[c->cpu_id].cpuc_dcpc_intr_state = DCPC_INTR_FREE;
|
---|
597 | membar_producer();
|
---|
598 | } while ((c = c->cpu_next) != cpu_list);
|
---|
599 | }
|
---|
600 |
|
---|
601 | /*
|
---|
602 | * Transition all CPUs dcpc interrupt state from DCPC_INTR_INACTIVE to
|
---|
603 | * to DCPC_INTR_FREE. This indicates that the dcpc provider is now
|
---|
604 | * responsible for handling all overflow interrupt activity. Should only be
|
---|
605 | * called before enabling the first dcpc based probe.
|
---|
606 | */
|
---|
607 | static void
|
---|
608 | dcpc_claim_interrupts(void)
|
---|
609 | {
|
---|
610 | cpu_t *c = cpu_list;
|
---|
611 |
|
---|
612 | ASSERT(cpu_core[c->cpu_id].cpuc_dcpc_intr_state == DCPC_INTR_INACTIVE);
|
---|
613 |
|
---|
614 | do {
|
---|
615 | cpu_core[c->cpu_id].cpuc_dcpc_intr_state = DCPC_INTR_FREE;
|
---|
616 | membar_producer();
|
---|
617 | } while ((c = c->cpu_next) != cpu_list);
|
---|
618 | }
|
---|
619 |
|
---|
620 | /*
|
---|
621 | * Set all CPUs dcpc interrupt state to DCPC_INTR_INACTIVE to indicate that
|
---|
622 | * the dcpc provider is no longer processing overflow interrupts. Only called
|
---|
623 | * during removal of the last dcpc based enabling.
|
---|
624 | */
|
---|
625 | static void
|
---|
626 | dcpc_surrender_interrupts(void)
|
---|
627 | {
|
---|
628 | cpu_t *c = cpu_list;
|
---|
629 |
|
---|
630 | ASSERT(cpu_core[c->cpu_id].cpuc_dcpc_intr_state != DCPC_INTR_INACTIVE);
|
---|
631 |
|
---|
632 | do {
|
---|
633 | cpu_core[c->cpu_id].cpuc_dcpc_intr_state = DCPC_INTR_INACTIVE;
|
---|
634 | membar_producer();
|
---|
635 | } while ((c = c->cpu_next) != cpu_list);
|
---|
636 | }
|
---|
637 |
|
---|
638 | /*
|
---|
639 | * dcpc_program_event() can be called owing to a new enabling or if a multi
|
---|
640 | * overflow platform has disabled a request but needs to program the requests
|
---|
641 | * that are still valid.
|
---|
642 | *
|
---|
643 | * Every invocation of dcpc_program_event() will create a new kcpc_ctx_t
|
---|
644 | * and a new request set which contains the new enabling and any old enablings
|
---|
645 | * which are still valid (possible with multi-overflow platforms).
|
---|
646 | */
|
---|
647 | static int
|
---|
648 | dcpc_program_event(dcpc_probe_t *pp)
|
---|
649 | {
|
---|
650 | cpu_t *c;
|
---|
651 | int ret = 0;
|
---|
652 |
|
---|
653 | ASSERT(MUTEX_HELD(&cpu_lock));
|
---|
654 |
|
---|
655 | kpreempt_disable();
|
---|
656 |
|
---|
657 | dcpc_block_interrupts();
|
---|
658 |
|
---|
659 | c = cpu_list;
|
---|
660 |
|
---|
661 | do {
|
---|
662 | /*
|
---|
663 | * Skip CPUs that are currently offline.
|
---|
664 | */
|
---|
665 | if (c->cpu_flags & CPU_OFFLINE)
|
---|
666 | continue;
|
---|
667 |
|
---|
668 | /*
|
---|
669 | * Stop counters but preserve existing DTrace CPC context
|
---|
670 | * if there is one.
|
---|
671 | *
|
---|
672 | * If we come here when the first event is programmed for a CPU,
|
---|
673 | * there should be no DTrace CPC context installed. In this
|
---|
674 | * case, kcpc_cpu_stop() will ensure that there is no other
|
---|
675 | * context on the CPU.
|
---|
676 | *
|
---|
677 | * If we add new enabling to the original one, the CPU should
|
---|
678 | * have the old DTrace CPC context which we need to keep around
|
---|
679 | * since dcpc_program_event() will add to it.
|
---|
680 | */
|
---|
681 | if (c->cpu_cpc_ctx != NULL)
|
---|
682 | kcpc_cpu_stop(c, B_TRUE);
|
---|
683 | } while ((c = c->cpu_next) != cpu_list);
|
---|
684 |
|
---|
685 | dcpc_release_interrupts();
|
---|
686 |
|
---|
687 | /*
|
---|
688 | * If this enabling is being removed (in the case of a multi event
|
---|
689 | * capable system with more than one active enabling), we can now
|
---|
690 | * update the active request array to reflect the enablings that need
|
---|
691 | * to be reprogrammed.
|
---|
692 | */
|
---|
693 | if (pp->dcpc_disabling == 1)
|
---|
694 | dcpc_actv_reqs[pp->dcpc_actv_req_idx] = NULL;
|
---|
695 |
|
---|
696 | do {
|
---|
697 | /*
|
---|
698 | * Skip CPUs that are currently offline.
|
---|
699 | */
|
---|
700 | if (c->cpu_flags & CPU_OFFLINE)
|
---|
701 | continue;
|
---|
702 |
|
---|
703 | ret = dcpc_program_cpu_event(c);
|
---|
704 | } while ((c = c->cpu_next) != cpu_list && ret == 0);
|
---|
705 |
|
---|
706 | /*
|
---|
707 | * If dcpc_program_cpu_event() fails then it is because we couldn't
|
---|
708 | * configure the requests in the set for the CPU and not because of
|
---|
709 | * an error programming the hardware. If we have a failure here then
|
---|
710 | * we assume no CPUs have been programmed in the above step as they
|
---|
711 | * are all configured identically.
|
---|
712 | */
|
---|
713 | if (ret != 0) {
|
---|
714 | pp->dcpc_enabled = 0;
|
---|
715 | kpreempt_enable();
|
---|
716 | return (-1);
|
---|
717 | }
|
---|
718 |
|
---|
719 | if (pp->dcpc_disabling != 1)
|
---|
720 | pp->dcpc_enabled = 1;
|
---|
721 |
|
---|
722 | kpreempt_enable();
|
---|
723 |
|
---|
724 | return (0);
|
---|
725 | }
|
---|
726 |
|
---|
727 | /*ARGSUSED*/
|
---|
728 | static int
|
---|
729 | dcpc_enable(void *arg, dtrace_id_t id, void *parg)
|
---|
730 | {
|
---|
731 | dcpc_probe_t *pp = parg;
|
---|
732 | int i, found = 0;
|
---|
733 | cpu_t *c;
|
---|
734 |
|
---|
735 | ASSERT(MUTEX_HELD(&cpu_lock));
|
---|
736 |
|
---|
737 | /*
|
---|
738 | * Bail out if the counters are being used by a libcpc consumer.
|
---|
739 | */
|
---|
740 | rw_enter(&kcpc_cpuctx_lock, RW_READER);
|
---|
741 | if (kcpc_cpuctx > 0) {
|
---|
742 | rw_exit(&kcpc_cpuctx_lock);
|
---|
743 | return (-1);
|
---|
744 | }
|
---|
745 |
|
---|
746 | dtrace_cpc_in_use++;
|
---|
747 | rw_exit(&kcpc_cpuctx_lock);
|
---|
748 |
|
---|
749 | /*
|
---|
750 | * Locate this enabling in the first free entry of the active
|
---|
751 | * request array.
|
---|
752 | */
|
---|
753 | for (i = 0; i < cpc_ncounters; i++) {
|
---|
754 | if (dcpc_actv_reqs[i] == NULL) {
|
---|
755 | dcpc_actv_reqs[i] = pp;
|
---|
756 | pp->dcpc_actv_req_idx = i;
|
---|
757 | found = 1;
|
---|
758 | break;
|
---|
759 | }
|
---|
760 | }
|
---|
761 |
|
---|
762 | /*
|
---|
763 | * If we couldn't find a slot for this probe then there is no
|
---|
764 | * room at the inn.
|
---|
765 | */
|
---|
766 | if (!found) {
|
---|
767 | dtrace_cpc_in_use--;
|
---|
768 | return (-1);
|
---|
769 | }
|
---|
770 |
|
---|
771 | ASSERT(pp->dcpc_actv_req_idx >= 0);
|
---|
772 |
|
---|
773 | /*
|
---|
774 | * DTrace is taking over CPC contexts, so stop collecting
|
---|
775 | * capacity/utilization data for all CPUs.
|
---|
776 | */
|
---|
777 | if (dtrace_cpc_in_use == 1)
|
---|
778 | cu_disable();
|
---|
779 |
|
---|
780 | /*
|
---|
781 | * The following must hold true if we are to (attempt to) enable
|
---|
782 | * this request:
|
---|
783 | *
|
---|
784 | * 1) No enablings currently exist. We allow all platforms to
|
---|
785 | * proceed if this is true.
|
---|
786 | *
|
---|
787 | * OR
|
---|
788 | *
|
---|
789 | * 2) If the platform is multi overflow capable and there are
|
---|
790 | * less valid enablings than there are counters. There is no
|
---|
791 | * guarantee that a platform can accommodate as many events as
|
---|
792 | * it has counters for but we will at least try to program
|
---|
793 | * up to that many requests.
|
---|
794 | *
|
---|
795 | * The 'dcpc_enablings' variable is implictly protected by locking
|
---|
796 | * provided by the DTrace framework and the cpu management framework.
|
---|
797 | */
|
---|
798 | if (dcpc_enablings == 0 || (dcpc_mult_ovf_cap &&
|
---|
799 | dcpc_enablings < cpc_ncounters)) {
|
---|
800 | /*
|
---|
801 | * Before attempting to program the first enabling we need to
|
---|
802 | * invalidate any lwp-based contexts and lay claim to the
|
---|
803 | * overflow interrupt mechanism.
|
---|
804 | */
|
---|
805 | if (dcpc_enablings == 0) {
|
---|
806 | kcpc_invalidate_all();
|
---|
807 | dcpc_claim_interrupts();
|
---|
808 | }
|
---|
809 |
|
---|
810 | if (dcpc_program_event(pp) == 0) {
|
---|
811 | dcpc_enablings++;
|
---|
812 | return (0);
|
---|
813 | }
|
---|
814 | }
|
---|
815 |
|
---|
816 | /*
|
---|
817 | * If active enablings existed before we failed to enable this probe
|
---|
818 | * on a multi event capable platform then we need to restart counters
|
---|
819 | * as they will have been stopped in the attempted configuration. The
|
---|
820 | * context should now just contain the request prior to this failed
|
---|
821 | * enabling.
|
---|
822 | */
|
---|
823 | if (dcpc_enablings > 0 && dcpc_mult_ovf_cap) {
|
---|
824 | c = cpu_list;
|
---|
825 |
|
---|
826 | ASSERT(dcpc_mult_ovf_cap == 1);
|
---|
827 | do {
|
---|
828 | /*
|
---|
829 | * Skip CPUs that are currently offline.
|
---|
830 | */
|
---|
831 | if (c->cpu_flags & CPU_OFFLINE)
|
---|
832 | continue;
|
---|
833 |
|
---|
834 | kcpc_cpu_program(c, c->cpu_cpc_ctx);
|
---|
835 | } while ((c = c->cpu_next) != cpu_list);
|
---|
836 | }
|
---|
837 |
|
---|
838 | /*
|
---|
839 | * Give up any claim to the overflow interrupt mechanism if no
|
---|
840 | * dcpc based enablings exist.
|
---|
841 | */
|
---|
842 | if (dcpc_enablings == 0)
|
---|
843 | dcpc_surrender_interrupts();
|
---|
844 |
|
---|
845 | dtrace_cpc_in_use--;
|
---|
846 | dcpc_actv_reqs[pp->dcpc_actv_req_idx] = NULL;
|
---|
847 | pp->dcpc_actv_req_idx = pp->dcpc_picno = -1;
|
---|
848 |
|
---|
849 | /*
|
---|
850 | * If all probes are removed, enable capacity/utilization data
|
---|
851 | * collection for every CPU.
|
---|
852 | */
|
---|
853 | if (dtrace_cpc_in_use == 0)
|
---|
854 | cu_enable();
|
---|
855 |
|
---|
856 | return (-1);
|
---|
857 | }
|
---|
858 |
|
---|
859 | /*
|
---|
860 | * If only one enabling is active then remove the context and free
|
---|
861 | * everything up. If there are multiple enablings active then remove this
|
---|
862 | * one, its associated meta-data and re-program the hardware.
|
---|
863 | */
|
---|
864 | /*ARGSUSED*/
|
---|
865 | static void
|
---|
866 | dcpc_disable(void *arg, dtrace_id_t id, void *parg)
|
---|
867 | {
|
---|
868 | cpu_t *c;
|
---|
869 | dcpc_probe_t *pp = parg;
|
---|
870 |
|
---|
871 | ASSERT(MUTEX_HELD(&cpu_lock));
|
---|
872 |
|
---|
873 | kpreempt_disable();
|
---|
874 |
|
---|
875 | /*
|
---|
876 | * This probe didn't actually make it as far as being fully enabled
|
---|
877 | * so we needn't do anything with it.
|
---|
878 | */
|
---|
879 | if (pp->dcpc_enabled == 0) {
|
---|
880 | /*
|
---|
881 | * If we actually allocated this request a slot in the
|
---|
882 | * request array but failed to enabled it then remove the
|
---|
883 | * entry in the array.
|
---|
884 | */
|
---|
885 | if (pp->dcpc_actv_req_idx >= 0) {
|
---|
886 | dcpc_actv_reqs[pp->dcpc_actv_req_idx] = NULL;
|
---|
887 | pp->dcpc_actv_req_idx = pp->dcpc_picno =
|
---|
888 | pp->dcpc_disabling = -1;
|
---|
889 | }
|
---|
890 |
|
---|
891 | kpreempt_enable();
|
---|
892 | return;
|
---|
893 | }
|
---|
894 |
|
---|
895 | /*
|
---|
896 | * If this is the only enabling then stop all the counters and
|
---|
897 | * free up the meta-data.
|
---|
898 | */
|
---|
899 | if (dcpc_enablings == 1) {
|
---|
900 | ASSERT(dtrace_cpc_in_use == 1);
|
---|
901 |
|
---|
902 | dcpc_block_interrupts();
|
---|
903 |
|
---|
904 | c = cpu_list;
|
---|
905 |
|
---|
906 | do {
|
---|
907 | dcpc_disable_cpu(c);
|
---|
908 | } while ((c = c->cpu_next) != cpu_list);
|
---|
909 |
|
---|
910 | dcpc_actv_reqs[pp->dcpc_actv_req_idx] = NULL;
|
---|
911 | dcpc_surrender_interrupts();
|
---|
912 | } else {
|
---|
913 | /*
|
---|
914 | * This platform can support multiple overflow events and
|
---|
915 | * the enabling being disabled is not the last one. Remove this
|
---|
916 | * enabling and re-program the hardware with the new config.
|
---|
917 | */
|
---|
918 | ASSERT(dcpc_mult_ovf_cap);
|
---|
919 | ASSERT(dcpc_enablings > 1);
|
---|
920 |
|
---|
921 | pp->dcpc_disabling = 1;
|
---|
922 | (void) dcpc_program_event(pp);
|
---|
923 | }
|
---|
924 |
|
---|
925 | kpreempt_enable();
|
---|
926 |
|
---|
927 | dcpc_enablings--;
|
---|
928 | dtrace_cpc_in_use--;
|
---|
929 | pp->dcpc_enabled = 0;
|
---|
930 | pp->dcpc_actv_req_idx = pp->dcpc_picno = pp->dcpc_disabling = -1;
|
---|
931 |
|
---|
932 | /*
|
---|
933 | * If all probes are removed, enable capacity/utilization data
|
---|
934 | * collection for every CPU
|
---|
935 | */
|
---|
936 | if (dtrace_cpc_in_use == 0)
|
---|
937 | cu_enable();
|
---|
938 | }
|
---|
939 |
|
---|
940 | /*ARGSUSED*/
|
---|
941 | static int
|
---|
942 | dcpc_cpu_setup(cpu_setup_t what, processorid_t cpu, void *arg)
|
---|
943 | {
|
---|
944 | cpu_t *c;
|
---|
945 | uint8_t *state;
|
---|
946 |
|
---|
947 | ASSERT(MUTEX_HELD(&cpu_lock));
|
---|
948 |
|
---|
949 | switch (what) {
|
---|
950 | case CPU_OFF:
|
---|
951 | /*
|
---|
952 | * Offline CPUs are not allowed to take part so remove this
|
---|
953 | * CPU if we are actively tracing.
|
---|
954 | */
|
---|
955 | if (dtrace_cpc_in_use) {
|
---|
956 | c = cpu_get(cpu);
|
---|
957 | state = &cpu_core[c->cpu_id].cpuc_dcpc_intr_state;
|
---|
958 |
|
---|
959 | /*
|
---|
960 | * Indicate that a configuration is in process in
|
---|
961 | * order to stop overflow interrupts being processed
|
---|
962 | * on this CPU while we disable it.
|
---|
963 | */
|
---|
964 | while (atomic_cas_8(state, DCPC_INTR_FREE,
|
---|
965 | DCPC_INTR_CONFIG) != DCPC_INTR_FREE)
|
---|
966 | continue;
|
---|
967 |
|
---|
968 | dcpc_disable_cpu(c);
|
---|
969 |
|
---|
970 | /*
|
---|
971 | * Reset this CPUs interrupt state as the configuration
|
---|
972 | * has ended.
|
---|
973 | */
|
---|
974 | cpu_core[c->cpu_id].cpuc_dcpc_intr_state =
|
---|
975 | DCPC_INTR_FREE;
|
---|
976 | membar_producer();
|
---|
977 | }
|
---|
978 | break;
|
---|
979 |
|
---|
980 | case CPU_ON:
|
---|
981 | case CPU_SETUP:
|
---|
982 | /*
|
---|
983 | * This CPU is being initialized or brought online so program
|
---|
984 | * it with the current request set if we are actively tracing.
|
---|
985 | */
|
---|
986 | if (dtrace_cpc_in_use) {
|
---|
987 | c = cpu_get(cpu);
|
---|
988 | (void) dcpc_program_cpu_event(c);
|
---|
989 | }
|
---|
990 | break;
|
---|
991 |
|
---|
992 | default:
|
---|
993 | break;
|
---|
994 | }
|
---|
995 |
|
---|
996 | return (0);
|
---|
997 | }
|
---|
998 |
|
---|
999 | static dtrace_pattr_t dcpc_attr = {
|
---|
1000 | { DTRACE_STABILITY_EVOLVING, DTRACE_STABILITY_EVOLVING, DTRACE_CLASS_COMMON },
|
---|
1001 | { DTRACE_STABILITY_PRIVATE, DTRACE_STABILITY_PRIVATE, DTRACE_CLASS_UNKNOWN },
|
---|
1002 | { DTRACE_STABILITY_PRIVATE, DTRACE_STABILITY_PRIVATE, DTRACE_CLASS_UNKNOWN },
|
---|
1003 | { DTRACE_STABILITY_EVOLVING, DTRACE_STABILITY_EVOLVING, DTRACE_CLASS_CPU },
|
---|
1004 | { DTRACE_STABILITY_EVOLVING, DTRACE_STABILITY_EVOLVING, DTRACE_CLASS_COMMON },
|
---|
1005 | };
|
---|
1006 |
|
---|
1007 | static dtrace_pops_t dcpc_pops = {
|
---|
1008 | dcpc_provide,
|
---|
1009 | NULL,
|
---|
1010 | dcpc_enable,
|
---|
1011 | dcpc_disable,
|
---|
1012 | NULL,
|
---|
1013 | NULL,
|
---|
1014 | NULL,
|
---|
1015 | NULL,
|
---|
1016 | dcpc_usermode,
|
---|
1017 | dcpc_destroy
|
---|
1018 | };
|
---|
1019 |
|
---|
1020 | /*ARGSUSED*/
|
---|
1021 | static int
|
---|
1022 | dcpc_open(dev_t *devp, int flag, int otyp, cred_t *cred_p)
|
---|
1023 | {
|
---|
1024 | return (0);
|
---|
1025 | }
|
---|
1026 |
|
---|
1027 | /*ARGSUSED*/
|
---|
1028 | static int
|
---|
1029 | dcpc_info(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg, void **result)
|
---|
1030 | {
|
---|
1031 | int error;
|
---|
1032 |
|
---|
1033 | switch (infocmd) {
|
---|
1034 | case DDI_INFO_DEVT2DEVINFO:
|
---|
1035 | *result = (void *)dcpc_devi;
|
---|
1036 | error = DDI_SUCCESS;
|
---|
1037 | break;
|
---|
1038 | case DDI_INFO_DEVT2INSTANCE:
|
---|
1039 | *result = (void *)0;
|
---|
1040 | error = DDI_SUCCESS;
|
---|
1041 | break;
|
---|
1042 | default:
|
---|
1043 | error = DDI_FAILURE;
|
---|
1044 | }
|
---|
1045 | return (error);
|
---|
1046 | }
|
---|
1047 |
|
---|
1048 | static int
|
---|
1049 | dcpc_detach(dev_info_t *devi, ddi_detach_cmd_t cmd)
|
---|
1050 | {
|
---|
1051 | switch (cmd) {
|
---|
1052 | case DDI_DETACH:
|
---|
1053 | break;
|
---|
1054 | case DDI_SUSPEND:
|
---|
1055 | return (DDI_SUCCESS);
|
---|
1056 | default:
|
---|
1057 | return (DDI_FAILURE);
|
---|
1058 | }
|
---|
1059 |
|
---|
1060 | if (dtrace_unregister(dcpc_pid) != 0)
|
---|
1061 | return (DDI_FAILURE);
|
---|
1062 |
|
---|
1063 | ddi_remove_minor_node(devi, NULL);
|
---|
1064 |
|
---|
1065 | mutex_enter(&cpu_lock);
|
---|
1066 | unregister_cpu_setup_func(dcpc_cpu_setup, NULL);
|
---|
1067 | mutex_exit(&cpu_lock);
|
---|
1068 |
|
---|
1069 | kmem_free(dcpc_actv_reqs, cpc_ncounters * sizeof (dcpc_probe_t *));
|
---|
1070 |
|
---|
1071 | kcpc_unregister_dcpc();
|
---|
1072 |
|
---|
1073 | return (DDI_SUCCESS);
|
---|
1074 | }
|
---|
1075 |
|
---|
1076 | static int
|
---|
1077 | dcpc_attach(dev_info_t *devi, ddi_attach_cmd_t cmd)
|
---|
1078 | {
|
---|
1079 | uint_t caps;
|
---|
1080 | char *attrs;
|
---|
1081 |
|
---|
1082 | switch (cmd) {
|
---|
1083 | case DDI_ATTACH:
|
---|
1084 | break;
|
---|
1085 | case DDI_RESUME:
|
---|
1086 | return (DDI_SUCCESS);
|
---|
1087 | default:
|
---|
1088 | return (DDI_FAILURE);
|
---|
1089 | }
|
---|
1090 |
|
---|
1091 | if (kcpc_pcbe_loaded() == -1)
|
---|
1092 | return (DDI_FAILURE);
|
---|
1093 |
|
---|
1094 | caps = kcpc_pcbe_capabilities();
|
---|
1095 |
|
---|
1096 | if (!(caps & CPC_CAP_OVERFLOW_INTERRUPT)) {
|
---|
1097 | cmn_err(CE_NOTE, "!dcpc: Counter Overflow not supported"\
|
---|
1098 | " on this processor");
|
---|
1099 | return (DDI_FAILURE);
|
---|
1100 | }
|
---|
1101 |
|
---|
1102 | if (ddi_create_minor_node(devi, "dcpc", S_IFCHR, 0,
|
---|
1103 | DDI_PSEUDO, NULL) == DDI_FAILURE ||
|
---|
1104 | dtrace_register("cpc", &dcpc_attr, DTRACE_PRIV_KERNEL,
|
---|
1105 | NULL, &dcpc_pops, NULL, &dcpc_pid) != 0) {
|
---|
1106 | ddi_remove_minor_node(devi, NULL);
|
---|
1107 | return (DDI_FAILURE);
|
---|
1108 | }
|
---|
1109 |
|
---|
1110 | mutex_enter(&cpu_lock);
|
---|
1111 | register_cpu_setup_func(dcpc_cpu_setup, NULL);
|
---|
1112 | mutex_exit(&cpu_lock);
|
---|
1113 |
|
---|
1114 | dcpc_ovf_mask = (1 << cpc_ncounters) - 1;
|
---|
1115 | ASSERT(dcpc_ovf_mask != 0);
|
---|
1116 |
|
---|
1117 | if (caps & CPC_CAP_OVERFLOW_PRECISE)
|
---|
1118 | dcpc_mult_ovf_cap = 1;
|
---|
1119 |
|
---|
1120 | /*
|
---|
1121 | * Determine which, if any, mask attribute the back-end can use.
|
---|
1122 | */
|
---|
1123 | attrs = kcpc_list_attrs();
|
---|
1124 | if (strstr(attrs, "umask") != NULL)
|
---|
1125 | dcpc_mask_type |= DCPC_UMASK;
|
---|
1126 | else if (strstr(attrs, "emask") != NULL)
|
---|
1127 | dcpc_mask_type |= DCPC_EMASK;
|
---|
1128 |
|
---|
1129 | /*
|
---|
1130 | * The dcpc_actv_reqs array is used to store the requests that
|
---|
1131 | * we currently have programmed. The order of requests in this
|
---|
1132 | * array is not necessarily the order that the event appears in
|
---|
1133 | * the kcpc_request_t array. Once entered into a slot in the array
|
---|
1134 | * the entry is not moved until it's removed.
|
---|
1135 | */
|
---|
1136 | dcpc_actv_reqs =
|
---|
1137 | kmem_zalloc(cpc_ncounters * sizeof (dcpc_probe_t *), KM_SLEEP);
|
---|
1138 |
|
---|
1139 | dcpc_min_overflow = ddi_prop_get_int(DDI_DEV_T_ANY, devi,
|
---|
1140 | DDI_PROP_DONTPASS, "dcpc-min-overflow", DCPC_MIN_OVF_DEFAULT);
|
---|
1141 |
|
---|
1142 | kcpc_register_dcpc(dcpc_fire);
|
---|
1143 |
|
---|
1144 | ddi_report_dev(devi);
|
---|
1145 | dcpc_devi = devi;
|
---|
1146 |
|
---|
1147 | return (DDI_SUCCESS);
|
---|
1148 | }
|
---|
1149 |
|
---|
1150 | static struct cb_ops dcpc_cb_ops = {
|
---|
1151 | dcpc_open, /* open */
|
---|
1152 | nodev, /* close */
|
---|
1153 | nulldev, /* strategy */
|
---|
1154 | nulldev, /* print */
|
---|
1155 | nodev, /* dump */
|
---|
1156 | nodev, /* read */
|
---|
1157 | nodev, /* write */
|
---|
1158 | nodev, /* ioctl */
|
---|
1159 | nodev, /* devmap */
|
---|
1160 | nodev, /* mmap */
|
---|
1161 | nodev, /* segmap */
|
---|
1162 | nochpoll, /* poll */
|
---|
1163 | ddi_prop_op, /* cb_prop_op */
|
---|
1164 | 0, /* streamtab */
|
---|
1165 | D_NEW | D_MP /* Driver compatibility flag */
|
---|
1166 | };
|
---|
1167 |
|
---|
1168 | static struct dev_ops dcpc_ops = {
|
---|
1169 | DEVO_REV, /* devo_rev, */
|
---|
1170 | 0, /* refcnt */
|
---|
1171 | dcpc_info, /* get_dev_info */
|
---|
1172 | nulldev, /* identify */
|
---|
1173 | nulldev, /* probe */
|
---|
1174 | dcpc_attach, /* attach */
|
---|
1175 | dcpc_detach, /* detach */
|
---|
1176 | nodev, /* reset */
|
---|
1177 | &dcpc_cb_ops, /* driver operations */
|
---|
1178 | NULL, /* bus operations */
|
---|
1179 | nodev, /* dev power */
|
---|
1180 | ddi_quiesce_not_needed /* quiesce */
|
---|
1181 | };
|
---|
1182 |
|
---|
1183 | /*
|
---|
1184 | * Module linkage information for the kernel.
|
---|
1185 | */
|
---|
1186 | static struct modldrv modldrv = {
|
---|
1187 | &mod_driverops, /* module type */
|
---|
1188 | "DTrace CPC Module", /* name of module */
|
---|
1189 | &dcpc_ops, /* driver ops */
|
---|
1190 | };
|
---|
1191 |
|
---|
1192 | static struct modlinkage modlinkage = {
|
---|
1193 | MODREV_1,
|
---|
1194 | (void *)&modldrv,
|
---|
1195 | NULL
|
---|
1196 | };
|
---|
1197 |
|
---|
1198 | int
|
---|
1199 | _init(void)
|
---|
1200 | {
|
---|
1201 | return (mod_install(&modlinkage));
|
---|
1202 | }
|
---|
1203 |
|
---|
1204 | int
|
---|
1205 | _info(struct modinfo *modinfop)
|
---|
1206 | {
|
---|
1207 | return (mod_info(&modlinkage, modinfop));
|
---|
1208 | }
|
---|
1209 |
|
---|
1210 | int
|
---|
1211 | _fini(void)
|
---|
1212 | {
|
---|
1213 | return (mod_remove(&modlinkage));
|
---|
1214 | }
|
---|