SUPDRVShared.c@ 1971

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1	/** @file
2	*
3	* VBox host drivers - Ring-0 support drivers - Shared code:
4	* Driver code for all host platforms
5	*/
6
7	/*
8	* Copyright (C) 2006 InnoTek Systemberatung GmbH
9	*
10	* This file is part of VirtualBox Open Source Edition (OSE), as
11	* available from http://www.virtualbox.org. This file is free software;
12	* you can redistribute it and/or modify it under the terms of the GNU
13	* General Public License as published by the Free Software Foundation,
14	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
15	* distribution. VirtualBox OSE is distributed in the hope that it will
16	* be useful, but WITHOUT ANY WARRANTY of any kind.
17	*
18	* If you received this file as part of a commercial VirtualBox
19	* distribution, then only the terms of your commercial VirtualBox
20	* license agreement apply instead of the previous paragraph.
21	*/
22
23
24	/*******************************************************************************
25	* Header Files *
26	*******************************************************************************/
27	#include "SUPDRV.h"
28	#ifndef PAGE_SHIFT
29	# include <iprt/param.h>
30	#endif
31	#include <iprt/alloc.h>
32	#include <iprt/semaphore.h>
33	#include <iprt/spinlock.h>
34	#include <iprt/thread.h>
35	#include <iprt/process.h>
36	#include <iprt/log.h>
37	#ifdef VBOX_WITHOUT_IDT_PATCHING
38	# include <VBox/vmm.h>
39	#endif
40
41
42	/*******************************************************************************
43	* Defined Constants And Macros *
44	*******************************************************************************/
45	/* from x86.h - clashes with linux thus this duplication */
46	#undef X86_CR0_PG
47	#define X86_CR0_PG BIT(31)
48	#undef X86_CR0_PE
49	#define X86_CR0_PE BIT(0)
50	#undef X86_CPUID_AMD_FEATURE_EDX_NX
51	#define X86_CPUID_AMD_FEATURE_EDX_NX BIT(20)
52	#undef MSR_K6_EFER
53	#define MSR_K6_EFER 0xc0000080
54	#undef MSR_K6_EFER_NXE
55	#define MSR_K6_EFER_NXE BIT(11)
56	#undef MSR_K6_EFER_LMA
57	#define MSR_K6_EFER_LMA BIT(10)
58	#undef X86_CR4_PGE
59	#define X86_CR4_PGE BIT(7)
60	#undef X86_CR4_PAE
61	#define X86_CR4_PAE BIT(5)
62	#undef X86_CPUID_AMD_FEATURE_EDX_LONG_MODE
63	#define X86_CPUID_AMD_FEATURE_EDX_LONG_MODE BIT(29)
64
65
66	/** The frequency by which we recalculate the u32UpdateHz and
67	* u32UpdateIntervalNS GIP members. The value must be a power of 2. */
68	#define GIP_UPDATEHZ_RECALC_FREQ 0x800
69
70
71	/*******************************************************************************
72	* Global Variables *
73	*******************************************************************************/
74	/**
75	* Array of the R0 SUP API.
76	*/
77	static SUPFUNC g_aFunctions[] =
78	{
79	/* name function */
80	{ "SUPR0ObjRegister", (void *)SUPR0ObjRegister },
81	{ "SUPR0ObjAddRef", (void *)SUPR0ObjAddRef },
82	{ "SUPR0ObjRelease", (void *)SUPR0ObjRelease },
83	{ "SUPR0ObjVerifyAccess", (void *)SUPR0ObjVerifyAccess },
84	{ "SUPR0LockMem", (void *)SUPR0LockMem },
85	{ "SUPR0UnlockMem", (void *)SUPR0UnlockMem },
86	{ "SUPR0ContAlloc", (void *)SUPR0ContAlloc },
87	{ "SUPR0ContFree", (void *)SUPR0ContFree },
88	{ "SUPR0MemAlloc", (void *)SUPR0MemAlloc },
89	{ "SUPR0MemGetPhys", (void *)SUPR0MemGetPhys },
90	{ "SUPR0MemFree", (void *)SUPR0MemFree },
91	{ "SUPR0Printf", (void *)SUPR0Printf },
92	{ "RTMemAlloc", (void *)RTMemAlloc },
93	{ "RTMemAllocZ", (void *)RTMemAllocZ },
94	{ "RTMemFree", (void *)RTMemFree },
95	/* These doesn't work yet on linux - use fast mutexes!
96	{ "RTSemMutexCreate", (void *)RTSemMutexCreate },
97	{ "RTSemMutexRequest", (void *)RTSemMutexRequest },
98	{ "RTSemMutexRelease", (void *)RTSemMutexRelease },
99	{ "RTSemMutexDestroy", (void *)RTSemMutexDestroy },
100	*/
101	{ "RTSemFastMutexCreate", (void *)RTSemFastMutexCreate },
102	{ "RTSemFastMutexDestroy", (void *)RTSemFastMutexDestroy },
103	{ "RTSemFastMutexRequest", (void *)RTSemFastMutexRequest },
104	{ "RTSemFastMutexRelease", (void *)RTSemFastMutexRelease },
105	{ "RTSemEventCreate", (void *)RTSemEventCreate },
106	{ "RTSemEventSignal", (void *)RTSemEventSignal },
107	{ "RTSemEventWait", (void *)RTSemEventWait },
108	{ "RTSemEventDestroy", (void *)RTSemEventDestroy },
109	{ "RTSpinlockCreate", (void *)RTSpinlockCreate },
110	{ "RTSpinlockDestroy", (void *)RTSpinlockDestroy },
111	{ "RTSpinlockAcquire", (void *)RTSpinlockAcquire },
112	{ "RTSpinlockRelease", (void *)RTSpinlockRelease },
113	{ "RTSpinlockAcquireNoInts", (void *)RTSpinlockAcquireNoInts },
114	{ "RTSpinlockReleaseNoInts", (void *)RTSpinlockReleaseNoInts },
115	{ "RTThreadNativeSelf", (void *)RTThreadNativeSelf },
116	{ "RTThreadSleep", (void *)RTThreadSleep },
117	{ "RTThreadYield", (void *)RTThreadYield },
118	#if 0 /* Thread APIs, Part 2. */
119	{ "RTThreadSelf", (void *)RTThreadSelf },
120	{ "RTThreadCreate", (void *)RTThreadCreate },
121	{ "RTThreadGetNative", (void *)RTThreadGetNative },
122	{ "RTThreadWait", (void *)RTThreadWait },
123	{ "RTThreadWaitNoResume", (void *)RTThreadWaitNoResume },
124	{ "RTThreadGetName", (void *)RTThreadGetName },
125	{ "RTThreadSelfName", (void *)RTThreadSelfName },
126	{ "RTThreadGetType", (void *)RTThreadGetType },
127	{ "RTThreadUserSignal", (void *)RTThreadUserSignal },
128	{ "RTThreadUserReset", (void *)RTThreadUserReset },
129	{ "RTThreadUserWait", (void *)RTThreadUserWait },
130	{ "RTThreadUserWaitNoResume", (void *)RTThreadUserWaitNoResume },
131	#endif
132	{ "RTLogDefaultInstance", (void *)RTLogDefaultInstance },
133	{ "RTLogRelDefaultInstance", (void *)RTLogRelDefaultInstance },
134	{ "RTLogSetDefaultInstanceThread", (void *)RTLogSetDefaultInstanceThread },
135	{ "RTLogLogger", (void *)RTLogLogger },
136	{ "RTLogLoggerEx", (void *)RTLogLoggerEx },
137	{ "RTLogLoggerExV", (void *)RTLogLoggerExV },
138	{ "AssertMsg1", (void *)AssertMsg1 },
139	{ "AssertMsg2", (void *)AssertMsg2 },
140	};
141
142
143	/*******************************************************************************
144	* Internal Functions *
145	*******************************************************************************/
146	__BEGIN_DECLS
147	static int supdrvMemAdd(PSUPDRVMEMREF pMem, PSUPDRVSESSION pSession);
148	static int supdrvMemRelease(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr, SUPDRVMEMREFTYPE eType);
149	#ifndef VBOX_WITHOUT_IDT_PATCHING
150	static int supdrvIOCtl_IdtInstall(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPIDTINSTALL_IN pIn, PSUPIDTINSTALL_OUT pOut);
151	static PSUPDRVPATCH supdrvIdtPatchOne(PSUPDRVDEVEXT pDevExt, PSUPDRVPATCH pPatch);
152	static int supdrvIOCtl_IdtRemoveAll(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession);
153	static void supdrvIdtRemoveOne(PSUPDRVDEVEXT pDevExt, PSUPDRVPATCH pPatch);
154	static void supdrvIdtWrite(volatile void pvIdtEntry, const SUPDRVIDTE pNewIDTEntry);
155	#endif /* !VBOX_WITHOUT_IDT_PATCHING */
156	static int supdrvIOCtl_LdrOpen(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDROPEN_IN pIn, PSUPLDROPEN_OUT pOut);
157	static int supdrvIOCtl_LdrLoad(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRLOAD_IN pIn);
158	static int supdrvIOCtl_LdrFree(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRFREE_IN pIn);
159	static int supdrvIOCtl_LdrGetSymbol(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRGETSYMBOL_IN pIn, PSUPLDRGETSYMBOL_OUT pOut);
160	static int supdrvLdrSetR0EP(PSUPDRVDEVEXT pDevExt, void pvVMMR0, void pvVMMR0Entry);
161	static void supdrvLdrUnsetR0EP(PSUPDRVDEVEXT pDevExt);
162	static void supdrvLdrAddUsage(PSUPDRVSESSION pSession, PSUPDRVLDRIMAGE pImage);
163	static void supdrvLdrFree(PSUPDRVDEVEXT pDevExt, PSUPDRVLDRIMAGE pImage);
164	static int supdrvIOCtl_GetPagingMode(PSUPGETPAGINGMODE_OUT pOut);
165	static SUPGIPMODE supdrvGipDeterminTscMode(void);
166	#ifdef USE_NEW_OS_INTERFACE
167	static int supdrvGipCreate(PSUPDRVDEVEXT pDevExt);
168	static int supdrvGipDestroy(PSUPDRVDEVEXT pDevExt);
169	static DECLCALLBACK(void) supdrvGipTimer(PRTTIMER pTimer, void *pvUser);
170	#endif
171
172	__END_DECLS
173
174
175	/**
176	* Initializes the device extentsion structure.
177	*
178	* @returns 0 on success.
179	* @returns SUPDRV_ERR_ on failure.
180	* @param pDevExt The device extension to initialize.
181	*/
182	int VBOXCALL supdrvInitDevExt(PSUPDRVDEVEXT pDevExt)
183	{
184	/*
185	* Initialize it.
186	*/
187	int rc;
188	memset(pDevExt, 0, sizeof(*pDevExt));
189	rc = RTSpinlockCreate(&pDevExt->Spinlock);
190	if (!rc)
191	{
192	rc = RTSemFastMutexCreate(&pDevExt->mtxLdr);
193	if (!rc)
194	{
195	rc = RTSemFastMutexCreate(&pDevExt->mtxGip);
196	if (!rc)
197	{
198	#ifdef USE_NEW_OS_INTERFACE
199	rc = supdrvGipCreate(pDevExt);
200	if (RT_SUCCESS(rc))
201	{
202	pDevExt->u32Cookie = BIRD;
203	return 0;
204	}
205	#else
206	pDevExt->u32Cookie = BIRD;
207	return 0;
208	#endif
209	}
210	RTSemFastMutexDestroy(pDevExt->mtxLdr);
211	pDevExt->mtxLdr = NIL_RTSEMFASTMUTEX;
212	}
213	RTSpinlockDestroy(pDevExt->Spinlock);
214	pDevExt->Spinlock = NIL_RTSPINLOCK;
215	}
216	return rc;
217	}
218
219	/**
220	* Delete the device extension (e.g. cleanup members).
221	*
222	* @returns 0.
223	* @param pDevExt The device extension to delete.
224	*/
225	int VBOXCALL supdrvDeleteDevExt(PSUPDRVDEVEXT pDevExt)
226	{
227	#ifndef VBOX_WITHOUT_IDT_PATCHING
228	PSUPDRVPATCH pPatch;
229	#endif
230	PSUPDRVOBJ pObj;
231	PSUPDRVUSAGE pUsage;
232
233	/*
234	* Kill mutexes and spinlocks.
235	*/
236	RTSemFastMutexDestroy(pDevExt->mtxGip);
237	pDevExt->mtxGip = NIL_RTSEMFASTMUTEX;
238	RTSemFastMutexDestroy(pDevExt->mtxLdr);
239	pDevExt->mtxLdr = NIL_RTSEMFASTMUTEX;
240	RTSpinlockDestroy(pDevExt->Spinlock);
241	pDevExt->Spinlock = NIL_RTSPINLOCK;
242
243	/*
244	* Free lists.
245	*/
246
247	#ifndef VBOX_WITHOUT_IDT_PATCHING
248	/* patches */
249	/** @todo make sure we don't uninstall patches which has been patched by someone else. */
250	pPatch = pDevExt->pIdtPatchesFree;
251	pDevExt->pIdtPatchesFree = NULL;
252	while (pPatch)
253	{
254	void *pvFree = pPatch;
255	pPatch = pPatch->pNext;
256	RTMemExecFree(pvFree);
257	}
258	#endif /* !VBOX_WITHOUT_IDT_PATCHING */
259
260	/* objects. */
261	pObj = pDevExt->pObjs;
262	#if !defined(DEBUG_bird) \|\| !defined(__LINUX__) /* breaks unloading, temporary, remove me! */
263	Assert(!pObj); /* (can trigger on forced unloads) */
264	#endif
265	pDevExt->pObjs = NULL;
266	while (pObj)
267	{
268	void *pvFree = pObj;
269	pObj = pObj->pNext;
270	RTMemFree(pvFree);
271	}
272
273	/* usage records. */
274	pUsage = pDevExt->pUsageFree;
275	pDevExt->pUsageFree = NULL;
276	while (pUsage)
277	{
278	void *pvFree = pUsage;
279	pUsage = pUsage->pNext;
280	RTMemFree(pvFree);
281	}
282
283	#ifdef USE_NEW_OS_INTERFACE
284	/* kill the GIP */
285	supdrvGipDestroy(pDevExt);
286	#endif
287
288	return 0;
289	}
290
291
292	/**
293	* Create session.
294	*
295	* @returns 0 on success.
296	* @returns SUPDRV_ERR_ on failure.
297	* @param pDevExt Device extension.
298	* @param ppSession Where to store the pointer to the session data.
299	*/
300	int VBOXCALL supdrvCreateSession(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION *ppSession)
301	{
302	/*
303	* Allocate memory for the session data.
304	*/
305	int rc = SUPDRV_ERR_NO_MEMORY;
306	PSUPDRVSESSION pSession = ppSession = (PSUPDRVSESSION)RTMemAllocZ(sizeof(pSession));
307	if (pSession)
308	{
309	/* Initialize session data. */
310	rc = RTSpinlockCreate(&pSession->Spinlock);
311	if (!rc)
312	{
313	Assert(pSession->Spinlock != NIL_RTSPINLOCK);
314	pSession->pDevExt = pDevExt;
315	pSession->u32Cookie = BIRD_INV;
316	/*pSession->pLdrUsage = NULL;
317	pSession->pPatchUsage = NULL;
318	pSession->pUsage = NULL;
319	pSession->pGip = NULL;
320	pSession->fGipReferenced = false;
321	pSession->Bundle.cUsed = 0 */
322
323	dprintf(("Created session %p initial cookie=%#x\n", pSession, pSession->u32Cookie));
324	return 0;
325	}
326
327	RTMemFree(pSession);
328	*ppSession = NULL;
329	}
330
331	dprintf(("Failed to create spinlock, rc=%d!\n", rc));
332	return rc;
333	}
334
335
336	/**
337	* Shared code for cleaning up a session.
338	*
339	* @param pDevExt Device extension.
340	* @param pSession Session data.
341	* This data will be freed by this routine.
342	*/
343	void VBOXCALL supdrvCloseSession(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession)
344	{
345	/*
346	* Cleanup the session first.
347	*/
348	supdrvCleanupSession(pDevExt, pSession);
349
350	/*
351	* Free the rest of the session stuff.
352	*/
353	RTSpinlockDestroy(pSession->Spinlock);
354	pSession->Spinlock = NIL_RTSPINLOCK;
355	pSession->pDevExt = NULL;
356	RTMemFree(pSession);
357	dprintf2(("supdrvCloseSession: returns\n"));
358	}
359
360
361	/**
362	* Shared code for cleaning up a session (but not quite freeing it).
363	*
364	* This is primarily intended for MAC OS X where we have to clean up the memory
365	* stuff before the file handle is closed.
366	*
367	* @param pDevExt Device extension.
368	* @param pSession Session data.
369	* This data will be freed by this routine.
370	*/
371	void VBOXCALL supdrvCleanupSession(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession)
372	{
373	PSUPDRVBUNDLE pBundle;
374	dprintf(("supdrvCleanupSession: pSession=%p\n", pSession));
375
376	/*
377	* Remove logger instances related to this session.
378	* (This assumes the dprintf and dprintf2 macros doesn't use the normal logging.)
379	*/
380	RTLogSetDefaultInstanceThread(NULL, (uintptr_t)pSession);
381
382	#ifndef VBOX_WITHOUT_IDT_PATCHING
383	/*
384	* Uninstall any IDT patches installed for this session.
385	*/
386	supdrvIOCtl_IdtRemoveAll(pDevExt, pSession);
387	#endif
388
389	/*
390	* Release object references made in this session.
391	* In theory there should be noone racing us in this session.
392	*/
393	dprintf2(("release objects - start\n"));
394	if (pSession->pUsage)
395	{
396	RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER;
397	PSUPDRVUSAGE pUsage;
398	RTSpinlockAcquire(pDevExt->Spinlock, &SpinlockTmp);
399
400	while ((pUsage = pSession->pUsage) != NULL)
401	{
402	PSUPDRVOBJ pObj = pUsage->pObj;
403	pSession->pUsage = pUsage->pNext;
404
405	AssertMsg(pUsage->cUsage >= 1 && pObj->cUsage >= pUsage->cUsage, ("glob %d; sess %d\n", pObj->cUsage, pUsage->cUsage));
406	if (pUsage->cUsage < pObj->cUsage)
407	{
408	pObj->cUsage -= pUsage->cUsage;
409	RTSpinlockRelease(pDevExt->Spinlock, &SpinlockTmp);
410	}
411	else
412	{
413	/* Destroy the object and free the record. */
414	if (pDevExt->pObjs == pObj)
415	pDevExt->pObjs = pObj->pNext;
416	else
417	{
418	PSUPDRVOBJ pObjPrev;
419	for (pObjPrev = pDevExt->pObjs; pObjPrev; pObjPrev = pObjPrev->pNext)
420	if (pObjPrev->pNext == pObj)
421	{
422	pObjPrev->pNext = pObj->pNext;
423	break;
424	}
425	Assert(pObjPrev);
426	}
427	RTSpinlockRelease(pDevExt->Spinlock, &SpinlockTmp);
428
429	pObj->pfnDestructor(pObj, pObj->pvUser1, pObj->pvUser2);
430	RTMemFree(pObj);
431	}
432
433	/* free it and continue. */
434	RTMemFree(pUsage);
435
436	RTSpinlockAcquire(pDevExt->Spinlock, &SpinlockTmp);
437	}
438
439	RTSpinlockRelease(pDevExt->Spinlock, &SpinlockTmp);
440	AssertMsg(!pSession->pUsage, ("Some buster reregistered an object during desturction!\n"));
441	}
442	dprintf2(("release objects - done\n"));
443
444	/*
445	* Release memory allocated in the session.
446	*
447	* We do not serialize this as we assume that the application will
448	* not allocated memory while closing the file handle object.
449	*/
450	dprintf2(("freeing memory:\n"));
451	pBundle = &pSession->Bundle;
452	while (pBundle)
453	{
454	PSUPDRVBUNDLE pToFree;
455	unsigned i;
456
457	/*
458	* Check and unlock all entries in the bundle.
459	*/
460	for (i = 0; i < sizeof(pBundle->aMem) / sizeof(pBundle->aMem[0]); i++)
461	{
462	#ifdef USE_NEW_OS_INTERFACE
463	if (pBundle->aMem[i].MemObj != NIL_RTR0MEMOBJ)
464	{
465	int rc;
466	if (pBundle->aMem[i].MapObjR3 != NIL_RTR0MEMOBJ)
467	{
468	rc = RTR0MemObjFree(pBundle->aMem[i].MapObjR3, false);
469	AssertRC(rc); /** @todo figure out how to handle this. */
470	pBundle->aMem[i].MapObjR3 = NIL_RTR0MEMOBJ;
471	}
472	rc = RTR0MemObjFree(pBundle->aMem[i].MemObj, false);
473	AssertRC(rc); /** @todo figure out how to handle this. */
474	pBundle->aMem[i].MemObj = NIL_RTR0MEMOBJ;
475	pBundle->aMem[i].eType = MEMREF_TYPE_UNUSED;
476	}
477
478	#else /* !USE_NEW_OS_INTERFACE */
479	if ( pBundle->aMem[i].pvR0
480	\|\| pBundle->aMem[i].pvR3)
481	{
482	dprintf2(("eType=%d pvR0=%p pvR3=%p cb=%d\n", pBundle->aMem[i].eType,
483	pBundle->aMem[i].pvR0, pBundle->aMem[i].pvR3, pBundle->aMem[i].cb));
484	switch (pBundle->aMem[i].eType)
485	{
486	case MEMREF_TYPE_LOCKED:
487	supdrvOSUnlockMemOne(&pBundle->aMem[i]);
488	break;
489	case MEMREF_TYPE_CONT:
490	supdrvOSContFreeOne(&pBundle->aMem[i]);
491	break;
492	case MEMREF_TYPE_LOW:
493	supdrvOSLowFreeOne(&pBundle->aMem[i]);
494	break;
495	case MEMREF_TYPE_MEM:
496	supdrvOSMemFreeOne(&pBundle->aMem[i]);
497	break;
498	default:
499	break;
500	}
501	pBundle->aMem[i].eType = MEMREF_TYPE_UNUSED;
502	}
503	#endif /* !USE_NEW_OS_INTERFACE */
504	}
505
506	/*
507	* Advance and free previous bundle.
508	*/
509	pToFree = pBundle;
510	pBundle = pBundle->pNext;
511
512	pToFree->pNext = NULL;
513	pToFree->cUsed = 0;
514	if (pToFree != &pSession->Bundle)
515	RTMemFree(pToFree);
516	}
517	dprintf2(("freeing memory - done\n"));
518
519	/*
520	* Loaded images needs to be dereferenced and possibly freed up.
521	*/
522	RTSemFastMutexRequest(pDevExt->mtxLdr);
523	dprintf2(("freeing images:\n"));
524	if (pSession->pLdrUsage)
525	{
526	PSUPDRVLDRUSAGE pUsage = pSession->pLdrUsage;
527	pSession->pLdrUsage = NULL;
528	while (pUsage)
529	{
530	void *pvFree = pUsage;
531	PSUPDRVLDRIMAGE pImage = pUsage->pImage;
532	if (pImage->cUsage > pUsage->cUsage)
533	pImage->cUsage -= pUsage->cUsage;
534	else
535	supdrvLdrFree(pDevExt, pImage);
536	pUsage->pImage = NULL;
537	pUsage = pUsage->pNext;
538	RTMemFree(pvFree);
539	}
540	}
541	RTSemFastMutexRelease(pDevExt->mtxLdr);
542	dprintf2(("freeing images - done\n"));
543
544	/*
545	* Unmap the GIP.
546	*/
547	dprintf2(("umapping GIP:\n"));
548	#ifdef USE_NEW_OS_INTERFACE
549	if (pSession->GipMapObjR3 != NIL_RTR0MEMOBJ)
550	#else
551	if (pSession->pGip)
552	#endif
553	{
554	SUPR0GipUnmap(pSession);
555	#ifndef USE_NEW_OS_INTERFACE
556	pSession->pGip = NULL;
557	#endif
558	pSession->fGipReferenced = 0;
559	}
560	dprintf2(("umapping GIP - done\n"));
561	}
562
563
564	#ifdef VBOX_WITHOUT_IDT_PATCHING
565	/**
566	* Fast path I/O Control worker.
567	*
568	* @returns 0 on success.
569	* @returns One of the SUPDRV_ERR_* on failure.
570	* @param uIOCtl Function number.
571	* @param pDevExt Device extention.
572	* @param pSession Session data.
573	*/
574	int VBOXCALL supdrvIOCtlFast(unsigned uIOCtl, PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession)
575	{
576	/*
577	* Disable interrupts before invoking VMMR0Entry() because it ASSUMES
578	* that interrupts are disabled. (We check the two prereqs after doing
579	* this only to allow the compiler to optimize things better.)
580	*/
581	int rc;
582	RTCCUINTREG uFlags = ASMGetFlags();
583	ASMIntDisable();
584
585	if (RT_LIKELY(pSession->pVM && pDevExt->pfnVMMR0Entry))
586	{
587	switch (uIOCtl)
588	{
589	case SUP_IOCTL_FAST_DO_RAW_RUN:
590	rc = pDevExt->pfnVMMR0Entry(pSession->pVM, VMMR0_DO_RAW_RUN, NULL);
591	break;
592	case SUP_IOCTL_FAST_DO_HWACC_RUN:
593	rc = pDevExt->pfnVMMR0Entry(pSession->pVM, VMMR0_DO_HWACC_RUN, NULL);
594	break;
595	case SUP_IOCTL_FAST_DO_NOP:
596	rc = pDevExt->pfnVMMR0Entry(pSession->pVM, VMMR0_DO_NOP, NULL);
597	break;
598	default:
599	rc = VERR_INTERNAL_ERROR;
600	break;
601	}
602	}
603	else
604	rc = VERR_INTERNAL_ERROR;
605
606	ASMSetFlags(uFlags);
607	return rc;
608	}
609	#endif /* VBOX_WITHOUT_IDT_PATCHING */
610
611
612	/**
613	* I/O Control worker.
614	*
615	* @returns 0 on success.
616	* @returns One of the SUPDRV_ERR_* on failure.
617	* @param uIOCtl Function number.
618	* @param pDevExt Device extention.
619	* @param pSession Session data.
620	* @param pvIn Input data.
621	* @param cbIn Size of input data.
622	* @param pvOut Output data.
623	* IMPORTANT! This buffer may be shared with the input
624	* data, thus no writing before done reading
625	* input data!!!
626	* @param cbOut Size of output data.
627	* @param pcbReturned Size of the returned data.
628	*/
629	int VBOXCALL supdrvIOCtl(unsigned int uIOCtl, PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession,
630	void pvIn, unsigned cbIn, void pvOut, unsigned cbOut, unsigned *pcbReturned)
631	{
632	*pcbReturned = 0;
633	switch (uIOCtl)
634	{
635	case SUP_IOCTL_COOKIE:
636	{
637	PSUPCOOKIE_IN pIn = (PSUPCOOKIE_IN)pvIn;
638	PSUPCOOKIE_OUT pOut = (PSUPCOOKIE_OUT)pvOut;
639
640	/*
641	* Validate.
642	*/
643	if ( cbIn != sizeof(*pIn)
644	\|\| cbOut != sizeof(*pOut))
645	{
646	OSDBGPRINT(("SUP_IOCTL_COOKIE: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
647	(long)cbIn, (long)sizeof(pIn), (long)cbOut, (long)sizeof(pOut)));
648	return SUPDRV_ERR_INVALID_PARAM;
649	}
650	if (strncmp(pIn->szMagic, SUPCOOKIE_MAGIC, sizeof(pIn->szMagic)))
651	{
652	OSDBGPRINT(("SUP_IOCTL_COOKIE: invalid magic %.16s\n", pIn->szMagic));
653	return SUPDRV_ERR_INVALID_MAGIC;
654	}
655
656	/*
657	* Match the version.
658	* The current logic is very simple, match the major interface version.
659	*/
660	if ( pIn->u32MinVersion > SUPDRVIOC_VERSION
661	\|\| (pIn->u32MinVersion & 0xffff0000) != (SUPDRVIOC_VERSION & 0xffff0000))
662	{
663	OSDBGPRINT(("SUP_IOCTL_COOKIE: Version mismatch. Requested: %#x Min: %#x Current: %#x\n",
664	pIn->u32ReqVersion, pIn->u32MinVersion, SUPDRVIOC_VERSION));
665	pOut->u32Cookie = 0xffffffff;
666	pOut->u32SessionCookie = 0xffffffff;
667	pOut->u32SessionVersion = 0xffffffff;
668	pOut->u32DriverVersion = SUPDRVIOC_VERSION;
669	pOut->pSession = NULL;
670	pOut->cFunctions = 0;
671	pcbReturned = sizeof(pOut);
672	return SUPDRV_ERR_VERSION_MISMATCH;
673	}
674
675	/*
676	* Fill in return data and be gone.
677	* N.B. The first one to change SUPDRVIOC_VERSION shall makes sure that
678	* u32SessionVersion <= u32ReqVersion!
679	*/
680	/** @todo A more secure cookie negotiation? */
681	pOut->u32Cookie = pDevExt->u32Cookie;
682	pOut->u32SessionCookie = pSession->u32Cookie;
683	pOut->u32SessionVersion = SUPDRVIOC_VERSION;
684	pOut->u32DriverVersion = SUPDRVIOC_VERSION;
685	pOut->pSession = pSession;
686	pOut->cFunctions = sizeof(g_aFunctions) / sizeof(g_aFunctions[0]);
687	pcbReturned = sizeof(pOut);
688	return 0;
689	}
690
691
692	case SUP_IOCTL_QUERY_FUNCS:
693	{
694	unsigned cFunctions;
695	PSUPQUERYFUNCS_IN pIn = (PSUPQUERYFUNCS_IN)pvIn;
696	PSUPQUERYFUNCS_OUT pOut = (PSUPQUERYFUNCS_OUT)pvOut;
697
698	/*
699	* Validate.
700	*/
701	if ( cbIn != sizeof(*pIn)
702	\|\| cbOut < sizeof(*pOut))
703	{
704	dprintf(("SUP_IOCTL_QUERY_FUNCS: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
705	(long)cbIn, (long)sizeof(pIn), (long)cbOut, (long)sizeof(pOut)));
706	return SUPDRV_ERR_INVALID_PARAM;
707	}
708	if ( pIn->u32Cookie != pDevExt->u32Cookie
709	\|\| pIn->u32SessionCookie != pSession->u32Cookie )
710	{
711	dprintf(("SUP_IOCTL_QUERY_FUNCS: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
712	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
713	return SUPDRV_ERR_INVALID_MAGIC;
714	}
715
716	/*
717	* Copy the functions.
718	*/
719	cFunctions = (cbOut - RT_OFFSETOF(SUPQUERYFUNCS_OUT, aFunctions)) / sizeof(pOut->aFunctions[0]);
720	cFunctions = RT_MIN(cFunctions, ELEMENTS(g_aFunctions));
721	AssertMsg(cFunctions == ELEMENTS(g_aFunctions),
722	("Why aren't R3 querying all the functions!?! cFunctions=%d while there are %d available\n",
723	cFunctions, ELEMENTS(g_aFunctions)));
724	pOut->cFunctions = cFunctions;
725	memcpy(&pOut->aFunctions[0], g_aFunctions, sizeof(pOut->aFunctions[0]) * cFunctions);
726	*pcbReturned = RT_OFFSETOF(SUPQUERYFUNCS_OUT, aFunctions[cFunctions]);
727	return 0;
728	}
729
730
731	case SUP_IOCTL_IDT_INSTALL:
732	{
733	PSUPIDTINSTALL_IN pIn = (PSUPIDTINSTALL_IN)pvIn;
734	PSUPIDTINSTALL_OUT pOut = (PSUPIDTINSTALL_OUT)pvOut;
735
736	/*
737	* Validate.
738	*/
739	if ( cbIn != sizeof(*pIn)
740	\|\| cbOut != sizeof(*pOut))
741	{
742	dprintf(("SUP_IOCTL_INSTALL: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
743	(long)cbIn, (long)sizeof(pIn), (long)cbOut, (long)sizeof(pOut)));
744	return SUPDRV_ERR_INVALID_PARAM;
745	}
746	if ( pIn->u32Cookie != pDevExt->u32Cookie
747	\|\| pIn->u32SessionCookie != pSession->u32Cookie )
748	{
749	dprintf(("SUP_IOCTL_INSTALL: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
750	pIn->u32Cookie, pDevExt->u32Cookie,
751	pIn->u32SessionCookie, pSession->u32Cookie));
752	return SUPDRV_ERR_INVALID_MAGIC;
753	}
754
755	pcbReturned = sizeof(pOut);
756	#ifndef VBOX_WITHOUT_IDT_PATCHING
757	return supdrvIOCtl_IdtInstall(pDevExt, pSession, pIn, pOut);
758	#else
759	pOut->u8Idt = 3;
760	return 0;
761	#endif
762	}
763
764
765	case SUP_IOCTL_IDT_REMOVE:
766	{
767	PSUPIDTREMOVE_IN pIn = (PSUPIDTREMOVE_IN)pvIn;
768
769	/*
770	* Validate.
771	*/
772	if ( cbIn != sizeof(*pIn)
773	\|\| cbOut != 0)
774	{
775	dprintf(("SUP_IOCTL_REMOVE: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
776	(long)cbIn, (long)sizeof(*pIn), (long)cbOut, (long)0));
777	return SUPDRV_ERR_INVALID_PARAM;
778	}
779	if ( pIn->u32Cookie != pDevExt->u32Cookie
780	\|\| pIn->u32SessionCookie != pSession->u32Cookie )
781	{
782	dprintf(("SUP_IOCTL_REMOVE: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
783	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
784	return SUPDRV_ERR_INVALID_MAGIC;
785	}
786
787	#ifndef VBOX_WITHOUT_IDT_PATCHING
788	return supdrvIOCtl_IdtRemoveAll(pDevExt, pSession);
789	#else
790	return 0;
791	#endif
792	}
793
794
795	case SUP_IOCTL_PINPAGES:
796	{
797	int rc;
798	PSUPPINPAGES_IN pIn = (PSUPPINPAGES_IN)pvIn;
799	PSUPPINPAGES_OUT pOut = (PSUPPINPAGES_OUT)pvOut;
800
801	/*
802	* Validate.
803	*/
804	if ( cbIn != sizeof(*pIn)
805	\|\| cbOut < sizeof(*pOut))
806	{
807	dprintf(("SUP_IOCTL_PINPAGES: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
808	(long)cbIn, (long)sizeof(pIn), (long)cbOut, (long)sizeof(pOut)));
809	return SUPDRV_ERR_INVALID_PARAM;
810	}
811	if ( pIn->u32Cookie != pDevExt->u32Cookie
812	\|\| pIn->u32SessionCookie != pSession->u32Cookie )
813	{
814	dprintf(("SUP_IOCTL_PINPAGES: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
815	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
816	return SUPDRV_ERR_INVALID_MAGIC;
817	}
818	if (pIn->cPages <= 0 \|\| !pIn->pvR3)
819	{
820	dprintf(("SUP_IOCTL_PINPAGES: Illegal request %p %d\n", (void *)pIn->pvR3, pIn->cPages));
821	return SUPDRV_ERR_INVALID_PARAM;
822	}
823	if ((unsigned)RT_OFFSETOF(SUPPINPAGES_OUT, aPages[pIn->cPages]) > cbOut)
824	{
825	dprintf(("SUP_IOCTL_PINPAGES: Output buffer is too small! %d required %d passed in.\n",
826	RT_OFFSETOF(SUPPINPAGES_OUT, aPages[pIn->cPages]), cbOut));
827	return SUPDRV_ERR_INVALID_PARAM;
828	}
829
830	/*
831	* Execute.
832	*/
833	*pcbReturned = RT_OFFSETOF(SUPPINPAGES_OUT, aPages[pIn->cPages]);
834	rc = SUPR0LockMem(pSession, pIn->pvR3, pIn->cPages, &pOut->aPages[0]);
835	if (rc)
836	*pcbReturned = 0;
837	return rc;
838	}
839
840
841	case SUP_IOCTL_UNPINPAGES:
842	{
843	PSUPUNPINPAGES_IN pIn = (PSUPUNPINPAGES_IN)pvIn;
844
845	/*
846	* Validate.
847	*/
848	if ( cbIn != sizeof(*pIn)
849	\|\| cbOut != 0)
850	{
851	dprintf(("SUP_IOCTL_UNPINPAGES: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
852	(long)cbIn, (long)sizeof(*pIn), (long)cbOut, (long)0));
853	return SUPDRV_ERR_INVALID_PARAM;
854	}
855	if ( pIn->u32Cookie != pDevExt->u32Cookie
856	\|\| pIn->u32SessionCookie != pSession->u32Cookie)
857	{
858	dprintf(("SUP_IOCTL_UNPINPAGES: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
859	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
860	return SUPDRV_ERR_INVALID_MAGIC;
861	}
862
863	/*
864	* Execute.
865	*/
866	return SUPR0UnlockMem(pSession, pIn->pvR3);
867	}
868
869	case SUP_IOCTL_CONT_ALLOC:
870	{
871	int rc;
872	PSUPCONTALLOC_IN pIn = (PSUPCONTALLOC_IN)pvIn;
873	PSUPCONTALLOC_OUT pOut = (PSUPCONTALLOC_OUT)pvOut;
874
875	/*
876	* Validate.
877	*/
878	if ( cbIn != sizeof(*pIn)
879	\|\| cbOut < sizeof(*pOut))
880	{
881	dprintf(("SUP_IOCTL_CONT_ALLOC: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
882	(long)cbIn, (long)sizeof(pIn), (long)cbOut, (long)sizeof(pOut)));
883	return SUPDRV_ERR_INVALID_PARAM;
884	}
885	if ( pIn->u32Cookie != pDevExt->u32Cookie
886	\|\| pIn->u32SessionCookie != pSession->u32Cookie )
887	{
888	dprintf(("SUP_IOCTL_CONT_ALLOC: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
889	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
890	return SUPDRV_ERR_INVALID_MAGIC;
891	}
892
893	/*
894	* Execute.
895	*/
896	rc = SUPR0ContAlloc(pSession, pIn->cPages, &pOut->pvR0, &pOut->pvR3, &pOut->HCPhys);
897	if (!rc)
898	pcbReturned = sizeof(pOut);
899	return rc;
900	}
901
902
903	case SUP_IOCTL_CONT_FREE:
904	{
905	PSUPCONTFREE_IN pIn = (PSUPCONTFREE_IN)pvIn;
906
907	/*
908	* Validate.
909	*/
910	if ( cbIn != sizeof(*pIn)
911	\|\| cbOut != 0)
912	{
913	dprintf(("SUP_IOCTL_CONT_FREE: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
914	(long)cbIn, (long)sizeof(*pIn), (long)cbOut, (long)0));
915	return SUPDRV_ERR_INVALID_PARAM;
916	}
917	if ( pIn->u32Cookie != pDevExt->u32Cookie
918	\|\| pIn->u32SessionCookie != pSession->u32Cookie)
919	{
920	dprintf(("SUP_IOCTL_CONT_FREE: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
921	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
922	return SUPDRV_ERR_INVALID_MAGIC;
923	}
924
925	/*
926	* Execute.
927	*/
928	return SUPR0ContFree(pSession, (RTHCUINTPTR)pIn->pvR3);
929	}
930
931
932	case SUP_IOCTL_LDR_OPEN:
933	{
934	PSUPLDROPEN_IN pIn = (PSUPLDROPEN_IN)pvIn;
935	PSUPLDROPEN_OUT pOut = (PSUPLDROPEN_OUT)pvOut;
936
937	/*
938	* Validate.
939	*/
940	if ( cbIn != sizeof(*pIn)
941	\|\| cbOut != sizeof(*pOut))
942	{
943	dprintf(("SUP_IOCTL_LDR_OPEN: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
944	(long)cbIn, (long)sizeof(pIn), (long)cbOut, (long)sizeof(pOut)));
945	return SUPDRV_ERR_INVALID_PARAM;
946	}
947	if ( pIn->u32Cookie != pDevExt->u32Cookie
948	\|\| pIn->u32SessionCookie != pSession->u32Cookie)
949	{
950	dprintf(("SUP_IOCTL_LDR_OPEN: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
951	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
952	return SUPDRV_ERR_INVALID_MAGIC;
953	}
954	if ( pIn->cbImage <= 0
955	\|\| pIn->cbImage >= 1610241024 /16MB/)
956	{
957	dprintf(("SUP_IOCTL_LDR_OPEN: Invalid size %d. (max is 16MB)\n", pIn->cbImage));
958	return SUPDRV_ERR_INVALID_PARAM;
959	}
960	if (!memchr(pIn->szName, '\0', sizeof(pIn->szName)))
961	{
962	dprintf(("SUP_IOCTL_LDR_OPEN: The image name isn't terminated!\n"));
963	return SUPDRV_ERR_INVALID_PARAM;
964	}
965	if (!pIn->szName[0])
966	{
967	dprintf(("SUP_IOCTL_LDR_OPEN: The image name is too short\n"));
968	return SUPDRV_ERR_INVALID_PARAM;
969	}
970	if (strpbrk(pIn->szName, ";:()[]{}/\\\|&*%#@!~`\"'"))
971	{
972	dprintf(("SUP_IOCTL_LDR_OPEN: The name is invalid '%s'\n", pIn->szName));
973	return SUPDRV_ERR_INVALID_PARAM;
974	}
975
976	pcbReturned = sizeof(pOut);
977	return supdrvIOCtl_LdrOpen(pDevExt, pSession, pIn, pOut);
978	}
979
980
981	case SUP_IOCTL_LDR_LOAD:
982	{
983	PSUPLDRLOAD_IN pIn = (PSUPLDRLOAD_IN)pvIn;
984
985	/*
986	* Validate.
987	*/
988	if ( cbIn <= sizeof(*pIn)
989	\|\| cbOut != 0)
990	{
991	dprintf(("SUP_IOCTL_LDR_LOAD: Invalid input/output sizes. cbIn=%ld expected greater than %ld. cbOut=%ld expected %ld.\n",
992	(long)cbIn, (long)sizeof(*pIn), (long)cbOut, (long)0));
993	return SUPDRV_ERR_INVALID_PARAM;
994	}
995	if ( pIn->u32Cookie != pDevExt->u32Cookie
996	\|\| pIn->u32SessionCookie != pSession->u32Cookie)
997	{
998	dprintf(("SUP_IOCTL_LDR_LOAD: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
999	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
1000	return SUPDRV_ERR_INVALID_MAGIC;
1001	}
1002	if ((unsigned)RT_OFFSETOF(SUPLDRLOAD_IN, achImage[pIn->cbImage]) > cbIn)
1003	{
1004	dprintf(("SUP_IOCTL_LDR_LOAD: Invalid size %d. InputBufferLength=%d\n",
1005	pIn->cbImage, cbIn));
1006	return SUPDRV_ERR_INVALID_PARAM;
1007	}
1008	if (pIn->cSymbols > 16384)
1009	{
1010	dprintf(("SUP_IOCTL_LDR_LOAD: Too many symbols. cSymbols=%u max=16384\n", pIn->cSymbols));
1011	return SUPDRV_ERR_INVALID_PARAM;
1012	}
1013	if ( pIn->cSymbols
1014	&& ( pIn->offSymbols >= pIn->cbImage
1015	\|\| pIn->offSymbols + pIn->cSymbols * sizeof(SUPLDRSYM) > pIn->cbImage)
1016	)
1017	{
1018	dprintf(("SUP_IOCTL_LDR_LOAD: symbol table is outside the image bits! offSymbols=%u cSymbols=%d cbImage=%d\n",
1019	pIn->offSymbols, pIn->cSymbols, pIn->cbImage));
1020	return SUPDRV_ERR_INVALID_PARAM;
1021	}
1022	if ( pIn->cbStrTab
1023	&& ( pIn->offStrTab >= pIn->cbImage
1024	\|\| pIn->offStrTab + pIn->cbStrTab > pIn->cbImage
1025	\|\| pIn->offStrTab + pIn->cbStrTab < pIn->offStrTab)
1026	)
1027	{
1028	dprintf(("SUP_IOCTL_LDR_LOAD: string table is outside the image bits! offStrTab=%u cbStrTab=%d cbImage=%d\n",
1029	pIn->offStrTab, pIn->cbStrTab, pIn->cbImage));
1030	return SUPDRV_ERR_INVALID_PARAM;
1031	}
1032
1033	if (pIn->cSymbols)
1034	{
1035	uint32_t i;
1036	PSUPLDRSYM paSyms = (PSUPLDRSYM)&pIn->achImage[pIn->offSymbols];
1037	for (i = 0; i < pIn->cSymbols; i++)
1038	{
1039	if (paSyms[i].offSymbol >= pIn->cbImage)
1040	{
1041	dprintf(("SUP_IOCTL_LDR_LOAD: symbol i=%d has an invalid symbol offset: %#x (max=%#x)\n",
1042	i, paSyms[i].offSymbol, pIn->cbImage));
1043	return SUPDRV_ERR_INVALID_PARAM;
1044	}
1045	if (paSyms[i].offName >= pIn->cbStrTab)
1046	{
1047	dprintf(("SUP_IOCTL_LDR_LOAD: symbol i=%d has an invalid name offset: %#x (max=%#x)\n",
1048	i, paSyms[i].offName, pIn->cbStrTab));
1049	return SUPDRV_ERR_INVALID_PARAM;
1050	}
1051	if (!memchr(&pIn->achImage[pIn->offStrTab + paSyms[i].offName], '\0', pIn->cbStrTab - paSyms[i].offName))
1052	{
1053	dprintf(("SUP_IOCTL_LDR_LOAD: symbol i=%d has an unterminated name! offName=%#x (max=%#x)\n",
1054	i, paSyms[i].offName, pIn->cbStrTab));
1055	return SUPDRV_ERR_INVALID_PARAM;
1056	}
1057	}
1058	}
1059
1060	return supdrvIOCtl_LdrLoad(pDevExt, pSession, pIn);
1061	}
1062
1063
1064	case SUP_IOCTL_LDR_FREE:
1065	{
1066	PSUPLDRFREE_IN pIn = (PSUPLDRFREE_IN)pvIn;
1067
1068	/*
1069	* Validate.
1070	*/
1071	if ( cbIn != sizeof(*pIn)
1072	\|\| cbOut != 0)
1073	{
1074	dprintf(("SUP_IOCTL_LDR_FREE: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
1075	(long)cbIn, (long)sizeof(*pIn), (long)cbOut, (long)0));
1076	return SUPDRV_ERR_INVALID_PARAM;
1077	}
1078	if ( pIn->u32Cookie != pDevExt->u32Cookie
1079	\|\| pIn->u32SessionCookie != pSession->u32Cookie)
1080	{
1081	dprintf(("SUP_IOCTL_LDR_FREE: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
1082	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
1083	return SUPDRV_ERR_INVALID_MAGIC;
1084	}
1085
1086	return supdrvIOCtl_LdrFree(pDevExt, pSession, pIn);
1087	}
1088
1089
1090	case SUP_IOCTL_LDR_GET_SYMBOL:
1091	{
1092	PSUPLDRGETSYMBOL_IN pIn = (PSUPLDRGETSYMBOL_IN)pvIn;
1093	PSUPLDRGETSYMBOL_OUT pOut = (PSUPLDRGETSYMBOL_OUT)pvOut;
1094	char *pszEnd;
1095
1096	/*
1097	* Validate.
1098	*/
1099	if ( cbIn < (unsigned)RT_OFFSETOF(SUPLDRGETSYMBOL_IN, szSymbol[2])
1100	\|\| cbOut != sizeof(*pOut))
1101	{
1102	dprintf(("SUP_IOCTL_LDR_GET_SYMBOL: Invalid input/output sizes. cbIn=%d expected >=%d. cbOut=%d expected at%d.\n",
1103	cbIn, RT_OFFSETOF(SUPLDRGETSYMBOL_IN, szSymbol[2]), cbOut, 0));
1104	return SUPDRV_ERR_INVALID_PARAM;
1105	}
1106	if ( pIn->u32Cookie != pDevExt->u32Cookie
1107	\|\| pIn->u32SessionCookie != pSession->u32Cookie)
1108	{
1109	dprintf(("SUP_IOCTL_LDR_GET_SYMBOL: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
1110	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
1111	return SUPDRV_ERR_INVALID_MAGIC;
1112	}
1113	pszEnd = memchr(pIn->szSymbol, '\0', cbIn - RT_OFFSETOF(SUPLDRGETSYMBOL_IN, szSymbol));
1114	if (!pszEnd)
1115	{
1116	dprintf(("SUP_IOCTL_LDR_GET_SYMBOL: The symbol name isn't terminated!\n"));
1117	return SUPDRV_ERR_INVALID_PARAM;
1118	}
1119	if (pszEnd - &pIn->szSymbol[0] >= 1024)
1120	{
1121	dprintf(("SUP_IOCTL_LDR_GET_SYMBOL: The symbol name too long (%ld chars, max is %d)!\n",
1122	(long)(pszEnd - &pIn->szSymbol[0]), 1024));
1123	return SUPDRV_ERR_INVALID_PARAM;
1124	}
1125
1126	pOut->pvSymbol = NULL;
1127	pcbReturned = sizeof(pOut);
1128	return supdrvIOCtl_LdrGetSymbol(pDevExt, pSession, pIn, pOut);
1129	}
1130
1131
1132	/** @todo this interface needs re-doing, we're accessing Ring-3 buffers directly here! */
1133	case SUP_IOCTL_CALL_VMMR0:
1134	{
1135	PSUPCALLVMMR0_IN pIn = (PSUPCALLVMMR0_IN)pvIn;
1136	PSUPCALLVMMR0_OUT pOut = (PSUPCALLVMMR0_OUT)pvOut;
1137
1138	/*
1139	* Validate.
1140	*/
1141	if ( cbIn != sizeof(*pIn)
1142	\|\| cbOut != sizeof(*pOut))
1143	{
1144	dprintf(("SUP_IOCTL_CALL_VMMR0: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
1145	(long)cbIn, (long)sizeof(pIn), (long)cbOut, (long)sizeof(pOut)));
1146	return SUPDRV_ERR_INVALID_PARAM;
1147	}
1148	if ( pIn->u32Cookie != pDevExt->u32Cookie
1149	\|\| pIn->u32SessionCookie != pSession->u32Cookie )
1150	{
1151	dprintf(("SUP_IOCTL_CALL_VMMR0: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
1152	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
1153	return SUPDRV_ERR_INVALID_MAGIC;
1154	}
1155
1156	/*
1157	* Do we have an entrypoint?
1158	*/
1159	if (!pDevExt->pfnVMMR0Entry)
1160	return SUPDRV_ERR_GENERAL_FAILURE;
1161
1162	/*
1163	* Execute.
1164	*/
1165	pOut->rc = pDevExt->pfnVMMR0Entry(pIn->pVMR0, pIn->uOperation, (void )pIn->pvArg); /* @todo address the pvArg problem! */
1166	pcbReturned = sizeof(pOut);
1167	return 0;
1168	}
1169
1170
1171	case SUP_IOCTL_GET_PAGING_MODE:
1172	{
1173	int rc;
1174	PSUPGETPAGINGMODE_IN pIn = (PSUPGETPAGINGMODE_IN)pvIn;
1175	PSUPGETPAGINGMODE_OUT pOut = (PSUPGETPAGINGMODE_OUT)pvOut;
1176
1177	/*
1178	* Validate.
1179	*/
1180	if ( cbIn != sizeof(*pIn)
1181	\|\| cbOut != sizeof(*pOut))
1182	{
1183	dprintf(("SUP_IOCTL_GET_PAGING_MODE: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
1184	(long)cbIn, (long)sizeof(pIn), (long)cbOut, (long)sizeof(pOut)));
1185	return SUPDRV_ERR_INVALID_PARAM;
1186	}
1187	if ( pIn->u32Cookie != pDevExt->u32Cookie
1188	\|\| pIn->u32SessionCookie != pSession->u32Cookie )
1189	{
1190	dprintf(("SUP_IOCTL_GET_PAGING_MODE: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
1191	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
1192	return SUPDRV_ERR_INVALID_MAGIC;
1193	}
1194
1195	/*
1196	* Execute.
1197	*/
1198	pcbReturned = sizeof(pOut);
1199	rc = supdrvIOCtl_GetPagingMode(pOut);
1200	if (rc)
1201	*pcbReturned = 0;
1202	return rc;
1203	}
1204
1205
1206	case SUP_IOCTL_LOW_ALLOC:
1207	{
1208	int rc;
1209	PSUPLOWALLOC_IN pIn = (PSUPLOWALLOC_IN)pvIn;
1210	PSUPLOWALLOC_OUT pOut = (PSUPLOWALLOC_OUT)pvOut;
1211
1212	/*
1213	* Validate.
1214	*/
1215	if ( cbIn != sizeof(*pIn)
1216	\|\| cbOut < sizeof(*pOut))
1217	{
1218	dprintf(("SUP_IOCTL_LOW_ALLOC: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
1219	(long)cbIn, (long)sizeof(pIn), (long)cbOut, (long)sizeof(pOut)));
1220	return SUPDRV_ERR_INVALID_PARAM;
1221	}
1222	if ( pIn->u32Cookie != pDevExt->u32Cookie
1223	\|\| pIn->u32SessionCookie != pSession->u32Cookie )
1224	{
1225	dprintf(("SUP_IOCTL_LOW_ALLOC: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
1226	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
1227	return SUPDRV_ERR_INVALID_MAGIC;
1228	}
1229	if ((unsigned)RT_OFFSETOF(SUPLOWALLOC_OUT, aPages[pIn->cPages]) > cbOut)
1230	{
1231	dprintf(("SUP_IOCTL_LOW_ALLOC: Output buffer is too small! %d required %d passed in.\n",
1232	RT_OFFSETOF(SUPLOWALLOC_OUT, aPages[pIn->cPages]), cbOut));
1233	return SUPDRV_ERR_INVALID_PARAM;
1234	}
1235
1236	/*
1237	* Execute.
1238	*/
1239	*pcbReturned = RT_OFFSETOF(SUPLOWALLOC_OUT, aPages[pIn->cPages]);
1240	rc = SUPR0LowAlloc(pSession, pIn->cPages, &pOut->pvR0, &pOut->pvR3, &pOut->aPages[0]);
1241	if (rc)
1242	*pcbReturned = 0;
1243	return rc;
1244	}
1245
1246
1247	case SUP_IOCTL_LOW_FREE:
1248	{
1249	PSUPLOWFREE_IN pIn = (PSUPLOWFREE_IN)pvIn;
1250
1251	/*
1252	* Validate.
1253	*/
1254	if ( cbIn != sizeof(*pIn)
1255	\|\| cbOut != 0)
1256	{
1257	dprintf(("SUP_IOCTL_LOW_FREE: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
1258	(long)cbIn, (long)sizeof(*pIn), (long)cbOut, (long)0));
1259	return SUPDRV_ERR_INVALID_PARAM;
1260	}
1261	if ( pIn->u32Cookie != pDevExt->u32Cookie
1262	\|\| pIn->u32SessionCookie != pSession->u32Cookie)
1263	{
1264	dprintf(("SUP_IOCTL_LOW_FREE: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
1265	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
1266	return SUPDRV_ERR_INVALID_MAGIC;
1267	}
1268
1269	/*
1270	* Execute.
1271	*/
1272	return SUPR0LowFree(pSession, (RTHCUINTPTR)pIn->pvR3);
1273	}
1274
1275
1276	case SUP_IOCTL_GIP_MAP:
1277	{
1278	int rc;
1279	PSUPGIPMAP_IN pIn = (PSUPGIPMAP_IN)pvIn;
1280	PSUPGIPMAP_OUT pOut = (PSUPGIPMAP_OUT)pvOut;
1281
1282	/*
1283	* Validate.
1284	*/
1285	if ( cbIn != sizeof(*pIn)
1286	\|\| cbOut != sizeof(*pOut))
1287	{
1288	dprintf(("SUP_IOCTL_GIP_MAP: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
1289	(long)cbIn, (long)sizeof(*pIn), (long)cbOut, (long)0));
1290	return SUPDRV_ERR_INVALID_PARAM;
1291	}
1292	if ( pIn->u32Cookie != pDevExt->u32Cookie
1293	\|\| pIn->u32SessionCookie != pSession->u32Cookie)
1294	{
1295	dprintf(("SUP_IOCTL_GIP_MAP: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
1296	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
1297	return SUPDRV_ERR_INVALID_MAGIC;
1298	}
1299
1300	/*
1301	* Execute.
1302	*/
1303	rc = SUPR0GipMap(pSession, &pOut->pGipR3, &pOut->HCPhysGip);
1304	if (!rc)
1305	{
1306	pOut->pGipR0 = pDevExt->pGip;
1307	pcbReturned = sizeof(pOut);
1308	}
1309	return rc;
1310	}
1311
1312
1313	case SUP_IOCTL_GIP_UNMAP:
1314	{
1315	PSUPGIPUNMAP_IN pIn = (PSUPGIPUNMAP_IN)pvIn;
1316
1317	/*
1318	* Validate.
1319	*/
1320	if ( cbIn != sizeof(*pIn)
1321	\|\| cbOut != 0)
1322	{
1323	dprintf(("SUP_IOCTL_GIP_UNMAP: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
1324	(long)cbIn, (long)sizeof(*pIn), (long)cbOut, (long)0));
1325	return SUPDRV_ERR_INVALID_PARAM;
1326	}
1327	if ( pIn->u32Cookie != pDevExt->u32Cookie
1328	\|\| pIn->u32SessionCookie != pSession->u32Cookie)
1329	{
1330	dprintf(("SUP_IOCTL_GIP_UNMAP: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
1331	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
1332	return SUPDRV_ERR_INVALID_MAGIC;
1333	}
1334
1335	/*
1336	* Execute.
1337	*/
1338	return SUPR0GipUnmap(pSession);
1339	}
1340
1341
1342	case SUP_IOCTL_SET_VM_FOR_FAST:
1343	{
1344	PSUPSETVMFORFAST_IN pIn = (PSUPSETVMFORFAST_IN)pvIn;
1345
1346	/*
1347	* Validate.
1348	*/
1349	if ( cbIn != sizeof(*pIn)
1350	\|\| cbOut != 0)
1351	{
1352	dprintf(("SUP_IOCTL_SET_VM_FOR_FAST: Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n",
1353	(long)cbIn, (long)sizeof(*pIn), (long)cbOut, (long)0));
1354	return SUPDRV_ERR_INVALID_PARAM;
1355	}
1356	if ( pIn->u32Cookie != pDevExt->u32Cookie
1357	\|\| pIn->u32SessionCookie != pSession->u32Cookie)
1358	{
1359	dprintf(("SUP_IOCTL_SET_VM_FOR_FAST: Cookie mismatch {%#x,%#x} != {%#x,%#x}!\n",
1360	pIn->u32Cookie, pDevExt->u32Cookie, pIn->u32SessionCookie, pSession->u32Cookie));
1361	return SUPDRV_ERR_INVALID_MAGIC;
1362	}
1363	if ( pIn->pVMR0 != NULL
1364	&& ( !VALID_PTR(pIn->pVMR0)
1365	\|\| ((uintptr_t)pIn->pVMR0 & (PAGE_SIZE - 1))
1366	)
1367	)
1368	{
1369	dprintf(("SUP_IOCTL_SET_VM_FOR_FAST: pVMR0=%p! Must be a valid, page aligned, pointer.\n", pIn->pVMR0));
1370	return SUPDRV_ERR_INVALID_POINTER;
1371	}
1372
1373	/*
1374	* Execute.
1375	*/
1376	#ifndef VBOX_WITHOUT_IDT_PATCHING
1377	OSDBGPRINT(("SUP_IOCTL_SET_VM_FOR_FAST: !VBOX_WITHOUT_IDT_PATCHING\n"));
1378	return SUPDRV_ERR_GENERAL_FAILURE;
1379	#else
1380	pSession->pVM = pIn->pVMR0;
1381	return 0;
1382	#endif
1383	}
1384
1385
1386	default:
1387	dprintf(("Unknown IOCTL %#x\n", uIOCtl));
1388	break;
1389	}
1390	return SUPDRV_ERR_GENERAL_FAILURE;
1391	}
1392
1393
1394	/**
1395	* Register a object for reference counting.
1396	* The object is registered with one reference in the specified session.
1397	*
1398	* @returns Unique identifier on success (pointer).
1399	* All future reference must use this identifier.
1400	* @returns NULL on failure.
1401	* @param pfnDestructor The destructore function which will be called when the reference count reaches 0.
1402	* @param pvUser1 The first user argument.
1403	* @param pvUser2 The second user argument.
1404	*/
1405	SUPR0DECL(void ) SUPR0ObjRegister(PSUPDRVSESSION pSession, SUPDRVOBJTYPE enmType, PFNSUPDRVDESTRUCTOR pfnDestructor, void pvUser1, void *pvUser2)
1406	{
1407	RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER;
1408	PSUPDRVDEVEXT pDevExt = pSession->pDevExt;
1409	PSUPDRVOBJ pObj;
1410	PSUPDRVUSAGE pUsage;
1411
1412	/*
1413	* Validate the input.
1414	*/
1415	if (!pSession)
1416	{
1417	AssertMsgFailed(("Invalid pSession=%p\n", pSession));
1418	return NULL;
1419	}
1420	if ( enmType <= SUPDRVOBJTYPE_INVALID
1421	\|\| enmType >= SUPDRVOBJTYPE_END)
1422	{
1423	AssertMsgFailed(("Invalid enmType=%d\n", enmType));
1424	return NULL;
1425	}
1426	if (!pfnDestructor)
1427	{
1428	AssertMsgFailed(("Invalid pfnDestructor=%d\n", pfnDestructor));
1429	return NULL;
1430	}
1431
1432	/*
1433	* Allocate and initialize the object.
1434	*/
1435	pObj = (PSUPDRVOBJ)RTMemAlloc(sizeof(*pObj));
1436	if (!pObj)
1437	return NULL;
1438	pObj->u32Magic = SUPDRVOBJ_MAGIC;
1439	pObj->enmType = enmType;
1440	pObj->pNext = NULL;
1441	pObj->cUsage = 1;
1442	pObj->pfnDestructor = pfnDestructor;
1443	pObj->pvUser1 = pvUser1;
1444	pObj->pvUser2 = pvUser2;
1445	pObj->CreatorUid = pSession->Uid;
1446	pObj->CreatorGid = pSession->Gid;
1447	pObj->CreatorProcess= pSession->Process;
1448	supdrvOSObjInitCreator(pObj, pSession);
1449
1450	/*
1451	* Allocate the usage record.
1452	* (We keep freed usage records around to simplity SUPR0ObjAddRef().)
1453	*/
1454	RTSpinlockAcquire(pDevExt->Spinlock, &SpinlockTmp);
1455
1456	pUsage = pDevExt->pUsageFree;
1457	if (pUsage)
1458	pDevExt->pUsageFree = pUsage->pNext;
1459	else
1460	{
1461	RTSpinlockRelease(pDevExt->Spinlock, &SpinlockTmp);
1462	pUsage = (PSUPDRVUSAGE)RTMemAlloc(sizeof(*pUsage));
1463	if (!pUsage)
1464	{
1465	RTMemFree(pObj);
1466	return NULL;
1467	}
1468	RTSpinlockAcquire(pDevExt->Spinlock, &SpinlockTmp);
1469	}
1470
1471	/*
1472	* Insert the object and create the session usage record.
1473	*/
1474	/* The object. */
1475	pObj->pNext = pDevExt->pObjs;
1476	pDevExt->pObjs = pObj;
1477
1478	/* The session record. */
1479	pUsage->cUsage = 1;
1480	pUsage->pObj = pObj;
1481	pUsage->pNext = pSession->pUsage;
1482	dprintf(("SUPR0ObjRegister: pUsage=%p:{.pObj=%p, .pNext=%p}\n", pUsage, pUsage->pObj, pUsage->pNext));
1483	pSession->pUsage = pUsage;
1484
1485	RTSpinlockRelease(pDevExt->Spinlock, &SpinlockTmp);
1486
1487	dprintf(("SUPR0ObjRegister: returns %p (pvUser1=%p, pvUser=%p)\n", pObj, pvUser1, pvUser2));
1488	return pObj;
1489	}
1490
1491
1492	/**
1493	* Increment the reference counter for the object associating the reference
1494	* with the specified session.
1495	*
1496	* @returns 0 on success.
1497	* @returns SUPDRV_ERR_* on failure.
1498	* @param pvObj The identifier returned by SUPR0ObjRegister().
1499	* @param pSession The session which is referencing the object.
1500	*/
1501	SUPR0DECL(int) SUPR0ObjAddRef(void *pvObj, PSUPDRVSESSION pSession)
1502	{
1503	RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER;
1504	PSUPDRVDEVEXT pDevExt = pSession->pDevExt;
1505	PSUPDRVOBJ pObj = (PSUPDRVOBJ)pvObj;
1506	PSUPDRVUSAGE pUsagePre;
1507	PSUPDRVUSAGE pUsage;
1508
1509	/*
1510	* Validate the input.
1511	*/
1512	if (!pSession)
1513	{
1514	AssertMsgFailed(("Invalid pSession=%p\n", pSession));
1515	return SUPDRV_ERR_INVALID_PARAM;
1516	}
1517	if (!pObj \|\| pObj->u32Magic != SUPDRVOBJ_MAGIC)
1518	{
1519	AssertMsgFailed(("Invalid pvObj=%p magic=%#x (exepcted %#x)\n",
1520	pvObj, pObj ? pObj->u32Magic : 0, SUPDRVOBJ_MAGIC));
1521	return SUPDRV_ERR_INVALID_PARAM;
1522	}
1523
1524	/*
1525	* Preallocate the usage record.
1526	*/
1527	RTSpinlockAcquire(pDevExt->Spinlock, &SpinlockTmp);
1528
1529	pUsagePre = pDevExt->pUsageFree;
1530	if (pUsagePre)
1531	pDevExt->pUsageFree = pUsagePre->pNext;
1532	else
1533	{
1534	RTSpinlockRelease(pDevExt->Spinlock, &SpinlockTmp);
1535	pUsagePre = (PSUPDRVUSAGE)RTMemAlloc(sizeof(*pUsagePre));
1536	if (!pUsagePre)
1537	return SUPDRV_ERR_NO_MEMORY;
1538	RTSpinlockAcquire(pDevExt->Spinlock, &SpinlockTmp);
1539	}
1540
1541	/*
1542	* Reference the object.
1543	*/
1544	pObj->cUsage++;
1545
1546	/*
1547	* Look for the session record.
1548	*/
1549	for (pUsage = pSession->pUsage; pUsage; pUsage = pUsage->pNext)
1550	{
1551	dprintf(("SUPR0AddRef: pUsage=%p:{.pObj=%p, .pNext=%p}\n", pUsage, pUsage->pObj, pUsage->pNext));
1552	if (pUsage->pObj == pObj)
1553	break;
1554	}
1555	if (pUsage)
1556	pUsage->cUsage++;
1557	else
1558	{
1559	/* create a new session record. */
1560	pUsagePre->cUsage = 1;
1561	pUsagePre->pObj = pObj;
1562	pUsagePre->pNext = pSession->pUsage;
1563	pSession->pUsage = pUsagePre;
1564	dprintf(("SUPR0ObjRelease: pUsagePre=%p:{.pObj=%p, .pNext=%p}\n", pUsagePre, pUsagePre->pObj, pUsagePre->pNext));
1565
1566	pUsagePre = NULL;
1567	}
1568
1569	/*
1570	* Put any unused usage record into the free list..
1571	*/
1572	if (pUsagePre)
1573	{
1574	pUsagePre->pNext = pDevExt->pUsageFree;
1575	pDevExt->pUsageFree = pUsagePre;
1576	}
1577
1578	RTSpinlockRelease(pDevExt->Spinlock, &SpinlockTmp);
1579
1580	return 0;
1581	}
1582
1583
1584	/**
1585	* Decrement / destroy a reference counter record for an object.
1586	*
1587	* The object is uniquely identified by pfnDestructor+pvUser1+pvUser2.
1588	*
1589	* @returns 0 on success.
1590	* @returns SUPDRV_ERR_* on failure.
1591	* @param pvObj The identifier returned by SUPR0ObjRegister().
1592	* @param pSession The session which is referencing the object.
1593	*/
1594	SUPR0DECL(int) SUPR0ObjRelease(void *pvObj, PSUPDRVSESSION pSession)
1595	{
1596	RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER;
1597	PSUPDRVDEVEXT pDevExt = pSession->pDevExt;
1598	PSUPDRVOBJ pObj = (PSUPDRVOBJ)pvObj;
1599	bool fDestroy = false;
1600	PSUPDRVUSAGE pUsage;
1601	PSUPDRVUSAGE pUsagePrev;
1602
1603	/*
1604	* Validate the input.
1605	*/
1606	if (!pSession)
1607	{
1608	AssertMsgFailed(("Invalid pSession=%p\n", pSession));
1609	return SUPDRV_ERR_INVALID_PARAM;
1610	}
1611	if (!pObj \|\| pObj->u32Magic != SUPDRVOBJ_MAGIC)
1612	{
1613	AssertMsgFailed(("Invalid pvObj=%p magic=%#x (exepcted %#x)\n",
1614	pvObj, pObj ? pObj->u32Magic : 0, SUPDRVOBJ_MAGIC));
1615	return SUPDRV_ERR_INVALID_PARAM;
1616	}
1617
1618	/*
1619	* Acquire the spinlock and look for the usage record.
1620	*/
1621	RTSpinlockAcquire(pDevExt->Spinlock, &SpinlockTmp);
1622
1623	for (pUsagePrev = NULL, pUsage = pSession->pUsage;
1624	pUsage;
1625	pUsagePrev = pUsage, pUsage = pUsage->pNext)
1626	{
1627	dprintf(("SUPR0ObjRelease: pUsage=%p:{.pObj=%p, .pNext=%p}\n", pUsage, pUsage->pObj, pUsage->pNext));
1628	if (pUsage->pObj == pObj)
1629	{
1630	AssertMsg(pUsage->cUsage >= 1 && pObj->cUsage >= pUsage->cUsage, ("glob %d; sess %d\n", pObj->cUsage, pUsage->cUsage));
1631	if (pUsage->cUsage > 1)
1632	{
1633	pObj->cUsage--;
1634	pUsage->cUsage--;
1635	}
1636	else
1637	{
1638	/*
1639	* Free the session record.
1640	*/
1641	if (pUsagePrev)
1642	pUsagePrev->pNext = pUsage->pNext;
1643	else
1644	pSession->pUsage = pUsage->pNext;
1645	pUsage->pNext = pDevExt->pUsageFree;
1646	pDevExt->pUsageFree = pUsage;
1647
1648	/* What about the object? */
1649	if (pObj->cUsage > 1)
1650	pObj->cUsage--;
1651	else
1652	{
1653	/*
1654	* Object is to be destroyed, unlink it.
1655	*/
1656	fDestroy = true;
1657	if (pDevExt->pObjs == pObj)
1658	pDevExt->pObjs = pObj->pNext;
1659	else
1660	{
1661	PSUPDRVOBJ pObjPrev;
1662	for (pObjPrev = pDevExt->pObjs; pObjPrev; pObjPrev = pObjPrev->pNext)
1663	if (pObjPrev->pNext == pObj)
1664	{
1665	pObjPrev->pNext = pObj->pNext;
1666	break;
1667	}
1668	Assert(pObjPrev);
1669	}
1670	}
1671	}
1672	break;
1673	}
1674	}
1675
1676	RTSpinlockRelease(pDevExt->Spinlock, &SpinlockTmp);
1677
1678	/*
1679	* Call the destructor and free the object if required.
1680	*/
1681	if (fDestroy)
1682	{
1683	pObj->u32Magic++;
1684	pObj->pfnDestructor(pObj, pObj->pvUser1, pObj->pvUser2);
1685	RTMemFree(pObj);
1686	}
1687
1688	AssertMsg(pUsage, ("pvObj=%p\n", pvObj));
1689	return pUsage ? 0 : SUPDRV_ERR_INVALID_PARAM;
1690	}
1691
1692	/**
1693	* Verifies that the current process can access the specified object.
1694	*
1695	* @returns 0 if access is granted.
1696	* @returns SUPDRV_ERR_PERMISSION_DENIED if denied access.
1697	* @returns SUPDRV_ERR_INVALID_PARAM if invalid parameter.
1698	*
1699	* @param pvObj The identifier returned by SUPR0ObjRegister().
1700	* @param pSession The session which wishes to access the object.
1701	* @param pszObjName Object string name. This is optional and depends on the object type.
1702	*
1703	* @remark The caller is responsible for making sure the object isn't removed while
1704	* we're inside this function. If uncertain about this, just call AddRef before calling us.
1705	*/
1706	SUPR0DECL(int) SUPR0ObjVerifyAccess(void pvObj, PSUPDRVSESSION pSession, const char pszObjName)
1707	{
1708	PSUPDRVOBJ pObj = (PSUPDRVOBJ)pvObj;
1709	int rc = SUPDRV_ERR_GENERAL_FAILURE;
1710
1711	/*
1712	* Validate the input.
1713	*/
1714	if (!pSession)
1715	{
1716	AssertMsgFailed(("Invalid pSession=%p\n", pSession));
1717	return SUPDRV_ERR_INVALID_PARAM;
1718	}
1719	if (!pObj \|\| pObj->u32Magic != SUPDRVOBJ_MAGIC)
1720	{
1721	AssertMsgFailed(("Invalid pvObj=%p magic=%#x (exepcted %#x)\n",
1722	pvObj, pObj ? pObj->u32Magic : 0, SUPDRVOBJ_MAGIC));
1723	return SUPDRV_ERR_INVALID_PARAM;
1724	}
1725
1726	/*
1727	* Check access. (returns true if a decision has been made.)
1728	*/
1729	if (supdrvOSObjCanAccess(pObj, pSession, pszObjName, &rc))
1730	return rc;
1731
1732	/*
1733	* Default policy is to allow the user to access his own
1734	* stuff but nothing else.
1735	*/
1736	if (pObj->CreatorUid == pSession->Uid)
1737	return 0;
1738	return SUPDRV_ERR_PERMISSION_DENIED;
1739	}
1740
1741
1742	/**
1743	* Lock pages.
1744	*
1745	* @param pSession Session to which the locked memory should be associated.
1746	* @param pvR3 Start of the memory range to lock.
1747	* This must be page aligned.
1748	* @param cb Size of the memory range to lock.
1749	* This must be page aligned.
1750	*/
1751	SUPR0DECL(int) SUPR0LockMem(PSUPDRVSESSION pSession, RTR3PTR pvR3, uint32_t cPages, PSUPPAGE paPages)
1752	{
1753	int rc;
1754	SUPDRVMEMREF Mem = {0};
1755	dprintf(("SUPR0LockMem: pSession=%p pvR3=%p cPages=%d paPages=%p\n",
1756	pSession, (void *)pvR3, cPages, paPages));
1757
1758	/*
1759	* Verify input.
1760	*/
1761	if (RT_ALIGN_R3PT(pvR3, PAGE_SIZE, RTR3PTR) != pvR3 \|\| !pvR3)
1762	{
1763	dprintf(("pvR3 (%p) must be page aligned and not NULL!\n", (void *)pvR3));
1764	return SUPDRV_ERR_INVALID_PARAM;
1765	}
1766	if (!paPages)
1767	{
1768	dprintf(("paPages is NULL!\n"));
1769	return SUPDRV_ERR_INVALID_PARAM;
1770	}
1771
1772	#ifdef USE_NEW_OS_INTERFACE
1773	/*
1774	* Let IPRT do the job.
1775	*/
1776	Mem.eType = MEMREF_TYPE_LOCKED;
1777	rc = RTR0MemObjLockUser(&Mem.MemObj, pvR3, cb, RTR0ProcHandleSelf());
1778	if (RT_SUCCESS(rc))
1779	{
1780	AssertMsg(RTR0MemObjAddress(Mem.MemObj) == pvR3, ("%p == %p\n", RTR0MemObjAddress(Mem.MemObj), pvR3));
1781	AssertMsg(RTR0MemObjSize(Mem.MemObj) == cb, ("%x == %x\n", RTR0MemObjSize(Mem.MemObj), cb));
1782
1783	unsigned iPage = cb >> PAGE_SHIFT;
1784	while (iPage-- > 0)
1785	{
1786	paPages[iPage].uReserved = 0;
1787	paPages[iPage].Phys = RTR0MemObjGetPagePhysAddr(Mem.MemObj, iPage);
1788	if (RT_UNLIKELY(paPages[iPage].Phys == NIL_RTCCPHYS))
1789	{
1790	AssertMsgFailed(("iPage=%d\n", iPage));
1791	rc = VERR_INTERNAL_ERROR;
1792	break;
1793	}
1794	}
1795	if (RT_SUCCESS(rc))
1796	rc = supdrvMemAdd(&Mem, pSession);
1797	if (RT_FAILURE(rc))
1798	{
1799	int rc2 = RTR0MemObjFree(Mem.MemObj, false);
1800	AssertRC(rc2);
1801	}
1802	}
1803
1804	#else /* !USE_NEW_OS_INTERFACE */
1805
1806	/*
1807	* Let the OS specific code have a go.
1808	*/
1809	Mem.pvR0 = NULL;
1810	Mem.pvR3 = pvR3;
1811	Mem.eType = MEMREF_TYPE_LOCKED;
1812	Mem.cb = cPages << PAGE_SHIFT;
1813	rc = supdrvOSLockMemOne(&Mem, paPages);
1814	if (rc)
1815	return rc;
1816
1817	/*
1818	* Everything when fine, add the memory reference to the session.
1819	*/
1820	rc = supdrvMemAdd(&Mem, pSession);
1821	if (rc)
1822	supdrvOSUnlockMemOne(&Mem);
1823	#endif /* !USE_NEW_OS_INTERFACE */
1824	return rc;
1825	}
1826
1827
1828	/**
1829	* Unlocks the memory pointed to by pv.
1830	*
1831	* @returns 0 on success.
1832	* @returns SUPDRV_ERR_* on failure
1833	* @param pSession Session to which the memory was locked.
1834	* @param pvR3 Memory to unlock.
1835	*/
1836	SUPR0DECL(int) SUPR0UnlockMem(PSUPDRVSESSION pSession, RTR3PTR pvR3)
1837	{
1838	dprintf(("SUPR0UnlockMem: pSession=%p pvR3=%p\n", pSession, (void *)pvR3));
1839	return supdrvMemRelease(pSession, (RTHCUINTPTR)pvR3, MEMREF_TYPE_LOCKED);
1840	}
1841
1842
1843	/**
1844	* Allocates a chunk of page aligned memory with contiguous and fixed physical
1845	* backing.
1846	*
1847	* @returns 0 on success.
1848	* @returns SUPDRV_ERR_* on failure.
1849	* @param pSession Session data.
1850	* @param cb Number of bytes to allocate.
1851	* @param ppvR0 Where to put the address of Ring-0 mapping the allocated memory.
1852	* @param ppvR3 Where to put the address of Ring-3 mapping the allocated memory.
1853	* @param pHCPhys Where to put the physical address of allocated memory.
1854	*/
1855	SUPR0DECL(int) SUPR0ContAlloc(PSUPDRVSESSION pSession, uint32_t cPages, PRTR0PTR ppvR0, PRTR3PTR ppvR3, PRTHCPHYS pHCPhys)
1856	{
1857	int rc;
1858	SUPDRVMEMREF Mem = {0};
1859	dprintf(("SUPR0ContAlloc: pSession=%p cPages=%d ppvR0=%p ppvR3=%p pHCPhys=%p\n", pSession, cPages, ppvR0, ppvR3, pHCPhys));
1860
1861	/*
1862	* Validate input.
1863	*/
1864	if (!pSession \|\| !ppvR3 \|\| !ppvR0 \|\| !pHCPhys)
1865	{
1866	dprintf(("Null pointer. All of these should be set: pSession=%p ppvR0=%p ppvR3=%p pHCPhys=%p\n",
1867	pSession, ppvR0, ppvR3, pHCPhys));
1868	return SUPDRV_ERR_INVALID_PARAM;
1869
1870	}
1871	if (cPages == 0 \|\| cPages >= 256)
1872	{
1873	dprintf(("Illegal request cPages=%d, must be greater than 0 and smaller than 256\n", cPages));
1874	return SUPDRV_ERR_INVALID_PARAM;
1875	}
1876
1877	#ifdef USE_NEW_OS_INTERFACE
1878	/*
1879	* Let IPRT do the job.
1880	*/
1881	rc = RTR0MemObjAllocCont(&Mem.MemObj, cPages << PAGE_SHIFT, true /* executable R0 mapping */);
1882	if (RT_SUCCESS(rc))
1883	{
1884	int rc2;
1885	rc = RTR0MemObjMapUser(&Mem.MapObjR3, Mem.MemObj, (void *)-1, 0,
1886	RTMEM_PROT_EXEC \| RTMEM_PROT_WRITE \| RTMEM_PROT_READ, RTR0ProcHandleSelf());
1887	if (RT_SUCCESS(rc))
1888	{
1889	Mem.eType = MEMREF_TYPE_CONT;
1890	rc = supdrvMemAdd(&Mem, pSession);
1891	if (!rc)
1892	{
1893	*ppvR0 = RTR0MemObjAddress(Mem.MemObj);
1894	*ppvR3 = (RTR3PTR)RTR0MemObjAddress(Mem.MapObjR3);
1895	*pHCPhys = RTR0MemObjGetPagePhysAddr(Mem.MemObj, 0);
1896	return 0;
1897	}
1898
1899	rc2 = RTR0MemObjFree(Mem.MapObjR3, false);
1900	AssertRC(rc2);
1901	}
1902	rc2 = RTR0MemObjFree(Mem.MemObj, false);
1903	AssertRC(rc2);
1904	}
1905
1906	#else /* !USE_NEW_OS_INTERFACE */
1907
1908	/*
1909	* Let the OS specific code have a go.
1910	*/
1911	Mem.pvR0 = NULL;
1912	Mem.pvR3 = NIL_RTR3PTR;
1913	Mem.eType = MEMREF_TYPE_CONT;
1914	Mem.cb = cPages << PAGE_SHIFT;
1915	rc = supdrvOSContAllocOne(&Mem, ppvR0, ppvR3, pHCPhys);
1916	if (rc)
1917	return rc;
1918	AssertMsg(!((uintptr_t)ppvR3 & (PAGE_SIZE - 1)) \|\| !(pHCPhys & (PAGE_SIZE - 1)),
1919	("Memory is not page aligned! ppvR0=%p ppvR3=%p phys=%VHp\n", ppvR0 ? ppvR0 : NULL, ppvR3, *pHCPhys));
1920
1921	/*
1922	* Everything when fine, add the memory reference to the session.
1923	*/
1924	rc = supdrvMemAdd(&Mem, pSession);
1925	if (rc)
1926	supdrvOSContFreeOne(&Mem);
1927	#endif /* !USE_NEW_OS_INTERFACE */
1928
1929	return rc;
1930	}
1931
1932
1933	/**
1934	* Frees memory allocated using SUPR0ContAlloc().
1935	*
1936	* @returns 0 on success.
1937	* @returns SUPDRV_ERR_* on failure.
1938	* @param pSession The session to which the memory was allocated.
1939	* @param uPtr Pointer to the memory (ring-3 or ring-0).
1940	*/
1941	SUPR0DECL(int) SUPR0ContFree(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr)
1942	{
1943	dprintf(("SUPR0ContFree: pSession=%p uPtr=%p\n", pSession, (void *)uPtr));
1944	return supdrvMemRelease(pSession, uPtr, MEMREF_TYPE_CONT);
1945	}
1946
1947
1948	/**
1949	* Allocates a chunk of page aligned memory with fixed physical backing below 4GB.
1950	*
1951	* @returns 0 on success.
1952	* @returns SUPDRV_ERR_* on failure.
1953	* @param pSession Session data.
1954	* @param cPages Number of pages to allocate.
1955	* @param ppvR0 Where to put the address of Ring-0 mapping of the allocated memory.
1956	* @param ppvR3 Where to put the address of Ring-3 mapping of the allocated memory.
1957	* @param paPages Where to put the physical addresses of allocated memory.
1958	*/
1959	SUPR0DECL(int) SUPR0LowAlloc(PSUPDRVSESSION pSession, uint32_t cPages, PRTR0PTR ppvR0, PRTR3PTR ppvR3, PSUPPAGE paPages)
1960	{
1961	unsigned iPage;
1962	int rc;
1963	SUPDRVMEMREF Mem = {0};
1964	dprintf(("SUPR0LowAlloc: pSession=%p cPages=%d ppvR3=%p ppvR0=%p paPages=%p\n", pSession, cPages, ppvR3, ppvR0, paPages));
1965
1966	/*
1967	* Validate input.
1968	*/
1969	if (!pSession \|\| !ppvR3 \|\| !ppvR0 \|\| !paPages)
1970	{
1971	dprintf(("Null pointer. All of these should be set: pSession=%p ppvR3=%p ppvR0=%p paPages=%p\n",
1972	pSession, ppvR3, ppvR0, paPages));
1973	return SUPDRV_ERR_INVALID_PARAM;
1974
1975	}
1976	if (cPages < 1 \|\| cPages > 256)
1977	{
1978	dprintf(("Illegal request cPages=%d, must be greater than 0 and smaller than 256.\n", cPages));
1979	return SUPDRV_ERR_INVALID_PARAM;
1980	}
1981
1982	#ifdef USE_NEW_OS_INTERFACE
1983	/*
1984	* Let IPRT do the work.
1985	*/
1986	rc = RTR0MemObjAllocLow(&Mem.MemObj, cPages << PAGE_SHIFT, true /* executable ring-0 mapping */);
1987	if (RT_SUCCESS(rc))
1988	{
1989	int rc2;
1990	rc = RTR0MemObjMapUser(&Mem.MapObjR3, Mem.MemObj, (void *)-1, 0,
1991	RTMEM_PROT_EXEC \| RTMEM_PROT_WRITE \| RTMEM_PROT_READ, RTR0ProcHandleSelf());
1992	if (RT_SUCCESS(rc))
1993	{
1994	Mem.eType = MEMREF_TYPE_LOW;
1995	rc = supdrvMemAdd(&Mem, pSession);
1996	if (!rc)
1997	{
1998	for (iPage = 0; iPage < cPages; iPage++)
1999	{
2000	paPages[iPage].Phys = RTR0MemObjGetPagePhysAddr(Mem.MemObj, iPage);
2001	paPages[iPage].uReserved = 0;
2002	AssertMsg(!(paPages[iPage].Phys & (PAGE_SIZE - 1)), ("iPage=%d Phys=%VHp\n", paPages[iPage].Phys));
2003	}
2004	*ppvR0 = RTR0MemObjAddress(Mem.MemObj);
2005	*ppvR3 = RTR0MemObjAddress(Mem.MapObjR3);
2006	return 0;
2007	}
2008
2009	rc2 = RTR0MemObjFree(Mem.MapObjR3, false);
2010	AssertRC(rc2);
2011	}
2012
2013	rc2 = RTR0MemObjFree(Mem.MemObj, false);
2014	AssertRC(rc2);
2015	}
2016
2017	#else /* !USE_NEW_OS_INTERFACE */
2018
2019	/*
2020	* Let the OS specific code have a go.
2021	*/
2022	Mem.pvR0 = NULL;
2023	Mem.pvR3 = NIL_RTR3PTR;
2024	Mem.eType = MEMREF_TYPE_LOW;
2025	Mem.cb = cPages << PAGE_SHIFT;
2026	rc = supdrvOSLowAllocOne(&Mem, ppvR0, ppvR3, paPages);
2027	if (rc)
2028	return rc;
2029	AssertMsg(!((uintptr_t)ppvR3 & (PAGE_SIZE - 1)), ("Memory is not page aligned! virt=%p\n", ppvR3));
2030	AssertMsg(!((uintptr_t)ppvR0 & (PAGE_SIZE - 1)), ("Memory is not page aligned! virt=%p\n", ppvR0));
2031	for (iPage = 0; iPage < cPages; iPage++)
2032	AssertMsg(!(paPages[iPage].Phys & (PAGE_SIZE - 1)), ("iPage=%d Phys=%VHp\n", paPages[iPage].Phys));
2033
2034	/*
2035	* Everything when fine, add the memory reference to the session.
2036	*/
2037	rc = supdrvMemAdd(&Mem, pSession);
2038	if (rc)
2039	supdrvOSLowFreeOne(&Mem);
2040	#endif /* !USE_NEW_OS_INTERFACE */
2041	return rc;
2042	}
2043
2044
2045	/**
2046	* Frees memory allocated using SUPR0LowAlloc().
2047	*
2048	* @returns 0 on success.
2049	* @returns SUPDRV_ERR_* on failure.
2050	* @param pSession The session to which the memory was allocated.
2051	* @param uPtr Pointer to the memory (ring-3 or ring-0).
2052	*/
2053	SUPR0DECL(int) SUPR0LowFree(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr)
2054	{
2055	dprintf(("SUPR0LowFree: pSession=%p uPtr=%p\n", pSession, (void *)uPtr));
2056	return supdrvMemRelease(pSession, uPtr, MEMREF_TYPE_LOW);
2057	}
2058
2059
2060	/**
2061	* Allocates a chunk of memory with both R0 and R3 mappings.
2062	* The memory is fixed and it's possible to query the physical addresses using SUPR0MemGetPhys().
2063	*
2064	* @returns 0 on success.
2065	* @returns SUPDRV_ERR_* on failure.
2066	* @param pSession The session to associated the allocation with.
2067	* @param cb Number of bytes to allocate.
2068	* @param ppvR0 Where to store the address of the Ring-0 mapping.
2069	* @param ppvR3 Where to store the address of the Ring-3 mapping.
2070	*/
2071	SUPR0DECL(int) SUPR0MemAlloc(PSUPDRVSESSION pSession, uint32_t cb, PRTR0PTR ppvR0, PRTR3PTR ppvR3)
2072	{
2073	int rc;
2074	SUPDRVMEMREF Mem = {0};
2075	dprintf(("SUPR0MemAlloc: pSession=%p cb=%d ppvR0=%p ppvR3=%p\n", pSession, cb, ppvR0, ppvR3));
2076
2077	/*
2078	* Validate input.
2079	*/
2080	if (!pSession \|\| !ppvR0 \|\| !ppvR3)
2081	{
2082	dprintf(("Null pointer. All of these should be set: pSession=%p ppvR0=%p ppvR3=%p\n",
2083	pSession, ppvR0, ppvR3));
2084	return SUPDRV_ERR_INVALID_PARAM;
2085
2086	}
2087	if (cb < 1 \|\| cb >= PAGE_SIZE * 256)
2088	{
2089	dprintf(("Illegal request cb=%u; must be greater than 0 and smaller than 4MB.\n", cb));
2090	return SUPDRV_ERR_INVALID_PARAM;
2091	}
2092
2093	#ifdef USE_NEW_OS_INTERFACE
2094	/*
2095	* Let IPRT do the work.
2096	*/
2097	rc = RTR0MemObjAllocPage(&Mem.MemObj, cb, true /* executable ring-0 mapping */);
2098	if (RT_SUCCESS(rc))
2099	{
2100	int rc2;
2101	rc = RTR0MemObjMapUser(&Mem.MapObjR3, Mem.MemObj, (void*)-1, 0,
2102	RTMEM_PROT_EXEC \| RTMEM_PROT_WRITE \| RTMEM_PROT_READ, RTR0ProcHandleSelf());
2103	if (RT_SUCCESS(rc))
2104	{
2105	Mem.eType = MEMREF_TYPE_MEM;
2106	rc = supdrvMemAdd(&Mem, pSession);
2107	if (!rc)
2108	{
2109	*ppvR0 = RTR0MemObjAddress(Mem.MemObj);
2110	*ppvR3 = (RTR3PTR)RTR0MemObjAddress(Mem.MapObjR3);
2111	return 0;
2112	}
2113	rc2 = RTR0MemObjFree(Mem.MapObjR3, false);
2114	AssertRC(rc2);
2115	}
2116
2117	rc2 = RTR0MemObjFree(Mem.MemObj, false);
2118	AssertRC(rc2);
2119	}
2120
2121	#else /* !USE_NEW_OS_INTERFACE */
2122
2123	/*
2124	* Let the OS specific code have a go.
2125	*/
2126	Mem.pvR0 = NULL;
2127	Mem.pvR3 = NIL_RTR3PTR;
2128	Mem.eType = MEMREF_TYPE_MEM;
2129	Mem.cb = cb;
2130	rc = supdrvOSMemAllocOne(&Mem, ppvR0, ppvR3);
2131	if (rc)
2132	return rc;
2133	AssertMsg(!((uintptr_t)ppvR0 & (PAGE_SIZE - 1)), ("Memory is not page aligned! pvR0=%p\n", ppvR0));
2134	AssertMsg(!((uintptr_t)ppvR3 & (PAGE_SIZE - 1)), ("Memory is not page aligned! pvR3=%p\n", ppvR3));
2135
2136	/*
2137	* Everything when fine, add the memory reference to the session.
2138	*/
2139	rc = supdrvMemAdd(&Mem, pSession);
2140	if (rc)
2141	supdrvOSMemFreeOne(&Mem);
2142	#endif /* !USE_NEW_OS_INTERFACE */
2143	return rc;
2144	}
2145
2146
2147	/**
2148	* Get the physical addresses of memory allocated using SUPR0MemAlloc().
2149	*
2150	* @returns 0 on success.
2151	* @returns SUPDRV_ERR_* on failure.
2152	* @param pSession The session to which the memory was allocated.
2153	* @param uPtr The Ring-0 or Ring-3 address returned by SUPR0MemAlloc().
2154	* @param paPages Where to store the physical addresses.
2155	*/
2156	SUPR0DECL(int) SUPR0MemGetPhys(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr, PSUPPAGE paPages)
2157	{
2158	PSUPDRVBUNDLE pBundle;
2159	RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER;
2160	dprintf(("SUPR0MemGetPhys: pSession=%p uPtr=%p paPages=%p\n", pSession, (void *)uPtr, paPages));
2161
2162	/*
2163	* Validate input.
2164	*/
2165	if (!pSession)
2166	{
2167	dprintf(("pSession must not be NULL!"));
2168	return SUPDRV_ERR_INVALID_PARAM;
2169	}
2170	if (!uPtr \|\| !paPages)
2171	{
2172	dprintf(("Illegal address uPtr=%p or/and paPages=%p\n", (void *)uPtr, paPages));
2173	return SUPDRV_ERR_INVALID_PARAM;
2174	}
2175
2176	/*
2177	* Search for the address.
2178	*/
2179	RTSpinlockAcquire(pSession->Spinlock, &SpinlockTmp);
2180	for (pBundle = &pSession->Bundle; pBundle; pBundle = pBundle->pNext)
2181	{
2182	if (pBundle->cUsed > 0)
2183	{
2184	unsigned i;
2185	for (i = 0; i < sizeof(pBundle->aMem) / sizeof(pBundle->aMem[0]); i++)
2186	{
2187	#ifdef USE_NEW_OS_INTERFACE
2188	if ( pBundle->aMem[i].eType == MEMREF_TYPE_MEM
2189	&& pBundle->aMem[i].MemObj != NIL_RTR0MEMOBJ
2190	&& ( (RTHCUINTPTR)RTR0MemObjAddress(pBundle->aMem[i].MemObj) == uPtr
2191	\|\| ( pBundle->aMem[i].MapObjR3 != NIL_RTR0MEMOBJ
2192	&& (RTHCUINTPTR)RTR0MemObjAddress(pBundle->aMem[i].MapObjR3) == uPtr)
2193	)
2194	)
2195	{
2196	const unsigned cPages = RTR0MemObjSize(pBundle->aMem[i].MemObj) >> PAGE_SHIFT;
2197	unsigned iPage;
2198	for (iPage = 0; iPage < cPages; iPage++)
2199	{
2200	paPages[iPage].Phys = RTR0MemObjGetPagePhysAddr(pBundle->aMem[i].MemObj, iPage);
2201	paPages[iPage].uReserved = 0;
2202	}
2203	RTSpinlockRelease(pSession->Spinlock, &SpinlockTmp);
2204	return 0;
2205	}
2206	#else /* !USE_NEW_OS_INTERFACE */
2207	if ( pBundle->aMem[i].eType == MEMREF_TYPE_MEM
2208	&& ( (RTHCUINTPTR)pBundle->aMem[i].pvR0 == uPtr
2209	\|\| (RTHCUINTPTR)pBundle->aMem[i].pvR3 == uPtr))
2210	{
2211	supdrvOSMemGetPages(&pBundle->aMem[i], paPages);
2212	RTSpinlockRelease(pSession->Spinlock, &SpinlockTmp);
2213	return 0;
2214	}
2215	#endif
2216	}
2217	}
2218	}
2219	RTSpinlockRelease(pSession->Spinlock, &SpinlockTmp);
2220	dprintf(("Failed to find %p!!!\n", (void *)uPtr));
2221	return SUPDRV_ERR_INVALID_PARAM;
2222	}
2223
2224
2225	/**
2226	* Free memory allocated by SUPR0MemAlloc().
2227	*
2228	* @returns 0 on success.
2229	* @returns SUPDRV_ERR_* on failure.
2230	* @param pSession The session owning the allocation.
2231	* @param uPtr The Ring-0 or Ring-3 address returned by SUPR0MemAlloc().
2232	*/
2233	SUPR0DECL(int) SUPR0MemFree(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr)
2234	{
2235	dprintf(("SUPR0MemFree: pSession=%p uPtr=%p\n", pSession, (void *)uPtr));
2236	return supdrvMemRelease(pSession, uPtr, MEMREF_TYPE_MEM);
2237	}
2238
2239
2240	/**
2241	* Maps the GIP into userspace and/or get the physical address of the GIP.
2242	*
2243	* @returns 0 on success.
2244	* @returns SUPDRV_ERR_* on failure.
2245	* @param pSession Session to which the GIP mapping should belong.
2246	* @param ppGipR3 Where to store the address of the ring-3 mapping. (optional)
2247	* @param pHCPhysGip Where to store the physical address. (optional)
2248	*
2249	* @remark There is no reference counting on the mapping, so one call to this function
2250	* count globally as one reference. One call to SUPR0GipUnmap() is will unmap GIP
2251	* and remove the session as a GIP user.
2252	*/
2253	SUPR0DECL(int) SUPR0GipMap(PSUPDRVSESSION pSession, PRTR3PTR ppGipR3, PRTHCPHYS pHCPhysGid)
2254	{
2255	int rc = 0;
2256	PSUPDRVDEVEXT pDevExt = pSession->pDevExt;
2257	RTR3PTR pGip = NIL_RTR3PTR;
2258	RTHCPHYS HCPhys = NIL_RTHCPHYS;
2259	dprintf(("SUPR0GipMap: pSession=%p ppGipR3=%p pHCPhysGid=%p\n", pSession, ppGipR3, pHCPhysGid));
2260
2261	/*
2262	* Validate
2263	*/
2264	if (!ppGipR3 && !pHCPhysGid)
2265	return 0;
2266
2267	RTSemFastMutexRequest(pDevExt->mtxGip);
2268	if (pDevExt->pGip)
2269	{
2270	/*
2271	* Map it?
2272	*/
2273	if (ppGipR3)
2274	{
2275	#ifdef USE_NEW_OS_INTERFACE
2276	if (pSession->GipMapObjR3 == NIL_RTR0MEMOBJ)
2277	rc = RTR0MemObjMapUser(&pSession->GipMapObjR3, pDevExt->GipMemObj, (void*)-1, 0,
2278	RTMEM_PROT_READ, RTR0ProcHandleSelf());
2279	if (RT_SUCCESS(rc))
2280	{
2281	pGip = (RTR3PTR)RTR0MemObjAddress(pSession->GipMapObjR3);
2282	rc = VINF_SUCCESS; /** @todo remove this and replace the !rc below with RT_SUCCESS(rc). */
2283	}
2284	#else /* !USE_NEW_OS_INTERFACE */
2285	if (!pSession->pGip)
2286	rc = supdrvOSGipMap(pSession->pDevExt, &pSession->pGip);
2287	if (!rc)
2288	pGip = (RTR3PTR)pSession->pGip;
2289	#endif /* !USE_NEW_OS_INTERFACE */
2290	}
2291
2292	/*
2293	* Get physical address.
2294	*/
2295	if (pHCPhysGid && !rc)
2296	HCPhys = pDevExt->HCPhysGip;
2297
2298	/*
2299	* Reference globally.
2300	*/
2301	if (!pSession->fGipReferenced && !rc)
2302	{
2303	pSession->fGipReferenced = 1;
2304	pDevExt->cGipUsers++;
2305	if (pDevExt->cGipUsers == 1)
2306	{
2307	PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
2308	unsigned i;
2309
2310	dprintf(("SUPR0GipMap: Resumes GIP updating\n"));
2311
2312	for (i = 0; i < RT_ELEMENTS(pGip->aCPUs); i++)
2313	ASMAtomicXchgU32(&pGip->aCPUs[i].u32TransactionId, pGip->aCPUs[i].u32TransactionId & ~(GIP_UPDATEHZ_RECALC_FREQ * 2 - 1));
2314	ASMAtomicXchgU64(&pGip->u64NanoTSLastUpdateHz, 0);
2315
2316	#ifdef USE_NEW_OS_INTERFACE
2317	rc = RTTimerStart(pDevExt->pGipTimer, 0);
2318	AssertRC(rc); rc = 0;
2319	#else
2320	supdrvOSGipResume(pDevExt);
2321	#endif
2322	}
2323	}
2324	}
2325	else
2326	{
2327	rc = SUPDRV_ERR_GENERAL_FAILURE;
2328	dprintf(("SUPR0GipMap: GIP is not available!\n"));
2329	}
2330	RTSemFastMutexRelease(pDevExt->mtxGip);
2331
2332	/*
2333	* Write returns.
2334	*/
2335	if (pHCPhysGid)
2336	*pHCPhysGid = HCPhys;
2337	if (ppGipR3)
2338	*ppGipR3 = pGip;
2339
2340	dprintf(("SUPR0GipMap: returns %d pHCPhysGid=%lx ppGipR3=%p\n", rc, (unsigned long)HCPhys, (void *)(uintptr_t)pGip));
2341	return rc;
2342	}
2343
2344
2345	/**
2346	* Unmaps any user mapping of the GIP and terminates all GIP access
2347	* from this session.
2348	*
2349	* @returns 0 on success.
2350	* @returns SUPDRV_ERR_* on failure.
2351	* @param pSession Session to which the GIP mapping should belong.
2352	*/
2353	SUPR0DECL(int) SUPR0GipUnmap(PSUPDRVSESSION pSession)
2354	{
2355	int rc = 0;
2356	PSUPDRVDEVEXT pDevExt = pSession->pDevExt;
2357	dprintf(("SUPR0GipUnmap: pSession=%p\n", pSession));
2358
2359	RTSemFastMutexRequest(pDevExt->mtxGip);
2360
2361	/*
2362	* Unmap anything?
2363	*/
2364	#ifdef USE_NEW_OS_INTERFACE
2365	if (pSession->GipMapObjR3 != NIL_RTR0MEMOBJ)
2366	{
2367	rc = RTR0MemObjFree(pSession->GipMapObjR3, false);
2368	AssertRC(rc);
2369	if (RT_SUCCESS(rc))
2370	pSession->GipMapObjR3 = NIL_RTR0MEMOBJ;
2371	}
2372	#else
2373	if (pSession->pGip)
2374	{
2375	rc = supdrvOSGipUnmap(pDevExt, pSession->pGip);
2376	if (!rc)
2377	pSession->pGip = NULL;
2378	}
2379	#endif
2380
2381	/*
2382	* Dereference global GIP.
2383	*/
2384	if (pSession->fGipReferenced && !rc)
2385	{
2386	pSession->fGipReferenced = 0;
2387	if ( pDevExt->cGipUsers > 0
2388	&& !--pDevExt->cGipUsers)
2389	{
2390	dprintf(("SUPR0GipUnmap: Suspends GIP updating\n"));
2391	#ifdef USE_NEW_OS_INTERFACE
2392	rc = RTTimerStop(pDevExt->pGipTimer); AssertRC(rc); rc = 0;
2393	#else
2394	supdrvOSGipSuspend(pDevExt);
2395	#endif
2396	}
2397	}
2398
2399	RTSemFastMutexRelease(pDevExt->mtxGip);
2400
2401	return rc;
2402	}
2403
2404
2405	/**
2406	* Adds a memory object to the session.
2407	*
2408	* @returns 0 on success.
2409	* @returns SUPDRV_ERR_* on failure.
2410	* @param pMem Memory tracking structure containing the
2411	* information to track.
2412	* @param pSession The session.
2413	*/
2414	static int supdrvMemAdd(PSUPDRVMEMREF pMem, PSUPDRVSESSION pSession)
2415	{
2416	PSUPDRVBUNDLE pBundle;
2417	RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER;
2418
2419	/*
2420	* Find free entry and record the allocation.
2421	*/
2422	RTSpinlockAcquire(pSession->Spinlock, &SpinlockTmp);
2423	for (pBundle = &pSession->Bundle; pBundle; pBundle = pBundle->pNext)
2424	{
2425	if (pBundle->cUsed < sizeof(pBundle->aMem) / sizeof(pBundle->aMem[0]))
2426	{
2427	unsigned i;
2428	for (i = 0; i < sizeof(pBundle->aMem) / sizeof(pBundle->aMem[0]); i++)
2429	{
2430	#ifdef USE_NEW_OS_INTERFACE
2431	if (pBundle->aMem[i].MemObj == NIL_RTR0MEMOBJ)
2432	#else /* !USE_NEW_OS_INTERFACE */
2433	if ( !pBundle->aMem[i].pvR0
2434	&& !pBundle->aMem[i].pvR3)
2435	#endif /* !USE_NEW_OS_INTERFACE */
2436	{
2437	pBundle->cUsed++;
2438	pBundle->aMem[i] = *pMem;
2439	RTSpinlockRelease(pSession->Spinlock, &SpinlockTmp);
2440	return 0;
2441	}
2442	}
2443	AssertFailed(); /* !!this can't be happening!!! */
2444	}
2445	}
2446	RTSpinlockRelease(pSession->Spinlock, &SpinlockTmp);
2447
2448	/*
2449	* Need to allocate a new bundle.
2450	* Insert into the last entry in the bundle.
2451	*/
2452	pBundle = (PSUPDRVBUNDLE)RTMemAllocZ(sizeof(*pBundle));
2453	if (!pBundle)
2454	return SUPDRV_ERR_NO_MEMORY;
2455
2456	/* take last entry. */
2457	pBundle->cUsed++;
2458	pBundle->aMem[sizeof(pBundle->aMem) / sizeof(pBundle->aMem[0]) - 1] = *pMem;
2459
2460	/* insert into list. */
2461	RTSpinlockAcquire(pSession->Spinlock, &SpinlockTmp);
2462	pBundle->pNext = pSession->Bundle.pNext;
2463	pSession->Bundle.pNext = pBundle;
2464	RTSpinlockRelease(pSession->Spinlock, &SpinlockTmp);
2465
2466	return 0;
2467	}
2468
2469
2470	/**
2471	* Releases a memory object referenced by pointer and type.
2472	*
2473	* @returns 0 on success.
2474	* @returns SUPDRV_ERR_INVALID_PARAM on failure.
2475	* @param pSession Session data.
2476	* @param uPtr Pointer to memory. This is matched against both the R0 and R3 addresses.
2477	* @param eType Memory type.
2478	*/
2479	static int supdrvMemRelease(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr, SUPDRVMEMREFTYPE eType)
2480	{
2481	PSUPDRVBUNDLE pBundle;
2482	RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER;
2483
2484	/*
2485	* Validate input.
2486	*/
2487	if (!pSession)
2488	{
2489	dprintf(("pSession must not be NULL!"));
2490	return SUPDRV_ERR_INVALID_PARAM;
2491	}
2492	if (!uPtr)
2493	{
2494	dprintf(("Illegal address %p\n", (void *)uPtr));
2495	return SUPDRV_ERR_INVALID_PARAM;
2496	}
2497
2498	/*
2499	* Search for the address.
2500	*/
2501	RTSpinlockAcquire(pSession->Spinlock, &SpinlockTmp);
2502	for (pBundle = &pSession->Bundle; pBundle; pBundle = pBundle->pNext)
2503	{
2504	if (pBundle->cUsed > 0)
2505	{
2506	unsigned i;
2507	for (i = 0; i < sizeof(pBundle->aMem) / sizeof(pBundle->aMem[0]); i++)
2508	{
2509	#ifdef USE_NEW_OS_INTERFACE
2510	if ( pBundle->aMem[i].eType == eType
2511	&& pBundle->aMem[i].MemObj != NIL_RTR0MEMOBJ
2512	&& ( (RTHCUINTPTR)RTR0MemObjAddress(pBundle->aMem[i].MemObj) == uPtr
2513	\|\| ( pBundle->aMem[i].MapObjR3 != NIL_RTR0MEMOBJ
2514	&& (RTHCUINTPTR)RTR0MemObjAddress(pBundle->aMem[i].MapObjR3) == uPtr))
2515	)
2516	{
2517	/* Make a copy of it and release it outside the spinlock. */
2518	SUPDRVMEMREF Mem = pBundle->aMem[i];
2519	pBundle->aMem[i].eType = MEMREF_TYPE_UNUSED;
2520	pBundle->aMem[i].MemObj = NIL_RTR0MEMOBJ;
2521	pBundle->aMem[i].MapObjR3 = NIL_RTR0MEMOBJ;
2522	RTSpinlockRelease(pSession->Spinlock, &SpinlockTmp);
2523
2524	if (Mem.MapObjR3)
2525	{
2526	int rc = RTR0MemObjFree(Mem.MapObjR3, false);
2527	AssertRC(rc); /** @todo figure out how to handle this. */
2528	}
2529	if (Mem.MemObj)
2530	{
2531	int rc = RTR0MemObjFree(Mem.MemObj, false);
2532	AssertRC(rc); /** @todo figure out how to handle this. */
2533	}
2534	return 0;
2535	}
2536	#else /* !USE_NEW_OS_INTERFACE */
2537	if ( pBundle->aMem[i].eType == eType
2538	&& ( (RTHCUINTPTR)pBundle->aMem[i].pvR0 == uPtr
2539	\|\| (RTHCUINTPTR)pBundle->aMem[i].pvR3 == uPtr))
2540	{
2541	/* Make a copy of it and release it outside the spinlock. */
2542	SUPDRVMEMREF Mem = pBundle->aMem[i];
2543	pBundle->aMem[i].eType = MEMREF_TYPE_UNUSED;
2544	pBundle->aMem[i].pvR0 = NULL;
2545	pBundle->aMem[i].pvR3 = NIL_RTR3PTR;
2546	pBundle->aMem[i].cb = 0;
2547	RTSpinlockRelease(pSession->Spinlock, &SpinlockTmp);
2548
2549	/* Type specific free operation. */
2550	switch (Mem.eType)
2551	{
2552	case MEMREF_TYPE_LOCKED:
2553	supdrvOSUnlockMemOne(&Mem);
2554	break;
2555	case MEMREF_TYPE_CONT:
2556	supdrvOSContFreeOne(&Mem);
2557	break;
2558	case MEMREF_TYPE_LOW:
2559	supdrvOSLowFreeOne(&Mem);
2560	break;
2561	case MEMREF_TYPE_MEM:
2562	supdrvOSMemFreeOne(&Mem);
2563	break;
2564	default:
2565	case MEMREF_TYPE_UNUSED:
2566	break;
2567	}
2568	return 0;
2569	}
2570	#endif /* !USE_NEW_OS_INTERFACE */
2571	}
2572	}
2573	}
2574	RTSpinlockRelease(pSession->Spinlock, &SpinlockTmp);
2575	dprintf(("Failed to find %p!!! (eType=%d)\n", (void *)uPtr, eType));
2576	return SUPDRV_ERR_INVALID_PARAM;
2577	}
2578
2579
2580	#ifndef VBOX_WITHOUT_IDT_PATCHING
2581	/**
2582	* Install IDT for the current CPU.
2583	*
2584	* @returns 0 on success.
2585	* @returns SUPDRV_ERR_NO_MEMORY or SUPDRV_ERROR_IDT_FAILED on failure.
2586	* @param pIn Input data.
2587	* @param pOut Output data.
2588	*/
2589	static int supdrvIOCtl_IdtInstall(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPIDTINSTALL_IN pIn, PSUPIDTINSTALL_OUT pOut)
2590	{
2591	PSUPDRVPATCHUSAGE pUsagePre;
2592	PSUPDRVPATCH pPatchPre;
2593	RTIDTR Idtr;
2594	PSUPDRVPATCH pPatch;
2595	RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER;
2596	dprintf(("supdrvIOCtl_IdtInstall\n"));
2597
2598	/*
2599	* Preallocate entry for this CPU cause we don't wanna do
2600	* that inside the spinlock!
2601	*/
2602	pUsagePre = (PSUPDRVPATCHUSAGE)RTMemAlloc(sizeof(*pUsagePre));
2603	if (!pUsagePre)
2604	return SUPDRV_ERR_NO_MEMORY;
2605
2606	/*
2607	* Take the spinlock and see what we need to do.
2608	*/
2609	RTSpinlockAcquireNoInts(pDevExt->Spinlock, &SpinlockTmp);
2610
2611	/* check if we already got a free patch. */
2612	if (!pDevExt->pIdtPatchesFree)
2613	{
2614	/*
2615	* Allocate a patch - outside the spinlock of course.
2616	*/
2617	RTSpinlockReleaseNoInts(pDevExt->Spinlock, &SpinlockTmp);
2618
2619	pPatchPre = (PSUPDRVPATCH)RTMemExecAlloc(sizeof(*pPatchPre));
2620	if (!pPatchPre)
2621	return SUPDRV_ERR_NO_MEMORY;
2622
2623	RTSpinlockAcquireNoInts(pDevExt->Spinlock, &SpinlockTmp);
2624	}
2625	else
2626	{
2627	pPatchPre = pDevExt->pIdtPatchesFree;
2628	pDevExt->pIdtPatchesFree = pPatchPre->pNext;
2629	}
2630
2631	/* look for matching patch entry */
2632	ASMGetIDTR(&Idtr);
2633	pPatch = pDevExt->pIdtPatches;
2634	while (pPatch && pPatch->pvIdt != (void *)Idtr.pIdt)
2635	pPatch = pPatch->pNext;
2636
2637	if (!pPatch)
2638	{
2639	/*
2640	* Create patch.
2641	*/
2642	pPatch = supdrvIdtPatchOne(pDevExt, pPatchPre);
2643	if (pPatch)
2644	pPatchPre = NULL; /* mark as used. */
2645	}
2646	else
2647	{
2648	/*
2649	* Simply increment patch usage.
2650	*/
2651	pPatch->cUsage++;
2652	}
2653
2654	if (pPatch)
2655	{
2656	/*
2657	* Increment and add if need be the session usage record for this patch.
2658	*/
2659	PSUPDRVPATCHUSAGE pUsage = pSession->pPatchUsage;
2660	while (pUsage && pUsage->pPatch != pPatch)
2661	pUsage = pUsage->pNext;
2662
2663	if (!pUsage)
2664	{
2665	/*
2666	* Add usage record.
2667	*/
2668	pUsagePre->cUsage = 1;
2669	pUsagePre->pPatch = pPatch;
2670	pUsagePre->pNext = pSession->pPatchUsage;
2671	pSession->pPatchUsage = pUsagePre;
2672	pUsagePre = NULL; /* mark as used. */
2673	}
2674	else
2675	{
2676	/*
2677	* Increment usage count.
2678	*/
2679	pUsage->cUsage++;
2680	}
2681	}
2682
2683	/* free patch - we accumulate them for paranoid saftly reasons. */
2684	if (pPatchPre)
2685	{
2686	pPatchPre->pNext = pDevExt->pIdtPatchesFree;
2687	pDevExt->pIdtPatchesFree = pPatchPre;
2688	}
2689
2690	RTSpinlockReleaseNoInts(pDevExt->Spinlock, &SpinlockTmp);
2691
2692	/*
2693	* Free unused preallocated buffers.
2694	*/
2695	if (pUsagePre)
2696	RTMemFree(pUsagePre);
2697
2698	pOut->u8Idt = pDevExt->u8Idt;
2699
2700	return pPatch ? 0 : SUPDRV_ERR_IDT_FAILED;
2701	}
2702
2703
2704	/**
2705	* This creates a IDT patch entry.
2706	* If the first patch being installed it'll also determin the IDT entry
2707	* to use.
2708	*
2709	* @returns pPatch on success.
2710	* @returns NULL on failure.
2711	* @param pDevExt Pointer to globals.
2712	* @param pPatch Patch entry to use.
2713	* This will be linked into SUPDRVDEVEXT::pIdtPatches on
2714	* successful return.
2715	* @remark Call must be owning the SUPDRVDEVEXT::Spinlock!
2716	*/
2717	static PSUPDRVPATCH supdrvIdtPatchOne(PSUPDRVDEVEXT pDevExt, PSUPDRVPATCH pPatch)
2718	{
2719	RTIDTR Idtr;
2720	PSUPDRVIDTE paIdt;
2721	dprintf(("supdrvIOCtl_IdtPatchOne: pPatch=%p\n", pPatch));
2722
2723	/*
2724	* Get IDT.
2725	*/
2726	ASMGetIDTR(&Idtr);
2727	paIdt = (PSUPDRVIDTE)Idtr.pIdt;
2728	if ((uintptr_t)paIdt < 0x80000000)
2729	{
2730	AssertMsgFailed(("bad paIdt=%p\n", paIdt));
2731	return NULL;
2732	}
2733
2734	if (!pDevExt->u8Idt)
2735	{
2736	/*
2737	* Test out the alternatives.
2738	*
2739	* At the moment we do not support chaining thus we ASSUME that one of
2740	* these 48 entries is unused (which is not a problem on Win32 and
2741	* Linux to my knowledge).
2742	*/
2743	/** @todo we MUST change this detection to try grab an entry which is NOT in use. This can be
2744	* combined with gathering info about which guest system call gates we can hook up directly. */
2745	unsigned i;
2746	uint8_t u8Idt = 0;
2747	static uint8_t au8Ints[] =
2748	{
2749	#ifdef __WIN__ /* We don't use 0xef and above because they are system stuff on linux (ef is IPI,
2750	* local apic timer, or some other frequently fireing thing). */
2751	0xef, 0xee, 0xed, 0xec,
2752	#endif
2753	0xeb, 0xea, 0xe9, 0xe8,
2754	0xdf, 0xde, 0xdd, 0xdc,
2755	0x7b, 0x7a, 0x79, 0x78,
2756	0xbf, 0xbe, 0xbd, 0xbc,
2757	};
2758	#if defined(__AMD64__) && defined(DEBUG)
2759	static int s_iWobble = 0;
2760	unsigned iMax = !(s_iWobble++ % 2) ? 0x80 : 0x100;
2761	dprintf(("IDT: Idtr=%p:%#x\n", (void *)Idtr.pIdt, (unsigned)Idtr.cbIdt));
2762	for (i = iMax - 0x80; i*16+15 < Idtr.cbIdt && i < iMax; i++)
2763	{
2764	dprintf(("%#x: %04x:%08x%04x%04x P=%d DPL=%d IST=%d Type1=%#x u32Reserved=%#x u5Reserved=%#x\n",
2765	i, paIdt[i].u16SegSel, paIdt[i].u32OffsetTop, paIdt[i].u16OffsetHigh, paIdt[i].u16OffsetLow,
2766	paIdt[i].u1Present, paIdt[i].u2DPL, paIdt[i].u3IST, paIdt[i].u5Type2,
2767	paIdt[i].u32Reserved, paIdt[i].u5Reserved));
2768	}
2769	#endif
2770	/* look for entries which are not present or otherwise unused. */
2771	for (i = 0; i < sizeof(au8Ints) / sizeof(au8Ints[0]); i++)
2772	{
2773	u8Idt = au8Ints[i];
2774	if ( u8Idt * sizeof(SUPDRVIDTE) < Idtr.cbIdt
2775	&& ( !paIdt[u8Idt].u1Present
2776	\|\| paIdt[u8Idt].u5Type2 == 0))
2777	break;
2778	u8Idt = 0;
2779	}
2780	if (!u8Idt)
2781	{
2782	/* try again, look for a compatible entry .*/
2783	for (i = 0; i < sizeof(au8Ints) / sizeof(au8Ints[0]); i++)
2784	{
2785	u8Idt = au8Ints[i];
2786	if ( u8Idt * sizeof(SUPDRVIDTE) < Idtr.cbIdt
2787	&& paIdt[u8Idt].u1Present
2788	&& paIdt[u8Idt].u5Type2 == SUPDRV_IDTE_TYPE2_INTERRUPT_GATE
2789	&& !(paIdt[u8Idt].u16SegSel & 3))
2790	break;
2791	u8Idt = 0;
2792	}
2793	if (!u8Idt)
2794	{
2795	dprintf(("Failed to find appropirate IDT entry!!\n"));
2796	return NULL;
2797	}
2798	}
2799	pDevExt->u8Idt = u8Idt;
2800	dprintf(("supdrvIOCtl_IdtPatchOne: u8Idt=%x\n", u8Idt));
2801	}
2802
2803	/*
2804	* Prepare the patch
2805	*/
2806	memset(pPatch, 0, sizeof(*pPatch));
2807	pPatch->pvIdt = paIdt;
2808	pPatch->cUsage = 1;
2809	pPatch->pIdtEntry = &paIdt[pDevExt->u8Idt];
2810	pPatch->SavedIdt = paIdt[pDevExt->u8Idt];
2811	pPatch->ChangedIdt.u16OffsetLow = (uint32_t)((uintptr_t)&pPatch->auCode[0] & 0xffff);
2812	pPatch->ChangedIdt.u16OffsetHigh = (uint32_t)((uintptr_t)&pPatch->auCode[0] >> 16);
2813	#ifdef __AMD64__
2814	pPatch->ChangedIdt.u32OffsetTop = (uint32_t)((uintptr_t)&pPatch->auCode[0] >> 32);
2815	#endif
2816	pPatch->ChangedIdt.u16SegSel = ASMGetCS();
2817	#ifdef __AMD64__
2818	pPatch->ChangedIdt.u3IST = 0;
2819	pPatch->ChangedIdt.u5Reserved = 0;
2820	#else /* x86 */
2821	pPatch->ChangedIdt.u5Reserved = 0;
2822	pPatch->ChangedIdt.u3Type1 = 0;
2823	#endif /* x86 */
2824	pPatch->ChangedIdt.u5Type2 = SUPDRV_IDTE_TYPE2_INTERRUPT_GATE;
2825	pPatch->ChangedIdt.u2DPL = 3;
2826	pPatch->ChangedIdt.u1Present = 1;
2827
2828	/*
2829	* Generate the patch code.
2830	*/
2831	{
2832	#ifdef __AMD64__
2833	union
2834	{
2835	uint8_t *pb;
2836	uint32_t *pu32;
2837	uint64_t *pu64;
2838	} u, uFixJmp, uFixCall, uNotNested;
2839	u.pb = &pPatch->auCode[0];
2840
2841	/* check the cookie */
2842	*u.pb++ = 0x3d; // cmp eax, GLOBALCOOKIE
2843	*u.pu32++ = pDevExt->u32Cookie;
2844
2845	*u.pb++ = 0x74; // jz @VBoxCall
2846	*u.pb++ = 2;
2847
2848	/* jump to forwarder code. */
2849	*u.pb++ = 0xeb;
2850	uFixJmp = u;
2851	*u.pb++ = 0xfe;
2852
2853	// @VBoxCall:
2854	*u.pb++ = 0x0f; // swapgs
2855	*u.pb++ = 0x01;
2856	*u.pb++ = 0xf8;
2857
2858	/*
2859	* Call VMMR0Entry
2860	* We don't have to push the arguments here, but we have top
2861	* reserve some stack space for the interrupt forwarding.
2862	*/
2863	# ifdef __WIN__
2864	*u.pb++ = 0x50; // push rax ; alignment filler.
2865	*u.pb++ = 0x41; // push r8 ; uArg
2866	*u.pb++ = 0x50;
2867	*u.pb++ = 0x52; // push rdx ; uOperation
2868	*u.pb++ = 0x51; // push rcx ; pVM
2869	# else
2870	*u.pb++ = 0x51; // push rcx ; alignment filler.
2871	*u.pb++ = 0x52; // push rdx ; uArg
2872	*u.pb++ = 0x56; // push rsi ; uOperation
2873	*u.pb++ = 0x57; // push rdi ; pVM
2874	# endif
2875
2876	*u.pb++ = 0xff; // call qword [pfnVMMR0Entry wrt rip]
2877	*u.pb++ = 0x15;
2878	uFixCall = u;
2879	*u.pu32++ = 0;
2880
2881	*u.pb++ = 0x48; // add rsp, 20h ; remove call frame.
2882	*u.pb++ = 0x81;
2883	*u.pb++ = 0xc4;
2884	*u.pu32++ = 0x20;
2885
2886	*u.pb++ = 0x0f; // swapgs
2887	*u.pb++ = 0x01;
2888	*u.pb++ = 0xf8;
2889
2890	/* Return to R3. */
2891	uNotNested = u;
2892	*u.pb++ = 0x48; // iretq
2893	*u.pb++ = 0xcf;
2894
2895	while ((uintptr_t)u.pb & 0x7) // align 8
2896	*u.pb++ = 0xcc;
2897
2898	/* Pointer to the VMMR0Entry. */ // pfnVMMR0Entry dq StubVMMR0Entry
2899	*uFixCall.pu32 = (uint32_t)(u.pb - uFixCall.pb - 4); uFixCall.pb = NULL;
2900	pPatch->offVMMR0EntryFixup = (uint16_t)(u.pb - &pPatch->auCode[0]);
2901	*u.pu64++ = pDevExt->pvVMMR0 ? (uint64_t)pDevExt->pfnVMMR0Entry : (uint64_t)u.pb + 8;
2902
2903	/* stub entry. */ // StubVMMR0Entry:
2904	pPatch->offStub = (uint16_t)(u.pb - &pPatch->auCode[0]);
2905	*u.pb++ = 0x33; // xor eax, eax
2906	*u.pb++ = 0xc0;
2907
2908	*u.pb++ = 0x48; // dec rax
2909	*u.pb++ = 0xff;
2910	*u.pb++ = 0xc8;
2911
2912	*u.pb++ = 0xc3; // ret
2913
2914	/* forward to the original handler using a retf. */
2915	*uFixJmp.pb = (uint8_t)(u.pb - uFixJmp.pb - 1); uFixJmp.pb = NULL;
2916
2917	*u.pb++ = 0x68; // push <target cs>
2918	*u.pu32++ = !pPatch->SavedIdt.u5Type2 ? ASMGetCS() : pPatch->SavedIdt.u16SegSel;
2919
2920	*u.pb++ = 0x68; // push <low target rip>
2921	*u.pu32++ = !pPatch->SavedIdt.u5Type2
2922	? (uint32_t)(uintptr_t)uNotNested.pb
2923	: (uint32_t)pPatch->SavedIdt.u16OffsetLow
2924	\| (uint32_t)pPatch->SavedIdt.u16OffsetHigh << 16;
2925
2926	*u.pb++ = 0xc7; // mov dword [rsp + 4], <high target rip>
2927	*u.pb++ = 0x44;
2928	*u.pb++ = 0x24;
2929	*u.pb++ = 0x04;
2930	*u.pu32++ = !pPatch->SavedIdt.u5Type2
2931	? (uint32_t)((uint64_t)uNotNested.pb >> 32)
2932	: pPatch->SavedIdt.u32OffsetTop;
2933
2934	*u.pb++ = 0x48; // retf ; does this require prefix?
2935	*u.pb++ = 0xcb;
2936
2937	#else /* __X86__ */
2938
2939	union
2940	{
2941	uint8_t *pb;
2942	uint16_t *pu16;
2943	uint32_t *pu32;
2944	} u, uFixJmpNotNested, uFixJmp, uFixCall, uNotNested;
2945	u.pb = &pPatch->auCode[0];
2946
2947	/* check the cookie */
2948	*u.pb++ = 0x81; // cmp esi, GLOBALCOOKIE
2949	*u.pb++ = 0xfe;
2950	*u.pu32++ = pDevExt->u32Cookie;
2951
2952	*u.pb++ = 0x74; // jz VBoxCall
2953	uFixJmp = u;
2954	*u.pb++ = 0;
2955
2956	/* jump (far) to the original handler / not-nested-stub. */
2957	*u.pb++ = 0xea; // jmp far NotNested
2958	uFixJmpNotNested = u;
2959	*u.pu32++ = 0;
2960	*u.pu16++ = 0;
2961
2962	/* save selector registers. */ // VBoxCall:
2963	*uFixJmp.pb = (uint8_t)(u.pb - uFixJmp.pb - 1);
2964	*u.pb++ = 0x0f; // push fs
2965	*u.pb++ = 0xa0;
2966
2967	*u.pb++ = 0x1e; // push ds
2968
2969	*u.pb++ = 0x06; // push es
2970
2971	/* call frame */
2972	*u.pb++ = 0x51; // push ecx
2973
2974	*u.pb++ = 0x52; // push edx
2975
2976	*u.pb++ = 0x50; // push eax
2977
2978	/* load ds, es and perhaps fs before call. */
2979	*u.pb++ = 0xb8; // mov eax, KernelDS
2980	*u.pu32++ = ASMGetDS();
2981
2982	*u.pb++ = 0x8e; // mov ds, eax
2983	*u.pb++ = 0xd8;
2984
2985	*u.pb++ = 0x8e; // mov es, eax
2986	*u.pb++ = 0xc0;
2987
2988	#ifdef __WIN__
2989	*u.pb++ = 0xb8; // mov eax, KernelFS
2990	*u.pu32++ = ASMGetFS();
2991
2992	*u.pb++ = 0x8e; // mov fs, eax
2993	*u.pb++ = 0xe0;
2994	#endif
2995
2996	/* do the call. */
2997	*u.pb++ = 0xe8; // call _VMMR0Entry / StubVMMR0Entry
2998	uFixCall = u;
2999	pPatch->offVMMR0EntryFixup = (uint16_t)(u.pb - &pPatch->auCode[0]);
3000	*u.pu32++ = 0xfffffffb;
3001
3002	*u.pb++ = 0x83; // add esp, 0ch ; cdecl
3003	*u.pb++ = 0xc4;
3004	*u.pb++ = 0x0c;
3005
3006	/* restore selector registers. */
3007	*u.pb++ = 0x07; // pop es
3008	//
3009	*u.pb++ = 0x1f; // pop ds
3010
3011	*u.pb++ = 0x0f; // pop fs
3012	*u.pb++ = 0xa1;
3013
3014	uNotNested = u; // NotNested:
3015	*u.pb++ = 0xcf; // iretd
3016
3017	/* the stub VMMR0Entry. */ // StubVMMR0Entry:
3018	pPatch->offStub = (uint16_t)(u.pb - &pPatch->auCode[0]);
3019	*u.pb++ = 0x33; // xor eax, eax
3020	*u.pb++ = 0xc0;
3021
3022	*u.pb++ = 0x48; // dec eax
3023
3024	*u.pb++ = 0xc3; // ret
3025
3026	/* Fixup the VMMR0Entry call. */
3027	if (pDevExt->pvVMMR0)
3028	*uFixCall.pu32 = (uint32_t)pDevExt->pfnVMMR0Entry - (uint32_t)(uFixCall.pu32 + 1);
3029	else
3030	*uFixCall.pu32 = (uint32_t)&pPatch->auCode[pPatch->offStub] - (uint32_t)(uFixCall.pu32 + 1);
3031
3032	/* Fixup the forward / nested far jump. */
3033	if (!pPatch->SavedIdt.u5Type2)
3034	{
3035	*uFixJmpNotNested.pu32++ = (uint32_t)uNotNested.pb;
3036	*uFixJmpNotNested.pu16++ = ASMGetCS();
3037	}
3038	else
3039	{
3040	*uFixJmpNotNested.pu32++ = ((uint32_t)pPatch->SavedIdt.u16OffsetHigh << 16) \| pPatch->SavedIdt.u16OffsetLow;
3041	*uFixJmpNotNested.pu16++ = pPatch->SavedIdt.u16SegSel;
3042	}
3043	#endif /* __X86__ */
3044	Assert(u.pb <= &pPatch->auCode[sizeof(pPatch->auCode)]);
3045	#if 0
3046	/* dump the patch code */
3047	dprintf(("patch code: %p\n", &pPatch->auCode[0]));
3048	for (uFixCall.pb = &pPatch->auCode[0]; uFixCall.pb < u.pb; uFixCall.pb++)
3049	dprintf(("0x%02x,\n", *uFixCall.pb));
3050	#endif
3051	}
3052
3053	/*
3054	* Install the patch.
3055	*/
3056	supdrvIdtWrite(pPatch->pIdtEntry, &pPatch->ChangedIdt);
3057	AssertMsg(!memcmp((void *)pPatch->pIdtEntry, &pPatch->ChangedIdt, sizeof(pPatch->ChangedIdt)), ("The stupid change code didn't work!!!!!\n"));
3058
3059	/*
3060	* Link in the patch.
3061	*/
3062	pPatch->pNext = pDevExt->pIdtPatches;
3063	pDevExt->pIdtPatches = pPatch;
3064
3065	return pPatch;
3066	}
3067
3068
3069	/**
3070	* Removes the sessions IDT references.
3071	* This will uninstall our IDT patch if we left unreferenced.
3072	*
3073	* @returns 0 indicating success.
3074	* @param pDevExt Device globals.
3075	* @param pSession Session data.
3076	*/
3077	static int supdrvIOCtl_IdtRemoveAll(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession)
3078	{
3079	PSUPDRVPATCHUSAGE pUsage;
3080	RTSPINLOCKTMP SpinlockTmp = RTSPINLOCKTMP_INITIALIZER;
3081	dprintf(("supdrvIOCtl_IdtRemoveAll: pSession=%p\n", pSession));
3082
3083	/*
3084	* Take the spinlock.
3085	*/
3086	RTSpinlockAcquireNoInts(pDevExt->Spinlock, &SpinlockTmp);
3087
3088	/*
3089	* Walk usage list.
3090	*/
3091	pUsage = pSession->pPatchUsage;
3092	while (pUsage)
3093	{
3094	if (pUsage->pPatch->cUsage <= pUsage->cUsage)
3095	supdrvIdtRemoveOne(pDevExt, pUsage->pPatch);
3096	else
3097	pUsage->pPatch->cUsage -= pUsage->cUsage;
3098
3099	/* next */
3100	pUsage = pUsage->pNext;
3101	}
3102
3103	/*
3104	* Empty the usage chain and we're done inside the spinlock.
3105	*/
3106	pUsage = pSession->pPatchUsage;
3107	pSession->pPatchUsage = NULL;
3108
3109	RTSpinlockReleaseNoInts(pDevExt->Spinlock, &SpinlockTmp);
3110
3111	/*
3112	* Free usage entries.
3113	*/
3114	while (pUsage)
3115	{
3116	void *pvToFree = pUsage;
3117	pUsage->cUsage = 0;
3118	pUsage->pPatch = NULL;
3119	pUsage = pUsage->pNext;
3120	RTMemFree(pvToFree);
3121	}
3122
3123	return 0;
3124	}
3125
3126
3127	/**
3128	* Remove one patch.
3129	*
3130	* @param pDevExt Device globals.
3131	* @param pPatch Patch entry to remove.
3132	* @remark Caller must own SUPDRVDEVEXT::Spinlock!
3133	*/
3134	static void supdrvIdtRemoveOne(PSUPDRVDEVEXT pDevExt, PSUPDRVPATCH pPatch)
3135	{
3136	dprintf(("supdrvIdtRemoveOne: pPatch=%p\n", pPatch));
3137
3138	pPatch->cUsage = 0;
3139
3140	/*
3141	* If the IDT entry was changed it have to kick around for ever!
3142	* This will be attempted freed again, perhaps next time we'll succeed :-)
3143	*/
3144	if (memcmp((void *)pPatch->pIdtEntry, &pPatch->ChangedIdt, sizeof(pPatch->ChangedIdt)))
3145	{
3146	AssertMsgFailed(("The hijacked IDT entry has CHANGED!!!\n"));
3147	return;
3148	}
3149
3150	/*
3151	* Unlink it.
3152	*/
3153	if (pDevExt->pIdtPatches != pPatch)
3154	{
3155	PSUPDRVPATCH pPatchPrev = pDevExt->pIdtPatches;
3156	while (pPatchPrev)
3157	{
3158	if (pPatchPrev->pNext == pPatch)
3159	{
3160	pPatchPrev->pNext = pPatch->pNext;
3161	break;
3162	}
3163	pPatchPrev = pPatchPrev->pNext;
3164	}
3165	Assert(!pPatchPrev);
3166	}
3167	else
3168	pDevExt->pIdtPatches = pPatch->pNext;
3169	pPatch->pNext = NULL;
3170
3171
3172	/*
3173	* Verify and restore the IDT.
3174	*/
3175	AssertMsg(!memcmp((void *)pPatch->pIdtEntry, &pPatch->ChangedIdt, sizeof(pPatch->ChangedIdt)), ("The hijacked IDT entry has CHANGED!!!\n"));
3176	supdrvIdtWrite(pPatch->pIdtEntry, &pPatch->SavedIdt);
3177	AssertMsg(!memcmp((void *)pPatch->pIdtEntry, &pPatch->SavedIdt, sizeof(pPatch->SavedIdt)), ("The hijacked IDT entry has CHANGED!!!\n"));
3178
3179	/*
3180	* Put it in the free list.
3181	* (This free list stuff is to calm my paranoia.)
3182	*/
3183	pPatch->pvIdt = NULL;
3184	pPatch->pIdtEntry = NULL;
3185
3186	pPatch->pNext = pDevExt->pIdtPatchesFree;
3187	pDevExt->pIdtPatchesFree = pPatch;
3188	}
3189
3190
3191	/**
3192	* Write to an IDT entry.
3193	*
3194	* @param pvIdtEntry Where to write.
3195	* @param pNewIDTEntry What to write.
3196	*/
3197	static void supdrvIdtWrite(volatile void pvIdtEntry, const SUPDRVIDTE pNewIDTEntry)
3198	{
3199	RTUINTREG uCR0;
3200	RTUINTREG uFlags;
3201
3202	/*
3203	* On SMP machines (P4 hyperthreading included) we must preform a
3204	* 64-bit locked write when updating the IDT entry.
3205	*
3206	* The F00F bugfix for linux (and probably other OSes) causes
3207	* the IDT to be pointing to an readonly mapping. We get around that
3208	* by temporarily turning of WP. Since we're inside a spinlock at this
3209	* point, interrupts are disabled and there isn't any way the WP bit
3210	* flipping can cause any trouble.
3211	*/
3212
3213	/* Save & Clear interrupt flag; Save & clear WP. */
3214	uFlags = ASMGetFlags();
3215	ASMSetFlags(uFlags & ~(RTUINTREG)(1 << 9)); /X86_EFL_IF/
3216	Assert(!(ASMGetFlags() & (1 << 9)));
3217	uCR0 = ASMGetCR0();
3218	ASMSetCR0(uCR0 & ~(RTUINTREG)(1 << 16)); /X86_CR0_WP/
3219
3220	/* Update IDT Entry */
3221	#ifdef __AMD64__
3222	ASMAtomicXchgU128((volatile uint128_t )pvIdtEntry, (uint128_t *)(uintptr_t)pNewIDTEntry);
3223	#else
3224	ASMAtomicXchgU64((volatile uint64_t )pvIdtEntry, (uint64_t *)(uintptr_t)pNewIDTEntry);
3225	#endif
3226
3227	/* Restore CR0 & Flags */
3228	ASMSetCR0(uCR0);
3229	ASMSetFlags(uFlags);
3230	}
3231	#endif /* !VBOX_WITHOUT_IDT_PATCHING */
3232
3233
3234	/**
3235	* Opens an image. If it's the first time it's opened the call must upload
3236	* the bits using the supdrvIOCtl_LdrLoad() / SUPDRV_IOCTL_LDR_LOAD function.
3237	*
3238	* This is the 1st step of the loading.
3239	*
3240	* @returns 0 on success.
3241	* @returns SUPDRV_ERR_* on failure.
3242	* @param pDevExt Device globals.
3243	* @param pSession Session data.
3244	* @param pIn Input.
3245	* @param pOut Output. (May overlap pIn.)
3246	*/
3247	static int supdrvIOCtl_LdrOpen(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDROPEN_IN pIn, PSUPLDROPEN_OUT pOut)
3248	{
3249	PSUPDRVLDRIMAGE pImage;
3250	unsigned cb;
3251	void *pv;
3252	dprintf(("supdrvIOCtl_LdrOpen: szName=%s cbImage=%d\n", pIn->szName, pIn->cbImage));
3253
3254	/*
3255	* Check if we got an instance of the image already.
3256	*/
3257	RTSemFastMutexRequest(pDevExt->mtxLdr);
3258	for (pImage = pDevExt->pLdrImages; pImage; pImage = pImage->pNext)
3259	{
3260	if (!strcmp(pImage->szName, pIn->szName))
3261	{
3262	pImage->cUsage++;
3263	pOut->pvImageBase = pImage->pvImage;
3264	pOut->fNeedsLoading = pImage->uState == SUP_IOCTL_LDR_OPEN;
3265	supdrvLdrAddUsage(pSession, pImage);
3266	RTSemFastMutexRelease(pDevExt->mtxLdr);
3267	return 0;
3268	}
3269	}
3270	/* (not found - add it!) */
3271
3272	/*
3273	* Allocate memory.
3274	*/
3275	cb = pIn->cbImage + sizeof(SUPDRVLDRIMAGE) + 31;
3276	pv = RTMemExecAlloc(cb);
3277	if (!pv)
3278	{
3279	RTSemFastMutexRelease(pDevExt->mtxLdr);
3280	return SUPDRV_ERR_NO_MEMORY;
3281	}
3282
3283	/*
3284	* Setup and link in the LDR stuff.
3285	*/
3286	pImage = (PSUPDRVLDRIMAGE)pv;
3287	pImage->pvImage = ALIGNP(pImage + 1, 32);
3288	pImage->cbImage = pIn->cbImage;
3289	pImage->pfnModuleInit = NULL;
3290	pImage->pfnModuleTerm = NULL;
3291	pImage->uState = SUP_IOCTL_LDR_OPEN;
3292	pImage->cUsage = 1;
3293	strcpy(pImage->szName, pIn->szName);
3294
3295	pImage->pNext = pDevExt->pLdrImages;
3296	pDevExt->pLdrImages = pImage;
3297
3298	supdrvLdrAddUsage(pSession, pImage);
3299
3300	pOut->pvImageBase = pImage->pvImage;
3301	pOut->fNeedsLoading = 1;
3302	RTSemFastMutexRelease(pDevExt->mtxLdr);
3303	return 0;
3304	}
3305
3306
3307	/**
3308	* Loads the image bits.
3309	*
3310	* This is the 2nd step of the loading.
3311	*
3312	* @returns 0 on success.
3313	* @returns SUPDRV_ERR_* on failure.
3314	* @param pDevExt Device globals.
3315	* @param pSession Session data.
3316	* @param pIn Input.
3317	*/
3318	static int supdrvIOCtl_LdrLoad(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRLOAD_IN pIn)
3319	{
3320	PSUPDRVLDRUSAGE pUsage;
3321	PSUPDRVLDRIMAGE pImage;
3322	int rc;
3323	dprintf(("supdrvIOCtl_LdrLoad: pvImageBase=%p cbImage=%d\n", pIn->pvImageBase, pIn->cbImage));
3324
3325	/*
3326	* Find the ldr image.
3327	*/
3328	RTSemFastMutexRequest(pDevExt->mtxLdr);
3329	pUsage = pSession->pLdrUsage;
3330	while (pUsage && pUsage->pImage->pvImage != pIn->pvImageBase)
3331	pUsage = pUsage->pNext;
3332	if (!pUsage)
3333	{
3334	RTSemFastMutexRelease(pDevExt->mtxLdr);
3335	dprintf(("SUP_IOCTL_LDR_LOAD: couldn't find image!\n"));
3336	return SUPDRV_ERR_INVALID_HANDLE;
3337	}
3338	pImage = pUsage->pImage;
3339	if (pImage->cbImage != pIn->cbImage)
3340	{
3341	RTSemFastMutexRelease(pDevExt->mtxLdr);
3342	dprintf(("SUP_IOCTL_LDR_LOAD: image size mismatch!! %d(prep) != %d(load)\n", pImage->cbImage, pIn->cbImage));
3343	return SUPDRV_ERR_INVALID_HANDLE;
3344	}
3345	if (pImage->uState != SUP_IOCTL_LDR_OPEN)
3346	{
3347	unsigned uState = pImage->uState;
3348	RTSemFastMutexRelease(pDevExt->mtxLdr);
3349	if (uState != SUP_IOCTL_LDR_LOAD)
3350	AssertMsgFailed(("SUP_IOCTL_LDR_LOAD: invalid image state %d (%#x)!\n", uState, uState));
3351	return SUPDRV_ERR_ALREADY_LOADED;
3352	}
3353	switch (pIn->eEPType)
3354	{
3355	case EP_NOTHING:
3356	break;
3357	case EP_VMMR0:
3358	if (!pIn->EP.VMMR0.pvVMMR0 \|\| !pIn->EP.VMMR0.pvVMMR0Entry)
3359	{
3360	RTSemFastMutexRelease(pDevExt->mtxLdr);
3361	dprintf(("pvVMMR0=%p or pIn->EP.VMMR0.pvVMMR0Entry=%p is NULL!\n",
3362	pIn->EP.VMMR0.pvVMMR0, pIn->EP.VMMR0.pvVMMR0Entry));
3363	return SUPDRV_ERR_INVALID_PARAM;
3364	}
3365	if ((uintptr_t)pIn->EP.VMMR0.pvVMMR0Entry - (uintptr_t)pImage->pvImage >= pIn->cbImage)
3366	{
3367	RTSemFastMutexRelease(pDevExt->mtxLdr);
3368	dprintf(("SUP_IOCTL_LDR_LOAD: pvVMMR0Entry=%p is outside the image (%p %d bytes)\n",
3369	pIn->EP.VMMR0.pvVMMR0Entry, pImage->pvImage, pIn->cbImage));
3370	return SUPDRV_ERR_INVALID_PARAM;
3371	}
3372	break;
3373	default:
3374	RTSemFastMutexRelease(pDevExt->mtxLdr);
3375	dprintf(("Invalid eEPType=%d\n", pIn->eEPType));
3376	return SUPDRV_ERR_INVALID_PARAM;
3377	}
3378	if ( pIn->pfnModuleInit
3379	&& (uintptr_t)pIn->pfnModuleInit - (uintptr_t)pImage->pvImage >= pIn->cbImage)
3380	{
3381	RTSemFastMutexRelease(pDevExt->mtxLdr);
3382	dprintf(("SUP_IOCTL_LDR_LOAD: pfnModuleInit=%p is outside the image (%p %d bytes)\n",
3383	pIn->pfnModuleInit, pImage->pvImage, pIn->cbImage));
3384	return SUPDRV_ERR_INVALID_PARAM;
3385	}
3386	if ( pIn->pfnModuleTerm
3387	&& (uintptr_t)pIn->pfnModuleTerm - (uintptr_t)pImage->pvImage >= pIn->cbImage)
3388	{
3389	RTSemFastMutexRelease(pDevExt->mtxLdr);
3390	dprintf(("SUP_IOCTL_LDR_LOAD: pfnModuleTerm=%p is outside the image (%p %d bytes)\n",
3391	pIn->pfnModuleTerm, pImage->pvImage, pIn->cbImage));
3392	return SUPDRV_ERR_INVALID_PARAM;
3393	}
3394
3395	/*
3396	* Copy the memory.
3397	*/
3398	/* no need to do try/except as this is a buffered request. */
3399	memcpy(pImage->pvImage, &pIn->achImage[0], pImage->cbImage);
3400	pImage->uState = SUP_IOCTL_LDR_LOAD;
3401	pImage->pfnModuleInit = pIn->pfnModuleInit;
3402	pImage->pfnModuleTerm = pIn->pfnModuleTerm;
3403	pImage->offSymbols = pIn->offSymbols;
3404	pImage->cSymbols = pIn->cSymbols;
3405	pImage->offStrTab = pIn->offStrTab;
3406	pImage->cbStrTab = pIn->cbStrTab;
3407
3408	/*
3409	* Update any entry points.
3410	*/
3411	switch (pIn->eEPType)
3412	{
3413	default:
3414	case EP_NOTHING:
3415	rc = 0;
3416	break;
3417	case EP_VMMR0:
3418	rc = supdrvLdrSetR0EP(pDevExt, pIn->EP.VMMR0.pvVMMR0, pIn->EP.VMMR0.pvVMMR0Entry);
3419	break;
3420	}
3421
3422	/*
3423	* On success call the module initialization.
3424	*/
3425	dprintf(("supdrvIOCtl_LdrLoad: pfnModuleInit=%p\n", pImage->pfnModuleInit));
3426	if (!rc && pImage->pfnModuleInit)
3427	{
3428	dprintf(("supdrvIOCtl_LdrLoad: calling pfnModuleInit=%p\n", pImage->pfnModuleInit));
3429	rc = pImage->pfnModuleInit();
3430	if (rc && pDevExt->pvVMMR0 == pImage->pvImage)
3431	supdrvLdrUnsetR0EP(pDevExt);
3432	}
3433
3434	if (rc)
3435	pImage->uState = SUP_IOCTL_LDR_OPEN;
3436
3437	RTSemFastMutexRelease(pDevExt->mtxLdr);
3438	return rc;
3439	}
3440
3441
3442	/**
3443	* Frees a previously loaded (prep'ed) image.
3444	*
3445	* @returns 0 on success.
3446	* @returns SUPDRV_ERR_* on failure.
3447	* @param pDevExt Device globals.
3448	* @param pSession Session data.
3449	* @param pIn Input.
3450	*/
3451	static int supdrvIOCtl_LdrFree(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRFREE_IN pIn)
3452	{
3453	PSUPDRVLDRUSAGE pUsagePrev;
3454	PSUPDRVLDRUSAGE pUsage;
3455	PSUPDRVLDRIMAGE pImage;
3456	dprintf(("supdrvIOCtl_LdrFree: pvImageBase=%p\n", pIn->pvImageBase));
3457
3458	/*
3459	* Find the ldr image.
3460	*/
3461	RTSemFastMutexRequest(pDevExt->mtxLdr);
3462	pUsagePrev = NULL;
3463	pUsage = pSession->pLdrUsage;
3464	while (pUsage && pUsage->pImage->pvImage != pIn->pvImageBase)
3465	{
3466	pUsagePrev = pUsage;
3467	pUsage = pUsage->pNext;
3468	}
3469	if (!pUsage)
3470	{
3471	RTSemFastMutexRelease(pDevExt->mtxLdr);
3472	dprintf(("SUP_IOCTL_LDR_FREE: couldn't find image!\n"));
3473	return SUPDRV_ERR_INVALID_HANDLE;
3474	}
3475
3476	/*
3477	* Check if we can remove anything.
3478	*/
3479	pImage = pUsage->pImage;
3480	if (pImage->cUsage <= 1 \|\| pUsage->cUsage <= 1)
3481	{
3482	/* unlink it */
3483	if (pUsagePrev)
3484	pUsagePrev->pNext = pUsage->pNext;
3485	else
3486	pSession->pLdrUsage = pUsage->pNext;
3487	/* free it */
3488	pUsage->pImage = NULL;
3489	pUsage->pNext = NULL;
3490	RTMemFree(pUsage);
3491
3492	/*
3493	* Derefrence the image.
3494	*/
3495	if (pImage->cUsage <= 1)
3496	supdrvLdrFree(pDevExt, pImage);
3497	else
3498	pImage->cUsage--;
3499	}
3500	else
3501	{
3502	/*
3503	* Dereference both image and usage.
3504	*/
3505	pImage->cUsage--;
3506	pUsage->cUsage--;
3507	}
3508
3509	RTSemFastMutexRelease(pDevExt->mtxLdr);
3510	return 0;
3511	}
3512
3513
3514	/**
3515	* Gets the address of a symbol in an open image.
3516	*
3517	* @returns 0 on success.
3518	* @returns SUPDRV_ERR_* on failure.
3519	* @param pDevExt Device globals.
3520	* @param pSession Session data.
3521	* @param pIn Input.
3522	* @param pOut Output. (May overlap pIn.)
3523	*/
3524	static int supdrvIOCtl_LdrGetSymbol(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRGETSYMBOL_IN pIn, PSUPLDRGETSYMBOL_OUT pOut)
3525	{
3526	PSUPDRVLDRIMAGE pImage;
3527	PSUPDRVLDRUSAGE pUsage;
3528	uint32_t i;
3529	PSUPLDRSYM paSyms;
3530	const char *pchStrings;
3531	const size_t cbSymbol = strlen(pIn->szSymbol) + 1;
3532	void *pvSymbol = NULL;
3533	int rc = SUPDRV_ERR_GENERAL_FAILURE; /** @todo better error code. */
3534	dprintf2(("supdrvIOCtl_LdrGetSymbol: pvImageBase=%p szSymbol=\"%s\"\n", pIn->pvImageBase, pIn->szSymbol));
3535
3536	/*
3537	* Find the ldr image.
3538	*/
3539	RTSemFastMutexRequest(pDevExt->mtxLdr);
3540	pUsage = pSession->pLdrUsage;
3541	while (pUsage && pUsage->pImage->pvImage != pIn->pvImageBase)
3542	pUsage = pUsage->pNext;
3543	if (!pUsage)
3544	{
3545	RTSemFastMutexRelease(pDevExt->mtxLdr);
3546	dprintf(("SUP_IOCTL_LDR_GET_SYMBOL: couldn't find image!\n"));
3547	return SUPDRV_ERR_INVALID_HANDLE;
3548	}
3549	pImage = pUsage->pImage;
3550	if (pImage->uState != SUP_IOCTL_LDR_LOAD)
3551	{
3552	unsigned uState = pImage->uState;
3553	RTSemFastMutexRelease(pDevExt->mtxLdr);
3554	dprintf(("SUP_IOCTL_LDR_GET_SYMBOL: invalid image state %d (%#x)!\n", uState, uState)); NOREF(uState);
3555	return SUPDRV_ERR_ALREADY_LOADED;
3556	}
3557
3558	/*
3559	* Search the symbol string.
3560	*/
3561	pchStrings = (const char )((uint8_t )pImage->pvImage + pImage->offStrTab);
3562	paSyms = (PSUPLDRSYM)((uint8_t *)pImage->pvImage + pImage->offSymbols);
3563	for (i = 0; i < pImage->cSymbols; i++)
3564	{
3565	if ( paSyms[i].offSymbol < pImage->cbImage /* paranoia */
3566	&& paSyms[i].offName + cbSymbol <= pImage->cbStrTab
3567	&& !memcmp(pchStrings + paSyms[i].offName, pIn->szSymbol, cbSymbol))
3568	{
3569	pvSymbol = (uint8_t *)pImage->pvImage + paSyms[i].offSymbol;
3570	rc = 0;
3571	break;
3572	}
3573	}
3574	RTSemFastMutexRelease(pDevExt->mtxLdr);
3575	pOut->pvSymbol = pvSymbol;
3576	return rc;
3577	}
3578
3579
3580	/**
3581	* Updates the IDT patches to point to the specified VMM R0 entry
3582	* point (i.e. VMMR0Enter()).
3583	*
3584	* @returns 0 on success.
3585	* @returns SUPDRV_ERR_* on failure.
3586	* @param pDevExt Device globals.
3587	* @param pSession Session data.
3588	* @param pVMMR0 VMMR0 image handle.
3589	* @param pVMMR0Entry VMMR0Entry address.
3590	* @remark Caller must own the loader mutex.
3591	*/
3592	static int supdrvLdrSetR0EP(PSUPDRVDEVEXT pDevExt, void pvVMMR0, void pvVMMR0Entry)
3593	{
3594	int rc;
3595	dprintf(("supdrvLdrSetR0EP pvVMMR0=%p pvVMMR0Entry=%p\n", pvVMMR0, pvVMMR0Entry));
3596
3597
3598	/*
3599	* Check if not yet set.
3600	*/
3601	rc = 0;
3602	if (!pDevExt->pvVMMR0)
3603	{
3604	#ifndef VBOX_WITHOUT_IDT_PATCHING
3605	PSUPDRVPATCH pPatch;
3606	#endif
3607
3608	/*
3609	* Set it and update IDT patch code.
3610	*/
3611	pDevExt->pvVMMR0 = pvVMMR0;
3612	pDevExt->pfnVMMR0Entry = pvVMMR0Entry;
3613	#ifndef VBOX_WITHOUT_IDT_PATCHING
3614	for (pPatch = pDevExt->pIdtPatches; pPatch; pPatch = pPatch->pNext)
3615	{
3616	# ifdef __AMD64__
3617	ASMAtomicXchgU64((volatile uint64_t *)&pPatch->auCode[pPatch->offVMMR0EntryFixup], (uint64_t)pvVMMR0);
3618	# else /* __X86__ */
3619	ASMAtomicXchgU32((volatile uint32_t *)&pPatch->auCode[pPatch->offVMMR0EntryFixup],
3620	(uint32_t)pvVMMR0 - (uint32_t)&pPatch->auCode[pPatch->offVMMR0EntryFixup + 4]);
3621	# endif
3622	}
3623	#endif /* !VBOX_WITHOUT_IDT_PATCHING */
3624	}
3625	else
3626	{
3627	/*
3628	* Return failure or success depending on whether the
3629	* values match or not.
3630	*/
3631	if ( pDevExt->pvVMMR0 != pvVMMR0
3632	\|\| (void *)pDevExt->pfnVMMR0Entry != pvVMMR0Entry)
3633	{
3634	AssertMsgFailed(("SUP_IOCTL_LDR_SETR0EP: Already set pointing to a different module!\n"));
3635	rc = SUPDRV_ERR_INVALID_PARAM;
3636	}
3637	}
3638	return rc;
3639	}
3640
3641
3642	/**
3643	* Unsets the R0 entry point installed by supdrvLdrSetR0EP.
3644	*
3645	* @param pDevExt Device globals.
3646	*/
3647	static void supdrvLdrUnsetR0EP(PSUPDRVDEVEXT pDevExt)
3648	{
3649	#ifndef VBOX_WITHOUT_IDT_PATCHING
3650	PSUPDRVPATCH pPatch;
3651	#endif
3652
3653	pDevExt->pvVMMR0 = NULL;
3654	pDevExt->pfnVMMR0Entry = NULL;
3655
3656	#ifndef VBOX_WITHOUT_IDT_PATCHING
3657	for (pPatch = pDevExt->pIdtPatches; pPatch; pPatch = pPatch->pNext)
3658	{
3659	# ifdef __AMD64__
3660	ASMAtomicXchgU64((volatile uint64_t *)&pPatch->auCode[pPatch->offVMMR0EntryFixup],
3661	(uint64_t)&pPatch->auCode[pPatch->offStub]);
3662	# else /* __X86__ */
3663	ASMAtomicXchgU32((volatile uint32_t *)&pPatch->auCode[pPatch->offVMMR0EntryFixup],
3664	(uint32_t)&pPatch->auCode[pPatch->offStub] - (uint32_t)&pPatch->auCode[pPatch->offVMMR0EntryFixup + 4]);
3665	# endif
3666	}
3667	#endif /* !VBOX_WITHOUT_IDT_PATCHING */
3668	}
3669
3670
3671	/**
3672	* Adds a usage reference in the specified session of an image.
3673	*
3674	* @param pSession Session in question.
3675	* @param pImage Image which the session is using.
3676	*/
3677	static void supdrvLdrAddUsage(PSUPDRVSESSION pSession, PSUPDRVLDRIMAGE pImage)
3678	{
3679	PSUPDRVLDRUSAGE pUsage;
3680	dprintf(("supdrvLdrAddUsage: pImage=%p\n", pImage));
3681
3682	/*
3683	* Referenced it already?
3684	*/
3685	pUsage = pSession->pLdrUsage;
3686	while (pUsage)
3687	{
3688	if (pUsage->pImage == pImage)
3689	{
3690	pUsage->cUsage++;
3691	return;
3692	}
3693	pUsage = pUsage->pNext;
3694	}
3695
3696	/*
3697	* Allocate new usage record.
3698	*/
3699	pUsage = (PSUPDRVLDRUSAGE)RTMemAlloc(sizeof(*pUsage));
3700	Assert(pUsage);
3701	if (pUsage)
3702	{
3703	pUsage->cUsage = 1;
3704	pUsage->pImage = pImage;
3705	pUsage->pNext = pSession->pLdrUsage;
3706	pSession->pLdrUsage = pUsage;
3707	}
3708	/* ignore errors... */
3709	}
3710
3711
3712	/**
3713	* Frees a load image.
3714	*
3715	* @param pDevExt Pointer to device extension.
3716	* @param pImage Pointer to the image we're gonna free.
3717	* This image must exit!
3718	* @remark The caller MUST own SUPDRVDEVEXT::mtxLdr!
3719	*/
3720	static void supdrvLdrFree(PSUPDRVDEVEXT pDevExt, PSUPDRVLDRIMAGE pImage)
3721	{
3722	PSUPDRVLDRIMAGE pImagePrev;
3723	dprintf(("supdrvLdrFree: pImage=%p\n", pImage));
3724
3725	/* find it - arg. should've used doubly linked list. */
3726	Assert(pDevExt->pLdrImages);
3727	pImagePrev = NULL;
3728	if (pDevExt->pLdrImages != pImage)
3729	{
3730	pImagePrev = pDevExt->pLdrImages;
3731	while (pImagePrev->pNext != pImage)
3732	pImagePrev = pImagePrev->pNext;
3733	Assert(pImagePrev->pNext == pImage);
3734	}
3735
3736	/* unlink */
3737	if (pImagePrev)
3738	pImagePrev->pNext = pImage->pNext;
3739	else
3740	pDevExt->pLdrImages = pImage->pNext;
3741
3742	/* check if this is VMMR0.r0 and fix the Idt patches if it is. */
3743	if (pDevExt->pvVMMR0 == pImage->pvImage)
3744	supdrvLdrUnsetR0EP(pDevExt);
3745
3746	/* call termination function if fully loaded. */
3747	if ( pImage->pfnModuleTerm
3748	&& pImage->uState == SUP_IOCTL_LDR_LOAD)
3749	{
3750	dprintf(("supdrvIOCtl_LdrLoad: calling pfnModuleTerm=%p\n", pImage->pfnModuleTerm));
3751	pImage->pfnModuleTerm();
3752	}
3753
3754	/* free the image */
3755	pImage->cUsage = 0;
3756	pImage->pNext = 0;
3757	pImage->uState = SUP_IOCTL_LDR_FREE;
3758	RTMemExecFree(pImage);
3759	}
3760
3761
3762	/**
3763	* Gets the current paging mode of the CPU and stores in in pOut.
3764	*/
3765	static int supdrvIOCtl_GetPagingMode(PSUPGETPAGINGMODE_OUT pOut)
3766	{
3767	RTUINTREG cr0 = ASMGetCR0();
3768	if ((cr0 & (X86_CR0_PG \| X86_CR0_PE)) != (X86_CR0_PG \| X86_CR0_PE))
3769	pOut->enmMode = SUPPAGINGMODE_INVALID;
3770	else
3771	{
3772	RTUINTREG cr4 = ASMGetCR4();
3773	uint32_t fNXEPlusLMA = 0;
3774	if (cr4 & X86_CR4_PAE)
3775	{
3776	uint32_t fAmdFeatures = ASMCpuId_EDX(0x80000001);
3777	if (fAmdFeatures & (X86_CPUID_AMD_FEATURE_EDX_NX \| X86_CPUID_AMD_FEATURE_EDX_LONG_MODE))
3778	{
3779	uint64_t efer = ASMRdMsr(MSR_K6_EFER);
3780	if ((fAmdFeatures & X86_CPUID_AMD_FEATURE_EDX_NX) && (efer & MSR_K6_EFER_NXE))
3781	fNXEPlusLMA \|= BIT(0);
3782	if ((fAmdFeatures & X86_CPUID_AMD_FEATURE_EDX_LONG_MODE) && (efer & MSR_K6_EFER_LMA))
3783	fNXEPlusLMA \|= BIT(1);
3784	}
3785	}
3786
3787	switch ((cr4 & (X86_CR4_PAE \| X86_CR4_PGE)) \| fNXEPlusLMA)
3788	{
3789	case 0:
3790	pOut->enmMode = SUPPAGINGMODE_32_BIT;
3791	break;
3792
3793	case X86_CR4_PGE:
3794	pOut->enmMode = SUPPAGINGMODE_32_BIT_GLOBAL;
3795	break;
3796
3797	case X86_CR4_PAE:
3798	pOut->enmMode = SUPPAGINGMODE_PAE;
3799	break;
3800
3801	case X86_CR4_PAE \| BIT(0):
3802	pOut->enmMode = SUPPAGINGMODE_PAE_NX;
3803	break;
3804
3805	case X86_CR4_PAE \| X86_CR4_PGE:
3806	pOut->enmMode = SUPPAGINGMODE_PAE_GLOBAL;
3807	break;
3808
3809	case X86_CR4_PAE \| X86_CR4_PGE \| BIT(0):
3810	pOut->enmMode = SUPPAGINGMODE_PAE_GLOBAL;
3811	break;
3812
3813	case BIT(1) \| X86_CR4_PAE:
3814	pOut->enmMode = SUPPAGINGMODE_AMD64;
3815	break;
3816
3817	case BIT(1) \| X86_CR4_PAE \| BIT(0):
3818	pOut->enmMode = SUPPAGINGMODE_AMD64_NX;
3819	break;
3820
3821	case BIT(1) \| X86_CR4_PAE \| X86_CR4_PGE:
3822	pOut->enmMode = SUPPAGINGMODE_AMD64_GLOBAL;
3823	break;
3824
3825	case BIT(1) \| X86_CR4_PAE \| X86_CR4_PGE \| BIT(0):
3826	pOut->enmMode = SUPPAGINGMODE_AMD64_GLOBAL_NX;
3827	break;
3828
3829	default:
3830	AssertMsgFailed(("Cannot happen! cr4=%#x fNXEPlusLMA=%d\n", cr4, fNXEPlusLMA));
3831	pOut->enmMode = SUPPAGINGMODE_INVALID;
3832	break;
3833	}
3834	}
3835	return 0;
3836	}
3837
3838
3839	#if !defined(SUPDRV_OS_HAVE_LOW) && !defined(USE_NEW_OS_INTERFACE) /* Use same backend as the contiguous stuff */
3840	/**
3841	* OS Specific code for allocating page aligned memory with fixed
3842	* physical backing below 4GB.
3843	*
3844	* @returns 0 on success.
3845	* @returns SUPDRV_ERR_* on failure.
3846	* @param pMem Memory reference record of the memory to be allocated.
3847	* (This is not linked in anywhere.)
3848	* @param ppvR3 Where to store the Ring-0 mapping of the allocated memory.
3849	* @param ppvR3 Where to store the Ring-3 mapping of the allocated memory.
3850	* @param paPagesOut Where to store the physical addresss.
3851	*/
3852	int VBOXCALL supdrvOSLowAllocOne(PSUPDRVMEMREF pMem, PRTR0PTR ppvR0, PRTR3PTR ppvR3, PSUPPAGE paPagesOut)
3853	{
3854	RTHCPHYS HCPhys;
3855	int rc = supdrvOSContAllocOne(pMem, ppvR0, ppvR3, &HCPhys);
3856	if (!rc)
3857	{
3858	unsigned iPage = pMem->cb >> PAGE_SHIFT;
3859	while (iPage-- > 0)
3860	{
3861	paPagesOut[iPage].Phys = HCPhys + (iPage << PAGE_SHIFT);
3862	paPagesOut[iPage].uReserved = 0;
3863	}
3864	}
3865	return rc;
3866	}
3867
3868
3869	/**
3870	* Frees low memory.
3871	*
3872	* @param pMem Memory reference record of the memory to be freed.
3873	*/
3874	void VBOXCALL supdrvOSLowFreeOne(PSUPDRVMEMREF pMem)
3875	{
3876	supdrvOSContFreeOne(pMem);
3877	}
3878	#endif /* !SUPDRV_OS_HAVE_LOW */
3879
3880
3881	#ifdef USE_NEW_OS_INTERFACE
3882	/**
3883	* Creates the GIP.
3884	*
3885	* @returns negative errno.
3886	* @param pDevExt Instance data. GIP stuff may be updated.
3887	*/
3888	static int supdrvGipCreate(PSUPDRVDEVEXT pDevExt)
3889	{
3890	PSUPGLOBALINFOPAGE pGip;
3891	RTHCPHYS HCPhysGip;
3892	uint32_t u32SystemResolution;
3893	uint32_t u32Interval;
3894	int rc;
3895
3896	dprintf(("supdrvGipCreate:\n"));
3897
3898	/* assert order */
3899	Assert(pDevExt->u32SystemTimerGranularityGrant == 0);
3900	Assert(pDevExt->GipMemObj == NIL_RTR0MEMOBJ);
3901	Assert(!pDevExt->pGipTimer);
3902
3903	/*
3904	* Allocate a suitable page with a default kernel mapping.
3905	*/
3906	rc = RTR0MemObjAllocLow(&pDevExt->GipMemObj, PAGE_SIZE, false);
3907	if (RT_FAILURE(rc))
3908	{
3909	OSDBGPRINT(("supdrvGipCreate: failed to allocate the GIP page. rc=%d\n", rc));
3910	return rc;
3911	}
3912	pGip = (PSUPGLOBALINFOPAGE)RTR0MemObjAddress(pDevExt->GipMemObj); AssertPtr(pGip);
3913	HCPhysGip = RTR0MemObjGetPagePhysAddr(pDevExt->GipMemObj, 0); Assert(HCPhysGip != NIL_RTHCPHYS);
3914
3915	/*
3916	* Try bump up the system timer resolution.
3917	* The more interrupts the better...
3918	*/
3919	if ( RT_SUCCESS(RTTimerRequestSystemGranularity( 976563 /* 1024 HZ */, &u32SystemResolution))
3920	\|\| RT_SUCCESS(RTTimerRequestSystemGranularity( 1000000 /* 1000 HZ */, &u32SystemResolution))
3921	\|\| RT_SUCCESS(RTTimerRequestSystemGranularity( 3906250 /* 256 HZ */, &u32SystemResolution))
3922	\|\| RT_SUCCESS(RTTimerRequestSystemGranularity( 4000000 /* 250 HZ */, &u32SystemResolution))
3923	\|\| RT_SUCCESS(RTTimerRequestSystemGranularity( 7812500 /* 128 HZ */, &u32SystemResolution))
3924	\|\| RT_SUCCESS(RTTimerRequestSystemGranularity(10000000 /* 100 HZ */, &u32SystemResolution))
3925	\|\| RT_SUCCESS(RTTimerRequestSystemGranularity(15625000 /* 64 HZ */, &u32SystemResolution))
3926	\|\| RT_SUCCESS(RTTimerRequestSystemGranularity(31250000 /* 32 HZ */, &u32SystemResolution))
3927	)
3928	{
3929	Assert(RTTimerGetSystemGranularity() <= u32SystemResolution);
3930	pDevExt->u32SystemTimerGranularityGrant = u32SystemResolution;
3931	}
3932
3933	/*
3934	* Find a reasonable update interval, something close to 10ms would be nice,
3935	* and create a recurring timer.
3936	*/
3937	u32Interval = u32SystemResolution = RTTimerGetSystemGranularity();
3938	while (u32Interval < 10000000 /* 10 ms */)
3939	u32Interval += u32SystemResolution;
3940
3941	rc = RTTimerCreateEx(&pDevExt->pGipTimer, u32Interval, 0, supdrvGipTimer, pDevExt);
3942	if (RT_FAILURE(rc))
3943	{
3944	OSDBGPRINT(("supdrvGipCreate: failed create GIP timer at %RU32 ns interval. rc=%d\n", u32Interval, rc));
3945	Assert(!pDevExt->pGipTimer);
3946	supdrvGipDestroy(pDevExt);
3947	return rc;
3948	}
3949
3950	/*
3951	* We're good.
3952	*/
3953	supdrvGipInit(pDevExt, pGip, HCPhysGip, RTTimeSystemNanoTS(), 1000000000 / u32Interval /=Hz/);
3954	return 0;
3955	}
3956
3957
3958	/**
3959	* Terminates the GIP.
3960	*
3961	* @returns negative errno.
3962	* @param pDevExt Instance data. GIP stuff may be updated.
3963	*/
3964	static int supdrvGipDestroy(PSUPDRVDEVEXT pDevExt)
3965	{
3966	int rc;
3967
3968	/*
3969	* Invalid the GIP data.
3970	*/
3971	if (pDevExt->pGip)
3972	{
3973	supdrvGipTerm(pDevExt->pGip);
3974	pDevExt->pGip = 0;
3975	}
3976
3977	/*
3978	* Destroy the timer and free the GIP memory object.
3979	*/
3980	if (pDevExt->pGipTimer)
3981	{
3982	rc = RTTimerDestroy(pDevExt->pGipTimer); AssertRC(rc);
3983	pDevExt->pGipTimer = NULL;
3984	}
3985
3986	if (pDevExt->GipMemObj != NIL_RTR0MEMOBJ)
3987	{
3988	rc = RTR0MemObjFree(pDevExt->GipMemObj, true /* free mappings */); AssertRC(rc);
3989	pDevExt->GipMemObj = NIL_RTR0MEMOBJ;
3990	}
3991
3992	/*
3993	* Finally, release the system timer resolution request if one succeeded.
3994	*/
3995	if (pDevExt->u32SystemTimerGranularityGrant)
3996	{
3997	rc = RTTimerReleaseSystemGranularity(pDevExt->u32SystemTimerGranularityGrant); AssertRC(rc);
3998	pDevExt->u32SystemTimerGranularityGrant = 0;
3999	}
4000
4001	return 0;
4002	}
4003
4004
4005	/**
4006	* Timer callback function.
4007	* @param pTimer The timer.
4008	* @param pvUser The device extension.
4009	*/
4010	static DECLCALLBACK(void) supdrvGipTimer(PRTTIMER pTimer, void *pvUser)
4011	{
4012	PSUPDRVDEVEXT pDevExt = (PSUPDRVDEVEXT)pvUser;
4013	supdrvGipUpdate(pDevExt->pGip, RTTimeSystemNanoTS());
4014	}
4015	#endif /* USE_NEW_OS_INTERFACE */
4016
4017
4018	/**
4019	* Initializes the GIP data.
4020	*
4021	* @returns VBox status code.
4022	* @param pDevExt Pointer to the device instance data.
4023	* @param pGip Pointer to the read-write kernel mapping of the GIP.
4024	* @param HCPhys The physical address of the GIP.
4025	* @param u64NanoTS The current nanosecond timestamp.
4026	* @param uUpdateHz The update freqence.
4027	*/
4028	int VBOXCALL supdrvGipInit(PSUPDRVDEVEXT pDevExt, PSUPGLOBALINFOPAGE pGip, RTHCPHYS HCPhys, uint64_t u64NanoTS, unsigned uUpdateHz)
4029	{
4030	unsigned i;
4031	dprintf(("supdrvGipInit: pGip=%p HCPhys=%lx u64NanoTS=%llu uUpdateHz=%d\n", pGip, (long)HCPhys, u64NanoTS, uUpdateHz));
4032
4033	/*
4034	* Initialize the structure.
4035	*/
4036	memset(pGip, 0, PAGE_SIZE);
4037	pGip->u32Magic = SUPGLOBALINFOPAGE_MAGIC;
4038	pGip->u32Version = SUPGLOBALINFOPAGE_VERSION;
4039	pGip->u32Mode = supdrvGipDeterminTscMode();
4040	pGip->u32UpdateHz = uUpdateHz;
4041	pGip->u32UpdateIntervalNS = 1000000000 / uUpdateHz;
4042	pGip->u64NanoTSLastUpdateHz = u64NanoTS;
4043
4044	for (i = 0; i < RT_ELEMENTS(pGip->aCPUs); i++)
4045	{
4046	pGip->aCPUs[i].u32TransactionId = 2;
4047	pGip->aCPUs[i].u64NanoTS = u64NanoTS;
4048	pGip->aCPUs[i].u64TSC = ASMReadTSC();
4049
4050	/*
4051	* We don't know the following values until we've executed updates.
4052	* So, we'll just insert very high values.
4053	*/
4054	pGip->aCPUs[i].u64CpuHz = _4G + 1;
4055	pGip->aCPUs[i].u32UpdateIntervalTSC = _2G / 4;
4056	pGip->aCPUs[i].au32TSCHistory[0] = _2G / 4;
4057	pGip->aCPUs[i].au32TSCHistory[1] = _2G / 4;
4058	pGip->aCPUs[i].au32TSCHistory[2] = _2G / 4;
4059	pGip->aCPUs[i].au32TSCHistory[3] = _2G / 4;
4060	pGip->aCPUs[i].au32TSCHistory[4] = _2G / 4;
4061	pGip->aCPUs[i].au32TSCHistory[5] = _2G / 4;
4062	pGip->aCPUs[i].au32TSCHistory[6] = _2G / 4;
4063	pGip->aCPUs[i].au32TSCHistory[7] = _2G / 4;
4064	}
4065
4066	/*
4067	* Link it to the device extension.
4068	*/
4069	pDevExt->pGip = pGip;
4070	pDevExt->HCPhysGip = HCPhys;
4071	pDevExt->cGipUsers = 0;
4072
4073	return 0;
4074	}
4075
4076
4077	/**
4078	* Determin the GIP TSC mode.
4079	*
4080	* @returns The most suitable TSC mode.
4081	*/
4082	static SUPGIPMODE supdrvGipDeterminTscMode(void)
4083	{
4084	#ifndef USE_NEW_OS_INTERFACE
4085	/*
4086	* The problem here is that AMD processors with power management features
4087	* may easily end up with different TSCs because the CPUs or even cores
4088	* on the same physical chip run at different frequencies to save power.
4089	*
4090	* It is rumoured that this will be corrected with Barcelona and it's
4091	* expected that this will be indicated by the TscInvariant bit in
4092	* cpuid(0x80000007). So, the "difficult" bit here is to correctly
4093	* identify the older CPUs which don't do different frequency and
4094	* can be relied upon to have somewhat uniform TSC between the cpus.
4095	*/
4096	if (supdrvOSGetCPUCount() > 1)
4097	{
4098	uint32_t uEAX, uEBX, uECX, uEDX;
4099
4100	/* Permit user users override. */
4101	if (supdrvOSGetForcedAsyncTscMode())
4102	return SUPGIPMODE_ASYNC_TSC;
4103
4104	/* Check for "AuthenticAMD" */
4105	ASMCpuId(0, &uEAX, &uEBX, &uECX, &uEDX);
4106	if (uEAX >= 1 && uEBX == 0x68747541 && uECX == 0x444d4163 && uEDX == 0x69746e65)
4107	{
4108	/* Check for APM support and that TscInvariant is cleared. */
4109	ASMCpuId(0x80000000, &uEAX, &uEBX, &uECX, &uEDX);
4110	if (uEAX >= 0x80000007)
4111	{
4112	ASMCpuId(0x80000007, &uEAX, &uEBX, &uECX, &uEDX);
4113	if ( !(uEDX & BIT(8))/* TscInvariant */
4114	&& (uEDX & 0x3e)) /* STC\|TM\|THERMTRIP\|VID\|FID. Ignore TS. */
4115	return SUPGIPMODE_ASYNC_TSC;
4116	}
4117	}
4118	}
4119	#endif
4120	return SUPGIPMODE_SYNC_TSC;
4121	}
4122
4123
4124	/**
4125	* Invalidates the GIP data upon termination.
4126	*
4127	* @param pGip Pointer to the read-write kernel mapping of the GIP.
4128	*/
4129	void VBOXCALL supdrvGipTerm(PSUPGLOBALINFOPAGE pGip)
4130	{
4131	unsigned i;
4132	pGip->u32Magic = 0;
4133	for (i = 0; i < RT_ELEMENTS(pGip->aCPUs); i++)
4134	{
4135	pGip->aCPUs[i].u64NanoTS = 0;
4136	pGip->aCPUs[i].u64TSC = 0;
4137	pGip->aCPUs[i].iTSCHistoryHead = 0;
4138	}
4139	}
4140
4141
4142	/**
4143	* Worker routine for supdrvGipUpdate and supdrvGipUpdatePerCpu that
4144	* updates all the per cpu data except the transaction id.
4145	*
4146	* @param pGip The GIP.
4147	* @param pGipCpu Pointer to the per cpu data.
4148	* @param u64NanoTS The current time stamp.
4149	*/
4150	static void supdrvGipDoUpdateCpu(PSUPGLOBALINFOPAGE pGip, PSUPGIPCPU pGipCpu, uint64_t u64NanoTS)
4151	{
4152	uint64_t u64TSC;
4153	uint64_t u64TSCDelta;
4154	uint32_t u32UpdateIntervalTSC;
4155	uint32_t u32UpdateIntervalTSCSlack;
4156	unsigned iTSCHistoryHead;
4157	uint64_t u64CpuHz;
4158
4159	/*
4160	* Update the NanoTS.
4161	*/
4162	ASMAtomicXchgU64(&pGipCpu->u64NanoTS, u64NanoTS);
4163
4164	/*
4165	* Calc TSC delta.
4166	*/
4167	/** @todo validate the NanoTS delta, don't trust the OS to call us when it should... */
4168	u64TSC = ASMReadTSC();
4169	u64TSCDelta = u64TSC - pGipCpu->u64TSC;
4170	ASMAtomicXchgU64(&pGipCpu->u64TSC, u64TSC);
4171
4172	if (u64TSCDelta >> 32)
4173	{
4174	u64TSCDelta = pGipCpu->u32UpdateIntervalTSC;
4175	pGipCpu->cErrors++;
4176	}
4177
4178	/*
4179	* TSC History.
4180	*/
4181	Assert(ELEMENTS(pGipCpu->au32TSCHistory) == 8);
4182
4183	iTSCHistoryHead = (pGipCpu->iTSCHistoryHead + 1) & 7;
4184	ASMAtomicXchgU32(&pGipCpu->iTSCHistoryHead, iTSCHistoryHead);
4185	ASMAtomicXchgU32(&pGipCpu->au32TSCHistory[iTSCHistoryHead], (uint32_t)u64TSCDelta);
4186
4187	/*
4188	* UpdateIntervalTSC = average of last 8,2,1 intervals depending on update HZ.
4189	*/
4190	if (pGip->u32UpdateHz >= 1000)
4191	{
4192	uint32_t u32;
4193	u32 = pGipCpu->au32TSCHistory[0];
4194	u32 += pGipCpu->au32TSCHistory[1];
4195	u32 += pGipCpu->au32TSCHistory[2];
4196	u32 += pGipCpu->au32TSCHistory[3];
4197	u32 >>= 2;
4198	u32UpdateIntervalTSC = pGipCpu->au32TSCHistory[4];
4199	u32UpdateIntervalTSC += pGipCpu->au32TSCHistory[5];
4200	u32UpdateIntervalTSC += pGipCpu->au32TSCHistory[6];
4201	u32UpdateIntervalTSC += pGipCpu->au32TSCHistory[7];
4202	u32UpdateIntervalTSC >>= 2;
4203	u32UpdateIntervalTSC += u32;
4204	u32UpdateIntervalTSC >>= 1;
4205
4206	/* Value choosen for a 2GHz Athlon64 running linux 2.6.10/11, . */
4207	u32UpdateIntervalTSCSlack = u32UpdateIntervalTSC >> 14;
4208	}
4209	else if (pGip->u32UpdateHz >= 90)
4210	{
4211	u32UpdateIntervalTSC = (uint32_t)u64TSCDelta;
4212	u32UpdateIntervalTSC += pGipCpu->au32TSCHistory[(iTSCHistoryHead - 1) & 7];
4213	u32UpdateIntervalTSC >>= 1;
4214
4215	/* value choosen on a 2GHz thinkpad running windows */
4216	u32UpdateIntervalTSCSlack = u32UpdateIntervalTSC >> 7;
4217	}
4218	else
4219	{
4220	u32UpdateIntervalTSC = (uint32_t)u64TSCDelta;
4221
4222	/* This value hasn't be checked yet.. waiting for OS/2 and 33Hz timers.. :-) */
4223	u32UpdateIntervalTSCSlack = u32UpdateIntervalTSC >> 6;
4224	}
4225	ASMAtomicXchgU32(&pGipCpu->u32UpdateIntervalTSC, u32UpdateIntervalTSC + u32UpdateIntervalTSCSlack);
4226
4227	/*
4228	* CpuHz.
4229	*/
4230	u64CpuHz = ASMMult2xU32RetU64(u32UpdateIntervalTSC, pGip->u32UpdateHz);
4231	ASMAtomicXchgU64(&pGipCpu->u64CpuHz, u64CpuHz);
4232	}
4233
4234
4235	/**
4236	* Updates the GIP.
4237	*
4238	* @param pGip Pointer to the GIP.
4239	* @param u64NanoTS The current nanosecond timesamp.
4240	*/
4241	void VBOXCALL supdrvGipUpdate(PSUPGLOBALINFOPAGE pGip, uint64_t u64NanoTS)
4242	{
4243	/*
4244	* Determin the relevant CPU data.
4245	*/
4246	PSUPGIPCPU pGipCpu;
4247	if (pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)
4248	pGipCpu = &pGip->aCPUs[0];
4249	else
4250	{
4251	unsigned iCpu = ASMGetApicId();
4252	if (RT_LIKELY(iCpu >= RT_ELEMENTS(pGip->aCPUs)))
4253	return;
4254	pGipCpu = &pGip->aCPUs[iCpu];
4255	}
4256
4257	/*
4258	* Start update transaction.
4259	*/
4260	if (!(ASMAtomicIncU32(&pGipCpu->u32TransactionId) & 1))
4261	{
4262	/* this can happen on win32 if we're taking to long and there are more CPUs around. shouldn't happen though. */
4263	AssertMsgFailed(("Invalid transaction id, %#x, not odd!\n", pGipCpu->u32TransactionId));
4264	ASMAtomicIncU32(&pGipCpu->u32TransactionId);
4265	pGipCpu->cErrors++;
4266	return;
4267	}
4268
4269	/*
4270	* Recalc the update frequency every 0x800th time.
4271	*/
4272	if (!(pGipCpu->u32TransactionId & (GIP_UPDATEHZ_RECALC_FREQ * 2 - 2)))
4273	{
4274	if (pGip->u64NanoTSLastUpdateHz)
4275	{
4276	#ifdef __AMD64__ /** @todo fix 64-bit div here to work on x86 linux. */
4277	uint64_t u64Delta = u64NanoTS - pGip->u64NanoTSLastUpdateHz;
4278	uint32_t u32UpdateHz = (uint32_t)((UINT64_C(1000000000) * GIP_UPDATEHZ_RECALC_FREQ) / u64Delta);
4279	if (u32UpdateHz <= 2000 && u32UpdateHz >= 30)
4280	{
4281	ASMAtomicXchgU32(&pGip->u32UpdateHz, u32UpdateHz);
4282	ASMAtomicXchgU32(&pGip->u32UpdateIntervalNS, 1000000000 / u32UpdateHz);
4283	}
4284	#endif
4285	}
4286	ASMAtomicXchgU64(&pGip->u64NanoTSLastUpdateHz, u64NanoTS);
4287	}
4288
4289	/*
4290	* Update the data.
4291	*/
4292	supdrvGipDoUpdateCpu(pGip, pGipCpu, u64NanoTS);
4293
4294	/*
4295	* Complete transaction.
4296	*/
4297	ASMAtomicIncU32(&pGipCpu->u32TransactionId);
4298	}
4299
4300
4301	/**
4302	* Updates the per cpu GIP data for the calling cpu.
4303	*
4304	* @param pGip Pointer to the GIP.
4305	* @param u64NanoTS The current nanosecond timesamp.
4306	* @param iCpu The CPU index.
4307	*/
4308	void VBOXCALL supdrvGipUpdatePerCpu(PSUPGLOBALINFOPAGE pGip, uint64_t u64NanoTS, unsigned iCpu)
4309	{
4310	PSUPGIPCPU pGipCpu;
4311
4312	if (RT_LIKELY(iCpu <= RT_ELEMENTS(pGip->aCPUs)))
4313	{
4314	pGipCpu = &pGip->aCPUs[iCpu];
4315
4316	/*
4317	* Start update transaction.
4318	*/
4319	if (!(ASMAtomicIncU32(&pGipCpu->u32TransactionId) & 1))
4320	{
4321	AssertMsgFailed(("Invalid transaction id, %#x, not odd!\n", pGipCpu->u32TransactionId));
4322	ASMAtomicIncU32(&pGipCpu->u32TransactionId);
4323	pGipCpu->cErrors++;
4324	return;
4325	}
4326
4327	/*
4328	* Update the data.
4329	*/
4330	supdrvGipDoUpdateCpu(pGip, pGipCpu, u64NanoTS);
4331
4332	/*
4333	* Complete transaction.
4334	*/
4335	ASMAtomicIncU32(&pGipCpu->u32TransactionId);
4336	}
4337	}
4338
4339
4340	#ifndef DEBUG /** @todo change #ifndef DEBUG -> #ifdef LOG_ENABLED */
4341	/**
4342	* Stub function for non-debug builds.
4343	*/
4344	RTDECL(PRTLOGGER) RTLogDefaultInstance(void)
4345	{
4346	return NULL;
4347	}
4348
4349	RTDECL(PRTLOGGER) RTLogRelDefaultInstance(void)
4350	{
4351	return NULL;
4352	}
4353
4354	/**
4355	* Stub function for non-debug builds.
4356	*/
4357	RTDECL(int) RTLogSetDefaultInstanceThread(PRTLOGGER pLogger, uintptr_t uKey)
4358	{
4359	return 0;
4360	}
4361
4362	/**
4363	* Stub function for non-debug builds.
4364	*/
4365	RTDECL(void) RTLogLogger(PRTLOGGER pLogger, void pvCallerRet, const char pszFormat, ...)
4366	{
4367	}
4368
4369	/**
4370	* Stub function for non-debug builds.
4371	*/
4372	RTDECL(void) RTLogLoggerEx(PRTLOGGER pLogger, unsigned fFlags, unsigned iGroup, const char *pszFormat, ...)
4373	{
4374	}
4375
4376	/**
4377	* Stub function for non-debug builds.
4378	*/
4379	RTDECL(void) RTLogLoggerExV(PRTLOGGER pLogger, unsigned fFlags, unsigned iGroup, const char *pszFormat, va_list args)
4380	{
4381	}
4382	#endif /* !DEBUG */
4383

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source: vbox/trunk/src/VBox/HostDrivers/Support/SUPDRVShared.c@ 1971

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