VirtualBox

source: vbox/trunk/src/VBox/HostDrivers/Support/SUPDrv.c@ 50333

Last change on this file since 50333 was 50333, checked in by vboxsync, 11 years ago

VMM, SupDrv: Allow VT-x when in presumed SMX mode when the VMXON bit is off. SMXON bit is what is relevant.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 229.2 KB
Line 
1/* $Id: SUPDrv.c 50333 2014-02-05 15:44:39Z vboxsync $ */
2/** @file
3 * VBoxDrv - The VirtualBox Support Driver - Common code.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * The contents of this file may alternatively be used under the terms
18 * of the Common Development and Distribution License Version 1.0
19 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20 * VirtualBox OSE distribution, in which case the provisions of the
21 * CDDL are applicable instead of those of the GPL.
22 *
23 * You may elect to license modified versions of this file under the
24 * terms and conditions of either the GPL or the CDDL or both.
25 */
26
27/*******************************************************************************
28* Header Files *
29*******************************************************************************/
30#define LOG_GROUP LOG_GROUP_SUP_DRV
31#define SUPDRV_AGNOSTIC
32#include "SUPDrvInternal.h"
33#ifndef PAGE_SHIFT
34# include <iprt/param.h>
35#endif
36#include <iprt/asm.h>
37#include <iprt/asm-amd64-x86.h>
38#include <iprt/asm-math.h>
39#include <iprt/cpuset.h>
40#include <iprt/handletable.h>
41#include <iprt/mem.h>
42#include <iprt/mp.h>
43#include <iprt/power.h>
44#include <iprt/process.h>
45#include <iprt/semaphore.h>
46#include <iprt/spinlock.h>
47#include <iprt/thread.h>
48#include <iprt/uuid.h>
49#include <iprt/net.h>
50#include <iprt/crc.h>
51#include <iprt/string.h>
52#include <iprt/timer.h>
53#if defined(RT_OS_DARWIN) || defined(RT_OS_SOLARIS) || defined(RT_OS_FREEBSD)
54# include <iprt/rand.h>
55# include <iprt/path.h>
56#endif
57#include <iprt/x86.h>
58
59#include <VBox/param.h>
60#include <VBox/log.h>
61#include <VBox/err.h>
62#include <VBox/vmm/hm_svm.h>
63#include <VBox/vmm/hm_vmx.h>
64
65#if defined(RT_OS_SOLARIS) || defined(RT_OS_DARWIN)
66# include "dtrace/SUPDrv.h"
67#else
68# define VBOXDRV_SESSION_CREATE(pvSession, fUser) do { } while (0)
69# define VBOXDRV_SESSION_CLOSE(pvSession) do { } while (0)
70# define VBOXDRV_IOCTL_ENTRY(pvSession, uIOCtl, pvReqHdr) do { } while (0)
71# define VBOXDRV_IOCTL_RETURN(pvSession, uIOCtl, pvReqHdr, rcRet, rcReq) do { } while (0)
72#endif
73
74/*
75 * Logging assignments:
76 * Log - useful stuff, like failures.
77 * LogFlow - program flow, except the really noisy bits.
78 * Log2 - Cleanup.
79 * Log3 - Loader flow noise.
80 * Log4 - Call VMMR0 flow noise.
81 * Log5 - Native yet-to-be-defined noise.
82 * Log6 - Native ioctl flow noise.
83 *
84 * Logging requires BUILD_TYPE=debug and possibly changes to the logger
85 * instantiation in log-vbox.c(pp).
86 */
87
88
89/*******************************************************************************
90* Defined Constants And Macros *
91*******************************************************************************/
92/** The frequency by which we recalculate the u32UpdateHz and
93 * u32UpdateIntervalNS GIP members. The value must be a power of 2. */
94#define GIP_UPDATEHZ_RECALC_FREQ 0x800
95
96/** @def VBOX_SVN_REV
97 * The makefile should define this if it can. */
98#ifndef VBOX_SVN_REV
99# define VBOX_SVN_REV 0
100#endif
101
102#if 0 /* Don't start the GIP timers. Useful when debugging the IPRT timer code. */
103# define DO_NOT_START_GIP
104#endif
105
106
107/*******************************************************************************
108* Internal Functions *
109*******************************************************************************/
110static DECLCALLBACK(int) supdrvSessionObjHandleRetain(RTHANDLETABLE hHandleTable, void *pvObj, void *pvCtx, void *pvUser);
111static DECLCALLBACK(void) supdrvSessionObjHandleDelete(RTHANDLETABLE hHandleTable, uint32_t h, void *pvObj, void *pvCtx, void *pvUser);
112static int supdrvMemAdd(PSUPDRVMEMREF pMem, PSUPDRVSESSION pSession);
113static int supdrvMemRelease(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr, SUPDRVMEMREFTYPE eType);
114static int supdrvIOCtl_LdrOpen(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDROPEN pReq);
115static int supdrvIOCtl_LdrLoad(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRLOAD pReq);
116static int supdrvIOCtl_LdrFree(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRFREE pReq);
117static int supdrvIOCtl_LdrGetSymbol(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRGETSYMBOL pReq);
118static int supdrvIDC_LdrGetSymbol(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPDRVIDCREQGETSYM pReq);
119static int supdrvLdrSetVMMR0EPs(PSUPDRVDEVEXT pDevExt, void *pvVMMR0, void *pvVMMR0EntryInt, void *pvVMMR0EntryFast, void *pvVMMR0EntryEx);
120static void supdrvLdrUnsetVMMR0EPs(PSUPDRVDEVEXT pDevExt);
121static int supdrvLdrAddUsage(PSUPDRVSESSION pSession, PSUPDRVLDRIMAGE pImage);
122static void supdrvLdrFree(PSUPDRVDEVEXT pDevExt, PSUPDRVLDRIMAGE pImage);
123DECLINLINE(int) supdrvLdrLock(PSUPDRVDEVEXT pDevExt);
124DECLINLINE(int) supdrvLdrUnlock(PSUPDRVDEVEXT pDevExt);
125static int supdrvIOCtl_CallServiceModule(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPCALLSERVICE pReq);
126static int supdrvIOCtl_LoggerSettings(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLOGGERSETTINGS pReq);
127static int supdrvIOCtl_MsrProber(PSUPDRVDEVEXT pDevExt, PSUPMSRPROBER pReq);
128static int supdrvGipCreate(PSUPDRVDEVEXT pDevExt);
129static void supdrvGipDestroy(PSUPDRVDEVEXT pDevExt);
130static DECLCALLBACK(void) supdrvGipSyncTimer(PRTTIMER pTimer, void *pvUser, uint64_t iTick);
131static DECLCALLBACK(void) supdrvGipAsyncTimer(PRTTIMER pTimer, void *pvUser, uint64_t iTick);
132static DECLCALLBACK(void) supdrvGipMpEvent(RTMPEVENT enmEvent, RTCPUID idCpu, void *pvUser);
133static void supdrvGipInit(PSUPDRVDEVEXT pDevExt, PSUPGLOBALINFOPAGE pGip, RTHCPHYS HCPhys,
134 uint64_t u64NanoTS, unsigned uUpdateHz, unsigned cCpus);
135static DECLCALLBACK(void) supdrvGipInitOnCpu(RTCPUID idCpu, void *pvUser1, void *pvUser2);
136static void supdrvGipTerm(PSUPGLOBALINFOPAGE pGip);
137static void supdrvGipUpdate(PSUPDRVDEVEXT pDevExt, uint64_t u64NanoTS, uint64_t u64TSC, RTCPUID idCpu, uint64_t iTick);
138static void supdrvGipUpdatePerCpu(PSUPDRVDEVEXT pDevExt, uint64_t u64NanoTS, uint64_t u64TSC,
139 RTCPUID idCpu, uint8_t idApic, uint64_t iTick);
140static void supdrvGipInitCpu(PSUPGLOBALINFOPAGE pGip, PSUPGIPCPU pCpu, uint64_t u64NanoTS);
141static int supdrvIOCtl_ResumeSuspendedKbds(void);
142
143
144/*******************************************************************************
145* Global Variables *
146*******************************************************************************/
147DECLEXPORT(PSUPGLOBALINFOPAGE) g_pSUPGlobalInfoPage = NULL;
148
149/**
150 * Array of the R0 SUP API.
151 */
152static SUPFUNC g_aFunctions[] =
153{
154/* SED: START */
155 /* name function */
156 /* Entries with absolute addresses determined at runtime, fixup
157 code makes ugly ASSUMPTIONS about the order here: */
158 { "SUPR0AbsIs64bit", (void *)0 },
159 { "SUPR0Abs64bitKernelCS", (void *)0 },
160 { "SUPR0Abs64bitKernelSS", (void *)0 },
161 { "SUPR0Abs64bitKernelDS", (void *)0 },
162 { "SUPR0AbsKernelCS", (void *)0 },
163 { "SUPR0AbsKernelSS", (void *)0 },
164 { "SUPR0AbsKernelDS", (void *)0 },
165 { "SUPR0AbsKernelES", (void *)0 },
166 { "SUPR0AbsKernelFS", (void *)0 },
167 { "SUPR0AbsKernelGS", (void *)0 },
168 /* Normal function pointers: */
169 { "g_pSUPGlobalInfoPage", (void *)&g_pSUPGlobalInfoPage }, /* SED: DATA */
170 { "SUPGetGIP", (void *)SUPGetGIP },
171 { "SUPR0ComponentDeregisterFactory", (void *)SUPR0ComponentDeregisterFactory },
172 { "SUPR0ComponentQueryFactory", (void *)SUPR0ComponentQueryFactory },
173 { "SUPR0ComponentRegisterFactory", (void *)SUPR0ComponentRegisterFactory },
174 { "SUPR0ContAlloc", (void *)SUPR0ContAlloc },
175 { "SUPR0ContFree", (void *)SUPR0ContFree },
176 { "SUPR0EnableVTx", (void *)SUPR0EnableVTx },
177 { "SUPR0SuspendVTxOnCpu", (void *)SUPR0SuspendVTxOnCpu },
178 { "SUPR0ResumeVTxOnCpu", (void *)SUPR0ResumeVTxOnCpu },
179 { "SUPR0GetPagingMode", (void *)SUPR0GetPagingMode },
180 { "SUPR0LockMem", (void *)SUPR0LockMem },
181 { "SUPR0LowAlloc", (void *)SUPR0LowAlloc },
182 { "SUPR0LowFree", (void *)SUPR0LowFree },
183 { "SUPR0MemAlloc", (void *)SUPR0MemAlloc },
184 { "SUPR0MemFree", (void *)SUPR0MemFree },
185 { "SUPR0MemGetPhys", (void *)SUPR0MemGetPhys },
186 { "SUPR0ObjAddRef", (void *)SUPR0ObjAddRef },
187 { "SUPR0ObjAddRefEx", (void *)SUPR0ObjAddRefEx },
188 { "SUPR0ObjRegister", (void *)SUPR0ObjRegister },
189 { "SUPR0ObjRelease", (void *)SUPR0ObjRelease },
190 { "SUPR0ObjVerifyAccess", (void *)SUPR0ObjVerifyAccess },
191 { "SUPR0PageAllocEx", (void *)SUPR0PageAllocEx },
192 { "SUPR0PageFree", (void *)SUPR0PageFree },
193 { "SUPR0Printf", (void *)SUPR0Printf },
194 { "SUPR0TracerDeregisterDrv", (void *)SUPR0TracerDeregisterDrv },
195 { "SUPR0TracerDeregisterImpl", (void *)SUPR0TracerDeregisterImpl },
196 { "SUPR0TracerFireProbe", (void *)SUPR0TracerFireProbe },
197 { "SUPR0TracerRegisterDrv", (void *)SUPR0TracerRegisterDrv },
198 { "SUPR0TracerRegisterImpl", (void *)SUPR0TracerRegisterImpl },
199 { "SUPR0TracerRegisterModule", (void *)SUPR0TracerRegisterModule },
200 { "SUPR0TracerUmodProbeFire", (void *)SUPR0TracerUmodProbeFire },
201 { "SUPR0UnlockMem", (void *)SUPR0UnlockMem },
202 { "SUPSemEventClose", (void *)SUPSemEventClose },
203 { "SUPSemEventCreate", (void *)SUPSemEventCreate },
204 { "SUPSemEventGetResolution", (void *)SUPSemEventGetResolution },
205 { "SUPSemEventMultiClose", (void *)SUPSemEventMultiClose },
206 { "SUPSemEventMultiCreate", (void *)SUPSemEventMultiCreate },
207 { "SUPSemEventMultiGetResolution", (void *)SUPSemEventMultiGetResolution },
208 { "SUPSemEventMultiReset", (void *)SUPSemEventMultiReset },
209 { "SUPSemEventMultiSignal", (void *)SUPSemEventMultiSignal },
210 { "SUPSemEventMultiWait", (void *)SUPSemEventMultiWait },
211 { "SUPSemEventMultiWaitNoResume", (void *)SUPSemEventMultiWaitNoResume },
212 { "SUPSemEventMultiWaitNsAbsIntr", (void *)SUPSemEventMultiWaitNsAbsIntr },
213 { "SUPSemEventMultiWaitNsRelIntr", (void *)SUPSemEventMultiWaitNsRelIntr },
214 { "SUPSemEventSignal", (void *)SUPSemEventSignal },
215 { "SUPSemEventWait", (void *)SUPSemEventWait },
216 { "SUPSemEventWaitNoResume", (void *)SUPSemEventWaitNoResume },
217 { "SUPSemEventWaitNsAbsIntr", (void *)SUPSemEventWaitNsAbsIntr },
218 { "SUPSemEventWaitNsRelIntr", (void *)SUPSemEventWaitNsRelIntr },
219
220 { "RTAssertAreQuiet", (void *)RTAssertAreQuiet },
221 { "RTAssertMayPanic", (void *)RTAssertMayPanic },
222 { "RTAssertMsg1", (void *)RTAssertMsg1 },
223 { "RTAssertMsg2AddV", (void *)RTAssertMsg2AddV },
224 { "RTAssertMsg2V", (void *)RTAssertMsg2V },
225 { "RTAssertSetMayPanic", (void *)RTAssertSetMayPanic },
226 { "RTAssertSetQuiet", (void *)RTAssertSetQuiet },
227 { "RTCrc32", (void *)RTCrc32 },
228 { "RTCrc32Finish", (void *)RTCrc32Finish },
229 { "RTCrc32Process", (void *)RTCrc32Process },
230 { "RTCrc32Start", (void *)RTCrc32Start },
231 { "RTErrConvertFromErrno", (void *)RTErrConvertFromErrno },
232 { "RTErrConvertToErrno", (void *)RTErrConvertToErrno },
233 { "RTHandleTableAllocWithCtx", (void *)RTHandleTableAllocWithCtx },
234 { "RTHandleTableCreate", (void *)RTHandleTableCreate },
235 { "RTHandleTableCreateEx", (void *)RTHandleTableCreateEx },
236 { "RTHandleTableDestroy", (void *)RTHandleTableDestroy },
237 { "RTHandleTableFreeWithCtx", (void *)RTHandleTableFreeWithCtx },
238 { "RTHandleTableLookupWithCtx", (void *)RTHandleTableLookupWithCtx },
239 { "RTLogDefaultInstance", (void *)RTLogDefaultInstance },
240 { "RTLogGetDefaultInstance", (void *)RTLogGetDefaultInstance },
241 { "RTLogLoggerExV", (void *)RTLogLoggerExV },
242 { "RTLogPrintfV", (void *)RTLogPrintfV },
243 { "RTLogRelDefaultInstance", (void *)RTLogRelDefaultInstance },
244 { "RTLogSetDefaultInstanceThread", (void *)RTLogSetDefaultInstanceThread },
245 { "RTMemAllocExTag", (void *)RTMemAllocExTag },
246 { "RTMemAllocTag", (void *)RTMemAllocTag },
247 { "RTMemAllocVarTag", (void *)RTMemAllocVarTag },
248 { "RTMemAllocZTag", (void *)RTMemAllocZTag },
249 { "RTMemAllocZVarTag", (void *)RTMemAllocZVarTag },
250 { "RTMemDupExTag", (void *)RTMemDupExTag },
251 { "RTMemDupTag", (void *)RTMemDupTag },
252 { "RTMemFree", (void *)RTMemFree },
253 { "RTMemFreeEx", (void *)RTMemFreeEx },
254 { "RTMemReallocTag", (void *)RTMemReallocTag },
255 { "RTMpCpuId", (void *)RTMpCpuId },
256 { "RTMpCpuIdFromSetIndex", (void *)RTMpCpuIdFromSetIndex },
257 { "RTMpCpuIdToSetIndex", (void *)RTMpCpuIdToSetIndex },
258 { "RTMpGetArraySize", (void *)RTMpGetArraySize },
259 { "RTMpGetCount", (void *)RTMpGetCount },
260 { "RTMpGetMaxCpuId", (void *)RTMpGetMaxCpuId },
261 { "RTMpGetOnlineCount", (void *)RTMpGetOnlineCount },
262 { "RTMpGetOnlineSet", (void *)RTMpGetOnlineSet },
263 { "RTMpGetSet", (void *)RTMpGetSet },
264 { "RTMpIsCpuOnline", (void *)RTMpIsCpuOnline },
265 { "RTMpIsCpuPossible", (void *)RTMpIsCpuPossible },
266 { "RTMpIsCpuWorkPending", (void *)RTMpIsCpuWorkPending },
267 { "RTMpNotificationDeregister", (void *)RTMpNotificationDeregister },
268 { "RTMpNotificationRegister", (void *)RTMpNotificationRegister },
269 { "RTMpOnAll", (void *)RTMpOnAll },
270 { "RTMpOnOthers", (void *)RTMpOnOthers },
271 { "RTMpOnSpecific", (void *)RTMpOnSpecific },
272 { "RTMpPokeCpu", (void *)RTMpPokeCpu },
273 { "RTNetIPv4AddDataChecksum", (void *)RTNetIPv4AddDataChecksum },
274 { "RTNetIPv4AddTCPChecksum", (void *)RTNetIPv4AddTCPChecksum },
275 { "RTNetIPv4AddUDPChecksum", (void *)RTNetIPv4AddUDPChecksum },
276 { "RTNetIPv4FinalizeChecksum", (void *)RTNetIPv4FinalizeChecksum },
277 { "RTNetIPv4HdrChecksum", (void *)RTNetIPv4HdrChecksum },
278 { "RTNetIPv4IsDHCPValid", (void *)RTNetIPv4IsDHCPValid },
279 { "RTNetIPv4IsHdrValid", (void *)RTNetIPv4IsHdrValid },
280 { "RTNetIPv4IsTCPSizeValid", (void *)RTNetIPv4IsTCPSizeValid },
281 { "RTNetIPv4IsTCPValid", (void *)RTNetIPv4IsTCPValid },
282 { "RTNetIPv4IsUDPSizeValid", (void *)RTNetIPv4IsUDPSizeValid },
283 { "RTNetIPv4IsUDPValid", (void *)RTNetIPv4IsUDPValid },
284 { "RTNetIPv4PseudoChecksum", (void *)RTNetIPv4PseudoChecksum },
285 { "RTNetIPv4PseudoChecksumBits", (void *)RTNetIPv4PseudoChecksumBits },
286 { "RTNetIPv4TCPChecksum", (void *)RTNetIPv4TCPChecksum },
287 { "RTNetIPv4UDPChecksum", (void *)RTNetIPv4UDPChecksum },
288 { "RTNetIPv6PseudoChecksum", (void *)RTNetIPv6PseudoChecksum },
289 { "RTNetIPv6PseudoChecksumBits", (void *)RTNetIPv6PseudoChecksumBits },
290 { "RTNetIPv6PseudoChecksumEx", (void *)RTNetIPv6PseudoChecksumEx },
291 { "RTNetTCPChecksum", (void *)RTNetTCPChecksum },
292 { "RTNetUDPChecksum", (void *)RTNetUDPChecksum },
293 { "RTPowerNotificationDeregister", (void *)RTPowerNotificationDeregister },
294 { "RTPowerNotificationRegister", (void *)RTPowerNotificationRegister },
295 { "RTProcSelf", (void *)RTProcSelf },
296 { "RTR0AssertPanicSystem", (void *)RTR0AssertPanicSystem },
297 { "RTR0MemAreKrnlAndUsrDifferent", (void *)RTR0MemAreKrnlAndUsrDifferent },
298 { "RTR0MemKernelIsValidAddr", (void *)RTR0MemKernelIsValidAddr },
299 { "RTR0MemKernelCopyFrom", (void *)RTR0MemKernelCopyFrom },
300 { "RTR0MemKernelCopyTo", (void *)RTR0MemKernelCopyTo },
301 { "RTR0MemObjAddress", (void *)RTR0MemObjAddress },
302 { "RTR0MemObjAddressR3", (void *)RTR0MemObjAddressR3 },
303 { "RTR0MemObjAllocContTag", (void *)RTR0MemObjAllocContTag },
304 { "RTR0MemObjAllocLowTag", (void *)RTR0MemObjAllocLowTag },
305 { "RTR0MemObjAllocPageTag", (void *)RTR0MemObjAllocPageTag },
306 { "RTR0MemObjAllocPhysExTag", (void *)RTR0MemObjAllocPhysExTag },
307 { "RTR0MemObjAllocPhysNCTag", (void *)RTR0MemObjAllocPhysNCTag },
308 { "RTR0MemObjAllocPhysTag", (void *)RTR0MemObjAllocPhysTag },
309 { "RTR0MemObjEnterPhysTag", (void *)RTR0MemObjEnterPhysTag },
310 { "RTR0MemObjFree", (void *)RTR0MemObjFree },
311 { "RTR0MemObjGetPagePhysAddr", (void *)RTR0MemObjGetPagePhysAddr },
312 { "RTR0MemObjIsMapping", (void *)RTR0MemObjIsMapping },
313 { "RTR0MemObjLockUserTag", (void *)RTR0MemObjLockUserTag },
314 { "RTR0MemObjMapKernelExTag", (void *)RTR0MemObjMapKernelExTag },
315 { "RTR0MemObjMapKernelTag", (void *)RTR0MemObjMapKernelTag },
316 { "RTR0MemObjMapUserTag", (void *)RTR0MemObjMapUserTag },
317 { "RTR0MemObjProtect", (void *)RTR0MemObjProtect },
318 { "RTR0MemObjSize", (void *)RTR0MemObjSize },
319 { "RTR0MemUserCopyFrom", (void *)RTR0MemUserCopyFrom },
320 { "RTR0MemUserCopyTo", (void *)RTR0MemUserCopyTo },
321 { "RTR0MemUserIsValidAddr", (void *)RTR0MemUserIsValidAddr },
322 { "RTR0ProcHandleSelf", (void *)RTR0ProcHandleSelf },
323 { "RTSemEventCreate", (void *)RTSemEventCreate },
324 { "RTSemEventDestroy", (void *)RTSemEventDestroy },
325 { "RTSemEventGetResolution", (void *)RTSemEventGetResolution },
326 { "RTSemEventMultiCreate", (void *)RTSemEventMultiCreate },
327 { "RTSemEventMultiDestroy", (void *)RTSemEventMultiDestroy },
328 { "RTSemEventMultiGetResolution", (void *)RTSemEventMultiGetResolution },
329 { "RTSemEventMultiReset", (void *)RTSemEventMultiReset },
330 { "RTSemEventMultiSignal", (void *)RTSemEventMultiSignal },
331 { "RTSemEventMultiWait", (void *)RTSemEventMultiWait },
332 { "RTSemEventMultiWaitEx", (void *)RTSemEventMultiWaitEx },
333 { "RTSemEventMultiWaitExDebug", (void *)RTSemEventMultiWaitExDebug },
334 { "RTSemEventMultiWaitNoResume", (void *)RTSemEventMultiWaitNoResume },
335 { "RTSemEventSignal", (void *)RTSemEventSignal },
336 { "RTSemEventWait", (void *)RTSemEventWait },
337 { "RTSemEventWaitEx", (void *)RTSemEventWaitEx },
338 { "RTSemEventWaitExDebug", (void *)RTSemEventWaitExDebug },
339 { "RTSemEventWaitNoResume", (void *)RTSemEventWaitNoResume },
340 { "RTSemFastMutexCreate", (void *)RTSemFastMutexCreate },
341 { "RTSemFastMutexDestroy", (void *)RTSemFastMutexDestroy },
342 { "RTSemFastMutexRelease", (void *)RTSemFastMutexRelease },
343 { "RTSemFastMutexRequest", (void *)RTSemFastMutexRequest },
344 { "RTSemMutexCreate", (void *)RTSemMutexCreate },
345 { "RTSemMutexDestroy", (void *)RTSemMutexDestroy },
346 { "RTSemMutexRelease", (void *)RTSemMutexRelease },
347 { "RTSemMutexRequest", (void *)RTSemMutexRequest },
348 { "RTSemMutexRequestDebug", (void *)RTSemMutexRequestDebug },
349 { "RTSemMutexRequestNoResume", (void *)RTSemMutexRequestNoResume },
350 { "RTSemMutexRequestNoResumeDebug", (void *)RTSemMutexRequestNoResumeDebug },
351 { "RTSpinlockAcquire", (void *)RTSpinlockAcquire },
352 { "RTSpinlockCreate", (void *)RTSpinlockCreate },
353 { "RTSpinlockDestroy", (void *)RTSpinlockDestroy },
354 { "RTSpinlockRelease", (void *)RTSpinlockRelease },
355 { "RTSpinlockReleaseNoInts", (void *)RTSpinlockReleaseNoInts },
356 { "RTStrCopy", (void *)RTStrCopy },
357 { "RTStrDupTag", (void *)RTStrDupTag },
358 { "RTStrFormat", (void *)RTStrFormat },
359 { "RTStrFormatNumber", (void *)RTStrFormatNumber },
360 { "RTStrFormatTypeDeregister", (void *)RTStrFormatTypeDeregister },
361 { "RTStrFormatTypeRegister", (void *)RTStrFormatTypeRegister },
362 { "RTStrFormatTypeSetUser", (void *)RTStrFormatTypeSetUser },
363 { "RTStrFormatV", (void *)RTStrFormatV },
364 { "RTStrFree", (void *)RTStrFree },
365 { "RTStrNCmp", (void *)RTStrNCmp },
366 { "RTStrPrintf", (void *)RTStrPrintf },
367 { "RTStrPrintfEx", (void *)RTStrPrintfEx },
368 { "RTStrPrintfExV", (void *)RTStrPrintfExV },
369 { "RTStrPrintfV", (void *)RTStrPrintfV },
370 { "RTThreadCreate", (void *)RTThreadCreate },
371 { "RTThreadCtxHooksAreRegistered", (void *)RTThreadCtxHooksAreRegistered },
372 { "RTThreadCtxHooksCreate", (void *)RTThreadCtxHooksCreate },
373 { "RTThreadCtxHooksDeregister", (void *)RTThreadCtxHooksDeregister },
374 { "RTThreadCtxHooksRegister", (void *)RTThreadCtxHooksRegister },
375 { "RTThreadCtxHooksRelease", (void *)RTThreadCtxHooksRelease },
376 { "RTThreadCtxHooksRetain", (void *)RTThreadCtxHooksRetain },
377 { "RTThreadGetName", (void *)RTThreadGetName },
378 { "RTThreadGetNative", (void *)RTThreadGetNative },
379 { "RTThreadGetType", (void *)RTThreadGetType },
380 { "RTThreadIsInInterrupt", (void *)RTThreadIsInInterrupt },
381 { "RTThreadNativeSelf", (void *)RTThreadNativeSelf },
382 { "RTThreadPreemptDisable", (void *)RTThreadPreemptDisable },
383 { "RTThreadPreemptIsEnabled", (void *)RTThreadPreemptIsEnabled },
384 { "RTThreadPreemptIsPending", (void *)RTThreadPreemptIsPending },
385 { "RTThreadPreemptIsPendingTrusty", (void *)RTThreadPreemptIsPendingTrusty },
386 { "RTThreadPreemptIsPossible", (void *)RTThreadPreemptIsPossible },
387 { "RTThreadPreemptRestore", (void *)RTThreadPreemptRestore },
388 { "RTThreadSelf", (void *)RTThreadSelf },
389 { "RTThreadSelfName", (void *)RTThreadSelfName },
390 { "RTThreadSleep", (void *)RTThreadSleep },
391 { "RTThreadUserReset", (void *)RTThreadUserReset },
392 { "RTThreadUserSignal", (void *)RTThreadUserSignal },
393 { "RTThreadUserWait", (void *)RTThreadUserWait },
394 { "RTThreadUserWaitNoResume", (void *)RTThreadUserWaitNoResume },
395 { "RTThreadWait", (void *)RTThreadWait },
396 { "RTThreadWaitNoResume", (void *)RTThreadWaitNoResume },
397 { "RTThreadYield", (void *)RTThreadYield },
398 { "RTTimeMilliTS", (void *)RTTimeMilliTS },
399 { "RTTimeNanoTS", (void *)RTTimeNanoTS },
400 { "RTTimeNow", (void *)RTTimeNow },
401 { "RTTimerCanDoHighResolution", (void *)RTTimerCanDoHighResolution },
402 { "RTTimerChangeInterval", (void *)RTTimerChangeInterval },
403 { "RTTimerCreate", (void *)RTTimerCreate },
404 { "RTTimerCreateEx", (void *)RTTimerCreateEx },
405 { "RTTimerDestroy", (void *)RTTimerDestroy },
406 { "RTTimerGetSystemGranularity", (void *)RTTimerGetSystemGranularity },
407 { "RTTimerReleaseSystemGranularity", (void *)RTTimerReleaseSystemGranularity },
408 { "RTTimerRequestSystemGranularity", (void *)RTTimerRequestSystemGranularity },
409 { "RTTimerStart", (void *)RTTimerStart },
410 { "RTTimerStop", (void *)RTTimerStop },
411 { "RTTimeSystemMilliTS", (void *)RTTimeSystemMilliTS },
412 { "RTTimeSystemNanoTS", (void *)RTTimeSystemNanoTS },
413 { "RTUuidCompare", (void *)RTUuidCompare },
414 { "RTUuidCompareStr", (void *)RTUuidCompareStr },
415 { "RTUuidFromStr", (void *)RTUuidFromStr },
416/* SED: END */
417};
418
419#if defined(RT_OS_DARWIN) || defined(RT_OS_SOLARIS) || defined(RT_OS_FREEBSD)
420/**
421 * Drag in the rest of IRPT since we share it with the
422 * rest of the kernel modules on darwin.
423 */
424PFNRT g_apfnVBoxDrvIPRTDeps[] =
425{
426 /* VBoxNetAdp */
427 (PFNRT)RTRandBytes,
428 /* VBoxUSB */
429 (PFNRT)RTPathStripFilename,
430 NULL
431};
432#endif /* RT_OS_DARWIN || RT_OS_SOLARIS || RT_OS_SOLARIS */
433
434
435/**
436 * Initializes the device extentsion structure.
437 *
438 * @returns IPRT status code.
439 * @param pDevExt The device extension to initialize.
440 * @param cbSession The size of the session structure. The size of
441 * SUPDRVSESSION may be smaller when SUPDRV_AGNOSTIC is
442 * defined because we're skipping the OS specific members
443 * then.
444 */
445int VBOXCALL supdrvInitDevExt(PSUPDRVDEVEXT pDevExt, size_t cbSession)
446{
447 int rc;
448
449#ifdef SUPDRV_WITH_RELEASE_LOGGER
450 /*
451 * Create the release log.
452 */
453 static const char * const s_apszGroups[] = VBOX_LOGGROUP_NAMES;
454 PRTLOGGER pRelLogger;
455 rc = RTLogCreate(&pRelLogger, 0 /* fFlags */, "all",
456 "VBOX_RELEASE_LOG", RT_ELEMENTS(s_apszGroups), s_apszGroups, RTLOGDEST_STDOUT | RTLOGDEST_DEBUGGER, NULL);
457 if (RT_SUCCESS(rc))
458 RTLogRelSetDefaultInstance(pRelLogger);
459 /** @todo Add native hook for getting logger config parameters and setting
460 * them. On linux we should use the module parameter stuff... */
461#endif
462
463 /*
464 * Initialize it.
465 */
466 memset(pDevExt, 0, sizeof(*pDevExt));
467 rc = RTSpinlockCreate(&pDevExt->Spinlock, RTSPINLOCK_FLAGS_INTERRUPT_SAFE, "SUPDrvDevExt");
468 if (RT_SUCCESS(rc))
469 {
470 rc = RTSpinlockCreate(&pDevExt->hGipSpinlock, RTSPINLOCK_FLAGS_INTERRUPT_SAFE, "SUPDrvGip");
471 if (RT_SUCCESS(rc))
472 {
473#ifdef SUPDRV_USE_MUTEX_FOR_LDR
474 rc = RTSemMutexCreate(&pDevExt->mtxLdr);
475#else
476 rc = RTSemFastMutexCreate(&pDevExt->mtxLdr);
477#endif
478 if (RT_SUCCESS(rc))
479 {
480 rc = RTSemFastMutexCreate(&pDevExt->mtxComponentFactory);
481 if (RT_SUCCESS(rc))
482 {
483#ifdef SUPDRV_USE_MUTEX_FOR_LDR
484 rc = RTSemMutexCreate(&pDevExt->mtxGip);
485#else
486 rc = RTSemFastMutexCreate(&pDevExt->mtxGip);
487#endif
488 if (RT_SUCCESS(rc))
489 {
490 rc = supdrvGipCreate(pDevExt);
491 if (RT_SUCCESS(rc))
492 {
493 rc = supdrvTracerInit(pDevExt);
494 if (RT_SUCCESS(rc))
495 {
496 pDevExt->pLdrInitImage = NULL;
497 pDevExt->hLdrInitThread = NIL_RTNATIVETHREAD;
498 pDevExt->u32Cookie = BIRD; /** @todo make this random? */
499 pDevExt->cbSession = (uint32_t)cbSession;
500
501 /*
502 * Fixup the absolute symbols.
503 *
504 * Because of the table indexing assumptions we'll have a little #ifdef orgy
505 * here rather than distributing this to OS specific files. At least for now.
506 */
507#ifdef RT_OS_DARWIN
508# if ARCH_BITS == 32
509 if (SUPR0GetPagingMode() >= SUPPAGINGMODE_AMD64)
510 {
511 g_aFunctions[0].pfn = (void *)1; /* SUPR0AbsIs64bit */
512 g_aFunctions[1].pfn = (void *)0x80; /* SUPR0Abs64bitKernelCS - KERNEL64_CS, seg.h */
513 g_aFunctions[2].pfn = (void *)0x88; /* SUPR0Abs64bitKernelSS - KERNEL64_SS, seg.h */
514 g_aFunctions[3].pfn = (void *)0x88; /* SUPR0Abs64bitKernelDS - KERNEL64_SS, seg.h */
515 }
516 else
517 g_aFunctions[0].pfn = g_aFunctions[1].pfn = g_aFunctions[2].pfn = g_aFunctions[4].pfn = (void *)0;
518 g_aFunctions[4].pfn = (void *)0x08; /* SUPR0AbsKernelCS - KERNEL_CS, seg.h */
519 g_aFunctions[5].pfn = (void *)0x10; /* SUPR0AbsKernelSS - KERNEL_DS, seg.h */
520 g_aFunctions[6].pfn = (void *)0x10; /* SUPR0AbsKernelDS - KERNEL_DS, seg.h */
521 g_aFunctions[7].pfn = (void *)0x10; /* SUPR0AbsKernelES - KERNEL_DS, seg.h */
522 g_aFunctions[8].pfn = (void *)0x10; /* SUPR0AbsKernelFS - KERNEL_DS, seg.h */
523 g_aFunctions[9].pfn = (void *)0x48; /* SUPR0AbsKernelGS - CPU_DATA_GS, seg.h */
524# else /* 64-bit darwin: */
525 g_aFunctions[0].pfn = (void *)1; /* SUPR0AbsIs64bit */
526 g_aFunctions[1].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0Abs64bitKernelCS */
527 g_aFunctions[2].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0Abs64bitKernelSS */
528 g_aFunctions[3].pfn = (void *)0; /* SUPR0Abs64bitKernelDS */
529 g_aFunctions[4].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0AbsKernelCS */
530 g_aFunctions[5].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0AbsKernelSS */
531 g_aFunctions[6].pfn = (void *)0; /* SUPR0AbsKernelDS */
532 g_aFunctions[7].pfn = (void *)0; /* SUPR0AbsKernelES */
533 g_aFunctions[8].pfn = (void *)0; /* SUPR0AbsKernelFS */
534 g_aFunctions[9].pfn = (void *)0; /* SUPR0AbsKernelGS */
535
536# endif
537#else /* !RT_OS_DARWIN */
538# if ARCH_BITS == 64
539 g_aFunctions[0].pfn = (void *)1; /* SUPR0AbsIs64bit */
540 g_aFunctions[1].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0Abs64bitKernelCS */
541 g_aFunctions[2].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0Abs64bitKernelSS */
542 g_aFunctions[3].pfn = (void *)(uintptr_t)ASMGetDS(); /* SUPR0Abs64bitKernelDS */
543# else
544 g_aFunctions[0].pfn = g_aFunctions[1].pfn = g_aFunctions[2].pfn = g_aFunctions[4].pfn = (void *)0;
545# endif
546 g_aFunctions[4].pfn = (void *)(uintptr_t)ASMGetCS(); /* SUPR0AbsKernelCS */
547 g_aFunctions[5].pfn = (void *)(uintptr_t)ASMGetSS(); /* SUPR0AbsKernelSS */
548 g_aFunctions[6].pfn = (void *)(uintptr_t)ASMGetDS(); /* SUPR0AbsKernelDS */
549 g_aFunctions[7].pfn = (void *)(uintptr_t)ASMGetES(); /* SUPR0AbsKernelES */
550 g_aFunctions[8].pfn = (void *)(uintptr_t)ASMGetFS(); /* SUPR0AbsKernelFS */
551 g_aFunctions[9].pfn = (void *)(uintptr_t)ASMGetGS(); /* SUPR0AbsKernelGS */
552#endif /* !RT_OS_DARWIN */
553 return VINF_SUCCESS;
554 }
555
556 supdrvGipDestroy(pDevExt);
557 }
558
559#ifdef SUPDRV_USE_MUTEX_FOR_GIP
560 RTSemMutexDestroy(pDevExt->mtxGip);
561 pDevExt->mtxGip = NIL_RTSEMMUTEX;
562#else
563 RTSemFastMutexDestroy(pDevExt->mtxGip);
564 pDevExt->mtxGip = NIL_RTSEMFASTMUTEX;
565#endif
566 }
567 RTSemFastMutexDestroy(pDevExt->mtxComponentFactory);
568 pDevExt->mtxComponentFactory = NIL_RTSEMFASTMUTEX;
569 }
570#ifdef SUPDRV_USE_MUTEX_FOR_LDR
571 RTSemMutexDestroy(pDevExt->mtxLdr);
572 pDevExt->mtxLdr = NIL_RTSEMMUTEX;
573#else
574 RTSemFastMutexDestroy(pDevExt->mtxLdr);
575 pDevExt->mtxLdr = NIL_RTSEMFASTMUTEX;
576#endif
577 }
578 RTSpinlockDestroy(pDevExt->hGipSpinlock);
579 pDevExt->hGipSpinlock = NIL_RTSPINLOCK;
580 }
581 RTSpinlockDestroy(pDevExt->Spinlock);
582 pDevExt->Spinlock = NIL_RTSPINLOCK;
583 }
584#ifdef SUPDRV_WITH_RELEASE_LOGGER
585 RTLogDestroy(RTLogRelSetDefaultInstance(NULL));
586 RTLogDestroy(RTLogSetDefaultInstance(NULL));
587#endif
588
589 return rc;
590}
591
592
593/**
594 * Delete the device extension (e.g. cleanup members).
595 *
596 * @param pDevExt The device extension to delete.
597 */
598void VBOXCALL supdrvDeleteDevExt(PSUPDRVDEVEXT pDevExt)
599{
600 PSUPDRVOBJ pObj;
601 PSUPDRVUSAGE pUsage;
602
603 /*
604 * Kill mutexes and spinlocks.
605 */
606#ifdef SUPDRV_USE_MUTEX_FOR_GIP
607 RTSemMutexDestroy(pDevExt->mtxGip);
608 pDevExt->mtxGip = NIL_RTSEMMUTEX;
609#else
610 RTSemFastMutexDestroy(pDevExt->mtxGip);
611 pDevExt->mtxGip = NIL_RTSEMFASTMUTEX;
612#endif
613#ifdef SUPDRV_USE_MUTEX_FOR_LDR
614 RTSemMutexDestroy(pDevExt->mtxLdr);
615 pDevExt->mtxLdr = NIL_RTSEMMUTEX;
616#else
617 RTSemFastMutexDestroy(pDevExt->mtxLdr);
618 pDevExt->mtxLdr = NIL_RTSEMFASTMUTEX;
619#endif
620 RTSpinlockDestroy(pDevExt->Spinlock);
621 pDevExt->Spinlock = NIL_RTSPINLOCK;
622 RTSemFastMutexDestroy(pDevExt->mtxComponentFactory);
623 pDevExt->mtxComponentFactory = NIL_RTSEMFASTMUTEX;
624
625 /*
626 * Free lists.
627 */
628 /* objects. */
629 pObj = pDevExt->pObjs;
630 Assert(!pObj); /* (can trigger on forced unloads) */
631 pDevExt->pObjs = NULL;
632 while (pObj)
633 {
634 void *pvFree = pObj;
635 pObj = pObj->pNext;
636 RTMemFree(pvFree);
637 }
638
639 /* usage records. */
640 pUsage = pDevExt->pUsageFree;
641 pDevExt->pUsageFree = NULL;
642 while (pUsage)
643 {
644 void *pvFree = pUsage;
645 pUsage = pUsage->pNext;
646 RTMemFree(pvFree);
647 }
648
649 /* kill the GIP. */
650 supdrvGipDestroy(pDevExt);
651 RTSpinlockDestroy(pDevExt->hGipSpinlock);
652 pDevExt->hGipSpinlock = NIL_RTSPINLOCK;
653
654 supdrvTracerTerm(pDevExt);
655
656#ifdef SUPDRV_WITH_RELEASE_LOGGER
657 /* destroy the loggers. */
658 RTLogDestroy(RTLogRelSetDefaultInstance(NULL));
659 RTLogDestroy(RTLogSetDefaultInstance(NULL));
660#endif
661}
662
663
664/**
665 * Create session.
666 *
667 * @returns IPRT status code.
668 * @param pDevExt Device extension.
669 * @param fUser Flag indicating whether this is a user or kernel
670 * session.
671 * @param fUnrestricted Unrestricted access (system) or restricted access
672 * (user)?
673 * @param ppSession Where to store the pointer to the session data.
674 */
675int VBOXCALL supdrvCreateSession(PSUPDRVDEVEXT pDevExt, bool fUser, bool fUnrestricted, PSUPDRVSESSION *ppSession)
676{
677 int rc;
678 PSUPDRVSESSION pSession;
679
680 if (!SUP_IS_DEVEXT_VALID(pDevExt))
681 return VERR_INVALID_PARAMETER;
682
683 /*
684 * Allocate memory for the session data.
685 */
686 pSession = *ppSession = (PSUPDRVSESSION)RTMemAllocZ(pDevExt->cbSession);
687 if (pSession)
688 {
689 /* Initialize session data. */
690 rc = RTSpinlockCreate(&pSession->Spinlock, RTSPINLOCK_FLAGS_INTERRUPT_UNSAFE, "SUPDrvSession");
691 if (!rc)
692 {
693 rc = RTHandleTableCreateEx(&pSession->hHandleTable,
694 RTHANDLETABLE_FLAGS_LOCKED_IRQ_SAFE | RTHANDLETABLE_FLAGS_CONTEXT,
695 1 /*uBase*/, 32768 /*cMax*/, supdrvSessionObjHandleRetain, pSession);
696 if (RT_SUCCESS(rc))
697 {
698 Assert(pSession->Spinlock != NIL_RTSPINLOCK);
699 pSession->pDevExt = pDevExt;
700 pSession->u32Cookie = BIRD_INV;
701 pSession->fUnrestricted = fUnrestricted;
702 pSession->cRefs = 1;
703 /*pSession->pLdrUsage = NULL;
704 pSession->pVM = NULL;
705 pSession->pUsage = NULL;
706 pSession->pGip = NULL;
707 pSession->fGipReferenced = false;
708 pSession->Bundle.cUsed = 0; */
709 pSession->Uid = NIL_RTUID;
710 pSession->Gid = NIL_RTGID;
711 if (fUser)
712 {
713 pSession->Process = RTProcSelf();
714 pSession->R0Process = RTR0ProcHandleSelf();
715 }
716 else
717 {
718 pSession->Process = NIL_RTPROCESS;
719 pSession->R0Process = NIL_RTR0PROCESS;
720 }
721 /*pSession->uTracerData = 0;*/
722 pSession->hTracerCaller = NIL_RTNATIVETHREAD;
723 RTListInit(&pSession->TpProviders);
724 /*pSession->cTpProviders = 0;*/
725 /*pSession->cTpProbesFiring = 0;*/
726 RTListInit(&pSession->TpUmods);
727 /*RT_ZERO(pSession->apTpLookupTable);*/
728
729 VBOXDRV_SESSION_CREATE(pSession, fUser);
730 LogFlow(("Created session %p initial cookie=%#x\n", pSession, pSession->u32Cookie));
731 return VINF_SUCCESS;
732 }
733
734 RTSpinlockDestroy(pSession->Spinlock);
735 }
736 RTMemFree(pSession);
737 *ppSession = NULL;
738 Log(("Failed to create spinlock, rc=%d!\n", rc));
739 }
740 else
741 rc = VERR_NO_MEMORY;
742
743 return rc;
744}
745
746
747/**
748 * Shared code for cleaning up a session (but not quite freeing it).
749 *
750 * This is primarily intended for MAC OS X where we have to clean up the memory
751 * stuff before the file handle is closed.
752 *
753 * @param pDevExt Device extension.
754 * @param pSession Session data.
755 * This data will be freed by this routine.
756 */
757static void supdrvCleanupSession(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession)
758{
759 int rc;
760 PSUPDRVBUNDLE pBundle;
761 LogFlow(("supdrvCleanupSession: pSession=%p\n", pSession));
762
763 /*
764 * Remove logger instances related to this session.
765 */
766 RTLogSetDefaultInstanceThread(NULL, (uintptr_t)pSession);
767
768 /*
769 * Destroy the handle table.
770 */
771 rc = RTHandleTableDestroy(pSession->hHandleTable, supdrvSessionObjHandleDelete, pSession);
772 AssertRC(rc);
773 pSession->hHandleTable = NIL_RTHANDLETABLE;
774
775 /*
776 * Release object references made in this session.
777 * In theory there should be noone racing us in this session.
778 */
779 Log2(("release objects - start\n"));
780 if (pSession->pUsage)
781 {
782 PSUPDRVUSAGE pUsage;
783 RTSpinlockAcquire(pDevExt->Spinlock);
784
785 while ((pUsage = pSession->pUsage) != NULL)
786 {
787 PSUPDRVOBJ pObj = pUsage->pObj;
788 pSession->pUsage = pUsage->pNext;
789
790 AssertMsg(pUsage->cUsage >= 1 && pObj->cUsage >= pUsage->cUsage, ("glob %d; sess %d\n", pObj->cUsage, pUsage->cUsage));
791 if (pUsage->cUsage < pObj->cUsage)
792 {
793 pObj->cUsage -= pUsage->cUsage;
794 RTSpinlockRelease(pDevExt->Spinlock);
795 }
796 else
797 {
798 /* Destroy the object and free the record. */
799 if (pDevExt->pObjs == pObj)
800 pDevExt->pObjs = pObj->pNext;
801 else
802 {
803 PSUPDRVOBJ pObjPrev;
804 for (pObjPrev = pDevExt->pObjs; pObjPrev; pObjPrev = pObjPrev->pNext)
805 if (pObjPrev->pNext == pObj)
806 {
807 pObjPrev->pNext = pObj->pNext;
808 break;
809 }
810 Assert(pObjPrev);
811 }
812 RTSpinlockRelease(pDevExt->Spinlock);
813
814 Log(("supdrvCleanupSession: destroying %p/%d (%p/%p) cpid=%RTproc pid=%RTproc dtor=%p\n",
815 pObj, pObj->enmType, pObj->pvUser1, pObj->pvUser2, pObj->CreatorProcess, RTProcSelf(), pObj->pfnDestructor));
816 if (pObj->pfnDestructor)
817 pObj->pfnDestructor(pObj, pObj->pvUser1, pObj->pvUser2);
818 RTMemFree(pObj);
819 }
820
821 /* free it and continue. */
822 RTMemFree(pUsage);
823
824 RTSpinlockAcquire(pDevExt->Spinlock);
825 }
826
827 RTSpinlockRelease(pDevExt->Spinlock);
828 AssertMsg(!pSession->pUsage, ("Some buster reregistered an object during desturction!\n"));
829 }
830 Log2(("release objects - done\n"));
831
832 /*
833 * Do tracer cleanups related to this session.
834 */
835 Log2(("release tracer stuff - start\n"));
836 supdrvTracerCleanupSession(pDevExt, pSession);
837 Log2(("release tracer stuff - end\n"));
838
839 /*
840 * Release memory allocated in the session.
841 *
842 * We do not serialize this as we assume that the application will
843 * not allocated memory while closing the file handle object.
844 */
845 Log2(("freeing memory:\n"));
846 pBundle = &pSession->Bundle;
847 while (pBundle)
848 {
849 PSUPDRVBUNDLE pToFree;
850 unsigned i;
851
852 /*
853 * Check and unlock all entries in the bundle.
854 */
855 for (i = 0; i < RT_ELEMENTS(pBundle->aMem); i++)
856 {
857 if (pBundle->aMem[i].MemObj != NIL_RTR0MEMOBJ)
858 {
859 Log2(("eType=%d pvR0=%p pvR3=%p cb=%ld\n", pBundle->aMem[i].eType, RTR0MemObjAddress(pBundle->aMem[i].MemObj),
860 (void *)RTR0MemObjAddressR3(pBundle->aMem[i].MapObjR3), (long)RTR0MemObjSize(pBundle->aMem[i].MemObj)));
861 if (pBundle->aMem[i].MapObjR3 != NIL_RTR0MEMOBJ)
862 {
863 rc = RTR0MemObjFree(pBundle->aMem[i].MapObjR3, false);
864 AssertRC(rc); /** @todo figure out how to handle this. */
865 pBundle->aMem[i].MapObjR3 = NIL_RTR0MEMOBJ;
866 }
867 rc = RTR0MemObjFree(pBundle->aMem[i].MemObj, true /* fFreeMappings */);
868 AssertRC(rc); /** @todo figure out how to handle this. */
869 pBundle->aMem[i].MemObj = NIL_RTR0MEMOBJ;
870 pBundle->aMem[i].eType = MEMREF_TYPE_UNUSED;
871 }
872 }
873
874 /*
875 * Advance and free previous bundle.
876 */
877 pToFree = pBundle;
878 pBundle = pBundle->pNext;
879
880 pToFree->pNext = NULL;
881 pToFree->cUsed = 0;
882 if (pToFree != &pSession->Bundle)
883 RTMemFree(pToFree);
884 }
885 Log2(("freeing memory - done\n"));
886
887 /*
888 * Deregister component factories.
889 */
890 RTSemFastMutexRequest(pDevExt->mtxComponentFactory);
891 Log2(("deregistering component factories:\n"));
892 if (pDevExt->pComponentFactoryHead)
893 {
894 PSUPDRVFACTORYREG pPrev = NULL;
895 PSUPDRVFACTORYREG pCur = pDevExt->pComponentFactoryHead;
896 while (pCur)
897 {
898 if (pCur->pSession == pSession)
899 {
900 /* unlink it */
901 PSUPDRVFACTORYREG pNext = pCur->pNext;
902 if (pPrev)
903 pPrev->pNext = pNext;
904 else
905 pDevExt->pComponentFactoryHead = pNext;
906
907 /* free it */
908 pCur->pNext = NULL;
909 pCur->pSession = NULL;
910 pCur->pFactory = NULL;
911 RTMemFree(pCur);
912
913 /* next */
914 pCur = pNext;
915 }
916 else
917 {
918 /* next */
919 pPrev = pCur;
920 pCur = pCur->pNext;
921 }
922 }
923 }
924 RTSemFastMutexRelease(pDevExt->mtxComponentFactory);
925 Log2(("deregistering component factories - done\n"));
926
927 /*
928 * Loaded images needs to be dereferenced and possibly freed up.
929 */
930 supdrvLdrLock(pDevExt);
931 Log2(("freeing images:\n"));
932 if (pSession->pLdrUsage)
933 {
934 PSUPDRVLDRUSAGE pUsage = pSession->pLdrUsage;
935 pSession->pLdrUsage = NULL;
936 while (pUsage)
937 {
938 void *pvFree = pUsage;
939 PSUPDRVLDRIMAGE pImage = pUsage->pImage;
940 if (pImage->cUsage > pUsage->cUsage)
941 pImage->cUsage -= pUsage->cUsage;
942 else
943 supdrvLdrFree(pDevExt, pImage);
944 pUsage->pImage = NULL;
945 pUsage = pUsage->pNext;
946 RTMemFree(pvFree);
947 }
948 }
949 supdrvLdrUnlock(pDevExt);
950 Log2(("freeing images - done\n"));
951
952 /*
953 * Unmap the GIP.
954 */
955 Log2(("umapping GIP:\n"));
956 if (pSession->GipMapObjR3 != NIL_RTR0MEMOBJ)
957 {
958 SUPR0GipUnmap(pSession);
959 pSession->fGipReferenced = 0;
960 }
961 Log2(("umapping GIP - done\n"));
962}
963
964
965/**
966 * Shared code for cleaning up a session.
967 *
968 * @param pDevExt Device extension.
969 * @param pSession Session data.
970 * This data will be freed by this routine.
971 */
972static void supdrvCloseSession(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession)
973{
974 VBOXDRV_SESSION_CLOSE(pSession);
975
976 /*
977 * Cleanup the session first.
978 */
979 supdrvCleanupSession(pDevExt, pSession);
980
981 /*
982 * Free the rest of the session stuff.
983 */
984 RTSpinlockDestroy(pSession->Spinlock);
985 pSession->Spinlock = NIL_RTSPINLOCK;
986 pSession->pDevExt = NULL;
987 RTMemFree(pSession);
988 LogFlow(("supdrvCloseSession: returns\n"));
989}
990
991
992/**
993 * Retain a session to make sure it doesn't go away while it is in use.
994 *
995 * @returns New reference count on success, UINT32_MAX on failure.
996 * @param pSession Session data.
997 */
998uint32_t VBOXCALL supdrvSessionRetain(PSUPDRVSESSION pSession)
999{
1000 uint32_t cRefs;
1001 AssertPtrReturn(pSession, UINT32_MAX);
1002 AssertReturn(SUP_IS_SESSION_VALID(pSession), UINT32_MAX);
1003
1004 cRefs = ASMAtomicIncU32(&pSession->cRefs);
1005 AssertMsg(cRefs > 1 && cRefs < _1M, ("%#x %p\n", cRefs, pSession));
1006 return cRefs;
1007}
1008
1009
1010/**
1011 * Releases a given session.
1012 *
1013 * @returns New reference count on success (0 if closed), UINT32_MAX on failure.
1014 * @param pSession Session data.
1015 */
1016uint32_t VBOXCALL supdrvSessionRelease(PSUPDRVSESSION pSession)
1017{
1018 uint32_t cRefs;
1019 AssertPtrReturn(pSession, UINT32_MAX);
1020 AssertReturn(SUP_IS_SESSION_VALID(pSession), UINT32_MAX);
1021
1022 cRefs = ASMAtomicDecU32(&pSession->cRefs);
1023 AssertMsg(cRefs < _1M, ("%#x %p\n", cRefs, pSession));
1024 if (cRefs == 0)
1025 supdrvCloseSession(pSession->pDevExt, pSession);
1026 return cRefs;
1027}
1028
1029
1030/**
1031 * RTHandleTableDestroy callback used by supdrvCleanupSession.
1032 *
1033 * @returns IPRT status code, see SUPR0ObjAddRef.
1034 * @param hHandleTable The handle table handle. Ignored.
1035 * @param pvObj The object pointer.
1036 * @param pvCtx Context, the handle type. Ignored.
1037 * @param pvUser Session pointer.
1038 */
1039static DECLCALLBACK(int) supdrvSessionObjHandleRetain(RTHANDLETABLE hHandleTable, void *pvObj, void *pvCtx, void *pvUser)
1040{
1041 NOREF(pvCtx);
1042 NOREF(hHandleTable);
1043 return SUPR0ObjAddRefEx(pvObj, (PSUPDRVSESSION)pvUser, true /*fNoBlocking*/);
1044}
1045
1046
1047/**
1048 * RTHandleTableDestroy callback used by supdrvCleanupSession.
1049 *
1050 * @param hHandleTable The handle table handle. Ignored.
1051 * @param h The handle value. Ignored.
1052 * @param pvObj The object pointer.
1053 * @param pvCtx Context, the handle type. Ignored.
1054 * @param pvUser Session pointer.
1055 */
1056static DECLCALLBACK(void) supdrvSessionObjHandleDelete(RTHANDLETABLE hHandleTable, uint32_t h, void *pvObj, void *pvCtx, void *pvUser)
1057{
1058 NOREF(pvCtx);
1059 NOREF(h);
1060 NOREF(hHandleTable);
1061 SUPR0ObjRelease(pvObj, (PSUPDRVSESSION)pvUser);
1062}
1063
1064
1065/**
1066 * Fast path I/O Control worker.
1067 *
1068 * @returns VBox status code that should be passed down to ring-3 unchanged.
1069 * @param uIOCtl Function number.
1070 * @param idCpu VMCPU id.
1071 * @param pDevExt Device extention.
1072 * @param pSession Session data.
1073 */
1074int VBOXCALL supdrvIOCtlFast(uintptr_t uIOCtl, VMCPUID idCpu, PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession)
1075{
1076 /*
1077 * We check the two prereqs after doing this only to allow the compiler to optimize things better.
1078 */
1079 if (RT_LIKELY( RT_VALID_PTR(pSession)
1080 && pSession->pVM
1081 && pDevExt->pfnVMMR0EntryFast))
1082 {
1083 switch (uIOCtl)
1084 {
1085 case SUP_IOCTL_FAST_DO_RAW_RUN:
1086 pDevExt->pfnVMMR0EntryFast(pSession->pVM, idCpu, SUP_VMMR0_DO_RAW_RUN);
1087 break;
1088 case SUP_IOCTL_FAST_DO_HM_RUN:
1089 pDevExt->pfnVMMR0EntryFast(pSession->pVM, idCpu, SUP_VMMR0_DO_HM_RUN);
1090 break;
1091 case SUP_IOCTL_FAST_DO_NOP:
1092 pDevExt->pfnVMMR0EntryFast(pSession->pVM, idCpu, SUP_VMMR0_DO_NOP);
1093 break;
1094 default:
1095 return VERR_INTERNAL_ERROR;
1096 }
1097 return VINF_SUCCESS;
1098 }
1099 return VERR_INTERNAL_ERROR;
1100}
1101
1102
1103/**
1104 * Helper for supdrvIOCtl. Check if pszStr contains any character of pszChars.
1105 * We would use strpbrk here if this function would be contained in the RedHat kABI white
1106 * list, see http://www.kerneldrivers.org/RHEL5.
1107 *
1108 * @returns 1 if pszStr does contain any character of pszChars, 0 otherwise.
1109 * @param pszStr String to check
1110 * @param pszChars Character set
1111 */
1112static int supdrvCheckInvalidChar(const char *pszStr, const char *pszChars)
1113{
1114 int chCur;
1115 while ((chCur = *pszStr++) != '\0')
1116 {
1117 int ch;
1118 const char *psz = pszChars;
1119 while ((ch = *psz++) != '\0')
1120 if (ch == chCur)
1121 return 1;
1122
1123 }
1124 return 0;
1125}
1126
1127
1128
1129/**
1130 * I/O Control inner worker (tracing reasons).
1131 *
1132 * @returns IPRT status code.
1133 * @retval VERR_INVALID_PARAMETER if the request is invalid.
1134 *
1135 * @param uIOCtl Function number.
1136 * @param pDevExt Device extention.
1137 * @param pSession Session data.
1138 * @param pReqHdr The request header.
1139 */
1140static int supdrvIOCtlInnerUnrestricted(uintptr_t uIOCtl, PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPREQHDR pReqHdr)
1141{
1142 /*
1143 * Validation macros
1144 */
1145#define REQ_CHECK_SIZES_EX(Name, cbInExpect, cbOutExpect) \
1146 do { \
1147 if (RT_UNLIKELY(pReqHdr->cbIn != (cbInExpect) || pReqHdr->cbOut != (cbOutExpect))) \
1148 { \
1149 OSDBGPRINT(( #Name ": Invalid input/output sizes. cbIn=%ld expected %ld. cbOut=%ld expected %ld.\n", \
1150 (long)pReqHdr->cbIn, (long)(cbInExpect), (long)pReqHdr->cbOut, (long)(cbOutExpect))); \
1151 return pReqHdr->rc = VERR_INVALID_PARAMETER; \
1152 } \
1153 } while (0)
1154
1155#define REQ_CHECK_SIZES(Name) REQ_CHECK_SIZES_EX(Name, Name ## _SIZE_IN, Name ## _SIZE_OUT)
1156
1157#define REQ_CHECK_SIZE_IN(Name, cbInExpect) \
1158 do { \
1159 if (RT_UNLIKELY(pReqHdr->cbIn != (cbInExpect))) \
1160 { \
1161 OSDBGPRINT(( #Name ": Invalid input/output sizes. cbIn=%ld expected %ld.\n", \
1162 (long)pReqHdr->cbIn, (long)(cbInExpect))); \
1163 return pReqHdr->rc = VERR_INVALID_PARAMETER; \
1164 } \
1165 } while (0)
1166
1167#define REQ_CHECK_SIZE_OUT(Name, cbOutExpect) \
1168 do { \
1169 if (RT_UNLIKELY(pReqHdr->cbOut != (cbOutExpect))) \
1170 { \
1171 OSDBGPRINT(( #Name ": Invalid input/output sizes. cbOut=%ld expected %ld.\n", \
1172 (long)pReqHdr->cbOut, (long)(cbOutExpect))); \
1173 return pReqHdr->rc = VERR_INVALID_PARAMETER; \
1174 } \
1175 } while (0)
1176
1177#define REQ_CHECK_EXPR(Name, expr) \
1178 do { \
1179 if (RT_UNLIKELY(!(expr))) \
1180 { \
1181 OSDBGPRINT(( #Name ": %s\n", #expr)); \
1182 return pReqHdr->rc = VERR_INVALID_PARAMETER; \
1183 } \
1184 } while (0)
1185
1186#define REQ_CHECK_EXPR_FMT(expr, fmt) \
1187 do { \
1188 if (RT_UNLIKELY(!(expr))) \
1189 { \
1190 OSDBGPRINT( fmt ); \
1191 return pReqHdr->rc = VERR_INVALID_PARAMETER; \
1192 } \
1193 } while (0)
1194
1195 /*
1196 * The switch.
1197 */
1198 switch (SUP_CTL_CODE_NO_SIZE(uIOCtl))
1199 {
1200 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_COOKIE):
1201 {
1202 PSUPCOOKIE pReq = (PSUPCOOKIE)pReqHdr;
1203 REQ_CHECK_SIZES(SUP_IOCTL_COOKIE);
1204 if (strncmp(pReq->u.In.szMagic, SUPCOOKIE_MAGIC, sizeof(pReq->u.In.szMagic)))
1205 {
1206 OSDBGPRINT(("SUP_IOCTL_COOKIE: invalid magic %.16s\n", pReq->u.In.szMagic));
1207 pReq->Hdr.rc = VERR_INVALID_MAGIC;
1208 return 0;
1209 }
1210
1211#if 0
1212 /*
1213 * Call out to the OS specific code and let it do permission checks on the
1214 * client process.
1215 */
1216 if (!supdrvOSValidateClientProcess(pDevExt, pSession))
1217 {
1218 pReq->u.Out.u32Cookie = 0xffffffff;
1219 pReq->u.Out.u32SessionCookie = 0xffffffff;
1220 pReq->u.Out.u32SessionVersion = 0xffffffff;
1221 pReq->u.Out.u32DriverVersion = SUPDRV_IOC_VERSION;
1222 pReq->u.Out.pSession = NULL;
1223 pReq->u.Out.cFunctions = 0;
1224 pReq->Hdr.rc = VERR_PERMISSION_DENIED;
1225 return 0;
1226 }
1227#endif
1228
1229 /*
1230 * Match the version.
1231 * The current logic is very simple, match the major interface version.
1232 */
1233 if ( pReq->u.In.u32MinVersion > SUPDRV_IOC_VERSION
1234 || (pReq->u.In.u32MinVersion & 0xffff0000) != (SUPDRV_IOC_VERSION & 0xffff0000))
1235 {
1236 OSDBGPRINT(("SUP_IOCTL_COOKIE: Version mismatch. Requested: %#x Min: %#x Current: %#x\n",
1237 pReq->u.In.u32ReqVersion, pReq->u.In.u32MinVersion, SUPDRV_IOC_VERSION));
1238 pReq->u.Out.u32Cookie = 0xffffffff;
1239 pReq->u.Out.u32SessionCookie = 0xffffffff;
1240 pReq->u.Out.u32SessionVersion = 0xffffffff;
1241 pReq->u.Out.u32DriverVersion = SUPDRV_IOC_VERSION;
1242 pReq->u.Out.pSession = NULL;
1243 pReq->u.Out.cFunctions = 0;
1244 pReq->Hdr.rc = VERR_VERSION_MISMATCH;
1245 return 0;
1246 }
1247
1248 /*
1249 * Fill in return data and be gone.
1250 * N.B. The first one to change SUPDRV_IOC_VERSION shall makes sure that
1251 * u32SessionVersion <= u32ReqVersion!
1252 */
1253 /** @todo Somehow validate the client and negotiate a secure cookie... */
1254 pReq->u.Out.u32Cookie = pDevExt->u32Cookie;
1255 pReq->u.Out.u32SessionCookie = pSession->u32Cookie;
1256 pReq->u.Out.u32SessionVersion = SUPDRV_IOC_VERSION;
1257 pReq->u.Out.u32DriverVersion = SUPDRV_IOC_VERSION;
1258 pReq->u.Out.pSession = pSession;
1259 pReq->u.Out.cFunctions = sizeof(g_aFunctions) / sizeof(g_aFunctions[0]);
1260 pReq->Hdr.rc = VINF_SUCCESS;
1261 return 0;
1262 }
1263
1264 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_QUERY_FUNCS(0)):
1265 {
1266 /* validate */
1267 PSUPQUERYFUNCS pReq = (PSUPQUERYFUNCS)pReqHdr;
1268 REQ_CHECK_SIZES_EX(SUP_IOCTL_QUERY_FUNCS, SUP_IOCTL_QUERY_FUNCS_SIZE_IN, SUP_IOCTL_QUERY_FUNCS_SIZE_OUT(RT_ELEMENTS(g_aFunctions)));
1269
1270 /* execute */
1271 pReq->u.Out.cFunctions = RT_ELEMENTS(g_aFunctions);
1272 memcpy(&pReq->u.Out.aFunctions[0], g_aFunctions, sizeof(g_aFunctions));
1273 pReq->Hdr.rc = VINF_SUCCESS;
1274 return 0;
1275 }
1276
1277 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_PAGE_LOCK):
1278 {
1279 /* validate */
1280 PSUPPAGELOCK pReq = (PSUPPAGELOCK)pReqHdr;
1281 REQ_CHECK_SIZE_IN(SUP_IOCTL_PAGE_LOCK, SUP_IOCTL_PAGE_LOCK_SIZE_IN);
1282 REQ_CHECK_SIZE_OUT(SUP_IOCTL_PAGE_LOCK, SUP_IOCTL_PAGE_LOCK_SIZE_OUT(pReq->u.In.cPages));
1283 REQ_CHECK_EXPR(SUP_IOCTL_PAGE_LOCK, pReq->u.In.cPages > 0);
1284 REQ_CHECK_EXPR(SUP_IOCTL_PAGE_LOCK, pReq->u.In.pvR3 >= PAGE_SIZE);
1285
1286 /* execute */
1287 pReq->Hdr.rc = SUPR0LockMem(pSession, pReq->u.In.pvR3, pReq->u.In.cPages, &pReq->u.Out.aPages[0]);
1288 if (RT_FAILURE(pReq->Hdr.rc))
1289 pReq->Hdr.cbOut = sizeof(pReq->Hdr);
1290 return 0;
1291 }
1292
1293 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_PAGE_UNLOCK):
1294 {
1295 /* validate */
1296 PSUPPAGEUNLOCK pReq = (PSUPPAGEUNLOCK)pReqHdr;
1297 REQ_CHECK_SIZES(SUP_IOCTL_PAGE_UNLOCK);
1298
1299 /* execute */
1300 pReq->Hdr.rc = SUPR0UnlockMem(pSession, pReq->u.In.pvR3);
1301 return 0;
1302 }
1303
1304 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_CONT_ALLOC):
1305 {
1306 /* validate */
1307 PSUPCONTALLOC pReq = (PSUPCONTALLOC)pReqHdr;
1308 REQ_CHECK_SIZES(SUP_IOCTL_CONT_ALLOC);
1309
1310 /* execute */
1311 pReq->Hdr.rc = SUPR0ContAlloc(pSession, pReq->u.In.cPages, &pReq->u.Out.pvR0, &pReq->u.Out.pvR3, &pReq->u.Out.HCPhys);
1312 if (RT_FAILURE(pReq->Hdr.rc))
1313 pReq->Hdr.cbOut = sizeof(pReq->Hdr);
1314 return 0;
1315 }
1316
1317 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_CONT_FREE):
1318 {
1319 /* validate */
1320 PSUPCONTFREE pReq = (PSUPCONTFREE)pReqHdr;
1321 REQ_CHECK_SIZES(SUP_IOCTL_CONT_FREE);
1322
1323 /* execute */
1324 pReq->Hdr.rc = SUPR0ContFree(pSession, (RTHCUINTPTR)pReq->u.In.pvR3);
1325 return 0;
1326 }
1327
1328 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_LDR_OPEN):
1329 {
1330 /* validate */
1331 PSUPLDROPEN pReq = (PSUPLDROPEN)pReqHdr;
1332 REQ_CHECK_SIZES(SUP_IOCTL_LDR_OPEN);
1333 REQ_CHECK_EXPR(SUP_IOCTL_LDR_OPEN, pReq->u.In.cbImageWithTabs > 0);
1334 REQ_CHECK_EXPR(SUP_IOCTL_LDR_OPEN, pReq->u.In.cbImageWithTabs < 16*_1M);
1335 REQ_CHECK_EXPR(SUP_IOCTL_LDR_OPEN, pReq->u.In.cbImageBits > 0);
1336 REQ_CHECK_EXPR(SUP_IOCTL_LDR_OPEN, pReq->u.In.cbImageBits > 0);
1337 REQ_CHECK_EXPR(SUP_IOCTL_LDR_OPEN, pReq->u.In.cbImageBits < pReq->u.In.cbImageWithTabs);
1338 REQ_CHECK_EXPR(SUP_IOCTL_LDR_OPEN, pReq->u.In.szName[0]);
1339 REQ_CHECK_EXPR(SUP_IOCTL_LDR_OPEN, RTStrEnd(pReq->u.In.szName, sizeof(pReq->u.In.szName)));
1340 REQ_CHECK_EXPR(SUP_IOCTL_LDR_OPEN, !supdrvCheckInvalidChar(pReq->u.In.szName, ";:()[]{}/\\|&*%#@!~`\"'"));
1341 REQ_CHECK_EXPR(SUP_IOCTL_LDR_OPEN, RTStrEnd(pReq->u.In.szFilename, sizeof(pReq->u.In.szFilename)));
1342
1343 /* execute */
1344 pReq->Hdr.rc = supdrvIOCtl_LdrOpen(pDevExt, pSession, pReq);
1345 return 0;
1346 }
1347
1348 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_LDR_LOAD):
1349 {
1350 /* validate */
1351 PSUPLDRLOAD pReq = (PSUPLDRLOAD)pReqHdr;
1352 REQ_CHECK_EXPR(Name, pReq->Hdr.cbIn >= sizeof(*pReq));
1353 REQ_CHECK_SIZES_EX(SUP_IOCTL_LDR_LOAD, SUP_IOCTL_LDR_LOAD_SIZE_IN(pReq->u.In.cbImageWithTabs), SUP_IOCTL_LDR_LOAD_SIZE_OUT);
1354 REQ_CHECK_EXPR(SUP_IOCTL_LDR_LOAD, pReq->u.In.cSymbols <= 16384);
1355 REQ_CHECK_EXPR_FMT( !pReq->u.In.cSymbols
1356 || ( pReq->u.In.offSymbols < pReq->u.In.cbImageWithTabs
1357 && pReq->u.In.offSymbols + pReq->u.In.cSymbols * sizeof(SUPLDRSYM) <= pReq->u.In.cbImageWithTabs),
1358 ("SUP_IOCTL_LDR_LOAD: offSymbols=%#lx cSymbols=%#lx cbImageWithTabs=%#lx\n", (long)pReq->u.In.offSymbols,
1359 (long)pReq->u.In.cSymbols, (long)pReq->u.In.cbImageWithTabs));
1360 REQ_CHECK_EXPR_FMT( !pReq->u.In.cbStrTab
1361 || ( pReq->u.In.offStrTab < pReq->u.In.cbImageWithTabs
1362 && pReq->u.In.offStrTab + pReq->u.In.cbStrTab <= pReq->u.In.cbImageWithTabs
1363 && pReq->u.In.cbStrTab <= pReq->u.In.cbImageWithTabs),
1364 ("SUP_IOCTL_LDR_LOAD: offStrTab=%#lx cbStrTab=%#lx cbImageWithTabs=%#lx\n", (long)pReq->u.In.offStrTab,
1365 (long)pReq->u.In.cbStrTab, (long)pReq->u.In.cbImageWithTabs));
1366
1367 if (pReq->u.In.cSymbols)
1368 {
1369 uint32_t i;
1370 PSUPLDRSYM paSyms = (PSUPLDRSYM)&pReq->u.In.abImage[pReq->u.In.offSymbols];
1371 for (i = 0; i < pReq->u.In.cSymbols; i++)
1372 {
1373 REQ_CHECK_EXPR_FMT(paSyms[i].offSymbol < pReq->u.In.cbImageWithTabs,
1374 ("SUP_IOCTL_LDR_LOAD: sym #%ld: symb off %#lx (max=%#lx)\n", (long)i, (long)paSyms[i].offSymbol, (long)pReq->u.In.cbImageWithTabs));
1375 REQ_CHECK_EXPR_FMT(paSyms[i].offName < pReq->u.In.cbStrTab,
1376 ("SUP_IOCTL_LDR_LOAD: sym #%ld: name off %#lx (max=%#lx)\n", (long)i, (long)paSyms[i].offName, (long)pReq->u.In.cbImageWithTabs));
1377 REQ_CHECK_EXPR_FMT(RTStrEnd((char const *)&pReq->u.In.abImage[pReq->u.In.offStrTab + paSyms[i].offName],
1378 pReq->u.In.cbStrTab - paSyms[i].offName),
1379 ("SUP_IOCTL_LDR_LOAD: sym #%ld: unterminated name! (%#lx / %#lx)\n", (long)i, (long)paSyms[i].offName, (long)pReq->u.In.cbImageWithTabs));
1380 }
1381 }
1382
1383 /* execute */
1384 pReq->Hdr.rc = supdrvIOCtl_LdrLoad(pDevExt, pSession, pReq);
1385 return 0;
1386 }
1387
1388 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_LDR_FREE):
1389 {
1390 /* validate */
1391 PSUPLDRFREE pReq = (PSUPLDRFREE)pReqHdr;
1392 REQ_CHECK_SIZES(SUP_IOCTL_LDR_FREE);
1393
1394 /* execute */
1395 pReq->Hdr.rc = supdrvIOCtl_LdrFree(pDevExt, pSession, pReq);
1396 return 0;
1397 }
1398
1399 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_LDR_GET_SYMBOL):
1400 {
1401 /* validate */
1402 PSUPLDRGETSYMBOL pReq = (PSUPLDRGETSYMBOL)pReqHdr;
1403 REQ_CHECK_SIZES(SUP_IOCTL_LDR_GET_SYMBOL);
1404 REQ_CHECK_EXPR(SUP_IOCTL_LDR_GET_SYMBOL, RTStrEnd(pReq->u.In.szSymbol, sizeof(pReq->u.In.szSymbol)));
1405
1406 /* execute */
1407 pReq->Hdr.rc = supdrvIOCtl_LdrGetSymbol(pDevExt, pSession, pReq);
1408 return 0;
1409 }
1410
1411 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_CALL_VMMR0(0)):
1412 {
1413 /* validate */
1414 PSUPCALLVMMR0 pReq = (PSUPCALLVMMR0)pReqHdr;
1415 Log4(("SUP_IOCTL_CALL_VMMR0: op=%u in=%u arg=%RX64 p/t=%RTproc/%RTthrd\n",
1416 pReq->u.In.uOperation, pReq->Hdr.cbIn, pReq->u.In.u64Arg, RTProcSelf(), RTThreadNativeSelf()));
1417
1418 if (pReq->Hdr.cbIn == SUP_IOCTL_CALL_VMMR0_SIZE(0))
1419 {
1420 REQ_CHECK_SIZES_EX(SUP_IOCTL_CALL_VMMR0, SUP_IOCTL_CALL_VMMR0_SIZE_IN(0), SUP_IOCTL_CALL_VMMR0_SIZE_OUT(0));
1421
1422 /* execute */
1423 if (RT_LIKELY(pDevExt->pfnVMMR0EntryEx))
1424 pReq->Hdr.rc = pDevExt->pfnVMMR0EntryEx(pReq->u.In.pVMR0, pReq->u.In.idCpu, pReq->u.In.uOperation, NULL, pReq->u.In.u64Arg, pSession);
1425 else
1426 pReq->Hdr.rc = VERR_WRONG_ORDER;
1427 }
1428 else
1429 {
1430 PSUPVMMR0REQHDR pVMMReq = (PSUPVMMR0REQHDR)&pReq->abReqPkt[0];
1431 REQ_CHECK_EXPR_FMT(pReq->Hdr.cbIn >= SUP_IOCTL_CALL_VMMR0_SIZE(sizeof(SUPVMMR0REQHDR)),
1432 ("SUP_IOCTL_CALL_VMMR0: cbIn=%#x < %#lx\n", pReq->Hdr.cbIn, SUP_IOCTL_CALL_VMMR0_SIZE(sizeof(SUPVMMR0REQHDR))));
1433 REQ_CHECK_EXPR(SUP_IOCTL_CALL_VMMR0, pVMMReq->u32Magic == SUPVMMR0REQHDR_MAGIC);
1434 REQ_CHECK_SIZES_EX(SUP_IOCTL_CALL_VMMR0, SUP_IOCTL_CALL_VMMR0_SIZE_IN(pVMMReq->cbReq), SUP_IOCTL_CALL_VMMR0_SIZE_OUT(pVMMReq->cbReq));
1435
1436 /* execute */
1437 if (RT_LIKELY(pDevExt->pfnVMMR0EntryEx))
1438 pReq->Hdr.rc = pDevExt->pfnVMMR0EntryEx(pReq->u.In.pVMR0, pReq->u.In.idCpu, pReq->u.In.uOperation, pVMMReq, pReq->u.In.u64Arg, pSession);
1439 else
1440 pReq->Hdr.rc = VERR_WRONG_ORDER;
1441 }
1442
1443 if ( RT_FAILURE(pReq->Hdr.rc)
1444 && pReq->Hdr.rc != VERR_INTERRUPTED
1445 && pReq->Hdr.rc != VERR_TIMEOUT)
1446 Log(("SUP_IOCTL_CALL_VMMR0: rc=%Rrc op=%u out=%u arg=%RX64 p/t=%RTproc/%RTthrd\n",
1447 pReq->Hdr.rc, pReq->u.In.uOperation, pReq->Hdr.cbOut, pReq->u.In.u64Arg, RTProcSelf(), RTThreadNativeSelf()));
1448 else
1449 Log4(("SUP_IOCTL_CALL_VMMR0: rc=%Rrc op=%u out=%u arg=%RX64 p/t=%RTproc/%RTthrd\n",
1450 pReq->Hdr.rc, pReq->u.In.uOperation, pReq->Hdr.cbOut, pReq->u.In.u64Arg, RTProcSelf(), RTThreadNativeSelf()));
1451 return 0;
1452 }
1453
1454 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_CALL_VMMR0_BIG):
1455 {
1456 /* validate */
1457 PSUPCALLVMMR0 pReq = (PSUPCALLVMMR0)pReqHdr;
1458 PSUPVMMR0REQHDR pVMMReq;
1459 Log4(("SUP_IOCTL_CALL_VMMR0_BIG: op=%u in=%u arg=%RX64 p/t=%RTproc/%RTthrd\n",
1460 pReq->u.In.uOperation, pReq->Hdr.cbIn, pReq->u.In.u64Arg, RTProcSelf(), RTThreadNativeSelf()));
1461
1462 pVMMReq = (PSUPVMMR0REQHDR)&pReq->abReqPkt[0];
1463 REQ_CHECK_EXPR_FMT(pReq->Hdr.cbIn >= SUP_IOCTL_CALL_VMMR0_BIG_SIZE(sizeof(SUPVMMR0REQHDR)),
1464 ("SUP_IOCTL_CALL_VMMR0_BIG: cbIn=%#x < %#lx\n", pReq->Hdr.cbIn, SUP_IOCTL_CALL_VMMR0_BIG_SIZE(sizeof(SUPVMMR0REQHDR))));
1465 REQ_CHECK_EXPR(SUP_IOCTL_CALL_VMMR0_BIG, pVMMReq->u32Magic == SUPVMMR0REQHDR_MAGIC);
1466 REQ_CHECK_SIZES_EX(SUP_IOCTL_CALL_VMMR0_BIG, SUP_IOCTL_CALL_VMMR0_BIG_SIZE_IN(pVMMReq->cbReq), SUP_IOCTL_CALL_VMMR0_BIG_SIZE_OUT(pVMMReq->cbReq));
1467
1468 /* execute */
1469 if (RT_LIKELY(pDevExt->pfnVMMR0EntryEx))
1470 pReq->Hdr.rc = pDevExt->pfnVMMR0EntryEx(pReq->u.In.pVMR0, pReq->u.In.idCpu, pReq->u.In.uOperation, pVMMReq, pReq->u.In.u64Arg, pSession);
1471 else
1472 pReq->Hdr.rc = VERR_WRONG_ORDER;
1473
1474 if ( RT_FAILURE(pReq->Hdr.rc)
1475 && pReq->Hdr.rc != VERR_INTERRUPTED
1476 && pReq->Hdr.rc != VERR_TIMEOUT)
1477 Log(("SUP_IOCTL_CALL_VMMR0_BIG: rc=%Rrc op=%u out=%u arg=%RX64 p/t=%RTproc/%RTthrd\n",
1478 pReq->Hdr.rc, pReq->u.In.uOperation, pReq->Hdr.cbOut, pReq->u.In.u64Arg, RTProcSelf(), RTThreadNativeSelf()));
1479 else
1480 Log4(("SUP_IOCTL_CALL_VMMR0_BIG: rc=%Rrc op=%u out=%u arg=%RX64 p/t=%RTproc/%RTthrd\n",
1481 pReq->Hdr.rc, pReq->u.In.uOperation, pReq->Hdr.cbOut, pReq->u.In.u64Arg, RTProcSelf(), RTThreadNativeSelf()));
1482 return 0;
1483 }
1484
1485 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_GET_PAGING_MODE):
1486 {
1487 /* validate */
1488 PSUPGETPAGINGMODE pReq = (PSUPGETPAGINGMODE)pReqHdr;
1489 REQ_CHECK_SIZES(SUP_IOCTL_GET_PAGING_MODE);
1490
1491 /* execute */
1492 pReq->Hdr.rc = VINF_SUCCESS;
1493 pReq->u.Out.enmMode = SUPR0GetPagingMode();
1494 return 0;
1495 }
1496
1497 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_LOW_ALLOC):
1498 {
1499 /* validate */
1500 PSUPLOWALLOC pReq = (PSUPLOWALLOC)pReqHdr;
1501 REQ_CHECK_EXPR(SUP_IOCTL_LOW_ALLOC, pReq->Hdr.cbIn <= SUP_IOCTL_LOW_ALLOC_SIZE_IN);
1502 REQ_CHECK_SIZES_EX(SUP_IOCTL_LOW_ALLOC, SUP_IOCTL_LOW_ALLOC_SIZE_IN, SUP_IOCTL_LOW_ALLOC_SIZE_OUT(pReq->u.In.cPages));
1503
1504 /* execute */
1505 pReq->Hdr.rc = SUPR0LowAlloc(pSession, pReq->u.In.cPages, &pReq->u.Out.pvR0, &pReq->u.Out.pvR3, &pReq->u.Out.aPages[0]);
1506 if (RT_FAILURE(pReq->Hdr.rc))
1507 pReq->Hdr.cbOut = sizeof(pReq->Hdr);
1508 return 0;
1509 }
1510
1511 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_LOW_FREE):
1512 {
1513 /* validate */
1514 PSUPLOWFREE pReq = (PSUPLOWFREE)pReqHdr;
1515 REQ_CHECK_SIZES(SUP_IOCTL_LOW_FREE);
1516
1517 /* execute */
1518 pReq->Hdr.rc = SUPR0LowFree(pSession, (RTHCUINTPTR)pReq->u.In.pvR3);
1519 return 0;
1520 }
1521
1522 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_GIP_MAP):
1523 {
1524 /* validate */
1525 PSUPGIPMAP pReq = (PSUPGIPMAP)pReqHdr;
1526 REQ_CHECK_SIZES(SUP_IOCTL_GIP_MAP);
1527
1528 /* execute */
1529 pReq->Hdr.rc = SUPR0GipMap(pSession, &pReq->u.Out.pGipR3, &pReq->u.Out.HCPhysGip);
1530 if (RT_SUCCESS(pReq->Hdr.rc))
1531 pReq->u.Out.pGipR0 = pDevExt->pGip;
1532 return 0;
1533 }
1534
1535 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_GIP_UNMAP):
1536 {
1537 /* validate */
1538 PSUPGIPUNMAP pReq = (PSUPGIPUNMAP)pReqHdr;
1539 REQ_CHECK_SIZES(SUP_IOCTL_GIP_UNMAP);
1540
1541 /* execute */
1542 pReq->Hdr.rc = SUPR0GipUnmap(pSession);
1543 return 0;
1544 }
1545
1546 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_SET_VM_FOR_FAST):
1547 {
1548 /* validate */
1549 PSUPSETVMFORFAST pReq = (PSUPSETVMFORFAST)pReqHdr;
1550 REQ_CHECK_SIZES(SUP_IOCTL_SET_VM_FOR_FAST);
1551 REQ_CHECK_EXPR_FMT( !pReq->u.In.pVMR0
1552 || ( VALID_PTR(pReq->u.In.pVMR0)
1553 && !((uintptr_t)pReq->u.In.pVMR0 & (PAGE_SIZE - 1))),
1554 ("SUP_IOCTL_SET_VM_FOR_FAST: pVMR0=%p!\n", pReq->u.In.pVMR0));
1555 /* execute */
1556 pSession->pVM = pReq->u.In.pVMR0;
1557 pReq->Hdr.rc = VINF_SUCCESS;
1558 return 0;
1559 }
1560
1561 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_PAGE_ALLOC_EX):
1562 {
1563 /* validate */
1564 PSUPPAGEALLOCEX pReq = (PSUPPAGEALLOCEX)pReqHdr;
1565 REQ_CHECK_EXPR(SUP_IOCTL_PAGE_ALLOC_EX, pReq->Hdr.cbIn <= SUP_IOCTL_PAGE_ALLOC_EX_SIZE_IN);
1566 REQ_CHECK_SIZES_EX(SUP_IOCTL_PAGE_ALLOC_EX, SUP_IOCTL_PAGE_ALLOC_EX_SIZE_IN, SUP_IOCTL_PAGE_ALLOC_EX_SIZE_OUT(pReq->u.In.cPages));
1567 REQ_CHECK_EXPR_FMT(pReq->u.In.fKernelMapping || pReq->u.In.fUserMapping,
1568 ("SUP_IOCTL_PAGE_ALLOC_EX: No mapping requested!\n"));
1569 REQ_CHECK_EXPR_FMT(pReq->u.In.fUserMapping,
1570 ("SUP_IOCTL_PAGE_ALLOC_EX: Must have user mapping!\n"));
1571 REQ_CHECK_EXPR_FMT(!pReq->u.In.fReserved0 && !pReq->u.In.fReserved1,
1572 ("SUP_IOCTL_PAGE_ALLOC_EX: fReserved0=%d fReserved1=%d\n", pReq->u.In.fReserved0, pReq->u.In.fReserved1));
1573
1574 /* execute */
1575 pReq->Hdr.rc = SUPR0PageAllocEx(pSession, pReq->u.In.cPages, 0 /* fFlags */,
1576 pReq->u.In.fUserMapping ? &pReq->u.Out.pvR3 : NULL,
1577 pReq->u.In.fKernelMapping ? &pReq->u.Out.pvR0 : NULL,
1578 &pReq->u.Out.aPages[0]);
1579 if (RT_FAILURE(pReq->Hdr.rc))
1580 pReq->Hdr.cbOut = sizeof(pReq->Hdr);
1581 return 0;
1582 }
1583
1584 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_PAGE_MAP_KERNEL):
1585 {
1586 /* validate */
1587 PSUPPAGEMAPKERNEL pReq = (PSUPPAGEMAPKERNEL)pReqHdr;
1588 REQ_CHECK_SIZES(SUP_IOCTL_PAGE_MAP_KERNEL);
1589 REQ_CHECK_EXPR_FMT(!pReq->u.In.fFlags, ("SUP_IOCTL_PAGE_MAP_KERNEL: fFlags=%#x! MBZ\n", pReq->u.In.fFlags));
1590 REQ_CHECK_EXPR_FMT(!(pReq->u.In.offSub & PAGE_OFFSET_MASK), ("SUP_IOCTL_PAGE_MAP_KERNEL: offSub=%#x\n", pReq->u.In.offSub));
1591 REQ_CHECK_EXPR_FMT(pReq->u.In.cbSub && !(pReq->u.In.cbSub & PAGE_OFFSET_MASK),
1592 ("SUP_IOCTL_PAGE_MAP_KERNEL: cbSub=%#x\n", pReq->u.In.cbSub));
1593
1594 /* execute */
1595 pReq->Hdr.rc = SUPR0PageMapKernel(pSession, pReq->u.In.pvR3, pReq->u.In.offSub, pReq->u.In.cbSub,
1596 pReq->u.In.fFlags, &pReq->u.Out.pvR0);
1597 if (RT_FAILURE(pReq->Hdr.rc))
1598 pReq->Hdr.cbOut = sizeof(pReq->Hdr);
1599 return 0;
1600 }
1601
1602 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_PAGE_PROTECT):
1603 {
1604 /* validate */
1605 PSUPPAGEPROTECT pReq = (PSUPPAGEPROTECT)pReqHdr;
1606 REQ_CHECK_SIZES(SUP_IOCTL_PAGE_PROTECT);
1607 REQ_CHECK_EXPR_FMT(!(pReq->u.In.fProt & ~(RTMEM_PROT_READ | RTMEM_PROT_WRITE | RTMEM_PROT_EXEC | RTMEM_PROT_NONE)),
1608 ("SUP_IOCTL_PAGE_PROTECT: fProt=%#x!\n", pReq->u.In.fProt));
1609 REQ_CHECK_EXPR_FMT(!(pReq->u.In.offSub & PAGE_OFFSET_MASK), ("SUP_IOCTL_PAGE_PROTECT: offSub=%#x\n", pReq->u.In.offSub));
1610 REQ_CHECK_EXPR_FMT(pReq->u.In.cbSub && !(pReq->u.In.cbSub & PAGE_OFFSET_MASK),
1611 ("SUP_IOCTL_PAGE_PROTECT: cbSub=%#x\n", pReq->u.In.cbSub));
1612
1613 /* execute */
1614 pReq->Hdr.rc = SUPR0PageProtect(pSession, pReq->u.In.pvR3, pReq->u.In.pvR0, pReq->u.In.offSub, pReq->u.In.cbSub, pReq->u.In.fProt);
1615 return 0;
1616 }
1617
1618 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_PAGE_FREE):
1619 {
1620 /* validate */
1621 PSUPPAGEFREE pReq = (PSUPPAGEFREE)pReqHdr;
1622 REQ_CHECK_SIZES(SUP_IOCTL_PAGE_FREE);
1623
1624 /* execute */
1625 pReq->Hdr.rc = SUPR0PageFree(pSession, pReq->u.In.pvR3);
1626 return 0;
1627 }
1628
1629 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_CALL_SERVICE(0)):
1630 {
1631 /* validate */
1632 PSUPCALLSERVICE pReq = (PSUPCALLSERVICE)pReqHdr;
1633 Log4(("SUP_IOCTL_CALL_SERVICE: op=%u in=%u arg=%RX64 p/t=%RTproc/%RTthrd\n",
1634 pReq->u.In.uOperation, pReq->Hdr.cbIn, pReq->u.In.u64Arg, RTProcSelf(), RTThreadNativeSelf()));
1635
1636 if (pReq->Hdr.cbIn == SUP_IOCTL_CALL_SERVICE_SIZE(0))
1637 REQ_CHECK_SIZES_EX(SUP_IOCTL_CALL_SERVICE, SUP_IOCTL_CALL_SERVICE_SIZE_IN(0), SUP_IOCTL_CALL_SERVICE_SIZE_OUT(0));
1638 else
1639 {
1640 PSUPR0SERVICEREQHDR pSrvReq = (PSUPR0SERVICEREQHDR)&pReq->abReqPkt[0];
1641 REQ_CHECK_EXPR_FMT(pReq->Hdr.cbIn >= SUP_IOCTL_CALL_SERVICE_SIZE(sizeof(SUPR0SERVICEREQHDR)),
1642 ("SUP_IOCTL_CALL_SERVICE: cbIn=%#x < %#lx\n", pReq->Hdr.cbIn, SUP_IOCTL_CALL_SERVICE_SIZE(sizeof(SUPR0SERVICEREQHDR))));
1643 REQ_CHECK_EXPR(SUP_IOCTL_CALL_SERVICE, pSrvReq->u32Magic == SUPR0SERVICEREQHDR_MAGIC);
1644 REQ_CHECK_SIZES_EX(SUP_IOCTL_CALL_SERVICE, SUP_IOCTL_CALL_SERVICE_SIZE_IN(pSrvReq->cbReq), SUP_IOCTL_CALL_SERVICE_SIZE_OUT(pSrvReq->cbReq));
1645 }
1646 REQ_CHECK_EXPR(SUP_IOCTL_CALL_SERVICE, RTStrEnd(pReq->u.In.szName, sizeof(pReq->u.In.szName)));
1647
1648 /* execute */
1649 pReq->Hdr.rc = supdrvIOCtl_CallServiceModule(pDevExt, pSession, pReq);
1650 return 0;
1651 }
1652
1653 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_LOGGER_SETTINGS(0)):
1654 {
1655 /* validate */
1656 PSUPLOGGERSETTINGS pReq = (PSUPLOGGERSETTINGS)pReqHdr;
1657 size_t cbStrTab;
1658 REQ_CHECK_SIZE_OUT(SUP_IOCTL_LOGGER_SETTINGS, SUP_IOCTL_LOGGER_SETTINGS_SIZE_OUT);
1659 REQ_CHECK_EXPR(SUP_IOCTL_LOGGER_SETTINGS, pReq->Hdr.cbIn >= SUP_IOCTL_LOGGER_SETTINGS_SIZE_IN(1));
1660 cbStrTab = pReq->Hdr.cbIn - SUP_IOCTL_LOGGER_SETTINGS_SIZE_IN(0);
1661 REQ_CHECK_EXPR(SUP_IOCTL_LOGGER_SETTINGS, pReq->u.In.offGroups < cbStrTab);
1662 REQ_CHECK_EXPR(SUP_IOCTL_LOGGER_SETTINGS, pReq->u.In.offFlags < cbStrTab);
1663 REQ_CHECK_EXPR(SUP_IOCTL_LOGGER_SETTINGS, pReq->u.In.offDestination < cbStrTab);
1664 REQ_CHECK_EXPR_FMT(pReq->u.In.szStrings[cbStrTab - 1] == '\0',
1665 ("SUP_IOCTL_LOGGER_SETTINGS: cbIn=%#x cbStrTab=%#zx LastChar=%d\n",
1666 pReq->Hdr.cbIn, cbStrTab, pReq->u.In.szStrings[cbStrTab - 1]));
1667 REQ_CHECK_EXPR(SUP_IOCTL_LOGGER_SETTINGS, pReq->u.In.fWhich <= SUPLOGGERSETTINGS_WHICH_RELEASE);
1668 REQ_CHECK_EXPR(SUP_IOCTL_LOGGER_SETTINGS, pReq->u.In.fWhat <= SUPLOGGERSETTINGS_WHAT_DESTROY);
1669
1670 /* execute */
1671 pReq->Hdr.rc = supdrvIOCtl_LoggerSettings(pDevExt, pSession, pReq);
1672 return 0;
1673 }
1674
1675 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_SEM_OP2):
1676 {
1677 /* validate */
1678 PSUPSEMOP2 pReq = (PSUPSEMOP2)pReqHdr;
1679 REQ_CHECK_SIZES_EX(SUP_IOCTL_SEM_OP2, SUP_IOCTL_SEM_OP2_SIZE_IN, SUP_IOCTL_SEM_OP2_SIZE_OUT);
1680 REQ_CHECK_EXPR(SUP_IOCTL_SEM_OP2, pReq->u.In.uReserved == 0);
1681
1682 /* execute */
1683 switch (pReq->u.In.uType)
1684 {
1685 case SUP_SEM_TYPE_EVENT:
1686 {
1687 SUPSEMEVENT hEvent = (SUPSEMEVENT)(uintptr_t)pReq->u.In.hSem;
1688 switch (pReq->u.In.uOp)
1689 {
1690 case SUPSEMOP2_WAIT_MS_REL:
1691 pReq->Hdr.rc = SUPSemEventWaitNoResume(pSession, hEvent, pReq->u.In.uArg.cRelMsTimeout);
1692 break;
1693 case SUPSEMOP2_WAIT_NS_ABS:
1694 pReq->Hdr.rc = SUPSemEventWaitNsAbsIntr(pSession, hEvent, pReq->u.In.uArg.uAbsNsTimeout);
1695 break;
1696 case SUPSEMOP2_WAIT_NS_REL:
1697 pReq->Hdr.rc = SUPSemEventWaitNsRelIntr(pSession, hEvent, pReq->u.In.uArg.cRelNsTimeout);
1698 break;
1699 case SUPSEMOP2_SIGNAL:
1700 pReq->Hdr.rc = SUPSemEventSignal(pSession, hEvent);
1701 break;
1702 case SUPSEMOP2_CLOSE:
1703 pReq->Hdr.rc = SUPSemEventClose(pSession, hEvent);
1704 break;
1705 case SUPSEMOP2_RESET:
1706 default:
1707 pReq->Hdr.rc = VERR_INVALID_FUNCTION;
1708 break;
1709 }
1710 break;
1711 }
1712
1713 case SUP_SEM_TYPE_EVENT_MULTI:
1714 {
1715 SUPSEMEVENTMULTI hEventMulti = (SUPSEMEVENTMULTI)(uintptr_t)pReq->u.In.hSem;
1716 switch (pReq->u.In.uOp)
1717 {
1718 case SUPSEMOP2_WAIT_MS_REL:
1719 pReq->Hdr.rc = SUPSemEventMultiWaitNoResume(pSession, hEventMulti, pReq->u.In.uArg.cRelMsTimeout);
1720 break;
1721 case SUPSEMOP2_WAIT_NS_ABS:
1722 pReq->Hdr.rc = SUPSemEventMultiWaitNsAbsIntr(pSession, hEventMulti, pReq->u.In.uArg.uAbsNsTimeout);
1723 break;
1724 case SUPSEMOP2_WAIT_NS_REL:
1725 pReq->Hdr.rc = SUPSemEventMultiWaitNsRelIntr(pSession, hEventMulti, pReq->u.In.uArg.cRelNsTimeout);
1726 break;
1727 case SUPSEMOP2_SIGNAL:
1728 pReq->Hdr.rc = SUPSemEventMultiSignal(pSession, hEventMulti);
1729 break;
1730 case SUPSEMOP2_CLOSE:
1731 pReq->Hdr.rc = SUPSemEventMultiClose(pSession, hEventMulti);
1732 break;
1733 case SUPSEMOP2_RESET:
1734 pReq->Hdr.rc = SUPSemEventMultiReset(pSession, hEventMulti);
1735 break;
1736 default:
1737 pReq->Hdr.rc = VERR_INVALID_FUNCTION;
1738 break;
1739 }
1740 break;
1741 }
1742
1743 default:
1744 pReq->Hdr.rc = VERR_INVALID_PARAMETER;
1745 break;
1746 }
1747 return 0;
1748 }
1749
1750 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_SEM_OP3):
1751 {
1752 /* validate */
1753 PSUPSEMOP3 pReq = (PSUPSEMOP3)pReqHdr;
1754 REQ_CHECK_SIZES_EX(SUP_IOCTL_SEM_OP3, SUP_IOCTL_SEM_OP3_SIZE_IN, SUP_IOCTL_SEM_OP3_SIZE_OUT);
1755 REQ_CHECK_EXPR(SUP_IOCTL_SEM_OP3, pReq->u.In.u32Reserved == 0 && pReq->u.In.u64Reserved == 0);
1756
1757 /* execute */
1758 switch (pReq->u.In.uType)
1759 {
1760 case SUP_SEM_TYPE_EVENT:
1761 {
1762 SUPSEMEVENT hEvent = (SUPSEMEVENT)(uintptr_t)pReq->u.In.hSem;
1763 switch (pReq->u.In.uOp)
1764 {
1765 case SUPSEMOP3_CREATE:
1766 REQ_CHECK_EXPR(SUP_IOCTL_SEM_OP3, hEvent == NIL_SUPSEMEVENT);
1767 pReq->Hdr.rc = SUPSemEventCreate(pSession, &hEvent);
1768 pReq->u.Out.hSem = (uint32_t)(uintptr_t)hEvent;
1769 break;
1770 case SUPSEMOP3_GET_RESOLUTION:
1771 REQ_CHECK_EXPR(SUP_IOCTL_SEM_OP3, hEvent == NIL_SUPSEMEVENT);
1772 pReq->Hdr.rc = VINF_SUCCESS;
1773 pReq->Hdr.cbOut = sizeof(*pReq);
1774 pReq->u.Out.cNsResolution = SUPSemEventGetResolution(pSession);
1775 break;
1776 default:
1777 pReq->Hdr.rc = VERR_INVALID_FUNCTION;
1778 break;
1779 }
1780 break;
1781 }
1782
1783 case SUP_SEM_TYPE_EVENT_MULTI:
1784 {
1785 SUPSEMEVENTMULTI hEventMulti = (SUPSEMEVENTMULTI)(uintptr_t)pReq->u.In.hSem;
1786 switch (pReq->u.In.uOp)
1787 {
1788 case SUPSEMOP3_CREATE:
1789 REQ_CHECK_EXPR(SUP_IOCTL_SEM_OP3, hEventMulti == NIL_SUPSEMEVENTMULTI);
1790 pReq->Hdr.rc = SUPSemEventMultiCreate(pSession, &hEventMulti);
1791 pReq->u.Out.hSem = (uint32_t)(uintptr_t)hEventMulti;
1792 break;
1793 case SUPSEMOP3_GET_RESOLUTION:
1794 REQ_CHECK_EXPR(SUP_IOCTL_SEM_OP3, hEventMulti == NIL_SUPSEMEVENTMULTI);
1795 pReq->Hdr.rc = VINF_SUCCESS;
1796 pReq->u.Out.cNsResolution = SUPSemEventMultiGetResolution(pSession);
1797 break;
1798 default:
1799 pReq->Hdr.rc = VERR_INVALID_FUNCTION;
1800 break;
1801 }
1802 break;
1803 }
1804
1805 default:
1806 pReq->Hdr.rc = VERR_INVALID_PARAMETER;
1807 break;
1808 }
1809 return 0;
1810 }
1811
1812 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_VT_CAPS):
1813 {
1814 /* validate */
1815 PSUPVTCAPS pReq = (PSUPVTCAPS)pReqHdr;
1816 REQ_CHECK_SIZES(SUP_IOCTL_VT_CAPS);
1817
1818 /* execute */
1819 pReq->Hdr.rc = SUPR0QueryVTCaps(pSession, &pReq->u.Out.Caps);
1820 if (RT_FAILURE(pReq->Hdr.rc))
1821 pReq->Hdr.cbOut = sizeof(pReq->Hdr);
1822 return 0;
1823 }
1824
1825 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_TRACER_OPEN):
1826 {
1827 /* validate */
1828 PSUPTRACEROPEN pReq = (PSUPTRACEROPEN)pReqHdr;
1829 REQ_CHECK_SIZES(SUP_IOCTL_TRACER_OPEN);
1830
1831 /* execute */
1832 pReq->Hdr.rc = supdrvIOCtl_TracerOpen(pDevExt, pSession, pReq->u.In.uCookie, pReq->u.In.uArg);
1833 return 0;
1834 }
1835
1836 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_TRACER_CLOSE):
1837 {
1838 /* validate */
1839 REQ_CHECK_SIZES(SUP_IOCTL_TRACER_CLOSE);
1840
1841 /* execute */
1842 pReqHdr->rc = supdrvIOCtl_TracerClose(pDevExt, pSession);
1843 return 0;
1844 }
1845
1846 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_TRACER_IOCTL):
1847 {
1848 /* validate */
1849 PSUPTRACERIOCTL pReq = (PSUPTRACERIOCTL)pReqHdr;
1850 REQ_CHECK_SIZES(SUP_IOCTL_TRACER_IOCTL);
1851
1852 /* execute */
1853 pReqHdr->rc = supdrvIOCtl_TracerIOCtl(pDevExt, pSession, pReq->u.In.uCmd, pReq->u.In.uArg, &pReq->u.Out.iRetVal);
1854 return 0;
1855 }
1856
1857 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_TRACER_UMOD_REG):
1858 {
1859 /* validate */
1860 PSUPTRACERUMODREG pReq = (PSUPTRACERUMODREG)pReqHdr;
1861 REQ_CHECK_SIZES(SUP_IOCTL_TRACER_UMOD_REG);
1862 if (!RTStrEnd(pReq->u.In.szName, sizeof(pReq->u.In.szName)))
1863 return VERR_INVALID_PARAMETER;
1864
1865 /* execute */
1866 pReqHdr->rc = supdrvIOCtl_TracerUmodRegister(pDevExt, pSession,
1867 pReq->u.In.R3PtrVtgHdr, pReq->u.In.uVtgHdrAddr,
1868 pReq->u.In.R3PtrStrTab, pReq->u.In.cbStrTab,
1869 pReq->u.In.szName, pReq->u.In.fFlags);
1870 return 0;
1871 }
1872
1873 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_TRACER_UMOD_DEREG):
1874 {
1875 /* validate */
1876 PSUPTRACERUMODDEREG pReq = (PSUPTRACERUMODDEREG)pReqHdr;
1877 REQ_CHECK_SIZES(SUP_IOCTL_TRACER_UMOD_DEREG);
1878
1879 /* execute */
1880 pReqHdr->rc = supdrvIOCtl_TracerUmodDeregister(pDevExt, pSession, pReq->u.In.pVtgHdr);
1881 return 0;
1882 }
1883
1884 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_TRACER_UMOD_FIRE_PROBE):
1885 {
1886 /* validate */
1887 PSUPTRACERUMODFIREPROBE pReq = (PSUPTRACERUMODFIREPROBE)pReqHdr;
1888 REQ_CHECK_SIZES(SUP_IOCTL_TRACER_UMOD_FIRE_PROBE);
1889
1890 supdrvIOCtl_TracerUmodProbeFire(pDevExt, pSession, &pReq->u.In);
1891 pReqHdr->rc = VINF_SUCCESS;
1892 return 0;
1893 }
1894
1895 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_MSR_PROBER):
1896 {
1897 /* validate */
1898 PSUPMSRPROBER pReq = (PSUPMSRPROBER)pReqHdr;
1899 REQ_CHECK_SIZES(SUP_IOCTL_MSR_PROBER);
1900 REQ_CHECK_EXPR(SUP_IOCTL_MSR_PROBER,
1901 pReq->u.In.enmOp > SUPMSRPROBEROP_INVALID && pReq->u.In.enmOp < SUPMSRPROBEROP_END);
1902
1903 pReqHdr->rc = supdrvIOCtl_MsrProber(pDevExt, pReq);
1904 return 0;
1905 }
1906
1907 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_RESUME_SUSPENDED_KBDS):
1908 {
1909 /* validate */
1910 REQ_CHECK_SIZES(SUP_IOCTL_RESUME_SUSPENDED_KBDS);
1911
1912 pReqHdr->rc = supdrvIOCtl_ResumeSuspendedKbds();
1913 return 0;
1914 }
1915
1916 default:
1917 Log(("Unknown IOCTL %#lx\n", (long)uIOCtl));
1918 break;
1919 }
1920 return VERR_GENERAL_FAILURE;
1921}
1922
1923
1924/**
1925 * I/O Control inner worker for the restricted operations.
1926 *
1927 * @returns IPRT status code.
1928 * @retval VERR_INVALID_PARAMETER if the request is invalid.
1929 *
1930 * @param uIOCtl Function number.
1931 * @param pDevExt Device extention.
1932 * @param pSession Session data.
1933 * @param pReqHdr The request header.
1934 */
1935static int supdrvIOCtlInnerRestricted(uintptr_t uIOCtl, PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPREQHDR pReqHdr)
1936{
1937 /*
1938 * The switch.
1939 */
1940 switch (SUP_CTL_CODE_NO_SIZE(uIOCtl))
1941 {
1942 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_COOKIE):
1943 {
1944 PSUPCOOKIE pReq = (PSUPCOOKIE)pReqHdr;
1945 REQ_CHECK_SIZES(SUP_IOCTL_COOKIE);
1946 if (strncmp(pReq->u.In.szMagic, SUPCOOKIE_MAGIC, sizeof(pReq->u.In.szMagic)))
1947 {
1948 OSDBGPRINT(("SUP_IOCTL_COOKIE: invalid magic %.16s\n", pReq->u.In.szMagic));
1949 pReq->Hdr.rc = VERR_INVALID_MAGIC;
1950 return 0;
1951 }
1952
1953 /*
1954 * Match the version.
1955 * The current logic is very simple, match the major interface version.
1956 */
1957 if ( pReq->u.In.u32MinVersion > SUPDRV_IOC_VERSION
1958 || (pReq->u.In.u32MinVersion & 0xffff0000) != (SUPDRV_IOC_VERSION & 0xffff0000))
1959 {
1960 OSDBGPRINT(("SUP_IOCTL_COOKIE: Version mismatch. Requested: %#x Min: %#x Current: %#x\n",
1961 pReq->u.In.u32ReqVersion, pReq->u.In.u32MinVersion, SUPDRV_IOC_VERSION));
1962 pReq->u.Out.u32Cookie = 0xffffffff;
1963 pReq->u.Out.u32SessionCookie = 0xffffffff;
1964 pReq->u.Out.u32SessionVersion = 0xffffffff;
1965 pReq->u.Out.u32DriverVersion = SUPDRV_IOC_VERSION;
1966 pReq->u.Out.pSession = NULL;
1967 pReq->u.Out.cFunctions = 0;
1968 pReq->Hdr.rc = VERR_VERSION_MISMATCH;
1969 return 0;
1970 }
1971
1972 /*
1973 * Fill in return data and be gone.
1974 * N.B. The first one to change SUPDRV_IOC_VERSION shall makes sure that
1975 * u32SessionVersion <= u32ReqVersion!
1976 */
1977 /** @todo Somehow validate the client and negotiate a secure cookie... */
1978 pReq->u.Out.u32Cookie = pDevExt->u32Cookie;
1979 pReq->u.Out.u32SessionCookie = pSession->u32Cookie;
1980 pReq->u.Out.u32SessionVersion = SUPDRV_IOC_VERSION;
1981 pReq->u.Out.u32DriverVersion = SUPDRV_IOC_VERSION;
1982 pReq->u.Out.pSession = pSession;
1983 pReq->u.Out.cFunctions = 0;
1984 pReq->Hdr.rc = VINF_SUCCESS;
1985 return 0;
1986 }
1987
1988 case SUP_CTL_CODE_NO_SIZE(SUP_IOCTL_VT_CAPS):
1989 {
1990 /* validate */
1991 PSUPVTCAPS pReq = (PSUPVTCAPS)pReqHdr;
1992 REQ_CHECK_SIZES(SUP_IOCTL_VT_CAPS);
1993
1994 /* execute */
1995 pReq->Hdr.rc = SUPR0QueryVTCaps(pSession, &pReq->u.Out.Caps);
1996 if (RT_FAILURE(pReq->Hdr.rc))
1997 pReq->Hdr.cbOut = sizeof(pReq->Hdr);
1998 return 0;
1999 }
2000
2001 default:
2002 Log(("Unknown IOCTL %#lx\n", (long)uIOCtl));
2003 break;
2004 }
2005 return VERR_GENERAL_FAILURE;
2006}
2007
2008
2009/**
2010 * I/O Control worker.
2011 *
2012 * @returns IPRT status code.
2013 * @retval VERR_INVALID_PARAMETER if the request is invalid.
2014 *
2015 * @param uIOCtl Function number.
2016 * @param pDevExt Device extention.
2017 * @param pSession Session data.
2018 * @param pReqHdr The request header.
2019 */
2020int VBOXCALL supdrvIOCtl(uintptr_t uIOCtl, PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPREQHDR pReqHdr)
2021{
2022 int rc;
2023 VBOXDRV_IOCTL_ENTRY(pSession, uIOCtl, pReqHdr);
2024
2025 /*
2026 * Validate the request.
2027 */
2028 /* this first check could probably be omitted as its also done by the OS specific code... */
2029 if (RT_UNLIKELY( (pReqHdr->fFlags & SUPREQHDR_FLAGS_MAGIC_MASK) != SUPREQHDR_FLAGS_MAGIC
2030 || pReqHdr->cbIn < sizeof(*pReqHdr)
2031 || pReqHdr->cbOut < sizeof(*pReqHdr)))
2032 {
2033 OSDBGPRINT(("vboxdrv: Bad ioctl request header; cbIn=%#lx cbOut=%#lx fFlags=%#lx\n",
2034 (long)pReqHdr->cbIn, (long)pReqHdr->cbOut, (long)pReqHdr->fFlags));
2035 VBOXDRV_IOCTL_RETURN(pSession, uIOCtl, pReqHdr, VERR_INVALID_PARAMETER, VINF_SUCCESS);
2036 return VERR_INVALID_PARAMETER;
2037 }
2038 if (RT_UNLIKELY(!RT_VALID_PTR(pSession)))
2039 {
2040 OSDBGPRINT(("vboxdrv: Invalid pSession valud %p (ioctl=%p)\n", pSession, (void *)uIOCtl));
2041 VBOXDRV_IOCTL_RETURN(pSession, uIOCtl, pReqHdr, VERR_INVALID_PARAMETER, VINF_SUCCESS);
2042 return VERR_INVALID_PARAMETER;
2043 }
2044 if (RT_UNLIKELY(uIOCtl == SUP_IOCTL_COOKIE))
2045 {
2046 if (pReqHdr->u32Cookie != SUPCOOKIE_INITIAL_COOKIE)
2047 {
2048 OSDBGPRINT(("SUP_IOCTL_COOKIE: bad cookie %#lx\n", (long)pReqHdr->u32Cookie));
2049 VBOXDRV_IOCTL_RETURN(pSession, uIOCtl, pReqHdr, VERR_INVALID_PARAMETER, VINF_SUCCESS);
2050 return VERR_INVALID_PARAMETER;
2051 }
2052 }
2053 else if (RT_UNLIKELY( pReqHdr->u32Cookie != pDevExt->u32Cookie
2054 || pReqHdr->u32SessionCookie != pSession->u32Cookie))
2055 {
2056 OSDBGPRINT(("vboxdrv: bad cookie %#lx / %#lx.\n", (long)pReqHdr->u32Cookie, (long)pReqHdr->u32SessionCookie));
2057 VBOXDRV_IOCTL_RETURN(pSession, uIOCtl, pReqHdr, VERR_INVALID_PARAMETER, VINF_SUCCESS);
2058 return VERR_INVALID_PARAMETER;
2059 }
2060
2061 /*
2062 * Hand it to an inner function to avoid lots of unnecessary return tracepoints.
2063 */
2064 if (pSession->fUnrestricted)
2065 rc = supdrvIOCtlInnerUnrestricted(uIOCtl, pDevExt, pSession, pReqHdr);
2066 else
2067 rc = supdrvIOCtlInnerRestricted(uIOCtl, pDevExt, pSession, pReqHdr);
2068
2069 VBOXDRV_IOCTL_RETURN(pSession, uIOCtl, pReqHdr, pReqHdr->rc, rc);
2070 return rc;
2071}
2072
2073
2074/**
2075 * Inter-Driver Communication (IDC) worker.
2076 *
2077 * @returns VBox status code.
2078 * @retval VINF_SUCCESS on success.
2079 * @retval VERR_INVALID_PARAMETER if the request is invalid.
2080 * @retval VERR_NOT_SUPPORTED if the request isn't supported.
2081 *
2082 * @param uReq The request (function) code.
2083 * @param pDevExt Device extention.
2084 * @param pSession Session data.
2085 * @param pReqHdr The request header.
2086 */
2087int VBOXCALL supdrvIDC(uintptr_t uReq, PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPDRVIDCREQHDR pReqHdr)
2088{
2089 /*
2090 * The OS specific code has already validated the pSession
2091 * pointer, and the request size being greater or equal to
2092 * size of the header.
2093 *
2094 * So, just check that pSession is a kernel context session.
2095 */
2096 if (RT_UNLIKELY( pSession
2097 && pSession->R0Process != NIL_RTR0PROCESS))
2098 return VERR_INVALID_PARAMETER;
2099
2100/*
2101 * Validation macro.
2102 */
2103#define REQ_CHECK_IDC_SIZE(Name, cbExpect) \
2104 do { \
2105 if (RT_UNLIKELY(pReqHdr->cb != (cbExpect))) \
2106 { \
2107 OSDBGPRINT(( #Name ": Invalid input/output sizes. cb=%ld expected %ld.\n", \
2108 (long)pReqHdr->cb, (long)(cbExpect))); \
2109 return pReqHdr->rc = VERR_INVALID_PARAMETER; \
2110 } \
2111 } while (0)
2112
2113 switch (uReq)
2114 {
2115 case SUPDRV_IDC_REQ_CONNECT:
2116 {
2117 PSUPDRVIDCREQCONNECT pReq = (PSUPDRVIDCREQCONNECT)pReqHdr;
2118 REQ_CHECK_IDC_SIZE(SUPDRV_IDC_REQ_CONNECT, sizeof(*pReq));
2119
2120 /*
2121 * Validate the cookie and other input.
2122 */
2123 if (pReq->Hdr.pSession != NULL)
2124 {
2125 OSDBGPRINT(("SUPDRV_IDC_REQ_CONNECT: Hdr.pSession=%p expected NULL!\n", pReq->Hdr.pSession));
2126 return pReqHdr->rc = VERR_INVALID_PARAMETER;
2127 }
2128 if (pReq->u.In.u32MagicCookie != SUPDRVIDCREQ_CONNECT_MAGIC_COOKIE)
2129 {
2130 OSDBGPRINT(("SUPDRV_IDC_REQ_CONNECT: u32MagicCookie=%#x expected %#x!\n",
2131 (unsigned)pReq->u.In.u32MagicCookie, (unsigned)SUPDRVIDCREQ_CONNECT_MAGIC_COOKIE));
2132 return pReqHdr->rc = VERR_INVALID_PARAMETER;
2133 }
2134 if ( pReq->u.In.uMinVersion > pReq->u.In.uReqVersion
2135 || (pReq->u.In.uMinVersion & UINT32_C(0xffff0000)) != (pReq->u.In.uReqVersion & UINT32_C(0xffff0000)))
2136 {
2137 OSDBGPRINT(("SUPDRV_IDC_REQ_CONNECT: uMinVersion=%#x uMaxVersion=%#x doesn't match!\n",
2138 pReq->u.In.uMinVersion, pReq->u.In.uReqVersion));
2139 return pReqHdr->rc = VERR_INVALID_PARAMETER;
2140 }
2141 if (pSession != NULL)
2142 {
2143 OSDBGPRINT(("SUPDRV_IDC_REQ_CONNECT: pSession=%p expected NULL!\n", pSession));
2144 return pReqHdr->rc = VERR_INVALID_PARAMETER;
2145 }
2146
2147 /*
2148 * Match the version.
2149 * The current logic is very simple, match the major interface version.
2150 */
2151 if ( pReq->u.In.uMinVersion > SUPDRV_IDC_VERSION
2152 || (pReq->u.In.uMinVersion & 0xffff0000) != (SUPDRV_IDC_VERSION & 0xffff0000))
2153 {
2154 OSDBGPRINT(("SUPDRV_IDC_REQ_CONNECT: Version mismatch. Requested: %#x Min: %#x Current: %#x\n",
2155 pReq->u.In.uReqVersion, pReq->u.In.uMinVersion, (unsigned)SUPDRV_IDC_VERSION));
2156 pReq->u.Out.pSession = NULL;
2157 pReq->u.Out.uSessionVersion = 0xffffffff;
2158 pReq->u.Out.uDriverVersion = SUPDRV_IDC_VERSION;
2159 pReq->u.Out.uDriverRevision = VBOX_SVN_REV;
2160 pReq->Hdr.rc = VERR_VERSION_MISMATCH;
2161 return VINF_SUCCESS;
2162 }
2163
2164 pReq->u.Out.pSession = NULL;
2165 pReq->u.Out.uSessionVersion = SUPDRV_IDC_VERSION;
2166 pReq->u.Out.uDriverVersion = SUPDRV_IDC_VERSION;
2167 pReq->u.Out.uDriverRevision = VBOX_SVN_REV;
2168
2169 pReq->Hdr.rc = supdrvCreateSession(pDevExt, false /* fUser */, true /*fUnrestricted*/, &pSession);
2170 if (RT_FAILURE(pReq->Hdr.rc))
2171 {
2172 OSDBGPRINT(("SUPDRV_IDC_REQ_CONNECT: failed to create session, rc=%d\n", pReq->Hdr.rc));
2173 return VINF_SUCCESS;
2174 }
2175
2176 pReq->u.Out.pSession = pSession;
2177 pReq->Hdr.pSession = pSession;
2178
2179 return VINF_SUCCESS;
2180 }
2181
2182 case SUPDRV_IDC_REQ_DISCONNECT:
2183 {
2184 REQ_CHECK_IDC_SIZE(SUPDRV_IDC_REQ_DISCONNECT, sizeof(*pReqHdr));
2185
2186 supdrvSessionRelease(pSession);
2187 return pReqHdr->rc = VINF_SUCCESS;
2188 }
2189
2190 case SUPDRV_IDC_REQ_GET_SYMBOL:
2191 {
2192 PSUPDRVIDCREQGETSYM pReq = (PSUPDRVIDCREQGETSYM)pReqHdr;
2193 REQ_CHECK_IDC_SIZE(SUPDRV_IDC_REQ_GET_SYMBOL, sizeof(*pReq));
2194
2195 pReq->Hdr.rc = supdrvIDC_LdrGetSymbol(pDevExt, pSession, pReq);
2196 return VINF_SUCCESS;
2197 }
2198
2199 case SUPDRV_IDC_REQ_COMPONENT_REGISTER_FACTORY:
2200 {
2201 PSUPDRVIDCREQCOMPREGFACTORY pReq = (PSUPDRVIDCREQCOMPREGFACTORY)pReqHdr;
2202 REQ_CHECK_IDC_SIZE(SUPDRV_IDC_REQ_COMPONENT_REGISTER_FACTORY, sizeof(*pReq));
2203
2204 pReq->Hdr.rc = SUPR0ComponentRegisterFactory(pSession, pReq->u.In.pFactory);
2205 return VINF_SUCCESS;
2206 }
2207
2208 case SUPDRV_IDC_REQ_COMPONENT_DEREGISTER_FACTORY:
2209 {
2210 PSUPDRVIDCREQCOMPDEREGFACTORY pReq = (PSUPDRVIDCREQCOMPDEREGFACTORY)pReqHdr;
2211 REQ_CHECK_IDC_SIZE(SUPDRV_IDC_REQ_COMPONENT_DEREGISTER_FACTORY, sizeof(*pReq));
2212
2213 pReq->Hdr.rc = SUPR0ComponentDeregisterFactory(pSession, pReq->u.In.pFactory);
2214 return VINF_SUCCESS;
2215 }
2216
2217 default:
2218 Log(("Unknown IDC %#lx\n", (long)uReq));
2219 break;
2220 }
2221
2222#undef REQ_CHECK_IDC_SIZE
2223 return VERR_NOT_SUPPORTED;
2224}
2225
2226
2227/**
2228 * Register a object for reference counting.
2229 * The object is registered with one reference in the specified session.
2230 *
2231 * @returns Unique identifier on success (pointer).
2232 * All future reference must use this identifier.
2233 * @returns NULL on failure.
2234 * @param pfnDestructor The destructore function which will be called when the reference count reaches 0.
2235 * @param pvUser1 The first user argument.
2236 * @param pvUser2 The second user argument.
2237 */
2238SUPR0DECL(void *) SUPR0ObjRegister(PSUPDRVSESSION pSession, SUPDRVOBJTYPE enmType, PFNSUPDRVDESTRUCTOR pfnDestructor, void *pvUser1, void *pvUser2)
2239{
2240 PSUPDRVDEVEXT pDevExt = pSession->pDevExt;
2241 PSUPDRVOBJ pObj;
2242 PSUPDRVUSAGE pUsage;
2243
2244 /*
2245 * Validate the input.
2246 */
2247 AssertReturn(SUP_IS_SESSION_VALID(pSession), NULL);
2248 AssertReturn(enmType > SUPDRVOBJTYPE_INVALID && enmType < SUPDRVOBJTYPE_END, NULL);
2249 AssertPtrReturn(pfnDestructor, NULL);
2250
2251 /*
2252 * Allocate and initialize the object.
2253 */
2254 pObj = (PSUPDRVOBJ)RTMemAlloc(sizeof(*pObj));
2255 if (!pObj)
2256 return NULL;
2257 pObj->u32Magic = SUPDRVOBJ_MAGIC;
2258 pObj->enmType = enmType;
2259 pObj->pNext = NULL;
2260 pObj->cUsage = 1;
2261 pObj->pfnDestructor = pfnDestructor;
2262 pObj->pvUser1 = pvUser1;
2263 pObj->pvUser2 = pvUser2;
2264 pObj->CreatorUid = pSession->Uid;
2265 pObj->CreatorGid = pSession->Gid;
2266 pObj->CreatorProcess= pSession->Process;
2267 supdrvOSObjInitCreator(pObj, pSession);
2268
2269 /*
2270 * Allocate the usage record.
2271 * (We keep freed usage records around to simplify SUPR0ObjAddRefEx().)
2272 */
2273 RTSpinlockAcquire(pDevExt->Spinlock);
2274
2275 pUsage = pDevExt->pUsageFree;
2276 if (pUsage)
2277 pDevExt->pUsageFree = pUsage->pNext;
2278 else
2279 {
2280 RTSpinlockRelease(pDevExt->Spinlock);
2281 pUsage = (PSUPDRVUSAGE)RTMemAlloc(sizeof(*pUsage));
2282 if (!pUsage)
2283 {
2284 RTMemFree(pObj);
2285 return NULL;
2286 }
2287 RTSpinlockAcquire(pDevExt->Spinlock);
2288 }
2289
2290 /*
2291 * Insert the object and create the session usage record.
2292 */
2293 /* The object. */
2294 pObj->pNext = pDevExt->pObjs;
2295 pDevExt->pObjs = pObj;
2296
2297 /* The session record. */
2298 pUsage->cUsage = 1;
2299 pUsage->pObj = pObj;
2300 pUsage->pNext = pSession->pUsage;
2301 /* Log2(("SUPR0ObjRegister: pUsage=%p:{.pObj=%p, .pNext=%p}\n", pUsage, pUsage->pObj, pUsage->pNext)); */
2302 pSession->pUsage = pUsage;
2303
2304 RTSpinlockRelease(pDevExt->Spinlock);
2305
2306 Log(("SUPR0ObjRegister: returns %p (pvUser1=%p, pvUser=%p)\n", pObj, pvUser1, pvUser2));
2307 return pObj;
2308}
2309
2310
2311/**
2312 * Increment the reference counter for the object associating the reference
2313 * with the specified session.
2314 *
2315 * @returns IPRT status code.
2316 * @param pvObj The identifier returned by SUPR0ObjRegister().
2317 * @param pSession The session which is referencing the object.
2318 *
2319 * @remarks The caller should not own any spinlocks and must carefully protect
2320 * itself against potential race with the destructor so freed memory
2321 * isn't accessed here.
2322 */
2323SUPR0DECL(int) SUPR0ObjAddRef(void *pvObj, PSUPDRVSESSION pSession)
2324{
2325 return SUPR0ObjAddRefEx(pvObj, pSession, false /* fNoBlocking */);
2326}
2327
2328
2329/**
2330 * Increment the reference counter for the object associating the reference
2331 * with the specified session.
2332 *
2333 * @returns IPRT status code.
2334 * @retval VERR_TRY_AGAIN if fNoBlocking was set and a new usage record
2335 * couldn't be allocated. (If you see this you're not doing the right
2336 * thing and it won't ever work reliably.)
2337 *
2338 * @param pvObj The identifier returned by SUPR0ObjRegister().
2339 * @param pSession The session which is referencing the object.
2340 * @param fNoBlocking Set if it's not OK to block. Never try to make the
2341 * first reference to an object in a session with this
2342 * argument set.
2343 *
2344 * @remarks The caller should not own any spinlocks and must carefully protect
2345 * itself against potential race with the destructor so freed memory
2346 * isn't accessed here.
2347 */
2348SUPR0DECL(int) SUPR0ObjAddRefEx(void *pvObj, PSUPDRVSESSION pSession, bool fNoBlocking)
2349{
2350 PSUPDRVDEVEXT pDevExt = pSession->pDevExt;
2351 PSUPDRVOBJ pObj = (PSUPDRVOBJ)pvObj;
2352 int rc = VINF_SUCCESS;
2353 PSUPDRVUSAGE pUsagePre;
2354 PSUPDRVUSAGE pUsage;
2355
2356 /*
2357 * Validate the input.
2358 * Be ready for the destruction race (someone might be stuck in the
2359 * destructor waiting a lock we own).
2360 */
2361 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2362 AssertPtrReturn(pObj, VERR_INVALID_POINTER);
2363 AssertMsgReturn(pObj->u32Magic == SUPDRVOBJ_MAGIC || pObj->u32Magic == SUPDRVOBJ_MAGIC_DEAD,
2364 ("Invalid pvObj=%p magic=%#x (expected %#x or %#x)\n", pvObj, pObj->u32Magic, SUPDRVOBJ_MAGIC, SUPDRVOBJ_MAGIC_DEAD),
2365 VERR_INVALID_PARAMETER);
2366
2367 RTSpinlockAcquire(pDevExt->Spinlock);
2368
2369 if (RT_UNLIKELY(pObj->u32Magic != SUPDRVOBJ_MAGIC))
2370 {
2371 RTSpinlockRelease(pDevExt->Spinlock);
2372
2373 AssertMsgFailed(("pvObj=%p magic=%#x\n", pvObj, pObj->u32Magic));
2374 return VERR_WRONG_ORDER;
2375 }
2376
2377 /*
2378 * Preallocate the usage record if we can.
2379 */
2380 pUsagePre = pDevExt->pUsageFree;
2381 if (pUsagePre)
2382 pDevExt->pUsageFree = pUsagePre->pNext;
2383 else if (!fNoBlocking)
2384 {
2385 RTSpinlockRelease(pDevExt->Spinlock);
2386 pUsagePre = (PSUPDRVUSAGE)RTMemAlloc(sizeof(*pUsagePre));
2387 if (!pUsagePre)
2388 return VERR_NO_MEMORY;
2389
2390 RTSpinlockAcquire(pDevExt->Spinlock);
2391 if (RT_UNLIKELY(pObj->u32Magic != SUPDRVOBJ_MAGIC))
2392 {
2393 RTSpinlockRelease(pDevExt->Spinlock);
2394
2395 AssertMsgFailed(("pvObj=%p magic=%#x\n", pvObj, pObj->u32Magic));
2396 return VERR_WRONG_ORDER;
2397 }
2398 }
2399
2400 /*
2401 * Reference the object.
2402 */
2403 pObj->cUsage++;
2404
2405 /*
2406 * Look for the session record.
2407 */
2408 for (pUsage = pSession->pUsage; pUsage; pUsage = pUsage->pNext)
2409 {
2410 /*Log(("SUPR0AddRef: pUsage=%p:{.pObj=%p, .pNext=%p}\n", pUsage, pUsage->pObj, pUsage->pNext));*/
2411 if (pUsage->pObj == pObj)
2412 break;
2413 }
2414 if (pUsage)
2415 pUsage->cUsage++;
2416 else if (pUsagePre)
2417 {
2418 /* create a new session record. */
2419 pUsagePre->cUsage = 1;
2420 pUsagePre->pObj = pObj;
2421 pUsagePre->pNext = pSession->pUsage;
2422 pSession->pUsage = pUsagePre;
2423 /*Log(("SUPR0AddRef: pUsagePre=%p:{.pObj=%p, .pNext=%p}\n", pUsagePre, pUsagePre->pObj, pUsagePre->pNext));*/
2424
2425 pUsagePre = NULL;
2426 }
2427 else
2428 {
2429 pObj->cUsage--;
2430 rc = VERR_TRY_AGAIN;
2431 }
2432
2433 /*
2434 * Put any unused usage record into the free list..
2435 */
2436 if (pUsagePre)
2437 {
2438 pUsagePre->pNext = pDevExt->pUsageFree;
2439 pDevExt->pUsageFree = pUsagePre;
2440 }
2441
2442 RTSpinlockRelease(pDevExt->Spinlock);
2443
2444 return rc;
2445}
2446
2447
2448/**
2449 * Decrement / destroy a reference counter record for an object.
2450 *
2451 * The object is uniquely identified by pfnDestructor+pvUser1+pvUser2.
2452 *
2453 * @returns IPRT status code.
2454 * @retval VINF_SUCCESS if not destroyed.
2455 * @retval VINF_OBJECT_DESTROYED if it's destroyed by this release call.
2456 * @retval VERR_INVALID_PARAMETER if the object isn't valid. Will assert in
2457 * string builds.
2458 *
2459 * @param pvObj The identifier returned by SUPR0ObjRegister().
2460 * @param pSession The session which is referencing the object.
2461 */
2462SUPR0DECL(int) SUPR0ObjRelease(void *pvObj, PSUPDRVSESSION pSession)
2463{
2464 PSUPDRVDEVEXT pDevExt = pSession->pDevExt;
2465 PSUPDRVOBJ pObj = (PSUPDRVOBJ)pvObj;
2466 int rc = VERR_INVALID_PARAMETER;
2467 PSUPDRVUSAGE pUsage;
2468 PSUPDRVUSAGE pUsagePrev;
2469
2470 /*
2471 * Validate the input.
2472 */
2473 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2474 AssertMsgReturn(VALID_PTR(pObj) && pObj->u32Magic == SUPDRVOBJ_MAGIC,
2475 ("Invalid pvObj=%p magic=%#x (exepcted %#x)\n", pvObj, pObj ? pObj->u32Magic : 0, SUPDRVOBJ_MAGIC),
2476 VERR_INVALID_PARAMETER);
2477
2478 /*
2479 * Acquire the spinlock and look for the usage record.
2480 */
2481 RTSpinlockAcquire(pDevExt->Spinlock);
2482
2483 for (pUsagePrev = NULL, pUsage = pSession->pUsage;
2484 pUsage;
2485 pUsagePrev = pUsage, pUsage = pUsage->pNext)
2486 {
2487 /*Log2(("SUPR0ObjRelease: pUsage=%p:{.pObj=%p, .pNext=%p}\n", pUsage, pUsage->pObj, pUsage->pNext));*/
2488 if (pUsage->pObj == pObj)
2489 {
2490 rc = VINF_SUCCESS;
2491 AssertMsg(pUsage->cUsage >= 1 && pObj->cUsage >= pUsage->cUsage, ("glob %d; sess %d\n", pObj->cUsage, pUsage->cUsage));
2492 if (pUsage->cUsage > 1)
2493 {
2494 pObj->cUsage--;
2495 pUsage->cUsage--;
2496 }
2497 else
2498 {
2499 /*
2500 * Free the session record.
2501 */
2502 if (pUsagePrev)
2503 pUsagePrev->pNext = pUsage->pNext;
2504 else
2505 pSession->pUsage = pUsage->pNext;
2506 pUsage->pNext = pDevExt->pUsageFree;
2507 pDevExt->pUsageFree = pUsage;
2508
2509 /* What about the object? */
2510 if (pObj->cUsage > 1)
2511 pObj->cUsage--;
2512 else
2513 {
2514 /*
2515 * Object is to be destroyed, unlink it.
2516 */
2517 pObj->u32Magic = SUPDRVOBJ_MAGIC_DEAD;
2518 rc = VINF_OBJECT_DESTROYED;
2519 if (pDevExt->pObjs == pObj)
2520 pDevExt->pObjs = pObj->pNext;
2521 else
2522 {
2523 PSUPDRVOBJ pObjPrev;
2524 for (pObjPrev = pDevExt->pObjs; pObjPrev; pObjPrev = pObjPrev->pNext)
2525 if (pObjPrev->pNext == pObj)
2526 {
2527 pObjPrev->pNext = pObj->pNext;
2528 break;
2529 }
2530 Assert(pObjPrev);
2531 }
2532 }
2533 }
2534 break;
2535 }
2536 }
2537
2538 RTSpinlockRelease(pDevExt->Spinlock);
2539
2540 /*
2541 * Call the destructor and free the object if required.
2542 */
2543 if (rc == VINF_OBJECT_DESTROYED)
2544 {
2545 Log(("SUPR0ObjRelease: destroying %p/%d (%p/%p) cpid=%RTproc pid=%RTproc dtor=%p\n",
2546 pObj, pObj->enmType, pObj->pvUser1, pObj->pvUser2, pObj->CreatorProcess, RTProcSelf(), pObj->pfnDestructor));
2547 if (pObj->pfnDestructor)
2548 pObj->pfnDestructor(pObj, pObj->pvUser1, pObj->pvUser2);
2549 RTMemFree(pObj);
2550 }
2551
2552 AssertMsg(pUsage, ("pvObj=%p\n", pvObj));
2553 return rc;
2554}
2555
2556
2557/**
2558 * Verifies that the current process can access the specified object.
2559 *
2560 * @returns The following IPRT status code:
2561 * @retval VINF_SUCCESS if access was granted.
2562 * @retval VERR_PERMISSION_DENIED if denied access.
2563 * @retval VERR_INVALID_PARAMETER if invalid parameter.
2564 *
2565 * @param pvObj The identifier returned by SUPR0ObjRegister().
2566 * @param pSession The session which wishes to access the object.
2567 * @param pszObjName Object string name. This is optional and depends on the object type.
2568 *
2569 * @remark The caller is responsible for making sure the object isn't removed while
2570 * we're inside this function. If uncertain about this, just call AddRef before calling us.
2571 */
2572SUPR0DECL(int) SUPR0ObjVerifyAccess(void *pvObj, PSUPDRVSESSION pSession, const char *pszObjName)
2573{
2574 PSUPDRVOBJ pObj = (PSUPDRVOBJ)pvObj;
2575 int rc;
2576
2577 /*
2578 * Validate the input.
2579 */
2580 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2581 AssertMsgReturn(VALID_PTR(pObj) && pObj->u32Magic == SUPDRVOBJ_MAGIC,
2582 ("Invalid pvObj=%p magic=%#x (exepcted %#x)\n", pvObj, pObj ? pObj->u32Magic : 0, SUPDRVOBJ_MAGIC),
2583 VERR_INVALID_PARAMETER);
2584
2585 /*
2586 * Check access. (returns true if a decision has been made.)
2587 */
2588 rc = VERR_INTERNAL_ERROR;
2589 if (supdrvOSObjCanAccess(pObj, pSession, pszObjName, &rc))
2590 return rc;
2591
2592 /*
2593 * Default policy is to allow the user to access his own
2594 * stuff but nothing else.
2595 */
2596 if (pObj->CreatorUid == pSession->Uid)
2597 return VINF_SUCCESS;
2598 return VERR_PERMISSION_DENIED;
2599}
2600
2601
2602/**
2603 * Lock pages.
2604 *
2605 * @returns IPRT status code.
2606 * @param pSession Session to which the locked memory should be associated.
2607 * @param pvR3 Start of the memory range to lock.
2608 * This must be page aligned.
2609 * @param cPages Number of pages to lock.
2610 * @param paPages Where to put the physical addresses of locked memory.
2611 */
2612SUPR0DECL(int) SUPR0LockMem(PSUPDRVSESSION pSession, RTR3PTR pvR3, uint32_t cPages, PRTHCPHYS paPages)
2613{
2614 int rc;
2615 SUPDRVMEMREF Mem = { NIL_RTR0MEMOBJ, NIL_RTR0MEMOBJ, MEMREF_TYPE_UNUSED };
2616 const size_t cb = (size_t)cPages << PAGE_SHIFT;
2617 LogFlow(("SUPR0LockMem: pSession=%p pvR3=%p cPages=%d paPages=%p\n", pSession, (void *)pvR3, cPages, paPages));
2618
2619 /*
2620 * Verify input.
2621 */
2622 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2623 AssertPtrReturn(paPages, VERR_INVALID_PARAMETER);
2624 if ( RT_ALIGN_R3PT(pvR3, PAGE_SIZE, RTR3PTR) != pvR3
2625 || !pvR3)
2626 {
2627 Log(("pvR3 (%p) must be page aligned and not NULL!\n", (void *)pvR3));
2628 return VERR_INVALID_PARAMETER;
2629 }
2630
2631 /*
2632 * Let IPRT do the job.
2633 */
2634 Mem.eType = MEMREF_TYPE_LOCKED;
2635 rc = RTR0MemObjLockUser(&Mem.MemObj, pvR3, cb, RTMEM_PROT_READ | RTMEM_PROT_WRITE, RTR0ProcHandleSelf());
2636 if (RT_SUCCESS(rc))
2637 {
2638 uint32_t iPage = cPages;
2639 AssertMsg(RTR0MemObjAddressR3(Mem.MemObj) == pvR3, ("%p == %p\n", RTR0MemObjAddressR3(Mem.MemObj), pvR3));
2640 AssertMsg(RTR0MemObjSize(Mem.MemObj) == cb, ("%x == %x\n", RTR0MemObjSize(Mem.MemObj), cb));
2641
2642 while (iPage-- > 0)
2643 {
2644 paPages[iPage] = RTR0MemObjGetPagePhysAddr(Mem.MemObj, iPage);
2645 if (RT_UNLIKELY(paPages[iPage] == NIL_RTCCPHYS))
2646 {
2647 AssertMsgFailed(("iPage=%d\n", iPage));
2648 rc = VERR_INTERNAL_ERROR;
2649 break;
2650 }
2651 }
2652 if (RT_SUCCESS(rc))
2653 rc = supdrvMemAdd(&Mem, pSession);
2654 if (RT_FAILURE(rc))
2655 {
2656 int rc2 = RTR0MemObjFree(Mem.MemObj, false);
2657 AssertRC(rc2);
2658 }
2659 }
2660
2661 return rc;
2662}
2663
2664
2665/**
2666 * Unlocks the memory pointed to by pv.
2667 *
2668 * @returns IPRT status code.
2669 * @param pSession Session to which the memory was locked.
2670 * @param pvR3 Memory to unlock.
2671 */
2672SUPR0DECL(int) SUPR0UnlockMem(PSUPDRVSESSION pSession, RTR3PTR pvR3)
2673{
2674 LogFlow(("SUPR0UnlockMem: pSession=%p pvR3=%p\n", pSession, (void *)pvR3));
2675 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2676 return supdrvMemRelease(pSession, (RTHCUINTPTR)pvR3, MEMREF_TYPE_LOCKED);
2677}
2678
2679
2680/**
2681 * Allocates a chunk of page aligned memory with contiguous and fixed physical
2682 * backing.
2683 *
2684 * @returns IPRT status code.
2685 * @param pSession Session data.
2686 * @param cPages Number of pages to allocate.
2687 * @param ppvR0 Where to put the address of Ring-0 mapping the allocated memory.
2688 * @param ppvR3 Where to put the address of Ring-3 mapping the allocated memory.
2689 * @param pHCPhys Where to put the physical address of allocated memory.
2690 */
2691SUPR0DECL(int) SUPR0ContAlloc(PSUPDRVSESSION pSession, uint32_t cPages, PRTR0PTR ppvR0, PRTR3PTR ppvR3, PRTHCPHYS pHCPhys)
2692{
2693 int rc;
2694 SUPDRVMEMREF Mem = { NIL_RTR0MEMOBJ, NIL_RTR0MEMOBJ, MEMREF_TYPE_UNUSED };
2695 LogFlow(("SUPR0ContAlloc: pSession=%p cPages=%d ppvR0=%p ppvR3=%p pHCPhys=%p\n", pSession, cPages, ppvR0, ppvR3, pHCPhys));
2696
2697 /*
2698 * Validate input.
2699 */
2700 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2701 if (!ppvR3 || !ppvR0 || !pHCPhys)
2702 {
2703 Log(("Null pointer. All of these should be set: pSession=%p ppvR0=%p ppvR3=%p pHCPhys=%p\n",
2704 pSession, ppvR0, ppvR3, pHCPhys));
2705 return VERR_INVALID_PARAMETER;
2706
2707 }
2708 if (cPages < 1 || cPages >= 256)
2709 {
2710 Log(("Illegal request cPages=%d, must be greater than 0 and smaller than 256.\n", cPages));
2711 return VERR_PAGE_COUNT_OUT_OF_RANGE;
2712 }
2713
2714 /*
2715 * Let IPRT do the job.
2716 */
2717 rc = RTR0MemObjAllocCont(&Mem.MemObj, cPages << PAGE_SHIFT, true /* executable R0 mapping */);
2718 if (RT_SUCCESS(rc))
2719 {
2720 int rc2;
2721 rc = RTR0MemObjMapUser(&Mem.MapObjR3, Mem.MemObj, (RTR3PTR)-1, 0,
2722 RTMEM_PROT_EXEC | RTMEM_PROT_WRITE | RTMEM_PROT_READ, RTR0ProcHandleSelf());
2723 if (RT_SUCCESS(rc))
2724 {
2725 Mem.eType = MEMREF_TYPE_CONT;
2726 rc = supdrvMemAdd(&Mem, pSession);
2727 if (!rc)
2728 {
2729 *ppvR0 = RTR0MemObjAddress(Mem.MemObj);
2730 *ppvR3 = RTR0MemObjAddressR3(Mem.MapObjR3);
2731 *pHCPhys = RTR0MemObjGetPagePhysAddr(Mem.MemObj, 0);
2732 return 0;
2733 }
2734
2735 rc2 = RTR0MemObjFree(Mem.MapObjR3, false);
2736 AssertRC(rc2);
2737 }
2738 rc2 = RTR0MemObjFree(Mem.MemObj, false);
2739 AssertRC(rc2);
2740 }
2741
2742 return rc;
2743}
2744
2745
2746/**
2747 * Frees memory allocated using SUPR0ContAlloc().
2748 *
2749 * @returns IPRT status code.
2750 * @param pSession The session to which the memory was allocated.
2751 * @param uPtr Pointer to the memory (ring-3 or ring-0).
2752 */
2753SUPR0DECL(int) SUPR0ContFree(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr)
2754{
2755 LogFlow(("SUPR0ContFree: pSession=%p uPtr=%p\n", pSession, (void *)uPtr));
2756 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2757 return supdrvMemRelease(pSession, uPtr, MEMREF_TYPE_CONT);
2758}
2759
2760
2761/**
2762 * Allocates a chunk of page aligned memory with fixed physical backing below 4GB.
2763 *
2764 * The memory isn't zeroed.
2765 *
2766 * @returns IPRT status code.
2767 * @param pSession Session data.
2768 * @param cPages Number of pages to allocate.
2769 * @param ppvR0 Where to put the address of Ring-0 mapping of the allocated memory.
2770 * @param ppvR3 Where to put the address of Ring-3 mapping of the allocated memory.
2771 * @param paPages Where to put the physical addresses of allocated memory.
2772 */
2773SUPR0DECL(int) SUPR0LowAlloc(PSUPDRVSESSION pSession, uint32_t cPages, PRTR0PTR ppvR0, PRTR3PTR ppvR3, PRTHCPHYS paPages)
2774{
2775 unsigned iPage;
2776 int rc;
2777 SUPDRVMEMREF Mem = { NIL_RTR0MEMOBJ, NIL_RTR0MEMOBJ, MEMREF_TYPE_UNUSED };
2778 LogFlow(("SUPR0LowAlloc: pSession=%p cPages=%d ppvR3=%p ppvR0=%p paPages=%p\n", pSession, cPages, ppvR3, ppvR0, paPages));
2779
2780 /*
2781 * Validate input.
2782 */
2783 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2784 if (!ppvR3 || !ppvR0 || !paPages)
2785 {
2786 Log(("Null pointer. All of these should be set: pSession=%p ppvR3=%p ppvR0=%p paPages=%p\n",
2787 pSession, ppvR3, ppvR0, paPages));
2788 return VERR_INVALID_PARAMETER;
2789
2790 }
2791 if (cPages < 1 || cPages >= 256)
2792 {
2793 Log(("Illegal request cPages=%d, must be greater than 0 and smaller than 256.\n", cPages));
2794 return VERR_PAGE_COUNT_OUT_OF_RANGE;
2795 }
2796
2797 /*
2798 * Let IPRT do the work.
2799 */
2800 rc = RTR0MemObjAllocLow(&Mem.MemObj, cPages << PAGE_SHIFT, true /* executable ring-0 mapping */);
2801 if (RT_SUCCESS(rc))
2802 {
2803 int rc2;
2804 rc = RTR0MemObjMapUser(&Mem.MapObjR3, Mem.MemObj, (RTR3PTR)-1, 0,
2805 RTMEM_PROT_EXEC | RTMEM_PROT_WRITE | RTMEM_PROT_READ, RTR0ProcHandleSelf());
2806 if (RT_SUCCESS(rc))
2807 {
2808 Mem.eType = MEMREF_TYPE_LOW;
2809 rc = supdrvMemAdd(&Mem, pSession);
2810 if (!rc)
2811 {
2812 for (iPage = 0; iPage < cPages; iPage++)
2813 {
2814 paPages[iPage] = RTR0MemObjGetPagePhysAddr(Mem.MemObj, iPage);
2815 AssertMsg(!(paPages[iPage] & (PAGE_SIZE - 1)), ("iPage=%d Phys=%RHp\n", paPages[iPage]));
2816 }
2817 *ppvR0 = RTR0MemObjAddress(Mem.MemObj);
2818 *ppvR3 = RTR0MemObjAddressR3(Mem.MapObjR3);
2819 return 0;
2820 }
2821
2822 rc2 = RTR0MemObjFree(Mem.MapObjR3, false);
2823 AssertRC(rc2);
2824 }
2825
2826 rc2 = RTR0MemObjFree(Mem.MemObj, false);
2827 AssertRC(rc2);
2828 }
2829
2830 return rc;
2831}
2832
2833
2834/**
2835 * Frees memory allocated using SUPR0LowAlloc().
2836 *
2837 * @returns IPRT status code.
2838 * @param pSession The session to which the memory was allocated.
2839 * @param uPtr Pointer to the memory (ring-3 or ring-0).
2840 */
2841SUPR0DECL(int) SUPR0LowFree(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr)
2842{
2843 LogFlow(("SUPR0LowFree: pSession=%p uPtr=%p\n", pSession, (void *)uPtr));
2844 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2845 return supdrvMemRelease(pSession, uPtr, MEMREF_TYPE_LOW);
2846}
2847
2848
2849
2850/**
2851 * Allocates a chunk of memory with both R0 and R3 mappings.
2852 * The memory is fixed and it's possible to query the physical addresses using SUPR0MemGetPhys().
2853 *
2854 * @returns IPRT status code.
2855 * @param pSession The session to associated the allocation with.
2856 * @param cb Number of bytes to allocate.
2857 * @param ppvR0 Where to store the address of the Ring-0 mapping.
2858 * @param ppvR3 Where to store the address of the Ring-3 mapping.
2859 */
2860SUPR0DECL(int) SUPR0MemAlloc(PSUPDRVSESSION pSession, uint32_t cb, PRTR0PTR ppvR0, PRTR3PTR ppvR3)
2861{
2862 int rc;
2863 SUPDRVMEMREF Mem = { NIL_RTR0MEMOBJ, NIL_RTR0MEMOBJ, MEMREF_TYPE_UNUSED };
2864 LogFlow(("SUPR0MemAlloc: pSession=%p cb=%d ppvR0=%p ppvR3=%p\n", pSession, cb, ppvR0, ppvR3));
2865
2866 /*
2867 * Validate input.
2868 */
2869 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2870 AssertPtrReturn(ppvR0, VERR_INVALID_POINTER);
2871 AssertPtrReturn(ppvR3, VERR_INVALID_POINTER);
2872 if (cb < 1 || cb >= _4M)
2873 {
2874 Log(("Illegal request cb=%u; must be greater than 0 and smaller than 4MB.\n", cb));
2875 return VERR_INVALID_PARAMETER;
2876 }
2877
2878 /*
2879 * Let IPRT do the work.
2880 */
2881 rc = RTR0MemObjAllocPage(&Mem.MemObj, cb, true /* executable ring-0 mapping */);
2882 if (RT_SUCCESS(rc))
2883 {
2884 int rc2;
2885 rc = RTR0MemObjMapUser(&Mem.MapObjR3, Mem.MemObj, (RTR3PTR)-1, 0,
2886 RTMEM_PROT_EXEC | RTMEM_PROT_WRITE | RTMEM_PROT_READ, RTR0ProcHandleSelf());
2887 if (RT_SUCCESS(rc))
2888 {
2889 Mem.eType = MEMREF_TYPE_MEM;
2890 rc = supdrvMemAdd(&Mem, pSession);
2891 if (!rc)
2892 {
2893 *ppvR0 = RTR0MemObjAddress(Mem.MemObj);
2894 *ppvR3 = RTR0MemObjAddressR3(Mem.MapObjR3);
2895 return VINF_SUCCESS;
2896 }
2897
2898 rc2 = RTR0MemObjFree(Mem.MapObjR3, false);
2899 AssertRC(rc2);
2900 }
2901
2902 rc2 = RTR0MemObjFree(Mem.MemObj, false);
2903 AssertRC(rc2);
2904 }
2905
2906 return rc;
2907}
2908
2909
2910/**
2911 * Get the physical addresses of memory allocated using SUPR0MemAlloc().
2912 *
2913 * @returns IPRT status code.
2914 * @param pSession The session to which the memory was allocated.
2915 * @param uPtr The Ring-0 or Ring-3 address returned by SUPR0MemAlloc().
2916 * @param paPages Where to store the physical addresses.
2917 */
2918SUPR0DECL(int) SUPR0MemGetPhys(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr, PSUPPAGE paPages) /** @todo switch this bugger to RTHCPHYS */
2919{
2920 PSUPDRVBUNDLE pBundle;
2921 LogFlow(("SUPR0MemGetPhys: pSession=%p uPtr=%p paPages=%p\n", pSession, (void *)uPtr, paPages));
2922
2923 /*
2924 * Validate input.
2925 */
2926 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2927 AssertPtrReturn(paPages, VERR_INVALID_POINTER);
2928 AssertReturn(uPtr, VERR_INVALID_PARAMETER);
2929
2930 /*
2931 * Search for the address.
2932 */
2933 RTSpinlockAcquire(pSession->Spinlock);
2934 for (pBundle = &pSession->Bundle; pBundle; pBundle = pBundle->pNext)
2935 {
2936 if (pBundle->cUsed > 0)
2937 {
2938 unsigned i;
2939 for (i = 0; i < RT_ELEMENTS(pBundle->aMem); i++)
2940 {
2941 if ( pBundle->aMem[i].eType == MEMREF_TYPE_MEM
2942 && pBundle->aMem[i].MemObj != NIL_RTR0MEMOBJ
2943 && ( (RTHCUINTPTR)RTR0MemObjAddress(pBundle->aMem[i].MemObj) == uPtr
2944 || ( pBundle->aMem[i].MapObjR3 != NIL_RTR0MEMOBJ
2945 && RTR0MemObjAddressR3(pBundle->aMem[i].MapObjR3) == uPtr)
2946 )
2947 )
2948 {
2949 const size_t cPages = RTR0MemObjSize(pBundle->aMem[i].MemObj) >> PAGE_SHIFT;
2950 size_t iPage;
2951 for (iPage = 0; iPage < cPages; iPage++)
2952 {
2953 paPages[iPage].Phys = RTR0MemObjGetPagePhysAddr(pBundle->aMem[i].MemObj, iPage);
2954 paPages[iPage].uReserved = 0;
2955 }
2956 RTSpinlockRelease(pSession->Spinlock);
2957 return VINF_SUCCESS;
2958 }
2959 }
2960 }
2961 }
2962 RTSpinlockRelease(pSession->Spinlock);
2963 Log(("Failed to find %p!!!\n", (void *)uPtr));
2964 return VERR_INVALID_PARAMETER;
2965}
2966
2967
2968/**
2969 * Free memory allocated by SUPR0MemAlloc().
2970 *
2971 * @returns IPRT status code.
2972 * @param pSession The session owning the allocation.
2973 * @param uPtr The Ring-0 or Ring-3 address returned by SUPR0MemAlloc().
2974 */
2975SUPR0DECL(int) SUPR0MemFree(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr)
2976{
2977 LogFlow(("SUPR0MemFree: pSession=%p uPtr=%p\n", pSession, (void *)uPtr));
2978 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
2979 return supdrvMemRelease(pSession, uPtr, MEMREF_TYPE_MEM);
2980}
2981
2982
2983/**
2984 * Allocates a chunk of memory with a kernel or/and a user mode mapping.
2985 *
2986 * The memory is fixed and it's possible to query the physical addresses using
2987 * SUPR0MemGetPhys().
2988 *
2989 * @returns IPRT status code.
2990 * @param pSession The session to associated the allocation with.
2991 * @param cPages The number of pages to allocate.
2992 * @param fFlags Flags, reserved for the future. Must be zero.
2993 * @param ppvR3 Where to store the address of the Ring-3 mapping.
2994 * NULL if no ring-3 mapping.
2995 * @param ppvR3 Where to store the address of the Ring-0 mapping.
2996 * NULL if no ring-0 mapping.
2997 * @param paPages Where to store the addresses of the pages. Optional.
2998 */
2999SUPR0DECL(int) SUPR0PageAllocEx(PSUPDRVSESSION pSession, uint32_t cPages, uint32_t fFlags, PRTR3PTR ppvR3, PRTR0PTR ppvR0, PRTHCPHYS paPages)
3000{
3001 int rc;
3002 SUPDRVMEMREF Mem = { NIL_RTR0MEMOBJ, NIL_RTR0MEMOBJ, MEMREF_TYPE_UNUSED };
3003 LogFlow(("SUPR0PageAlloc: pSession=%p cb=%d ppvR3=%p\n", pSession, cPages, ppvR3));
3004
3005 /*
3006 * Validate input. The allowed allocation size must be at least equal to the maximum guest VRAM size.
3007 */
3008 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
3009 AssertPtrNullReturn(ppvR3, VERR_INVALID_POINTER);
3010 AssertPtrNullReturn(ppvR0, VERR_INVALID_POINTER);
3011 AssertReturn(ppvR3 || ppvR0, VERR_INVALID_PARAMETER);
3012 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
3013 if (cPages < 1 || cPages > VBOX_MAX_ALLOC_PAGE_COUNT)
3014 {
3015 Log(("SUPR0PageAlloc: Illegal request cb=%u; must be greater than 0 and smaller than %uMB (VBOX_MAX_ALLOC_PAGE_COUNT pages).\n", cPages, VBOX_MAX_ALLOC_PAGE_COUNT * (_1M / _4K)));
3016 return VERR_PAGE_COUNT_OUT_OF_RANGE;
3017 }
3018
3019 /*
3020 * Let IPRT do the work.
3021 */
3022 if (ppvR0)
3023 rc = RTR0MemObjAllocPage(&Mem.MemObj, (size_t)cPages * PAGE_SIZE, true /* fExecutable */);
3024 else
3025 rc = RTR0MemObjAllocPhysNC(&Mem.MemObj, (size_t)cPages * PAGE_SIZE, NIL_RTHCPHYS);
3026 if (RT_SUCCESS(rc))
3027 {
3028 int rc2;
3029 if (ppvR3)
3030 rc = RTR0MemObjMapUser(&Mem.MapObjR3, Mem.MemObj, (RTR3PTR)-1, 0,
3031 RTMEM_PROT_EXEC | RTMEM_PROT_WRITE | RTMEM_PROT_READ, RTR0ProcHandleSelf());
3032 else
3033 Mem.MapObjR3 = NIL_RTR0MEMOBJ;
3034 if (RT_SUCCESS(rc))
3035 {
3036 Mem.eType = MEMREF_TYPE_PAGE;
3037 rc = supdrvMemAdd(&Mem, pSession);
3038 if (!rc)
3039 {
3040 if (ppvR3)
3041 *ppvR3 = RTR0MemObjAddressR3(Mem.MapObjR3);
3042 if (ppvR0)
3043 *ppvR0 = RTR0MemObjAddress(Mem.MemObj);
3044 if (paPages)
3045 {
3046 uint32_t iPage = cPages;
3047 while (iPage-- > 0)
3048 {
3049 paPages[iPage] = RTR0MemObjGetPagePhysAddr(Mem.MapObjR3, iPage);
3050 Assert(paPages[iPage] != NIL_RTHCPHYS);
3051 }
3052 }
3053 return VINF_SUCCESS;
3054 }
3055
3056 rc2 = RTR0MemObjFree(Mem.MapObjR3, false);
3057 AssertRC(rc2);
3058 }
3059
3060 rc2 = RTR0MemObjFree(Mem.MemObj, false);
3061 AssertRC(rc2);
3062 }
3063 return rc;
3064}
3065
3066
3067/**
3068 * Maps a chunk of memory previously allocated by SUPR0PageAllocEx into kernel
3069 * space.
3070 *
3071 * @returns IPRT status code.
3072 * @param pSession The session to associated the allocation with.
3073 * @param pvR3 The ring-3 address returned by SUPR0PageAllocEx.
3074 * @param offSub Where to start mapping. Must be page aligned.
3075 * @param cbSub How much to map. Must be page aligned.
3076 * @param fFlags Flags, MBZ.
3077 * @param ppvR0 Where to return the address of the ring-0 mapping on
3078 * success.
3079 */
3080SUPR0DECL(int) SUPR0PageMapKernel(PSUPDRVSESSION pSession, RTR3PTR pvR3, uint32_t offSub, uint32_t cbSub,
3081 uint32_t fFlags, PRTR0PTR ppvR0)
3082{
3083 int rc;
3084 PSUPDRVBUNDLE pBundle;
3085 RTR0MEMOBJ hMemObj = NIL_RTR0MEMOBJ;
3086 LogFlow(("SUPR0PageMapKernel: pSession=%p pvR3=%p offSub=%#x cbSub=%#x\n", pSession, pvR3, offSub, cbSub));
3087
3088 /*
3089 * Validate input. The allowed allocation size must be at least equal to the maximum guest VRAM size.
3090 */
3091 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
3092 AssertPtrNullReturn(ppvR0, VERR_INVALID_POINTER);
3093 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
3094 AssertReturn(!(offSub & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
3095 AssertReturn(!(cbSub & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
3096 AssertReturn(cbSub, VERR_INVALID_PARAMETER);
3097
3098 /*
3099 * Find the memory object.
3100 */
3101 RTSpinlockAcquire(pSession->Spinlock);
3102 for (pBundle = &pSession->Bundle; pBundle; pBundle = pBundle->pNext)
3103 {
3104 if (pBundle->cUsed > 0)
3105 {
3106 unsigned i;
3107 for (i = 0; i < RT_ELEMENTS(pBundle->aMem); i++)
3108 {
3109 if ( ( pBundle->aMem[i].eType == MEMREF_TYPE_PAGE
3110 && pBundle->aMem[i].MemObj != NIL_RTR0MEMOBJ
3111 && pBundle->aMem[i].MapObjR3 != NIL_RTR0MEMOBJ
3112 && RTR0MemObjAddressR3(pBundle->aMem[i].MapObjR3) == pvR3)
3113 || ( pBundle->aMem[i].eType == MEMREF_TYPE_LOCKED
3114 && pBundle->aMem[i].MemObj != NIL_RTR0MEMOBJ
3115 && pBundle->aMem[i].MapObjR3 == NIL_RTR0MEMOBJ
3116 && RTR0MemObjAddressR3(pBundle->aMem[i].MemObj) == pvR3))
3117 {
3118 hMemObj = pBundle->aMem[i].MemObj;
3119 break;
3120 }
3121 }
3122 }
3123 }
3124 RTSpinlockRelease(pSession->Spinlock);
3125
3126 rc = VERR_INVALID_PARAMETER;
3127 if (hMemObj != NIL_RTR0MEMOBJ)
3128 {
3129 /*
3130 * Do some further input validations before calling IPRT.
3131 * (Cleanup is done indirectly by telling RTR0MemObjFree to include mappings.)
3132 */
3133 size_t cbMemObj = RTR0MemObjSize(hMemObj);
3134 if ( offSub < cbMemObj
3135 && cbSub <= cbMemObj
3136 && offSub + cbSub <= cbMemObj)
3137 {
3138 RTR0MEMOBJ hMapObj;
3139 rc = RTR0MemObjMapKernelEx(&hMapObj, hMemObj, (void *)-1, 0,
3140 RTMEM_PROT_READ | RTMEM_PROT_WRITE, offSub, cbSub);
3141 if (RT_SUCCESS(rc))
3142 *ppvR0 = RTR0MemObjAddress(hMapObj);
3143 }
3144 else
3145 SUPR0Printf("SUPR0PageMapKernel: cbMemObj=%#x offSub=%#x cbSub=%#x\n", cbMemObj, offSub, cbSub);
3146
3147 }
3148 return rc;
3149}
3150
3151
3152/**
3153 * Changes the page level protection of one or more pages previously allocated
3154 * by SUPR0PageAllocEx.
3155 *
3156 * @returns IPRT status code.
3157 * @param pSession The session to associated the allocation with.
3158 * @param pvR3 The ring-3 address returned by SUPR0PageAllocEx.
3159 * NIL_RTR3PTR if the ring-3 mapping should be unaffected.
3160 * @param pvR0 The ring-0 address returned by SUPR0PageAllocEx.
3161 * NIL_RTR0PTR if the ring-0 mapping should be unaffected.
3162 * @param offSub Where to start changing. Must be page aligned.
3163 * @param cbSub How much to change. Must be page aligned.
3164 * @param fProt The new page level protection, see RTMEM_PROT_*.
3165 */
3166SUPR0DECL(int) SUPR0PageProtect(PSUPDRVSESSION pSession, RTR3PTR pvR3, RTR0PTR pvR0, uint32_t offSub, uint32_t cbSub, uint32_t fProt)
3167{
3168 int rc;
3169 PSUPDRVBUNDLE pBundle;
3170 RTR0MEMOBJ hMemObjR0 = NIL_RTR0MEMOBJ;
3171 RTR0MEMOBJ hMemObjR3 = NIL_RTR0MEMOBJ;
3172 LogFlow(("SUPR0PageProtect: pSession=%p pvR3=%p pvR0=%p offSub=%#x cbSub=%#x fProt-%#x\n", pSession, pvR3, pvR0, offSub, cbSub, fProt));
3173
3174 /*
3175 * Validate input. The allowed allocation size must be at least equal to the maximum guest VRAM size.
3176 */
3177 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
3178 AssertReturn(!(fProt & ~(RTMEM_PROT_READ | RTMEM_PROT_WRITE | RTMEM_PROT_EXEC | RTMEM_PROT_NONE)), VERR_INVALID_PARAMETER);
3179 AssertReturn(!(offSub & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
3180 AssertReturn(!(cbSub & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
3181 AssertReturn(cbSub, VERR_INVALID_PARAMETER);
3182
3183 /*
3184 * Find the memory object.
3185 */
3186 RTSpinlockAcquire(pSession->Spinlock);
3187 for (pBundle = &pSession->Bundle; pBundle; pBundle = pBundle->pNext)
3188 {
3189 if (pBundle->cUsed > 0)
3190 {
3191 unsigned i;
3192 for (i = 0; i < RT_ELEMENTS(pBundle->aMem); i++)
3193 {
3194 if ( pBundle->aMem[i].eType == MEMREF_TYPE_PAGE
3195 && pBundle->aMem[i].MemObj != NIL_RTR0MEMOBJ
3196 && ( pBundle->aMem[i].MapObjR3 != NIL_RTR0MEMOBJ
3197 || pvR3 == NIL_RTR3PTR)
3198 && ( pvR0 == NIL_RTR0PTR
3199 || RTR0MemObjAddress(pBundle->aMem[i].MemObj) == pvR0)
3200 && ( pvR3 == NIL_RTR3PTR
3201 || RTR0MemObjAddressR3(pBundle->aMem[i].MapObjR3) == pvR3))
3202 {
3203 if (pvR0 != NIL_RTR0PTR)
3204 hMemObjR0 = pBundle->aMem[i].MemObj;
3205 if (pvR3 != NIL_RTR3PTR)
3206 hMemObjR3 = pBundle->aMem[i].MapObjR3;
3207 break;
3208 }
3209 }
3210 }
3211 }
3212 RTSpinlockRelease(pSession->Spinlock);
3213
3214 rc = VERR_INVALID_PARAMETER;
3215 if ( hMemObjR0 != NIL_RTR0MEMOBJ
3216 || hMemObjR3 != NIL_RTR0MEMOBJ)
3217 {
3218 /*
3219 * Do some further input validations before calling IPRT.
3220 */
3221 size_t cbMemObj = hMemObjR0 != NIL_RTR0PTR ? RTR0MemObjSize(hMemObjR0) : RTR0MemObjSize(hMemObjR3);
3222 if ( offSub < cbMemObj
3223 && cbSub <= cbMemObj
3224 && offSub + cbSub <= cbMemObj)
3225 {
3226 rc = VINF_SUCCESS;
3227 if (hMemObjR3 != NIL_RTR0PTR)
3228 rc = RTR0MemObjProtect(hMemObjR3, offSub, cbSub, fProt);
3229 if (hMemObjR0 != NIL_RTR0PTR && RT_SUCCESS(rc))
3230 rc = RTR0MemObjProtect(hMemObjR0, offSub, cbSub, fProt);
3231 }
3232 else
3233 SUPR0Printf("SUPR0PageMapKernel: cbMemObj=%#x offSub=%#x cbSub=%#x\n", cbMemObj, offSub, cbSub);
3234
3235 }
3236 return rc;
3237
3238}
3239
3240
3241/**
3242 * Free memory allocated by SUPR0PageAlloc() and SUPR0PageAllocEx().
3243 *
3244 * @returns IPRT status code.
3245 * @param pSession The session owning the allocation.
3246 * @param pvR3 The Ring-3 address returned by SUPR0PageAlloc() or
3247 * SUPR0PageAllocEx().
3248 */
3249SUPR0DECL(int) SUPR0PageFree(PSUPDRVSESSION pSession, RTR3PTR pvR3)
3250{
3251 LogFlow(("SUPR0PageFree: pSession=%p pvR3=%p\n", pSession, (void *)pvR3));
3252 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
3253 return supdrvMemRelease(pSession, (RTHCUINTPTR)pvR3, MEMREF_TYPE_PAGE);
3254}
3255
3256
3257/**
3258 * Gets the paging mode of the current CPU.
3259 *
3260 * @returns Paging mode, SUPPAGEINGMODE_INVALID on error.
3261 */
3262SUPR0DECL(SUPPAGINGMODE) SUPR0GetPagingMode(void)
3263{
3264 SUPPAGINGMODE enmMode;
3265
3266 RTR0UINTREG cr0 = ASMGetCR0();
3267 if ((cr0 & (X86_CR0_PG | X86_CR0_PE)) != (X86_CR0_PG | X86_CR0_PE))
3268 enmMode = SUPPAGINGMODE_INVALID;
3269 else
3270 {
3271 RTR0UINTREG cr4 = ASMGetCR4();
3272 uint32_t fNXEPlusLMA = 0;
3273 if (cr4 & X86_CR4_PAE)
3274 {
3275 uint32_t fExtFeatures = ASMCpuId_EDX(0x80000001);
3276 if (fExtFeatures & (X86_CPUID_EXT_FEATURE_EDX_NX | X86_CPUID_EXT_FEATURE_EDX_LONG_MODE))
3277 {
3278 uint64_t efer = ASMRdMsr(MSR_K6_EFER);
3279 if ((fExtFeatures & X86_CPUID_EXT_FEATURE_EDX_NX) && (efer & MSR_K6_EFER_NXE))
3280 fNXEPlusLMA |= RT_BIT(0);
3281 if ((fExtFeatures & X86_CPUID_EXT_FEATURE_EDX_LONG_MODE) && (efer & MSR_K6_EFER_LMA))
3282 fNXEPlusLMA |= RT_BIT(1);
3283 }
3284 }
3285
3286 switch ((cr4 & (X86_CR4_PAE | X86_CR4_PGE)) | fNXEPlusLMA)
3287 {
3288 case 0:
3289 enmMode = SUPPAGINGMODE_32_BIT;
3290 break;
3291
3292 case X86_CR4_PGE:
3293 enmMode = SUPPAGINGMODE_32_BIT_GLOBAL;
3294 break;
3295
3296 case X86_CR4_PAE:
3297 enmMode = SUPPAGINGMODE_PAE;
3298 break;
3299
3300 case X86_CR4_PAE | RT_BIT(0):
3301 enmMode = SUPPAGINGMODE_PAE_NX;
3302 break;
3303
3304 case X86_CR4_PAE | X86_CR4_PGE:
3305 enmMode = SUPPAGINGMODE_PAE_GLOBAL;
3306 break;
3307
3308 case X86_CR4_PAE | X86_CR4_PGE | RT_BIT(0):
3309 enmMode = SUPPAGINGMODE_PAE_GLOBAL;
3310 break;
3311
3312 case RT_BIT(1) | X86_CR4_PAE:
3313 enmMode = SUPPAGINGMODE_AMD64;
3314 break;
3315
3316 case RT_BIT(1) | X86_CR4_PAE | RT_BIT(0):
3317 enmMode = SUPPAGINGMODE_AMD64_NX;
3318 break;
3319
3320 case RT_BIT(1) | X86_CR4_PAE | X86_CR4_PGE:
3321 enmMode = SUPPAGINGMODE_AMD64_GLOBAL;
3322 break;
3323
3324 case RT_BIT(1) | X86_CR4_PAE | X86_CR4_PGE | RT_BIT(0):
3325 enmMode = SUPPAGINGMODE_AMD64_GLOBAL_NX;
3326 break;
3327
3328 default:
3329 AssertMsgFailed(("Cannot happen! cr4=%#x fNXEPlusLMA=%d\n", cr4, fNXEPlusLMA));
3330 enmMode = SUPPAGINGMODE_INVALID;
3331 break;
3332 }
3333 }
3334 return enmMode;
3335}
3336
3337
3338/**
3339 * Enables or disabled hardware virtualization extensions using native OS APIs.
3340 *
3341 * @returns VBox status code.
3342 * @retval VINF_SUCCESS on success.
3343 * @retval VERR_NOT_SUPPORTED if not supported by the native OS.
3344 *
3345 * @param fEnable Whether to enable or disable.
3346 */
3347SUPR0DECL(int) SUPR0EnableVTx(bool fEnable)
3348{
3349#ifdef RT_OS_DARWIN
3350 return supdrvOSEnableVTx(fEnable);
3351#else
3352 return VERR_NOT_SUPPORTED;
3353#endif
3354}
3355
3356
3357/**
3358 * Suspends hardware virtualization extensions using the native OS API.
3359 *
3360 * This is called prior to entering raw-mode context.
3361 *
3362 * @returns @c true if suspended, @c false if not.
3363 */
3364SUPR0DECL(bool) SUPR0SuspendVTxOnCpu(void)
3365{
3366#ifdef RT_OS_DARWIN
3367 return supdrvOSSuspendVTxOnCpu();
3368#else
3369 return false;
3370#endif
3371}
3372
3373
3374/**
3375 * Resumes hardware virtualization extensions using the native OS API.
3376 *
3377 * This is called after to entering raw-mode context.
3378 *
3379 * @param fSuspended The return value of SUPR0SuspendVTxOnCpu.
3380 */
3381SUPR0DECL(void) SUPR0ResumeVTxOnCpu(bool fSuspended)
3382{
3383#ifdef RT_OS_DARWIN
3384 supdrvOSResumeVTxOnCpu(fSuspended);
3385#else
3386 Assert(!fSuspended);
3387#endif
3388}
3389
3390
3391/**
3392 * Queries the AMD-V and VT-x capabilities of the calling CPU.
3393 *
3394 * @returns VBox status code.
3395 * @retval VERR_VMX_NO_VMX
3396 * @retval VERR_VMX_MSR_SMX_VMXON_DISABLED
3397 * @retval VERR_VMX_MSR_VMXON_DISABLED
3398 * @retval VERR_VMX_MSR_LOCKING_FAILED
3399 * @retval VERR_SVM_NO_SVM
3400 * @retval VERR_SVM_DISABLED
3401 * @retval VERR_UNSUPPORTED_CPU if not identifiable as an AMD, Intel or VIA
3402 * (centaur) CPU.
3403 *
3404 * @param pSession The session handle.
3405 * @param pfCaps Where to store the capabilities.
3406 */
3407SUPR0DECL(int) SUPR0QueryVTCaps(PSUPDRVSESSION pSession, uint32_t *pfCaps)
3408{
3409 int rc = VERR_UNSUPPORTED_CPU;
3410 RTTHREADPREEMPTSTATE PreemptState = RTTHREADPREEMPTSTATE_INITIALIZER;
3411
3412 /*
3413 * Input validation.
3414 */
3415 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
3416 AssertPtrReturn(pfCaps, VERR_INVALID_POINTER);
3417
3418 *pfCaps = 0;
3419 /* We may modify MSRs and re-read them, disable preemption so we make sure we don't migrate CPUs. */
3420 RTThreadPreemptDisable(&PreemptState);
3421 if (ASMHasCpuId())
3422 {
3423 uint32_t fFeaturesECX, fFeaturesEDX, uDummy;
3424 uint32_t uMaxId, uVendorEBX, uVendorECX, uVendorEDX;
3425
3426 ASMCpuId(0, &uMaxId, &uVendorEBX, &uVendorECX, &uVendorEDX);
3427 ASMCpuId(1, &uDummy, &uDummy, &fFeaturesECX, &fFeaturesEDX);
3428
3429 if ( ASMIsValidStdRange(uMaxId)
3430 && ( ASMIsIntelCpuEx( uVendorEBX, uVendorECX, uVendorEDX)
3431 || ASMIsViaCentaurCpuEx(uVendorEBX, uVendorECX, uVendorEDX) )
3432 )
3433 {
3434 if ( (fFeaturesECX & X86_CPUID_FEATURE_ECX_VMX)
3435 && (fFeaturesEDX & X86_CPUID_FEATURE_EDX_MSR)
3436 && (fFeaturesEDX & X86_CPUID_FEATURE_EDX_FXSR)
3437 )
3438 {
3439 /** @todo Unify code with hmR0InitIntelCpu(). */
3440 uint64_t u64FeatMsr = ASMRdMsr(MSR_IA32_FEATURE_CONTROL);
3441 bool const fInSmxMode = RT_BOOL(ASMGetCR4() & X86_CR4_SMXE);
3442 bool fMsrLocked = RT_BOOL(u64FeatMsr & MSR_IA32_FEATURE_CONTROL_LOCK);
3443 bool fSmxVmxAllowed = RT_BOOL(u64FeatMsr & MSR_IA32_FEATURE_CONTROL_SMX_VMXON);
3444 bool fVmxAllowed = RT_BOOL(u64FeatMsr & MSR_IA32_FEATURE_CONTROL_VMXON);
3445
3446 /* Check if the LOCK bit is set but excludes the required VMXON bit. */
3447 if (fMsrLocked)
3448 {
3449 if (fInSmxMode && !fSmxVmxAllowed)
3450 rc = VERR_VMX_MSR_SMX_VMXON_DISABLED;
3451 else if (!fInSmxMode && !fVmxAllowed)
3452 rc = VERR_VMX_MSR_VMXON_DISABLED;
3453 else
3454 rc = VINF_SUCCESS;
3455 }
3456 else
3457 {
3458 /*
3459 * MSR is not yet locked; we can change it ourselves here.
3460 * Once the lock bit is set, this MSR can no longer be modified.
3461 */
3462 bool fAllowed;
3463 u64FeatMsr |= MSR_IA32_FEATURE_CONTROL_LOCK;
3464 if (fInSmxMode)
3465 u64FeatMsr |= MSR_IA32_FEATURE_CONTROL_SMX_VMXON;
3466 else
3467 u64FeatMsr |= MSR_IA32_FEATURE_CONTROL_VMXON;
3468
3469 ASMWrMsr(MSR_IA32_FEATURE_CONTROL, u64FeatMsr);
3470
3471 /* Verify. */
3472 u64FeatMsr = ASMRdMsr(MSR_IA32_FEATURE_CONTROL);
3473 fMsrLocked = RT_BOOL(u64FeatMsr & MSR_IA32_FEATURE_CONTROL_LOCK);
3474 fSmxVmxAllowed = fMsrLocked && RT_BOOL(u64FeatMsr & MSR_IA32_FEATURE_CONTROL_SMX_VMXON);
3475 fVmxAllowed = fMsrLocked && RT_BOOL(u64FeatMsr & MSR_IA32_FEATURE_CONTROL_VMXON);
3476 fAllowed = fInSmxMode ? fSmxVmxAllowed : fVmxAllowed;
3477 if (fAllowed)
3478 rc = VINF_SUCCESS;
3479 else
3480 rc = VERR_VMX_MSR_LOCKING_FAILED;
3481 }
3482
3483 if (rc == VINF_SUCCESS)
3484 {
3485 VMX_CAPABILITY vtCaps;
3486
3487 *pfCaps |= SUPVTCAPS_VT_X;
3488
3489 vtCaps.u = ASMRdMsr(MSR_IA32_VMX_PROCBASED_CTLS);
3490 if (vtCaps.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC_USE_SECONDARY_EXEC_CTRL)
3491 {
3492 vtCaps.u = ASMRdMsr(MSR_IA32_VMX_PROCBASED_CTLS2);
3493 if (vtCaps.n.allowed1 & VMX_VMCS_CTRL_PROC_EXEC2_EPT)
3494 *pfCaps |= SUPVTCAPS_NESTED_PAGING;
3495 }
3496 }
3497 }
3498 else
3499 rc = VERR_VMX_NO_VMX;
3500 }
3501 else if ( ASMIsAmdCpuEx(uVendorEBX, uVendorECX, uVendorEDX)
3502 && ASMIsValidStdRange(uMaxId))
3503 {
3504 uint32_t fExtFeaturesEcx, uExtMaxId;
3505 ASMCpuId(0x80000000, &uExtMaxId, &uDummy, &uDummy, &uDummy);
3506 ASMCpuId(0x80000001, &uDummy, &uDummy, &fExtFeaturesEcx, &uDummy);
3507 if ( ASMIsValidExtRange(uExtMaxId)
3508 && uExtMaxId >= 0x8000000a
3509 && (fExtFeaturesEcx & X86_CPUID_AMD_FEATURE_ECX_SVM)
3510 && (fFeaturesEDX & X86_CPUID_FEATURE_EDX_MSR)
3511 && (fFeaturesEDX & X86_CPUID_FEATURE_EDX_FXSR)
3512 )
3513 {
3514 /* Check if SVM is disabled */
3515 uint64_t u64FeatMsr = ASMRdMsr(MSR_K8_VM_CR);
3516 if (!(u64FeatMsr & MSR_K8_VM_CR_SVM_DISABLE))
3517 {
3518 uint32_t fSvmFeatures;
3519 *pfCaps |= SUPVTCAPS_AMD_V;
3520
3521 /* Query AMD-V features. */
3522 ASMCpuId(0x8000000a, &uDummy, &uDummy, &uDummy, &fSvmFeatures);
3523 if (fSvmFeatures & AMD_CPUID_SVM_FEATURE_EDX_NESTED_PAGING)
3524 *pfCaps |= SUPVTCAPS_NESTED_PAGING;
3525
3526 rc = VINF_SUCCESS;
3527 }
3528 else
3529 rc = VERR_SVM_DISABLED;
3530 }
3531 else
3532 rc = VERR_SVM_NO_SVM;
3533 }
3534 }
3535
3536 RTThreadPreemptRestore(&PreemptState);
3537 return rc;
3538}
3539
3540
3541/**
3542 * (Re-)initializes the per-cpu structure prior to starting or resuming the GIP
3543 * updating.
3544 *
3545 * @param pGipCpu The per CPU structure for this CPU.
3546 * @param u64NanoTS The current time.
3547 */
3548static void supdrvGipReInitCpu(PSUPGIPCPU pGipCpu, uint64_t u64NanoTS)
3549{
3550 pGipCpu->u64TSC = ASMReadTSC() - pGipCpu->u32UpdateIntervalTSC;
3551 pGipCpu->u64NanoTS = u64NanoTS;
3552}
3553
3554
3555/**
3556 * Set the current TSC and NanoTS value for the CPU.
3557 *
3558 * @param idCpu The CPU ID. Unused - we have to use the APIC ID.
3559 * @param pvUser1 Pointer to the ring-0 GIP mapping.
3560 * @param pvUser2 Pointer to the variable holding the current time.
3561 */
3562static DECLCALLBACK(void) supdrvGipReInitCpuCallback(RTCPUID idCpu, void *pvUser1, void *pvUser2)
3563{
3564 PSUPGLOBALINFOPAGE pGip = (PSUPGLOBALINFOPAGE)pvUser1;
3565 unsigned iCpu = pGip->aiCpuFromApicId[ASMGetApicId()];
3566
3567 if (RT_LIKELY(iCpu < pGip->cCpus && pGip->aCPUs[iCpu].idCpu == idCpu))
3568 supdrvGipReInitCpu(&pGip->aCPUs[iCpu], *(uint64_t *)pvUser2);
3569
3570 NOREF(pvUser2);
3571 NOREF(idCpu);
3572}
3573
3574
3575/**
3576 * Maps the GIP into userspace and/or get the physical address of the GIP.
3577 *
3578 * @returns IPRT status code.
3579 * @param pSession Session to which the GIP mapping should belong.
3580 * @param ppGipR3 Where to store the address of the ring-3 mapping. (optional)
3581 * @param pHCPhysGip Where to store the physical address. (optional)
3582 *
3583 * @remark There is no reference counting on the mapping, so one call to this function
3584 * count globally as one reference. One call to SUPR0GipUnmap() is will unmap GIP
3585 * and remove the session as a GIP user.
3586 */
3587SUPR0DECL(int) SUPR0GipMap(PSUPDRVSESSION pSession, PRTR3PTR ppGipR3, PRTHCPHYS pHCPhysGip)
3588{
3589 int rc;
3590 PSUPDRVDEVEXT pDevExt = pSession->pDevExt;
3591 RTR3PTR pGipR3 = NIL_RTR3PTR;
3592 RTHCPHYS HCPhys = NIL_RTHCPHYS;
3593 LogFlow(("SUPR0GipMap: pSession=%p ppGipR3=%p pHCPhysGip=%p\n", pSession, ppGipR3, pHCPhysGip));
3594
3595 /*
3596 * Validate
3597 */
3598 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
3599 AssertPtrNullReturn(ppGipR3, VERR_INVALID_POINTER);
3600 AssertPtrNullReturn(pHCPhysGip, VERR_INVALID_POINTER);
3601
3602#ifdef SUPDRV_USE_MUTEX_FOR_GIP
3603 RTSemMutexRequest(pDevExt->mtxGip, RT_INDEFINITE_WAIT);
3604#else
3605 RTSemFastMutexRequest(pDevExt->mtxGip);
3606#endif
3607 if (pDevExt->pGip)
3608 {
3609 /*
3610 * Map it?
3611 */
3612 rc = VINF_SUCCESS;
3613 if (ppGipR3)
3614 {
3615 if (pSession->GipMapObjR3 == NIL_RTR0MEMOBJ)
3616 rc = RTR0MemObjMapUser(&pSession->GipMapObjR3, pDevExt->GipMemObj, (RTR3PTR)-1, 0,
3617 RTMEM_PROT_READ, RTR0ProcHandleSelf());
3618 if (RT_SUCCESS(rc))
3619 pGipR3 = RTR0MemObjAddressR3(pSession->GipMapObjR3);
3620 }
3621
3622 /*
3623 * Get physical address.
3624 */
3625 if (pHCPhysGip && RT_SUCCESS(rc))
3626 HCPhys = pDevExt->HCPhysGip;
3627
3628 /*
3629 * Reference globally.
3630 */
3631 if (!pSession->fGipReferenced && RT_SUCCESS(rc))
3632 {
3633 pSession->fGipReferenced = 1;
3634 pDevExt->cGipUsers++;
3635 if (pDevExt->cGipUsers == 1)
3636 {
3637 PSUPGLOBALINFOPAGE pGipR0 = pDevExt->pGip;
3638 uint64_t u64NanoTS;
3639 uint32_t u32SystemResolution;
3640 unsigned i;
3641
3642 LogFlow(("SUPR0GipMap: Resumes GIP updating\n"));
3643
3644 /*
3645 * Try bump up the system timer resolution.
3646 * The more interrupts the better...
3647 */
3648 if ( RT_SUCCESS_NP(RTTimerRequestSystemGranularity( 976563 /* 1024 HZ */, &u32SystemResolution))
3649 || RT_SUCCESS_NP(RTTimerRequestSystemGranularity( 1000000 /* 1000 HZ */, &u32SystemResolution))
3650 || RT_SUCCESS_NP(RTTimerRequestSystemGranularity( 1953125 /* 512 HZ */, &u32SystemResolution))
3651 || RT_SUCCESS_NP(RTTimerRequestSystemGranularity( 2000000 /* 500 HZ */, &u32SystemResolution))
3652 )
3653 {
3654 Assert(RTTimerGetSystemGranularity() <= u32SystemResolution);
3655 pDevExt->u32SystemTimerGranularityGrant = u32SystemResolution;
3656 }
3657
3658 if (pGipR0->aCPUs[0].u32TransactionId != 2 /* not the first time */)
3659 {
3660 for (i = 0; i < RT_ELEMENTS(pGipR0->aCPUs); i++)
3661 ASMAtomicUoWriteU32(&pGipR0->aCPUs[i].u32TransactionId,
3662 (pGipR0->aCPUs[i].u32TransactionId + GIP_UPDATEHZ_RECALC_FREQ * 2)
3663 & ~(GIP_UPDATEHZ_RECALC_FREQ * 2 - 1));
3664 ASMAtomicWriteU64(&pGipR0->u64NanoTSLastUpdateHz, 0);
3665 }
3666
3667 u64NanoTS = RTTimeSystemNanoTS() - pGipR0->u32UpdateIntervalNS;
3668 if ( pGipR0->u32Mode == SUPGIPMODE_SYNC_TSC
3669 || RTMpGetOnlineCount() == 1)
3670 supdrvGipReInitCpu(&pGipR0->aCPUs[0], u64NanoTS);
3671 else
3672 RTMpOnAll(supdrvGipReInitCpuCallback, pGipR0, &u64NanoTS);
3673
3674#ifndef DO_NOT_START_GIP
3675 rc = RTTimerStart(pDevExt->pGipTimer, 0); AssertRC(rc);
3676#endif
3677 rc = VINF_SUCCESS;
3678 }
3679 }
3680 }
3681 else
3682 {
3683 rc = VERR_GENERAL_FAILURE;
3684 Log(("SUPR0GipMap: GIP is not available!\n"));
3685 }
3686#ifdef SUPDRV_USE_MUTEX_FOR_GIP
3687 RTSemMutexRelease(pDevExt->mtxGip);
3688#else
3689 RTSemFastMutexRelease(pDevExt->mtxGip);
3690#endif
3691
3692 /*
3693 * Write returns.
3694 */
3695 if (pHCPhysGip)
3696 *pHCPhysGip = HCPhys;
3697 if (ppGipR3)
3698 *ppGipR3 = pGipR3;
3699
3700#ifdef DEBUG_DARWIN_GIP
3701 OSDBGPRINT(("SUPR0GipMap: returns %d *pHCPhysGip=%lx pGipR3=%p\n", rc, (unsigned long)HCPhys, (void *)pGipR3));
3702#else
3703 LogFlow(( "SUPR0GipMap: returns %d *pHCPhysGip=%lx pGipR3=%p\n", rc, (unsigned long)HCPhys, (void *)pGipR3));
3704#endif
3705 return rc;
3706}
3707
3708
3709/**
3710 * Unmaps any user mapping of the GIP and terminates all GIP access
3711 * from this session.
3712 *
3713 * @returns IPRT status code.
3714 * @param pSession Session to which the GIP mapping should belong.
3715 */
3716SUPR0DECL(int) SUPR0GipUnmap(PSUPDRVSESSION pSession)
3717{
3718 int rc = VINF_SUCCESS;
3719 PSUPDRVDEVEXT pDevExt = pSession->pDevExt;
3720#ifdef DEBUG_DARWIN_GIP
3721 OSDBGPRINT(("SUPR0GipUnmap: pSession=%p pGip=%p GipMapObjR3=%p\n",
3722 pSession,
3723 pSession->GipMapObjR3 != NIL_RTR0MEMOBJ ? RTR0MemObjAddress(pSession->GipMapObjR3) : NULL,
3724 pSession->GipMapObjR3));
3725#else
3726 LogFlow(("SUPR0GipUnmap: pSession=%p\n", pSession));
3727#endif
3728 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
3729
3730#ifdef SUPDRV_USE_MUTEX_FOR_GIP
3731 RTSemMutexRequest(pDevExt->mtxGip, RT_INDEFINITE_WAIT);
3732#else
3733 RTSemFastMutexRequest(pDevExt->mtxGip);
3734#endif
3735
3736 /*
3737 * Unmap anything?
3738 */
3739 if (pSession->GipMapObjR3 != NIL_RTR0MEMOBJ)
3740 {
3741 rc = RTR0MemObjFree(pSession->GipMapObjR3, false);
3742 AssertRC(rc);
3743 if (RT_SUCCESS(rc))
3744 pSession->GipMapObjR3 = NIL_RTR0MEMOBJ;
3745 }
3746
3747 /*
3748 * Dereference global GIP.
3749 */
3750 if (pSession->fGipReferenced && !rc)
3751 {
3752 pSession->fGipReferenced = 0;
3753 if ( pDevExt->cGipUsers > 0
3754 && !--pDevExt->cGipUsers)
3755 {
3756 LogFlow(("SUPR0GipUnmap: Suspends GIP updating\n"));
3757#ifndef DO_NOT_START_GIP
3758 rc = RTTimerStop(pDevExt->pGipTimer); AssertRC(rc); rc = VINF_SUCCESS;
3759#endif
3760
3761 if (pDevExt->u32SystemTimerGranularityGrant)
3762 {
3763 int rc2 = RTTimerReleaseSystemGranularity(pDevExt->u32SystemTimerGranularityGrant);
3764 AssertRC(rc2);
3765 pDevExt->u32SystemTimerGranularityGrant = 0;
3766 }
3767 }
3768 }
3769
3770#ifdef SUPDRV_USE_MUTEX_FOR_GIP
3771 RTSemMutexRelease(pDevExt->mtxGip);
3772#else
3773 RTSemFastMutexRelease(pDevExt->mtxGip);
3774#endif
3775
3776 return rc;
3777}
3778
3779
3780/**
3781 * Gets the GIP pointer.
3782 *
3783 * @returns Pointer to the GIP or NULL.
3784 */
3785SUPDECL(PSUPGLOBALINFOPAGE) SUPGetGIP(void)
3786{
3787 return g_pSUPGlobalInfoPage;
3788}
3789
3790
3791/**
3792 * Register a component factory with the support driver.
3793 *
3794 * This is currently restricted to kernel sessions only.
3795 *
3796 * @returns VBox status code.
3797 * @retval VINF_SUCCESS on success.
3798 * @retval VERR_NO_MEMORY if we're out of memory.
3799 * @retval VERR_ALREADY_EXISTS if the factory has already been registered.
3800 * @retval VERR_ACCESS_DENIED if it isn't a kernel session.
3801 * @retval VERR_INVALID_PARAMETER on invalid parameter.
3802 * @retval VERR_INVALID_POINTER on invalid pointer parameter.
3803 *
3804 * @param pSession The SUPDRV session (must be a ring-0 session).
3805 * @param pFactory Pointer to the component factory registration structure.
3806 *
3807 * @remarks This interface is also available via SUPR0IdcComponentRegisterFactory.
3808 */
3809SUPR0DECL(int) SUPR0ComponentRegisterFactory(PSUPDRVSESSION pSession, PCSUPDRVFACTORY pFactory)
3810{
3811 PSUPDRVFACTORYREG pNewReg;
3812 const char *psz;
3813 int rc;
3814
3815 /*
3816 * Validate parameters.
3817 */
3818 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
3819 AssertReturn(pSession->R0Process == NIL_RTR0PROCESS, VERR_ACCESS_DENIED);
3820 AssertPtrReturn(pFactory, VERR_INVALID_POINTER);
3821 AssertPtrReturn(pFactory->pfnQueryFactoryInterface, VERR_INVALID_POINTER);
3822 psz = RTStrEnd(pFactory->szName, sizeof(pFactory->szName));
3823 AssertReturn(psz, VERR_INVALID_PARAMETER);
3824
3825 /*
3826 * Allocate and initialize a new registration structure.
3827 */
3828 pNewReg = (PSUPDRVFACTORYREG)RTMemAlloc(sizeof(SUPDRVFACTORYREG));
3829 if (pNewReg)
3830 {
3831 pNewReg->pNext = NULL;
3832 pNewReg->pFactory = pFactory;
3833 pNewReg->pSession = pSession;
3834 pNewReg->cchName = psz - &pFactory->szName[0];
3835
3836 /*
3837 * Add it to the tail of the list after checking for prior registration.
3838 */
3839 rc = RTSemFastMutexRequest(pSession->pDevExt->mtxComponentFactory);
3840 if (RT_SUCCESS(rc))
3841 {
3842 PSUPDRVFACTORYREG pPrev = NULL;
3843 PSUPDRVFACTORYREG pCur = pSession->pDevExt->pComponentFactoryHead;
3844 while (pCur && pCur->pFactory != pFactory)
3845 {
3846 pPrev = pCur;
3847 pCur = pCur->pNext;
3848 }
3849 if (!pCur)
3850 {
3851 if (pPrev)
3852 pPrev->pNext = pNewReg;
3853 else
3854 pSession->pDevExt->pComponentFactoryHead = pNewReg;
3855 rc = VINF_SUCCESS;
3856 }
3857 else
3858 rc = VERR_ALREADY_EXISTS;
3859
3860 RTSemFastMutexRelease(pSession->pDevExt->mtxComponentFactory);
3861 }
3862
3863 if (RT_FAILURE(rc))
3864 RTMemFree(pNewReg);
3865 }
3866 else
3867 rc = VERR_NO_MEMORY;
3868 return rc;
3869}
3870
3871
3872/**
3873 * Deregister a component factory.
3874 *
3875 * @returns VBox status code.
3876 * @retval VINF_SUCCESS on success.
3877 * @retval VERR_NOT_FOUND if the factory wasn't registered.
3878 * @retval VERR_ACCESS_DENIED if it isn't a kernel session.
3879 * @retval VERR_INVALID_PARAMETER on invalid parameter.
3880 * @retval VERR_INVALID_POINTER on invalid pointer parameter.
3881 *
3882 * @param pSession The SUPDRV session (must be a ring-0 session).
3883 * @param pFactory Pointer to the component factory registration structure
3884 * previously passed SUPR0ComponentRegisterFactory().
3885 *
3886 * @remarks This interface is also available via SUPR0IdcComponentDeregisterFactory.
3887 */
3888SUPR0DECL(int) SUPR0ComponentDeregisterFactory(PSUPDRVSESSION pSession, PCSUPDRVFACTORY pFactory)
3889{
3890 int rc;
3891
3892 /*
3893 * Validate parameters.
3894 */
3895 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
3896 AssertReturn(pSession->R0Process == NIL_RTR0PROCESS, VERR_ACCESS_DENIED);
3897 AssertPtrReturn(pFactory, VERR_INVALID_POINTER);
3898
3899 /*
3900 * Take the lock and look for the registration record.
3901 */
3902 rc = RTSemFastMutexRequest(pSession->pDevExt->mtxComponentFactory);
3903 if (RT_SUCCESS(rc))
3904 {
3905 PSUPDRVFACTORYREG pPrev = NULL;
3906 PSUPDRVFACTORYREG pCur = pSession->pDevExt->pComponentFactoryHead;
3907 while (pCur && pCur->pFactory != pFactory)
3908 {
3909 pPrev = pCur;
3910 pCur = pCur->pNext;
3911 }
3912 if (pCur)
3913 {
3914 if (!pPrev)
3915 pSession->pDevExt->pComponentFactoryHead = pCur->pNext;
3916 else
3917 pPrev->pNext = pCur->pNext;
3918
3919 pCur->pNext = NULL;
3920 pCur->pFactory = NULL;
3921 pCur->pSession = NULL;
3922 rc = VINF_SUCCESS;
3923 }
3924 else
3925 rc = VERR_NOT_FOUND;
3926
3927 RTSemFastMutexRelease(pSession->pDevExt->mtxComponentFactory);
3928
3929 RTMemFree(pCur);
3930 }
3931 return rc;
3932}
3933
3934
3935/**
3936 * Queries a component factory.
3937 *
3938 * @returns VBox status code.
3939 * @retval VERR_INVALID_PARAMETER on invalid parameter.
3940 * @retval VERR_INVALID_POINTER on invalid pointer parameter.
3941 * @retval VERR_SUPDRV_COMPONENT_NOT_FOUND if the component factory wasn't found.
3942 * @retval VERR_SUPDRV_INTERFACE_NOT_SUPPORTED if the interface wasn't supported.
3943 *
3944 * @param pSession The SUPDRV session.
3945 * @param pszName The name of the component factory.
3946 * @param pszInterfaceUuid The UUID of the factory interface (stringified).
3947 * @param ppvFactoryIf Where to store the factory interface.
3948 */
3949SUPR0DECL(int) SUPR0ComponentQueryFactory(PSUPDRVSESSION pSession, const char *pszName, const char *pszInterfaceUuid, void **ppvFactoryIf)
3950{
3951 const char *pszEnd;
3952 size_t cchName;
3953 int rc;
3954
3955 /*
3956 * Validate parameters.
3957 */
3958 AssertReturn(SUP_IS_SESSION_VALID(pSession), VERR_INVALID_PARAMETER);
3959
3960 AssertPtrReturn(pszName, VERR_INVALID_POINTER);
3961 pszEnd = RTStrEnd(pszName, RT_SIZEOFMEMB(SUPDRVFACTORY, szName));
3962 AssertReturn(pszEnd, VERR_INVALID_PARAMETER);
3963 cchName = pszEnd - pszName;
3964
3965 AssertPtrReturn(pszInterfaceUuid, VERR_INVALID_POINTER);
3966 pszEnd = RTStrEnd(pszInterfaceUuid, RTUUID_STR_LENGTH);
3967 AssertReturn(pszEnd, VERR_INVALID_PARAMETER);
3968
3969 AssertPtrReturn(ppvFactoryIf, VERR_INVALID_POINTER);
3970 *ppvFactoryIf = NULL;
3971
3972 /*
3973 * Take the lock and try all factories by this name.
3974 */
3975 rc = RTSemFastMutexRequest(pSession->pDevExt->mtxComponentFactory);
3976 if (RT_SUCCESS(rc))
3977 {
3978 PSUPDRVFACTORYREG pCur = pSession->pDevExt->pComponentFactoryHead;
3979 rc = VERR_SUPDRV_COMPONENT_NOT_FOUND;
3980 while (pCur)
3981 {
3982 if ( pCur->cchName == cchName
3983 && !memcmp(pCur->pFactory->szName, pszName, cchName))
3984 {
3985 void *pvFactory = pCur->pFactory->pfnQueryFactoryInterface(pCur->pFactory, pSession, pszInterfaceUuid);
3986 if (pvFactory)
3987 {
3988 *ppvFactoryIf = pvFactory;
3989 rc = VINF_SUCCESS;
3990 break;
3991 }
3992 rc = VERR_SUPDRV_INTERFACE_NOT_SUPPORTED;
3993 }
3994
3995 /* next */
3996 pCur = pCur->pNext;
3997 }
3998
3999 RTSemFastMutexRelease(pSession->pDevExt->mtxComponentFactory);
4000 }
4001 return rc;
4002}
4003
4004
4005/**
4006 * Adds a memory object to the session.
4007 *
4008 * @returns IPRT status code.
4009 * @param pMem Memory tracking structure containing the
4010 * information to track.
4011 * @param pSession The session.
4012 */
4013static int supdrvMemAdd(PSUPDRVMEMREF pMem, PSUPDRVSESSION pSession)
4014{
4015 PSUPDRVBUNDLE pBundle;
4016
4017 /*
4018 * Find free entry and record the allocation.
4019 */
4020 RTSpinlockAcquire(pSession->Spinlock);
4021 for (pBundle = &pSession->Bundle; pBundle; pBundle = pBundle->pNext)
4022 {
4023 if (pBundle->cUsed < RT_ELEMENTS(pBundle->aMem))
4024 {
4025 unsigned i;
4026 for (i = 0; i < RT_ELEMENTS(pBundle->aMem); i++)
4027 {
4028 if (pBundle->aMem[i].MemObj == NIL_RTR0MEMOBJ)
4029 {
4030 pBundle->cUsed++;
4031 pBundle->aMem[i] = *pMem;
4032 RTSpinlockRelease(pSession->Spinlock);
4033 return VINF_SUCCESS;
4034 }
4035 }
4036 AssertFailed(); /* !!this can't be happening!!! */
4037 }
4038 }
4039 RTSpinlockRelease(pSession->Spinlock);
4040
4041 /*
4042 * Need to allocate a new bundle.
4043 * Insert into the last entry in the bundle.
4044 */
4045 pBundle = (PSUPDRVBUNDLE)RTMemAllocZ(sizeof(*pBundle));
4046 if (!pBundle)
4047 return VERR_NO_MEMORY;
4048
4049 /* take last entry. */
4050 pBundle->cUsed++;
4051 pBundle->aMem[RT_ELEMENTS(pBundle->aMem) - 1] = *pMem;
4052
4053 /* insert into list. */
4054 RTSpinlockAcquire(pSession->Spinlock);
4055 pBundle->pNext = pSession->Bundle.pNext;
4056 pSession->Bundle.pNext = pBundle;
4057 RTSpinlockRelease(pSession->Spinlock);
4058
4059 return VINF_SUCCESS;
4060}
4061
4062
4063/**
4064 * Releases a memory object referenced by pointer and type.
4065 *
4066 * @returns IPRT status code.
4067 * @param pSession Session data.
4068 * @param uPtr Pointer to memory. This is matched against both the R0 and R3 addresses.
4069 * @param eType Memory type.
4070 */
4071static int supdrvMemRelease(PSUPDRVSESSION pSession, RTHCUINTPTR uPtr, SUPDRVMEMREFTYPE eType)
4072{
4073 PSUPDRVBUNDLE pBundle;
4074
4075 /*
4076 * Validate input.
4077 */
4078 if (!uPtr)
4079 {
4080 Log(("Illegal address %p\n", (void *)uPtr));
4081 return VERR_INVALID_PARAMETER;
4082 }
4083
4084 /*
4085 * Search for the address.
4086 */
4087 RTSpinlockAcquire(pSession->Spinlock);
4088 for (pBundle = &pSession->Bundle; pBundle; pBundle = pBundle->pNext)
4089 {
4090 if (pBundle->cUsed > 0)
4091 {
4092 unsigned i;
4093 for (i = 0; i < RT_ELEMENTS(pBundle->aMem); i++)
4094 {
4095 if ( pBundle->aMem[i].eType == eType
4096 && pBundle->aMem[i].MemObj != NIL_RTR0MEMOBJ
4097 && ( (RTHCUINTPTR)RTR0MemObjAddress(pBundle->aMem[i].MemObj) == uPtr
4098 || ( pBundle->aMem[i].MapObjR3 != NIL_RTR0MEMOBJ
4099 && RTR0MemObjAddressR3(pBundle->aMem[i].MapObjR3) == uPtr))
4100 )
4101 {
4102 /* Make a copy of it and release it outside the spinlock. */
4103 SUPDRVMEMREF Mem = pBundle->aMem[i];
4104 pBundle->aMem[i].eType = MEMREF_TYPE_UNUSED;
4105 pBundle->aMem[i].MemObj = NIL_RTR0MEMOBJ;
4106 pBundle->aMem[i].MapObjR3 = NIL_RTR0MEMOBJ;
4107 RTSpinlockRelease(pSession->Spinlock);
4108
4109 if (Mem.MapObjR3 != NIL_RTR0MEMOBJ)
4110 {
4111 int rc = RTR0MemObjFree(Mem.MapObjR3, false);
4112 AssertRC(rc); /** @todo figure out how to handle this. */
4113 }
4114 if (Mem.MemObj != NIL_RTR0MEMOBJ)
4115 {
4116 int rc = RTR0MemObjFree(Mem.MemObj, true /* fFreeMappings */);
4117 AssertRC(rc); /** @todo figure out how to handle this. */
4118 }
4119 return VINF_SUCCESS;
4120 }
4121 }
4122 }
4123 }
4124 RTSpinlockRelease(pSession->Spinlock);
4125 Log(("Failed to find %p!!! (eType=%d)\n", (void *)uPtr, eType));
4126 return VERR_INVALID_PARAMETER;
4127}
4128
4129
4130/**
4131 * Opens an image. If it's the first time it's opened the call must upload
4132 * the bits using the supdrvIOCtl_LdrLoad() / SUPDRV_IOCTL_LDR_LOAD function.
4133 *
4134 * This is the 1st step of the loading.
4135 *
4136 * @returns IPRT status code.
4137 * @param pDevExt Device globals.
4138 * @param pSession Session data.
4139 * @param pReq The open request.
4140 */
4141static int supdrvIOCtl_LdrOpen(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDROPEN pReq)
4142{
4143 int rc;
4144 PSUPDRVLDRIMAGE pImage;
4145 void *pv;
4146 size_t cchName = strlen(pReq->u.In.szName); /* (caller checked < 32). */
4147 LogFlow(("supdrvIOCtl_LdrOpen: szName=%s cbImageWithTabs=%d\n", pReq->u.In.szName, pReq->u.In.cbImageWithTabs));
4148
4149 /*
4150 * Check if we got an instance of the image already.
4151 */
4152 supdrvLdrLock(pDevExt);
4153 for (pImage = pDevExt->pLdrImages; pImage; pImage = pImage->pNext)
4154 {
4155 if ( pImage->szName[cchName] == '\0'
4156 && !memcmp(pImage->szName, pReq->u.In.szName, cchName))
4157 {
4158 /** @todo check cbImageBits and cbImageWithTabs here, if they differs that indicates that the images are different. */
4159 pImage->cUsage++;
4160 pReq->u.Out.pvImageBase = pImage->pvImage;
4161 pReq->u.Out.fNeedsLoading = pImage->uState == SUP_IOCTL_LDR_OPEN;
4162 pReq->u.Out.fNativeLoader = pImage->fNative;
4163 supdrvLdrAddUsage(pSession, pImage);
4164 supdrvLdrUnlock(pDevExt);
4165 return VINF_SUCCESS;
4166 }
4167 }
4168 /* (not found - add it!) */
4169
4170 /*
4171 * Allocate memory.
4172 */
4173 Assert(cchName < sizeof(pImage->szName));
4174 pv = RTMemAlloc(sizeof(SUPDRVLDRIMAGE));
4175 if (!pv)
4176 {
4177 supdrvLdrUnlock(pDevExt);
4178 Log(("supdrvIOCtl_LdrOpen: RTMemAlloc() failed\n"));
4179 return /*VERR_NO_MEMORY*/ VERR_INTERNAL_ERROR_2;
4180 }
4181
4182 /*
4183 * Setup and link in the LDR stuff.
4184 */
4185 pImage = (PSUPDRVLDRIMAGE)pv;
4186 pImage->pvImage = NULL;
4187 pImage->pvImageAlloc = NULL;
4188 pImage->cbImageWithTabs = pReq->u.In.cbImageWithTabs;
4189 pImage->cbImageBits = pReq->u.In.cbImageBits;
4190 pImage->cSymbols = 0;
4191 pImage->paSymbols = NULL;
4192 pImage->pachStrTab = NULL;
4193 pImage->cbStrTab = 0;
4194 pImage->pfnModuleInit = NULL;
4195 pImage->pfnModuleTerm = NULL;
4196 pImage->pfnServiceReqHandler = NULL;
4197 pImage->uState = SUP_IOCTL_LDR_OPEN;
4198 pImage->cUsage = 1;
4199 pImage->pDevExt = pDevExt;
4200 memcpy(pImage->szName, pReq->u.In.szName, cchName + 1);
4201
4202 /*
4203 * Try load it using the native loader, if that isn't supported, fall back
4204 * on the older method.
4205 */
4206 pImage->fNative = true;
4207 rc = supdrvOSLdrOpen(pDevExt, pImage, pReq->u.In.szFilename);
4208 if (rc == VERR_NOT_SUPPORTED)
4209 {
4210 pImage->pvImageAlloc = RTMemExecAlloc(pImage->cbImageBits + 31);
4211 pImage->pvImage = RT_ALIGN_P(pImage->pvImageAlloc, 32);
4212 pImage->fNative = false;
4213 rc = pImage->pvImageAlloc ? VINF_SUCCESS : VERR_NO_EXEC_MEMORY;
4214 }
4215 if (RT_FAILURE(rc))
4216 {
4217 supdrvLdrUnlock(pDevExt);
4218 RTMemFree(pImage);
4219 Log(("supdrvIOCtl_LdrOpen(%s): failed - %Rrc\n", pReq->u.In.szName, rc));
4220 return rc;
4221 }
4222 Assert(VALID_PTR(pImage->pvImage) || RT_FAILURE(rc));
4223
4224 /*
4225 * Link it.
4226 */
4227 pImage->pNext = pDevExt->pLdrImages;
4228 pDevExt->pLdrImages = pImage;
4229
4230 supdrvLdrAddUsage(pSession, pImage);
4231
4232 pReq->u.Out.pvImageBase = pImage->pvImage;
4233 pReq->u.Out.fNeedsLoading = true;
4234 pReq->u.Out.fNativeLoader = pImage->fNative;
4235 supdrvOSLdrNotifyOpened(pDevExt, pImage);
4236
4237 supdrvLdrUnlock(pDevExt);
4238 return VINF_SUCCESS;
4239}
4240
4241
4242/**
4243 * Worker that validates a pointer to an image entrypoint.
4244 *
4245 * @returns IPRT status code.
4246 * @param pDevExt The device globals.
4247 * @param pImage The loader image.
4248 * @param pv The pointer into the image.
4249 * @param fMayBeNull Whether it may be NULL.
4250 * @param pszWhat What is this entrypoint? (for logging)
4251 * @param pbImageBits The image bits prepared by ring-3.
4252 *
4253 * @remarks Will leave the lock on failure.
4254 */
4255static int supdrvLdrValidatePointer(PSUPDRVDEVEXT pDevExt, PSUPDRVLDRIMAGE pImage, void *pv,
4256 bool fMayBeNull, const uint8_t *pbImageBits, const char *pszWhat)
4257{
4258 if (!fMayBeNull || pv)
4259 {
4260 if ((uintptr_t)pv - (uintptr_t)pImage->pvImage >= pImage->cbImageBits)
4261 {
4262 supdrvLdrUnlock(pDevExt);
4263 Log(("Out of range (%p LB %#x): %s=%p\n", pImage->pvImage, pImage->cbImageBits, pszWhat, pv));
4264 return VERR_INVALID_PARAMETER;
4265 }
4266
4267 if (pImage->fNative)
4268 {
4269 int rc = supdrvOSLdrValidatePointer(pDevExt, pImage, pv, pbImageBits);
4270 if (RT_FAILURE(rc))
4271 {
4272 supdrvLdrUnlock(pDevExt);
4273 Log(("Bad entry point address: %s=%p (rc=%Rrc)\n", pszWhat, pv, rc));
4274 return rc;
4275 }
4276 }
4277 }
4278 return VINF_SUCCESS;
4279}
4280
4281
4282/**
4283 * Loads the image bits.
4284 *
4285 * This is the 2nd step of the loading.
4286 *
4287 * @returns IPRT status code.
4288 * @param pDevExt Device globals.
4289 * @param pSession Session data.
4290 * @param pReq The request.
4291 */
4292static int supdrvIOCtl_LdrLoad(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRLOAD pReq)
4293{
4294 PSUPDRVLDRUSAGE pUsage;
4295 PSUPDRVLDRIMAGE pImage;
4296 int rc;
4297 LogFlow(("supdrvIOCtl_LdrLoad: pvImageBase=%p cbImageWithBits=%d\n", pReq->u.In.pvImageBase, pReq->u.In.cbImageWithTabs));
4298
4299 /*
4300 * Find the ldr image.
4301 */
4302 supdrvLdrLock(pDevExt);
4303 pUsage = pSession->pLdrUsage;
4304 while (pUsage && pUsage->pImage->pvImage != pReq->u.In.pvImageBase)
4305 pUsage = pUsage->pNext;
4306 if (!pUsage)
4307 {
4308 supdrvLdrUnlock(pDevExt);
4309 Log(("SUP_IOCTL_LDR_LOAD: couldn't find image!\n"));
4310 return VERR_INVALID_HANDLE;
4311 }
4312 pImage = pUsage->pImage;
4313
4314 /*
4315 * Validate input.
4316 */
4317 if ( pImage->cbImageWithTabs != pReq->u.In.cbImageWithTabs
4318 || pImage->cbImageBits != pReq->u.In.cbImageBits)
4319 {
4320 supdrvLdrUnlock(pDevExt);
4321 Log(("SUP_IOCTL_LDR_LOAD: image size mismatch!! %d(prep) != %d(load) or %d != %d\n",
4322 pImage->cbImageWithTabs, pReq->u.In.cbImageWithTabs, pImage->cbImageBits, pReq->u.In.cbImageBits));
4323 return VERR_INVALID_HANDLE;
4324 }
4325
4326 if (pImage->uState != SUP_IOCTL_LDR_OPEN)
4327 {
4328 unsigned uState = pImage->uState;
4329 supdrvLdrUnlock(pDevExt);
4330 if (uState != SUP_IOCTL_LDR_LOAD)
4331 AssertMsgFailed(("SUP_IOCTL_LDR_LOAD: invalid image state %d (%#x)!\n", uState, uState));
4332 return VERR_ALREADY_LOADED;
4333 }
4334
4335 switch (pReq->u.In.eEPType)
4336 {
4337 case SUPLDRLOADEP_NOTHING:
4338 break;
4339
4340 case SUPLDRLOADEP_VMMR0:
4341 rc = supdrvLdrValidatePointer( pDevExt, pImage, pReq->u.In.EP.VMMR0.pvVMMR0, false, pReq->u.In.abImage, "pvVMMR0");
4342 if (RT_SUCCESS(rc))
4343 rc = supdrvLdrValidatePointer(pDevExt, pImage, pReq->u.In.EP.VMMR0.pvVMMR0EntryInt, false, pReq->u.In.abImage, "pvVMMR0EntryInt");
4344 if (RT_SUCCESS(rc))
4345 rc = supdrvLdrValidatePointer(pDevExt, pImage, pReq->u.In.EP.VMMR0.pvVMMR0EntryFast, false, pReq->u.In.abImage, "pvVMMR0EntryFast");
4346 if (RT_SUCCESS(rc))
4347 rc = supdrvLdrValidatePointer(pDevExt, pImage, pReq->u.In.EP.VMMR0.pvVMMR0EntryEx, false, pReq->u.In.abImage, "pvVMMR0EntryEx");
4348 if (RT_FAILURE(rc))
4349 return rc;
4350 break;
4351
4352 case SUPLDRLOADEP_SERVICE:
4353 rc = supdrvLdrValidatePointer(pDevExt, pImage, pReq->u.In.EP.Service.pfnServiceReq, false, pReq->u.In.abImage, "pfnServiceReq");
4354 if (RT_FAILURE(rc))
4355 return rc;
4356 if ( pReq->u.In.EP.Service.apvReserved[0] != NIL_RTR0PTR
4357 || pReq->u.In.EP.Service.apvReserved[1] != NIL_RTR0PTR
4358 || pReq->u.In.EP.Service.apvReserved[2] != NIL_RTR0PTR)
4359 {
4360 supdrvLdrUnlock(pDevExt);
4361 Log(("Out of range (%p LB %#x): apvReserved={%p,%p,%p} MBZ!\n",
4362 pImage->pvImage, pReq->u.In.cbImageWithTabs,
4363 pReq->u.In.EP.Service.apvReserved[0],
4364 pReq->u.In.EP.Service.apvReserved[1],
4365 pReq->u.In.EP.Service.apvReserved[2]));
4366 return VERR_INVALID_PARAMETER;
4367 }
4368 break;
4369
4370 default:
4371 supdrvLdrUnlock(pDevExt);
4372 Log(("Invalid eEPType=%d\n", pReq->u.In.eEPType));
4373 return VERR_INVALID_PARAMETER;
4374 }
4375
4376 rc = supdrvLdrValidatePointer(pDevExt, pImage, pReq->u.In.pfnModuleInit, true, pReq->u.In.abImage, "pfnModuleInit");
4377 if (RT_FAILURE(rc))
4378 return rc;
4379 rc = supdrvLdrValidatePointer(pDevExt, pImage, pReq->u.In.pfnModuleTerm, true, pReq->u.In.abImage, "pfnModuleTerm");
4380 if (RT_FAILURE(rc))
4381 return rc;
4382
4383 /*
4384 * Allocate and copy the tables.
4385 * (No need to do try/except as this is a buffered request.)
4386 */
4387 pImage->cbStrTab = pReq->u.In.cbStrTab;
4388 if (pImage->cbStrTab)
4389 {
4390 pImage->pachStrTab = (char *)RTMemAlloc(pImage->cbStrTab);
4391 if (pImage->pachStrTab)
4392 memcpy(pImage->pachStrTab, &pReq->u.In.abImage[pReq->u.In.offStrTab], pImage->cbStrTab);
4393 else
4394 rc = /*VERR_NO_MEMORY*/ VERR_INTERNAL_ERROR_3;
4395 }
4396
4397 pImage->cSymbols = pReq->u.In.cSymbols;
4398 if (RT_SUCCESS(rc) && pImage->cSymbols)
4399 {
4400 size_t cbSymbols = pImage->cSymbols * sizeof(SUPLDRSYM);
4401 pImage->paSymbols = (PSUPLDRSYM)RTMemAlloc(cbSymbols);
4402 if (pImage->paSymbols)
4403 memcpy(pImage->paSymbols, &pReq->u.In.abImage[pReq->u.In.offSymbols], cbSymbols);
4404 else
4405 rc = /*VERR_NO_MEMORY*/ VERR_INTERNAL_ERROR_4;
4406 }
4407
4408 /*
4409 * Copy the bits / complete native loading.
4410 */
4411 if (RT_SUCCESS(rc))
4412 {
4413 pImage->uState = SUP_IOCTL_LDR_LOAD;
4414 pImage->pfnModuleInit = pReq->u.In.pfnModuleInit;
4415 pImage->pfnModuleTerm = pReq->u.In.pfnModuleTerm;
4416
4417 if (pImage->fNative)
4418 rc = supdrvOSLdrLoad(pDevExt, pImage, pReq->u.In.abImage, pReq);
4419 else
4420 {
4421 memcpy(pImage->pvImage, &pReq->u.In.abImage[0], pImage->cbImageBits);
4422 Log(("vboxdrv: Loaded '%s' at %p\n", pImage->szName, pImage->pvImage));
4423 }
4424 }
4425
4426 /*
4427 * Update any entry points.
4428 */
4429 if (RT_SUCCESS(rc))
4430 {
4431 switch (pReq->u.In.eEPType)
4432 {
4433 default:
4434 case SUPLDRLOADEP_NOTHING:
4435 rc = VINF_SUCCESS;
4436 break;
4437 case SUPLDRLOADEP_VMMR0:
4438 rc = supdrvLdrSetVMMR0EPs(pDevExt, pReq->u.In.EP.VMMR0.pvVMMR0, pReq->u.In.EP.VMMR0.pvVMMR0EntryInt,
4439 pReq->u.In.EP.VMMR0.pvVMMR0EntryFast, pReq->u.In.EP.VMMR0.pvVMMR0EntryEx);
4440 break;
4441 case SUPLDRLOADEP_SERVICE:
4442 pImage->pfnServiceReqHandler = pReq->u.In.EP.Service.pfnServiceReq;
4443 rc = VINF_SUCCESS;
4444 break;
4445 }
4446 }
4447
4448 /*
4449 * On success call the module initialization.
4450 */
4451 LogFlow(("supdrvIOCtl_LdrLoad: pfnModuleInit=%p\n", pImage->pfnModuleInit));
4452 if (RT_SUCCESS(rc) && pImage->pfnModuleInit)
4453 {
4454 Log(("supdrvIOCtl_LdrLoad: calling pfnModuleInit=%p\n", pImage->pfnModuleInit));
4455 pDevExt->pLdrInitImage = pImage;
4456 pDevExt->hLdrInitThread = RTThreadNativeSelf();
4457 rc = pImage->pfnModuleInit(pImage);
4458 pDevExt->pLdrInitImage = NULL;
4459 pDevExt->hLdrInitThread = NIL_RTNATIVETHREAD;
4460 if (RT_FAILURE(rc) && pDevExt->pvVMMR0 == pImage->pvImage)
4461 supdrvLdrUnsetVMMR0EPs(pDevExt);
4462 }
4463 SUPR0Printf("vboxdrv: %p %s\n", pImage->pvImage, pImage->szName);
4464
4465 if (RT_FAILURE(rc))
4466 {
4467 /* Inform the tracing component in case ModuleInit registered TPs. */
4468 supdrvTracerModuleUnloading(pDevExt, pImage);
4469
4470 pImage->uState = SUP_IOCTL_LDR_OPEN;
4471 pImage->pfnModuleInit = NULL;
4472 pImage->pfnModuleTerm = NULL;
4473 pImage->pfnServiceReqHandler= NULL;
4474 pImage->cbStrTab = 0;
4475 RTMemFree(pImage->pachStrTab);
4476 pImage->pachStrTab = NULL;
4477 RTMemFree(pImage->paSymbols);
4478 pImage->paSymbols = NULL;
4479 pImage->cSymbols = 0;
4480 }
4481
4482 supdrvLdrUnlock(pDevExt);
4483 return rc;
4484}
4485
4486
4487/**
4488 * Frees a previously loaded (prep'ed) image.
4489 *
4490 * @returns IPRT status code.
4491 * @param pDevExt Device globals.
4492 * @param pSession Session data.
4493 * @param pReq The request.
4494 */
4495static int supdrvIOCtl_LdrFree(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRFREE pReq)
4496{
4497 int rc;
4498 PSUPDRVLDRUSAGE pUsagePrev;
4499 PSUPDRVLDRUSAGE pUsage;
4500 PSUPDRVLDRIMAGE pImage;
4501 LogFlow(("supdrvIOCtl_LdrFree: pvImageBase=%p\n", pReq->u.In.pvImageBase));
4502
4503 /*
4504 * Find the ldr image.
4505 */
4506 supdrvLdrLock(pDevExt);
4507 pUsagePrev = NULL;
4508 pUsage = pSession->pLdrUsage;
4509 while (pUsage && pUsage->pImage->pvImage != pReq->u.In.pvImageBase)
4510 {
4511 pUsagePrev = pUsage;
4512 pUsage = pUsage->pNext;
4513 }
4514 if (!pUsage)
4515 {
4516 supdrvLdrUnlock(pDevExt);
4517 Log(("SUP_IOCTL_LDR_FREE: couldn't find image!\n"));
4518 return VERR_INVALID_HANDLE;
4519 }
4520
4521 /*
4522 * Check if we can remove anything.
4523 */
4524 rc = VINF_SUCCESS;
4525 pImage = pUsage->pImage;
4526 if (pImage->cUsage <= 1 || pUsage->cUsage <= 1)
4527 {
4528 /*
4529 * Check if there are any objects with destructors in the image, if
4530 * so leave it for the session cleanup routine so we get a chance to
4531 * clean things up in the right order and not leave them all dangling.
4532 */
4533 RTSpinlockAcquire(pDevExt->Spinlock);
4534 if (pImage->cUsage <= 1)
4535 {
4536 PSUPDRVOBJ pObj;
4537 for (pObj = pDevExt->pObjs; pObj; pObj = pObj->pNext)
4538 if (RT_UNLIKELY((uintptr_t)pObj->pfnDestructor - (uintptr_t)pImage->pvImage < pImage->cbImageBits))
4539 {
4540 rc = VERR_DANGLING_OBJECTS;
4541 break;
4542 }
4543 }
4544 else
4545 {
4546 PSUPDRVUSAGE pGenUsage;
4547 for (pGenUsage = pSession->pUsage; pGenUsage; pGenUsage = pGenUsage->pNext)
4548 if (RT_UNLIKELY((uintptr_t)pGenUsage->pObj->pfnDestructor - (uintptr_t)pImage->pvImage < pImage->cbImageBits))
4549 {
4550 rc = VERR_DANGLING_OBJECTS;
4551 break;
4552 }
4553 }
4554 RTSpinlockRelease(pDevExt->Spinlock);
4555 if (rc == VINF_SUCCESS)
4556 {
4557 /* unlink it */
4558 if (pUsagePrev)
4559 pUsagePrev->pNext = pUsage->pNext;
4560 else
4561 pSession->pLdrUsage = pUsage->pNext;
4562
4563 /* free it */
4564 pUsage->pImage = NULL;
4565 pUsage->pNext = NULL;
4566 RTMemFree(pUsage);
4567
4568 /*
4569 * Dereference the image.
4570 */
4571 if (pImage->cUsage <= 1)
4572 supdrvLdrFree(pDevExt, pImage);
4573 else
4574 pImage->cUsage--;
4575 }
4576 else
4577 {
4578 Log(("supdrvIOCtl_LdrFree: Dangling objects in %p/%s!\n", pImage->pvImage, pImage->szName));
4579 rc = VINF_SUCCESS; /** @todo BRANCH-2.1: remove this after branching. */
4580 }
4581 }
4582 else
4583 {
4584 /*
4585 * Dereference both image and usage.
4586 */
4587 pImage->cUsage--;
4588 pUsage->cUsage--;
4589 }
4590
4591 supdrvLdrUnlock(pDevExt);
4592 return rc;
4593}
4594
4595
4596/**
4597 * Gets the address of a symbol in an open image.
4598 *
4599 * @returns IPRT status code.
4600 * @param pDevExt Device globals.
4601 * @param pSession Session data.
4602 * @param pReq The request buffer.
4603 */
4604static int supdrvIOCtl_LdrGetSymbol(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLDRGETSYMBOL pReq)
4605{
4606 PSUPDRVLDRIMAGE pImage;
4607 PSUPDRVLDRUSAGE pUsage;
4608 uint32_t i;
4609 PSUPLDRSYM paSyms;
4610 const char *pchStrings;
4611 const size_t cbSymbol = strlen(pReq->u.In.szSymbol) + 1;
4612 void *pvSymbol = NULL;
4613 int rc = VERR_GENERAL_FAILURE;
4614 Log3(("supdrvIOCtl_LdrGetSymbol: pvImageBase=%p szSymbol=\"%s\"\n", pReq->u.In.pvImageBase, pReq->u.In.szSymbol));
4615
4616 /*
4617 * Find the ldr image.
4618 */
4619 supdrvLdrLock(pDevExt);
4620 pUsage = pSession->pLdrUsage;
4621 while (pUsage && pUsage->pImage->pvImage != pReq->u.In.pvImageBase)
4622 pUsage = pUsage->pNext;
4623 if (!pUsage)
4624 {
4625 supdrvLdrUnlock(pDevExt);
4626 Log(("SUP_IOCTL_LDR_GET_SYMBOL: couldn't find image!\n"));
4627 return VERR_INVALID_HANDLE;
4628 }
4629 pImage = pUsage->pImage;
4630 if (pImage->uState != SUP_IOCTL_LDR_LOAD)
4631 {
4632 unsigned uState = pImage->uState;
4633 supdrvLdrUnlock(pDevExt);
4634 Log(("SUP_IOCTL_LDR_GET_SYMBOL: invalid image state %d (%#x)!\n", uState, uState)); NOREF(uState);
4635 return VERR_ALREADY_LOADED;
4636 }
4637
4638 /*
4639 * Search the symbol strings.
4640 *
4641 * Note! The int32_t is for native loading on solaris where the data
4642 * and text segments are in very different places.
4643 */
4644 pchStrings = pImage->pachStrTab;
4645 paSyms = pImage->paSymbols;
4646 for (i = 0; i < pImage->cSymbols; i++)
4647 {
4648 if ( paSyms[i].offName + cbSymbol <= pImage->cbStrTab
4649 && !memcmp(pchStrings + paSyms[i].offName, pReq->u.In.szSymbol, cbSymbol))
4650 {
4651 pvSymbol = (uint8_t *)pImage->pvImage + (int32_t)paSyms[i].offSymbol;
4652 rc = VINF_SUCCESS;
4653 break;
4654 }
4655 }
4656 supdrvLdrUnlock(pDevExt);
4657 pReq->u.Out.pvSymbol = pvSymbol;
4658 return rc;
4659}
4660
4661
4662/**
4663 * Gets the address of a symbol in an open image or the support driver.
4664 *
4665 * @returns VINF_SUCCESS on success.
4666 * @returns
4667 * @param pDevExt Device globals.
4668 * @param pSession Session data.
4669 * @param pReq The request buffer.
4670 */
4671static int supdrvIDC_LdrGetSymbol(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPDRVIDCREQGETSYM pReq)
4672{
4673 int rc = VINF_SUCCESS;
4674 const char *pszSymbol = pReq->u.In.pszSymbol;
4675 const char *pszModule = pReq->u.In.pszModule;
4676 size_t cbSymbol;
4677 char const *pszEnd;
4678 uint32_t i;
4679
4680 /*
4681 * Input validation.
4682 */
4683 AssertPtrReturn(pszSymbol, VERR_INVALID_POINTER);
4684 pszEnd = RTStrEnd(pszSymbol, 512);
4685 AssertReturn(pszEnd, VERR_INVALID_PARAMETER);
4686 cbSymbol = pszEnd - pszSymbol + 1;
4687
4688 if (pszModule)
4689 {
4690 AssertPtrReturn(pszModule, VERR_INVALID_POINTER);
4691 pszEnd = RTStrEnd(pszModule, 64);
4692 AssertReturn(pszEnd, VERR_INVALID_PARAMETER);
4693 }
4694 Log3(("supdrvIDC_LdrGetSymbol: pszModule=%p:{%s} pszSymbol=%p:{%s}\n", pszModule, pszModule, pszSymbol, pszSymbol));
4695
4696
4697 if ( !pszModule
4698 || !strcmp(pszModule, "SupDrv"))
4699 {
4700 /*
4701 * Search the support driver export table.
4702 */
4703 for (i = 0; i < RT_ELEMENTS(g_aFunctions); i++)
4704 if (!strcmp(g_aFunctions[i].szName, pszSymbol))
4705 {
4706 pReq->u.Out.pfnSymbol = g_aFunctions[i].pfn;
4707 break;
4708 }
4709 }
4710 else
4711 {
4712 /*
4713 * Find the loader image.
4714 */
4715 PSUPDRVLDRIMAGE pImage;
4716
4717 supdrvLdrLock(pDevExt);
4718
4719 for (pImage = pDevExt->pLdrImages; pImage; pImage = pImage->pNext)
4720 if (!strcmp(pImage->szName, pszModule))
4721 break;
4722 if (pImage && pImage->uState == SUP_IOCTL_LDR_LOAD)
4723 {
4724 /*
4725 * Search the symbol strings.
4726 */
4727 const char *pchStrings = pImage->pachStrTab;
4728 PCSUPLDRSYM paSyms = pImage->paSymbols;
4729 for (i = 0; i < pImage->cSymbols; i++)
4730 {
4731 if ( paSyms[i].offName + cbSymbol <= pImage->cbStrTab
4732 && !memcmp(pchStrings + paSyms[i].offName, pszSymbol, cbSymbol))
4733 {
4734 /*
4735 * Found it! Calc the symbol address and add a reference to the module.
4736 */
4737 pReq->u.Out.pfnSymbol = (PFNRT)((uint8_t *)pImage->pvImage + (int32_t)paSyms[i].offSymbol);
4738 rc = supdrvLdrAddUsage(pSession, pImage);
4739 break;
4740 }
4741 }
4742 }
4743 else
4744 rc = pImage ? VERR_WRONG_ORDER : VERR_MODULE_NOT_FOUND;
4745
4746 supdrvLdrUnlock(pDevExt);
4747 }
4748 return rc;
4749}
4750
4751
4752/**
4753 * Updates the VMMR0 entry point pointers.
4754 *
4755 * @returns IPRT status code.
4756 * @param pDevExt Device globals.
4757 * @param pSession Session data.
4758 * @param pVMMR0 VMMR0 image handle.
4759 * @param pvVMMR0EntryInt VMMR0EntryInt address.
4760 * @param pvVMMR0EntryFast VMMR0EntryFast address.
4761 * @param pvVMMR0EntryEx VMMR0EntryEx address.
4762 * @remark Caller must own the loader mutex.
4763 */
4764static int supdrvLdrSetVMMR0EPs(PSUPDRVDEVEXT pDevExt, void *pvVMMR0, void *pvVMMR0EntryInt, void *pvVMMR0EntryFast, void *pvVMMR0EntryEx)
4765{
4766 int rc = VINF_SUCCESS;
4767 LogFlow(("supdrvLdrSetR0EP pvVMMR0=%p pvVMMR0EntryInt=%p\n", pvVMMR0, pvVMMR0EntryInt));
4768
4769
4770 /*
4771 * Check if not yet set.
4772 */
4773 if (!pDevExt->pvVMMR0)
4774 {
4775 pDevExt->pvVMMR0 = pvVMMR0;
4776 pDevExt->pfnVMMR0EntryInt = pvVMMR0EntryInt;
4777 pDevExt->pfnVMMR0EntryFast = pvVMMR0EntryFast;
4778 pDevExt->pfnVMMR0EntryEx = pvVMMR0EntryEx;
4779 }
4780 else
4781 {
4782 /*
4783 * Return failure or success depending on whether the values match or not.
4784 */
4785 if ( pDevExt->pvVMMR0 != pvVMMR0
4786 || (void *)pDevExt->pfnVMMR0EntryInt != pvVMMR0EntryInt
4787 || (void *)pDevExt->pfnVMMR0EntryFast != pvVMMR0EntryFast
4788 || (void *)pDevExt->pfnVMMR0EntryEx != pvVMMR0EntryEx)
4789 {
4790 AssertMsgFailed(("SUP_IOCTL_LDR_SETR0EP: Already set pointing to a different module!\n"));
4791 rc = VERR_INVALID_PARAMETER;
4792 }
4793 }
4794 return rc;
4795}
4796
4797
4798/**
4799 * Unsets the VMMR0 entry point installed by supdrvLdrSetR0EP.
4800 *
4801 * @param pDevExt Device globals.
4802 */
4803static void supdrvLdrUnsetVMMR0EPs(PSUPDRVDEVEXT pDevExt)
4804{
4805 pDevExt->pvVMMR0 = NULL;
4806 pDevExt->pfnVMMR0EntryInt = NULL;
4807 pDevExt->pfnVMMR0EntryFast = NULL;
4808 pDevExt->pfnVMMR0EntryEx = NULL;
4809}
4810
4811
4812/**
4813 * Adds a usage reference in the specified session of an image.
4814 *
4815 * Called while owning the loader semaphore.
4816 *
4817 * @returns VINF_SUCCESS on success and VERR_NO_MEMORY on failure.
4818 * @param pSession Session in question.
4819 * @param pImage Image which the session is using.
4820 */
4821static int supdrvLdrAddUsage(PSUPDRVSESSION pSession, PSUPDRVLDRIMAGE pImage)
4822{
4823 PSUPDRVLDRUSAGE pUsage;
4824 LogFlow(("supdrvLdrAddUsage: pImage=%p\n", pImage));
4825
4826 /*
4827 * Referenced it already?
4828 */
4829 pUsage = pSession->pLdrUsage;
4830 while (pUsage)
4831 {
4832 if (pUsage->pImage == pImage)
4833 {
4834 pUsage->cUsage++;
4835 return VINF_SUCCESS;
4836 }
4837 pUsage = pUsage->pNext;
4838 }
4839
4840 /*
4841 * Allocate new usage record.
4842 */
4843 pUsage = (PSUPDRVLDRUSAGE)RTMemAlloc(sizeof(*pUsage));
4844 AssertReturn(pUsage, /*VERR_NO_MEMORY*/ VERR_INTERNAL_ERROR_5);
4845 pUsage->cUsage = 1;
4846 pUsage->pImage = pImage;
4847 pUsage->pNext = pSession->pLdrUsage;
4848 pSession->pLdrUsage = pUsage;
4849 return VINF_SUCCESS;
4850}
4851
4852
4853/**
4854 * Frees a load image.
4855 *
4856 * @param pDevExt Pointer to device extension.
4857 * @param pImage Pointer to the image we're gonna free.
4858 * This image must exit!
4859 * @remark The caller MUST own SUPDRVDEVEXT::mtxLdr!
4860 */
4861static void supdrvLdrFree(PSUPDRVDEVEXT pDevExt, PSUPDRVLDRIMAGE pImage)
4862{
4863 PSUPDRVLDRIMAGE pImagePrev;
4864 LogFlow(("supdrvLdrFree: pImage=%p\n", pImage));
4865
4866 /* find it - arg. should've used doubly linked list. */
4867 Assert(pDevExt->pLdrImages);
4868 pImagePrev = NULL;
4869 if (pDevExt->pLdrImages != pImage)
4870 {
4871 pImagePrev = pDevExt->pLdrImages;
4872 while (pImagePrev->pNext != pImage)
4873 pImagePrev = pImagePrev->pNext;
4874 Assert(pImagePrev->pNext == pImage);
4875 }
4876
4877 /* unlink */
4878 if (pImagePrev)
4879 pImagePrev->pNext = pImage->pNext;
4880 else
4881 pDevExt->pLdrImages = pImage->pNext;
4882
4883 /* check if this is VMMR0.r0 unset its entry point pointers. */
4884 if (pDevExt->pvVMMR0 == pImage->pvImage)
4885 supdrvLdrUnsetVMMR0EPs(pDevExt);
4886
4887 /* check for objects with destructors in this image. (Shouldn't happen.) */
4888 if (pDevExt->pObjs)
4889 {
4890 unsigned cObjs = 0;
4891 PSUPDRVOBJ pObj;
4892 RTSpinlockAcquire(pDevExt->Spinlock);
4893 for (pObj = pDevExt->pObjs; pObj; pObj = pObj->pNext)
4894 if (RT_UNLIKELY((uintptr_t)pObj->pfnDestructor - (uintptr_t)pImage->pvImage < pImage->cbImageBits))
4895 {
4896 pObj->pfnDestructor = NULL;
4897 cObjs++;
4898 }
4899 RTSpinlockRelease(pDevExt->Spinlock);
4900 if (cObjs)
4901 OSDBGPRINT(("supdrvLdrFree: Image '%s' has %d dangling objects!\n", pImage->szName, cObjs));
4902 }
4903
4904 /* call termination function if fully loaded. */
4905 if ( pImage->pfnModuleTerm
4906 && pImage->uState == SUP_IOCTL_LDR_LOAD)
4907 {
4908 LogFlow(("supdrvIOCtl_LdrLoad: calling pfnModuleTerm=%p\n", pImage->pfnModuleTerm));
4909 pImage->pfnModuleTerm(pImage);
4910 }
4911
4912 /* Inform the tracing component. */
4913 supdrvTracerModuleUnloading(pDevExt, pImage);
4914
4915 /* do native unload if appropriate. */
4916 if (pImage->fNative)
4917 supdrvOSLdrUnload(pDevExt, pImage);
4918
4919 /* free the image */
4920 pImage->cUsage = 0;
4921 pImage->pDevExt = NULL;
4922 pImage->pNext = NULL;
4923 pImage->uState = SUP_IOCTL_LDR_FREE;
4924 RTMemExecFree(pImage->pvImageAlloc, pImage->cbImageBits + 31);
4925 pImage->pvImageAlloc = NULL;
4926 RTMemFree(pImage->pachStrTab);
4927 pImage->pachStrTab = NULL;
4928 RTMemFree(pImage->paSymbols);
4929 pImage->paSymbols = NULL;
4930 RTMemFree(pImage);
4931}
4932
4933
4934/**
4935 * Acquires the loader lock.
4936 *
4937 * @returns IPRT status code.
4938 * @param pDevExt The device extension.
4939 */
4940DECLINLINE(int) supdrvLdrLock(PSUPDRVDEVEXT pDevExt)
4941{
4942#ifdef SUPDRV_USE_MUTEX_FOR_LDR
4943 int rc = RTSemMutexRequest(pDevExt->mtxLdr, RT_INDEFINITE_WAIT);
4944#else
4945 int rc = RTSemFastMutexRequest(pDevExt->mtxLdr);
4946#endif
4947 AssertRC(rc);
4948 return rc;
4949}
4950
4951
4952/**
4953 * Releases the loader lock.
4954 *
4955 * @returns IPRT status code.
4956 * @param pDevExt The device extension.
4957 */
4958DECLINLINE(int) supdrvLdrUnlock(PSUPDRVDEVEXT pDevExt)
4959{
4960#ifdef SUPDRV_USE_MUTEX_FOR_LDR
4961 return RTSemMutexRelease(pDevExt->mtxLdr);
4962#else
4963 return RTSemFastMutexRelease(pDevExt->mtxLdr);
4964#endif
4965}
4966
4967
4968/**
4969 * Implements the service call request.
4970 *
4971 * @returns VBox status code.
4972 * @param pDevExt The device extension.
4973 * @param pSession The calling session.
4974 * @param pReq The request packet, valid.
4975 */
4976static int supdrvIOCtl_CallServiceModule(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPCALLSERVICE pReq)
4977{
4978#if !defined(RT_OS_WINDOWS) || defined(RT_ARCH_AMD64) || defined(DEBUG)
4979 int rc;
4980
4981 /*
4982 * Find the module first in the module referenced by the calling session.
4983 */
4984 rc = supdrvLdrLock(pDevExt);
4985 if (RT_SUCCESS(rc))
4986 {
4987 PFNSUPR0SERVICEREQHANDLER pfnServiceReqHandler = NULL;
4988 PSUPDRVLDRUSAGE pUsage;
4989
4990 for (pUsage = pSession->pLdrUsage; pUsage; pUsage = pUsage->pNext)
4991 if ( pUsage->pImage->pfnServiceReqHandler
4992 && !strcmp(pUsage->pImage->szName, pReq->u.In.szName))
4993 {
4994 pfnServiceReqHandler = pUsage->pImage->pfnServiceReqHandler;
4995 break;
4996 }
4997 supdrvLdrUnlock(pDevExt);
4998
4999 if (pfnServiceReqHandler)
5000 {
5001 /*
5002 * Call it.
5003 */
5004 if (pReq->Hdr.cbIn == SUP_IOCTL_CALL_SERVICE_SIZE(0))
5005 rc = pfnServiceReqHandler(pSession, pReq->u.In.uOperation, pReq->u.In.u64Arg, NULL);
5006 else
5007 rc = pfnServiceReqHandler(pSession, pReq->u.In.uOperation, pReq->u.In.u64Arg, (PSUPR0SERVICEREQHDR)&pReq->abReqPkt[0]);
5008 }
5009 else
5010 rc = VERR_SUPDRV_SERVICE_NOT_FOUND;
5011 }
5012
5013 /* log it */
5014 if ( RT_FAILURE(rc)
5015 && rc != VERR_INTERRUPTED
5016 && rc != VERR_TIMEOUT)
5017 Log(("SUP_IOCTL_CALL_SERVICE: rc=%Rrc op=%u out=%u arg=%RX64 p/t=%RTproc/%RTthrd\n",
5018 rc, pReq->u.In.uOperation, pReq->Hdr.cbOut, pReq->u.In.u64Arg, RTProcSelf(), RTThreadNativeSelf()));
5019 else
5020 Log4(("SUP_IOCTL_CALL_SERVICE: rc=%Rrc op=%u out=%u arg=%RX64 p/t=%RTproc/%RTthrd\n",
5021 rc, pReq->u.In.uOperation, pReq->Hdr.cbOut, pReq->u.In.u64Arg, RTProcSelf(), RTThreadNativeSelf()));
5022 return rc;
5023#else /* RT_OS_WINDOWS && !RT_ARCH_AMD64 && !DEBUG */
5024 return VERR_NOT_IMPLEMENTED;
5025#endif /* RT_OS_WINDOWS && !RT_ARCH_AMD64 && !DEBUG */
5026}
5027
5028
5029/**
5030 * Implements the logger settings request.
5031 *
5032 * @returns VBox status code.
5033 * @param pDevExt The device extension.
5034 * @param pSession The caller's session.
5035 * @param pReq The request.
5036 */
5037static int supdrvIOCtl_LoggerSettings(PSUPDRVDEVEXT pDevExt, PSUPDRVSESSION pSession, PSUPLOGGERSETTINGS pReq)
5038{
5039 const char *pszGroup = &pReq->u.In.szStrings[pReq->u.In.offGroups];
5040 const char *pszFlags = &pReq->u.In.szStrings[pReq->u.In.offFlags];
5041 const char *pszDest = &pReq->u.In.szStrings[pReq->u.In.offDestination];
5042 PRTLOGGER pLogger = NULL;
5043 int rc;
5044
5045 /*
5046 * Some further validation.
5047 */
5048 switch (pReq->u.In.fWhat)
5049 {
5050 case SUPLOGGERSETTINGS_WHAT_SETTINGS:
5051 case SUPLOGGERSETTINGS_WHAT_CREATE:
5052 break;
5053
5054 case SUPLOGGERSETTINGS_WHAT_DESTROY:
5055 if (*pszGroup || *pszFlags || *pszDest)
5056 return VERR_INVALID_PARAMETER;
5057 if (pReq->u.In.fWhich == SUPLOGGERSETTINGS_WHICH_RELEASE)
5058 return VERR_ACCESS_DENIED;
5059 break;
5060
5061 default:
5062 return VERR_INTERNAL_ERROR;
5063 }
5064
5065 /*
5066 * Get the logger.
5067 */
5068 switch (pReq->u.In.fWhich)
5069 {
5070 case SUPLOGGERSETTINGS_WHICH_DEBUG:
5071 pLogger = RTLogGetDefaultInstance();
5072 break;
5073
5074 case SUPLOGGERSETTINGS_WHICH_RELEASE:
5075 pLogger = RTLogRelDefaultInstance();
5076 break;
5077
5078 default:
5079 return VERR_INTERNAL_ERROR;
5080 }
5081
5082 /*
5083 * Do the job.
5084 */
5085 switch (pReq->u.In.fWhat)
5086 {
5087 case SUPLOGGERSETTINGS_WHAT_SETTINGS:
5088 if (pLogger)
5089 {
5090 rc = RTLogFlags(pLogger, pszFlags);
5091 if (RT_SUCCESS(rc))
5092 rc = RTLogGroupSettings(pLogger, pszGroup);
5093 NOREF(pszDest);
5094 }
5095 else
5096 rc = VERR_NOT_FOUND;
5097 break;
5098
5099 case SUPLOGGERSETTINGS_WHAT_CREATE:
5100 {
5101 if (pLogger)
5102 rc = VERR_ALREADY_EXISTS;
5103 else
5104 {
5105 static const char * const s_apszGroups[] = VBOX_LOGGROUP_NAMES;
5106
5107 rc = RTLogCreate(&pLogger,
5108 0 /* fFlags */,
5109 pszGroup,
5110 pReq->u.In.fWhich == SUPLOGGERSETTINGS_WHICH_DEBUG
5111 ? "VBOX_LOG"
5112 : "VBOX_RELEASE_LOG",
5113 RT_ELEMENTS(s_apszGroups),
5114 s_apszGroups,
5115 RTLOGDEST_STDOUT | RTLOGDEST_DEBUGGER,
5116 NULL);
5117 if (RT_SUCCESS(rc))
5118 {
5119 rc = RTLogFlags(pLogger, pszFlags);
5120 NOREF(pszDest);
5121 if (RT_SUCCESS(rc))
5122 {
5123 switch (pReq->u.In.fWhich)
5124 {
5125 case SUPLOGGERSETTINGS_WHICH_DEBUG:
5126 pLogger = RTLogSetDefaultInstance(pLogger);
5127 break;
5128 case SUPLOGGERSETTINGS_WHICH_RELEASE:
5129 pLogger = RTLogRelSetDefaultInstance(pLogger);
5130 break;
5131 }
5132 }
5133 RTLogDestroy(pLogger);
5134 }
5135 }
5136 break;
5137 }
5138
5139 case SUPLOGGERSETTINGS_WHAT_DESTROY:
5140 switch (pReq->u.In.fWhich)
5141 {
5142 case SUPLOGGERSETTINGS_WHICH_DEBUG:
5143 pLogger = RTLogSetDefaultInstance(NULL);
5144 break;
5145 case SUPLOGGERSETTINGS_WHICH_RELEASE:
5146 pLogger = RTLogRelSetDefaultInstance(NULL);
5147 break;
5148 }
5149 rc = RTLogDestroy(pLogger);
5150 break;
5151
5152 default:
5153 {
5154 rc = VERR_INTERNAL_ERROR;
5155 break;
5156 }
5157 }
5158
5159 return rc;
5160}
5161
5162
5163/**
5164 * Implements the MSR prober operations.
5165 *
5166 * @returns VBox status code.
5167 * @param pDevExt The device extension.
5168 * @param pReq The request.
5169 */
5170static int supdrvIOCtl_MsrProber(PSUPDRVDEVEXT pDevExt, PSUPMSRPROBER pReq)
5171{
5172#ifdef SUPDRV_WITH_MSR_PROBER
5173 RTCPUID const idCpu = pReq->u.In.idCpu == UINT32_MAX ? NIL_RTCPUID : pReq->u.In.idCpu;
5174 int rc;
5175
5176 switch (pReq->u.In.enmOp)
5177 {
5178 case SUPMSRPROBEROP_READ:
5179 {
5180 uint64_t uValue;
5181 rc = supdrvOSMsrProberRead(pReq->u.In.uMsr, idCpu, &uValue);
5182 if (RT_SUCCESS(rc))
5183 {
5184 pReq->u.Out.uResults.Read.uValue = uValue;
5185 pReq->u.Out.uResults.Read.fGp = false;
5186 }
5187 else if (rc == VERR_ACCESS_DENIED)
5188 {
5189 pReq->u.Out.uResults.Read.uValue = 0;
5190 pReq->u.Out.uResults.Read.fGp = true;
5191 rc = VINF_SUCCESS;
5192 }
5193 break;
5194 }
5195
5196 case SUPMSRPROBEROP_WRITE:
5197 rc = supdrvOSMsrProberWrite(pReq->u.In.uMsr, idCpu, pReq->u.In.uArgs.Write.uToWrite);
5198 if (RT_SUCCESS(rc))
5199 pReq->u.Out.uResults.Write.fGp = false;
5200 else if (rc == VERR_ACCESS_DENIED)
5201 {
5202 pReq->u.Out.uResults.Write.fGp = true;
5203 rc = VINF_SUCCESS;
5204 }
5205 break;
5206
5207 case SUPMSRPROBEROP_MODIFY:
5208 case SUPMSRPROBEROP_MODIFY_FASTER:
5209 rc = supdrvOSMsrProberModify(idCpu, pReq);
5210 break;
5211
5212 default:
5213 return VERR_INVALID_FUNCTION;
5214 }
5215 return rc;
5216#else
5217 return VERR_NOT_IMPLEMENTED;
5218#endif
5219}
5220
5221
5222
5223/**
5224 * Creates the GIP.
5225 *
5226 * @returns VBox status code.
5227 * @param pDevExt Instance data. GIP stuff may be updated.
5228 */
5229static int supdrvGipCreate(PSUPDRVDEVEXT pDevExt)
5230{
5231 PSUPGLOBALINFOPAGE pGip;
5232 RTHCPHYS HCPhysGip;
5233 uint32_t u32SystemResolution;
5234 uint32_t u32Interval;
5235 unsigned cCpus;
5236 int rc;
5237
5238
5239 LogFlow(("supdrvGipCreate:\n"));
5240
5241 /* assert order */
5242 Assert(pDevExt->u32SystemTimerGranularityGrant == 0);
5243 Assert(pDevExt->GipMemObj == NIL_RTR0MEMOBJ);
5244 Assert(!pDevExt->pGipTimer);
5245
5246 /*
5247 * Check the CPU count.
5248 */
5249 cCpus = RTMpGetArraySize();
5250 if ( cCpus > RTCPUSET_MAX_CPUS
5251 || cCpus > 256 /*ApicId is used for the mappings*/)
5252 {
5253 SUPR0Printf("VBoxDrv: Too many CPUs (%u) for the GIP (max %u)\n", cCpus, RT_MIN(RTCPUSET_MAX_CPUS, 256));
5254 return VERR_TOO_MANY_CPUS;
5255 }
5256
5257 /*
5258 * Allocate a contiguous set of pages with a default kernel mapping.
5259 */
5260 rc = RTR0MemObjAllocCont(&pDevExt->GipMemObj, RT_UOFFSETOF(SUPGLOBALINFOPAGE, aCPUs[cCpus]), false /*fExecutable*/);
5261 if (RT_FAILURE(rc))
5262 {
5263 OSDBGPRINT(("supdrvGipCreate: failed to allocate the GIP page. rc=%d\n", rc));
5264 return rc;
5265 }
5266 pGip = (PSUPGLOBALINFOPAGE)RTR0MemObjAddress(pDevExt->GipMemObj); AssertPtr(pGip);
5267 HCPhysGip = RTR0MemObjGetPagePhysAddr(pDevExt->GipMemObj, 0); Assert(HCPhysGip != NIL_RTHCPHYS);
5268
5269 /*
5270 * Find a reasonable update interval and initialize the structure.
5271 */
5272 u32Interval = u32SystemResolution = RTTimerGetSystemGranularity();
5273 while (u32Interval < 10000000 /* 10 ms */)
5274 u32Interval += u32SystemResolution;
5275
5276 supdrvGipInit(pDevExt, pGip, HCPhysGip, RTTimeSystemNanoTS(), 1000000000 / u32Interval /*=Hz*/, cCpus);
5277
5278 /*
5279 * Create the timer.
5280 * If CPU_ALL isn't supported we'll have to fall back to synchronous mode.
5281 */
5282 if (pGip->u32Mode == SUPGIPMODE_ASYNC_TSC)
5283 {
5284 rc = RTTimerCreateEx(&pDevExt->pGipTimer, u32Interval, RTTIMER_FLAGS_CPU_ALL, supdrvGipAsyncTimer, pDevExt);
5285 if (rc == VERR_NOT_SUPPORTED)
5286 {
5287 OSDBGPRINT(("supdrvGipCreate: omni timer not supported, falling back to synchronous mode\n"));
5288 pGip->u32Mode = SUPGIPMODE_SYNC_TSC;
5289 }
5290 }
5291 if (pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)
5292 rc = RTTimerCreateEx(&pDevExt->pGipTimer, u32Interval, 0 /* fFlags */, supdrvGipSyncTimer, pDevExt);
5293 if (RT_SUCCESS(rc))
5294 {
5295 rc = RTMpNotificationRegister(supdrvGipMpEvent, pDevExt);
5296 if (RT_SUCCESS(rc))
5297 {
5298 rc = RTMpOnAll(supdrvGipInitOnCpu, pDevExt, pGip);
5299 if (RT_SUCCESS(rc))
5300 {
5301 /*
5302 * We're good.
5303 */
5304 Log(("supdrvGipCreate: %u ns interval.\n", u32Interval));
5305 g_pSUPGlobalInfoPage = pGip;
5306 return VINF_SUCCESS;
5307 }
5308
5309 OSDBGPRINT(("supdrvGipCreate: RTMpOnAll failed with rc=%Rrc\n", rc));
5310 RTMpNotificationDeregister(supdrvGipMpEvent, pDevExt);
5311
5312 }
5313 else
5314 OSDBGPRINT(("supdrvGipCreate: failed to register MP event notfication. rc=%Rrc\n", rc));
5315 }
5316 else
5317 {
5318 OSDBGPRINT(("supdrvGipCreate: failed create GIP timer at %u ns interval. rc=%Rrc\n", u32Interval, rc));
5319 Assert(!pDevExt->pGipTimer);
5320 }
5321 supdrvGipDestroy(pDevExt);
5322 return rc;
5323}
5324
5325
5326/**
5327 * Terminates the GIP.
5328 *
5329 * @param pDevExt Instance data. GIP stuff may be updated.
5330 */
5331static void supdrvGipDestroy(PSUPDRVDEVEXT pDevExt)
5332{
5333 int rc;
5334#ifdef DEBUG_DARWIN_GIP
5335 OSDBGPRINT(("supdrvGipDestroy: pDevExt=%p pGip=%p pGipTimer=%p GipMemObj=%p\n", pDevExt,
5336 pDevExt->GipMemObj != NIL_RTR0MEMOBJ ? RTR0MemObjAddress(pDevExt->GipMemObj) : NULL,
5337 pDevExt->pGipTimer, pDevExt->GipMemObj));
5338#endif
5339
5340 /*
5341 * Invalid the GIP data.
5342 */
5343 if (pDevExt->pGip)
5344 {
5345 supdrvGipTerm(pDevExt->pGip);
5346 pDevExt->pGip = NULL;
5347 }
5348 g_pSUPGlobalInfoPage = NULL;
5349
5350 /*
5351 * Destroy the timer and free the GIP memory object.
5352 */
5353 if (pDevExt->pGipTimer)
5354 {
5355 rc = RTTimerDestroy(pDevExt->pGipTimer); AssertRC(rc);
5356 pDevExt->pGipTimer = NULL;
5357 }
5358
5359 if (pDevExt->GipMemObj != NIL_RTR0MEMOBJ)
5360 {
5361 rc = RTR0MemObjFree(pDevExt->GipMemObj, true /* free mappings */); AssertRC(rc);
5362 pDevExt->GipMemObj = NIL_RTR0MEMOBJ;
5363 }
5364
5365 /*
5366 * Finally, make sure we've release the system timer resolution request
5367 * if one actually succeeded and is still pending.
5368 */
5369 if (pDevExt->u32SystemTimerGranularityGrant)
5370 {
5371 rc = RTTimerReleaseSystemGranularity(pDevExt->u32SystemTimerGranularityGrant); AssertRC(rc);
5372 pDevExt->u32SystemTimerGranularityGrant = 0;
5373 }
5374}
5375
5376
5377/**
5378 * Timer callback function sync GIP mode.
5379 * @param pTimer The timer.
5380 * @param pvUser The device extension.
5381 */
5382static DECLCALLBACK(void) supdrvGipSyncTimer(PRTTIMER pTimer, void *pvUser, uint64_t iTick)
5383{
5384 RTCCUINTREG fOldFlags = ASMIntDisableFlags(); /* No interruptions please (real problem on S10). */
5385 PSUPDRVDEVEXT pDevExt = (PSUPDRVDEVEXT)pvUser;
5386 uint64_t u64TSC = ASMReadTSC();
5387 uint64_t NanoTS = RTTimeSystemNanoTS();
5388
5389 supdrvGipUpdate(pDevExt, NanoTS, u64TSC, NIL_RTCPUID, iTick);
5390
5391 ASMSetFlags(fOldFlags);
5392}
5393
5394
5395/**
5396 * Timer callback function for async GIP mode.
5397 * @param pTimer The timer.
5398 * @param pvUser The device extension.
5399 */
5400static DECLCALLBACK(void) supdrvGipAsyncTimer(PRTTIMER pTimer, void *pvUser, uint64_t iTick)
5401{
5402 RTCCUINTREG fOldFlags = ASMIntDisableFlags(); /* No interruptions please (real problem on S10). */
5403 PSUPDRVDEVEXT pDevExt = (PSUPDRVDEVEXT)pvUser;
5404 RTCPUID idCpu = RTMpCpuId();
5405 uint64_t u64TSC = ASMReadTSC();
5406 uint64_t NanoTS = RTTimeSystemNanoTS();
5407
5408 /** @todo reset the transaction number and whatnot when iTick == 1. */
5409 if (pDevExt->idGipMaster == idCpu)
5410 supdrvGipUpdate(pDevExt, NanoTS, u64TSC, idCpu, iTick);
5411 else
5412 supdrvGipUpdatePerCpu(pDevExt, NanoTS, u64TSC, idCpu, ASMGetApicId(), iTick);
5413
5414 ASMSetFlags(fOldFlags);
5415}
5416
5417
5418/**
5419 * Finds our (@a idCpu) entry, or allocates a new one if not found.
5420 *
5421 * @returns Index of the CPU in the cache set.
5422 * @param pGip The GIP.
5423 * @param idCpu The CPU ID.
5424 */
5425static uint32_t supdrvGipCpuIndexFromCpuId(PSUPGLOBALINFOPAGE pGip, RTCPUID idCpu)
5426{
5427 uint32_t i, cTries;
5428
5429 /*
5430 * ASSUMES that CPU IDs are constant.
5431 */
5432 for (i = 0; i < pGip->cCpus; i++)
5433 if (pGip->aCPUs[i].idCpu == idCpu)
5434 return i;
5435
5436 cTries = 0;
5437 do
5438 {
5439 for (i = 0; i < pGip->cCpus; i++)
5440 {
5441 bool fRc;
5442 ASMAtomicCmpXchgSize(&pGip->aCPUs[i].idCpu, idCpu, NIL_RTCPUID, fRc);
5443 if (fRc)
5444 return i;
5445 }
5446 } while (cTries++ < 32);
5447 AssertReleaseFailed();
5448 return i - 1;
5449}
5450
5451
5452/**
5453 * The calling CPU should be accounted as online, update GIP accordingly.
5454 *
5455 * This is used by supdrvGipMpEvent as well as the supdrvGipCreate.
5456 *
5457 * @param pDevExt The device extension.
5458 * @param idCpu The CPU ID.
5459 */
5460static void supdrvGipMpEventOnline(PSUPDRVDEVEXT pDevExt, RTCPUID idCpu)
5461{
5462 int iCpuSet = 0;
5463 uint16_t idApic = UINT16_MAX;
5464 uint32_t i = 0;
5465 uint64_t u64NanoTS = 0;
5466 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
5467
5468 AssertPtrReturnVoid(pGip);
5469 AssertRelease(idCpu == RTMpCpuId());
5470 Assert(pGip->cPossibleCpus == RTMpGetCount());
5471
5472 /*
5473 * Do this behind a spinlock with interrupts disabled as this can fire
5474 * on all CPUs simultaneously, see @bugref{6110}.
5475 */
5476 RTSpinlockAcquire(pDevExt->hGipSpinlock);
5477
5478 /*
5479 * Update the globals.
5480 */
5481 ASMAtomicWriteU16(&pGip->cPresentCpus, RTMpGetPresentCount());
5482 ASMAtomicWriteU16(&pGip->cOnlineCpus, RTMpGetOnlineCount());
5483 iCpuSet = RTMpCpuIdToSetIndex(idCpu);
5484 if (iCpuSet >= 0)
5485 {
5486 Assert(RTCpuSetIsMemberByIndex(&pGip->PossibleCpuSet, iCpuSet));
5487 RTCpuSetAddByIndex(&pGip->OnlineCpuSet, iCpuSet);
5488 RTCpuSetAddByIndex(&pGip->PresentCpuSet, iCpuSet);
5489 }
5490
5491 /*
5492 * Update the entry.
5493 */
5494 u64NanoTS = RTTimeSystemNanoTS() - pGip->u32UpdateIntervalNS;
5495 i = supdrvGipCpuIndexFromCpuId(pGip, idCpu);
5496 supdrvGipInitCpu(pGip, &pGip->aCPUs[i], u64NanoTS);
5497 idApic = ASMGetApicId();
5498 ASMAtomicWriteU16(&pGip->aCPUs[i].idApic, idApic);
5499 ASMAtomicWriteS16(&pGip->aCPUs[i].iCpuSet, (int16_t)iCpuSet);
5500 ASMAtomicWriteSize(&pGip->aCPUs[i].idCpu, idCpu);
5501
5502 /*
5503 * Update the APIC ID and CPU set index mappings.
5504 */
5505 ASMAtomicWriteU16(&pGip->aiCpuFromApicId[idApic], i);
5506 ASMAtomicWriteU16(&pGip->aiCpuFromCpuSetIdx[iCpuSet], i);
5507
5508 /* commit it */
5509 ASMAtomicWriteSize(&pGip->aCPUs[i].enmState, SUPGIPCPUSTATE_ONLINE);
5510
5511 RTSpinlockReleaseNoInts(pDevExt->hGipSpinlock);
5512}
5513
5514
5515/**
5516 * The CPU should be accounted as offline, update the GIP accordingly.
5517 *
5518 * This is used by supdrvGipMpEvent.
5519 *
5520 * @param pDevExt The device extension.
5521 * @param idCpu The CPU ID.
5522 */
5523static void supdrvGipMpEventOffline(PSUPDRVDEVEXT pDevExt, RTCPUID idCpu)
5524{
5525 int iCpuSet;
5526 unsigned i;
5527
5528 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
5529
5530 AssertPtrReturnVoid(pGip);
5531 RTSpinlockAcquire(pDevExt->hGipSpinlock);
5532
5533 iCpuSet = RTMpCpuIdToSetIndex(idCpu);
5534 AssertReturnVoid(iCpuSet >= 0);
5535
5536 i = pGip->aiCpuFromCpuSetIdx[iCpuSet];
5537 AssertReturnVoid(i < pGip->cCpus);
5538 AssertReturnVoid(pGip->aCPUs[i].idCpu == idCpu);
5539
5540 Assert(RTCpuSetIsMemberByIndex(&pGip->PossibleCpuSet, iCpuSet));
5541 RTCpuSetDelByIndex(&pGip->OnlineCpuSet, iCpuSet);
5542
5543 /* commit it */
5544 ASMAtomicWriteSize(&pGip->aCPUs[i].enmState, SUPGIPCPUSTATE_OFFLINE);
5545
5546 RTSpinlockReleaseNoInts(pDevExt->hGipSpinlock);
5547}
5548
5549
5550/**
5551 * Multiprocessor event notification callback.
5552 *
5553 * This is used to make sure that the GIP master gets passed on to
5554 * another CPU. It also updates the associated CPU data.
5555 *
5556 * @param enmEvent The event.
5557 * @param idCpu The cpu it applies to.
5558 * @param pvUser Pointer to the device extension.
5559 *
5560 * @remarks This function -must- fire on the newly online'd CPU for the
5561 * RTMPEVENT_ONLINE case and can fire on any CPU for the
5562 * RTMPEVENT_OFFLINE case.
5563 */
5564static DECLCALLBACK(void) supdrvGipMpEvent(RTMPEVENT enmEvent, RTCPUID idCpu, void *pvUser)
5565{
5566 PSUPDRVDEVEXT pDevExt = (PSUPDRVDEVEXT)pvUser;
5567 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
5568
5569 AssertRelease(!RTThreadPreemptIsEnabled(NIL_RTTHREAD));
5570
5571 /*
5572 * Update the GIP CPU data.
5573 */
5574 if (pGip)
5575 {
5576 switch (enmEvent)
5577 {
5578 case RTMPEVENT_ONLINE:
5579 AssertRelease(idCpu == RTMpCpuId());
5580 supdrvGipMpEventOnline(pDevExt, idCpu);
5581 break;
5582 case RTMPEVENT_OFFLINE:
5583 supdrvGipMpEventOffline(pDevExt, idCpu);
5584 break;
5585
5586 }
5587 }
5588
5589 /*
5590 * Make sure there is a master GIP.
5591 */
5592 if (enmEvent == RTMPEVENT_OFFLINE)
5593 {
5594 RTCPUID idGipMaster = ASMAtomicReadU32(&pDevExt->idGipMaster);
5595 if (idGipMaster == idCpu)
5596 {
5597 /*
5598 * Find a new GIP master.
5599 */
5600 bool fIgnored;
5601 unsigned i;
5602 RTCPUID idNewGipMaster = NIL_RTCPUID;
5603 RTCPUSET OnlineCpus;
5604 RTMpGetOnlineSet(&OnlineCpus);
5605
5606 for (i = 0; i < RTCPUSET_MAX_CPUS; i++)
5607 {
5608 RTCPUID idCurCpu = RTMpCpuIdFromSetIndex(i);
5609 if ( RTCpuSetIsMember(&OnlineCpus, idCurCpu)
5610 && idCurCpu != idGipMaster)
5611 {
5612 idNewGipMaster = idCurCpu;
5613 break;
5614 }
5615 }
5616
5617 Log(("supdrvGipMpEvent: Gip master %#lx -> %#lx\n", (long)idGipMaster, (long)idNewGipMaster));
5618 ASMAtomicCmpXchgSize(&pDevExt->idGipMaster, idNewGipMaster, idGipMaster, fIgnored);
5619 NOREF(fIgnored);
5620 }
5621 }
5622}
5623
5624
5625/**
5626 * Callback used by supdrvDetermineAsyncTSC to read the TSC on a CPU.
5627 *
5628 * @param idCpu Ignored.
5629 * @param pvUser1 Where to put the TSC.
5630 * @param pvUser2 Ignored.
5631 */
5632static DECLCALLBACK(void) supdrvDetermineAsyncTscWorker(RTCPUID idCpu, void *pvUser1, void *pvUser2)
5633{
5634#if 1
5635 ASMAtomicWriteU64((uint64_t volatile *)pvUser1, ASMReadTSC());
5636#else
5637 *(uint64_t *)pvUser1 = ASMReadTSC();
5638#endif
5639}
5640
5641
5642/**
5643 * Determine if Async GIP mode is required because of TSC drift.
5644 *
5645 * When using the default/normal timer code it is essential that the time stamp counter
5646 * (TSC) runs never backwards, that is, a read operation to the counter should return
5647 * a bigger value than any previous read operation. This is guaranteed by the latest
5648 * AMD CPUs and by newer Intel CPUs which never enter the C2 state (P4). In any other
5649 * case we have to choose the asynchronous timer mode.
5650 *
5651 * @param poffMin Pointer to the determined difference between different cores.
5652 * @return false if the time stamp counters appear to be synchronized, true otherwise.
5653 */
5654static bool supdrvDetermineAsyncTsc(uint64_t *poffMin)
5655{
5656 /*
5657 * Just iterate all the cpus 8 times and make sure that the TSC is
5658 * ever increasing. We don't bother taking TSC rollover into account.
5659 */
5660 int iEndCpu = RTMpGetArraySize();
5661 int iCpu;
5662 int cLoops = 8;
5663 bool fAsync = false;
5664 int rc = VINF_SUCCESS;
5665 uint64_t offMax = 0;
5666 uint64_t offMin = ~(uint64_t)0;
5667 uint64_t PrevTsc = ASMReadTSC();
5668
5669 while (cLoops-- > 0)
5670 {
5671 for (iCpu = 0; iCpu < iEndCpu; iCpu++)
5672 {
5673 uint64_t CurTsc;
5674 rc = RTMpOnSpecific(RTMpCpuIdFromSetIndex(iCpu), supdrvDetermineAsyncTscWorker, &CurTsc, NULL);
5675 if (RT_SUCCESS(rc))
5676 {
5677 if (CurTsc <= PrevTsc)
5678 {
5679 fAsync = true;
5680 offMin = offMax = PrevTsc - CurTsc;
5681 Log(("supdrvDetermineAsyncTsc: iCpu=%d cLoops=%d CurTsc=%llx PrevTsc=%llx\n",
5682 iCpu, cLoops, CurTsc, PrevTsc));
5683 break;
5684 }
5685
5686 /* Gather statistics (except the first time). */
5687 if (iCpu != 0 || cLoops != 7)
5688 {
5689 uint64_t off = CurTsc - PrevTsc;
5690 if (off < offMin)
5691 offMin = off;
5692 if (off > offMax)
5693 offMax = off;
5694 Log2(("%d/%d: off=%llx\n", cLoops, iCpu, off));
5695 }
5696
5697 /* Next */
5698 PrevTsc = CurTsc;
5699 }
5700 else if (rc == VERR_NOT_SUPPORTED)
5701 break;
5702 else
5703 AssertMsg(rc == VERR_CPU_NOT_FOUND || rc == VERR_CPU_OFFLINE, ("%d\n", rc));
5704 }
5705
5706 /* broke out of the loop. */
5707 if (iCpu < iEndCpu)
5708 break;
5709 }
5710
5711 *poffMin = offMin; /* Almost RTMpOnSpecific profiling. */
5712 Log(("supdrvDetermineAsyncTsc: returns %d; iEndCpu=%d rc=%d offMin=%llx offMax=%llx\n",
5713 fAsync, iEndCpu, rc, offMin, offMax));
5714#if !defined(RT_OS_SOLARIS) && !defined(RT_OS_OS2) && !defined(RT_OS_WINDOWS)
5715 OSDBGPRINT(("vboxdrv: fAsync=%d offMin=%#lx offMax=%#lx\n", fAsync, (long)offMin, (long)offMax));
5716#endif
5717 return fAsync;
5718}
5719
5720
5721/**
5722 * Determine the GIP TSC mode.
5723 *
5724 * @returns The most suitable TSC mode.
5725 * @param pDevExt Pointer to the device instance data.
5726 */
5727static SUPGIPMODE supdrvGipDeterminTscMode(PSUPDRVDEVEXT pDevExt)
5728{
5729 /*
5730 * On SMP we're faced with two problems:
5731 * (1) There might be a skew between the CPU, so that cpu0
5732 * returns a TSC that is slightly different from cpu1.
5733 * (2) Power management (and other things) may cause the TSC
5734 * to run at a non-constant speed, and cause the speed
5735 * to be different on the cpus. This will result in (1).
5736 *
5737 * So, on SMP systems we'll have to select the ASYNC update method
5738 * if there are symptoms of these problems.
5739 */
5740 if (RTMpGetCount() > 1)
5741 {
5742 uint32_t uEAX, uEBX, uECX, uEDX;
5743 uint64_t u64DiffCoresIgnored;
5744
5745 /* Permit the user and/or the OS specific bits to force async mode. */
5746 if (supdrvOSGetForcedAsyncTscMode(pDevExt))
5747 return SUPGIPMODE_ASYNC_TSC;
5748
5749 /* Try check for current differences between the cpus. */
5750 if (supdrvDetermineAsyncTsc(&u64DiffCoresIgnored))
5751 return SUPGIPMODE_ASYNC_TSC;
5752
5753 /*
5754 * If the CPU supports power management and is an AMD one we
5755 * won't trust it unless it has the TscInvariant bit is set.
5756 */
5757 /* Check for "AuthenticAMD" */
5758 ASMCpuId(0, &uEAX, &uEBX, &uECX, &uEDX);
5759 if ( uEAX >= 1
5760 && ASMIsAmdCpuEx(uEBX, uECX, uEDX))
5761 {
5762 /* Check for APM support and that TscInvariant is cleared. */
5763 ASMCpuId(0x80000000, &uEAX, &uEBX, &uECX, &uEDX);
5764 if (uEAX >= 0x80000007)
5765 {
5766 ASMCpuId(0x80000007, &uEAX, &uEBX, &uECX, &uEDX);
5767 if ( !(uEDX & RT_BIT(8))/* TscInvariant */
5768 && (uEDX & 0x3e)) /* STC|TM|THERMTRIP|VID|FID. Ignore TS. */
5769 return SUPGIPMODE_ASYNC_TSC;
5770 }
5771 }
5772 }
5773 return SUPGIPMODE_SYNC_TSC;
5774}
5775
5776
5777/**
5778 * Initializes per-CPU GIP information.
5779 *
5780 * @param pGip Pointer to the read-write kernel mapping of the GIP.
5781 * @param pCpu Pointer to which GIP CPU to initalize.
5782 * @param u64NanoTS The current nanosecond timestamp.
5783 */
5784static void supdrvGipInitCpu(PSUPGLOBALINFOPAGE pGip, PSUPGIPCPU pCpu, uint64_t u64NanoTS)
5785{
5786 pCpu->u32TransactionId = 2;
5787 pCpu->u64NanoTS = u64NanoTS;
5788 pCpu->u64TSC = ASMReadTSC();
5789
5790 ASMAtomicWriteSize(&pCpu->enmState, SUPGIPCPUSTATE_INVALID);
5791 ASMAtomicWriteSize(&pCpu->idCpu, NIL_RTCPUID);
5792 ASMAtomicWriteS16(&pCpu->iCpuSet, -1);
5793 ASMAtomicWriteU16(&pCpu->idApic, UINT16_MAX);
5794
5795 /*
5796 * We don't know the following values until we've executed updates.
5797 * So, we'll just pretend it's a 4 GHz CPU and adjust the history it on
5798 * the 2nd timer callout.
5799 */
5800 pCpu->u64CpuHz = _4G + 1; /* tstGIP-2 depends on this. */
5801 pCpu->u32UpdateIntervalTSC
5802 = pCpu->au32TSCHistory[0]
5803 = pCpu->au32TSCHistory[1]
5804 = pCpu->au32TSCHistory[2]
5805 = pCpu->au32TSCHistory[3]
5806 = pCpu->au32TSCHistory[4]
5807 = pCpu->au32TSCHistory[5]
5808 = pCpu->au32TSCHistory[6]
5809 = pCpu->au32TSCHistory[7]
5810 = (uint32_t)(_4G / pGip->u32UpdateHz);
5811}
5812
5813
5814/**
5815 * Initializes the GIP data.
5816 *
5817 * @param pDevExt Pointer to the device instance data.
5818 * @param pGip Pointer to the read-write kernel mapping of the GIP.
5819 * @param HCPhys The physical address of the GIP.
5820 * @param u64NanoTS The current nanosecond timestamp.
5821 * @param uUpdateHz The update frequency.
5822 * @param cCpus The CPU count.
5823 */
5824static void supdrvGipInit(PSUPDRVDEVEXT pDevExt, PSUPGLOBALINFOPAGE pGip, RTHCPHYS HCPhys,
5825 uint64_t u64NanoTS, unsigned uUpdateHz, unsigned cCpus)
5826{
5827 size_t const cbGip = RT_ALIGN_Z(RT_OFFSETOF(SUPGLOBALINFOPAGE, aCPUs[cCpus]), PAGE_SIZE);
5828 unsigned i;
5829#ifdef DEBUG_DARWIN_GIP
5830 OSDBGPRINT(("supdrvGipInit: pGip=%p HCPhys=%lx u64NanoTS=%llu uUpdateHz=%d cCpus=%u\n", pGip, (long)HCPhys, u64NanoTS, uUpdateHz, cCpus));
5831#else
5832 LogFlow(("supdrvGipInit: pGip=%p HCPhys=%lx u64NanoTS=%llu uUpdateHz=%d cCpus=%u\n", pGip, (long)HCPhys, u64NanoTS, uUpdateHz, cCpus));
5833#endif
5834
5835 /*
5836 * Initialize the structure.
5837 */
5838 memset(pGip, 0, cbGip);
5839 pGip->u32Magic = SUPGLOBALINFOPAGE_MAGIC;
5840 pGip->u32Version = SUPGLOBALINFOPAGE_VERSION;
5841 pGip->u32Mode = supdrvGipDeterminTscMode(pDevExt);
5842 pGip->cCpus = (uint16_t)cCpus;
5843 pGip->cPages = (uint16_t)(cbGip / PAGE_SIZE);
5844 pGip->u32UpdateHz = uUpdateHz;
5845 pGip->u32UpdateIntervalNS = 1000000000 / uUpdateHz;
5846 pGip->u64NanoTSLastUpdateHz = u64NanoTS;
5847 RTCpuSetEmpty(&pGip->OnlineCpuSet);
5848 RTCpuSetEmpty(&pGip->PresentCpuSet);
5849 RTMpGetSet(&pGip->PossibleCpuSet);
5850 pGip->cOnlineCpus = RTMpGetOnlineCount();
5851 pGip->cPresentCpus = RTMpGetPresentCount();
5852 pGip->cPossibleCpus = RTMpGetCount();
5853 pGip->idCpuMax = RTMpGetMaxCpuId();
5854 for (i = 0; i < RT_ELEMENTS(pGip->aiCpuFromApicId); i++)
5855 pGip->aiCpuFromApicId[i] = 0;
5856 for (i = 0; i < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx); i++)
5857 pGip->aiCpuFromCpuSetIdx[i] = UINT16_MAX;
5858
5859 for (i = 0; i < cCpus; i++)
5860 supdrvGipInitCpu(pGip, &pGip->aCPUs[i], u64NanoTS);
5861
5862 /*
5863 * Link it to the device extension.
5864 */
5865 pDevExt->pGip = pGip;
5866 pDevExt->HCPhysGip = HCPhys;
5867 pDevExt->cGipUsers = 0;
5868}
5869
5870
5871/**
5872 * On CPU initialization callback for RTMpOnAll.
5873 *
5874 * @param idCpu The CPU ID.
5875 * @param pvUser1 The device extension.
5876 * @param pvUser2 The GIP.
5877 */
5878static DECLCALLBACK(void) supdrvGipInitOnCpu(RTCPUID idCpu, void *pvUser1, void *pvUser2)
5879{
5880 /* This is good enough, even though it will update some of the globals a
5881 bit to much. */
5882 supdrvGipMpEventOnline((PSUPDRVDEVEXT)pvUser1, idCpu);
5883}
5884
5885
5886/**
5887 * Invalidates the GIP data upon termination.
5888 *
5889 * @param pGip Pointer to the read-write kernel mapping of the GIP.
5890 */
5891static void supdrvGipTerm(PSUPGLOBALINFOPAGE pGip)
5892{
5893 unsigned i;
5894 pGip->u32Magic = 0;
5895 for (i = 0; i < RT_ELEMENTS(pGip->aCPUs); i++)
5896 {
5897 pGip->aCPUs[i].u64NanoTS = 0;
5898 pGip->aCPUs[i].u64TSC = 0;
5899 pGip->aCPUs[i].iTSCHistoryHead = 0;
5900 }
5901}
5902
5903
5904/**
5905 * Worker routine for supdrvGipUpdate and supdrvGipUpdatePerCpu that
5906 * updates all the per cpu data except the transaction id.
5907 *
5908 * @param pDevExt The device extension.
5909 * @param pGipCpu Pointer to the per cpu data.
5910 * @param u64NanoTS The current time stamp.
5911 * @param u64TSC The current TSC.
5912 * @param iTick The current timer tick.
5913 */
5914static void supdrvGipDoUpdateCpu(PSUPDRVDEVEXT pDevExt, PSUPGIPCPU pGipCpu, uint64_t u64NanoTS, uint64_t u64TSC, uint64_t iTick)
5915{
5916 uint64_t u64TSCDelta;
5917 uint32_t u32UpdateIntervalTSC;
5918 uint32_t u32UpdateIntervalTSCSlack;
5919 unsigned iTSCHistoryHead;
5920 uint64_t u64CpuHz;
5921 uint32_t u32TransactionId;
5922
5923 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
5924 AssertPtrReturnVoid(pGip);
5925
5926 /* Delta between this and the previous update. */
5927 ASMAtomicUoWriteU32(&pGipCpu->u32PrevUpdateIntervalNS, (uint32_t)(u64NanoTS - pGipCpu->u64NanoTS));
5928
5929 /*
5930 * Update the NanoTS.
5931 */
5932 ASMAtomicWriteU64(&pGipCpu->u64NanoTS, u64NanoTS);
5933
5934 /*
5935 * Calc TSC delta.
5936 */
5937 /** @todo validate the NanoTS delta, don't trust the OS to call us when it should... */
5938 u64TSCDelta = u64TSC - pGipCpu->u64TSC;
5939 ASMAtomicWriteU64(&pGipCpu->u64TSC, u64TSC);
5940
5941 if (u64TSCDelta >> 32)
5942 {
5943 u64TSCDelta = pGipCpu->u32UpdateIntervalTSC;
5944 pGipCpu->cErrors++;
5945 }
5946
5947 /*
5948 * On the 2nd and 3rd callout, reset the history with the current TSC
5949 * interval since the values entered by supdrvGipInit are totally off.
5950 * The interval on the 1st callout completely unreliable, the 2nd is a bit
5951 * better, while the 3rd should be most reliable.
5952 */
5953 u32TransactionId = pGipCpu->u32TransactionId;
5954 if (RT_UNLIKELY( ( u32TransactionId == 5
5955 || u32TransactionId == 7)
5956 && ( iTick == 2
5957 || iTick == 3) ))
5958 {
5959 unsigned i;
5960 for (i = 0; i < RT_ELEMENTS(pGipCpu->au32TSCHistory); i++)
5961 ASMAtomicUoWriteU32(&pGipCpu->au32TSCHistory[i], (uint32_t)u64TSCDelta);
5962 }
5963
5964 /*
5965 * TSC History.
5966 */
5967 Assert(RT_ELEMENTS(pGipCpu->au32TSCHistory) == 8);
5968 iTSCHistoryHead = (pGipCpu->iTSCHistoryHead + 1) & 7;
5969 ASMAtomicWriteU32(&pGipCpu->iTSCHistoryHead, iTSCHistoryHead);
5970 ASMAtomicWriteU32(&pGipCpu->au32TSCHistory[iTSCHistoryHead], (uint32_t)u64TSCDelta);
5971
5972 /*
5973 * UpdateIntervalTSC = average of last 8,2,1 intervals depending on update HZ.
5974 */
5975 if (pGip->u32UpdateHz >= 1000)
5976 {
5977 uint32_t u32;
5978 u32 = pGipCpu->au32TSCHistory[0];
5979 u32 += pGipCpu->au32TSCHistory[1];
5980 u32 += pGipCpu->au32TSCHistory[2];
5981 u32 += pGipCpu->au32TSCHistory[3];
5982 u32 >>= 2;
5983 u32UpdateIntervalTSC = pGipCpu->au32TSCHistory[4];
5984 u32UpdateIntervalTSC += pGipCpu->au32TSCHistory[5];
5985 u32UpdateIntervalTSC += pGipCpu->au32TSCHistory[6];
5986 u32UpdateIntervalTSC += pGipCpu->au32TSCHistory[7];
5987 u32UpdateIntervalTSC >>= 2;
5988 u32UpdateIntervalTSC += u32;
5989 u32UpdateIntervalTSC >>= 1;
5990
5991 /* Value chosen for a 2GHz Athlon64 running linux 2.6.10/11, . */
5992 u32UpdateIntervalTSCSlack = u32UpdateIntervalTSC >> 14;
5993 }
5994 else if (pGip->u32UpdateHz >= 90)
5995 {
5996 u32UpdateIntervalTSC = (uint32_t)u64TSCDelta;
5997 u32UpdateIntervalTSC += pGipCpu->au32TSCHistory[(iTSCHistoryHead - 1) & 7];
5998 u32UpdateIntervalTSC >>= 1;
5999
6000 /* value chosen on a 2GHz thinkpad running windows */
6001 u32UpdateIntervalTSCSlack = u32UpdateIntervalTSC >> 7;
6002 }
6003 else
6004 {
6005 u32UpdateIntervalTSC = (uint32_t)u64TSCDelta;
6006
6007 /* This value hasn't be checked yet.. waiting for OS/2 and 33Hz timers.. :-) */
6008 u32UpdateIntervalTSCSlack = u32UpdateIntervalTSC >> 6;
6009 }
6010 ASMAtomicWriteU32(&pGipCpu->u32UpdateIntervalTSC, u32UpdateIntervalTSC + u32UpdateIntervalTSCSlack);
6011
6012 /*
6013 * CpuHz.
6014 */
6015 u64CpuHz = ASMMult2xU32RetU64(u32UpdateIntervalTSC, pGip->u32UpdateHz);
6016 ASMAtomicWriteU64(&pGipCpu->u64CpuHz, u64CpuHz);
6017}
6018
6019
6020/**
6021 * Updates the GIP.
6022 *
6023 * @param pDevExt The device extension.
6024 * @param u64NanoTS The current nanosecond timesamp.
6025 * @param u64TSC The current TSC timesamp.
6026 * @param idCpu The CPU ID.
6027 * @param iTick The current timer tick.
6028 */
6029static void supdrvGipUpdate(PSUPDRVDEVEXT pDevExt, uint64_t u64NanoTS, uint64_t u64TSC, RTCPUID idCpu, uint64_t iTick)
6030{
6031 /*
6032 * Determine the relevant CPU data.
6033 */
6034 PSUPGIPCPU pGipCpu;
6035 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
6036 AssertPtrReturnVoid(pGip);
6037
6038 if (pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)
6039 pGipCpu = &pGip->aCPUs[0];
6040 else
6041 {
6042 unsigned iCpu = pGip->aiCpuFromApicId[ASMGetApicId()];
6043 if (RT_UNLIKELY(iCpu >= pGip->cCpus))
6044 return;
6045 pGipCpu = &pGip->aCPUs[iCpu];
6046 if (RT_UNLIKELY(pGipCpu->idCpu != idCpu))
6047 return;
6048 }
6049
6050 /*
6051 * Start update transaction.
6052 */
6053 if (!(ASMAtomicIncU32(&pGipCpu->u32TransactionId) & 1))
6054 {
6055 /* this can happen on win32 if we're taking to long and there are more CPUs around. shouldn't happen though. */
6056 AssertMsgFailed(("Invalid transaction id, %#x, not odd!\n", pGipCpu->u32TransactionId));
6057 ASMAtomicIncU32(&pGipCpu->u32TransactionId);
6058 pGipCpu->cErrors++;
6059 return;
6060 }
6061
6062 /*
6063 * Recalc the update frequency every 0x800th time.
6064 */
6065 if (!(pGipCpu->u32TransactionId & (GIP_UPDATEHZ_RECALC_FREQ * 2 - 2)))
6066 {
6067 if (pGip->u64NanoTSLastUpdateHz)
6068 {
6069#ifdef RT_ARCH_AMD64 /** @todo fix 64-bit div here to work on x86 linux. */
6070 uint64_t u64Delta = u64NanoTS - pGip->u64NanoTSLastUpdateHz;
6071 uint32_t u32UpdateHz = (uint32_t)((UINT64_C(1000000000) * GIP_UPDATEHZ_RECALC_FREQ) / u64Delta);
6072 if (u32UpdateHz <= 2000 && u32UpdateHz >= 30)
6073 {
6074 ASMAtomicWriteU32(&pGip->u32UpdateHz, u32UpdateHz);
6075 ASMAtomicWriteU32(&pGip->u32UpdateIntervalNS, 1000000000 / u32UpdateHz);
6076 }
6077#endif
6078 }
6079 ASMAtomicWriteU64(&pGip->u64NanoTSLastUpdateHz, u64NanoTS);
6080 }
6081
6082 /*
6083 * Update the data.
6084 */
6085 supdrvGipDoUpdateCpu(pDevExt, pGipCpu, u64NanoTS, u64TSC, iTick);
6086
6087 /*
6088 * Complete transaction.
6089 */
6090 ASMAtomicIncU32(&pGipCpu->u32TransactionId);
6091}
6092
6093
6094/**
6095 * Updates the per cpu GIP data for the calling cpu.
6096 *
6097 * @param pDevExt The device extension.
6098 * @param u64NanoTS The current nanosecond timesamp.
6099 * @param u64TSC The current TSC timesamp.
6100 * @param idCpu The CPU ID.
6101 * @param idApic The APIC id for the CPU index.
6102 * @param iTick The current timer tick.
6103 */
6104static void supdrvGipUpdatePerCpu(PSUPDRVDEVEXT pDevExt, uint64_t u64NanoTS, uint64_t u64TSC,
6105 RTCPUID idCpu, uint8_t idApic, uint64_t iTick)
6106{
6107 uint32_t iCpu;
6108 PSUPGLOBALINFOPAGE pGip = pDevExt->pGip;
6109
6110 /*
6111 * Avoid a potential race when a CPU online notification doesn't fire on
6112 * the onlined CPU but the tick creeps in before the event notification is
6113 * run.
6114 */
6115 if (RT_UNLIKELY(iTick == 1))
6116 {
6117 iCpu = supdrvGipCpuIndexFromCpuId(pGip, idCpu);
6118 if (pGip->aCPUs[iCpu].enmState == SUPGIPCPUSTATE_OFFLINE)
6119 supdrvGipMpEventOnline(pDevExt, idCpu);
6120 }
6121
6122 iCpu = pGip->aiCpuFromApicId[idApic];
6123 if (RT_LIKELY(iCpu < pGip->cCpus))
6124 {
6125 PSUPGIPCPU pGipCpu = &pGip->aCPUs[iCpu];
6126 if (pGipCpu->idCpu == idCpu)
6127 {
6128 /*
6129 * Start update transaction.
6130 */
6131 if (!(ASMAtomicIncU32(&pGipCpu->u32TransactionId) & 1))
6132 {
6133 AssertMsgFailed(("Invalid transaction id, %#x, not odd!\n", pGipCpu->u32TransactionId));
6134 ASMAtomicIncU32(&pGipCpu->u32TransactionId);
6135 pGipCpu->cErrors++;
6136 return;
6137 }
6138
6139 /*
6140 * Update the data.
6141 */
6142 supdrvGipDoUpdateCpu(pDevExt, pGipCpu, u64NanoTS, u64TSC, iTick);
6143
6144 /*
6145 * Complete transaction.
6146 */
6147 ASMAtomicIncU32(&pGipCpu->u32TransactionId);
6148 }
6149 }
6150}
6151
6152/**
6153 * Resume built-in keyboard on MacBook Air and Pro hosts.
6154 * If there is no built-in keyboard device, return success anyway.
6155 *
6156 * @returns 0 on Mac OS X platform, VERR_NOT_IMPLEMENTED on the other ones.
6157 */
6158static int supdrvIOCtl_ResumeSuspendedKbds(void)
6159{
6160#if defined(RT_OS_DARWIN)
6161 return supdrvDarwinResumeSuspendedKbds();
6162#else
6163 return VERR_NOT_IMPLEMENTED;
6164#endif
6165}
6166
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