SUPLibAll.cpp@ 78286

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1	/* $Id: SUPLibAll.cpp 76553 2019-01-01 01:45:53Z vboxsync $ */
2	/** @file
3	* VirtualBox Support Library - All Contexts Code.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* The contents of this file may alternatively be used under the terms
18	* of the Common Development and Distribution License Version 1.0
19	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20	* VirtualBox OSE distribution, in which case the provisions of the
21	* CDDL are applicable instead of those of the GPL.
22	*
23	* You may elect to license modified versions of this file under the
24	* terms and conditions of either the GPL or the CDDL or both.
25	*/
26
27
28	/*********************************************************************************************************************************
29	* Header Files *
30	*********************************************************************************************************************************/
31	#include <VBox/sup.h>
32	#ifdef IN_RC
33	# include <VBox/vmm/vm.h>
34	# include <VBox/vmm/vmm.h>
35	#endif
36	#ifdef IN_RING0
37	# include <iprt/mp.h>
38	#endif
39	#if defined(RT_ARCH_AMD64) \|\| defined(RT_ARCH_X86)
40	# include <iprt/asm-amd64-x86.h>
41	#endif
42	#include <iprt/errcore.h>
43
44
45	#if defined(RT_ARCH_AMD64) \|\| defined(RT_ARCH_X86)
46
47	/**
48	* The slow case for SUPReadTsc where we need to apply deltas.
49	*
50	* Must only be called when deltas are applicable, so please do not call it
51	* directly.
52	*
53	* @returns TSC with delta applied.
54	* @param pGip Pointer to the GIP.
55	*
56	* @remarks May be called with interrupts disabled in ring-0! This is why the
57	* ring-0 code doesn't attempt to figure the delta.
58	*
59	* @internal
60	*/
61	SUPDECL(uint64_t) SUPReadTscWithDelta(PSUPGLOBALINFOPAGE pGip)
62	{
63	uint64_t uTsc;
64	uint16_t iGipCpu;
65	AssertCompile(RT_IS_POWER_OF_TWO(RTCPUSET_MAX_CPUS));
66	AssertCompile(RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx) >= RTCPUSET_MAX_CPUS);
67	Assert(pGip->enmUseTscDelta > SUPGIPUSETSCDELTA_PRACTICALLY_ZERO);
68
69	/*
70	* Read the TSC and get the corresponding aCPUs index.
71	*/
72	#ifdef IN_RING3
73	if (pGip->fGetGipCpu & SUPGIPGETCPU_RDTSCP_MASK_MAX_SET_CPUS)
74	{
75	/* RDTSCP gives us all we need, no loops/cli. */
76	uint32_t iCpuSet;
77	uTsc = ASMReadTscWithAux(&iCpuSet);
78	iCpuSet &= RTCPUSET_MAX_CPUS - 1;
79	iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
80	}
81	else if (pGip->fGetGipCpu & SUPGIPGETCPU_IDTR_LIMIT_MASK_MAX_SET_CPUS)
82	{
83	/* Storing the IDTR is normally very quick, but we need to loop. */
84	uint32_t cTries = 0;
85	for (;;)
86	{
87	uint16_t cbLim = ASMGetIdtrLimit();
88	uTsc = ASMReadTSC();
89	if (RT_LIKELY(ASMGetIdtrLimit() == cbLim))
90	{
91	uint16_t iCpuSet = cbLim - 256 * (ARCH_BITS == 64 ? 16 : 8);
92	iCpuSet &= RTCPUSET_MAX_CPUS - 1;
93	iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
94	break;
95	}
96	if (cTries >= 16)
97	{
98	iGipCpu = UINT16_MAX;
99	break;
100	}
101	cTries++;
102	}
103	}
104	else
105	{
106	/* Get APIC ID via the slow CPUID instruction, requires looping. */
107	uint32_t cTries = 0;
108	for (;;)
109	{
110	uint8_t idApic = ASMGetApicId();
111	uTsc = ASMReadTSC();
112	if (RT_LIKELY(ASMGetApicId() == idApic))
113	{
114	iGipCpu = pGip->aiCpuFromApicId[idApic];
115	break;
116	}
117	if (cTries >= 16)
118	{
119	iGipCpu = UINT16_MAX;
120	break;
121	}
122	cTries++;
123	}
124	}
125	#elif defined(IN_RING0)
126	/* Ring-0: Use use RTMpCpuId(), no loops. */
127	RTCCUINTREG uFlags = ASMIntDisableFlags();
128	int iCpuSet = RTMpCpuIdToSetIndex(RTMpCpuId());
129	if (RT_LIKELY((unsigned)iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)))
130	iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
131	else
132	iGipCpu = UINT16_MAX;
133	uTsc = ASMReadTSC();
134	ASMSetFlags(uFlags);
135
136	# elif defined(IN_RC)
137	/* Raw-mode context: We can get the host CPU set index via VMCPU, no loops. */
138	RTCCUINTREG uFlags = ASMIntDisableFlags(); /* Are already disable, but play safe. */
139	uint32_t iCpuSet = VMMGetCpu(&g_VM)->iHostCpuSet;
140	if (RT_LIKELY(iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)))
141	iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
142	else
143	iGipCpu = UINT16_MAX;
144	uTsc = ASMReadTSC();
145	ASMSetFlags(uFlags);
146	#else
147	# error "IN_RING3, IN_RC or IN_RING0 must be defined!"
148	#endif
149
150	/*
151	* If the delta is valid, apply it.
152	*/
153	if (RT_LIKELY(iGipCpu < pGip->cCpus))
154	{
155	int64_t iTscDelta = pGip->aCPUs[iGipCpu].i64TSCDelta;
156	if (RT_LIKELY(iTscDelta != INT64_MAX))
157	return uTsc - iTscDelta;
158
159	# ifdef IN_RING3
160	/*
161	* The delta needs calculating, call supdrv to get the TSC.
162	*/
163	int rc = SUPR3ReadTsc(&uTsc, NULL);
164	if (RT_SUCCESS(rc))
165	return uTsc;
166	AssertMsgFailed(("SUPR3ReadTsc -> %Rrc\n", rc));
167	uTsc = ASMReadTSC();
168	# endif /* IN_RING3 */
169	}
170
171	/*
172	* This shouldn't happen, especially not in ring-3 and raw-mode context.
173	* But if it does, return something that's half useful.
174	*/
175	AssertMsgFailed(("iGipCpu=%d (%#x) cCpus=%d fGetGipCpu=%#x\n", iGipCpu, iGipCpu, pGip->cCpus, pGip->fGetGipCpu));
176	return uTsc;
177	}
178
179
180	/**
181	* Internal worker for getting the GIP CPU array index for the calling CPU.
182	*
183	* @returns Index into SUPGLOBALINFOPAGE::aCPUs or UINT16_MAX.
184	* @param pGip The GIP.
185	*/
186	DECLINLINE(uint16_t) supGetGipCpuIndex(PSUPGLOBALINFOPAGE pGip)
187	{
188	uint16_t iGipCpu;
189	#ifdef IN_RING3
190	if (pGip->fGetGipCpu & SUPGIPGETCPU_IDTR_LIMIT_MASK_MAX_SET_CPUS)
191	{
192	/* Storing the IDTR is normally very fast. */
193	uint16_t cbLim = ASMGetIdtrLimit();
194	uint16_t iCpuSet = cbLim - 256 * (ARCH_BITS == 64 ? 16 : 8);
195	iCpuSet &= RTCPUSET_MAX_CPUS - 1;
196	iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
197	}
198	else if (pGip->fGetGipCpu & SUPGIPGETCPU_RDTSCP_MASK_MAX_SET_CPUS)
199	{
200	/* RDTSCP gives us what need need and more. */
201	uint32_t iCpuSet;
202	ASMReadTscWithAux(&iCpuSet);
203	iCpuSet &= RTCPUSET_MAX_CPUS - 1;
204	iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
205	}
206	else
207	{
208	/* Get APIC ID via the slow CPUID instruction. */
209	uint8_t idApic = ASMGetApicId();
210	iGipCpu = pGip->aiCpuFromApicId[idApic];
211	}
212	#elif defined(IN_RING0)
213	/* Ring-0: Use use RTMpCpuId() (disables cli to avoid host OS assertions about unsafe CPU number usage). */
214	RTCCUINTREG uFlags = ASMIntDisableFlags();
215	int iCpuSet = RTMpCpuIdToSetIndex(RTMpCpuId());
216	if (RT_LIKELY((unsigned)iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)))
217	iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
218	else
219	iGipCpu = UINT16_MAX;
220	ASMSetFlags(uFlags);
221
222	# elif defined(IN_RC)
223	/* Raw-mode context: We can get the host CPU set index via VMCPU. */
224	uint32_t iCpuSet = VMMGetCpu(&g_VM)->iHostCpuSet;
225	if (RT_LIKELY(iCpuSet < RT_ELEMENTS(pGip->aiCpuFromCpuSetIdx)))
226	iGipCpu = pGip->aiCpuFromCpuSetIdx[iCpuSet];
227	else
228	iGipCpu = UINT16_MAX;
229	#else
230	# error "IN_RING3, IN_RC or IN_RING0 must be defined!"
231	#endif
232	return iGipCpu;
233	}
234
235
236	/**
237	* Slow path in SUPGetTscDelta, don't call directly.
238	*
239	* @returns See SUPGetTscDelta.
240	* @param pGip The GIP.
241	* @internal
242	*/
243	SUPDECL(uint64_t) SUPGetTscDeltaSlow(PSUPGLOBALINFOPAGE pGip)
244	{
245	uint16_t iGipCpu = supGetGipCpuIndex(pGip);
246	if (RT_LIKELY(iGipCpu < pGip->cCpus))
247	{
248	int64_t iTscDelta = pGip->aCPUs[iGipCpu].i64TSCDelta;
249	if (iTscDelta != INT64_MAX)
250	return iTscDelta;
251	}
252	AssertFailed();
253	return 0;
254	}
255
256
257	/**
258	* Slow path in SUPGetCpuHzFromGip, don't call directly.
259	*
260	* @returns See SUPGetCpuHzFromGip.
261	* @param pGip The GIP.
262	* @internal
263	*/
264	SUPDECL(uint64_t) SUPGetCpuHzFromGipForAsyncMode(PSUPGLOBALINFOPAGE pGip)
265	{
266	uint16_t iGipCpu = supGetGipCpuIndex(pGip);
267	if (RT_LIKELY(iGipCpu < pGip->cCpus))
268	return pGip->aCPUs[iGipCpu].u64CpuHz;
269	AssertFailed();
270	return pGip->u64CpuHz;
271	}
272
273
274	/**
275	* Worker for SUPIsTscFreqCompatible().
276	*
277	* @returns true if it's compatible, false otherwise.
278	* @param uBaseCpuHz The reference CPU frequency of the system.
279	* @param uCpuHz The CPU frequency to compare with the base.
280	* @param fRelax Whether to use a more relaxed threshold (like
281	* for when running in a virtualized environment).
282	*
283	* @remarks Don't use directly, use SUPIsTscFreqCompatible() instead. This is
284	* to be used by tstGIP-2 or the like.
285	*/
286	SUPDECL(bool) SUPIsTscFreqCompatibleEx(uint64_t uBaseCpuHz, uint64_t uCpuHz, bool fRelax)
287	{
288	if (uBaseCpuHz != uCpuHz)
289	{
290	/* Arbitrary tolerance threshold, tweak later if required, perhaps
291	more tolerance on lower frequencies and less tolerance on higher. */
292	uint16_t uFact = !fRelax ? 666 /* 0.15% / : 125 / 0.8% */;
293	uint64_t uThr = uBaseCpuHz / uFact;
294	uint64_t uLo = uBaseCpuHz - uThr;
295	uint64_t uHi = uBaseCpuHz + uThr;
296	if ( uCpuHz < uLo
297	\|\| uCpuHz > uHi)
298	return false;
299	}
300	return true;
301	}
302
303
304	/**
305	* Checks if the provided TSC frequency is close enough to the computed TSC
306	* frequency of the host.
307	*
308	* @returns true if it's compatible, false otherwise.
309	* @param uCpuHz The TSC frequency to check.
310	* @param puGipCpuHz Where to store the GIP TSC frequency used
311	* during the compatibility test - optional.
312	* @param fRelax Whether to use a more relaxed threshold (like
313	* for when running in a virtualized environment).
314	*/
315	SUPDECL(bool) SUPIsTscFreqCompatible(uint64_t uCpuHz, uint64_t *puGipCpuHz, bool fRelax)
316	{
317	PSUPGLOBALINFOPAGE pGip = g_pSUPGlobalInfoPage;
318	bool fCompat = false;
319	uint64_t uGipCpuHz = 0;
320	if ( pGip
321	&& pGip->u32Mode != SUPGIPMODE_ASYNC_TSC)
322	{
323	uGipCpuHz = pGip->u64CpuHz;
324	fCompat = SUPIsTscFreqCompatibleEx(uGipCpuHz, uCpuHz, fRelax);
325	}
326	if (puGipCpuHz)
327	*puGipCpuHz = uGipCpuHz;
328	return fCompat;
329	}
330
331	#endif /* RT_ARCH_AMD64 \|\| RT_ARCH_X86 */
332

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source: vbox/trunk/src/VBox/HostDrivers/Support/SUPLibAll.cpp@ 78286

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