| 1 | /** @file
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| 2 | *
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| 3 | * VBox host drivers - Ring-0 support drivers - Testcases:
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| 4 | * Test the Global Info Page interface
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| 5 | */
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| 6 |
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| 7 | /*
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| 8 | * Copyright (C) 2006-2007 innotek GmbH
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| 9 | *
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| 10 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 11 | * available from http://www.virtualbox.org. This file is free software;
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| 12 | * you can redistribute it and/or modify it under the terms of the GNU
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| 13 | * General Public License as published by the Free Software Foundation,
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| 14 | * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
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| 15 | * distribution. VirtualBox OSE is distributed in the hope that it will
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| 16 | * be useful, but WITHOUT ANY WARRANTY of any kind.
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| 17 | *
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| 18 | * If you received this file as part of a commercial VirtualBox
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| 19 | * distribution, then only the terms of your commercial VirtualBox
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| 20 | * license agreement apply instead of the previous paragraph.
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| 21 | */
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| 22 |
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| 23 | /*******************************************************************************
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| 24 | * Header Files *
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| 25 | *******************************************************************************/
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| 26 | #include <VBox/sup.h>
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| 27 | #include <VBox/err.h>
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| 28 | #include <VBox/param.h>
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| 29 | #include <iprt/asm.h>
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| 30 | #include <iprt/assert.h>
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| 31 | #include <iprt/alloc.h>
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| 32 | #include <iprt/thread.h>
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| 33 | #include <iprt/stream.h>
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| 34 | #include <iprt/runtime.h>
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| 35 |
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| 36 |
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| 37 | int main(void)
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| 38 | {
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| 39 | RTR3Init();
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| 40 |
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| 41 | /*
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| 42 | * Init
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| 43 | */
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| 44 | PSUPDRVSESSION pSession = NIL_RTR0PTR;
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| 45 | int rc = SUPInit(&pSession);
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| 46 | if (VBOX_SUCCESS(rc))
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| 47 | {
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| 48 | if (g_pSUPGlobalInfoPage)
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| 49 | {
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| 50 | RTPrintf("tstGIP-2: u32UpdateHz=%RU32 u32UpdateIntervalNS=%RU32 u64NanoTSLastUpdateHz=%RX64 u32Mode=%d (%s) u32Version=%#x\n"
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| 51 | "tstGIP-2: it: u64NanoTS u64TSC UpIntTSC H TransId CpuHz TSC Interval History...\n",
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| 52 | g_pSUPGlobalInfoPage->u32UpdateHz,
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| 53 | g_pSUPGlobalInfoPage->u32UpdateIntervalNS,
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| 54 | g_pSUPGlobalInfoPage->u64NanoTSLastUpdateHz,
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| 55 | g_pSUPGlobalInfoPage->u32Mode,
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| 56 | g_pSUPGlobalInfoPage->u32Mode == SUPGIPMODE_SYNC_TSC ? "sync"
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| 57 | : g_pSUPGlobalInfoPage->u32Mode == SUPGIPMODE_ASYNC_TSC ? "async"
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| 58 | : "???",
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| 59 | g_pSUPGlobalInfoPage->u32Version);
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| 60 | for (int i = 0; i < 80; i++)
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| 61 | {
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| 62 | for (unsigned iCpu = 0; iCpu < RT_ELEMENTS(g_pSUPGlobalInfoPage->aCPUs); iCpu++)
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| 63 | if ( g_pSUPGlobalInfoPage->aCPUs[iCpu].u64CpuHz > 0
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| 64 | && g_pSUPGlobalInfoPage->aCPUs[iCpu].u64CpuHz != _4G + 1)
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| 65 | RTPrintf("tstGIP-2: %2d/%d: %016llx %016llx %08x %d %08x %15llu %08x %08x %08x %08x %08x %08x %08x %08x (%d)\n",
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| 66 | i, iCpu,
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| 67 | g_pSUPGlobalInfoPage->aCPUs[iCpu].u64NanoTS,
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| 68 | g_pSUPGlobalInfoPage->aCPUs[iCpu].u64TSC,
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| 69 | g_pSUPGlobalInfoPage->aCPUs[iCpu].u32UpdateIntervalTSC,
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| 70 | g_pSUPGlobalInfoPage->aCPUs[iCpu].iTSCHistoryHead,
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| 71 | g_pSUPGlobalInfoPage->aCPUs[iCpu].u32TransactionId,
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| 72 | g_pSUPGlobalInfoPage->aCPUs[iCpu].u64CpuHz,
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| 73 | g_pSUPGlobalInfoPage->aCPUs[iCpu].au32TSCHistory[0],
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| 74 | g_pSUPGlobalInfoPage->aCPUs[iCpu].au32TSCHistory[1],
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| 75 | g_pSUPGlobalInfoPage->aCPUs[iCpu].au32TSCHistory[2],
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| 76 | g_pSUPGlobalInfoPage->aCPUs[iCpu].au32TSCHistory[3],
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| 77 | g_pSUPGlobalInfoPage->aCPUs[iCpu].au32TSCHistory[4],
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| 78 | g_pSUPGlobalInfoPage->aCPUs[iCpu].au32TSCHistory[5],
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| 79 | g_pSUPGlobalInfoPage->aCPUs[iCpu].au32TSCHistory[6],
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| 80 | g_pSUPGlobalInfoPage->aCPUs[iCpu].au32TSCHistory[7],
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| 81 | g_pSUPGlobalInfoPage->aCPUs[iCpu].cErrors);
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| 82 | RTThreadSleep(9);
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| 83 | }
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| 84 | }
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| 85 | else
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| 86 | {
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| 87 | RTPrintf("tstGIP-2: g_pSUPGlobalInfoPage is NULL\n");
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| 88 | rc = -1;
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| 89 | }
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| 90 |
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| 91 | SUPTerm();
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| 92 | }
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| 93 | else
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| 94 | RTPrintf("tstGIP-2: SUPInit failed: %Vrc\n", rc);
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| 95 | return !!rc;
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| 96 | }
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