VirtualBox

source: vbox/trunk/src/VBox/Main/src-all/PlatformPropertiesImpl.cpp@ 101207

Last change on this file since 101207 was 101200, checked in by vboxsync, 19 months ago

Main,FE/Qt: Add the QEMU RAM based framebuffer device as a possible graphics controller for ARM platforms. Allows getting graphics output on guests like OpenSuse 15.4 and Oracle Linux 9 which don't have a compatible VSVGA3 device driver, bugref:10386

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1/* $Id: PlatformPropertiesImpl.cpp 101200 2023-09-20 14:14:26Z vboxsync $ */
2/** @file
3 * VirtualBox COM class implementation - Platform properties.
4 */
5
6/*
7 * Copyright (C) 2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28#define LOG_GROUP LOG_GROUP_MAIN_PLATFORMPROPERTIES
29#include "PlatformPropertiesImpl.h"
30#include "VirtualBoxImpl.h"
31#include "LoggingNew.h"
32#include "Global.h"
33
34#include <iprt/cpp/utils.h>
35
36#include <VBox/settings.h>
37
38// generated header
39#include "SchemaDefs.h"
40
41
42/*
43 * PlatformProperties implementation.
44 */
45PlatformProperties::PlatformProperties()
46 : mParent(NULL)
47 , mPlatformArchitecture(PlatformArchitecture_None)
48 , mfIsHost(false)
49{
50}
51
52PlatformProperties::~PlatformProperties()
53{
54 uninit();
55}
56
57HRESULT PlatformProperties::FinalConstruct()
58{
59 return BaseFinalConstruct();
60}
61
62void PlatformProperties::FinalRelease()
63{
64 uninit();
65
66 BaseFinalRelease();
67}
68
69/**
70 * Initializes platform properties.
71 *
72 * @returns HRESULT
73 * @param aParent Pointer to IVirtualBox parent object (weak).
74 * @param fIsHost Set to \c true if this instance handles platform properties of the host,
75 * or set to \c false for guests (default).
76 */
77HRESULT PlatformProperties::init(VirtualBox *aParent, bool fIsHost /* = false */)
78{
79 /* Enclose the state transition NotReady->InInit->Ready */
80 AutoInitSpan autoInitSpan(this);
81 AssertReturn(autoInitSpan.isOk(), E_FAIL);
82
83 unconst(mParent) = aParent;
84
85 m = new settings::PlatformProperties;
86
87 unconst(mfIsHost) = fIsHost;
88
89 if (mfIsHost)
90 {
91 /* On Windows, macOS and Solaris hosts, HW virtualization use isn't exclusive
92 * by default so that VT-x or AMD-V can be shared with other
93 * hypervisors without requiring user intervention.
94 * NB: See also PlatformProperties constructor in settings.h
95 */
96#if defined(RT_OS_DARWIN) || defined(RT_OS_WINDOWS) || defined(RT_OS_SOLARIS)
97 m->fExclusiveHwVirt = false; /** @todo BUGBUG Applies for MacOS on ARM as well? */
98#else
99 m->fExclusiveHwVirt = true;
100#endif
101 }
102
103 /* Confirm a successful initialization */
104 autoInitSpan.setSucceeded();
105
106 return S_OK;
107}
108
109/**
110 * Sets the platform architecture.
111 *
112 * @returns HRESULT
113 * @param aArchitecture Platform architecture to set.
114 *
115 * @note Usually only called when creating a new machine.
116 */
117HRESULT PlatformProperties::i_setArchitecture(PlatformArchitecture_T aArchitecture)
118{
119 /* sanity */
120 AutoCaller autoCaller(this);
121 AssertComRCReturn(autoCaller.hrc(), autoCaller.hrc());
122
123 AutoWriteLock alock(this COMMA_LOCKVAL_SRC_POS);
124
125 mPlatformArchitecture = aArchitecture;
126
127 return S_OK;
128}
129
130/**
131 * Returns the host's platform architecture.
132 *
133 * @returns The host's platform architecture.
134 */
135PlatformArchitecture_T PlatformProperties::s_getHostPlatformArchitecture()
136{
137#if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
138 return PlatformArchitecture_x86;
139#elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
140 return PlatformArchitecture_ARM;
141#else
142# error "Port me!"
143 return PlatformArchitecture_None;
144#endif
145}
146
147void PlatformProperties::uninit()
148{
149 /* Enclose the state transition Ready->InUninit->NotReady */
150 AutoUninitSpan autoUninitSpan(this);
151 if (autoUninitSpan.uninitDone())
152 return;
153
154 if (m)
155 {
156 delete m;
157 m = NULL;
158 }
159}
160
161HRESULT PlatformProperties::getSerialPortCount(ULONG *count)
162{
163 /* no need to lock, this is const */
164 *count = SchemaDefs::SerialPortCount;
165
166 return S_OK;
167}
168
169HRESULT PlatformProperties::getParallelPortCount(ULONG *count)
170{
171 /* no need to lock, this is const */
172 *count = SchemaDefs::ParallelPortCount;
173
174 return S_OK;
175}
176
177HRESULT PlatformProperties::getMaxBootPosition(ULONG *aMaxBootPosition)
178{
179 /* no need to lock, this is const */
180 *aMaxBootPosition = SchemaDefs::MaxBootPosition;
181
182 return S_OK;
183}
184
185HRESULT PlatformProperties::getRawModeSupported(BOOL *aRawModeSupported)
186{
187 *aRawModeSupported = FALSE;
188 return S_OK;
189}
190
191HRESULT PlatformProperties::getExclusiveHwVirt(BOOL *aExclusiveHwVirt)
192{
193 AutoReadLock alock(this COMMA_LOCKVAL_SRC_POS);
194
195 *aExclusiveHwVirt = m->fExclusiveHwVirt;
196
197 /* Makes no sense for guest platform properties, but we return FALSE anyway. */
198 return S_OK;
199}
200
201HRESULT PlatformProperties::setExclusiveHwVirt(BOOL aExclusiveHwVirt)
202{
203 /* Only makes sense when running in VBoxSVC, as this is a pure host setting -- ignored within clients. */
204#ifdef IN_VBOXSVC
205 /* No locking required, as mfIsHost is const. */
206 if (!mfIsHost) /* Ignore setting the attribute if not host properties. */
207 return S_OK;
208
209 AutoWriteLock alock(this COMMA_LOCKVAL_SRC_POS);
210 m->fExclusiveHwVirt = !!aExclusiveHwVirt;
211 alock.release();
212
213 // VirtualBox::i_saveSettings() needs vbox write lock
214 AutoWriteLock vboxLock(mParent COMMA_LOCKVAL_SRC_POS);
215 return mParent->i_saveSettings();
216#else /* VBoxC */
217 RT_NOREF(aExclusiveHwVirt);
218 return VBOX_E_NOT_SUPPORTED;
219#endif
220}
221
222/* static */
223ULONG PlatformProperties::s_getMaxNetworkAdapters(ChipsetType_T aChipset)
224{
225 AssertReturn(aChipset != ChipsetType_Null, 0);
226
227 /* no need for locking, no state */
228 switch (aChipset)
229 {
230 case ChipsetType_PIIX3: return 8;
231 case ChipsetType_ICH9: return 36;
232 case ChipsetType_ARMv8Virtual: return 64; /** @todo BUGBUG Put a sane value here. Just a wild guess for now. */
233 case ChipsetType_Null:
234 RT_FALL_THROUGH();
235 default:
236 break;
237 }
238
239 AssertMsgFailedReturn(("Chipset type %#x not handled\n", aChipset), 0);
240}
241
242HRESULT PlatformProperties::getMaxNetworkAdapters(ChipsetType_T aChipset, ULONG *aMaxNetworkAdapters)
243{
244 *aMaxNetworkAdapters = PlatformProperties::s_getMaxNetworkAdapters(aChipset);
245
246 return S_OK;
247}
248
249/* static */
250ULONG PlatformProperties::s_getMaxNetworkAdaptersOfType(ChipsetType_T aChipset, NetworkAttachmentType_T aType)
251{
252 /* no need for locking, no state */
253 uint32_t cMaxNetworkAdapters = PlatformProperties::s_getMaxNetworkAdapters(aChipset);
254
255 switch (aType)
256 {
257 case NetworkAttachmentType_NAT:
258 case NetworkAttachmentType_Internal:
259 case NetworkAttachmentType_NATNetwork:
260 /* chipset default is OK */
261 break;
262 case NetworkAttachmentType_Bridged:
263 /* Maybe use current host interface count here? */
264 break;
265 case NetworkAttachmentType_HostOnly:
266 cMaxNetworkAdapters = RT_MIN(cMaxNetworkAdapters, 8);
267 break;
268 default:
269 AssertMsgFailed(("Unhandled attachment type %d\n", aType));
270 }
271
272 return cMaxNetworkAdapters;
273}
274
275HRESULT PlatformProperties::getMaxNetworkAdaptersOfType(ChipsetType_T aChipset, NetworkAttachmentType_T aType,
276 ULONG *aMaxNetworkAdapters)
277{
278 *aMaxNetworkAdapters = PlatformProperties::s_getMaxNetworkAdaptersOfType(aChipset, aType);
279
280 return S_OK;
281}
282
283HRESULT PlatformProperties::getMaxDevicesPerPortForStorageBus(StorageBus_T aBus,
284 ULONG *aMaxDevicesPerPort)
285{
286 /* no need to lock, this is const */
287 switch (aBus)
288 {
289 case StorageBus_SATA:
290 case StorageBus_SCSI:
291 case StorageBus_SAS:
292 case StorageBus_USB:
293 case StorageBus_PCIe:
294 case StorageBus_VirtioSCSI:
295 {
296 /* SATA and both SCSI controllers only support one device per port. */
297 *aMaxDevicesPerPort = 1;
298 break;
299 }
300 case StorageBus_IDE:
301 case StorageBus_Floppy:
302 {
303 /* The IDE and Floppy controllers support 2 devices. One as master
304 * and one as slave (or floppy drive 0 and 1). */
305 *aMaxDevicesPerPort = 2;
306 break;
307 }
308 default:
309 AssertMsgFailed(("Invalid bus type %d\n", aBus));
310 }
311
312 return S_OK;
313}
314
315HRESULT PlatformProperties::getMinPortCountForStorageBus(StorageBus_T aBus,
316 ULONG *aMinPortCount)
317{
318 /* no need to lock, this is const */
319 switch (aBus)
320 {
321 case StorageBus_SATA:
322 case StorageBus_SAS:
323 case StorageBus_PCIe:
324 case StorageBus_VirtioSCSI:
325 {
326 *aMinPortCount = 1;
327 break;
328 }
329 case StorageBus_SCSI:
330 {
331 *aMinPortCount = 16;
332 break;
333 }
334 case StorageBus_IDE:
335 {
336 *aMinPortCount = 2;
337 break;
338 }
339 case StorageBus_Floppy:
340 {
341 *aMinPortCount = 1;
342 break;
343 }
344 case StorageBus_USB:
345 {
346 *aMinPortCount = 8;
347 break;
348 }
349 default:
350 AssertMsgFailed(("Invalid bus type %d\n", aBus));
351 }
352
353 return S_OK;
354}
355
356HRESULT PlatformProperties::getMaxPortCountForStorageBus(StorageBus_T aBus,
357 ULONG *aMaxPortCount)
358{
359 /* no need to lock, this is const */
360 switch (aBus)
361 {
362 case StorageBus_SATA:
363 {
364 *aMaxPortCount = 30;
365 break;
366 }
367 case StorageBus_SCSI:
368 {
369 *aMaxPortCount = 16;
370 break;
371 }
372 case StorageBus_IDE:
373 {
374 *aMaxPortCount = 2;
375 break;
376 }
377 case StorageBus_Floppy:
378 {
379 *aMaxPortCount = 1;
380 break;
381 }
382 case StorageBus_SAS:
383 case StorageBus_PCIe:
384 {
385 *aMaxPortCount = 255;
386 break;
387 }
388 case StorageBus_USB:
389 {
390 *aMaxPortCount = 8;
391 break;
392 }
393 case StorageBus_VirtioSCSI:
394 {
395 *aMaxPortCount = 256;
396 break;
397 }
398 default:
399 AssertMsgFailed(("Invalid bus type %d\n", aBus));
400 }
401
402 return S_OK;
403}
404
405HRESULT PlatformProperties::getMaxInstancesOfStorageBus(ChipsetType_T aChipset,
406 StorageBus_T aBus,
407 ULONG *aMaxInstances)
408{
409 ULONG cCtrs = 0;
410
411 /* no need to lock, this is const */
412 switch (aBus)
413 {
414 case StorageBus_SATA:
415 case StorageBus_SCSI:
416 case StorageBus_SAS:
417 case StorageBus_PCIe:
418 case StorageBus_VirtioSCSI:
419 cCtrs = aChipset == ChipsetType_ICH9 ? 8 : 1;
420 /** @todo r=andy How many we want to define explicitly for ARMv8Virtual? */
421 break;
422 case StorageBus_USB:
423 case StorageBus_IDE:
424 case StorageBus_Floppy:
425 {
426 cCtrs = 1;
427 break;
428 }
429 default:
430 AssertMsgFailed(("Invalid bus type %d\n", aBus));
431 }
432
433 *aMaxInstances = cCtrs;
434
435 return S_OK;
436}
437
438HRESULT PlatformProperties::getDeviceTypesForStorageBus(StorageBus_T aBus,
439 std::vector<DeviceType_T> &aDeviceTypes)
440{
441 aDeviceTypes.resize(0);
442
443 /* no need to lock, this is const */
444 switch (aBus)
445 {
446 case StorageBus_IDE:
447 case StorageBus_SATA:
448 case StorageBus_SCSI:
449 case StorageBus_SAS:
450 case StorageBus_USB:
451 case StorageBus_VirtioSCSI:
452 {
453 aDeviceTypes.resize(2);
454 aDeviceTypes[0] = DeviceType_DVD;
455 aDeviceTypes[1] = DeviceType_HardDisk;
456 break;
457 }
458 case StorageBus_Floppy:
459 {
460 aDeviceTypes.resize(1);
461 aDeviceTypes[0] = DeviceType_Floppy;
462 break;
463 }
464 case StorageBus_PCIe:
465 {
466 aDeviceTypes.resize(1);
467 aDeviceTypes[0] = DeviceType_HardDisk;
468 break;
469 }
470 default:
471 AssertMsgFailed(("Invalid bus type %d\n", aBus));
472 }
473
474 return S_OK;
475}
476
477HRESULT PlatformProperties::getStorageBusForControllerType(StorageControllerType_T aStorageControllerType,
478 StorageBus_T *aStorageBus)
479{
480 /* no need to lock, this is const */
481 switch (aStorageControllerType)
482 {
483 case StorageControllerType_LsiLogic:
484 case StorageControllerType_BusLogic:
485 *aStorageBus = StorageBus_SCSI;
486 break;
487 case StorageControllerType_IntelAhci:
488 *aStorageBus = StorageBus_SATA;
489 break;
490 case StorageControllerType_PIIX3:
491 case StorageControllerType_PIIX4:
492 case StorageControllerType_ICH6:
493 *aStorageBus = StorageBus_IDE;
494 break;
495 case StorageControllerType_I82078:
496 *aStorageBus = StorageBus_Floppy;
497 break;
498 case StorageControllerType_LsiLogicSas:
499 *aStorageBus = StorageBus_SAS;
500 break;
501 case StorageControllerType_USB:
502 *aStorageBus = StorageBus_USB;
503 break;
504 case StorageControllerType_NVMe:
505 *aStorageBus = StorageBus_PCIe;
506 break;
507 case StorageControllerType_VirtioSCSI:
508 *aStorageBus = StorageBus_VirtioSCSI;
509 break;
510 default:
511 return setError(E_FAIL, tr("Invalid storage controller type %d\n"), aStorageBus);
512 }
513
514 return S_OK;
515}
516
517HRESULT PlatformProperties::getStorageControllerTypesForBus(StorageBus_T aStorageBus,
518 std::vector<StorageControllerType_T> &aStorageControllerTypes)
519{
520 aStorageControllerTypes.resize(0);
521
522 /* no need to lock, this is const */
523 switch (aStorageBus)
524 {
525 case StorageBus_IDE:
526 aStorageControllerTypes.resize(3);
527 aStorageControllerTypes[0] = StorageControllerType_PIIX4;
528 aStorageControllerTypes[1] = StorageControllerType_PIIX3;
529 aStorageControllerTypes[2] = StorageControllerType_ICH6;
530 break;
531 case StorageBus_SATA:
532 aStorageControllerTypes.resize(1);
533 aStorageControllerTypes[0] = StorageControllerType_IntelAhci;
534 break;
535 case StorageBus_SCSI:
536 aStorageControllerTypes.resize(2);
537 aStorageControllerTypes[0] = StorageControllerType_LsiLogic;
538 aStorageControllerTypes[1] = StorageControllerType_BusLogic;
539 break;
540 case StorageBus_Floppy:
541 aStorageControllerTypes.resize(1);
542 aStorageControllerTypes[0] = StorageControllerType_I82078;
543 break;
544 case StorageBus_SAS:
545 aStorageControllerTypes.resize(1);
546 aStorageControllerTypes[0] = StorageControllerType_LsiLogicSas;
547 break;
548 case StorageBus_USB:
549 aStorageControllerTypes.resize(1);
550 aStorageControllerTypes[0] = StorageControllerType_USB;
551 break;
552 case StorageBus_PCIe:
553 aStorageControllerTypes.resize(1);
554 aStorageControllerTypes[0] = StorageControllerType_NVMe;
555 break;
556 case StorageBus_VirtioSCSI:
557 aStorageControllerTypes.resize(1);
558 aStorageControllerTypes[0] = StorageControllerType_VirtioSCSI;
559 break;
560 default:
561 return setError(E_FAIL, tr("Invalid storage bus %d\n"), aStorageBus);
562 }
563
564 return S_OK;
565}
566
567HRESULT PlatformProperties::getStorageControllerHotplugCapable(StorageControllerType_T aControllerType,
568 BOOL *aHotplugCapable)
569{
570 switch (aControllerType)
571 {
572 case StorageControllerType_IntelAhci:
573 case StorageControllerType_USB:
574 *aHotplugCapable = true;
575 break;
576 case StorageControllerType_LsiLogic:
577 case StorageControllerType_LsiLogicSas:
578 case StorageControllerType_BusLogic:
579 case StorageControllerType_NVMe:
580 case StorageControllerType_VirtioSCSI:
581 case StorageControllerType_PIIX3:
582 case StorageControllerType_PIIX4:
583 case StorageControllerType_ICH6:
584 case StorageControllerType_I82078:
585 *aHotplugCapable = false;
586 break;
587 default:
588 AssertMsgFailedReturn(("Invalid controller type %d\n", aControllerType), E_FAIL);
589 }
590
591 return S_OK;
592}
593
594HRESULT PlatformProperties::getMaxInstancesOfUSBControllerType(ChipsetType_T aChipset,
595 USBControllerType_T aType,
596 ULONG *aMaxInstances)
597{
598 NOREF(aChipset);
599 ULONG cCtrs = 0;
600
601 /* no need to lock, this is const */
602 switch (aType)
603 {
604 case USBControllerType_OHCI:
605 case USBControllerType_EHCI:
606 case USBControllerType_XHCI:
607 {
608 cCtrs = 1;
609 break;
610 }
611 default:
612 AssertMsgFailed(("Invalid bus type %d\n", aType));
613 }
614
615 *aMaxInstances = cCtrs;
616
617 return S_OK;
618}
619
620HRESULT PlatformProperties::getSupportedParavirtProviders(std::vector<ParavirtProvider_T> &aSupportedParavirtProviders)
621{
622 static const ParavirtProvider_T aParavirtProviders[] =
623 {
624 ParavirtProvider_None,
625 ParavirtProvider_Default,
626 ParavirtProvider_Legacy,
627 ParavirtProvider_Minimal,
628 ParavirtProvider_HyperV,
629 ParavirtProvider_KVM,
630 };
631 aSupportedParavirtProviders.assign(aParavirtProviders,
632 aParavirtProviders + RT_ELEMENTS(aParavirtProviders));
633 return S_OK;
634}
635
636HRESULT PlatformProperties::getSupportedFirmwareTypes(std::vector<FirmwareType_T> &aSupportedFirmwareTypes)
637{
638 switch (mPlatformArchitecture)
639 {
640 case PlatformArchitecture_x86:
641 {
642 static const FirmwareType_T aFirmwareTypes[] =
643 {
644 FirmwareType_BIOS,
645 FirmwareType_EFI,
646 FirmwareType_EFI32,
647 FirmwareType_EFI64,
648 FirmwareType_EFIDUAL
649 };
650 aSupportedFirmwareTypes.assign(aFirmwareTypes,
651 aFirmwareTypes + RT_ELEMENTS(aFirmwareTypes));
652 break;
653 }
654
655 case PlatformArchitecture_ARM:
656 {
657 static const FirmwareType_T aFirmwareTypes[] =
658 {
659 FirmwareType_EFI,
660 FirmwareType_EFI32,
661 FirmwareType_EFI64,
662 FirmwareType_EFIDUAL
663 };
664 aSupportedFirmwareTypes.assign(aFirmwareTypes,
665 aFirmwareTypes + RT_ELEMENTS(aFirmwareTypes));
666 break;
667 }
668
669 default:
670 AssertFailedStmt(aSupportedFirmwareTypes.clear());
671 break;
672 }
673
674 return S_OK;
675}
676
677HRESULT PlatformProperties::getSupportedGraphicsControllerTypes(std::vector<GraphicsControllerType_T> &aSupportedGraphicsControllerTypes)
678{
679 switch (mPlatformArchitecture)
680 {
681 case PlatformArchitecture_x86:
682 {
683 static const GraphicsControllerType_T aGraphicsControllerTypes[] =
684 {
685 GraphicsControllerType_Null,
686 GraphicsControllerType_VBoxVGA,
687 GraphicsControllerType_VBoxSVGA
688#ifdef VBOX_WITH_VMSVGA
689 , GraphicsControllerType_VMSVGA
690#endif
691 };
692 aSupportedGraphicsControllerTypes.assign(aGraphicsControllerTypes + 1 /* Don't include _Null */,
693 aGraphicsControllerTypes + RT_ELEMENTS(aGraphicsControllerTypes));
694 break;
695 }
696
697 case PlatformArchitecture_ARM:
698 {
699 static const GraphicsControllerType_T aGraphicsControllerTypes[] =
700 {
701 GraphicsControllerType_Null,
702 GraphicsControllerType_QemuRamFB
703#ifdef VBOX_WITH_VMSVGA
704 , GraphicsControllerType_VMSVGA
705#endif
706 };
707 aSupportedGraphicsControllerTypes.assign(aGraphicsControllerTypes + 1 /* Don't include _Null */,
708 aGraphicsControllerTypes + RT_ELEMENTS(aGraphicsControllerTypes));
709 break;
710 }
711
712 default:
713 AssertFailedStmt(aSupportedGraphicsControllerTypes.clear());
714 break;
715 }
716
717 return S_OK;
718}
719
720HRESULT PlatformProperties::getSupportedNetworkAdapterTypes(std::vector<NetworkAdapterType_T> &aSupportedNetworkAdapterTypes)
721{
722 switch (mPlatformArchitecture)
723 {
724 case PlatformArchitecture_x86:
725 {
726 static const NetworkAdapterType_T aNetworkAdapterTypes[] =
727 {
728 NetworkAdapterType_Null,
729 NetworkAdapterType_Am79C970A,
730 NetworkAdapterType_Am79C973
731#ifdef VBOX_WITH_E1000
732 , NetworkAdapterType_I82540EM
733 , NetworkAdapterType_I82543GC
734 , NetworkAdapterType_I82545EM
735#endif
736#ifdef VBOX_WITH_VIRTIO
737 , NetworkAdapterType_Virtio
738#endif
739 };
740 aSupportedNetworkAdapterTypes.assign(aNetworkAdapterTypes + 1 /* Don't include _Null */,
741 aNetworkAdapterTypes + RT_ELEMENTS(aNetworkAdapterTypes));
742 break;
743 }
744
745 case PlatformArchitecture_ARM:
746 {
747 static const NetworkAdapterType_T aNetworkAdapterTypes[] =
748 {
749 NetworkAdapterType_Null
750#ifdef VBOX_WITH_E1000
751 , NetworkAdapterType_I82540EM
752 , NetworkAdapterType_I82543GC
753 , NetworkAdapterType_I82545EM
754#endif
755#ifdef VBOX_WITH_VIRTIO
756 , NetworkAdapterType_Virtio
757#endif
758 };
759 aSupportedNetworkAdapterTypes.assign(aNetworkAdapterTypes + 1 /* Don't include _Null */,
760 aNetworkAdapterTypes + RT_ELEMENTS(aNetworkAdapterTypes));
761 break;
762 }
763
764 default:
765 AssertFailedStmt(aSupportedNetworkAdapterTypes.clear());
766 break;
767 }
768
769 return S_OK;
770}
771
772HRESULT PlatformProperties::getSupportedUartTypes(std::vector<UartType_T> &aSupportedUartTypes)
773{
774 static const UartType_T aUartTypes[] =
775 {
776 UartType_U16450,
777 UartType_U16550A,
778 UartType_U16750
779 };
780 aSupportedUartTypes.assign(aUartTypes,
781 aUartTypes + RT_ELEMENTS(aUartTypes));
782 return S_OK;
783}
784
785HRESULT PlatformProperties::getSupportedUSBControllerTypes(std::vector<USBControllerType_T> &aSupportedUSBControllerTypes)
786{
787 static const USBControllerType_T aUSBControllerTypes[] =
788 {
789 USBControllerType_OHCI,
790 USBControllerType_EHCI,
791 USBControllerType_XHCI
792 };
793 aSupportedUSBControllerTypes.assign(aUSBControllerTypes,
794 aUSBControllerTypes + RT_ELEMENTS(aUSBControllerTypes));
795 return S_OK;
796}
797
798HRESULT PlatformProperties::getSupportedAudioControllerTypes(std::vector<AudioControllerType_T> &aSupportedAudioControllerTypes)
799{
800 switch (mPlatformArchitecture)
801 {
802 case PlatformArchitecture_x86:
803 {
804 static const AudioControllerType_T aAudioControllerTypes[] =
805 {
806 AudioControllerType_AC97,
807 AudioControllerType_SB16,
808 AudioControllerType_HDA,
809 };
810 aSupportedAudioControllerTypes.assign(aAudioControllerTypes,
811 aAudioControllerTypes + RT_ELEMENTS(aAudioControllerTypes));
812 break;
813 }
814
815 case PlatformArchitecture_ARM:
816 {
817 /** @todo None yet / needs to be tested first. */
818 aSupportedAudioControllerTypes.clear();
819 break;
820 }
821
822 default:
823 AssertFailedStmt(aSupportedAudioControllerTypes.clear());
824 break;
825 }
826
827
828 return S_OK;
829}
830
831HRESULT PlatformProperties::getSupportedStorageBuses(std::vector<StorageBus_T> &aSupportedStorageBuses)
832{
833 switch (mPlatformArchitecture)
834 {
835 case PlatformArchitecture_x86:
836 {
837 static const StorageBus_T aStorageBuses[] =
838 {
839 StorageBus_SATA,
840 StorageBus_IDE,
841 StorageBus_SCSI,
842 StorageBus_Floppy,
843 StorageBus_SAS,
844 StorageBus_USB,
845 StorageBus_PCIe,
846 StorageBus_VirtioSCSI,
847 };
848 aSupportedStorageBuses.assign(aStorageBuses,
849 aStorageBuses + RT_ELEMENTS(aStorageBuses));
850 break;
851 }
852
853 case PlatformArchitecture_ARM:
854 {
855 static const StorageBus_T aStorageBuses[] =
856 {
857 StorageBus_VirtioSCSI
858 };
859 aSupportedStorageBuses.assign(aStorageBuses,
860 aStorageBuses + RT_ELEMENTS(aStorageBuses));
861 break;
862 }
863
864 default:
865 AssertFailedStmt(aSupportedStorageBuses.clear());
866 break;
867 }
868
869 return S_OK;
870}
871
872HRESULT PlatformProperties::getSupportedStorageControllerTypes(std::vector<StorageControllerType_T> &aSupportedStorageControllerTypes)
873{
874 switch (mPlatformArchitecture)
875 {
876 case PlatformArchitecture_x86:
877 {
878 static const StorageControllerType_T aStorageControllerTypes[] =
879 {
880 StorageControllerType_IntelAhci,
881 StorageControllerType_PIIX4,
882 StorageControllerType_PIIX3,
883 StorageControllerType_ICH6,
884 StorageControllerType_LsiLogic,
885 StorageControllerType_BusLogic,
886 StorageControllerType_I82078,
887 StorageControllerType_LsiLogicSas,
888 StorageControllerType_USB,
889 StorageControllerType_NVMe,
890 StorageControllerType_VirtioSCSI
891 };
892 aSupportedStorageControllerTypes.assign(aStorageControllerTypes,
893 aStorageControllerTypes + RT_ELEMENTS(aStorageControllerTypes));
894 break;
895 }
896
897 case PlatformArchitecture_ARM:
898 {
899 static const StorageControllerType_T aStorageControllerTypes[] =
900 {
901 StorageControllerType_VirtioSCSI
902 };
903 aSupportedStorageControllerTypes.assign(aStorageControllerTypes,
904 aStorageControllerTypes + RT_ELEMENTS(aStorageControllerTypes));
905 break;
906 }
907
908 default:
909 AssertFailedStmt(aSupportedStorageControllerTypes.clear());
910 break;
911 }
912
913 return S_OK;
914}
915
916HRESULT PlatformProperties::getSupportedChipsetTypes(std::vector<ChipsetType_T> &aSupportedChipsetTypes)
917{
918 switch (mPlatformArchitecture)
919 {
920 case PlatformArchitecture_x86:
921 {
922 static const ChipsetType_T aChipsetTypes[] =
923 {
924 ChipsetType_PIIX3,
925 ChipsetType_ICH9
926 };
927 aSupportedChipsetTypes.assign(aChipsetTypes,
928 aChipsetTypes + RT_ELEMENTS(aChipsetTypes));
929 break;
930 }
931
932 case PlatformArchitecture_ARM:
933 {
934 static const ChipsetType_T aChipsetTypes[] =
935 {
936 ChipsetType_ARMv8Virtual
937 };
938 aSupportedChipsetTypes.assign(aChipsetTypes,
939 aChipsetTypes + RT_ELEMENTS(aChipsetTypes));
940 break;
941 }
942
943 default:
944 AssertFailedStmt(aSupportedChipsetTypes.clear());
945 break;
946 }
947
948 return S_OK;
949}
950
951HRESULT PlatformProperties::getSupportedIommuTypes(std::vector<IommuType_T> &aSupportedIommuTypes)
952{
953 switch (mPlatformArchitecture)
954 {
955 case PlatformArchitecture_x86:
956 {
957 static const IommuType_T aIommuTypes[] =
958 {
959 IommuType_None,
960 IommuType_Automatic,
961 IommuType_AMD
962 /** @todo Add Intel when it's supported. */
963 };
964 aSupportedIommuTypes.assign(aIommuTypes,
965 aIommuTypes + RT_ELEMENTS(aIommuTypes));
966 break;
967 }
968
969 case PlatformArchitecture_ARM:
970 {
971 static const IommuType_T aIommuTypes[] =
972 {
973 IommuType_None
974 };
975 aSupportedIommuTypes.assign(aIommuTypes,
976 aIommuTypes + RT_ELEMENTS(aIommuTypes));
977 break;
978 }
979
980 default:
981 AssertFailedStmt(aSupportedIommuTypes.clear());
982 break;
983 }
984
985 return S_OK;
986}
987
988HRESULT PlatformProperties::getSupportedTpmTypes(std::vector<TpmType_T> &aSupportedTpmTypes)
989{
990 switch (mPlatformArchitecture)
991 {
992 case PlatformArchitecture_x86:
993 {
994 static const TpmType_T aTpmTypes[] =
995 {
996 TpmType_None,
997 TpmType_v1_2,
998 TpmType_v2_0
999 };
1000 aSupportedTpmTypes.assign(aTpmTypes,
1001 aTpmTypes + RT_ELEMENTS(aTpmTypes));
1002 break;
1003 }
1004
1005 case PlatformArchitecture_ARM:
1006 {
1007 static const TpmType_T aTpmTypes[] =
1008 {
1009 TpmType_None
1010 };
1011 aSupportedTpmTypes.assign(aTpmTypes,
1012 aTpmTypes + RT_ELEMENTS(aTpmTypes));
1013 break;
1014 }
1015
1016 default:
1017 AssertFailedStmt(aSupportedTpmTypes.clear());
1018 break;
1019 }
1020
1021 return S_OK;
1022}
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