ConsoleImplConfigArmV8.cpp@ 106457

Last change on this file since 106457 was 106388, checked in by vboxsync, 7 months ago
Main: Enable the TPM if configured for an ARM VM, bugref:10777
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 50.1 KB

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1	/* $Id: ConsoleImplConfigArmV8.cpp 106388 2024-10-16 14:16:39Z vboxsync $ */
2	/** @file
3	* VBox Console COM Class implementation - VM Configuration Bits for ARMv8.
4	*/
5
6	/*
7	* Copyright (C) 2023-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_MAIN_CONSOLE
33	#include "LoggingNew.h"
34
35	#include "ConsoleImpl.h"
36	#include "ResourceStoreImpl.h"
37	#include "Global.h"
38	#include "VMMDev.h"
39
40	// generated header
41	#include "SchemaDefs.h"
42
43	#include "AutoCaller.h"
44
45	#include <iprt/buildconfig.h>
46	#include <iprt/ctype.h>
47	#include <iprt/dir.h>
48	#include <iprt/fdt.h>
49	#include <iprt/file.h>
50	#include <iprt/param.h>
51	#include <iprt/path.h>
52	#include <iprt/string.h>
53	#include <iprt/system.h>
54	#if 0 /* enable to play with lots of memory. */
55	# include <iprt/env.h>
56	#endif
57	#include <iprt/stream.h>
58
59	#include <iprt/formats/arm-psci.h>
60
61	#include <VBox/vmm/vmmr3vtable.h>
62	#include <VBox/vmm/vmapi.h>
63	#include <VBox/err.h>
64	#include <VBox/param.h>
65	#include <VBox/version.h>
66	#include <VBox/platforms/vbox-armv8.h>
67
68	#include "BusAssignmentManager.h"
69	#include "ResourceAssignmentManager.h"
70	#include "SystemTableBuilder.h"
71	#ifdef VBOX_WITH_EXTPACK
72	# include "ExtPackManagerImpl.h"
73	#endif
74
75
76	/*********************************************************************************************************************************
77	* Internal Functions *
78	*********************************************************************************************************************************/
79
80	/* Darwin compile kludge */
81	#undef PVM
82
83	#ifdef VBOX_WITH_VIRT_ARMV8
84	/**
85	* Worker for configConstructor.
86	*
87	* @return VBox status code.
88	* @param pUVM The user mode VM handle.
89	* @param pVM The cross context VM handle.
90	* @param pVMM The VMM vtable.
91	* @param pAlock The automatic lock instance. This is for when we have
92	* to leave it in order to avoid deadlocks (ext packs and
93	* more).
94	*/
95	int Console::i_configConstructorArmV8(PUVM pUVM, PVM pVM, PCVMMR3VTABLE pVMM, AutoWriteLock *pAlock)
96	{
97	RT_NOREF(pVM /* when everything is disabled */);
98	ComPtr<IMachine> pMachine = i_machine();
99
100	HRESULT hrc;
101	Utf8Str strTmp;
102	Bstr bstr;
103
104	RTFDT hFdt = NIL_RTFDT;
105	int vrc = RTFdtCreateEmpty(&hFdt);
106	AssertRCReturn(vrc, vrc);
107
108	#define H() AssertLogRelMsgReturnStmt(!FAILED(hrc), ("hrc=%Rhrc\n", hrc), RTFdtDestroy(hFdt), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR)
109	#define VRC() AssertLogRelMsgReturnStmt(RT_SUCCESS(vrc), ("vrc=%Rrc\n", vrc), RTFdtDestroy(hFdt), vrc)
110
111	/*
112	* Get necessary objects and frequently used parameters.
113	*/
114	ComPtr<IVirtualBox> virtualBox;
115	hrc = pMachine->COMGETTER(Parent)(virtualBox.asOutParam()); H();
116
117	ComPtr<IHost> host;
118	hrc = virtualBox->COMGETTER(Host)(host.asOutParam()); H();
119
120	PlatformArchitecture_T platformArchHost;
121	hrc = host->COMGETTER(Architecture)(&platformArchHost); H();
122
123	ComPtr<ISystemProperties> systemProperties;
124	hrc = virtualBox->COMGETTER(SystemProperties)(systemProperties.asOutParam()); H();
125
126	ComPtr<IFirmwareSettings> firmwareSettings;
127	hrc = pMachine->COMGETTER(FirmwareSettings)(firmwareSettings.asOutParam()); H();
128
129	ComPtr<INvramStore> nvramStore;
130	hrc = pMachine->COMGETTER(NonVolatileStore)(nvramStore.asOutParam()); H();
131
132	hrc = pMachine->COMGETTER(HardwareUUID)(bstr.asOutParam()); H();
133	RTUUID HardwareUuid;
134	vrc = RTUuidFromUtf16(&HardwareUuid, bstr.raw());
135	AssertRCReturn(vrc, vrc);
136
137	ULONG cRamMBs;
138	hrc = pMachine->COMGETTER(MemorySize)(&cRamMBs); H();
139	uint64_t const cbRam = cRamMBs * (uint64_t)_1M;
140
141	ComPtr<IPlatform> platform;
142	hrc = pMachine->COMGETTER(Platform)(platform.asOutParam()); H();
143
144	/* Note: Should be guarded by VBOX_WITH_VIRT_ARMV8, but we check this anyway here. */
145	#if 1 /* For now we only support running ARM VMs on ARM hosts. */
146	PlatformArchitecture_T platformArchMachine;
147	hrc = platform->COMGETTER(Architecture)(&platformArchMachine); H();
148	if (platformArchMachine != platformArchHost)
149	return pVMM->pfnVMR3SetError(pUVM, VERR_PLATFORM_ARCH_NOT_SUPPORTED, RT_SRC_POS,
150	N_("VM platform architecture (%s) not supported on this host (%s)."),
151	Global::stringifyPlatformArchitecture(platformArchMachine),
152	Global::stringifyPlatformArchitecture(platformArchHost));
153	#endif
154
155	/* Get the ARM platform object. */
156	ComPtr<IPlatformARM> platformARM;
157	hrc = platform->COMGETTER(ARM)(platformARM.asOutParam()); H();
158
159	ComPtr<IPlatformProperties> pPlatformProperties;
160	hrc = platform->COMGETTER(Properties)(pPlatformProperties.asOutParam()); H();
161
162	ChipsetType_T chipsetType;
163	hrc = platform->COMGETTER(ChipsetType)(&chipsetType); H();
164
165	ULONG cCpus = 1;
166	hrc = pMachine->COMGETTER(CPUCount)(&cCpus); H();
167	Assert(cCpus);
168
169	ULONG ulCpuExecutionCap = 100;
170	hrc = pMachine->COMGETTER(CPUExecutionCap)(&ulCpuExecutionCap); H();
171
172	VMExecutionEngine_T enmExecEngine = VMExecutionEngine_NotSet;
173	hrc = pMachine->COMGETTER(VMExecutionEngine)(&enmExecEngine); H();
174
175	if ( enmExecEngine != VMExecutionEngine_Default
176	&& enmExecEngine != VMExecutionEngine_NativeApi)
177	{
178	return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
179	N_("The ARM backend doesn't support any other execution engine than 'default' or 'native-api' right now."));
180	}
181
182	LogRel(("Guest architecture: ARM\n"));
183
184	Bstr osTypeId;
185	hrc = pMachine->COMGETTER(OSTypeId)(osTypeId.asOutParam()); H();
186	LogRel(("Guest OS type: '%s'\n", Utf8Str(osTypeId).c_str()));
187
188	BusAssignmentManager *pBusMgr = mBusMgr = BusAssignmentManager::createInstance(pVMM, chipsetType, IommuType_None);
189	ResourceAssignmentManager *pResMgr = ResourceAssignmentManager::createInstance(pVMM, chipsetType, IommuType_None,
190	RT_MAX(_1G + cbRam, _4G), /GCPhysMmio/
191	_1G, /GCPhysRam/
192	VBOXPLATFORMARMV8_PHYS_ADDR + _1M, /GCPhysMmio32Start/
193	_1G - (VBOXPLATFORMARMV8_PHYS_ADDR + _1M), /cbMmio32/
194	32 /cInterrupts/);
195	SystemTableBuilder *pSysTblsBldAcpi = NULL;
196
197	/*
198	* ACPI
199	*/
200	BOOL fACPI;
201	hrc = firmwareSettings->COMGETTER(ACPIEnabled)(&fACPI); H();
202	if (fACPI)
203	pSysTblsBldAcpi = SystemTableBuilder::createInstance(kSystemTableType_Acpi);
204
205
206	/*
207	* Get root node first.
208	* This is the only node in the tree.
209	*/
210	PCFGMNODE pRoot = pVMM->pfnCFGMR3GetRootU(pUVM);
211	Assert(pRoot);
212
213	RTGCPHYS GCPhysRam = NIL_RTGCPHYS;
214
215	// catching throws from InsertConfigString and friends.
216	try
217	{
218
219	/*
220	* Set the root (and VMM) level values.
221	*/
222	hrc = pMachine->COMGETTER(Name)(bstr.asOutParam()); H();
223	InsertConfigString(pRoot, "Name", bstr);
224	InsertConfigBytes(pRoot, "UUID", &HardwareUuid, sizeof(HardwareUuid));
225	InsertConfigInteger(pRoot, "NumCPUs", cCpus);
226	InsertConfigInteger(pRoot, "CpuExecutionCap", ulCpuExecutionCap);
227	InsertConfigInteger(pRoot, "TimerMillies", 10);
228
229	/*
230	* NEM
231	*/
232	PCFGMNODE pNEM;
233	InsertConfigNode(pRoot, "NEM", &pNEM);
234
235	uint32_t idPHandleIntCtrl = RTFdtPHandleAllocate(hFdt);
236	Assert(idPHandleIntCtrl != UINT32_MAX);
237	uint32_t idPHandleIntCtrlMsi = RTFdtPHandleAllocate(hFdt);
238	Assert(idPHandleIntCtrlMsi != UINT32_MAX); RT_NOREF(idPHandleIntCtrlMsi);
239	uint32_t idPHandleAbpPClk = RTFdtPHandleAllocate(hFdt);
240	Assert(idPHandleAbpPClk != UINT32_MAX);
241	uint32_t idPHandleGpio = RTFdtPHandleAllocate(hFdt);
242	Assert(idPHandleGpio != UINT32_MAX);
243
244	uint32_t aidPHandleCpus[VMM_MAX_CPU_COUNT];
245	for (uint32_t i = 0; i < cCpus; i++)
246	{
247	aidPHandleCpus[i] = RTFdtPHandleAllocate(hFdt);
248	Assert(aidPHandleCpus[i] != UINT32_MAX);
249	}
250
251	vrc = RTFdtNodePropertyAddU32( hFdt, "interrupt-parent", idPHandleIntCtrl); VRC();
252	vrc = RTFdtNodePropertyAddString(hFdt, "model", "linux,dummy-virt"); VRC();
253	vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC();
254	vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 2); VRC();
255	vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "linux,dummy-virt"); VRC();
256
257	/* Configure the Power State Coordination Interface. */
258	vrc = RTFdtNodeAdd(hFdt, "psci"); VRC();
259	vrc = RTFdtNodePropertyAddU32( hFdt, "migrate", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_MIGRATE)); VRC();
260	vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_on", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_CPU_ON)); VRC();
261	vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_off", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_CPU_OFF)); VRC();
262	vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_suspend", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_CPU_SUSPEND)); VRC();
263	vrc = RTFdtNodePropertyAddString(hFdt, "method", "hvc"); VRC();
264	vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 3,
265	"arm,psci-1.0", "arm,psci-0.2", "arm,psci"); VRC();
266	vrc = RTFdtNodeFinalize(hFdt); VRC();
267
268	/* Configure the timer and clock. */
269	InsertConfigInteger(pNEM, "VTimerInterrupt", 0xb);
270	vrc = RTFdtNodeAdd(hFdt, "timer"); VRC();
271	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 12,
272	0x01, 0x0d, 0x104,
273	0x01, 0x0e, 0x104,
274	0x01, 0x0b, 0x104,
275	0x01, 0x0a, 0x104); VRC();
276	vrc = RTFdtNodePropertyAddEmpty( hFdt, "always-on"); VRC();
277	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,armv8-timer"); VRC();
278	vrc = RTFdtNodeFinalize(hFdt);
279
280	vrc = RTFdtNodeAdd(hFdt, "apb-clk"); VRC();
281	vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleAbpPClk); VRC();
282	vrc = RTFdtNodePropertyAddString( hFdt, "clock-output-names", "clk24mhz"); VRC();
283	vrc = RTFdtNodePropertyAddU32( hFdt, "clock-frequency", 24 * 1000 * 1000); VRC();
284	vrc = RTFdtNodePropertyAddU32( hFdt, "#clock-cells", 0); VRC();
285	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "fixed-clock"); VRC();
286	vrc = RTFdtNodeFinalize(hFdt);
287
288	if (pSysTblsBldAcpi)
289	{
290	vrc = pSysTblsBldAcpi->configureClock();
291	VRC();
292	}
293
294	/*
295	* MM values.
296	*/
297	PCFGMNODE pMM;
298	InsertConfigNode(pRoot, "MM", &pMM);
299
300	/*
301	* Memory setup.
302	*/
303	PCFGMNODE pMem = NULL;
304	InsertConfigNode(pMM, "MemRegions", &pMem);
305
306	hrc = pResMgr->assignRamRegion("Conventional", cbRam, &GCPhysRam); H();
307
308	PCFGMNODE pMemRegion = NULL;
309	InsertConfigNode(pMem, "Conventional", &pMemRegion);
310	InsertConfigInteger(pMemRegion, "GCPhysStart", GCPhysRam);
311	InsertConfigInteger(pMemRegion, "Size", cbRam);
312
313	vrc = RTFdtNodeAddF(hFdt, "memory@%RGp", GCPhysRam); VRC();
314	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysRam, cbRam); VRC();
315	vrc = RTFdtNodePropertyAddString( hFdt, "device_type", "memory"); VRC();
316	vrc = RTFdtNodeFinalize(hFdt); VRC();
317
318	if (pSysTblsBldAcpi)
319	{
320	vrc = pSysTblsBldAcpi->addMemory(GCPhysRam, cbRam);
321	VRC();
322	}
323
324	/* Configure the CPUs in the system, only one socket and cluster at the moment. */
325	vrc = RTFdtNodeAdd(hFdt, "cpus"); VRC();
326	vrc = RTFdtNodePropertyAddU32(hFdt, "#size-cells", 0); VRC();
327	vrc = RTFdtNodePropertyAddU32(hFdt, "#address-cells", 1); VRC();
328
329	vrc = RTFdtNodeAdd(hFdt, "socket0"); VRC();
330	vrc = RTFdtNodeAdd(hFdt, "cluster0"); VRC();
331
332	for (uint32_t i = 0; i < cCpus; i++)
333	{
334	vrc = RTFdtNodeAddF(hFdt, "core%u", i); VRC();
335	vrc = RTFdtNodePropertyAddU32(hFdt, "cpu", aidPHandleCpus[i]); VRC();
336	vrc = RTFdtNodeFinalize(hFdt); VRC();
337	}
338
339	vrc = RTFdtNodeFinalize(hFdt); VRC();
340	vrc = RTFdtNodeFinalize(hFdt); VRC();
341
342	for (uint32_t i = 0; i < cCpus; i++)
343	{
344	vrc = RTFdtNodeAddF(hFdt, "cpu@%u", i); VRC();
345	vrc = RTFdtNodePropertyAddU32(hFdt, "phandle", aidPHandleCpus[i]); VRC();
346	vrc = RTFdtNodePropertyAddU32(hFdt, "reg", i); VRC();
347	vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "arm,cortex-a15"); VRC();
348	vrc = RTFdtNodePropertyAddString(hFdt, "device_type", "cpu"); VRC();
349	if (cCpus > 1)
350	{
351	vrc = RTFdtNodePropertyAddString(hFdt, "enable-method", "psci"); VRC();
352	}
353	vrc = RTFdtNodeFinalize(hFdt); VRC();
354
355	if (pSysTblsBldAcpi)
356	{
357	vrc = pSysTblsBldAcpi->addCpu(i);
358	VRC();
359	}
360	}
361
362	vrc = RTFdtNodeFinalize(hFdt); VRC();
363
364
365	/*
366	* CPUM values.
367	*/
368	PCFGMNODE pCpum;
369	InsertConfigNode(pRoot, "CPUM", &pCpum);
370
371	/* Nested Virtualization. */
372	BOOL fNestedHWVirt = FALSE;
373	hrc = platformARM->GetCPUProperty(CPUPropertyTypeARM_HWVirt, &fNestedHWVirt); H();
374	InsertConfigInteger(pCpum, "NestedHWVirt", fNestedHWVirt ? true : false);
375
376
377	/*
378	* PDM config.
379	* Load drivers in VBoxC.[so\|dll]
380	*/
381	vrc = i_configPdm(pMachine, pVMM, pUVM, pRoot); VRC();
382
383
384	/*
385	* VGA.
386	*/
387	ComPtr<IGraphicsAdapter> pGraphicsAdapter;
388	hrc = pMachine->COMGETTER(GraphicsAdapter)(pGraphicsAdapter.asOutParam()); H();
389	GraphicsControllerType_T enmGraphicsController;
390	hrc = pGraphicsAdapter->COMGETTER(GraphicsControllerType)(&enmGraphicsController); H();
391
392	/*
393	* Devices
394	*/
395	PCFGMNODE pDevices = NULL; /* /Devices */
396	PCFGMNODE pDev = NULL; /* /Devices/Dev/ */
397	PCFGMNODE pInst = NULL; /* /Devices/Dev/0/ */
398	PCFGMNODE pCfg = NULL; /* /Devices/Dev/.../Config/ */
399	PCFGMNODE pLunL0 = NULL; /* /Devices/Dev/0/LUN#0/ */
400	PCFGMNODE pLunL1 = NULL; /* /Devices/Dev/0/LUN#0/AttachedDriver/ */
401
402	InsertConfigNode(pRoot, "Devices", &pDevices);
403
404	InsertConfigNode(pDevices, "pci-generic-ecam-bridge", NULL);
405
406	InsertConfigNode(pDevices, "platform", &pDev);
407	InsertConfigNode(pDev, "0", &pInst);
408	InsertConfigNode(pInst, "Config", &pCfg);
409	InsertConfigNode(pInst, "LUN#0", &pLunL0);
410	InsertConfigString(pLunL0, "Driver", "ResourceStore");
411
412	/* Add the resources. */
413	PCFGMNODE pResources = NULL; /* /Devices/platform/Config/Resources */
414	PCFGMNODE pRes = NULL; /* /Devices/platform/Config/Resources/<Resource> */
415	InsertConfigString(pCfg, "ResourceNamespace", "resources");
416	InsertConfigNode(pCfg, "Resources", &pResources);
417	InsertConfigNode(pResources, "EfiRom", &pRes);
418	InsertConfigInteger(pRes, "RegisterAsRom", 1);
419	InsertConfigInteger(pRes, "GCPhysLoadAddress", 0);
420
421	/** @todo r=aeichner 32-bit guests and query the firmware type from VBoxSVC. */
422	/*
423	* Firmware.
424	*/
425	FirmwareType_T eFwType = FirmwareType_EFI64;
426	#ifdef VBOX_WITH_EFI_IN_DD2
427	const char *pszEfiRomFile = eFwType == FirmwareType_EFIDUAL ? "<INVALID>"
428	: eFwType == FirmwareType_EFI32 ? "VBoxEFIAArch32.fd"
429	: "VBoxEFIAArch64.fd";
430	const char *pszKey = "ResourceId";
431	#else
432	Utf8Str efiRomFile;
433	vrc = findEfiRom(virtualBox, PlatformArchitecture_ARM, eFwType, &efiRomFile);
434	AssertRCReturn(vrc, vrc);
435	const char *pszEfiRomFile = efiRomFile.c_str();
436	const char *pszKey = "Filename";
437	#endif
438	InsertConfigString(pRes, pszKey, pszEfiRomFile);
439
440	InsertConfigNode(pResources, "ArmV8Desc", &pRes);
441	InsertConfigInteger(pRes, "RegisterAsRom", 1);
442	InsertConfigInteger(pRes, "GCPhysLoadAddress", VBOXPLATFORMARMV8_PHYS_ADDR);
443	InsertConfigString(pRes, "ResourceId", "VBoxArmV8Desc");
444
445	/*
446	* Configure the interrupt controller.
447	*/
448	RTGCPHYS GCPhysIntcDist;
449	RTGCPHYS GCPhysIntcReDist;
450	RTGCPHYS cbMmioIntcDist;
451	RTGCPHYS cbMmioIntcReDist;
452
453	/* Each vCPU needs on re-distributor, this would allow for up to 256 vCPUs in the future. */
454	hrc = pResMgr->assignMmioRegion("gic", 256 * _64K, &GCPhysIntcReDist, &cbMmioIntcReDist); H();
455	hrc = pResMgr->assignMmioRegion("gic", _64K, &GCPhysIntcDist, &cbMmioIntcDist); H();
456
457	#ifndef RT_OS_LINUX
458	InsertConfigNode(pDevices, "gic", &pDev);
459	#else
460	/* On Linux we default to the KVM in-kernel GIC for now. */
461	InsertConfigNode(pDevices, "gic-nem", &pDev);
462	#endif
463	InsertConfigNode(pDev, "0", &pInst);
464	InsertConfigInteger(pInst, "Trusted", 1);
465	InsertConfigNode(pInst, "Config", &pCfg);
466	InsertConfigInteger(pCfg, "DistributorMmioBase", GCPhysIntcDist);
467	InsertConfigInteger(pCfg, "RedistributorMmioBase", GCPhysIntcReDist);
468
469	vrc = RTFdtNodeAddF(hFdt, "intc@%RGp", GCPhysIntcDist); VRC();
470	vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleIntCtrl); VRC();
471	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 4,
472	GCPhysIntcDist, cbMmioIntcDist, /* Distributor */
473	GCPhysIntcReDist, cbMmioIntcReDist); /* Re-Distributor */ VRC();
474	vrc = RTFdtNodePropertyAddU32( hFdt, "#redistributor-regions", 1); VRC();
475	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,gic-v3"); VRC();
476	vrc = RTFdtNodePropertyAddEmpty( hFdt, "ranges"); VRC();
477	vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC();
478	vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 2); VRC();
479	vrc = RTFdtNodePropertyAddEmpty( hFdt, "interrupt-controller"); VRC();
480	vrc = RTFdtNodePropertyAddU32( hFdt, "#interrupt-cells", 3); VRC();
481
482	if (pSysTblsBldAcpi)
483	{
484	vrc = pSysTblsBldAcpi->configureGic(cCpus, GCPhysIntcDist, cbMmioIntcDist,
485	GCPhysIntcReDist, cbMmioIntcReDist);
486	VRC();
487	}
488
489	#if 0
490	vrc = RTFdtNodeAddF(hFdt, "its@%RX32", 0x08080000); VRC();
491	vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleIntCtrlMsi); VRC();
492	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 4, 0, 0x08080000, 0, 0x20000); VRC();
493	vrc = RTFdtNodePropertyAddU32( hFdt, "#msi-cells", 1); VRC();
494	vrc = RTFdtNodePropertyAddEmpty( hFdt, "msi-controller"); VRC();
495	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,gic-v3-its"); VRC();
496	vrc = RTFdtNodeFinalize(hFdt); VRC();
497	#endif
498
499	vrc = RTFdtNodeFinalize(hFdt); VRC();
500
501	RTGCPHYS GCPhysMmioStart;
502	RTGCPHYS cbMmio;
503	if (enmGraphicsController == GraphicsControllerType_QemuRamFB)
504	{
505	hrc = pResMgr->assignMmioRegion("qemu-fw-cfg", _4K, &GCPhysMmioStart, &cbMmio); H();
506
507	InsertConfigNode(pDevices, "qemu-fw-cfg", &pDev);
508	InsertConfigNode(pDev, "0", &pInst);
509	InsertConfigNode(pInst, "Config", &pCfg);
510	InsertConfigInteger(pCfg, "MmioSize", cbMmio);
511	InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
512	InsertConfigInteger(pCfg, "DmaEnabled", 1);
513	InsertConfigInteger(pCfg, "QemuRamfbSupport", 1);
514	InsertConfigNode(pInst, "LUN#0", &pLunL0);
515	InsertConfigString(pLunL0, "Driver", "MainDisplay");
516
517	vrc = RTFdtNodeAddF(hFdt, "fw-cfg@%RGp", GCPhysMmioStart); VRC();
518	vrc = RTFdtNodePropertyAddEmpty( hFdt, "dma-coherent"); VRC();
519	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
520	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "qemu,fw-cfg-mmio"); VRC();
521	vrc = RTFdtNodeFinalize(hFdt); VRC();
522
523	if (pSysTblsBldAcpi)
524	{
525	vrc = pSysTblsBldAcpi->addMmioDeviceNoIrq("qemu-fw-cfg", 0, GCPhysMmioStart, cbMmio);
526	VRC();
527	}
528	}
529
530	InsertConfigNode(pDevices, "flash-cfi", &pDev);
531	InsertConfigNode(pDev, "0", &pInst);
532	InsertConfigNode(pInst, "Config", &pCfg);
533	InsertConfigInteger(pCfg, "BaseAddress", 64 * _1M);
534	InsertConfigInteger(pCfg, "Size", 768 * _1K);
535	InsertConfigString(pCfg, "FlashFile", "nvram");
536	/* Attach the NVRAM storage driver. */
537	InsertConfigNode(pInst, "LUN#0", &pLunL0);
538	InsertConfigString(pLunL0, "Driver", "NvramStore");
539
540	vrc = RTFdtNodeAddF(hFdt, "flash@%RX32", 0); VRC();
541	vrc = RTFdtNodePropertyAddU32( hFdt, "bank-width", 4); VRC();
542	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 4,
543	0, 0x04000000, /* First region (EFI). */
544	0x04000000, 0x04000000); /* Second region (NVRAM). */ VRC();
545	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "cfi-flash"); VRC();
546	vrc = RTFdtNodeFinalize(hFdt); VRC();
547
548	InsertConfigNode(pDevices, "arm-pl011", &pDev);
549	for (ULONG ulInstance = 0; ulInstance < 1 /** @todo SchemaDefs::SerialPortCount*/; ++ulInstance)
550	{
551	ComPtr<ISerialPort> serialPort;
552	hrc = pMachine->GetSerialPort(ulInstance, serialPort.asOutParam()); H();
553	BOOL fEnabledSerPort = FALSE;
554	if (serialPort)
555	{
556	hrc = serialPort->COMGETTER(Enabled)(&fEnabledSerPort); H();
557	}
558	if (!fEnabledSerPort)
559	{
560	m_aeSerialPortMode[ulInstance] = PortMode_Disconnected;
561	continue;
562	}
563
564	InsertConfigNode(pDev, Utf8StrFmt("%u", ulInstance).c_str(), &pInst);
565	InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
566	InsertConfigNode(pInst, "Config", &pCfg);
567
568	uint32_t iIrq = 0;
569	hrc = pResMgr->assignSingleInterrupt("arm-pl011", &iIrq); H();
570	hrc = pResMgr->assignMmioRegion("arm-pl011", _4K, &GCPhysMmioStart, &cbMmio); H();
571
572	InsertConfigInteger(pCfg, "Irq", iIrq);
573	InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
574
575	vrc = RTFdtNodeAddF(hFdt, "pl011@%RGp", GCPhysMmioStart); VRC();
576	vrc = RTFdtNodePropertyAddStringList(hFdt, "clock-names", 2, "uartclk", "apb_pclk"); VRC();
577	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "clocks", 2,
578	idPHandleAbpPClk, idPHandleAbpPClk); VRC();
579	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
580	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
581	vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2,
582	"arm,pl011", "arm,primecell"); VRC();
583	vrc = RTFdtNodeFinalize(hFdt); VRC();
584
585	if (pSysTblsBldAcpi)
586	{
587	vrc = pSysTblsBldAcpi->addMmioDevice("arm-pl011", ulInstance, GCPhysMmioStart, cbMmio, iIrq);
588	VRC();
589	}
590
591	BOOL fServer;
592	hrc = serialPort->COMGETTER(Server)(&fServer); H();
593	hrc = serialPort->COMGETTER(Path)(bstr.asOutParam()); H();
594
595	PortMode_T eHostMode;
596	hrc = serialPort->COMGETTER(HostMode)(&eHostMode); H();
597
598	m_aeSerialPortMode[ulInstance] = eHostMode;
599	if (eHostMode != PortMode_Disconnected)
600	{
601	vrc = i_configSerialPort(pInst, eHostMode, Utf8Str(bstr).c_str(), RT_BOOL(fServer));
602	if (RT_FAILURE(vrc))
603	return vrc;
604	}
605	}
606
607	BOOL fRTCUseUTC;
608	hrc = platform->COMGETTER(RTCUseUTC)(&fRTCUseUTC); H();
609
610	uint32_t iIrq = 0;
611	hrc = pResMgr->assignSingleInterrupt("arm-pl031-rtc", &iIrq); H();
612	hrc = pResMgr->assignMmioRegion("arm-pl031-rtc", _4K, &GCPhysMmioStart, &cbMmio); H();
613	InsertConfigNode(pDevices, "arm-pl031-rtc", &pDev);
614	InsertConfigNode(pDev, "0", &pInst);
615	InsertConfigNode(pInst, "Config", &pCfg);
616	InsertConfigInteger(pCfg, "Irq", iIrq);
617	InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
618	InsertConfigInteger(pCfg, "UtcOffset", fRTCUseUTC ? 1 : 0);
619
620	vrc = RTFdtNodeAddF(hFdt, "pl032@%RGp", GCPhysMmioStart); VRC();
621	vrc = RTFdtNodePropertyAddString( hFdt, "clock-names", "apb_pclk"); VRC();
622	vrc = RTFdtNodePropertyAddU32( hFdt, "clocks", idPHandleAbpPClk); VRC();
623	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
624	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
625	vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2,
626	"arm,pl031", "arm,primecell"); VRC();
627	vrc = RTFdtNodeFinalize(hFdt); VRC();
628
629	/* Configure gpio keys. */
630	hrc = pResMgr->assignSingleInterrupt("arm-pl061-gpio", &iIrq); H();
631	hrc = pResMgr->assignMmioRegion("arm-pl061-gpio", _4K, &GCPhysMmioStart, &cbMmio); H();
632	InsertConfigNode(pDevices, "arm-pl061-gpio",&pDev);
633	InsertConfigNode(pDev, "0", &pInst);
634	InsertConfigNode(pInst, "Config", &pCfg);
635	InsertConfigInteger(pCfg, "Irq", iIrq);
636	InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
637	vrc = RTFdtNodeAddF(hFdt, "pl061@%RGp", GCPhysMmioStart); VRC();
638	vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleGpio); VRC();
639	vrc = RTFdtNodePropertyAddString( hFdt, "clock-names", "apb_pclk"); VRC();
640	vrc = RTFdtNodePropertyAddU32( hFdt, "clocks", idPHandleAbpPClk); VRC();
641	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
642	vrc = RTFdtNodePropertyAddEmpty( hFdt, "gpio-controller"); VRC();
643	vrc = RTFdtNodePropertyAddU32( hFdt, "#gpio-cells", 2); VRC();
644	vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2,
645	"arm,pl061", "arm,primecell"); VRC();
646	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
647	vrc = RTFdtNodeFinalize(hFdt); VRC();
648
649	if (pSysTblsBldAcpi)
650	{
651	vrc = pSysTblsBldAcpi->addMmioDevice("arm-pl061-gpio", 0, GCPhysMmioStart, _4K, iIrq);
652	VRC();
653	}
654
655	InsertConfigNode(pInst, "LUN#0", &pLunL0);
656	InsertConfigString(pLunL0, "Driver", "GpioButton");
657	InsertConfigNode(pLunL0, "Config", &pCfg);
658	InsertConfigInteger(pCfg, "PowerButtonGpio", 3);
659	InsertConfigInteger(pCfg, "SleepButtonGpio", 4);
660
661	vrc = RTFdtNodeAdd(hFdt, "gpio-keys"); VRC();
662	vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "gpio-keys"); VRC();
663
664	vrc = RTFdtNodeAdd(hFdt, "poweroff"); VRC();
665	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "gpios", 3, idPHandleGpio, 3, 0); VRC();
666	vrc = RTFdtNodePropertyAddU32( hFdt, "linux,code", 0x74); VRC();
667	vrc = RTFdtNodePropertyAddString( hFdt, "label", "GPIO Key Poweroff"); VRC();
668	vrc = RTFdtNodeFinalize(hFdt); VRC();
669
670	vrc = RTFdtNodeAdd(hFdt, "suspend"); VRC();
671	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "gpios", 3, idPHandleGpio, 4, 0); VRC();
672	vrc = RTFdtNodePropertyAddU32( hFdt, "linux,code", 0xcd); VRC();
673	vrc = RTFdtNodePropertyAddString( hFdt, "label", "GPIO Key Suspend"); VRC();
674	vrc = RTFdtNodeFinalize(hFdt);
675
676	vrc = RTFdtNodeFinalize(hFdt); VRC();
677
678	hrc = pResMgr->assignInterrupts("pci-generic-ecam", 4 /cInterrupts/, &iIrq); H();
679	uint32_t aPinIrqs[] = { iIrq, iIrq + 1, iIrq + 2, iIrq + 3 };
680	RTGCPHYS GCPhysPciMmioEcam, GCPhysPciMmio, GCPhysPciMmio32;
681	RTGCPHYS cbPciMmioEcam, cbPciMmio, cbPciMmio32;
682	hrc = pResMgr->assignMmioRegionAligned("pci-pio", _64K, _64K, &GCPhysMmioStart, &cbMmio); H();
683	hrc = pResMgr->assignMmioRegion( "pci-ecam", 16 * _1M, &GCPhysPciMmioEcam, &cbPciMmioEcam); H();
684	hrc = pResMgr->assignMmioRegion( "pci-mmio", _2G, &GCPhysPciMmio, &cbPciMmio); H();
685	hrc = pResMgr->assignMmio32Region( "pci-mmio32", _1G - VBOXPLATFORMARMV8_PHYS_ADDR - _1M, &GCPhysPciMmio32, &cbPciMmio32); H();
686
687	InsertConfigNode(pDevices, "pci-generic-ecam", &pDev);
688	InsertConfigNode(pDev, "0", &pInst);
689	InsertConfigNode(pInst, "Config", &pCfg);
690	InsertConfigInteger(pCfg, "MmioEcamBase", GCPhysPciMmioEcam);
691	InsertConfigInteger(pCfg, "MmioEcamLength", cbPciMmioEcam);
692	InsertConfigInteger(pCfg, "MmioPioBase", GCPhysMmioStart);
693	InsertConfigInteger(pCfg, "MmioPioSize", cbMmio);
694	InsertConfigInteger(pCfg, "IntPinA", aPinIrqs[0]);
695	InsertConfigInteger(pCfg, "IntPinB", aPinIrqs[1]);
696	InsertConfigInteger(pCfg, "IntPinC", aPinIrqs[2]);
697	InsertConfigInteger(pCfg, "IntPinD", aPinIrqs[3]);
698	vrc = RTFdtNodeAddF(hFdt, "pcie@%RGp", GCPhysPciMmio); VRC();
699	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupt-map-mask", 4, 0xf800, 0, 0, 7); VRC();
700
701	uint32_t aIrqCells[32 * 4 * 10]; RT_ZERO(aIrqCells); /* Maximum of 32 devices on the root bus, each supporting 4 interrupts (INTA# ... INTD#). */
702	uint32_t *pau32IrqCell = &aIrqCells[0];
703	uint32_t iIrqPinSwizzle = 0;
704
705	for (uint32_t i = 0; i < 32; i++)
706	{
707	for (uint32_t iIrqPin = 0; iIrqPin < 4; iIrqPin++)
708	{
709	pau32IrqCell[0] = i << 11; /* The dev part, composed as dev.fn. */
710	pau32IrqCell[1] = 0;
711	pau32IrqCell[2] = 0;
712	pau32IrqCell[3] = iIrqPin + 1;
713	pau32IrqCell[4] = idPHandleIntCtrl;
714	pau32IrqCell[5] = 0;
715	pau32IrqCell[6] = 0;
716	pau32IrqCell[7] = 0;
717	pau32IrqCell[8] = aPinIrqs[(iIrqPinSwizzle + iIrqPin) % RT_ELEMENTS(aPinIrqs)];
718	pau32IrqCell[9] = 0x04;
719	pau32IrqCell += 10;
720	}
721
722	iIrqPinSwizzle++;
723	}
724
725	vrc = RTFdtNodePropertyAddCellsU32AsArray(hFdt, "interrupt-map", RT_ELEMENTS(aIrqCells), &aIrqCells[0]);
726	vrc = RTFdtNodePropertyAddU32( hFdt, "#interrupt-cells", 1); VRC();
727	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "ranges", 21,
728	0x1000000, 0, 0,
729	GCPhysMmioStart >> 32, GCPhysMmioStart, cbMmio >> 32, cbMmio,
730	0x2000000, GCPhysPciMmio32 >> 32, GCPhysPciMmio32, GCPhysPciMmio32 >> 32, GCPhysPciMmio32,
731	cbPciMmio32 >> 32, cbPciMmio32,
732	0x3000000, GCPhysPciMmio >> 32, GCPhysPciMmio, GCPhysPciMmio >> 32, GCPhysPciMmio,
733	cbPciMmio >> 32, cbPciMmio); VRC();
734	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysPciMmioEcam, cbPciMmioEcam); VRC();
735	/** @todo msi-map */
736	vrc = RTFdtNodePropertyAddEmpty( hFdt, "dma-coherent"); VRC();
737	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "bus-range", 2, 0, 0xf); VRC();
738	vrc = RTFdtNodePropertyAddU32( hFdt, "linux,pci-domain", 0); VRC();
739	vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC();
740	vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 3); VRC();
741	vrc = RTFdtNodePropertyAddString( hFdt, "device_type", "pci"); VRC();
742	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "pci-host-ecam-generic"); VRC();
743	vrc = RTFdtNodeFinalize(hFdt); VRC();
744
745	if (pSysTblsBldAcpi)
746	{
747	vrc = pSysTblsBldAcpi->configurePcieRootBus("pci-generic-ecam", aPinIrqs, GCPhysMmioStart, GCPhysPciMmioEcam,
748	cbPciMmioEcam, GCPhysMmioStart, cbMmio, GCPhysPciMmio32, cbPciMmio32);
749	VRC();
750	}
751
752	#if defined(VBOX_WITH_TPM)
753	/*
754	* Configure the Trusted Platform Module.
755	*/
756	ComObjPtr<ITrustedPlatformModule> ptrTpm;
757	TpmType_T enmTpmType = TpmType_None;
758
759	hrc = pMachine->COMGETTER(TrustedPlatformModule)(ptrTpm.asOutParam()); H();
760	hrc = ptrTpm->COMGETTER(Type)(&enmTpmType); H();
761	if (enmTpmType != TpmType_None)
762	{
763	hrc = pResMgr->assignSingleInterrupt("tpm", &iIrq); H();
764	hrc = pResMgr->assignMmioRegion("tpm", 5 * _1K, &GCPhysMmioStart, &cbMmio); H();
765
766	InsertConfigNode(pDevices, "tpm", &pDev);
767	InsertConfigNode(pDev, "0", &pInst);
768	InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
769	InsertConfigNode(pInst, "Config", &pCfg);
770	InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
771	InsertConfigInteger(pCfg, "Irq", iIrq);
772	//InsertConfigInteger(pCfg, "Crb", 1); /* boolean */
773
774	InsertConfigNode(pInst, "LUN#0", &pLunL0);
775
776	switch (enmTpmType)
777	{
778	case TpmType_v1_2:
779	case TpmType_v2_0:
780	InsertConfigString(pLunL0, "Driver", "TpmEmuTpms");
781	InsertConfigNode(pLunL0, "Config", &pCfg);
782	InsertConfigInteger(pCfg, "TpmVersion", enmTpmType == TpmType_v1_2 ? 1 : 2);
783	InsertConfigNode(pLunL0, "AttachedDriver", &pLunL1);
784	InsertConfigString(pLunL1, "Driver", "NvramStore");
785	break;
786	case TpmType_Host:
787	#if defined(RT_OS_LINUX) \|\| defined(RT_OS_WINDOWS)
788	InsertConfigString(pLunL0, "Driver", "TpmHost");
789	InsertConfigNode(pLunL0, "Config", &pCfg);
790	#endif
791	break;
792	case TpmType_Swtpm:
793	hrc = ptrTpm->COMGETTER(Location)(bstr.asOutParam()); H();
794	InsertConfigString(pLunL0, "Driver", "TpmEmu");
795	InsertConfigNode(pLunL0, "Config", &pCfg);
796	InsertConfigString(pCfg, "Location", bstr);
797	break;
798	default:
799	AssertFailedBreak();
800	}
801
802	vrc = RTFdtNodeAddF(hFdt, "tpm@%RGp", GCPhysMmioStart); VRC();
803	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
804	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
805	vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 1, "tcg,tpm-tis-mmio"); VRC();
806	vrc = RTFdtNodeFinalize(hFdt); VRC();
807
808	if (pSysTblsBldAcpi)
809	{
810	vrc = pSysTblsBldAcpi->configureTpm2(false /fCrb/, GCPhysMmioStart, cbMmio, iIrq);
811	VRC();
812	}
813
814	#if 0
815	/* Add the device for the physical presence interface. */
816	InsertConfigNode( pDevices, "tpm-ppi", &pDev);
817	InsertConfigNode( pDev, "0", &pInst);
818	InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
819	InsertConfigNode( pInst, "Config", &pCfg);
820	InsertConfigInteger(pCfg, "MmioBase", TPM_PPI_MMIO_BASE_DEFAULT);
821	#endif
822	}
823	#endif
824
825	/*
826	* VMSVGA compliant graphics controller.
827	*/
828	if ( enmGraphicsController != GraphicsControllerType_QemuRamFB
829	&& enmGraphicsController != GraphicsControllerType_Null)
830	{
831	vrc = i_configGraphicsController(pDevices, enmGraphicsController, pBusMgr, pMachine,
832	pGraphicsAdapter, firmwareSettings,
833	true /fForceVmSvga3/, false /fExposeLegacyVga/); VRC();
834	}
835
836	/*
837	* The USB Controllers and input devices.
838	*/
839	#if 0 /** @todo Make us of this and disallow PS/2 for ARM VMs for now. */
840	KeyboardHIDType_T aKbdHID;
841	hrc = pMachine->COMGETTER(KeyboardHIDType)(&aKbdHID); H();
842	#endif
843
844	PointingHIDType_T aPointingHID;
845	hrc = pMachine->COMGETTER(PointingHIDType)(&aPointingHID); H();
846
847	PCFGMNODE pUsbDevices = NULL;
848	vrc = i_configUsb(pMachine, pBusMgr, pRoot, pDevices, KeyboardHIDType_USBKeyboard, aPointingHID, &pUsbDevices);
849
850	/*
851	* Storage controllers.
852	*/
853	bool fFdcEnabled = false;
854	vrc = i_configStorageCtrls(pMachine, pBusMgr, pVMM, pUVM,
855	pDevices, pUsbDevices, NULL /pBiosCfg/, &fFdcEnabled); VRC();
856
857	/*
858	* Network adapters
859	*/
860	std::list<BootNic> llBootNics;
861	vrc = i_configNetworkCtrls(pMachine, pPlatformProperties, chipsetType, pBusMgr,
862	pVMM, pUVM, pDevices, llBootNics); VRC();
863
864	/*
865	* The VMM device.
866	*/
867	vrc = i_configVmmDev(pMachine, pBusMgr, pDevices, true /fMmioReq/); VRC();
868
869	/*
870	* Audio configuration.
871	*/
872	bool fAudioEnabled = false;
873	vrc = i_configAudioCtrl(virtualBox, pMachine, pBusMgr, pDevices,
874	false /fOsXGuest/, &fAudioEnabled); VRC();
875	}
876	catch (ConfigError &x)
877	{
878	RTFdtDestroy(hFdt);
879
880	// InsertConfig threw something:
881	pVMM->pfnVMR3SetError(pUVM, x.m_vrc, RT_SRC_POS, "Caught ConfigError: %Rrc - %s", x.m_vrc, x.what());
882	return x.m_vrc;
883	}
884	catch (HRESULT hrcXcpt)
885	{
886	RTFdtDestroy(hFdt);
887	AssertLogRelMsgFailedReturn(("hrc=%Rhrc\n", hrcXcpt), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR);
888	}
889
890	#ifdef VBOX_WITH_EXTPACK
891	/*
892	* Call the extension pack hooks if everything went well thus far.
893	*/
894	if (RT_SUCCESS(vrc))
895	{
896	pAlock->release();
897	vrc = mptrExtPackManager->i_callAllVmConfigureVmmHooks(this, pVM, pVMM);
898	pAlock->acquire();
899	}
900	#endif
901
902	#if 0
903	vrc = RTFdtNodeAdd(hFdt, "chosen"); VRC();
904	vrc = RTFdtNodePropertyAddString( hFdt, "stdout-path", "pl011@9000000"); VRC();
905	vrc = RTFdtNodePropertyAddString( hFdt, "stdin-path", "pl011@9000000"); VRC();
906	vrc = RTFdtNodeFinalize(hFdt);
907	#endif
908
909	/* Finalize the FDT and add it to the resource store. */
910	vrc = RTFdtFinalize(hFdt);
911	AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
912
913	RTVFSFILE hVfsFileDesc = NIL_RTVFSFILE;
914	vrc = RTVfsMemFileCreate(NIL_RTVFSIOSTREAM, 0 /cbEstimate/, &hVfsFileDesc);
915	AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
916	RTVFSIOSTREAM hVfsIosDesc = RTVfsFileToIoStream(hVfsFileDesc);
917	AssertRelease(hVfsIosDesc != NIL_RTVFSIOSTREAM);
918
919	/* Initialize the VBox platform descriptor. */
920	VBOXPLATFORMARMV8 ArmV8Platform; RT_ZERO(ArmV8Platform);
921
922	/* Make room for the descriptor at the beginning. */
923	vrc = RTVfsIoStrmZeroFill(hVfsIosDesc, sizeof(ArmV8Platform));
924	AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
925
926	vrc = RTFdtDumpToVfsIoStrm(hFdt, RTFDTTYPE_DTB, 0 /fFlags/, hVfsIosDesc, NULL /pErrInfo/);
927	uint64_t cbFdt = 0;
928	if (RT_SUCCESS(vrc))
929	{
930	vrc = RTVfsFileQuerySize(hVfsFileDesc, &cbFdt);
931	cbFdt -= sizeof(ArmV8Platform);
932	}
933	AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
934
935	vrc = RTVfsIoStrmZeroFill(hVfsIosDesc, (RTFOFF)(RT_ALIGN_64(cbFdt, _64K) - cbFdt));
936	AssertRCReturn(vrc, vrc);
937
938	RTGCPHYS GCPhysMmioStart;
939	RTGCPHYS cbMmio;
940	hrc = pResMgr->queryMmioRegion(&GCPhysMmioStart, &cbMmio);
941	Assert(SUCCEEDED(hrc));
942
943	RTGCPHYS GCPhysMmio32Start;
944	RTGCPHYS cbMmio32;
945	hrc = pResMgr->queryMmio32Region(&GCPhysMmio32Start, &cbMmio32);
946	Assert(SUCCEEDED(hrc));
947
948	RTGCPHYS GCPhysXsdp = NIL_RTGCPHYS;
949	size_t cbAcpiXsdp = 0;
950	size_t cbAcpi = 0;
951	if (pSysTblsBldAcpi)
952	{
953	vrc = pSysTblsBldAcpi->finishTables(VBOXPLATFORMARMV8_PHYS_ADDR + sizeof(ArmV8Platform) + RT_ALIGN_64(cbFdt, _64K),
954	hVfsIosDesc, &GCPhysXsdp, &cbAcpiXsdp, &cbAcpi);
955	AssertRCReturn(vrc, vrc);
956	Assert(GCPhysXsdp > VBOXPLATFORMARMV8_PHYS_ADDR);
957
958	/* Dump the ACPI table for debugging purposes if requested. */
959	Bstr SysTblsDumpVal;
960	hrc = mMachine->GetExtraData(Bstr("VBoxInternal2/DumpSysTables").raw(),
961	SysTblsDumpVal.asOutParam());
962	if ( hrc == S_OK
963	&& SysTblsDumpVal.isNotEmpty())
964	{
965	vrc = pSysTblsBldAcpi->dumpTables(Utf8Str(SysTblsDumpVal).c_str());
966	AssertRCReturn(vrc, vrc);
967	}
968
969	delete pSysTblsBldAcpi;
970
971	vrc = RTVfsIoStrmZeroFill(hVfsIosDesc, (RTFOFF)(RT_ALIGN_64(cbAcpi, _64K) - cbAcpi));
972	AssertRCReturn(vrc, vrc);
973	}
974
975	ArmV8Platform.u32Magic = VBOXPLATFORMARMV8_MAGIC;
976	ArmV8Platform.u32Version = VBOXPLATFORMARMV8_VERSION;
977	ArmV8Platform.cbDesc = sizeof(ArmV8Platform);
978	ArmV8Platform.fFlags = 0;
979	ArmV8Platform.u64PhysAddrRamBase = GCPhysRam;
980	ArmV8Platform.cbRamBase = cbRam;
981	ArmV8Platform.i64OffFdt = sizeof(ArmV8Platform);
982	ArmV8Platform.cbFdt = RT_ALIGN_64(cbFdt, _64K);
983	if (cbAcpi)
984	{
985	ArmV8Platform.i64OffAcpi = sizeof(ArmV8Platform) + RT_ALIGN_64(cbFdt, _64K);
986	ArmV8Platform.cbAcpi = RT_ALIGN_64(cbAcpi, _64K);
987	ArmV8Platform.i64OffAcpiXsdp = GCPhysXsdp - VBOXPLATFORMARMV8_PHYS_ADDR;
988	ArmV8Platform.cbAcpiXsdp = cbAcpiXsdp;
989	}
990	ArmV8Platform.i64OffUefiRom = -128 * _1M;
991	ArmV8Platform.cbUefiRom = _64M;
992	ArmV8Platform.i64OffMmio = GCPhysMmioStart - _128M;
993	ArmV8Platform.cbMmio = cbMmio;
994	ArmV8Platform.i64OffMmio32 = GCPhysMmio32Start - _128M;
995	ArmV8Platform.cbMmio32 = cbMmio32;
996
997	/* Add the VBox platform descriptor to the resource store. */
998	vrc = RTVfsIoStrmWriteAt(hVfsIosDesc, 0, &ArmV8Platform, sizeof(ArmV8Platform), true /fBlocking/, NULL /pcbWritten/);
999	RTVfsIoStrmRelease(hVfsIosDesc);
1000	vrc = mptrResourceStore->i_addItem("resources", "VBoxArmV8Desc", hVfsFileDesc);
1001	RTVfsFileRelease(hVfsFileDesc);
1002	AssertRCReturn(vrc, vrc);
1003
1004	/* Dump the DTB for debugging purposes if requested. */
1005	Bstr DtbDumpVal;
1006	hrc = mMachine->GetExtraData(Bstr("VBoxInternal2/DumpDtb").raw(),
1007	DtbDumpVal.asOutParam());
1008	if ( hrc == S_OK
1009	&& DtbDumpVal.isNotEmpty())
1010	{
1011	vrc = RTFdtDumpToFile(hFdt, RTFDTTYPE_DTB, 0 /fFlags/, Utf8Str(DtbDumpVal).c_str(), NULL /pErrInfo/);
1012	AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
1013	}
1014
1015	delete pResMgr; /* Delete the address/interrupt assignment manager. */
1016
1017	/*
1018	* Apply the CFGM overlay.
1019	*/
1020	if (RT_SUCCESS(vrc))
1021	vrc = i_configCfgmOverlay(pRoot, virtualBox, pMachine);
1022
1023	/*
1024	* Dump all extradata API settings tweaks, both global and per VM.
1025	*/
1026	if (RT_SUCCESS(vrc))
1027	vrc = i_configDumpAPISettingsTweaks(virtualBox, pMachine);
1028
1029	#undef H
1030
1031	pAlock->release(); /* Avoid triggering the lock order inversion check. */
1032
1033	/*
1034	* Register VM state change handler.
1035	*/
1036	int vrc2 = pVMM->pfnVMR3AtStateRegister(pUVM, Console::i_vmstateChangeCallback, this);
1037	AssertRC(vrc2);
1038	if (RT_SUCCESS(vrc))
1039	vrc = vrc2;
1040
1041	/*
1042	* Register VM runtime error handler.
1043	*/
1044	vrc2 = pVMM->pfnVMR3AtRuntimeErrorRegister(pUVM, Console::i_atVMRuntimeErrorCallback, this);
1045	AssertRC(vrc2);
1046	if (RT_SUCCESS(vrc))
1047	vrc = vrc2;
1048
1049	pAlock->acquire();
1050
1051	LogFlowFunc(("vrc = %Rrc\n", vrc));
1052	LogFlowFuncLeave();
1053
1054	return vrc;
1055	}
1056	#endif /* !VBOX_WITH_VIRT_ARMV8 */
1057

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source: vbox/trunk/src/VBox/Main/src-client/ConsoleImplConfigArmV8.cpp@ 106457

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