VirtualBox

source: vbox/trunk/src/VBox/Main/src-client/ConsoleImplConfigArmV8.cpp@ 107491

Last change on this file since 107491 was 107267, checked in by vboxsync, 6 weeks ago

Main/API,UI: bugref:10810 Based on Brent's patch, added UsbNet support into Main API and UI
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1/* $Id: ConsoleImplConfigArmV8.cpp 107267 2024-12-10 07:37:35Z vboxsync $ */
2/** @file
3 * VBox Console COM Class implementation - VM Configuration Bits for ARMv8.
4 */
5
6/*
7 * Copyright (C) 2023-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_MAIN_CONSOLE
33#include "LoggingNew.h"
34
35#include "ConsoleImpl.h"
36#include "ResourceStoreImpl.h"
37#include "Global.h"
38#include "VMMDev.h"
39
40// generated header
41#include "SchemaDefs.h"
42
43#include "AutoCaller.h"
44
45#include <iprt/buildconfig.h>
46#include <iprt/ctype.h>
47#include <iprt/dir.h>
48#include <iprt/fdt.h>
49#include <iprt/file.h>
50#include <iprt/param.h>
51#include <iprt/path.h>
52#include <iprt/string.h>
53#include <iprt/system.h>
54#if 0 /* enable to play with lots of memory. */
55# include <iprt/env.h>
56#endif
57#include <iprt/stream.h>
58
59#include <iprt/formats/arm-psci.h>
60
61#include <VBox/vmm/vmmr3vtable.h>
62#include <VBox/vmm/vmapi.h>
63#include <VBox/err.h>
64#include <VBox/param.h>
65#include <VBox/version.h>
66#include <VBox/platforms/vbox-armv8.h>
67
68#include "BusAssignmentManager.h"
69#include "ResourceAssignmentManager.h"
70#include "SystemTableBuilder.h"
71#ifdef VBOX_WITH_EXTPACK
72# include "ExtPackManagerImpl.h"
73#endif
74
75
76/*********************************************************************************************************************************
77* Internal Functions *
78*********************************************************************************************************************************/
79
80/* Darwin compile kludge */
81#undef PVM
82
83#ifdef VBOX_WITH_VIRT_ARMV8
84/**
85 * Worker for configConstructor.
86 *
87 * @return VBox status code.
88 * @param pUVM The user mode VM handle.
89 * @param pVM The cross context VM handle.
90 * @param pVMM The VMM vtable.
91 * @param pAlock The automatic lock instance. This is for when we have
92 * to leave it in order to avoid deadlocks (ext packs and
93 * more).
94 */
95int Console::i_configConstructorArmV8(PUVM pUVM, PVM pVM, PCVMMR3VTABLE pVMM, AutoWriteLock *pAlock)
96{
97 RT_NOREF(pVM /* when everything is disabled */);
98 ComPtr<IMachine> pMachine = i_machine();
99
100 HRESULT hrc;
101 Utf8Str strTmp;
102 Bstr bstr;
103
104 RTFDT hFdt = NIL_RTFDT;
105 int vrc = RTFdtCreateEmpty(&hFdt);
106 AssertRCReturn(vrc, vrc);
107
108#define H() AssertLogRelMsgReturnStmt(!FAILED(hrc), ("hrc=%Rhrc\n", hrc), RTFdtDestroy(hFdt), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR)
109#define VRC() AssertLogRelMsgReturnStmt(RT_SUCCESS(vrc), ("vrc=%Rrc\n", vrc), RTFdtDestroy(hFdt), vrc)
110
111 /*
112 * Get necessary objects and frequently used parameters.
113 */
114 ComPtr<IVirtualBox> virtualBox;
115 hrc = pMachine->COMGETTER(Parent)(virtualBox.asOutParam()); H();
116
117 ComPtr<IHost> host;
118 hrc = virtualBox->COMGETTER(Host)(host.asOutParam()); H();
119
120 PlatformArchitecture_T platformArchHost;
121 hrc = host->COMGETTER(Architecture)(&platformArchHost); H();
122
123 ComPtr<ISystemProperties> systemProperties;
124 hrc = virtualBox->COMGETTER(SystemProperties)(systemProperties.asOutParam()); H();
125
126 ComPtr<IFirmwareSettings> firmwareSettings;
127 hrc = pMachine->COMGETTER(FirmwareSettings)(firmwareSettings.asOutParam()); H();
128
129 ComPtr<INvramStore> nvramStore;
130 hrc = pMachine->COMGETTER(NonVolatileStore)(nvramStore.asOutParam()); H();
131
132 hrc = pMachine->COMGETTER(HardwareUUID)(bstr.asOutParam()); H();
133 RTUUID HardwareUuid;
134 vrc = RTUuidFromUtf16(&HardwareUuid, bstr.raw());
135 AssertRCReturn(vrc, vrc);
136
137 ULONG cRamMBs;
138 hrc = pMachine->COMGETTER(MemorySize)(&cRamMBs); H();
139 uint64_t const cbRam = cRamMBs * (uint64_t)_1M;
140
141 ComPtr<IPlatform> platform;
142 hrc = pMachine->COMGETTER(Platform)(platform.asOutParam()); H();
143
144 /* Note: Should be guarded by VBOX_WITH_VIRT_ARMV8, but we check this anyway here. */
145#if 1 /* For now we only support running ARM VMs on ARM hosts. */
146 PlatformArchitecture_T platformArchMachine;
147 hrc = platform->COMGETTER(Architecture)(&platformArchMachine); H();
148 if (platformArchMachine != platformArchHost)
149 return pVMM->pfnVMR3SetError(pUVM, VERR_PLATFORM_ARCH_NOT_SUPPORTED, RT_SRC_POS,
150 N_("VM platform architecture (%s) not supported on this host (%s)."),
151 Global::stringifyPlatformArchitecture(platformArchMachine),
152 Global::stringifyPlatformArchitecture(platformArchHost));
153#endif
154
155 /* Get the ARM platform object. */
156 ComPtr<IPlatformARM> platformARM;
157 hrc = platform->COMGETTER(ARM)(platformARM.asOutParam()); H();
158
159 ComPtr<IPlatformProperties> pPlatformProperties;
160 hrc = platform->COMGETTER(Properties)(pPlatformProperties.asOutParam()); H();
161
162 ChipsetType_T chipsetType;
163 hrc = platform->COMGETTER(ChipsetType)(&chipsetType); H();
164
165 ULONG cCpus = 1;
166 hrc = pMachine->COMGETTER(CPUCount)(&cCpus); H();
167 Assert(cCpus);
168
169 ULONG ulCpuExecutionCap = 100;
170 hrc = pMachine->COMGETTER(CPUExecutionCap)(&ulCpuExecutionCap); H();
171
172 VMExecutionEngine_T enmExecEngine = VMExecutionEngine_NotSet;
173 hrc = pMachine->COMGETTER(VMExecutionEngine)(&enmExecEngine); H();
174
175 if ( enmExecEngine != VMExecutionEngine_Default
176 && enmExecEngine != VMExecutionEngine_NativeApi)
177 {
178 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
179 N_("The ARM backend doesn't support any other execution engine than 'default' or 'native-api' right now."));
180 }
181
182 LogRel(("Guest architecture: ARM\n"));
183
184 Bstr osTypeId;
185 hrc = pMachine->COMGETTER(OSTypeId)(osTypeId.asOutParam()); H();
186 LogRel(("Guest OS type: '%s'\n", Utf8Str(osTypeId).c_str()));
187
188 BusAssignmentManager *pBusMgr = mBusMgr = BusAssignmentManager::createInstance(pVMM, chipsetType, IommuType_None);
189 ResourceAssignmentManager *pResMgr = ResourceAssignmentManager::createInstance(pVMM, chipsetType, IommuType_None, 32 /*cInterrupts*/,
190 _4G); /* Start looking for free MMIO regions at 4GiB downwards. */
191 SystemTableBuilder *pSysTblsBldAcpi = NULL;
192
193 /*
194 * ACPI
195 */
196 BOOL fACPI;
197 hrc = firmwareSettings->COMGETTER(ACPIEnabled)(&fACPI); H();
198 if (fACPI)
199 pSysTblsBldAcpi = SystemTableBuilder::createInstance(kSystemTableType_Acpi);
200
201
202 /*
203 * Get root node first.
204 * This is the only node in the tree.
205 */
206 PCFGMNODE pRoot = pVMM->pfnCFGMR3GetRootU(pUVM);
207 Assert(pRoot);
208
209 /*
210 * The VBox platform descriptor, FDT and ACPI tables will reside at the end of the 4GiB
211 * address space and we reserve 2MiB for those.
212 */
213 RTGCPHYS cbPlatformDesc = _2M;
214 RTGCPHYS GCPhysPlatformDesc = VBOXPLATFORMARMV8_PHYS_ADDR - (cbPlatformDesc - _64K);
215
216 RTGCPHYS GCPhysRamBase = 128 * _1M;
217 RTGCPHYS cbRamBase = RT_MIN(cbRam, _4G - _512M - 128 * _1M);
218
219 RTGCPHYS GCPhysFw = 0;
220 RTGCPHYS cbFw = _64M;
221
222 // catching throws from InsertConfigString and friends.
223 try
224 {
225
226 /*
227 * Set the root (and VMM) level values.
228 */
229 hrc = pMachine->COMGETTER(Name)(bstr.asOutParam()); H();
230 InsertConfigString(pRoot, "Name", bstr);
231 InsertConfigBytes(pRoot, "UUID", &HardwareUuid, sizeof(HardwareUuid));
232 InsertConfigInteger(pRoot, "NumCPUs", cCpus);
233 InsertConfigInteger(pRoot, "CpuExecutionCap", ulCpuExecutionCap);
234 InsertConfigInteger(pRoot, "TimerMillies", 10);
235
236 /*
237 * NEM
238 */
239 PCFGMNODE pNEM;
240 InsertConfigNode(pRoot, "NEM", &pNEM);
241
242 uint32_t idPHandleIntCtrl = RTFdtPHandleAllocate(hFdt);
243 Assert(idPHandleIntCtrl != UINT32_MAX);
244 uint32_t idPHandleIntCtrlMsi = RTFdtPHandleAllocate(hFdt);
245 Assert(idPHandleIntCtrlMsi != UINT32_MAX); RT_NOREF(idPHandleIntCtrlMsi);
246 uint32_t idPHandleAbpPClk = RTFdtPHandleAllocate(hFdt);
247 Assert(idPHandleAbpPClk != UINT32_MAX);
248 uint32_t idPHandleGpio = RTFdtPHandleAllocate(hFdt);
249 Assert(idPHandleGpio != UINT32_MAX);
250
251 uint32_t aidPHandleCpus[VMM_MAX_CPU_COUNT];
252 for (uint32_t i = 0; i < cCpus; i++)
253 {
254 aidPHandleCpus[i] = RTFdtPHandleAllocate(hFdt);
255 Assert(aidPHandleCpus[i] != UINT32_MAX);
256 }
257
258 vrc = RTFdtNodePropertyAddU32( hFdt, "interrupt-parent", idPHandleIntCtrl); VRC();
259 vrc = RTFdtNodePropertyAddString(hFdt, "model", "linux,dummy-virt"); VRC();
260 vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC();
261 vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 2); VRC();
262 vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "linux,dummy-virt"); VRC();
263
264 /* Configure the Power State Coordination Interface. */
265 vrc = RTFdtNodeAdd(hFdt, "psci"); VRC();
266 vrc = RTFdtNodePropertyAddU32( hFdt, "migrate", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_MIGRATE)); VRC();
267 vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_on", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_CPU_ON)); VRC();
268 vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_off", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_CPU_OFF)); VRC();
269 vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_suspend", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_CPU_SUSPEND)); VRC();
270 vrc = RTFdtNodePropertyAddString(hFdt, "method", "hvc"); VRC();
271 vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 3,
272 "arm,psci-1.0", "arm,psci-0.2", "arm,psci"); VRC();
273 vrc = RTFdtNodeFinalize(hFdt); VRC();
274
275 /* Configure the timer and clock. */
276 InsertConfigInteger(pNEM, "VTimerInterrupt", 0xb);
277 vrc = RTFdtNodeAdd(hFdt, "timer"); VRC();
278 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 12,
279 0x01, 0x0d, 0x104,
280 0x01, 0x0e, 0x104,
281 0x01, 0x0b, 0x104,
282 0x01, 0x0a, 0x104); VRC();
283 vrc = RTFdtNodePropertyAddEmpty( hFdt, "always-on"); VRC();
284 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,armv8-timer"); VRC();
285 vrc = RTFdtNodeFinalize(hFdt);
286
287 vrc = RTFdtNodeAdd(hFdt, "apb-clk"); VRC();
288 vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleAbpPClk); VRC();
289 vrc = RTFdtNodePropertyAddString( hFdt, "clock-output-names", "clk24mhz"); VRC();
290 vrc = RTFdtNodePropertyAddU32( hFdt, "clock-frequency", ASMReadCntFrqEl0()); VRC();
291 vrc = RTFdtNodePropertyAddU32( hFdt, "#clock-cells", 0); VRC();
292 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "fixed-clock"); VRC();
293 vrc = RTFdtNodeFinalize(hFdt);
294
295 if (pSysTblsBldAcpi)
296 {
297 vrc = pSysTblsBldAcpi->configureClock();
298 VRC();
299 }
300
301 /*
302 * MM values.
303 */
304 PCFGMNODE pMM;
305 InsertConfigNode(pRoot, "MM", &pMM);
306
307 /*
308 * Memory setup.
309 */
310 PCFGMNODE pMem = NULL;
311 InsertConfigNode(pMM, "MemRegions", &pMem);
312
313 /*
314 * Windows requires the TPM to be available at 0xfed40000 so reserve this region first, even
315 * if no TPM is configured.
316 */
317 RTGCPHYS GCPhysTpm = 0xfed40000;
318 RTGCPHYS cbTpm = 0x5000 + 0x1000; /* TPM + PPI region. */
319 hrc = pResMgr->assignFixedMmioRegion("tpm", GCPhysTpm, cbTpm); H();
320
321 /*
322 * The firmware ROM will start at the beginning of the address space and span 64MiB
323 * After that comes the flash and spans another 64MiB (even if the real size is smaller).
324 */
325 hrc = pResMgr->assignFixedRomRegion("firmware", GCPhysFw, cbFw); H();
326
327 RTGCPHYS GCPhysFlash = _64M;
328 RTGCPHYS cbFlash = _64M;
329 hrc = pResMgr->assignFixedMmioRegion("flash", GCPhysFlash, cbFlash); H();
330
331 hrc = pResMgr->assignFixedRomRegion("platform-tables", GCPhysPlatformDesc, cbPlatformDesc); H();
332
333 /*
334 * The base RAM will start at 128MiB (end of flash region) and goes up to 4GiB - 512MiB
335 * (for the MMIO hole).
336 * If more RAM is configured the high region will start at 4GiB.
337 */
338 hrc = pResMgr->assignFixedRamRegion("RAM Base", GCPhysRamBase, cbRamBase); H();
339
340 PCFGMNODE pMemRegion = NULL;
341 InsertConfigNode(pMem, "Base", &pMemRegion);
342 InsertConfigInteger(pMemRegion, "GCPhysStart", GCPhysRamBase);
343 InsertConfigInteger(pMemRegion, "Size", cbRamBase);
344
345 vrc = RTFdtNodeAddF(hFdt, "memory@%RGp", GCPhysRamBase); VRC();
346 vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysRamBase, cbRamBase); VRC();
347 vrc = RTFdtNodePropertyAddString( hFdt, "device_type", "memory"); VRC();
348 vrc = RTFdtNodeFinalize(hFdt); VRC();
349
350 if (pSysTblsBldAcpi)
351 {
352 vrc = pSysTblsBldAcpi->addMemory(GCPhysRamBase, cbRamBase);
353 VRC();
354 }
355
356 if (cbRamBase < cbRam)
357 {
358 RTGCPHYS GCPhysRamHigh = _4G;
359 RTGCPHYS cbRamHigh = cbRam - cbRamBase;
360
361 hrc = pResMgr->assignFixedRamRegion("RAM High", GCPhysRamHigh, cbRamHigh); H();
362
363 InsertConfigNode(pMem, "High", &pMemRegion);
364 InsertConfigInteger(pMemRegion, "GCPhysStart", GCPhysRamHigh);
365 InsertConfigInteger(pMemRegion, "Size", cbRamHigh);
366
367 vrc = RTFdtNodeAddF(hFdt, "memory@%RGp", GCPhysRamHigh); VRC();
368 vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysRamHigh, cbRamHigh); VRC();
369 vrc = RTFdtNodePropertyAddString( hFdt, "device_type", "memory"); VRC();
370 vrc = RTFdtNodeFinalize(hFdt); VRC();
371
372 if (pSysTblsBldAcpi)
373 {
374 vrc = pSysTblsBldAcpi->addMemory(GCPhysRamHigh, cbRamHigh);
375 VRC();
376 }
377 }
378
379 /* Configure the CPUs in the system, only one socket and cluster at the moment. */
380 vrc = RTFdtNodeAdd(hFdt, "cpus"); VRC();
381 vrc = RTFdtNodePropertyAddU32(hFdt, "#size-cells", 0); VRC();
382 vrc = RTFdtNodePropertyAddU32(hFdt, "#address-cells", 1); VRC();
383
384 vrc = RTFdtNodeAdd(hFdt, "socket0"); VRC();
385 vrc = RTFdtNodeAdd(hFdt, "cluster0"); VRC();
386
387 for (uint32_t i = 0; i < cCpus; i++)
388 {
389 vrc = RTFdtNodeAddF(hFdt, "core%u", i); VRC();
390 vrc = RTFdtNodePropertyAddU32(hFdt, "cpu", aidPHandleCpus[i]); VRC();
391 vrc = RTFdtNodeFinalize(hFdt); VRC();
392 }
393
394 vrc = RTFdtNodeFinalize(hFdt); VRC();
395 vrc = RTFdtNodeFinalize(hFdt); VRC();
396
397 for (uint32_t i = 0; i < cCpus; i++)
398 {
399 vrc = RTFdtNodeAddF(hFdt, "cpu@%u", i); VRC();
400 vrc = RTFdtNodePropertyAddU32(hFdt, "phandle", aidPHandleCpus[i]); VRC();
401 vrc = RTFdtNodePropertyAddU32(hFdt, "reg", i); VRC();
402 vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "arm,cortex-a15"); VRC();
403 vrc = RTFdtNodePropertyAddString(hFdt, "device_type", "cpu"); VRC();
404 if (cCpus > 1)
405 {
406 vrc = RTFdtNodePropertyAddString(hFdt, "enable-method", "psci"); VRC();
407 }
408 vrc = RTFdtNodeFinalize(hFdt); VRC();
409
410 if (pSysTblsBldAcpi)
411 {
412 vrc = pSysTblsBldAcpi->addCpu(i);
413 VRC();
414 }
415 }
416
417 vrc = RTFdtNodeFinalize(hFdt); VRC();
418
419
420 /*
421 * CPUM values.
422 */
423 PCFGMNODE pCpum;
424 InsertConfigNode(pRoot, "CPUM", &pCpum);
425
426 /* Nested Virtualization. */
427 BOOL fNestedHWVirt = FALSE;
428 hrc = platformARM->GetCPUProperty(CPUPropertyTypeARM_HWVirt, &fNestedHWVirt); H();
429 InsertConfigInteger(pCpum, "NestedHWVirt", fNestedHWVirt ? true : false);
430
431
432 /*
433 * PDM config.
434 * Load drivers in VBoxC.[so|dll]
435 */
436 vrc = i_configPdm(pMachine, pVMM, pUVM, pRoot); VRC();
437
438
439 /*
440 * VGA.
441 */
442 ComPtr<IGraphicsAdapter> pGraphicsAdapter;
443 hrc = pMachine->COMGETTER(GraphicsAdapter)(pGraphicsAdapter.asOutParam()); H();
444 GraphicsControllerType_T enmGraphicsController;
445 hrc = pGraphicsAdapter->COMGETTER(GraphicsControllerType)(&enmGraphicsController); H();
446
447 /*
448 * Devices
449 */
450 PCFGMNODE pDevices = NULL; /* /Devices */
451 PCFGMNODE pDev = NULL; /* /Devices/Dev/ */
452 PCFGMNODE pInst = NULL; /* /Devices/Dev/0/ */
453 PCFGMNODE pCfg = NULL; /* /Devices/Dev/.../Config/ */
454 PCFGMNODE pLunL0 = NULL; /* /Devices/Dev/0/LUN#0/ */
455
456 InsertConfigNode(pRoot, "Devices", &pDevices);
457
458 InsertConfigNode(pDevices, "pci-generic-ecam-bridge", NULL);
459
460 InsertConfigNode(pDevices, "platform", &pDev);
461 InsertConfigNode(pDev, "0", &pInst);
462 InsertConfigNode(pInst, "Config", &pCfg);
463 InsertConfigNode(pInst, "LUN#0", &pLunL0);
464 InsertConfigString(pLunL0, "Driver", "ResourceStore");
465
466 /* Add the resources. */
467 PCFGMNODE pResources = NULL; /* /Devices/platform/Config/Resources */
468 PCFGMNODE pRes = NULL; /* /Devices/platform/Config/Resources/<Resource> */
469 InsertConfigString(pCfg, "ResourceNamespace", "resources");
470 InsertConfigNode(pCfg, "Resources", &pResources);
471 InsertConfigNode(pResources, "EfiRom", &pRes);
472 InsertConfigInteger(pRes, "RegisterAsRom", 1);
473 InsertConfigInteger(pRes, "GCPhysLoadAddress", 0);
474
475 /** @todo r=aeichner 32-bit guests and query the firmware type from VBoxSVC. */
476 /*
477 * Firmware.
478 */
479 FirmwareType_T eFwType = FirmwareType_EFI64;
480#ifdef VBOX_WITH_EFI_IN_DD2
481 const char *pszEfiRomFile = eFwType == FirmwareType_EFIDUAL ? "<INVALID>"
482 : eFwType == FirmwareType_EFI32 ? "VBoxEFI-arm32.fd"
483 : "VBoxEFI-arm64.fd";
484 const char *pszKey = "ResourceId";
485#else
486 Utf8Str efiRomFile;
487 vrc = findEfiRom(virtualBox, PlatformArchitecture_ARM, eFwType, &efiRomFile);
488 AssertRCReturn(vrc, vrc);
489 const char *pszEfiRomFile = efiRomFile.c_str();
490 const char *pszKey = "Filename";
491#endif
492 InsertConfigString(pRes, pszKey, pszEfiRomFile);
493
494 InsertConfigNode(pResources, "ArmV8Desc", &pRes);
495 InsertConfigInteger(pRes, "RegisterAsRom", 1);
496 InsertConfigInteger(pRes, "GCPhysLoadAddress", GCPhysPlatformDesc);
497 InsertConfigString(pRes, "ResourceId", "VBoxArmV8Desc");
498
499 /*
500 * Configure the interrupt controller.
501 */
502 RTGCPHYS GCPhysIntcDist;
503 RTGCPHYS GCPhysIntcIts;
504 RTGCPHYS cbMmioIntcDist;
505 RTGCPHYS cbMmioIntcIts;
506 RTGCPHYS GCPhysIntcReDist;
507 RTGCPHYS cbMmioIntcReDist;
508
509 /* Allow for up to 256 vCPUs in the future without changing the address space layout. */
510 hrc = pResMgr->assignMmioRegion("gic", _64K + 256 * _128K, &GCPhysIntcDist, &cbMmioIntcDist); H();
511 GCPhysIntcReDist = GCPhysIntcDist + _64K;
512 cbMmioIntcReDist = 256 * _128K;
513 cbMmioIntcDist = _64K;
514
515 hrc = pResMgr->assignMmioRegion("gic-its", 2 * _64K, &GCPhysIntcIts, &cbMmioIntcIts); H();
516
517#ifdef RT_OS_DARWIN
518 InsertConfigNode(pDevices, "gic", &pDev);
519#else
520 /* On Linux we default to the KVM in-kernel GIC and on Windows we are forced to the Hyper-V GIC for now. */
521 InsertConfigNode(pDevices, "gic-nem", &pDev);
522#endif
523 InsertConfigNode(pDev, "0", &pInst);
524 InsertConfigInteger(pInst, "Trusted", 1);
525 InsertConfigNode(pInst, "Config", &pCfg);
526 InsertConfigInteger(pCfg, "DistributorMmioBase", GCPhysIntcDist);
527 InsertConfigInteger(pCfg, "RedistributorMmioBase", GCPhysIntcReDist);
528 InsertConfigInteger(pCfg, "ItsMmioBase", GCPhysIntcIts);
529
530 vrc = RTFdtNodeAddF(hFdt, "intc@%RGp", GCPhysIntcDist); VRC();
531 vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleIntCtrl); VRC();
532 vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 4,
533 GCPhysIntcDist, cbMmioIntcDist, /* Distributor */
534 GCPhysIntcReDist, cbMmioIntcReDist); /* Re-Distributor */ VRC();
535 vrc = RTFdtNodePropertyAddU32( hFdt, "#redistributor-regions", 1); VRC();
536 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,gic-v3"); VRC();
537 vrc = RTFdtNodePropertyAddEmpty( hFdt, "ranges"); VRC();
538 vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC();
539 vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 2); VRC();
540 vrc = RTFdtNodePropertyAddEmpty( hFdt, "interrupt-controller"); VRC();
541 vrc = RTFdtNodePropertyAddU32( hFdt, "#interrupt-cells", 3); VRC();
542
543 if (pSysTblsBldAcpi)
544 {
545 vrc = pSysTblsBldAcpi->configureGic(cCpus, GCPhysIntcDist, cbMmioIntcDist,
546 GCPhysIntcReDist, cbMmioIntcReDist);
547 VRC();
548 }
549
550#if 0
551 vrc = RTFdtNodeAddF(hFdt, "its@%RX32", 0x08080000); VRC();
552 vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleIntCtrlMsi); VRC();
553 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 4, 0, 0x08080000, 0, 0x20000); VRC();
554 vrc = RTFdtNodePropertyAddU32( hFdt, "#msi-cells", 1); VRC();
555 vrc = RTFdtNodePropertyAddEmpty( hFdt, "msi-controller"); VRC();
556 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,gic-v3-its"); VRC();
557 vrc = RTFdtNodeFinalize(hFdt); VRC();
558#endif
559
560 vrc = RTFdtNodeFinalize(hFdt); VRC();
561
562 /*
563 * Configure the performance monitoring unit.
564 */
565 /** @todo Make this configurable and enable as default for Windows VMs because they assume a working PMU
566 * (which is not available in hardware on AppleSilicon).
567 */
568 InsertConfigNode(pDevices, "pmu", &pDev);
569 InsertConfigNode(pDev, "0", &pInst);
570 InsertConfigInteger(pInst, "Trusted", 1);
571 InsertConfigNode(pInst, "Config", &pCfg);
572
573 RTGCPHYS GCPhysMmioStart;
574 RTGCPHYS cbMmio;
575 if (enmGraphicsController == GraphicsControllerType_QemuRamFB)
576 {
577 hrc = pResMgr->assignMmioRegion("qemu-fw-cfg", _4K, &GCPhysMmioStart, &cbMmio); H();
578
579 InsertConfigNode(pDevices, "qemu-fw-cfg", &pDev);
580 InsertConfigNode(pDev, "0", &pInst);
581 InsertConfigNode(pInst, "Config", &pCfg);
582 InsertConfigInteger(pCfg, "MmioSize", cbMmio);
583 InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
584 InsertConfigInteger(pCfg, "DmaEnabled", 1);
585 InsertConfigInteger(pCfg, "QemuRamfbSupport", 1);
586 InsertConfigNode(pInst, "LUN#0", &pLunL0);
587 InsertConfigString(pLunL0, "Driver", "MainDisplay");
588
589 vrc = RTFdtNodeAddF(hFdt, "fw-cfg@%RGp", GCPhysMmioStart); VRC();
590 vrc = RTFdtNodePropertyAddEmpty( hFdt, "dma-coherent"); VRC();
591 vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
592 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "qemu,fw-cfg-mmio"); VRC();
593 vrc = RTFdtNodeFinalize(hFdt); VRC();
594
595 if (pSysTblsBldAcpi)
596 {
597 vrc = pSysTblsBldAcpi->addMmioDeviceNoIrq("qemu-fw-cfg", 0, GCPhysMmioStart, cbMmio);
598 VRC();
599 }
600 }
601
602 InsertConfigNode(pDevices, "flash-cfi", &pDev);
603 InsertConfigNode(pDev, "0", &pInst);
604 InsertConfigNode(pInst, "Config", &pCfg);
605 InsertConfigInteger(pCfg, "BaseAddress", GCPhysFlash);
606 InsertConfigInteger(pCfg, "Size", 768 * _1K);
607 InsertConfigString(pCfg, "FlashFile", "nvram");
608 /* Attach the NVRAM storage driver. */
609 InsertConfigNode(pInst, "LUN#0", &pLunL0);
610 InsertConfigString(pLunL0, "Driver", "NvramStore");
611
612 vrc = RTFdtNodeAddF(hFdt, "flash@%RX32", 0); VRC();
613 vrc = RTFdtNodePropertyAddU32( hFdt, "bank-width", 4); VRC();
614 vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 4,
615 GCPhysFw, cbFw, /* First region (EFI). */
616 GCPhysFlash, cbFlash); /* Second region (NVRAM). */ VRC();
617 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "cfi-flash"); VRC();
618 vrc = RTFdtNodeFinalize(hFdt); VRC();
619
620 InsertConfigNode(pDevices, "arm-pl011", &pDev);
621 for (ULONG ulInstance = 0; ulInstance < 1 /** @todo SchemaDefs::SerialPortCount*/; ++ulInstance)
622 {
623 ComPtr<ISerialPort> serialPort;
624 hrc = pMachine->GetSerialPort(ulInstance, serialPort.asOutParam()); H();
625 BOOL fEnabledSerPort = FALSE;
626 if (serialPort)
627 {
628 hrc = serialPort->COMGETTER(Enabled)(&fEnabledSerPort); H();
629 }
630 if (!fEnabledSerPort)
631 {
632 m_aeSerialPortMode[ulInstance] = PortMode_Disconnected;
633 continue;
634 }
635
636 InsertConfigNode(pDev, Utf8StrFmt("%u", ulInstance).c_str(), &pInst);
637 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
638 InsertConfigNode(pInst, "Config", &pCfg);
639
640 uint32_t iIrq = 0;
641 hrc = pResMgr->assignSingleInterrupt("arm-pl011", &iIrq); H();
642 hrc = pResMgr->assignMmioRegion("arm-pl011", _4K, &GCPhysMmioStart, &cbMmio); H();
643
644 InsertConfigInteger(pCfg, "Irq", iIrq);
645 InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
646
647 vrc = RTFdtNodeAddF(hFdt, "pl011@%RGp", GCPhysMmioStart); VRC();
648 vrc = RTFdtNodePropertyAddStringList(hFdt, "clock-names", 2, "uartclk", "apb_pclk"); VRC();
649 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "clocks", 2,
650 idPHandleAbpPClk, idPHandleAbpPClk); VRC();
651 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
652 vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
653 vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2,
654 "arm,pl011", "arm,primecell"); VRC();
655 vrc = RTFdtNodeFinalize(hFdt); VRC();
656
657 if (pSysTblsBldAcpi)
658 {
659 vrc = pSysTblsBldAcpi->addMmioDevice("arm-pl011", ulInstance, GCPhysMmioStart, cbMmio, iIrq);
660 VRC();
661 }
662
663 BOOL fServer;
664 hrc = serialPort->COMGETTER(Server)(&fServer); H();
665 hrc = serialPort->COMGETTER(Path)(bstr.asOutParam()); H();
666
667 PortMode_T eHostMode;
668 hrc = serialPort->COMGETTER(HostMode)(&eHostMode); H();
669
670 m_aeSerialPortMode[ulInstance] = eHostMode;
671 if (eHostMode != PortMode_Disconnected)
672 {
673 vrc = i_configSerialPort(pInst, eHostMode, Utf8Str(bstr).c_str(), RT_BOOL(fServer));
674 if (RT_FAILURE(vrc))
675 return vrc;
676 }
677 }
678
679 BOOL fRTCUseUTC;
680 hrc = platform->COMGETTER(RTCUseUTC)(&fRTCUseUTC); H();
681
682 uint32_t iIrq = 0;
683 hrc = pResMgr->assignSingleInterrupt("arm-pl031-rtc", &iIrq); H();
684 hrc = pResMgr->assignMmioRegion("arm-pl031-rtc", _4K, &GCPhysMmioStart, &cbMmio); H();
685 InsertConfigNode(pDevices, "arm-pl031-rtc", &pDev);
686 InsertConfigNode(pDev, "0", &pInst);
687 InsertConfigNode(pInst, "Config", &pCfg);
688 InsertConfigInteger(pCfg, "Irq", iIrq);
689 InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
690 InsertConfigInteger(pCfg, "UtcOffset", fRTCUseUTC ? 1 : 0);
691
692 vrc = RTFdtNodeAddF(hFdt, "pl032@%RGp", GCPhysMmioStart); VRC();
693 vrc = RTFdtNodePropertyAddString( hFdt, "clock-names", "apb_pclk"); VRC();
694 vrc = RTFdtNodePropertyAddU32( hFdt, "clocks", idPHandleAbpPClk); VRC();
695 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
696 vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
697 vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2,
698 "arm,pl031", "arm,primecell"); VRC();
699 vrc = RTFdtNodeFinalize(hFdt); VRC();
700
701 /* Configure gpio keys (The Windows GPIO PL061 driver doesn't like 64-bit MMIO addresses...). */
702 hrc = pResMgr->assignSingleInterrupt("arm-pl061-gpio", &iIrq); H();
703 hrc = pResMgr->assignMmio32Region("arm-pl061-gpio", _4K, &GCPhysMmioStart, &cbMmio); H();
704 InsertConfigNode(pDevices, "arm-pl061-gpio",&pDev);
705 InsertConfigNode(pDev, "0", &pInst);
706 InsertConfigNode(pInst, "Config", &pCfg);
707 InsertConfigInteger(pCfg, "Irq", iIrq);
708 InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
709 vrc = RTFdtNodeAddF(hFdt, "pl061@%RGp", GCPhysMmioStart); VRC();
710 vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleGpio); VRC();
711 vrc = RTFdtNodePropertyAddString( hFdt, "clock-names", "apb_pclk"); VRC();
712 vrc = RTFdtNodePropertyAddU32( hFdt, "clocks", idPHandleAbpPClk); VRC();
713 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
714 vrc = RTFdtNodePropertyAddEmpty( hFdt, "gpio-controller"); VRC();
715 vrc = RTFdtNodePropertyAddU32( hFdt, "#gpio-cells", 2); VRC();
716 vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2,
717 "arm,pl061", "arm,primecell"); VRC();
718 vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
719 vrc = RTFdtNodeFinalize(hFdt); VRC();
720
721 /** @todo The device isn't exposed currently as ACPI powerbutton shutdown is not implemented
722 * in the ACPI tables right now and it causes a guru with Win 11 guests because it uses
723 * SIMD instructions for MMIO accesses which we don't emulate yet.
724 * (see matching TODO in NEMR3Native-darwin-armv8.cpp):
725 *
726 * Recent W11:
727 * x0=ffffb804ea3217d8 x1=ffffe28437802000 x2=0000000000000424 x3=fffff802e5716030
728 * x4=ffffe28437802424 x5=ffffb804ea321bfc x6=000000000080009c x7=000000000080009c
729 * x8=ffff87849fefc788 x9=ffff87849fefc788 x10=000000000000001c x11=ffffb804ea32909c
730 * x12=000000000000001c x13=000000000000009c x14=ffffb804ea3290a8 x15=ffffd580b2b1f7d8
731 * x16=0000f6999080cdbe x17=0000f6999080cdbe x18=ffffd08158fbf000 x19=ffffb804ea3217d0
732 * x20=0000000000000001 x21=0000000000000004 x22=ffffb804ea321660 x23=000047fb15cdefd8
733 * x24=0000000000000000 x25=ffffb804ea2f1080 x26=0000000000000000 x27=0000000000000380
734 * x28=0000000000000000 x29=ffff87849fefc7e0 x30=fffff802e57120b0
735 * pc=fffff802e5713c20 pstate=00000000a0001344
736 * sp_el0=ffff87849fefc7e0 sp_el1=ffff87849e462400 elr_el1=fffff802e98889c8
737 * pl061gpio!start_seg1_.text+0x2c20:
738 * %fffff802e5713c20 23 00 c0 3d ldr q3, [x1]
739 * VBoxDbg> format %%(%@x1)
740 * Guest physical address: %%ffddd000
741 * VBoxDbg> info mmio
742 * MMIO registrations: 12 (186 allocated)
743 * ## Ctx Size Mapping PCI Description
744 * 0 R3 00000000000c0000 0000000004000000-00000000040bffff Flash Memory
745 * [snip]
746 * 11 R3 0000000000001000 00000000ffddd000-00000000ffdddfff PL061
747 */
748#if 0
749 if (pSysTblsBldAcpi)
750 {
751 vrc = pSysTblsBldAcpi->addMmioDevice("arm-pl061-gpio", 0, GCPhysMmioStart, cbMmio, iIrq);
752 VRC();
753 }
754#endif
755
756 InsertConfigNode(pInst, "LUN#0", &pLunL0);
757 InsertConfigString(pLunL0, "Driver", "GpioButton");
758 InsertConfigNode(pLunL0, "Config", &pCfg);
759 InsertConfigInteger(pCfg, "PowerButtonGpio", 3);
760 InsertConfigInteger(pCfg, "SleepButtonGpio", 4);
761
762 vrc = RTFdtNodeAdd(hFdt, "gpio-keys"); VRC();
763 vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "gpio-keys"); VRC();
764
765 vrc = RTFdtNodeAdd(hFdt, "poweroff"); VRC();
766 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "gpios", 3, idPHandleGpio, 3, 0); VRC();
767 vrc = RTFdtNodePropertyAddU32( hFdt, "linux,code", 0x74); VRC();
768 vrc = RTFdtNodePropertyAddString( hFdt, "label", "GPIO Key Poweroff"); VRC();
769 vrc = RTFdtNodeFinalize(hFdt); VRC();
770
771 vrc = RTFdtNodeAdd(hFdt, "suspend"); VRC();
772 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "gpios", 3, idPHandleGpio, 4, 0); VRC();
773 vrc = RTFdtNodePropertyAddU32( hFdt, "linux,code", 0xcd); VRC();
774 vrc = RTFdtNodePropertyAddString( hFdt, "label", "GPIO Key Suspend"); VRC();
775 vrc = RTFdtNodeFinalize(hFdt);
776
777 vrc = RTFdtNodeFinalize(hFdt); VRC();
778
779#if defined(VBOX_WITH_TPM)
780 /*
781 * Configure the Trusted Platform Module.
782 */
783 ComObjPtr<ITrustedPlatformModule> ptrTpm;
784 TpmType_T enmTpmType = TpmType_None;
785
786 hrc = pMachine->COMGETTER(TrustedPlatformModule)(ptrTpm.asOutParam()); H();
787 hrc = ptrTpm->COMGETTER(Type)(&enmTpmType); H();
788 if (enmTpmType != TpmType_None)
789 {
790 hrc = pResMgr->assignSingleInterrupt("tpm", &iIrq); H();
791
792 vrc = i_configTpm(ptrTpm, enmTpmType, pDevices, GCPhysTpm, iIrq /*uIrq*/,
793 GCPhysTpm + 0x5000, true /*fCrb*/); VRC();
794
795 vrc = RTFdtNodeAddF(hFdt, "tpm@%RGp", GCPhysTpm); VRC();
796 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
797 vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysTpm, cbTpm); VRC();
798 vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 1, "tcg,tpm-tis-mmio"); VRC();
799 vrc = RTFdtNodeFinalize(hFdt); VRC();
800
801 if (pSysTblsBldAcpi)
802 {
803 vrc = pSysTblsBldAcpi->configureTpm2(true /*fCrb*/, GCPhysTpm, cbTpm, iIrq);
804 VRC();
805 }
806 }
807#endif
808
809 hrc = pResMgr->assignInterrupts("pci-generic-ecam", 4 /*cInterrupts*/, &iIrq); H();
810 uint32_t aPinIrqs[] = { iIrq, iIrq + 1, iIrq + 2, iIrq + 3 };
811 RTGCPHYS GCPhysPciMmioEcam, GCPhysPciMmio, GCPhysPciMmio32;
812 RTGCPHYS cbPciMmioEcam, cbPciMmio, cbPciMmio32;
813
814 hrc = pResMgr->assignMmioRegionAligned("pci-pio", _64K, _64K, &GCPhysMmioStart, &cbMmio, false /*fOnly32Bit*/); H();
815 hrc = pResMgr->assignMmioRegion( "pci-ecam", 16 * _1M, &GCPhysPciMmioEcam, &cbPciMmioEcam); H();
816 hrc = pResMgr->assignMmio64Region( "pci-mmio", _2G, &GCPhysPciMmio, &cbPciMmio); H();
817 hrc = pResMgr->assignMmio32Region( "pci-mmio32", _256M, &GCPhysPciMmio32, &cbPciMmio32); H();
818
819 InsertConfigNode(pDevices, "pci-generic-ecam", &pDev);
820 InsertConfigNode(pDev, "0", &pInst);
821 InsertConfigNode(pInst, "Config", &pCfg);
822 InsertConfigInteger(pCfg, "MmioEcamBase", GCPhysPciMmioEcam);
823 InsertConfigInteger(pCfg, "MmioEcamLength", cbPciMmioEcam);
824 InsertConfigInteger(pCfg, "MmioPioBase", GCPhysMmioStart);
825 InsertConfigInteger(pCfg, "MmioPioSize", cbMmio);
826 InsertConfigInteger(pCfg, "IntPinA", aPinIrqs[0]);
827 InsertConfigInteger(pCfg, "IntPinB", aPinIrqs[1]);
828 InsertConfigInteger(pCfg, "IntPinC", aPinIrqs[2]);
829 InsertConfigInteger(pCfg, "IntPinD", aPinIrqs[3]);
830 vrc = RTFdtNodeAddF(hFdt, "pcie@%RGp", GCPhysPciMmio); VRC();
831 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupt-map-mask", 4, 0xf800, 0, 0, 7); VRC();
832
833 uint32_t aIrqCells[32 * 4 * 10]; RT_ZERO(aIrqCells); /* Maximum of 32 devices on the root bus, each supporting 4 interrupts (INTA# ... INTD#). */
834 uint32_t *pau32IrqCell = &aIrqCells[0];
835 uint32_t iIrqPinSwizzle = 0;
836
837 for (uint32_t i = 0; i < 32; i++)
838 {
839 for (uint32_t iIrqPin = 0; iIrqPin < 4; iIrqPin++)
840 {
841 pau32IrqCell[0] = i << 11; /* The dev part, composed as dev.fn. */
842 pau32IrqCell[1] = 0;
843 pau32IrqCell[2] = 0;
844 pau32IrqCell[3] = iIrqPin + 1;
845 pau32IrqCell[4] = idPHandleIntCtrl;
846 pau32IrqCell[5] = 0;
847 pau32IrqCell[6] = 0;
848 pau32IrqCell[7] = 0;
849 pau32IrqCell[8] = aPinIrqs[(iIrqPinSwizzle + iIrqPin) % RT_ELEMENTS(aPinIrqs)];
850 pau32IrqCell[9] = 0x04;
851 pau32IrqCell += 10;
852 }
853
854 iIrqPinSwizzle++;
855 }
856
857 vrc = RTFdtNodePropertyAddCellsU32AsArray(hFdt, "interrupt-map", RT_ELEMENTS(aIrqCells), &aIrqCells[0]);
858 vrc = RTFdtNodePropertyAddU32( hFdt, "#interrupt-cells", 1); VRC();
859 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "ranges", 21,
860 0x1000000, 0, 0,
861 GCPhysMmioStart >> 32, GCPhysMmioStart, cbMmio >> 32, cbMmio,
862 0x2000000, GCPhysPciMmio32 >> 32, GCPhysPciMmio32, GCPhysPciMmio32 >> 32, GCPhysPciMmio32,
863 cbPciMmio32 >> 32, cbPciMmio32,
864 0x3000000, GCPhysPciMmio >> 32, GCPhysPciMmio, GCPhysPciMmio >> 32, GCPhysPciMmio,
865 cbPciMmio >> 32, cbPciMmio); VRC();
866 vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysPciMmioEcam, cbPciMmioEcam); VRC();
867 /** @todo msi-map */
868 vrc = RTFdtNodePropertyAddEmpty( hFdt, "dma-coherent"); VRC();
869 vrc = RTFdtNodePropertyAddCellsU32(hFdt, "bus-range", 2, 0, 0xf); VRC();
870 vrc = RTFdtNodePropertyAddU32( hFdt, "linux,pci-domain", 0); VRC();
871 vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC();
872 vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 3); VRC();
873 vrc = RTFdtNodePropertyAddString( hFdt, "device_type", "pci"); VRC();
874 vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "pci-host-ecam-generic"); VRC();
875 vrc = RTFdtNodeFinalize(hFdt); VRC();
876
877 if (pSysTblsBldAcpi)
878 {
879 vrc = pSysTblsBldAcpi->configurePcieRootBus("pci-generic-ecam", aPinIrqs, GCPhysMmioStart, GCPhysPciMmioEcam,
880 cbPciMmioEcam, GCPhysMmioStart, cbMmio, GCPhysPciMmio32, cbPciMmio32);
881 VRC();
882 }
883
884 /*
885 * VMSVGA compliant graphics controller.
886 */
887 if ( enmGraphicsController != GraphicsControllerType_QemuRamFB
888 && enmGraphicsController != GraphicsControllerType_Null)
889 {
890 vrc = i_configGraphicsController(pDevices, enmGraphicsController, pBusMgr, pMachine,
891 pGraphicsAdapter, firmwareSettings,
892 true /*fForceVmSvga3*/, false /*fExposeLegacyVga*/); VRC();
893 }
894
895 /*
896 * The USB Controllers and input devices.
897 */
898#if 0 /** @todo Make us of this and disallow PS/2 for ARM VMs for now. */
899 KeyboardHIDType_T aKbdHID;
900 hrc = pMachine->COMGETTER(KeyboardHIDType)(&aKbdHID); H();
901#endif
902
903 PointingHIDType_T aPointingHID;
904 hrc = pMachine->COMGETTER(PointingHIDType)(&aPointingHID); H();
905
906 PCFGMNODE pUsbDevices = NULL;
907 vrc = i_configUsb(pMachine, pBusMgr, pRoot, pDevices, KeyboardHIDType_USBKeyboard, aPointingHID, &pUsbDevices);
908
909 /*
910 * Storage controllers.
911 */
912 bool fFdcEnabled = false;
913 vrc = i_configStorageCtrls(pMachine, pBusMgr, pVMM, pUVM,
914 pDevices, pUsbDevices, NULL /*pBiosCfg*/, &fFdcEnabled); VRC();
915
916 /*
917 * Network adapters
918 */
919 std::list<BootNic> llBootNics;
920 vrc = i_configNetworkCtrls(pMachine, pPlatformProperties, chipsetType, pBusMgr,
921 pVMM, pUVM, pDevices, pUsbDevices, llBootNics); VRC();
922
923 /*
924 * The VMM device.
925 */
926 vrc = i_configVmmDev(pMachine, pBusMgr, pDevices, true /*fMmioReq*/); VRC();
927
928 /*
929 * Audio configuration.
930 */
931 bool fAudioEnabled = false;
932 vrc = i_configAudioCtrl(virtualBox, pMachine, pBusMgr, pDevices,
933 false /*fOsXGuest*/, &fAudioEnabled); VRC();
934
935 /*
936 * Configure DBGF (Debug(ger) Facility) and DBGC (Debugger Console).
937 */
938 vrc = i_configGuestDbg(virtualBox, pMachine, pRoot); VRC();
939 }
940 catch (ConfigError &x)
941 {
942 RTFdtDestroy(hFdt);
943
944 // InsertConfig threw something:
945 pVMM->pfnVMR3SetError(pUVM, x.m_vrc, RT_SRC_POS, "Caught ConfigError: %Rrc - %s", x.m_vrc, x.what());
946 return x.m_vrc;
947 }
948 catch (HRESULT hrcXcpt)
949 {
950 RTFdtDestroy(hFdt);
951 AssertLogRelMsgFailedReturn(("hrc=%Rhrc\n", hrcXcpt), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR);
952 }
953
954#ifdef VBOX_WITH_EXTPACK
955 /*
956 * Call the extension pack hooks if everything went well thus far.
957 */
958 if (RT_SUCCESS(vrc))
959 {
960 pAlock->release();
961 vrc = mptrExtPackManager->i_callAllVmConfigureVmmHooks(this, pVM, pVMM);
962 pAlock->acquire();
963 }
964#endif
965
966#if 0
967 vrc = RTFdtNodeAdd(hFdt, "chosen"); VRC();
968 vrc = RTFdtNodePropertyAddString( hFdt, "stdout-path", "pl011@9000000"); VRC();
969 vrc = RTFdtNodePropertyAddString( hFdt, "stdin-path", "pl011@9000000"); VRC();
970 vrc = RTFdtNodeFinalize(hFdt);
971#endif
972
973 /* Finalize the FDT and add it to the resource store. */
974 vrc = RTFdtFinalize(hFdt);
975 AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
976
977 RTVFSFILE hVfsFileDesc = NIL_RTVFSFILE;
978 vrc = RTVfsMemFileCreate(NIL_RTVFSIOSTREAM, 0 /*cbEstimate*/, &hVfsFileDesc);
979 AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
980 RTVFSIOSTREAM hVfsIosDesc = RTVfsFileToIoStream(hVfsFileDesc);
981 AssertRelease(hVfsIosDesc != NIL_RTVFSIOSTREAM);
982
983 /* Initialize the VBox platform descriptor. */
984 VBOXPLATFORMARMV8 ArmV8Platform; RT_ZERO(ArmV8Platform);
985
986 vrc = RTFdtDumpToVfsIoStrm(hFdt, RTFDTTYPE_DTB, 0 /*fFlags*/, hVfsIosDesc, NULL /*pErrInfo*/);
987 uint64_t cbFdt = 0;
988 if (RT_SUCCESS(vrc))
989 vrc = RTVfsFileQuerySize(hVfsFileDesc, &cbFdt);
990 AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
991
992 vrc = RTVfsIoStrmZeroFill(hVfsIosDesc, (RTFOFF)(RT_ALIGN_64(cbFdt, _64K) - cbFdt));
993 AssertRCReturn(vrc, vrc);
994
995 cbFdt = RT_ALIGN_64(cbFdt, _64K);
996
997 RTGCPHYS GCPhysMmioStart;
998 RTGCPHYS cbMmio;
999 hrc = pResMgr->queryMmioRegion(&GCPhysMmioStart, &cbMmio);
1000 Assert(SUCCEEDED(hrc));
1001
1002 RTGCPHYS GCPhysMmio32Start;
1003 RTGCPHYS cbMmio32;
1004 hrc = pResMgr->queryMmio32Region(&GCPhysMmio32Start, &cbMmio32);
1005 Assert(SUCCEEDED(hrc));
1006
1007 RTGCPHYS GCPhysXsdp = NIL_RTGCPHYS;
1008 size_t cbAcpiXsdp = 0;
1009 size_t cbAcpi = 0;
1010 if (pSysTblsBldAcpi)
1011 {
1012 vrc = pSysTblsBldAcpi->finishTables(GCPhysPlatformDesc + cbFdt,
1013 hVfsIosDesc, &GCPhysXsdp, &cbAcpiXsdp, &cbAcpi);
1014 AssertRCReturn(vrc, vrc);
1015 Assert( GCPhysXsdp > GCPhysPlatformDesc
1016 && GCPhysXsdp < VBOXPLATFORMARMV8_PHYS_ADDR);
1017
1018 /* Dump the ACPI table for debugging purposes if requested. */
1019 Bstr SysTblsDumpVal;
1020 hrc = mMachine->GetExtraData(Bstr("VBoxInternal2/DumpSysTables").raw(),
1021 SysTblsDumpVal.asOutParam());
1022 if ( hrc == S_OK
1023 && SysTblsDumpVal.isNotEmpty())
1024 {
1025 vrc = pSysTblsBldAcpi->dumpTables(Utf8Str(SysTblsDumpVal).c_str());
1026 AssertRCReturn(vrc, vrc);
1027 }
1028
1029 delete pSysTblsBldAcpi;
1030
1031 vrc = RTVfsIoStrmZeroFill(hVfsIosDesc, (RTFOFF)(RT_ALIGN_64(cbAcpi, _64K) - cbAcpi));
1032 AssertRCReturn(vrc, vrc);
1033
1034 cbAcpi = RT_ALIGN_64(cbAcpi, _64K);
1035 }
1036
1037 /* Fill the room until the end where the platform descriptor lives. */
1038 vrc = RTVfsIoStrmZeroFill(hVfsIosDesc, cbPlatformDesc - sizeof(ArmV8Platform) - cbFdt - cbAcpi);
1039 AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
1040
1041 RTGCPHYS GCPhysMmio = 0;
1042 RTGCPHYS cbMmioAbove4G = 0;
1043 pResMgr->queryMmioRegion(&GCPhysMmio, &cbMmioAbove4G);
1044
1045 ArmV8Platform.u32Magic = VBOXPLATFORMARMV8_MAGIC;
1046 ArmV8Platform.u32Version = VBOXPLATFORMARMV8_VERSION;
1047 ArmV8Platform.cbDesc = sizeof(ArmV8Platform);
1048 ArmV8Platform.fFlags = 0;
1049 ArmV8Platform.u64PhysAddrRamBase = GCPhysRamBase;
1050 ArmV8Platform.cbRamBase = cbRamBase;
1051 ArmV8Platform.i64OffFdt = (int64_t)GCPhysPlatformDesc - VBOXPLATFORMARMV8_PHYS_ADDR;
1052 ArmV8Platform.cbFdt = cbFdt;
1053 if (cbAcpi)
1054 {
1055 ArmV8Platform.i64OffAcpi = (int64_t)(GCPhysPlatformDesc + cbFdt) - VBOXPLATFORMARMV8_PHYS_ADDR;
1056 ArmV8Platform.cbAcpi = cbAcpi;
1057 ArmV8Platform.i64OffAcpiXsdp = (int64_t)GCPhysXsdp - VBOXPLATFORMARMV8_PHYS_ADDR;
1058 ArmV8Platform.cbAcpiXsdp = cbAcpiXsdp;
1059 }
1060 ArmV8Platform.i64OffUefiRom = (int64_t)GCPhysFw - VBOXPLATFORMARMV8_PHYS_ADDR;
1061 ArmV8Platform.cbUefiRom = _64M;
1062 ArmV8Platform.i64OffMmio = GCPhysMmio ? (int64_t)GCPhysMmio - VBOXPLATFORMARMV8_PHYS_ADDR : 0;
1063 ArmV8Platform.cbMmio = cbMmioAbove4G;
1064 ArmV8Platform.i64OffMmio32 = (int64_t)(_4G - _512M) - VBOXPLATFORMARMV8_PHYS_ADDR;
1065 ArmV8Platform.cbMmio32 = _512M - _2M; /* Just assign the whole MMIO hole (except for the platform descriptor region). */
1066
1067 /* Add the VBox platform descriptor to the resource store. */
1068 vrc = RTVfsIoStrmWrite(hVfsIosDesc, &ArmV8Platform, sizeof(ArmV8Platform), true /*fBlocking*/, NULL /*pcbWritten*/);
1069 RTVfsIoStrmRelease(hVfsIosDesc);
1070 vrc = mptrResourceStore->i_addItem("resources", "VBoxArmV8Desc", hVfsFileDesc);
1071 RTVfsFileRelease(hVfsFileDesc);
1072 AssertRCReturn(vrc, vrc);
1073
1074 /* Dump the DTB for debugging purposes if requested. */
1075 Bstr DtbDumpVal;
1076 hrc = mMachine->GetExtraData(Bstr("VBoxInternal2/DumpDtb").raw(),
1077 DtbDumpVal.asOutParam());
1078 if ( hrc == S_OK
1079 && DtbDumpVal.isNotEmpty())
1080 {
1081 vrc = RTFdtDumpToFile(hFdt, RTFDTTYPE_DTB, 0 /*fFlags*/, Utf8Str(DtbDumpVal).c_str(), NULL /*pErrInfo*/);
1082 AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
1083 }
1084
1085 pResMgr->dumpMemoryRegionsToReleaseLog();
1086
1087 delete pResMgr; /* Delete the address/interrupt assignment manager. */
1088
1089 /*
1090 * Apply the CFGM overlay.
1091 */
1092 if (RT_SUCCESS(vrc))
1093 vrc = i_configCfgmOverlay(pRoot, virtualBox, pMachine);
1094
1095 /*
1096 * Dump all extradata API settings tweaks, both global and per VM.
1097 */
1098 if (RT_SUCCESS(vrc))
1099 vrc = i_configDumpAPISettingsTweaks(virtualBox, pMachine);
1100
1101#undef H
1102
1103 pAlock->release(); /* Avoid triggering the lock order inversion check. */
1104
1105 /*
1106 * Register VM state change handler.
1107 */
1108 int vrc2 = pVMM->pfnVMR3AtStateRegister(pUVM, Console::i_vmstateChangeCallback, this);
1109 AssertRC(vrc2);
1110 if (RT_SUCCESS(vrc))
1111 vrc = vrc2;
1112
1113 /*
1114 * Register VM runtime error handler.
1115 */
1116 vrc2 = pVMM->pfnVMR3AtRuntimeErrorRegister(pUVM, Console::i_atVMRuntimeErrorCallback, this);
1117 AssertRC(vrc2);
1118 if (RT_SUCCESS(vrc))
1119 vrc = vrc2;
1120
1121 pAlock->acquire();
1122
1123 LogFlowFunc(("vrc = %Rrc\n", vrc));
1124 LogFlowFuncLeave();
1125
1126 return vrc;
1127}
1128#endif /* !VBOX_WITH_VIRT_ARMV8 */
1129
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