ConsoleImplConfigArmV8.cpp@ 106955

Last change on this file since 106955 was 106476, checked in by vboxsync, 4 months ago
VMMArm: Skeleton of the PMU device emulation enough to make Windows/ARM boot as a guest and have it out of the NEM darwin backend, bugref:10778
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 50.6 KB

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1	/* $Id: ConsoleImplConfigArmV8.cpp 106476 2024-10-18 12:57:36Z vboxsync $ */
2	/** @file
3	* VBox Console COM Class implementation - VM Configuration Bits for ARMv8.
4	*/
5
6	/*
7	* Copyright (C) 2023-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_MAIN_CONSOLE
33	#include "LoggingNew.h"
34
35	#include "ConsoleImpl.h"
36	#include "ResourceStoreImpl.h"
37	#include "Global.h"
38	#include "VMMDev.h"
39
40	// generated header
41	#include "SchemaDefs.h"
42
43	#include "AutoCaller.h"
44
45	#include <iprt/buildconfig.h>
46	#include <iprt/ctype.h>
47	#include <iprt/dir.h>
48	#include <iprt/fdt.h>
49	#include <iprt/file.h>
50	#include <iprt/param.h>
51	#include <iprt/path.h>
52	#include <iprt/string.h>
53	#include <iprt/system.h>
54	#if 0 /* enable to play with lots of memory. */
55	# include <iprt/env.h>
56	#endif
57	#include <iprt/stream.h>
58
59	#include <iprt/formats/arm-psci.h>
60
61	#include <VBox/vmm/vmmr3vtable.h>
62	#include <VBox/vmm/vmapi.h>
63	#include <VBox/err.h>
64	#include <VBox/param.h>
65	#include <VBox/version.h>
66	#include <VBox/platforms/vbox-armv8.h>
67
68	#include "BusAssignmentManager.h"
69	#include "ResourceAssignmentManager.h"
70	#include "SystemTableBuilder.h"
71	#ifdef VBOX_WITH_EXTPACK
72	# include "ExtPackManagerImpl.h"
73	#endif
74
75
76	/*********************************************************************************************************************************
77	* Internal Functions *
78	*********************************************************************************************************************************/
79
80	/* Darwin compile kludge */
81	#undef PVM
82
83	#ifdef VBOX_WITH_VIRT_ARMV8
84	/**
85	* Worker for configConstructor.
86	*
87	* @return VBox status code.
88	* @param pUVM The user mode VM handle.
89	* @param pVM The cross context VM handle.
90	* @param pVMM The VMM vtable.
91	* @param pAlock The automatic lock instance. This is for when we have
92	* to leave it in order to avoid deadlocks (ext packs and
93	* more).
94	*/
95	int Console::i_configConstructorArmV8(PUVM pUVM, PVM pVM, PCVMMR3VTABLE pVMM, AutoWriteLock *pAlock)
96	{
97	RT_NOREF(pVM /* when everything is disabled */);
98	ComPtr<IMachine> pMachine = i_machine();
99
100	HRESULT hrc;
101	Utf8Str strTmp;
102	Bstr bstr;
103
104	RTFDT hFdt = NIL_RTFDT;
105	int vrc = RTFdtCreateEmpty(&hFdt);
106	AssertRCReturn(vrc, vrc);
107
108	#define H() AssertLogRelMsgReturnStmt(!FAILED(hrc), ("hrc=%Rhrc\n", hrc), RTFdtDestroy(hFdt), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR)
109	#define VRC() AssertLogRelMsgReturnStmt(RT_SUCCESS(vrc), ("vrc=%Rrc\n", vrc), RTFdtDestroy(hFdt), vrc)
110
111	/*
112	* Get necessary objects and frequently used parameters.
113	*/
114	ComPtr<IVirtualBox> virtualBox;
115	hrc = pMachine->COMGETTER(Parent)(virtualBox.asOutParam()); H();
116
117	ComPtr<IHost> host;
118	hrc = virtualBox->COMGETTER(Host)(host.asOutParam()); H();
119
120	PlatformArchitecture_T platformArchHost;
121	hrc = host->COMGETTER(Architecture)(&platformArchHost); H();
122
123	ComPtr<ISystemProperties> systemProperties;
124	hrc = virtualBox->COMGETTER(SystemProperties)(systemProperties.asOutParam()); H();
125
126	ComPtr<IFirmwareSettings> firmwareSettings;
127	hrc = pMachine->COMGETTER(FirmwareSettings)(firmwareSettings.asOutParam()); H();
128
129	ComPtr<INvramStore> nvramStore;
130	hrc = pMachine->COMGETTER(NonVolatileStore)(nvramStore.asOutParam()); H();
131
132	hrc = pMachine->COMGETTER(HardwareUUID)(bstr.asOutParam()); H();
133	RTUUID HardwareUuid;
134	vrc = RTUuidFromUtf16(&HardwareUuid, bstr.raw());
135	AssertRCReturn(vrc, vrc);
136
137	ULONG cRamMBs;
138	hrc = pMachine->COMGETTER(MemorySize)(&cRamMBs); H();
139	uint64_t const cbRam = cRamMBs * (uint64_t)_1M;
140
141	ComPtr<IPlatform> platform;
142	hrc = pMachine->COMGETTER(Platform)(platform.asOutParam()); H();
143
144	/* Note: Should be guarded by VBOX_WITH_VIRT_ARMV8, but we check this anyway here. */
145	#if 1 /* For now we only support running ARM VMs on ARM hosts. */
146	PlatformArchitecture_T platformArchMachine;
147	hrc = platform->COMGETTER(Architecture)(&platformArchMachine); H();
148	if (platformArchMachine != platformArchHost)
149	return pVMM->pfnVMR3SetError(pUVM, VERR_PLATFORM_ARCH_NOT_SUPPORTED, RT_SRC_POS,
150	N_("VM platform architecture (%s) not supported on this host (%s)."),
151	Global::stringifyPlatformArchitecture(platformArchMachine),
152	Global::stringifyPlatformArchitecture(platformArchHost));
153	#endif
154
155	/* Get the ARM platform object. */
156	ComPtr<IPlatformARM> platformARM;
157	hrc = platform->COMGETTER(ARM)(platformARM.asOutParam()); H();
158
159	ComPtr<IPlatformProperties> pPlatformProperties;
160	hrc = platform->COMGETTER(Properties)(pPlatformProperties.asOutParam()); H();
161
162	ChipsetType_T chipsetType;
163	hrc = platform->COMGETTER(ChipsetType)(&chipsetType); H();
164
165	ULONG cCpus = 1;
166	hrc = pMachine->COMGETTER(CPUCount)(&cCpus); H();
167	Assert(cCpus);
168
169	ULONG ulCpuExecutionCap = 100;
170	hrc = pMachine->COMGETTER(CPUExecutionCap)(&ulCpuExecutionCap); H();
171
172	VMExecutionEngine_T enmExecEngine = VMExecutionEngine_NotSet;
173	hrc = pMachine->COMGETTER(VMExecutionEngine)(&enmExecEngine); H();
174
175	if ( enmExecEngine != VMExecutionEngine_Default
176	&& enmExecEngine != VMExecutionEngine_NativeApi)
177	{
178	return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
179	N_("The ARM backend doesn't support any other execution engine than 'default' or 'native-api' right now."));
180	}
181
182	LogRel(("Guest architecture: ARM\n"));
183
184	Bstr osTypeId;
185	hrc = pMachine->COMGETTER(OSTypeId)(osTypeId.asOutParam()); H();
186	LogRel(("Guest OS type: '%s'\n", Utf8Str(osTypeId).c_str()));
187
188	BusAssignmentManager *pBusMgr = mBusMgr = BusAssignmentManager::createInstance(pVMM, chipsetType, IommuType_None);
189	ResourceAssignmentManager *pResMgr = ResourceAssignmentManager::createInstance(pVMM, chipsetType, IommuType_None,
190	RT_MAX(_1G + cbRam, _4G), /GCPhysMmio/
191	_1G, /GCPhysRam/
192	VBOXPLATFORMARMV8_PHYS_ADDR + _1M, /GCPhysMmio32Start/
193	_1G - (VBOXPLATFORMARMV8_PHYS_ADDR + _1M), /cbMmio32/
194	32 /cInterrupts/);
195	SystemTableBuilder *pSysTblsBldAcpi = NULL;
196
197	/*
198	* ACPI
199	*/
200	BOOL fACPI;
201	hrc = firmwareSettings->COMGETTER(ACPIEnabled)(&fACPI); H();
202	if (fACPI)
203	pSysTblsBldAcpi = SystemTableBuilder::createInstance(kSystemTableType_Acpi);
204
205
206	/*
207	* Get root node first.
208	* This is the only node in the tree.
209	*/
210	PCFGMNODE pRoot = pVMM->pfnCFGMR3GetRootU(pUVM);
211	Assert(pRoot);
212
213	RTGCPHYS GCPhysRam = NIL_RTGCPHYS;
214
215	// catching throws from InsertConfigString and friends.
216	try
217	{
218
219	/*
220	* Set the root (and VMM) level values.
221	*/
222	hrc = pMachine->COMGETTER(Name)(bstr.asOutParam()); H();
223	InsertConfigString(pRoot, "Name", bstr);
224	InsertConfigBytes(pRoot, "UUID", &HardwareUuid, sizeof(HardwareUuid));
225	InsertConfigInteger(pRoot, "NumCPUs", cCpus);
226	InsertConfigInteger(pRoot, "CpuExecutionCap", ulCpuExecutionCap);
227	InsertConfigInteger(pRoot, "TimerMillies", 10);
228
229	/*
230	* NEM
231	*/
232	PCFGMNODE pNEM;
233	InsertConfigNode(pRoot, "NEM", &pNEM);
234
235	uint32_t idPHandleIntCtrl = RTFdtPHandleAllocate(hFdt);
236	Assert(idPHandleIntCtrl != UINT32_MAX);
237	uint32_t idPHandleIntCtrlMsi = RTFdtPHandleAllocate(hFdt);
238	Assert(idPHandleIntCtrlMsi != UINT32_MAX); RT_NOREF(idPHandleIntCtrlMsi);
239	uint32_t idPHandleAbpPClk = RTFdtPHandleAllocate(hFdt);
240	Assert(idPHandleAbpPClk != UINT32_MAX);
241	uint32_t idPHandleGpio = RTFdtPHandleAllocate(hFdt);
242	Assert(idPHandleGpio != UINT32_MAX);
243
244	uint32_t aidPHandleCpus[VMM_MAX_CPU_COUNT];
245	for (uint32_t i = 0; i < cCpus; i++)
246	{
247	aidPHandleCpus[i] = RTFdtPHandleAllocate(hFdt);
248	Assert(aidPHandleCpus[i] != UINT32_MAX);
249	}
250
251	vrc = RTFdtNodePropertyAddU32( hFdt, "interrupt-parent", idPHandleIntCtrl); VRC();
252	vrc = RTFdtNodePropertyAddString(hFdt, "model", "linux,dummy-virt"); VRC();
253	vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC();
254	vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 2); VRC();
255	vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "linux,dummy-virt"); VRC();
256
257	/* Configure the Power State Coordination Interface. */
258	vrc = RTFdtNodeAdd(hFdt, "psci"); VRC();
259	vrc = RTFdtNodePropertyAddU32( hFdt, "migrate", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_MIGRATE)); VRC();
260	vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_on", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_CPU_ON)); VRC();
261	vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_off", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_CPU_OFF)); VRC();
262	vrc = RTFdtNodePropertyAddU32( hFdt, "cpu_suspend", ARM_PSCI_FUNC_ID_CREATE_FAST_32(ARM_PSCI_FUNC_ID_CPU_SUSPEND)); VRC();
263	vrc = RTFdtNodePropertyAddString(hFdt, "method", "hvc"); VRC();
264	vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 3,
265	"arm,psci-1.0", "arm,psci-0.2", "arm,psci"); VRC();
266	vrc = RTFdtNodeFinalize(hFdt); VRC();
267
268	/* Configure the timer and clock. */
269	InsertConfigInteger(pNEM, "VTimerInterrupt", 0xb);
270	vrc = RTFdtNodeAdd(hFdt, "timer"); VRC();
271	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 12,
272	0x01, 0x0d, 0x104,
273	0x01, 0x0e, 0x104,
274	0x01, 0x0b, 0x104,
275	0x01, 0x0a, 0x104); VRC();
276	vrc = RTFdtNodePropertyAddEmpty( hFdt, "always-on"); VRC();
277	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,armv8-timer"); VRC();
278	vrc = RTFdtNodeFinalize(hFdt);
279
280	vrc = RTFdtNodeAdd(hFdt, "apb-clk"); VRC();
281	vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleAbpPClk); VRC();
282	vrc = RTFdtNodePropertyAddString( hFdt, "clock-output-names", "clk24mhz"); VRC();
283	vrc = RTFdtNodePropertyAddU32( hFdt, "clock-frequency", 24 * 1000 * 1000); VRC();
284	vrc = RTFdtNodePropertyAddU32( hFdt, "#clock-cells", 0); VRC();
285	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "fixed-clock"); VRC();
286	vrc = RTFdtNodeFinalize(hFdt);
287
288	if (pSysTblsBldAcpi)
289	{
290	vrc = pSysTblsBldAcpi->configureClock();
291	VRC();
292	}
293
294	/*
295	* MM values.
296	*/
297	PCFGMNODE pMM;
298	InsertConfigNode(pRoot, "MM", &pMM);
299
300	/*
301	* Memory setup.
302	*/
303	PCFGMNODE pMem = NULL;
304	InsertConfigNode(pMM, "MemRegions", &pMem);
305
306	hrc = pResMgr->assignRamRegion("Conventional", cbRam, &GCPhysRam); H();
307
308	PCFGMNODE pMemRegion = NULL;
309	InsertConfigNode(pMem, "Conventional", &pMemRegion);
310	InsertConfigInteger(pMemRegion, "GCPhysStart", GCPhysRam);
311	InsertConfigInteger(pMemRegion, "Size", cbRam);
312
313	vrc = RTFdtNodeAddF(hFdt, "memory@%RGp", GCPhysRam); VRC();
314	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysRam, cbRam); VRC();
315	vrc = RTFdtNodePropertyAddString( hFdt, "device_type", "memory"); VRC();
316	vrc = RTFdtNodeFinalize(hFdt); VRC();
317
318	if (pSysTblsBldAcpi)
319	{
320	vrc = pSysTblsBldAcpi->addMemory(GCPhysRam, cbRam);
321	VRC();
322	}
323
324	/* Configure the CPUs in the system, only one socket and cluster at the moment. */
325	vrc = RTFdtNodeAdd(hFdt, "cpus"); VRC();
326	vrc = RTFdtNodePropertyAddU32(hFdt, "#size-cells", 0); VRC();
327	vrc = RTFdtNodePropertyAddU32(hFdt, "#address-cells", 1); VRC();
328
329	vrc = RTFdtNodeAdd(hFdt, "socket0"); VRC();
330	vrc = RTFdtNodeAdd(hFdt, "cluster0"); VRC();
331
332	for (uint32_t i = 0; i < cCpus; i++)
333	{
334	vrc = RTFdtNodeAddF(hFdt, "core%u", i); VRC();
335	vrc = RTFdtNodePropertyAddU32(hFdt, "cpu", aidPHandleCpus[i]); VRC();
336	vrc = RTFdtNodeFinalize(hFdt); VRC();
337	}
338
339	vrc = RTFdtNodeFinalize(hFdt); VRC();
340	vrc = RTFdtNodeFinalize(hFdt); VRC();
341
342	for (uint32_t i = 0; i < cCpus; i++)
343	{
344	vrc = RTFdtNodeAddF(hFdt, "cpu@%u", i); VRC();
345	vrc = RTFdtNodePropertyAddU32(hFdt, "phandle", aidPHandleCpus[i]); VRC();
346	vrc = RTFdtNodePropertyAddU32(hFdt, "reg", i); VRC();
347	vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "arm,cortex-a15"); VRC();
348	vrc = RTFdtNodePropertyAddString(hFdt, "device_type", "cpu"); VRC();
349	if (cCpus > 1)
350	{
351	vrc = RTFdtNodePropertyAddString(hFdt, "enable-method", "psci"); VRC();
352	}
353	vrc = RTFdtNodeFinalize(hFdt); VRC();
354
355	if (pSysTblsBldAcpi)
356	{
357	vrc = pSysTblsBldAcpi->addCpu(i);
358	VRC();
359	}
360	}
361
362	vrc = RTFdtNodeFinalize(hFdt); VRC();
363
364
365	/*
366	* CPUM values.
367	*/
368	PCFGMNODE pCpum;
369	InsertConfigNode(pRoot, "CPUM", &pCpum);
370
371	/* Nested Virtualization. */
372	BOOL fNestedHWVirt = FALSE;
373	hrc = platformARM->GetCPUProperty(CPUPropertyTypeARM_HWVirt, &fNestedHWVirt); H();
374	InsertConfigInteger(pCpum, "NestedHWVirt", fNestedHWVirt ? true : false);
375
376
377	/*
378	* PDM config.
379	* Load drivers in VBoxC.[so\|dll]
380	*/
381	vrc = i_configPdm(pMachine, pVMM, pUVM, pRoot); VRC();
382
383
384	/*
385	* VGA.
386	*/
387	ComPtr<IGraphicsAdapter> pGraphicsAdapter;
388	hrc = pMachine->COMGETTER(GraphicsAdapter)(pGraphicsAdapter.asOutParam()); H();
389	GraphicsControllerType_T enmGraphicsController;
390	hrc = pGraphicsAdapter->COMGETTER(GraphicsControllerType)(&enmGraphicsController); H();
391
392	/*
393	* Devices
394	*/
395	PCFGMNODE pDevices = NULL; /* /Devices */
396	PCFGMNODE pDev = NULL; /* /Devices/Dev/ */
397	PCFGMNODE pInst = NULL; /* /Devices/Dev/0/ */
398	PCFGMNODE pCfg = NULL; /* /Devices/Dev/.../Config/ */
399	PCFGMNODE pLunL0 = NULL; /* /Devices/Dev/0/LUN#0/ */
400	PCFGMNODE pLunL1 = NULL; /* /Devices/Dev/0/LUN#0/AttachedDriver/ */
401
402	InsertConfigNode(pRoot, "Devices", &pDevices);
403
404	InsertConfigNode(pDevices, "pci-generic-ecam-bridge", NULL);
405
406	InsertConfigNode(pDevices, "platform", &pDev);
407	InsertConfigNode(pDev, "0", &pInst);
408	InsertConfigNode(pInst, "Config", &pCfg);
409	InsertConfigNode(pInst, "LUN#0", &pLunL0);
410	InsertConfigString(pLunL0, "Driver", "ResourceStore");
411
412	/* Add the resources. */
413	PCFGMNODE pResources = NULL; /* /Devices/platform/Config/Resources */
414	PCFGMNODE pRes = NULL; /* /Devices/platform/Config/Resources/<Resource> */
415	InsertConfigString(pCfg, "ResourceNamespace", "resources");
416	InsertConfigNode(pCfg, "Resources", &pResources);
417	InsertConfigNode(pResources, "EfiRom", &pRes);
418	InsertConfigInteger(pRes, "RegisterAsRom", 1);
419	InsertConfigInteger(pRes, "GCPhysLoadAddress", 0);
420
421	/** @todo r=aeichner 32-bit guests and query the firmware type from VBoxSVC. */
422	/*
423	* Firmware.
424	*/
425	FirmwareType_T eFwType = FirmwareType_EFI64;
426	#ifdef VBOX_WITH_EFI_IN_DD2
427	const char *pszEfiRomFile = eFwType == FirmwareType_EFIDUAL ? "<INVALID>"
428	: eFwType == FirmwareType_EFI32 ? "VBoxEFIAArch32.fd"
429	: "VBoxEFIAArch64.fd";
430	const char *pszKey = "ResourceId";
431	#else
432	Utf8Str efiRomFile;
433	vrc = findEfiRom(virtualBox, PlatformArchitecture_ARM, eFwType, &efiRomFile);
434	AssertRCReturn(vrc, vrc);
435	const char *pszEfiRomFile = efiRomFile.c_str();
436	const char *pszKey = "Filename";
437	#endif
438	InsertConfigString(pRes, pszKey, pszEfiRomFile);
439
440	InsertConfigNode(pResources, "ArmV8Desc", &pRes);
441	InsertConfigInteger(pRes, "RegisterAsRom", 1);
442	InsertConfigInteger(pRes, "GCPhysLoadAddress", VBOXPLATFORMARMV8_PHYS_ADDR);
443	InsertConfigString(pRes, "ResourceId", "VBoxArmV8Desc");
444
445	/*
446	* Configure the interrupt controller.
447	*/
448	RTGCPHYS GCPhysIntcDist;
449	RTGCPHYS GCPhysIntcReDist;
450	RTGCPHYS cbMmioIntcDist;
451	RTGCPHYS cbMmioIntcReDist;
452
453	/* Each vCPU needs on re-distributor, this would allow for up to 256 vCPUs in the future. */
454	hrc = pResMgr->assignMmioRegion("gic", 256 * _64K, &GCPhysIntcReDist, &cbMmioIntcReDist); H();
455	hrc = pResMgr->assignMmioRegion("gic", _64K, &GCPhysIntcDist, &cbMmioIntcDist); H();
456
457	#ifndef RT_OS_LINUX
458	InsertConfigNode(pDevices, "gic", &pDev);
459	#else
460	/* On Linux we default to the KVM in-kernel GIC for now. */
461	InsertConfigNode(pDevices, "gic-nem", &pDev);
462	#endif
463	InsertConfigNode(pDev, "0", &pInst);
464	InsertConfigInteger(pInst, "Trusted", 1);
465	InsertConfigNode(pInst, "Config", &pCfg);
466	InsertConfigInteger(pCfg, "DistributorMmioBase", GCPhysIntcDist);
467	InsertConfigInteger(pCfg, "RedistributorMmioBase", GCPhysIntcReDist);
468
469	vrc = RTFdtNodeAddF(hFdt, "intc@%RGp", GCPhysIntcDist); VRC();
470	vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleIntCtrl); VRC();
471	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 4,
472	GCPhysIntcDist, cbMmioIntcDist, /* Distributor */
473	GCPhysIntcReDist, cbMmioIntcReDist); /* Re-Distributor */ VRC();
474	vrc = RTFdtNodePropertyAddU32( hFdt, "#redistributor-regions", 1); VRC();
475	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,gic-v3"); VRC();
476	vrc = RTFdtNodePropertyAddEmpty( hFdt, "ranges"); VRC();
477	vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC();
478	vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 2); VRC();
479	vrc = RTFdtNodePropertyAddEmpty( hFdt, "interrupt-controller"); VRC();
480	vrc = RTFdtNodePropertyAddU32( hFdt, "#interrupt-cells", 3); VRC();
481
482	if (pSysTblsBldAcpi)
483	{
484	vrc = pSysTblsBldAcpi->configureGic(cCpus, GCPhysIntcDist, cbMmioIntcDist,
485	GCPhysIntcReDist, cbMmioIntcReDist);
486	VRC();
487	}
488
489	#if 0
490	vrc = RTFdtNodeAddF(hFdt, "its@%RX32", 0x08080000); VRC();
491	vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleIntCtrlMsi); VRC();
492	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "reg", 4, 0, 0x08080000, 0, 0x20000); VRC();
493	vrc = RTFdtNodePropertyAddU32( hFdt, "#msi-cells", 1); VRC();
494	vrc = RTFdtNodePropertyAddEmpty( hFdt, "msi-controller"); VRC();
495	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "arm,gic-v3-its"); VRC();
496	vrc = RTFdtNodeFinalize(hFdt); VRC();
497	#endif
498
499	vrc = RTFdtNodeFinalize(hFdt); VRC();
500
501	/*
502	* Configure the perofrmance monitoring unit.
503	*/
504	/** @todo Make this configurable and enable as default for Windows VMs because they assume a working PMU
505	* (which is not available in hardware on AppleSilicon).
506	*/
507	InsertConfigNode(pDevices, "pmu", &pDev);
508	InsertConfigNode(pDev, "0", &pInst);
509	InsertConfigInteger(pInst, "Trusted", 1);
510	InsertConfigNode(pInst, "Config", &pCfg);
511
512	RTGCPHYS GCPhysMmioStart;
513	RTGCPHYS cbMmio;
514	if (enmGraphicsController == GraphicsControllerType_QemuRamFB)
515	{
516	hrc = pResMgr->assignMmioRegion("qemu-fw-cfg", _4K, &GCPhysMmioStart, &cbMmio); H();
517
518	InsertConfigNode(pDevices, "qemu-fw-cfg", &pDev);
519	InsertConfigNode(pDev, "0", &pInst);
520	InsertConfigNode(pInst, "Config", &pCfg);
521	InsertConfigInteger(pCfg, "MmioSize", cbMmio);
522	InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
523	InsertConfigInteger(pCfg, "DmaEnabled", 1);
524	InsertConfigInteger(pCfg, "QemuRamfbSupport", 1);
525	InsertConfigNode(pInst, "LUN#0", &pLunL0);
526	InsertConfigString(pLunL0, "Driver", "MainDisplay");
527
528	vrc = RTFdtNodeAddF(hFdt, "fw-cfg@%RGp", GCPhysMmioStart); VRC();
529	vrc = RTFdtNodePropertyAddEmpty( hFdt, "dma-coherent"); VRC();
530	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
531	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "qemu,fw-cfg-mmio"); VRC();
532	vrc = RTFdtNodeFinalize(hFdt); VRC();
533
534	if (pSysTblsBldAcpi)
535	{
536	vrc = pSysTblsBldAcpi->addMmioDeviceNoIrq("qemu-fw-cfg", 0, GCPhysMmioStart, cbMmio);
537	VRC();
538	}
539	}
540
541	InsertConfigNode(pDevices, "flash-cfi", &pDev);
542	InsertConfigNode(pDev, "0", &pInst);
543	InsertConfigNode(pInst, "Config", &pCfg);
544	InsertConfigInteger(pCfg, "BaseAddress", 64 * _1M);
545	InsertConfigInteger(pCfg, "Size", 768 * _1K);
546	InsertConfigString(pCfg, "FlashFile", "nvram");
547	/* Attach the NVRAM storage driver. */
548	InsertConfigNode(pInst, "LUN#0", &pLunL0);
549	InsertConfigString(pLunL0, "Driver", "NvramStore");
550
551	vrc = RTFdtNodeAddF(hFdt, "flash@%RX32", 0); VRC();
552	vrc = RTFdtNodePropertyAddU32( hFdt, "bank-width", 4); VRC();
553	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 4,
554	0, 0x04000000, /* First region (EFI). */
555	0x04000000, 0x04000000); /* Second region (NVRAM). */ VRC();
556	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "cfi-flash"); VRC();
557	vrc = RTFdtNodeFinalize(hFdt); VRC();
558
559	InsertConfigNode(pDevices, "arm-pl011", &pDev);
560	for (ULONG ulInstance = 0; ulInstance < 1 /** @todo SchemaDefs::SerialPortCount*/; ++ulInstance)
561	{
562	ComPtr<ISerialPort> serialPort;
563	hrc = pMachine->GetSerialPort(ulInstance, serialPort.asOutParam()); H();
564	BOOL fEnabledSerPort = FALSE;
565	if (serialPort)
566	{
567	hrc = serialPort->COMGETTER(Enabled)(&fEnabledSerPort); H();
568	}
569	if (!fEnabledSerPort)
570	{
571	m_aeSerialPortMode[ulInstance] = PortMode_Disconnected;
572	continue;
573	}
574
575	InsertConfigNode(pDev, Utf8StrFmt("%u", ulInstance).c_str(), &pInst);
576	InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
577	InsertConfigNode(pInst, "Config", &pCfg);
578
579	uint32_t iIrq = 0;
580	hrc = pResMgr->assignSingleInterrupt("arm-pl011", &iIrq); H();
581	hrc = pResMgr->assignMmioRegion("arm-pl011", _4K, &GCPhysMmioStart, &cbMmio); H();
582
583	InsertConfigInteger(pCfg, "Irq", iIrq);
584	InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
585
586	vrc = RTFdtNodeAddF(hFdt, "pl011@%RGp", GCPhysMmioStart); VRC();
587	vrc = RTFdtNodePropertyAddStringList(hFdt, "clock-names", 2, "uartclk", "apb_pclk"); VRC();
588	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "clocks", 2,
589	idPHandleAbpPClk, idPHandleAbpPClk); VRC();
590	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
591	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
592	vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2,
593	"arm,pl011", "arm,primecell"); VRC();
594	vrc = RTFdtNodeFinalize(hFdt); VRC();
595
596	if (pSysTblsBldAcpi)
597	{
598	vrc = pSysTblsBldAcpi->addMmioDevice("arm-pl011", ulInstance, GCPhysMmioStart, cbMmio, iIrq);
599	VRC();
600	}
601
602	BOOL fServer;
603	hrc = serialPort->COMGETTER(Server)(&fServer); H();
604	hrc = serialPort->COMGETTER(Path)(bstr.asOutParam()); H();
605
606	PortMode_T eHostMode;
607	hrc = serialPort->COMGETTER(HostMode)(&eHostMode); H();
608
609	m_aeSerialPortMode[ulInstance] = eHostMode;
610	if (eHostMode != PortMode_Disconnected)
611	{
612	vrc = i_configSerialPort(pInst, eHostMode, Utf8Str(bstr).c_str(), RT_BOOL(fServer));
613	if (RT_FAILURE(vrc))
614	return vrc;
615	}
616	}
617
618	BOOL fRTCUseUTC;
619	hrc = platform->COMGETTER(RTCUseUTC)(&fRTCUseUTC); H();
620
621	uint32_t iIrq = 0;
622	hrc = pResMgr->assignSingleInterrupt("arm-pl031-rtc", &iIrq); H();
623	hrc = pResMgr->assignMmioRegion("arm-pl031-rtc", _4K, &GCPhysMmioStart, &cbMmio); H();
624	InsertConfigNode(pDevices, "arm-pl031-rtc", &pDev);
625	InsertConfigNode(pDev, "0", &pInst);
626	InsertConfigNode(pInst, "Config", &pCfg);
627	InsertConfigInteger(pCfg, "Irq", iIrq);
628	InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
629	InsertConfigInteger(pCfg, "UtcOffset", fRTCUseUTC ? 1 : 0);
630
631	vrc = RTFdtNodeAddF(hFdt, "pl032@%RGp", GCPhysMmioStart); VRC();
632	vrc = RTFdtNodePropertyAddString( hFdt, "clock-names", "apb_pclk"); VRC();
633	vrc = RTFdtNodePropertyAddU32( hFdt, "clocks", idPHandleAbpPClk); VRC();
634	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
635	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
636	vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2,
637	"arm,pl031", "arm,primecell"); VRC();
638	vrc = RTFdtNodeFinalize(hFdt); VRC();
639
640	/* Configure gpio keys. */
641	hrc = pResMgr->assignSingleInterrupt("arm-pl061-gpio", &iIrq); H();
642	hrc = pResMgr->assignMmioRegion("arm-pl061-gpio", _4K, &GCPhysMmioStart, &cbMmio); H();
643	InsertConfigNode(pDevices, "arm-pl061-gpio",&pDev);
644	InsertConfigNode(pDev, "0", &pInst);
645	InsertConfigNode(pInst, "Config", &pCfg);
646	InsertConfigInteger(pCfg, "Irq", iIrq);
647	InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
648	vrc = RTFdtNodeAddF(hFdt, "pl061@%RGp", GCPhysMmioStart); VRC();
649	vrc = RTFdtNodePropertyAddU32( hFdt, "phandle", idPHandleGpio); VRC();
650	vrc = RTFdtNodePropertyAddString( hFdt, "clock-names", "apb_pclk"); VRC();
651	vrc = RTFdtNodePropertyAddU32( hFdt, "clocks", idPHandleAbpPClk); VRC();
652	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
653	vrc = RTFdtNodePropertyAddEmpty( hFdt, "gpio-controller"); VRC();
654	vrc = RTFdtNodePropertyAddU32( hFdt, "#gpio-cells", 2); VRC();
655	vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 2,
656	"arm,pl061", "arm,primecell"); VRC();
657	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
658	vrc = RTFdtNodeFinalize(hFdt); VRC();
659
660	if (pSysTblsBldAcpi)
661	{
662	vrc = pSysTblsBldAcpi->addMmioDevice("arm-pl061-gpio", 0, GCPhysMmioStart, _4K, iIrq);
663	VRC();
664	}
665
666	InsertConfigNode(pInst, "LUN#0", &pLunL0);
667	InsertConfigString(pLunL0, "Driver", "GpioButton");
668	InsertConfigNode(pLunL0, "Config", &pCfg);
669	InsertConfigInteger(pCfg, "PowerButtonGpio", 3);
670	InsertConfigInteger(pCfg, "SleepButtonGpio", 4);
671
672	vrc = RTFdtNodeAdd(hFdt, "gpio-keys"); VRC();
673	vrc = RTFdtNodePropertyAddString(hFdt, "compatible", "gpio-keys"); VRC();
674
675	vrc = RTFdtNodeAdd(hFdt, "poweroff"); VRC();
676	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "gpios", 3, idPHandleGpio, 3, 0); VRC();
677	vrc = RTFdtNodePropertyAddU32( hFdt, "linux,code", 0x74); VRC();
678	vrc = RTFdtNodePropertyAddString( hFdt, "label", "GPIO Key Poweroff"); VRC();
679	vrc = RTFdtNodeFinalize(hFdt); VRC();
680
681	vrc = RTFdtNodeAdd(hFdt, "suspend"); VRC();
682	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "gpios", 3, idPHandleGpio, 4, 0); VRC();
683	vrc = RTFdtNodePropertyAddU32( hFdt, "linux,code", 0xcd); VRC();
684	vrc = RTFdtNodePropertyAddString( hFdt, "label", "GPIO Key Suspend"); VRC();
685	vrc = RTFdtNodeFinalize(hFdt);
686
687	vrc = RTFdtNodeFinalize(hFdt); VRC();
688
689	hrc = pResMgr->assignInterrupts("pci-generic-ecam", 4 /cInterrupts/, &iIrq); H();
690	uint32_t aPinIrqs[] = { iIrq, iIrq + 1, iIrq + 2, iIrq + 3 };
691	RTGCPHYS GCPhysPciMmioEcam, GCPhysPciMmio, GCPhysPciMmio32;
692	RTGCPHYS cbPciMmioEcam, cbPciMmio, cbPciMmio32;
693	hrc = pResMgr->assignMmioRegionAligned("pci-pio", _64K, _64K, &GCPhysMmioStart, &cbMmio); H();
694	hrc = pResMgr->assignMmioRegion( "pci-ecam", 16 * _1M, &GCPhysPciMmioEcam, &cbPciMmioEcam); H();
695	hrc = pResMgr->assignMmioRegion( "pci-mmio", _2G, &GCPhysPciMmio, &cbPciMmio); H();
696	hrc = pResMgr->assignMmio32Region( "pci-mmio32", _1G - VBOXPLATFORMARMV8_PHYS_ADDR - _1M, &GCPhysPciMmio32, &cbPciMmio32); H();
697
698	InsertConfigNode(pDevices, "pci-generic-ecam", &pDev);
699	InsertConfigNode(pDev, "0", &pInst);
700	InsertConfigNode(pInst, "Config", &pCfg);
701	InsertConfigInteger(pCfg, "MmioEcamBase", GCPhysPciMmioEcam);
702	InsertConfigInteger(pCfg, "MmioEcamLength", cbPciMmioEcam);
703	InsertConfigInteger(pCfg, "MmioPioBase", GCPhysMmioStart);
704	InsertConfigInteger(pCfg, "MmioPioSize", cbMmio);
705	InsertConfigInteger(pCfg, "IntPinA", aPinIrqs[0]);
706	InsertConfigInteger(pCfg, "IntPinB", aPinIrqs[1]);
707	InsertConfigInteger(pCfg, "IntPinC", aPinIrqs[2]);
708	InsertConfigInteger(pCfg, "IntPinD", aPinIrqs[3]);
709	vrc = RTFdtNodeAddF(hFdt, "pcie@%RGp", GCPhysPciMmio); VRC();
710	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupt-map-mask", 4, 0xf800, 0, 0, 7); VRC();
711
712	uint32_t aIrqCells[32 * 4 * 10]; RT_ZERO(aIrqCells); /* Maximum of 32 devices on the root bus, each supporting 4 interrupts (INTA# ... INTD#). */
713	uint32_t *pau32IrqCell = &aIrqCells[0];
714	uint32_t iIrqPinSwizzle = 0;
715
716	for (uint32_t i = 0; i < 32; i++)
717	{
718	for (uint32_t iIrqPin = 0; iIrqPin < 4; iIrqPin++)
719	{
720	pau32IrqCell[0] = i << 11; /* The dev part, composed as dev.fn. */
721	pau32IrqCell[1] = 0;
722	pau32IrqCell[2] = 0;
723	pau32IrqCell[3] = iIrqPin + 1;
724	pau32IrqCell[4] = idPHandleIntCtrl;
725	pau32IrqCell[5] = 0;
726	pau32IrqCell[6] = 0;
727	pau32IrqCell[7] = 0;
728	pau32IrqCell[8] = aPinIrqs[(iIrqPinSwizzle + iIrqPin) % RT_ELEMENTS(aPinIrqs)];
729	pau32IrqCell[9] = 0x04;
730	pau32IrqCell += 10;
731	}
732
733	iIrqPinSwizzle++;
734	}
735
736	vrc = RTFdtNodePropertyAddCellsU32AsArray(hFdt, "interrupt-map", RT_ELEMENTS(aIrqCells), &aIrqCells[0]);
737	vrc = RTFdtNodePropertyAddU32( hFdt, "#interrupt-cells", 1); VRC();
738	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "ranges", 21,
739	0x1000000, 0, 0,
740	GCPhysMmioStart >> 32, GCPhysMmioStart, cbMmio >> 32, cbMmio,
741	0x2000000, GCPhysPciMmio32 >> 32, GCPhysPciMmio32, GCPhysPciMmio32 >> 32, GCPhysPciMmio32,
742	cbPciMmio32 >> 32, cbPciMmio32,
743	0x3000000, GCPhysPciMmio >> 32, GCPhysPciMmio, GCPhysPciMmio >> 32, GCPhysPciMmio,
744	cbPciMmio >> 32, cbPciMmio); VRC();
745	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysPciMmioEcam, cbPciMmioEcam); VRC();
746	/** @todo msi-map */
747	vrc = RTFdtNodePropertyAddEmpty( hFdt, "dma-coherent"); VRC();
748	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "bus-range", 2, 0, 0xf); VRC();
749	vrc = RTFdtNodePropertyAddU32( hFdt, "linux,pci-domain", 0); VRC();
750	vrc = RTFdtNodePropertyAddU32( hFdt, "#size-cells", 2); VRC();
751	vrc = RTFdtNodePropertyAddU32( hFdt, "#address-cells", 3); VRC();
752	vrc = RTFdtNodePropertyAddString( hFdt, "device_type", "pci"); VRC();
753	vrc = RTFdtNodePropertyAddString( hFdt, "compatible", "pci-host-ecam-generic"); VRC();
754	vrc = RTFdtNodeFinalize(hFdt); VRC();
755
756	if (pSysTblsBldAcpi)
757	{
758	vrc = pSysTblsBldAcpi->configurePcieRootBus("pci-generic-ecam", aPinIrqs, GCPhysMmioStart, GCPhysPciMmioEcam,
759	cbPciMmioEcam, GCPhysMmioStart, cbMmio, GCPhysPciMmio32, cbPciMmio32);
760	VRC();
761	}
762
763	#if defined(VBOX_WITH_TPM)
764	/*
765	* Configure the Trusted Platform Module.
766	*/
767	ComObjPtr<ITrustedPlatformModule> ptrTpm;
768	TpmType_T enmTpmType = TpmType_None;
769
770	hrc = pMachine->COMGETTER(TrustedPlatformModule)(ptrTpm.asOutParam()); H();
771	hrc = ptrTpm->COMGETTER(Type)(&enmTpmType); H();
772	if (enmTpmType != TpmType_None)
773	{
774	hrc = pResMgr->assignSingleInterrupt("tpm", &iIrq); H();
775	hrc = pResMgr->assignMmioRegion("tpm", 5 * _1K, &GCPhysMmioStart, &cbMmio); H();
776
777	InsertConfigNode(pDevices, "tpm", &pDev);
778	InsertConfigNode(pDev, "0", &pInst);
779	InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
780	InsertConfigNode(pInst, "Config", &pCfg);
781	InsertConfigInteger(pCfg, "MmioBase", GCPhysMmioStart);
782	InsertConfigInteger(pCfg, "Irq", iIrq);
783	//InsertConfigInteger(pCfg, "Crb", 1); /* boolean */
784
785	InsertConfigNode(pInst, "LUN#0", &pLunL0);
786
787	switch (enmTpmType)
788	{
789	case TpmType_v1_2:
790	case TpmType_v2_0:
791	InsertConfigString(pLunL0, "Driver", "TpmEmuTpms");
792	InsertConfigNode(pLunL0, "Config", &pCfg);
793	InsertConfigInteger(pCfg, "TpmVersion", enmTpmType == TpmType_v1_2 ? 1 : 2);
794	InsertConfigNode(pLunL0, "AttachedDriver", &pLunL1);
795	InsertConfigString(pLunL1, "Driver", "NvramStore");
796	break;
797	case TpmType_Host:
798	#if defined(RT_OS_LINUX) \|\| defined(RT_OS_WINDOWS)
799	InsertConfigString(pLunL0, "Driver", "TpmHost");
800	InsertConfigNode(pLunL0, "Config", &pCfg);
801	#endif
802	break;
803	case TpmType_Swtpm:
804	hrc = ptrTpm->COMGETTER(Location)(bstr.asOutParam()); H();
805	InsertConfigString(pLunL0, "Driver", "TpmEmu");
806	InsertConfigNode(pLunL0, "Config", &pCfg);
807	InsertConfigString(pCfg, "Location", bstr);
808	break;
809	default:
810	AssertFailedBreak();
811	}
812
813	vrc = RTFdtNodeAddF(hFdt, "tpm@%RGp", GCPhysMmioStart); VRC();
814	vrc = RTFdtNodePropertyAddCellsU32(hFdt, "interrupts", 3, 0x00, iIrq, 0x04); VRC();
815	vrc = RTFdtNodePropertyAddCellsU64(hFdt, "reg", 2, GCPhysMmioStart, cbMmio); VRC();
816	vrc = RTFdtNodePropertyAddStringList(hFdt, "compatible", 1, "tcg,tpm-tis-mmio"); VRC();
817	vrc = RTFdtNodeFinalize(hFdt); VRC();
818
819	if (pSysTblsBldAcpi)
820	{
821	vrc = pSysTblsBldAcpi->configureTpm2(false /fCrb/, GCPhysMmioStart, cbMmio, iIrq);
822	VRC();
823	}
824
825	#if 0
826	/* Add the device for the physical presence interface. */
827	InsertConfigNode( pDevices, "tpm-ppi", &pDev);
828	InsertConfigNode( pDev, "0", &pInst);
829	InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
830	InsertConfigNode( pInst, "Config", &pCfg);
831	InsertConfigInteger(pCfg, "MmioBase", TPM_PPI_MMIO_BASE_DEFAULT);
832	#endif
833	}
834	#endif
835
836	/*
837	* VMSVGA compliant graphics controller.
838	*/
839	if ( enmGraphicsController != GraphicsControllerType_QemuRamFB
840	&& enmGraphicsController != GraphicsControllerType_Null)
841	{
842	vrc = i_configGraphicsController(pDevices, enmGraphicsController, pBusMgr, pMachine,
843	pGraphicsAdapter, firmwareSettings,
844	true /fForceVmSvga3/, false /fExposeLegacyVga/); VRC();
845	}
846
847	/*
848	* The USB Controllers and input devices.
849	*/
850	#if 0 /** @todo Make us of this and disallow PS/2 for ARM VMs for now. */
851	KeyboardHIDType_T aKbdHID;
852	hrc = pMachine->COMGETTER(KeyboardHIDType)(&aKbdHID); H();
853	#endif
854
855	PointingHIDType_T aPointingHID;
856	hrc = pMachine->COMGETTER(PointingHIDType)(&aPointingHID); H();
857
858	PCFGMNODE pUsbDevices = NULL;
859	vrc = i_configUsb(pMachine, pBusMgr, pRoot, pDevices, KeyboardHIDType_USBKeyboard, aPointingHID, &pUsbDevices);
860
861	/*
862	* Storage controllers.
863	*/
864	bool fFdcEnabled = false;
865	vrc = i_configStorageCtrls(pMachine, pBusMgr, pVMM, pUVM,
866	pDevices, pUsbDevices, NULL /pBiosCfg/, &fFdcEnabled); VRC();
867
868	/*
869	* Network adapters
870	*/
871	std::list<BootNic> llBootNics;
872	vrc = i_configNetworkCtrls(pMachine, pPlatformProperties, chipsetType, pBusMgr,
873	pVMM, pUVM, pDevices, llBootNics); VRC();
874
875	/*
876	* The VMM device.
877	*/
878	vrc = i_configVmmDev(pMachine, pBusMgr, pDevices, true /fMmioReq/); VRC();
879
880	/*
881	* Audio configuration.
882	*/
883	bool fAudioEnabled = false;
884	vrc = i_configAudioCtrl(virtualBox, pMachine, pBusMgr, pDevices,
885	false /fOsXGuest/, &fAudioEnabled); VRC();
886	}
887	catch (ConfigError &x)
888	{
889	RTFdtDestroy(hFdt);
890
891	// InsertConfig threw something:
892	pVMM->pfnVMR3SetError(pUVM, x.m_vrc, RT_SRC_POS, "Caught ConfigError: %Rrc - %s", x.m_vrc, x.what());
893	return x.m_vrc;
894	}
895	catch (HRESULT hrcXcpt)
896	{
897	RTFdtDestroy(hFdt);
898	AssertLogRelMsgFailedReturn(("hrc=%Rhrc\n", hrcXcpt), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR);
899	}
900
901	#ifdef VBOX_WITH_EXTPACK
902	/*
903	* Call the extension pack hooks if everything went well thus far.
904	*/
905	if (RT_SUCCESS(vrc))
906	{
907	pAlock->release();
908	vrc = mptrExtPackManager->i_callAllVmConfigureVmmHooks(this, pVM, pVMM);
909	pAlock->acquire();
910	}
911	#endif
912
913	#if 0
914	vrc = RTFdtNodeAdd(hFdt, "chosen"); VRC();
915	vrc = RTFdtNodePropertyAddString( hFdt, "stdout-path", "pl011@9000000"); VRC();
916	vrc = RTFdtNodePropertyAddString( hFdt, "stdin-path", "pl011@9000000"); VRC();
917	vrc = RTFdtNodeFinalize(hFdt);
918	#endif
919
920	/* Finalize the FDT and add it to the resource store. */
921	vrc = RTFdtFinalize(hFdt);
922	AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
923
924	RTVFSFILE hVfsFileDesc = NIL_RTVFSFILE;
925	vrc = RTVfsMemFileCreate(NIL_RTVFSIOSTREAM, 0 /cbEstimate/, &hVfsFileDesc);
926	AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
927	RTVFSIOSTREAM hVfsIosDesc = RTVfsFileToIoStream(hVfsFileDesc);
928	AssertRelease(hVfsIosDesc != NIL_RTVFSIOSTREAM);
929
930	/* Initialize the VBox platform descriptor. */
931	VBOXPLATFORMARMV8 ArmV8Platform; RT_ZERO(ArmV8Platform);
932
933	/* Make room for the descriptor at the beginning. */
934	vrc = RTVfsIoStrmZeroFill(hVfsIosDesc, sizeof(ArmV8Platform));
935	AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
936
937	vrc = RTFdtDumpToVfsIoStrm(hFdt, RTFDTTYPE_DTB, 0 /fFlags/, hVfsIosDesc, NULL /pErrInfo/);
938	uint64_t cbFdt = 0;
939	if (RT_SUCCESS(vrc))
940	{
941	vrc = RTVfsFileQuerySize(hVfsFileDesc, &cbFdt);
942	cbFdt -= sizeof(ArmV8Platform);
943	}
944	AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
945
946	vrc = RTVfsIoStrmZeroFill(hVfsIosDesc, (RTFOFF)(RT_ALIGN_64(cbFdt, _64K) - cbFdt));
947	AssertRCReturn(vrc, vrc);
948
949	RTGCPHYS GCPhysMmioStart;
950	RTGCPHYS cbMmio;
951	hrc = pResMgr->queryMmioRegion(&GCPhysMmioStart, &cbMmio);
952	Assert(SUCCEEDED(hrc));
953
954	RTGCPHYS GCPhysMmio32Start;
955	RTGCPHYS cbMmio32;
956	hrc = pResMgr->queryMmio32Region(&GCPhysMmio32Start, &cbMmio32);
957	Assert(SUCCEEDED(hrc));
958
959	RTGCPHYS GCPhysXsdp = NIL_RTGCPHYS;
960	size_t cbAcpiXsdp = 0;
961	size_t cbAcpi = 0;
962	if (pSysTblsBldAcpi)
963	{
964	vrc = pSysTblsBldAcpi->finishTables(VBOXPLATFORMARMV8_PHYS_ADDR + sizeof(ArmV8Platform) + RT_ALIGN_64(cbFdt, _64K),
965	hVfsIosDesc, &GCPhysXsdp, &cbAcpiXsdp, &cbAcpi);
966	AssertRCReturn(vrc, vrc);
967	Assert(GCPhysXsdp > VBOXPLATFORMARMV8_PHYS_ADDR);
968
969	/* Dump the ACPI table for debugging purposes if requested. */
970	Bstr SysTblsDumpVal;
971	hrc = mMachine->GetExtraData(Bstr("VBoxInternal2/DumpSysTables").raw(),
972	SysTblsDumpVal.asOutParam());
973	if ( hrc == S_OK
974	&& SysTblsDumpVal.isNotEmpty())
975	{
976	vrc = pSysTblsBldAcpi->dumpTables(Utf8Str(SysTblsDumpVal).c_str());
977	AssertRCReturn(vrc, vrc);
978	}
979
980	delete pSysTblsBldAcpi;
981
982	vrc = RTVfsIoStrmZeroFill(hVfsIosDesc, (RTFOFF)(RT_ALIGN_64(cbAcpi, _64K) - cbAcpi));
983	AssertRCReturn(vrc, vrc);
984	}
985
986	ArmV8Platform.u32Magic = VBOXPLATFORMARMV8_MAGIC;
987	ArmV8Platform.u32Version = VBOXPLATFORMARMV8_VERSION;
988	ArmV8Platform.cbDesc = sizeof(ArmV8Platform);
989	ArmV8Platform.fFlags = 0;
990	ArmV8Platform.u64PhysAddrRamBase = GCPhysRam;
991	ArmV8Platform.cbRamBase = cbRam;
992	ArmV8Platform.i64OffFdt = sizeof(ArmV8Platform);
993	ArmV8Platform.cbFdt = RT_ALIGN_64(cbFdt, _64K);
994	if (cbAcpi)
995	{
996	ArmV8Platform.i64OffAcpi = sizeof(ArmV8Platform) + RT_ALIGN_64(cbFdt, _64K);
997	ArmV8Platform.cbAcpi = RT_ALIGN_64(cbAcpi, _64K);
998	ArmV8Platform.i64OffAcpiXsdp = GCPhysXsdp - VBOXPLATFORMARMV8_PHYS_ADDR;
999	ArmV8Platform.cbAcpiXsdp = cbAcpiXsdp;
1000	}
1001	ArmV8Platform.i64OffUefiRom = -128 * _1M;
1002	ArmV8Platform.cbUefiRom = _64M;
1003	ArmV8Platform.i64OffMmio = GCPhysMmioStart - _128M;
1004	ArmV8Platform.cbMmio = cbMmio;
1005	ArmV8Platform.i64OffMmio32 = GCPhysMmio32Start - _128M;
1006	ArmV8Platform.cbMmio32 = cbMmio32;
1007
1008	/* Add the VBox platform descriptor to the resource store. */
1009	vrc = RTVfsIoStrmWriteAt(hVfsIosDesc, 0, &ArmV8Platform, sizeof(ArmV8Platform), true /fBlocking/, NULL /pcbWritten/);
1010	RTVfsIoStrmRelease(hVfsIosDesc);
1011	vrc = mptrResourceStore->i_addItem("resources", "VBoxArmV8Desc", hVfsFileDesc);
1012	RTVfsFileRelease(hVfsFileDesc);
1013	AssertRCReturn(vrc, vrc);
1014
1015	/* Dump the DTB for debugging purposes if requested. */
1016	Bstr DtbDumpVal;
1017	hrc = mMachine->GetExtraData(Bstr("VBoxInternal2/DumpDtb").raw(),
1018	DtbDumpVal.asOutParam());
1019	if ( hrc == S_OK
1020	&& DtbDumpVal.isNotEmpty())
1021	{
1022	vrc = RTFdtDumpToFile(hFdt, RTFDTTYPE_DTB, 0 /fFlags/, Utf8Str(DtbDumpVal).c_str(), NULL /pErrInfo/);
1023	AssertRCReturnStmt(vrc, RTFdtDestroy(hFdt), vrc);
1024	}
1025
1026	delete pResMgr; /* Delete the address/interrupt assignment manager. */
1027
1028	/*
1029	* Apply the CFGM overlay.
1030	*/
1031	if (RT_SUCCESS(vrc))
1032	vrc = i_configCfgmOverlay(pRoot, virtualBox, pMachine);
1033
1034	/*
1035	* Dump all extradata API settings tweaks, both global and per VM.
1036	*/
1037	if (RT_SUCCESS(vrc))
1038	vrc = i_configDumpAPISettingsTweaks(virtualBox, pMachine);
1039
1040	#undef H
1041
1042	pAlock->release(); /* Avoid triggering the lock order inversion check. */
1043
1044	/*
1045	* Register VM state change handler.
1046	*/
1047	int vrc2 = pVMM->pfnVMR3AtStateRegister(pUVM, Console::i_vmstateChangeCallback, this);
1048	AssertRC(vrc2);
1049	if (RT_SUCCESS(vrc))
1050	vrc = vrc2;
1051
1052	/*
1053	* Register VM runtime error handler.
1054	*/
1055	vrc2 = pVMM->pfnVMR3AtRuntimeErrorRegister(pUVM, Console::i_atVMRuntimeErrorCallback, this);
1056	AssertRC(vrc2);
1057	if (RT_SUCCESS(vrc))
1058	vrc = vrc2;
1059
1060	pAlock->acquire();
1061
1062	LogFlowFunc(("vrc = %Rrc\n", vrc));
1063	LogFlowFuncLeave();
1064
1065	return vrc;
1066	}
1067	#endif /* !VBOX_WITH_VIRT_ARMV8 */
1068

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source: vbox/trunk/src/VBox/Main/src-client/ConsoleImplConfigArmV8.cpp@ 106955

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