1 | ; $Id: ASMCpuId.asm 69111 2017-10-17 14:26:02Z vboxsync $
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2 | ;; @file
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3 | ; IPRT - ASMCpuIdExSlow().
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4 | ;
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5 |
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6 | ;
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7 | ; Copyright (C) 2012-2017 Oracle Corporation
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8 | ;
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9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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10 | ; available from http://www.virtualbox.org. This file is free software;
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11 | ; you can redistribute it and/or modify it under the terms of the GNU
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12 | ; General Public License (GPL) as published by the Free Software
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13 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | ;
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17 | ; The contents of this file may alternatively be used under the terms
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18 | ; of the Common Development and Distribution License Version 1.0
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19 | ; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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20 | ; VirtualBox OSE distribution, in which case the provisions of the
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21 | ; CDDL are applicable instead of those of the GPL.
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22 | ;
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23 | ; You may elect to license modified versions of this file under the
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24 | ; terms and conditions of either the GPL or the CDDL or both.
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25 | ;
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26 |
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27 | ;*******************************************************************************
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28 | ;* Header Files *
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29 | ;*******************************************************************************
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30 | %include "iprt/asmdefs.mac"
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31 |
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32 | BEGINCODE
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33 |
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34 | ;;
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35 | ; CPUID with EAX input, returning ALL output registers (no NULL checking).
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36 | ;
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37 | ; @param uOperator 8086:bp+4 x86:ebp+8 gcc:rdi msc:rcx
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38 | ; @param pvEAX 8086:bp+8 x86:ebp+0c gcc:rsi msc:rdx
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39 | ; @param pvEBX 8086:bp+0c x86:ebp+10 gcc:rdx msc:r8
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40 | ; @param pvECX 8086:bp+10 x86:ebp+14 gcc:rcx msc:r9
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41 | ; @param pvEDX 8086:bp+14 x86:ebp+18 gcc:r8 msc:rbp+30h
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42 | ;
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43 | ; DECLASM(void) ASMCpuId(uint32_t uOperator, void *pvEAX, void *pvEBX, void *pvECX, void *pvEDX);
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44 | ;
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45 | BEGINPROC_EXPORTED ASMCpuId
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46 | push xBP
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47 | mov xBP, xSP
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48 | push xBX
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49 |
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50 | %ifdef ASM_CALL64_MSC
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51 | %if ARCH_BITS != 64
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52 | %error ARCH_BITS mismatch?
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53 | %endif
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54 | mov eax, ecx
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55 | mov r10, rdx
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56 | cpuid
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57 | mov [r10], eax
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58 | mov [r8], ebx
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59 | mov [r9], ecx
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60 | mov r10, [rbp+30h]
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61 | mov [r10], edx
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62 |
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63 | %elifdef ASM_CALL64_GCC
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64 | mov eax, edi
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65 | mov r10, rdx
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66 | mov r11, rcx
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67 | cpuid
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68 | mov [rsi], eax
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69 | mov [r10], ebx
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70 | mov [r11], ecx
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71 | mov [r8], edx
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72 |
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73 | %elif ARCH_BITS == 32
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74 | mov eax, [xBP + 08h]
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75 | cpuid
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76 | push edx
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77 | mov edx, [xBP + 0ch]
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78 | mov [edx], eax
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79 | mov edx, [xBP + 10h]
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80 | mov [edx], ebx
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81 | mov edx, [xBP + 14h]
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82 | mov [edx], ecx
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83 | mov edx, [xBP + 18h]
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84 | pop dword [edx]
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85 |
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86 | %elif ARCH_BITS == 16
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87 | push es
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88 | push di
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89 |
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90 | mov eax, [xBP + 04h]
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91 | cpuid
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92 | les di, [xBP + 08h]
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93 | mov [di], eax
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94 | les di, [xBP + 0ch]
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95 | mov [di], ebx
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96 | les di, [xBP + 10h]
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97 | mov [di], ecx
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98 | les di, [xBP + 14h]
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99 | mov [di], edx
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100 |
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101 | pop di
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102 | pop es
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103 | %else
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104 | %error unsupported arch
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105 | %endif
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106 |
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107 | pop xBX
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108 | leave
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109 | ret
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110 | ENDPROC ASMCpuId
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111 |
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