| 1 | ; $Id: ceilf.asm 96060 2022-08-05 12:22:06Z vboxsync $
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| 2 | ;; @file
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| 3 | ; IPRT - No-CRT ceilf - AMD64 & X86.
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| 4 | ;
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| 5 |
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| 6 | ;
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| 7 | ; Copyright (C) 2006-2022 Oracle Corporation
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| 8 | ;
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| 9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | ; available from http://www.virtualbox.org. This file is free software;
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| 11 | ; you can redistribute it and/or modify it under the terms of the GNU
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| 12 | ; General Public License (GPL) as published by the Free Software
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| 13 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | ;
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| 17 | ; The contents of this file may alternatively be used under the terms
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| 18 | ; of the Common Development and Distribution License Version 1.0
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| 19 | ; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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| 20 | ; VirtualBox OSE distribution, in which case the provisions of the
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| 21 | ; CDDL are applicable instead of those of the GPL.
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| 22 | ;
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| 23 | ; You may elect to license modified versions of this file under the
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| 24 | ; terms and conditions of either the GPL or the CDDL or both.
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| 25 | ;
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| 26 |
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| 27 |
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| 28 | %include "iprt/asmdefs.mac"
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| 29 |
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| 30 | BEGINCODE
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| 31 |
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| 32 | ;;
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| 33 | ; Compute the smallest integral value not less than r32.
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| 34 | ; @returns st(0) / xmm0
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| 35 | ; @param r32 [rbp + 8] / xmm0
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| 36 | RT_NOCRT_BEGINPROC ceilf
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| 37 | push xBP
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| 38 | mov xBP, xSP
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| 39 | sub xSP, 10h
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| 40 |
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| 41 | %ifdef RT_ARCH_AMD64 ;; @todo there is probably some sse instruction for this.
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| 42 | movss [xSP], xmm0
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| 43 | fld dword [xSP]
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| 44 | %else
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| 45 | fld dword [xBP + xCB*2]
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| 46 | %endif
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| 47 |
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| 48 | ; Make it round up by modifying the fpu control word.
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| 49 | fstcw [xBP - 10h]
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| 50 | mov eax, [xBP - 10h]
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| 51 | or eax, 00800h
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| 52 | and eax, 0fbffh
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| 53 | mov [xBP - 08h], eax
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| 54 | fldcw [xBP - 08h]
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| 55 |
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| 56 | ; Round ST(0) to integer.
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| 57 | frndint
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| 58 |
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| 59 | ; Restore the fpu control word.
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| 60 | fldcw [xBP - 10h]
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| 61 |
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| 62 | %ifdef RT_ARCH_AMD64
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| 63 | fstp dword [xSP]
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| 64 | movss xmm0, [xSP]
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| 65 | %endif
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| 66 | leave
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| 67 | ret
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| 68 | ENDPROC RT_NOCRT(ceilf)
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| 69 |
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