| 1 | ; $Id: rintf.asm 96407 2022-08-22 17:43:14Z vboxsync $
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| 2 | ;; @file
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| 3 | ; IPRT - No-CRT rintf - AMD64 & X86.
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| 4 | ;
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| 5 |
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| 6 | ;
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| 7 | ; Copyright (C) 2022 Oracle and/or its affiliates.
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| 8 | ;
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| 9 | ; This file is part of VirtualBox base platform packages, as
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| 10 | ; available from https://www.virtualbox.org.
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| 11 | ;
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| 12 | ; This program is free software; you can redistribute it and/or
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| 13 | ; modify it under the terms of the GNU General Public License
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| 14 | ; as published by the Free Software Foundation, in version 3 of the
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| 15 | ; License.
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| 16 | ;
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| 17 | ; This program is distributed in the hope that it will be useful, but
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| 18 | ; WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | ; General Public License for more details.
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| 21 | ;
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| 22 | ; You should have received a copy of the GNU General Public License
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| 23 | ; along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | ;
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| 25 | ; The contents of this file may alternatively be used under the terms
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| 26 | ; of the Common Development and Distribution License Version 1.0
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| 27 | ; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
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| 28 | ; in the VirtualBox distribution, in which case the provisions of the
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| 29 | ; CDDL are applicable instead of those of the GPL.
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| 30 | ;
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| 31 | ; You may elect to license modified versions of this file under the
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| 32 | ; terms and conditions of either the GPL or the CDDL or both.
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| 33 | ;
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| 34 | ; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
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| 35 | ;
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| 36 |
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| 37 |
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| 38 | %define RT_ASM_WITH_SEH64
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| 39 | %include "iprt/asmdefs.mac"
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| 40 | %include "iprt/x86.mac"
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| 41 |
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| 42 |
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| 43 | BEGINCODE
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| 44 |
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| 45 | ;;
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| 46 | ; Round to integer value according to current rounding mode.
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| 47 | ;
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| 48 | ; ASSUME FCW and MXCSR are in sync for AMD64.
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| 49 | ;
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| 50 | ; @returns st(0) / xmm0
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| 51 | ; @param rd [rbp + 08h] / xmm0
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| 52 | RT_NOCRT_BEGINPROC rintf
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| 53 | push xBP
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| 54 | SEH64_PUSH_xBP
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| 55 | mov xBP, xSP
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| 56 | SEH64_SET_FRAME_xBP 0
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| 57 | %ifdef RT_ARCH_AMD64
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| 58 | sub xSP, 10h
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| 59 | SEH64_ALLOCATE_STACK 10h
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| 60 | %endif
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| 61 | SEH64_END_PROLOGUE
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| 62 |
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| 63 | ;
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| 64 | ; Load the value into st(0). This messes up SNaN values.
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| 65 | ;
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| 66 | %ifdef RT_ARCH_AMD64
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| 67 | movss dword [xSP], xmm0
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| 68 | fld dword [xSP]
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| 69 | %else
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| 70 | fld dword [xBP + xCB*2]
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| 71 | %endif
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| 72 |
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| 73 | ;
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| 74 | ; Return immediately if NaN or infinity.
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| 75 | ;
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| 76 | fxam
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| 77 | fstsw ax
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| 78 | test ax, X86_FSW_C0 ; C0 is set for NaN, Infinity and Empty register. The latter is not the case.
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| 79 | jz .input_ok
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| 80 | %ifdef RT_ARCH_AMD64
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| 81 | ffreep st0 ; return the xmm0 register value unchanged, as FLD changes SNaN to QNaN.
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| 82 | %endif
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| 83 | jmp .return
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| 84 | .input_ok:
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| 85 |
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| 86 | ;
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| 87 | ; Do the job and return.
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| 88 | ;
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| 89 | frndint
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| 90 |
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| 91 | %ifdef RT_ARCH_AMD64
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| 92 | fstp dword [xSP]
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| 93 | movss xmm0, dword [xSP]
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| 94 | %endif
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| 95 | .return:
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| 96 | leave
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| 97 | ret
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| 98 | ENDPROC RT_NOCRT(rintf)
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| 99 |
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