| 1 | ; $Id: truncf.asm 96203 2022-08-14 03:27:49Z vboxsync $
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| 2 | ;; @file
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| 3 | ; IPRT - No-CRT truncf - AMD64 & X86.
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| 4 | ;
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| 5 |
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| 6 | ;
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| 7 | ; Copyright (C) 2006-2022 Oracle Corporation
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| 8 | ;
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| 9 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | ; available from http://www.virtualbox.org. This file is free software;
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| 11 | ; you can redistribute it and/or modify it under the terms of the GNU
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| 12 | ; General Public License (GPL) as published by the Free Software
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| 13 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | ;
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| 17 | ; The contents of this file may alternatively be used under the terms
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| 18 | ; of the Common Development and Distribution License Version 1.0
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| 19 | ; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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| 20 | ; VirtualBox OSE distribution, in which case the provisions of the
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| 21 | ; CDDL are applicable instead of those of the GPL.
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| 22 | ;
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| 23 | ; You may elect to license modified versions of this file under the
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| 24 | ; terms and conditions of either the GPL or the CDDL or both.
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| 25 | ;
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| 26 |
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| 27 |
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| 28 | %define RT_ASM_WITH_SEH64
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| 29 | %include "iprt/asmdefs.mac"
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| 30 | %include "iprt/x86.mac"
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| 31 |
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| 32 |
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| 33 | BEGINCODE
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| 34 |
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| 35 | ;;
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| 36 | ; Round to truncated integer value.
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| 37 | ; @returns 32-bit: st(0) 64-bit: xmm0
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| 38 | ; @param rf 32-bit: [ebp + 8] 64-bit: xmm0
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| 39 | RT_NOCRT_BEGINPROC truncf
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| 40 | push xBP
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| 41 | SEH64_PUSH_xBP
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| 42 | mov xBP, xSP
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| 43 | SEH64_SET_FRAME_xBP 0
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| 44 | sub xSP, 10h
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| 45 | SEH64_ALLOCATE_STACK 10h
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| 46 | SEH64_END_PROLOGUE
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| 47 |
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| 48 | ;
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| 49 | ; Load the value into st(0). This messes up SNaN values.
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| 50 | ;
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| 51 | %ifdef RT_ARCH_AMD64
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| 52 | movss [xSP], xmm0
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| 53 | fld dword [xSP]
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| 54 | %else
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| 55 | fld dword [xBP + xCB*2]
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| 56 | %endif
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| 57 |
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| 58 | ;
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| 59 | ; Return immediately if NaN or infinity.
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| 60 | ;
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| 61 | fxam
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| 62 | fstsw ax
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| 63 | test ax, X86_FSW_C0 ; C0 is set for NaN, Infinity and Empty register. The latter is not the case.
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| 64 | jz .input_ok
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| 65 | %ifdef RT_ARCH_AMD64
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| 66 | ffreep st0 ; return the xmm0 register value unchanged, as FLD changes SNaN to QNaN.
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| 67 | %endif
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| 68 | jmp .return_val
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| 69 | .input_ok:
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| 70 |
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| 71 | ;
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| 72 | ; Make it truncate up by modifying the fpu control word.
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| 73 | ;
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| 74 | fstcw [xBP - 10h]
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| 75 | mov eax, [xBP - 10h]
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| 76 | or eax, X86_FCW_RC_ZERO ; both bits set, so no need to clear anything first.
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| 77 | mov [xBP - 08h], eax
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| 78 | fldcw [xBP - 08h]
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| 79 |
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| 80 | ;
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| 81 | ; Round ST(0) to integer.
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| 82 | ;
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| 83 | frndint
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| 84 |
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| 85 | ;
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| 86 | ; Restore the fpu control word and return.
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| 87 | ;
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| 88 | fldcw [xBP - 10h]
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| 89 |
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| 90 | %ifdef RT_ARCH_AMD64
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| 91 | fstp dword [xSP]
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| 92 | movss xmm0, [xSP]
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| 93 | %endif
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| 94 | .return_val:
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| 95 | leave
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| 96 | ret
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| 97 | ENDPROC RT_NOCRT(truncf)
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| 98 |
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