tstRTR0Timer.cpp@ 53582

Last change on this file since 53582 was 49480, checked in by vboxsync, 11 years ago
Runtime, Devices, Disassembler R0: warnings.
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1	/* $Id: tstRTR0Timer.cpp 49480 2013-11-14 15:13:54Z vboxsync $ */
2	/** @file
3	* IPRT R0 Testcase - Timers.
4	*/
5
6	/*
7	* Copyright (C) 2009-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* The contents of this file may alternatively be used under the terms
18	* of the Common Development and Distribution License Version 1.0
19	* (CDDL) only, as it comes in the "COPYING.CDDL" file of the
20	* VirtualBox OSE distribution, in which case the provisions of the
21	* CDDL are applicable instead of those of the GPL.
22	*
23	* You may elect to license modified versions of this file under the
24	* terms and conditions of either the GPL or the CDDL or both.
25	*/
26
27
28	/*******************************************************************************
29	* Header Files *
30	*******************************************************************************/
31	#include <iprt/timer.h>
32
33	#include <iprt/asm.h>
34	#include <iprt/asm-amd64-x86.h>
35	#include <iprt/cpuset.h>
36	#include <iprt/err.h>
37	#include <iprt/mem.h>
38	#include <iprt/mp.h>
39	#include <iprt/param.h>
40	#include <iprt/string.h>
41	#include <iprt/thread.h>
42	#include <iprt/time.h>
43	#include <VBox/sup.h>
44	#include "tstRTR0Timer.h"
45	#include "tstRTR0Common.h"
46
47
48	/*******************************************************************************
49	* Structures and Typedefs *
50	*******************************************************************************/
51	typedef struct
52	{
53	/** Array of nano second timestamp of the first few shots. */
54	uint64_t volatile aShotNsTSes[10];
55	/** The number of shots. */
56	uint32_t volatile cShots;
57	/** The shot at which action is to be taken. */
58	uint32_t iActionShot;
59	/** The RC of whatever operation performed in the handler. */
60	int volatile rc;
61	/** Set if it's a periodic test. */
62	bool fPeriodic;
63	/** Test specific stuff. */
64	union
65	{
66	/** tstRTR0TimerCallbackU32ChangeInterval parameters. */
67	struct
68	{
69	/** The interval change step. */
70	uint32_t cNsChangeStep;
71	/** The current timer interval. */
72	uint32_t cNsCurInterval;
73	/** The minimum interval. */
74	uint32_t cNsMinInterval;
75	/** The maximum interval. */
76	uint32_t cNsMaxInterval;
77	/** Direction flag; false = decrement, true = increment. */
78	bool fDirection;
79	/** The number of steps between each change. */
80	uint8_t cStepsBetween;
81	} ChgInt;
82	/** tstRTR0TimerCallbackSpecific parameters. */
83	struct
84	{
85	/** The expected CPU. */
86	RTCPUID idCpu;
87	/** Set if this failed. */
88	bool fFailed;
89	} Specific;
90	} u;
91	} TSTRTR0TIMERS1;
92	typedef TSTRTR0TIMERS1 *PTSTRTR0TIMERS1;
93
94
95	/**
96	* Per cpu state for an omni timer test.
97	*/
98	typedef struct TSTRTR0TIMEROMNI1
99	{
100	/** When we started receiving timer callbacks on this CPU. */
101	uint64_t u64Start;
102	/** When we received the last tick on this timer. */
103	uint64_t u64Last;
104	/** The number of ticks received on this CPU. */
105	uint32_t volatile cTicks;
106	uint32_t u32Padding;
107	} TSTRTR0TIMEROMNI1;
108	typedef TSTRTR0TIMEROMNI1 *PTSTRTR0TIMEROMNI1;
109
110
111	/*******************************************************************************
112	* Global Variables *
113	*******************************************************************************/
114	/**
115	* Latency data.
116	*/
117	static struct TSTRTR0TIMEROMNILATENCY
118	{
119	/** The number of samples. */
120	volatile uint32_t cSamples;
121	uint32_t auPadding[3];
122	struct
123	{
124	uint64_t uTsc;
125	uint64_t uNanoTs;
126	} aSamples[4096];
127	} g_aOmniLatency[16];
128
129
130	/**
131	* Callback for the omni timer latency test, adds a sample to g_aOmniLatency.
132	*
133	* @param pTimer The timer.
134	* @param iTick The current tick.
135	* @param pvUser The user argument.
136	*/
137	static DECLCALLBACK(void) tstRTR0TimerCallbackLatencyOmni(PRTTIMER pTimer, void *pvUser, uint64_t iTick)
138	{
139	RTCPUID idCpu = RTMpCpuId();
140	uint32_t iCpu = RTMpCpuIdToSetIndex(idCpu);
141	NOREF(pTimer); NOREF(pvUser); NOREF(iTick);
142
143	RTR0TESTR0_CHECK_MSG(iCpu < RT_ELEMENTS(g_aOmniLatency), ("iCpu=%d idCpu=%u\n", iCpu, idCpu));
144	if (iCpu < RT_ELEMENTS(g_aOmniLatency))
145	{
146	uint32_t iSample = g_aOmniLatency[iCpu].cSamples;
147	if (iSample < RT_ELEMENTS(g_aOmniLatency[iCpu].aSamples))
148	{
149	g_aOmniLatency[iCpu].aSamples[iSample].uTsc = ASMReadTSC();
150	g_aOmniLatency[iCpu].aSamples[iSample].uNanoTs = RTTimeSystemNanoTS();
151	g_aOmniLatency[iCpu].cSamples = iSample + 1;
152	}
153	}
154	}
155
156
157
158	/**
159	* Callback which increments a 32-bit counter.
160	*
161	* @param pTimer The timer.
162	* @param iTick The current tick.
163	* @param pvUser The user argument.
164	*/
165	static DECLCALLBACK(void) tstRTR0TimerCallbackOmni(PRTTIMER pTimer, void *pvUser, uint64_t iTick)
166	{
167	PTSTRTR0TIMEROMNI1 paStates = (PTSTRTR0TIMEROMNI1)pvUser;
168	RTCPUID idCpu = RTMpCpuId();
169	uint32_t iCpu = RTMpCpuIdToSetIndex(idCpu);
170	NOREF(pTimer);
171
172	RTR0TESTR0_CHECK_MSG(iCpu < RTCPUSET_MAX_CPUS, ("iCpu=%d idCpu=%u\n", iCpu, idCpu));
173	if (iCpu < RTCPUSET_MAX_CPUS)
174	{
175	uint32_t iCountedTick = ASMAtomicIncU32(&paStates[iCpu].cTicks);
176	RTR0TESTR0_CHECK_MSG(iCountedTick == iTick,
177	("iCountedTick=%u iTick=%u iCpu=%d idCpu=%u\n", iCountedTick, iTick, iCpu, idCpu));
178	paStates[iCpu].u64Last = RTTimeSystemNanoTS();
179	if (!paStates[iCpu].u64Start)
180	{
181	paStates[iCpu].u64Start = paStates[iCpu].u64Last;
182	RTR0TESTR0_CHECK_MSG(iCountedTick == 1, ("iCountedTick=%u iCpu=%d idCpu=%u\n", iCountedTick, iCpu, idCpu));
183	}
184	}
185	}
186
187
188	/**
189	* Callback which increments a 32-bit counter.
190	*
191	* @param pTimer The timer.
192	* @param iTick The current tick.
193	* @param pvUser The user argument.
194	*/
195	static DECLCALLBACK(void) tstRTR0TimerCallbackSpecific(PRTTIMER pTimer, void *pvUser, uint64_t iTick)
196	{
197	PTSTRTR0TIMERS1 pState = (PTSTRTR0TIMERS1)pvUser;
198	uint32_t iShot = ASMAtomicIncU32(&pState->cShots);
199	NOREF(pTimer);
200
201	if (iShot <= RT_ELEMENTS(pState->aShotNsTSes))
202	pState->aShotNsTSes[iShot - 1] = RTTimeSystemNanoTS();
203
204	RTCPUID idCpu = RTMpCpuId();
205	if (pState->u.Specific.idCpu != idCpu)
206	pState->u.Specific.fFailed = true;
207	RTR0TESTR0_CHECK_MSG(pState->u.Specific.idCpu == idCpu, ("idCpu=%u, expected %u\n", idCpu, pState->u.Specific.idCpu));
208
209	if (pState->fPeriodic)
210	RTR0TESTR0_CHECK_MSG(iShot == iTick, ("iShot=%u iTick=%u\n", iShot, iTick));
211	else
212	RTR0TESTR0_CHECK_MSG(iTick == 1, ("iShot=%u iTick=%u\n", iShot, iTick));
213	}
214
215
216	/**
217	* Callback which changes the interval at each invocation.
218	*
219	* The changes are governed by TSTRTR0TIMERS1::ChangeInterval. The callback
220	* calls RTTimerStop at iActionShot.
221	*
222	* @param pTimer The timer.
223	* @param iTick The current tick.
224	* @param pvUser The user argument.
225	*/
226	static DECLCALLBACK(void) tstRTR0TimerCallbackChangeInterval(PRTTIMER pTimer, void *pvUser, uint64_t iTick)
227	{
228	PTSTRTR0TIMERS1 pState = (PTSTRTR0TIMERS1)pvUser;
229	uint32_t iShot = ASMAtomicIncU32(&pState->cShots) - 1;
230
231	if (iShot < RT_ELEMENTS(pState->aShotNsTSes))
232	pState->aShotNsTSes[iShot] = RTTimeSystemNanoTS();
233	if (pState->fPeriodic)
234	RTR0TESTR0_CHECK_MSG(iShot + 1 == iTick, ("iShot=%u iTick=%u\n", iShot, iTick));
235	else
236	RTR0TESTR0_CHECK_MSG(iTick == 1, ("iShot=%u iTick=%u\n", iShot, iTick));
237
238	if (!(iShot % pState->u.ChgInt.cStepsBetween))
239	{
240	if (pState->u.ChgInt.fDirection)
241	{
242	pState->u.ChgInt.cNsCurInterval += pState->u.ChgInt.cNsChangeStep;
243	if ( pState->u.ChgInt.cNsCurInterval > pState->u.ChgInt.cNsMaxInterval
244	\|\| pState->u.ChgInt.cNsCurInterval < pState->u.ChgInt.cNsMinInterval
245	\|\| !pState->u.ChgInt.cNsCurInterval)
246	{
247	pState->u.ChgInt.cNsCurInterval = pState->u.ChgInt.cNsMaxInterval;
248	pState->u.ChgInt.fDirection = false;
249	}
250	}
251	else
252	{
253	pState->u.ChgInt.cNsCurInterval -= pState->u.ChgInt.cNsChangeStep;
254	if ( pState->u.ChgInt.cNsCurInterval < pState->u.ChgInt.cNsMinInterval
255	\|\| pState->u.ChgInt.cNsCurInterval > pState->u.ChgInt.cNsMaxInterval
256	\|\| pState->u.ChgInt.cNsCurInterval)
257	{
258	pState->u.ChgInt.cNsCurInterval = pState->u.ChgInt.cNsMinInterval;
259	pState->u.ChgInt.fDirection = true;
260	}
261	}
262
263	RTR0TESTR0_CHECK_RC(RTTimerChangeInterval(pTimer, pState->u.ChgInt.cNsCurInterval), VINF_SUCCESS);
264	}
265
266	if (iShot == pState->iActionShot)
267	RTR0TESTR0_CHECK_RC(pState->rc = RTTimerStop(pTimer), VINF_SUCCESS);
268	}
269
270
271	/**
272	* Callback which increments destroy the timer when it fires.
273	*
274	* @param pTimer The timer.
275	* @param iTick The current tick.
276	* @param pvUser The user argument.
277	*/
278	static DECLCALLBACK(void) tstRTR0TimerCallbackDestroyOnce(PRTTIMER pTimer, void *pvUser, uint64_t iTick)
279	{
280	PTSTRTR0TIMERS1 pState = (PTSTRTR0TIMERS1)pvUser;
281	uint32_t iShot = ASMAtomicIncU32(&pState->cShots);
282
283	if (iShot <= RT_ELEMENTS(pState->aShotNsTSes))
284	pState->aShotNsTSes[iShot - 1] = RTTimeSystemNanoTS();
285	if (pState->fPeriodic)
286	RTR0TESTR0_CHECK_MSG(iShot == iTick, ("iShot=%u iTick=%u\n", iShot, iTick));
287	else
288	RTR0TESTR0_CHECK_MSG(iTick == 1, ("iShot=%u iTick=%u\n", iShot, iTick));
289
290	if (iShot == pState->iActionShot + 1)
291	RTR0TESTR0_CHECK_RC(pState->rc = RTTimerDestroy(pTimer), VINF_SUCCESS);
292	}
293
294
295	/**
296	* Callback which increments restarts a timer once.
297	*
298	* @param pTimer The timer.
299	* @param iTick The current tick.
300	* @param pvUser The user argument.
301	*/
302	static DECLCALLBACK(void) tstRTR0TimerCallbackRestartOnce(PRTTIMER pTimer, void *pvUser, uint64_t iTick)
303	{
304	PTSTRTR0TIMERS1 pState = (PTSTRTR0TIMERS1)pvUser;
305	uint32_t iShot = ASMAtomicIncU32(&pState->cShots);
306
307	if (iShot <= RT_ELEMENTS(pState->aShotNsTSes))
308	pState->aShotNsTSes[iShot - 1] = RTTimeSystemNanoTS();
309	if (pState->fPeriodic)
310	RTR0TESTR0_CHECK_MSG(iShot == iTick, ("iShot=%u iTick=%u\n", iShot, iTick));
311	else
312	RTR0TESTR0_CHECK_MSG(iTick == 1, ("iShot=%u iTick=%u\n", iShot, iTick));
313
314	if (iShot == pState->iActionShot + 1)
315	RTR0TESTR0_CHECK_RC(pState->rc = RTTimerStart(pTimer, 10000000 /* 10ms */), VINF_SUCCESS);
316	}
317
318
319	/**
320	* Callback which increments a 32-bit counter.
321	*
322	* @param pTimer The timer.
323	* @param iTick The current tick.
324	* @param pvUser The user argument.
325	*/
326	static DECLCALLBACK(void) tstRTR0TimerCallbackU32Counter(PRTTIMER pTimer, void *pvUser, uint64_t iTick)
327	{
328	PTSTRTR0TIMERS1 pState = (PTSTRTR0TIMERS1)pvUser;
329	uint32_t iShot = ASMAtomicIncU32(&pState->cShots);
330	NOREF(pTimer);
331
332	if (iShot <= RT_ELEMENTS(pState->aShotNsTSes))
333	pState->aShotNsTSes[iShot - 1] = RTTimeSystemNanoTS();
334	if (pState->fPeriodic)
335	RTR0TESTR0_CHECK_MSG(iShot == iTick, ("iShot=%u iTick=%u\n", iShot, iTick));
336	else
337	RTR0TESTR0_CHECK_MSG(iTick == 1, ("iShot=%u iTick=%u\n", iShot, iTick));
338	}
339
340
341	#ifdef SOME_UNUSED_FUNCTION
342	/**
343	* Checks that the interval between two timer shots are within the specified
344	* range.
345	*
346	* @returns 0 if ok, 1 if bad.
347	* @param iShot The shot number (for bitching).
348	* @param uPrevTS The time stamp of the previous shot (ns).
349	* @param uThisTS The timer stamp of this shot (ns).
350	* @param uMin The minimum interval (ns).
351	* @param uMax The maximum interval (ns).
352	*/
353	static int tstRTR0TimerCheckShotInterval(uint32_t iShot, uint64_t uPrevTS, uint64_t uThisTS, uint32_t uMin, uint32_t uMax)
354	{
355	uint64_t uDelta = uThisTS - uPrevTS;
356	RTR0TESTR0_CHECK_MSG_RET(uDelta >= uMin, ("iShot=%u uDelta=%lld uMin=%u\n", iShot, uDelta, uMin), 1);
357	RTR0TESTR0_CHECK_MSG_RET(uDelta <= uMax, ("iShot=%u uDelta=%lld uMax=%u\n", iShot, uDelta, uMax), 1);
358	return 0;
359	}
360	#endif
361
362
363	/**
364	* Checks that the interval between timer shots are within a certain range.
365	*
366	* @returns Number of violations (i.e. 0 is ok).
367	* @param pState The state.
368	* @param uStartNsTS The start time stamp (ns).
369	* @param uMin The minimum interval (ns).
370	* @param uMax The maximum interval (ns).
371	*/
372	static int tstRTR0TimerCheckShotIntervals(PTSTRTR0TIMERS1 pState, uint64_t uStartNsTS, uint32_t uMin, uint32_t uMax)
373	{
374	uint64_t uMaxDelta = 0;
375	uint64_t uMinDelta = UINT64_MAX;
376	uint32_t cBadShots = 0;
377	uint32_t cShots = pState->cShots;
378	uint64_t uPrevTS = uStartNsTS;
379	for (uint32_t iShot = 0; iShot < cShots; iShot++)
380	{
381	uint64_t uThisTS = pState->aShotNsTSes[iShot];
382	uint64_t uDelta = uThisTS - uPrevTS;
383	if (uDelta > uMaxDelta)
384	uMaxDelta = uDelta;
385	if (uDelta < uMinDelta)
386	uMinDelta = uDelta;
387	cBadShots += !(uDelta >= uMin && uDelta <= uMax);
388
389	RTR0TESTR0_CHECK_MSG(uDelta >= uMin, ("iShot=%u uDelta=%lld uMin=%u\n", iShot, uDelta, uMin));
390	RTR0TESTR0_CHECK_MSG(uDelta <= uMax, ("iShot=%u uDelta=%lld uMax=%u\n", iShot, uDelta, uMax));
391
392	uPrevTS = uThisTS;
393	}
394
395	RTR0TestR0Info("uMaxDelta=%llu uMinDelta=%llu\n", uMaxDelta, uMinDelta);
396	return cBadShots;
397	}
398
399
400	/**
401	* Service request callback function.
402	*
403	* @returns VBox status code.
404	* @param pSession The caller's session.
405	* @param u64Arg 64-bit integer argument.
406	* @param pReqHdr The request header. Input / Output. Optional.
407	*/
408	DECLEXPORT(int) TSTRTR0TimerSrvReqHandler(PSUPDRVSESSION pSession, uint32_t uOperation,
409	uint64_t u64Arg, PSUPR0SERVICEREQHDR pReqHdr)
410	{
411	RTR0TESTR0_SRV_REQ_PROLOG_RET(pReqHdr);
412	NOREF(pSession);
413
414	/*
415	* Common parameter and state variables.
416	*/
417	uint32_t const cNsSysHz = RTTimerGetSystemGranularity();
418	uint32_t const cNsMaxHighResHz = 10000; /** @todo need API for this */
419	TSTRTR0TIMERS1 State;
420	if ( cNsSysHz < UINT32_C(1000)
421	\|\| cNsSysHz > UINT32_C(1000000000)
422	\|\| cNsMaxHighResHz < UINT32_C(1)
423	\|\| cNsMaxHighResHz > UINT32_C(1000000000))
424	{
425	RTR0TESTR0_CHECK_MSG(cNsSysHz > UINT32_C(1000) && cNsSysHz < UINT32_C(1000000000), ("%u", cNsSysHz));
426	RTR0TESTR0_CHECK_MSG(cNsMaxHighResHz > UINT32_C(1) && cNsMaxHighResHz < UINT32_C(1000000000), ("%u", cNsMaxHighResHz));
427	RTR0TESTR0_SRV_REQ_EPILOG(pReqHdr);
428	return VINF_SUCCESS;
429	}
430
431	/*
432	* The big switch.
433	*/
434	switch (uOperation)
435	{
436	RTR0TESTR0_IMPLEMENT_SANITY_CASES();
437	RTR0TESTR0_IMPLEMENT_DEFAULT_CASE(uOperation);
438
439	case TSTRTR0TIMER_ONE_SHOT_BASIC:
440	case TSTRTR0TIMER_ONE_SHOT_BASIC_HIRES:
441	{
442	/* Create a one-shot timer and take one shot. */
443	PRTTIMER pTimer;
444	uint32_t fFlags = TSTRTR0TIMER_IS_HIRES(uOperation) ? RTTIMER_FLAGS_HIGH_RES : 0;
445	int rc = RTTimerCreateEx(&pTimer, 0, fFlags, tstRTR0TimerCallbackU32Counter, &State);
446	if (rc == VERR_NOT_SUPPORTED)
447	{
448	RTR0TestR0Info("one-shot timer are not supported, skipping\n");
449	break;
450	}
451	RTR0TESTR0_CHECK_RC_BREAK(rc, VINF_SUCCESS);
452
453	do /* break loop */
454	{
455	RT_ZERO(State); ASMAtomicWriteU32(&State.cShots, State.cShots);
456	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, 0), VINF_SUCCESS);
457	for (uint32_t i = 0; i < 1000 && !ASMAtomicUoReadU32(&State.cShots); i++)
458	RTThreadSleep(5);
459	RTR0TESTR0_CHECK_MSG_BREAK(ASMAtomicUoReadU32(&State.cShots) == 1, ("cShots=%u\n", State.cShots));
460
461	/* check that it is restartable. */
462	RT_ZERO(State); ASMAtomicWriteU32(&State.cShots, State.cShots);
463	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, 0), VINF_SUCCESS);
464	for (uint32_t i = 0; i < 1000 && !ASMAtomicUoReadU32(&State.cShots); i++)
465	RTThreadSleep(5);
466	RTR0TESTR0_CHECK_MSG_BREAK(ASMAtomicUoReadU32(&State.cShots) == 1, ("cShots=%u\n", State.cShots));
467
468	/* check that it respects the timeout value and can be cancelled. */
469	RT_ZERO(State); ASMAtomicWriteU32(&State.cShots, State.cShots);
470	RTR0TESTR0_CHECK_RC(RTTimerStart(pTimer, 5*UINT64_C(1000000000)), VINF_SUCCESS);
471	RTR0TESTR0_CHECK_RC(RTTimerStop(pTimer), VINF_SUCCESS);
472	RTThreadSleep(1);
473	RTR0TESTR0_CHECK_MSG_BREAK(ASMAtomicUoReadU32(&State.cShots) == 0, ("cShots=%u\n", State.cShots));
474
475	/* Check some double starts and stops (shall not assert). */
476	RT_ZERO(State); ASMAtomicWriteU32(&State.cShots, State.cShots);
477	RTR0TESTR0_CHECK_RC(RTTimerStart(pTimer, 5*UINT64_C(1000000000)), VINF_SUCCESS);
478	RTR0TESTR0_CHECK_RC(RTTimerStart(pTimer, 0), VERR_TIMER_ACTIVE);
479	RTR0TESTR0_CHECK_RC(RTTimerStop(pTimer), VINF_SUCCESS);
480	RTR0TESTR0_CHECK_RC(RTTimerStop(pTimer), VERR_TIMER_SUSPENDED);
481	RTThreadSleep(1);
482	RTR0TESTR0_CHECK_MSG_BREAK(ASMAtomicUoReadU32(&State.cShots) == 0, ("cShots=%u\n", State.cShots));
483	} while (0);
484	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
485	RTR0TESTR0_CHECK_RC(RTTimerDestroy(NULL), VINF_SUCCESS);
486	break;
487	}
488
489	#if 1 /* might have to disable this for some host... */
490	case TSTRTR0TIMER_ONE_SHOT_RESTART:
491	case TSTRTR0TIMER_ONE_SHOT_RESTART_HIRES:
492	{
493	/* Create a one-shot timer and restart it in the callback handler. */
494	PRTTIMER pTimer;
495	uint32_t fFlags = TSTRTR0TIMER_IS_HIRES(uOperation) ? RTTIMER_FLAGS_HIGH_RES : 0;
496	for (uint32_t iTest = 0; iTest < 2; iTest++)
497	{
498	int rc = RTTimerCreateEx(&pTimer, 0, fFlags, tstRTR0TimerCallbackRestartOnce, &State);
499	if (rc == VERR_NOT_SUPPORTED)
500	{
501	RTR0TestR0Info("one-shot timer are not supported, skipping\n");
502	break;
503	}
504	RTR0TESTR0_CHECK_RC_BREAK(rc, VINF_SUCCESS);
505
506	RT_ZERO(State);
507	State.iActionShot = 0;
508	ASMAtomicWriteU32(&State.cShots, State.cShots);
509	do /* break loop */
510	{
511	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, cNsSysHz * iTest), VINF_SUCCESS);
512	for (uint32_t i = 0; i < 1000 && ASMAtomicUoReadU32(&State.cShots) < 2; i++)
513	RTThreadSleep(5);
514	RTR0TESTR0_CHECK_MSG_BREAK(ASMAtomicUoReadU32(&State.cShots) == 2, ("cShots=%u\n", State.cShots));
515	} while (0);
516	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
517	}
518	break;
519	}
520	#endif
521
522	#if 1 /* might have to disable this for some host... */
523	case TSTRTR0TIMER_ONE_SHOT_DESTROY:
524	case TSTRTR0TIMER_ONE_SHOT_DESTROY_HIRES:
525	{
526	/* Create a one-shot timer and destroy it in the callback handler. */
527	PRTTIMER pTimer;
528	uint32_t fFlags = TSTRTR0TIMER_IS_HIRES(uOperation) ? RTTIMER_FLAGS_HIGH_RES : 0;
529	for (uint32_t iTest = 0; iTest < 2; iTest++)
530	{
531	int rc = RTTimerCreateEx(&pTimer, 0, fFlags, tstRTR0TimerCallbackDestroyOnce, &State);
532	if (rc == VERR_NOT_SUPPORTED)
533	{
534	RTR0TestR0Info("one-shot timer are not supported, skipping\n");
535	break;
536	}
537	RTR0TESTR0_CHECK_RC_BREAK(rc, VINF_SUCCESS);
538
539	RT_ZERO(State);
540	State.rc = VERR_IPE_UNINITIALIZED_STATUS;
541	State.iActionShot = 0;
542	ASMAtomicWriteU32(&State.cShots, State.cShots);
543	do /* break loop */
544	{
545	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, cNsSysHz * iTest), VINF_SUCCESS);
546	for (uint32_t i = 0; i < 1000 && (ASMAtomicUoReadU32(&State.cShots) < 1 \|\| State.rc == VERR_IPE_UNINITIALIZED_STATUS); i++)
547	RTThreadSleep(5);
548	RTR0TESTR0_CHECK_MSG_BREAK(ASMAtomicReadU32(&State.cShots) == 1, ("cShots=%u\n", State.cShots));
549	RTR0TESTR0_CHECK_MSG_BREAK(State.rc == VINF_SUCCESS, ("rc=%Rrc\n", State.rc));
550	} while (0);
551	if (RT_FAILURE(State.rc))
552	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
553	}
554	break;
555	}
556	#endif
557
558	case TSTRTR0TIMER_ONE_SHOT_SPECIFIC:
559	case TSTRTR0TIMER_ONE_SHOT_SPECIFIC_HIRES:
560	{
561	PRTTIMER pTimer = NULL;
562	RTCPUSET OnlineSet;
563	RTMpGetOnlineSet(&OnlineSet);
564	for (uint32_t iCpu = 0; iCpu < RTCPUSET_MAX_CPUS; iCpu++)
565	if (RTCpuSetIsMemberByIndex(&OnlineSet, iCpu))
566	{
567	RT_ZERO(State);
568	State.iActionShot = 0;
569	State.rc = VINF_SUCCESS;
570	State.u.Specific.idCpu = RTMpCpuIdFromSetIndex(iCpu);
571	ASMAtomicWriteU32(&State.cShots, State.cShots);
572
573	uint32_t fFlags = TSTRTR0TIMER_IS_HIRES(uOperation) ? RTTIMER_FLAGS_HIGH_RES : 0;
574	fFlags \|= RTTIMER_FLAGS_CPU(iCpu);
575	int rc = RTTimerCreateEx(&pTimer, 0, fFlags, tstRTR0TimerCallbackSpecific, &State);
576	if (rc == VERR_NOT_SUPPORTED)
577	{
578	RTR0TestR0Info("one-shot specific timer are not supported, skipping\n");
579	break;
580	}
581	RTR0TESTR0_CHECK_RC_BREAK(rc, VINF_SUCCESS);
582
583	for (uint32_t i = 0; i < 5 && !RTR0TestR0HaveErrors(); i++)
584	{
585	ASMAtomicWriteU32(&State.cShots, 0);
586	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, (i & 2 ? cNsSysHz : cNsSysHz / 2) * (i & 1)), VINF_SUCCESS);
587	uint64_t cNsElapsed = RTTimeSystemNanoTS();
588	for (uint32_t j = 0; j < 1000 && ASMAtomicUoReadU32(&State.cShots) < 1; j++)
589	RTThreadSleep(5);
590	cNsElapsed = RTTimeSystemNanoTS() - cNsElapsed;
591	RTR0TESTR0_CHECK_MSG_BREAK(ASMAtomicReadU32(&State.cShots) == 1,
592	("cShots=%u iCpu=%u i=%u iCurCpu=%u cNsElapsed=%'llu\n",
593	State.cShots, iCpu, i, RTMpCpuIdToSetIndex(RTMpCpuId()), cNsElapsed ));
594	RTR0TESTR0_CHECK_MSG_BREAK(State.rc == VINF_SUCCESS, ("rc=%Rrc\n", State.rc));
595	RTR0TESTR0_CHECK_MSG_BREAK(!State.u.Specific.fFailed, ("iCpu=%u i=%u\n", iCpu, i));
596	}
597
598	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
599	pTimer = NULL;
600	if (RTR0TestR0HaveErrors())
601	break;
602
603	RTMpGetOnlineSet(&OnlineSet);
604	}
605	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
606	break;
607	}
608
609	case TSTRTR0TIMER_PERIODIC_BASIC:
610	case TSTRTR0TIMER_PERIODIC_BASIC_HIRES:
611	{
612	/* Create a periodic timer running at 10 HZ. */
613	uint32_t const u10HzAsNs = 100000000;
614	uint32_t const u10HzAsNsMin = u10HzAsNs - u10HzAsNs / 2;
615	uint32_t const u10HzAsNsMax = u10HzAsNs + u10HzAsNs / 2;
616	PRTTIMER pTimer;
617	uint32_t fFlags = TSTRTR0TIMER_IS_HIRES(uOperation) ? RTTIMER_FLAGS_HIGH_RES : 0;
618	RTR0TESTR0_CHECK_RC_BREAK(RTTimerCreateEx(&pTimer, u10HzAsNs, fFlags, tstRTR0TimerCallbackU32Counter, &State),
619	VINF_SUCCESS);
620
621	for (uint32_t iTest = 0; iTest < 2; iTest++)
622	{
623	RT_ZERO(State);
624	State.fPeriodic = true;
625	ASMAtomicWriteU32(&State.cShots, State.cShots);
626
627	uint64_t uStartNsTS = RTTimeSystemNanoTS();
628	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, u10HzAsNs), VINF_SUCCESS);
629	for (uint32_t i = 0; i < 1000 && ASMAtomicUoReadU32(&State.cShots) < 10; i++)
630	RTThreadSleep(10);
631	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStop(pTimer), VINF_SUCCESS);
632	RTR0TESTR0_CHECK_MSG_BREAK(ASMAtomicUoReadU32(&State.cShots) == 10, ("cShots=%u\n", State.cShots));
633	if (tstRTR0TimerCheckShotIntervals(&State, uStartNsTS, u10HzAsNsMin, u10HzAsNsMax))
634	break;
635	}
636	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
637	RTR0TESTR0_CHECK_RC(RTTimerDestroy(NULL), VINF_SUCCESS);
638	break;
639	}
640
641	case TSTRTR0TIMER_PERIODIC_CSSD_LOOPS:
642	case TSTRTR0TIMER_PERIODIC_CSSD_LOOPS_HIRES:
643	{
644	/* create, start, stop & destroy high res timers a number of times. */
645	uint32_t fFlags = TSTRTR0TIMER_IS_HIRES(uOperation) ? RTTIMER_FLAGS_HIGH_RES : 0;
646	for (uint32_t i = 0; i < 40; i++)
647	{
648	PRTTIMER pTimer;
649	RTR0TESTR0_CHECK_RC_BREAK(RTTimerCreateEx(&pTimer, cNsSysHz, fFlags, tstRTR0TimerCallbackU32Counter, &State),
650	VINF_SUCCESS);
651	for (uint32_t j = 0; j < 10; j++)
652	{
653	RT_ZERO(State);
654	State.fPeriodic = true;
655	ASMAtomicWriteU32(&State.cShots, State.cShots); /* ordered, necessary? */
656
657	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, i < 20 ? 0 : cNsSysHz), VINF_SUCCESS);
658	for (uint32_t k = 0; k < 1000 && ASMAtomicUoReadU32(&State.cShots) < 2; k++)
659	RTThreadSleep(1);
660	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStop(pTimer), VINF_SUCCESS);
661	}
662	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
663	}
664	break;
665	}
666
667	case TSTRTR0TIMER_PERIODIC_CHANGE_INTERVAL:
668	case TSTRTR0TIMER_PERIODIC_CHANGE_INTERVAL_HIRES:
669	{
670	/* Initialize the test parameters, using the u64Arg value for selecting variations. */
671	RT_ZERO(State);
672	State.cShots = 0;
673	State.rc = VERR_IPE_UNINITIALIZED_STATUS;
674	State.iActionShot = 42;
675	State.fPeriodic = true;
676	State.u.ChgInt.fDirection = !!(u64Arg & 1);
677	if (uOperation == TSTRTR0TIMER_PERIODIC_CHANGE_INTERVAL_HIRES)
678	{
679	State.u.ChgInt.cNsMaxInterval = RT_MAX(cNsMaxHighResHz * 10, 20000000); /* 10x / 20 ms */
680	State.u.ChgInt.cNsMinInterval = RT_MAX(cNsMaxHighResHz, 10000); /* min / 10 us */
681	}
682	else
683	{
684	State.u.ChgInt.cNsMaxInterval = cNsSysHz * 4;
685	State.u.ChgInt.cNsMinInterval = cNsSysHz;
686	}
687	State.u.ChgInt.cNsChangeStep = (State.u.ChgInt.cNsMaxInterval - State.u.ChgInt.cNsMinInterval) / 10;
688	State.u.ChgInt.cNsCurInterval = State.u.ChgInt.fDirection
689	? State.u.ChgInt.cNsMaxInterval : State.u.ChgInt.cNsMinInterval;
690	State.u.ChgInt.cStepsBetween = u64Arg & 4 ? 1 : 3;
691	RTR0TESTR0_CHECK_MSG_BREAK(State.u.ChgInt.cNsMinInterval > 1000, ("%u\n", State.u.ChgInt.cNsMinInterval));
692	RTR0TESTR0_CHECK_MSG_BREAK(State.u.ChgInt.cNsMaxInterval > State.u.ChgInt.cNsMinInterval, ("max=%u min=%u\n", State.u.ChgInt.cNsMaxInterval, State.u.ChgInt.cNsMinInterval));
693	ASMAtomicWriteU32(&State.cShots, State.cShots);
694
695	/* create the timer and check if RTTimerChangeInterval is supported. */
696	PRTTIMER pTimer;
697	uint32_t fFlags = TSTRTR0TIMER_IS_HIRES(uOperation) ? RTTIMER_FLAGS_HIGH_RES : 0;
698	RTR0TESTR0_CHECK_RC_BREAK(RTTimerCreateEx(&pTimer, cNsSysHz, fFlags, tstRTR0TimerCallbackChangeInterval, &State),
699	VINF_SUCCESS);
700	int rc = RTTimerChangeInterval(pTimer, State.u.ChgInt.cNsMinInterval);
701	if (rc == VERR_NOT_SUPPORTED)
702	{
703	RTR0TestR0Info("RTTimerChangeInterval not supported, skipped");
704	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
705	break;
706	}
707
708	/* do the test. */
709	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, u64Arg & 2 ? State.u.ChgInt.cNsCurInterval : 0), VINF_SUCCESS);
710	for (uint32_t k = 0;
711	k < 1000
712	&& ASMAtomicReadU32(&State.cShots) <= State.iActionShot
713	&& State.rc == VERR_IPE_UNINITIALIZED_STATUS;
714	k++)
715	RTThreadSleep(10);
716
717	rc = RTTimerStop(pTimer);
718	RTR0TESTR0_CHECK_MSG_BREAK(rc == VERR_TIMER_SUSPENDED \|\| rc == VINF_SUCCESS, ("rc = %Rrc (RTTimerStop)\n", rc));
719	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
720	break;
721	}
722
723	case TSTRTR0TIMER_PERIODIC_SPECIFIC:
724	case TSTRTR0TIMER_PERIODIC_SPECIFIC_HIRES:
725	{
726	PRTTIMER pTimer = NULL;
727	RTCPUSET OnlineSet;
728	RTMpGetOnlineSet(&OnlineSet);
729	for (uint32_t iCpu = 0; iCpu < RTCPUSET_MAX_CPUS; iCpu++)
730	if (RTCpuSetIsMemberByIndex(&OnlineSet, iCpu))
731	{
732	RT_ZERO(State);
733	State.iActionShot = 0;
734	State.rc = VINF_SUCCESS;
735	State.fPeriodic = true;
736	State.u.Specific.idCpu = RTMpCpuIdFromSetIndex(iCpu);
737	ASMAtomicWriteU32(&State.cShots, State.cShots);
738
739	uint32_t fFlags = TSTRTR0TIMER_IS_HIRES(uOperation) ? RTTIMER_FLAGS_HIGH_RES : 0;
740	fFlags \|= RTTIMER_FLAGS_CPU(iCpu);
741	int rc = RTTimerCreateEx(&pTimer, cNsSysHz, fFlags, tstRTR0TimerCallbackSpecific, &State);
742	if (rc == VERR_NOT_SUPPORTED)
743	{
744	RTR0TestR0Info("specific timer are not supported, skipping\n");
745	break;
746	}
747	RTR0TESTR0_CHECK_RC_BREAK(rc, VINF_SUCCESS);
748
749	for (uint32_t i = 0; i < 3 && !RTR0TestR0HaveErrors(); i++)
750	{
751	ASMAtomicWriteU32(&State.cShots, 0);
752	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, (i & 2 ? cNsSysHz : cNsSysHz / 2) * (i & 1)), VINF_SUCCESS);
753	uint64_t cNsElapsed = RTTimeSystemNanoTS();
754	for (uint32_t j = 0; j < 1000 && ASMAtomicUoReadU32(&State.cShots) < 8; j++)
755	RTThreadSleep(5);
756	cNsElapsed = RTTimeSystemNanoTS() - cNsElapsed;
757	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStop(pTimer), VINF_SUCCESS);
758	RTR0TESTR0_CHECK_MSG_BREAK(ASMAtomicReadU32(&State.cShots) > 5,
759	("cShots=%u iCpu=%u i=%u iCurCpu=%u cNsElapsed=%'llu\n",
760	State.cShots, iCpu, i, RTMpCpuIdToSetIndex(RTMpCpuId()), cNsElapsed));
761	RTR0TESTR0_CHECK_MSG_BREAK(State.rc == VINF_SUCCESS, ("rc=%Rrc\n", State.rc));
762	RTR0TESTR0_CHECK_MSG_BREAK(!State.u.Specific.fFailed, ("iCpu=%u i=%u\n", iCpu, i));
763	}
764
765	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
766	pTimer = NULL;
767	if (RTR0TestR0HaveErrors())
768	break;
769
770	RTMpGetOnlineSet(&OnlineSet);
771	}
772	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
773	break;
774	}
775
776	case TSTRTR0TIMER_PERIODIC_OMNI:
777	case TSTRTR0TIMER_PERIODIC_OMNI_HIRES:
778	{
779	/* Create a periodic timer running at max host frequency, but no more than 1000 Hz. */
780	uint32_t cNsInterval = cNsSysHz;
781	while (cNsInterval < UINT32_C(1000000))
782	cNsInterval *= 2;
783	PTSTRTR0TIMEROMNI1 paStates = (PTSTRTR0TIMEROMNI1)RTMemAllocZ(sizeof(paStates[0]) * RTCPUSET_MAX_CPUS);
784	RTR0TESTR0_CHECK_MSG_BREAK(paStates, ("%d\n", RTCPUSET_MAX_CPUS));
785
786	PRTTIMER pTimer;
787	uint32_t fFlags = (TSTRTR0TIMER_IS_HIRES(uOperation) ? RTTIMER_FLAGS_HIGH_RES : 0)
788	\| RTTIMER_FLAGS_CPU_ALL;
789	int rc = RTTimerCreateEx(&pTimer, cNsInterval, fFlags, tstRTR0TimerCallbackOmni, paStates);
790	if (rc == VERR_NOT_SUPPORTED)
791	{
792	RTR0TESTR0_SKIP_BREAK();
793	}
794	RTR0TESTR0_CHECK_RC_BREAK(rc, VINF_SUCCESS);
795
796	for (uint32_t iTest = 0; iTest < 3 && !RTR0TestR0HaveErrors(); iTest++)
797	{
798	/* reset the state */
799	for (uint32_t iCpu = 0; iCpu < RTCPUSET_MAX_CPUS; iCpu++)
800	{
801	paStates[iCpu].u64Start = 0;
802	paStates[iCpu].u64Last = 0;
803	ASMAtomicWriteU32(&paStates[iCpu].cTicks, 0);
804	}
805
806	/* run it for 1 second. */
807	RTCPUSET OnlineSet;
808	uint64_t uStartNsTS = RTTimeSystemNanoTS();
809	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, 0), VINF_SUCCESS);
810	RTMpGetOnlineSet(&OnlineSet);
811
812	for (uint32_t i = 0; i < 5000 && RTTimeSystemNanoTS() - uStartNsTS <= UINT32_C(1000000000); i++)
813	RTThreadSleep(2);
814
815	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStop(pTimer), VINF_SUCCESS);
816	uint64_t cNsElapsedX = RTTimeNanoTS() - uStartNsTS;
817
818	/* Do a min/max on the start and stop times and calculate the test period. */
819	uint64_t u64MinStart = UINT64_MAX;
820	uint64_t u64MaxStop = 0;
821	for (uint32_t iCpu = 0; iCpu < RTCPUSET_MAX_CPUS; iCpu++)
822	{
823	if (paStates[iCpu].u64Start)
824	{
825	if (paStates[iCpu].u64Start < u64MinStart)
826	u64MinStart = paStates[iCpu].u64Start;
827	if (paStates[iCpu].u64Last > u64MaxStop)
828	u64MaxStop = paStates[iCpu].u64Last;
829	}
830	}
831	RTR0TESTR0_CHECK_MSG(u64MinStart < u64MaxStop, ("%llu, %llu", u64MinStart, u64MaxStop));
832	uint64_t cNsElapsed = u64MaxStop - u64MinStart;
833	RTR0TESTR0_CHECK_MSG(cNsElapsed <= cNsElapsedX + 100000, ("%llu, %llu", cNsElapsed, cNsElapsedX)); /* the fudge factor is time drift */
834	uint32_t cAvgTicks = cNsElapsed / cNsInterval + 1;
835
836	/* Check tick counts. ASSUMES no cpu on- or offlining.
837	This only catches really bad stuff. */
838	uint32_t cMinTicks = cAvgTicks - cAvgTicks / 10;
839	uint32_t cMaxTicks = cAvgTicks + cAvgTicks / 10 + 1;
840	for (uint32_t iCpu = 0; iCpu < RTCPUSET_MAX_CPUS; iCpu++)
841	if (paStates[iCpu].cTicks)
842	{
843	RTR0TESTR0_CHECK_MSG(RTCpuSetIsMemberByIndex(&OnlineSet, iCpu), ("%d\n", iCpu));
844	RTR0TESTR0_CHECK_MSG(paStates[iCpu].cTicks <= cMaxTicks && paStates[iCpu].cTicks >= cMinTicks,
845	("min=%u, ticks=%u, avg=%u max=%u, iCpu=%u, interval=%'u, elapsed=%'llu/%'llu\n",
846	cMinTicks, paStates[iCpu].cTicks, cAvgTicks, cMaxTicks, iCpu,
847	cNsInterval, cNsElapsed, cNsElapsedX));
848	}
849	else
850	RTR0TESTR0_CHECK_MSG(!RTCpuSetIsMemberByIndex(&OnlineSet, iCpu), ("%d\n", iCpu));
851	}
852
853	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
854	RTMemFree(paStates);
855	break;
856	}
857
858	case TSTRTR0TIMER_LATENCY_OMNI:
859	case TSTRTR0TIMER_LATENCY_OMNI_HIRES:
860	{
861	/*
862	* Create a periodic timer running at max host frequency, but no more than 1000 Hz.
863	*/
864	PRTTIMER pTimer;
865	uint32_t fFlags = (TSTRTR0TIMER_IS_HIRES(uOperation) ? RTTIMER_FLAGS_HIGH_RES : 0)
866	\| RTTIMER_FLAGS_CPU_ALL;
867	uint32_t cNsInterval = cNsSysHz;
868	while (cNsInterval < UINT32_C(1000000))
869	cNsInterval *= 2;
870	int rc = RTTimerCreateEx(&pTimer, cNsInterval, fFlags, tstRTR0TimerCallbackLatencyOmni, NULL);
871	if (rc == VERR_NOT_SUPPORTED)
872	{
873	RTR0TESTR0_SKIP_BREAK();
874	}
875	RTR0TESTR0_CHECK_RC_BREAK(rc, VINF_SUCCESS);
876
877	/*
878	* Reset the state and run the test for 4 seconds.
879	*/
880	RT_ZERO(g_aOmniLatency);
881
882	RTCPUSET OnlineSet;
883	uint64_t uStartNsTS = RTTimeSystemNanoTS();
884	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStart(pTimer, 0), VINF_SUCCESS);
885	RTMpGetOnlineSet(&OnlineSet);
886
887	for (uint32_t i = 0; i < 5000 && RTTimeSystemNanoTS() - uStartNsTS <= UINT64_C(4000000000); i++)
888	RTThreadSleep(2);
889
890	RTR0TESTR0_CHECK_RC_BREAK(RTTimerStop(pTimer), VINF_SUCCESS);
891
892	/*
893	* Process the result.
894	*/
895	int32_t cNsLow = cNsInterval / 4 * 3; /* 75% */
896	int32_t cNsHigh = cNsInterval / 4 * 5; /* 125% */
897	uint32_t cTotal = 0;
898	uint32_t cLow = 0;
899	uint32_t cHigh = 0;
900	for (uint32_t iCpu = 0; iCpu < RT_ELEMENTS(g_aOmniLatency); iCpu++)
901	{
902	uint32_t cSamples = g_aOmniLatency[iCpu].cSamples;
903	if (cSamples > 1)
904	{
905	cTotal += cSamples - 1;
906	for (uint32_t iSample = 1; iSample < cSamples; iSample++)
907	{
908	int64_t cNsDelta = g_aOmniLatency[iCpu].aSamples[iSample - 1].uNanoTs
909	- g_aOmniLatency[iCpu].aSamples[iSample].uNanoTs;
910	if (cNsDelta < cNsLow)
911	cLow++;
912	else if (cNsDelta > cNsHigh)
913	cHigh++;
914	}
915	}
916	}
917	RTR0TestR0Info("125%%: %u; 75%%: %u; total: %u", cHigh, cLow, cTotal);
918	RTR0TESTR0_CHECK_RC(RTTimerDestroy(pTimer), VINF_SUCCESS);
919	break;
920	}
921
922	}
923
924	RTR0TESTR0_SRV_REQ_EPILOG(pReqHdr);
925	/* The error indicator is the '!' in the message buffer. */
926	return VINF_SUCCESS;
927	}
928

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source: vbox/trunk/src/VBox/Runtime/testcase/tstRTR0Timer.cpp@ 53582

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