1 | /* $Id: tstTSC.cpp 8245 2008-04-21 17:24:28Z vboxsync $ */
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2 | /** @file
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3 | * IPRT Testcase - SMP TSC testcase.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2007 Sun Microsystems, Inc.
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * The contents of this file may alternatively be used under the terms
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18 | * of the Common Development and Distribution License Version 1.0
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19 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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20 | * VirtualBox OSE distribution, in which case the provisions of the
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21 | * CDDL are applicable instead of those of the GPL.
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22 | *
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23 | * You may elect to license modified versions of this file under the
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24 | * terms and conditions of either the GPL or the CDDL or both.
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25 | *
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26 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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27 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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28 | * additional information or have any questions.
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29 | */
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30 |
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31 | /*******************************************************************************
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32 | * Header Files *
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33 | *******************************************************************************/
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34 | #include <iprt/runtime.h>
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35 |
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36 | /*******************************************************************************
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37 | * Structures and Typedefs *
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38 | *******************************************************************************/
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39 | typedef struct TSCDATA
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40 | {
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41 | /** The TSC. */
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42 | uint64_t volatile TSC;
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43 | /** The APIC ID. */
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44 | uint8_t volatile u8ApicId;
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45 | /** Did it succeed? */
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46 | bool volatile fRead;
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47 | /** Did it fail? */
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48 | bool volatile fFailed;
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49 | /** The thread handle. */
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50 | RTTHREAD Thread;
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51 | } TSCDATA, *PTSCDATA;
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52 |
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53 | /*******************************************************************************
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54 | * Global Variables *
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55 | *******************************************************************************/
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56 | /** The number of CPUs waiting on their user event semaphore. */
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57 | static volatile uint32_t g_cWaiting;
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58 | /** The number of CPUs ready (in spin) to do the TSC read. */
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59 | static volatile uint32_t g_cReady;
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60 | /** The variable the CPUs are spinning on.
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61 | * 0: Spin.
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62 | * 1: Go ahead.
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63 | * 2: You're too late, back to square one. */
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64 | static volatile uint32_t g_u32Go;
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65 | /** The number of CPUs that managed to read the TSC. */
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66 | static volatile uint32_t g_cRead;
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67 | /** The number of CPUs that failed to read the TSC. */
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68 | static volatile uint32_t g_cFailed;
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69 |
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70 | /** Indicator forcing the threads to quit. */
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71 | static volatile bool g_fDone;
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72 |
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73 |
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74 | /*******************************************************************************
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75 | * Internal Functions *
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76 | *******************************************************************************/
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77 | static DECLCALLBACK(int) ThreadFunction(RTTHREAD Thread, void *pvUser);
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78 |
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79 |
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80 | /**
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81 | * Thread function for catching the other cpus.
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82 | *
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83 | * @returns VINF_SUCCESS (we don't care).
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84 | * @param Thread The thread handle.
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85 | * @param pvUser PTSCDATA.
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86 | */
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87 | static DECLCALLBACK(int) ThreadFunction(RTTHREAD Thread, void *pvUser)
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88 | {
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89 | PTSCDATA pTscData = (PTSCDATA)pvUser;
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90 |
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91 | while (!g_fDone)
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92 | {
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93 | /*
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94 | * Wait.
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95 | */
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96 | ASMAtomicIncU32(&g_cWaiting);
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97 | RTThreadUserWait(Thread, RT_INDEFINITE_WAIT);
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98 | RTThreadUserReset(Thread);
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99 | ASMAtomicDecU32(&g_cWaiting);
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100 | if (g_fDone)
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101 | break;
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102 |
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103 | /*
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104 | * Spin.
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105 | */
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106 | ASMAtomicIncU32(&g_cReady);
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107 | while (!g_fDone)
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108 | {
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109 | const uint8_t ApicId1 = ASMGetApicId();
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110 | const uint64_t TSC1 = ASMReadTSC();
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111 | const uint32_t u32Go = g_u32Go;
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112 | if (u32Go == 0)
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113 | continue;
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114 |
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115 | if (u32Go == 1)
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116 | {
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117 | /* do the reading. */
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118 | const uint8_t ApicId2 = ASMGetApicId();
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119 | const uint64_t TSC2 = ASMReadTSC();
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120 | const uint8_t ApicId3 = ASMGetApicId();
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121 | const uint64_t TSC3 = ASMReadTSC();
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122 | const uint8_t ApicId4 = ASMGetApicId();
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123 |
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124 | if ( ApicId1 == ApicId2
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125 | && ApicId1 == ApicId3
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126 | && ApicId1 == ApicId4
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127 | && TSC3 - TSC1 < 2250 /* WARNING: This is just a guess, increase if it doesn't work for you. */
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128 | && TSC2 - TSC1 < TSC3 - TSC1
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129 | )
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130 | {
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131 | /* succeeded. */
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132 | pTscData->TSC = TSC2;
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133 | pTscData->u8ApicId = ApicId1;
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134 | pTscData->fFailed = false;
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135 | pTscData->fRead = true;
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136 | ASMAtomicIncU32(&g_cRead);
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137 | break;
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138 | }
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139 | }
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140 |
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141 | /* failed */
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142 | pTscData->fFailed = true;
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143 | pTscData->fRead = false;
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144 | ASMAtomicIncU32(&g_cFailed);
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145 | break;
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146 | }
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147 | }
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148 |
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149 | return VINF_SUCCESS;
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150 | }
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151 |
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152 |
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153 | int main()
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154 | {
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155 | RTR3Init();
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156 |
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157 | /*
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158 | * This is only relevant to on SMP systems.
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159 | */
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160 | const unsigned cCpus = RTSystemProcessorGetCount();
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161 | if (cCpus <= 1)
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162 | {
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163 | RTPrintf("tstTSC: SKIPPED - Only relevant on SMP systems\n");
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164 | return 0;
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165 | }
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166 |
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167 | /*
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168 | * Create the threads.
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169 | */
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170 | static TSCDATA s_aData[254];
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171 | uint32_t i;
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172 | if (cCpus > RT_ELEMENTS(s_aData))
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173 | {
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174 | RTPrintf("tstTSC: FAILED - too many CPUs (%u)\n", cCpus);
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175 | return 1;
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176 | }
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177 |
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178 | /* ourselves. */
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179 | s_aData[0].Thread = RTThreadSelf();
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180 |
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181 | /* the others */
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182 | for (i = 1; i < cCpus; i++)
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183 | {
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184 | int rc = RTThreadCreate(&s_aData[i].Thread, ThreadFunction, &s_aData[i], 0, RTTHREADTYPE_TIMER, RTTHREADFLAGS_WAITABLE, "OTHERCPU");
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185 | if (RT_FAILURE(rc))
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186 | {
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187 | RTPrintf("tstTSC: FAILURE - RTThreatCreate failed when creating thread #%u, rc=%Rrc!\n", i, rc);
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188 | ASMAtomicXchgSize(&g_fDone, true);
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189 | while (i-- > 1)
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190 | {
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191 | RTThreadUserSignal(s_aData[i].Thread);
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192 | RTThreadWait(s_aData[i].Thread, 5000, NULL);
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193 | }
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194 | return 1;
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195 | }
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196 | }
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197 |
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198 | /*
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199 | * Retry untill we get lucky (or give up).
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200 | */
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201 | for (unsigned cTries = 0; ; cTries++)
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202 | {
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203 | if (cTries > 10240)
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204 | {
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205 | RTPrintf("tstTSC: FAILURE - %d attempts, giving.\n", cTries);
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206 | break;
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207 | }
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208 |
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209 | /*
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210 | * Wait for the other threads to get ready (brute force active wait, I'm lazy).
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211 | */
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212 | i = 0;
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213 | while (g_cWaiting < cCpus - 1)
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214 | {
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215 | if (i++ > _2G32)
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216 | break;
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217 | RTThreadSleep(i & 0xf);
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218 | }
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219 | if (g_cWaiting != cCpus - 1)
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220 | {
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221 | RTPrintf("tstTSC: FAILURE - threads failed to get waiting (%d != %d (i=%d))\n", g_cWaiting + 1, cCpus, i);
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222 | break;
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223 | }
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224 |
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225 | /*
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226 | * Send them spinning.
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227 | */
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228 | ASMAtomicXchgU32(&g_cReady, 0);
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229 | ASMAtomicXchgU32(&g_u32Go, 0);
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230 | ASMAtomicXchgU32(&g_cRead, 0);
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231 | ASMAtomicXchgU32(&g_cFailed, 0);
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232 | for (i = 1; i < cCpus; i++)
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233 | {
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234 | ASMAtomicXchgSize(&s_aData[i].fFailed, false);
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235 | ASMAtomicXchgSize(&s_aData[i].fRead, false);
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236 | ASMAtomicXchgU8(&s_aData[i].u8ApicId, 0xff);
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237 |
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238 | int rc = RTThreadUserSignal(s_aData[i].Thread);
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239 | if (RT_FAILURE(rc))
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240 | RTPrintf("tstTSC: WARNING - RTThreadUserSignal(%#u) -> rc=%Rrc!\n", i, rc);
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241 | }
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242 |
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243 | /* wait for them to get ready. */
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244 | i = 0;
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245 | while (g_cReady < cCpus - 1)
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246 | {
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247 | if (i++ > _2G32)
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248 | break;
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249 | }
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250 | if (g_cReady != cCpus - 1)
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251 | {
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252 | RTPrintf("tstTSC: FAILURE - threads failed to get ready (%d != %d, i=%d)\n", g_cWaiting + 1, cCpus, i);
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253 | break;
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254 | }
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255 |
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256 | /*
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257 | * Flip the "go" switch and do our readings.
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258 | * We give the other threads the slack it takes to two extra TSC and APIC ID reads.
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259 | */
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260 | const uint8_t ApicId1 = ASMGetApicId();
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261 | const uint64_t TSC1 = ASMReadTSC();
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262 | ASMAtomicXchgU32(&g_u32Go, 1);
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263 | const uint8_t ApicId2 = ASMGetApicId();
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264 | const uint64_t TSC2 = ASMReadTSC();
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265 | const uint8_t ApicId3 = ASMGetApicId();
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266 | const uint64_t TSC3 = ASMReadTSC();
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267 | const uint8_t ApicId4 = ASMGetApicId();
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268 | const uint64_t TSC4 = ASMReadTSC();
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269 | ASMAtomicXchgU32(&g_u32Go, 2);
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270 | const uint8_t ApicId5 = ASMGetApicId();
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271 | const uint64_t TSC5 = ASMReadTSC();
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272 | const uint8_t ApicId6 = ASMGetApicId();
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273 |
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274 | /* Compose our own result. */
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275 | if ( ApicId1 == ApicId2
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276 | && ApicId1 == ApicId3
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277 | && ApicId1 == ApicId4
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278 | && ApicId1 == ApicId5
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279 | && ApicId1 == ApicId6
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280 | && TSC5 - TSC1 < 2750 /* WARNING: This is just a guess, increase if it doesn't work for you. */
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281 | && TSC4 - TSC1 < TSC5 - TSC1
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282 | && TSC3 - TSC1 < TSC4 - TSC1
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283 | && TSC2 - TSC1 < TSC3 - TSC1
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284 | )
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285 | {
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286 | /* succeeded. */
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287 | s_aData[0].TSC = TSC2;
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288 | s_aData[0].u8ApicId = ApicId1;
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289 | s_aData[0].fFailed = false;
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290 | s_aData[0].fRead = true;
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291 | ASMAtomicIncU32(&g_cRead);
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292 | }
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293 | else
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294 | {
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295 | /* failed */
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296 | s_aData[0].fFailed = true;
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297 | s_aData[0].fRead = false;
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298 | ASMAtomicIncU32(&g_cFailed);
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299 | }
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300 |
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301 | /*
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302 | * Wait a little while to let the other ones to finish.
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303 | */
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304 | i = 0;
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305 | while (g_cRead + g_cFailed < cCpus)
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306 | {
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307 | if (i++ > _2G32)
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308 | break;
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309 | if (i > _1M)
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310 | RTThreadSleep(i & 0xf);
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311 | }
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312 | if (g_cRead + g_cFailed != cCpus)
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313 | {
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314 | RTPrintf("tstTSC: FAILURE - threads failed to complete reading (%d + %d != %d)\n", g_cRead, g_cFailed, cCpus);
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315 | break;
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316 | }
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317 |
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318 | /*
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319 | * If everone succeeded, print the results.
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320 | */
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321 | if (!g_cFailed)
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322 | {
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323 | /* sort it by apic id first. */
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324 | bool fDone;
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325 | do
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326 | {
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327 | for (i = 1, fDone = true; i < cCpus; i++)
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328 | if (s_aData[i - 1].u8ApicId > s_aData[i].u8ApicId)
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329 | {
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330 | TSCDATA Tmp = s_aData[i - 1];
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331 | s_aData[i - 1] = s_aData[i];
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332 | s_aData[i] = Tmp;
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333 | fDone = false;
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334 | }
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335 | } while (!fDone);
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336 |
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337 | RTPrintf(" # ID TSC delta0 (decimal)\n"
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338 | "-----------------------------------------\n");
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339 | RTPrintf("%2d %02x %RX64\n", 0, s_aData[0].u8ApicId, s_aData[0].TSC);
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340 | for (i = 1; i < cCpus; i++)
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341 | RTPrintf("%2d %02x %RX64 %s%lld\n", i, s_aData[i].u8ApicId, s_aData[i].TSC,
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342 | s_aData[i].TSC > s_aData[0].TSC ? "+" : "", s_aData[i].TSC - s_aData[0].TSC);
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343 | RTPrintf("(Needed %u attempt%s.)\n", cTries + 1, cTries ? "s" : "");
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344 | break;
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345 | }
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346 | }
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347 |
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348 | /*
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349 | * Destroy the threads.
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350 | */
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351 | ASMAtomicXchgSize(&g_fDone, true);
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352 | for (i = 0; i < cCpus; i++)
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353 | if (s_aData[i].Thread != RTThreadSelf())
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354 | {
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355 | int rc = RTThreadUserSignal(s_aData[i].Thread);
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356 | if (RT_FAILURE(rc))
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357 | RTPrintf("tstTSC: WARNING - RTThreadUserSignal(%#u) -> rc=%Rrc! (2)\n", i, rc);
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358 | }
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359 | for (i = 0; i < cCpus; i++)
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360 | if (s_aData[i].Thread != RTThreadSelf())
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361 | {
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362 | int rc = RTThreadWait(s_aData[i].Thread, 5000, NULL);
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363 | if (RT_FAILURE(rc))
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364 | RTPrintf("tstTSC: WARNING - RTThreadWait(%#u) -> rc=%Rrc!\n", i, rc);
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365 | }
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366 |
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367 | return g_cFailed != 0 || g_cRead != cCpus;
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368 | }
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