DBGFDisas.cpp@ 16462

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1	/* $Id: DBGFDisas.cpp 15942 2009-01-14 13:20:58Z vboxsync $ */
2	/** @file
3	* DBGF - Debugger Facility, Disassembler.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	/*******************************************************************************
23	* Header Files *
24	*******************************************************************************/
25	#define LOG_GROUP LOG_GROUP_DBGF
26	#include <VBox/dbgf.h>
27	#include <VBox/selm.h>
28	#include <VBox/mm.h>
29	#include <VBox/pgm.h>
30	#include <VBox/cpum.h>
31	#include "DBGFInternal.h"
32	#include <VBox/dis.h>
33	#include <VBox/err.h>
34	#include <VBox/param.h>
35
36	#include <VBox/log.h>
37	#include <iprt/assert.h>
38	#include <iprt/string.h>
39	#include <iprt/alloca.h>
40	#include <iprt/ctype.h>
41
42
43	/*******************************************************************************
44	* Structures and Typedefs *
45	*******************************************************************************/
46	/**
47	* Structure used when disassembling and instructions in DBGF.
48	* This is used so the reader function can get the stuff it needs.
49	*/
50	typedef struct
51	{
52	/** The core structure. */
53	DISCPUSTATE Cpu;
54	/** The VM handle. */
55	PVM pVM;
56	/** Pointer to the first byte in the segemnt. */
57	RTGCUINTPTR GCPtrSegBase;
58	/** Pointer to the byte after the end of the segment. (might have wrapped!) */
59	RTGCUINTPTR GCPtrSegEnd;
60	/** The size of the segment minus 1. */
61	RTGCUINTPTR cbSegLimit;
62	/** The guest paging mode. */
63	PGMMODE enmMode;
64	/** Pointer to the current page - R3 Ptr. */
65	void const *pvPageR3;
66	/** Pointer to the current page - GC Ptr. */
67	RTGCPTR pvPageGC;
68	/** Pointer to the next instruction (relative to GCPtrSegBase). */
69	RTGCUINTPTR GCPtrNext;
70	/** The lock information that PGMPhysReleasePageMappingLock needs. */
71	PGMPAGEMAPLOCK PageMapLock;
72	/** Whether the PageMapLock is valid or not. */
73	bool fLocked;
74	/** 64 bits mode or not. */
75	bool f64Bits;
76	} DBGFDISASSTATE, *PDBGFDISASSTATE;
77
78
79	/*******************************************************************************
80	* Internal Functions *
81	*******************************************************************************/
82	static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTUINTPTR pSrc, uint8_t pDest, uint32_t size, void pvUserdata);
83
84
85
86	/**
87	* Calls the dissassembler with the proper reader functions and such for disa
88	*
89	* @returns VBox status code.
90	* @param pVM VM handle
91	* @param pSelInfo The selector info.
92	* @param enmMode The guest paging mode.
93	* @param GCPtr The GC pointer (selector offset).
94	* @param pState The disas CPU state.
95	*/
96	static int dbgfR3DisasInstrFirst(PVM pVM, PSELMSELINFO pSelInfo, PGMMODE enmMode, RTGCPTR GCPtr, PDBGFDISASSTATE pState)
97	{
98	pState->GCPtrSegBase = pSelInfo->GCPtrBase;
99	pState->GCPtrSegEnd = pSelInfo->cbLimit + 1 + (RTGCUINTPTR)pSelInfo->GCPtrBase;
100	pState->cbSegLimit = pSelInfo->cbLimit;
101	pState->enmMode = enmMode;
102	pState->pvPageGC = 0;
103	pState->pvPageR3 = NULL;
104	pState->pVM = pVM;
105	pState->fLocked = false;
106	pState->f64Bits = enmMode >= PGMMODE_AMD64 && pSelInfo->Raw.Gen.u1Long;
107	uint32_t cbInstr;
108	int rc = DISCoreOneEx(GCPtr,
109	pState->f64Bits
110	? CPUMODE_64BIT
111	: pSelInfo->Raw.Gen.u1DefBig
112	? CPUMODE_32BIT
113	: CPUMODE_16BIT,
114	dbgfR3DisasInstrRead,
115	&pState->Cpu,
116	&pState->Cpu,
117	&cbInstr);
118	if (RT_SUCCESS(rc))
119	{
120	pState->GCPtrNext = GCPtr + cbInstr;
121	return VINF_SUCCESS;
122	}
123
124	/* cleanup */
125	if (pState->fLocked)
126	{
127	PGMPhysReleasePageMappingLock(pVM, &pState->PageMapLock);
128	pState->fLocked = false;
129	}
130	return rc;
131	}
132
133
134	#if 0
135	/**
136	* Calls the dissassembler for disassembling the next instruction.
137	*
138	* @returns VBox status code.
139	* @param pState The disas CPU state.
140	*/
141	static int dbgfR3DisasInstrNext(PDBGFDISASSTATE pState)
142	{
143	uint32_t cbInstr;
144	int rc = DISInstr(&pState->Cpu, (void *)pState->GCPtrNext, 0, &cbInstr, NULL);
145	if (RT_SUCCESS(rc))
146	{
147	pState->GCPtrNext = GCPtr + cbInstr;
148	return VINF_SUCCESS;
149	}
150	return rc;
151	}
152	#endif
153
154
155	/**
156	* Done with the dissassembler state, free associated resources.
157	*
158	* @param pState The disas CPU state ++.
159	*/
160	static void dbgfR3DisasInstrDone(PDBGFDISASSTATE pState)
161	{
162	if (pState->fLocked)
163	{
164	PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
165	pState->fLocked = false;
166	}
167	}
168
169
170	/**
171	* Instruction reader.
172	*
173	* @returns VBox status code. (Why this is a int32_t and not just an int is also beyond me.)
174	* @param PtrSrc Address to read from.
175	* In our case this is relative to the selector pointed to by the 2nd user argument of uDisCpu.
176	* @param pu8Dst Where to store the bytes.
177	* @param cbRead Number of bytes to read.
178	* @param uDisCpu Pointer to the disassembler cpu state. (Why this is a VBOXHUINTPTR is beyond me...)
179	* In this context it's always pointer to the Core of a DBGFDISASSTATE.
180	*/
181	static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTUINTPTR PtrSrc, uint8_t pu8Dst, uint32_t cbRead, void pvDisCpu)
182	{
183	PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pvDisCpu;
184	Assert(cbRead > 0);
185	for (;;)
186	{
187	RTGCUINTPTR GCPtr = PtrSrc + pState->GCPtrSegBase;
188
189	/* Need to update the page translation? */
190	if ( !pState->pvPageR3
191	\|\| (GCPtr >> PAGE_SHIFT) != (pState->pvPageGC >> PAGE_SHIFT))
192	{
193	int rc = VINF_SUCCESS;
194
195	/* translate the address */
196	pState->pvPageGC = GCPtr & PAGE_BASE_GC_MASK;
197	if (MMHyperIsInsideArea(pState->pVM, pState->pvPageGC))
198	{
199	pState->pvPageR3 = MMHyperRCToR3(pState->pVM, (RTRCPTR)pState->pvPageGC);
200	if (!pState->pvPageR3)
201	rc = VERR_INVALID_POINTER;
202	}
203	else
204	{
205	if (pState->fLocked)
206	PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
207
208	if (pState->enmMode <= PGMMODE_PROTECTED)
209	rc = PGMPhysGCPhys2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageR3, &pState->PageMapLock);
210	else
211	rc = PGMPhysGCPtr2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageR3, &pState->PageMapLock);
212	pState->fLocked = RT_SUCCESS_NP(rc);
213	}
214	if (RT_FAILURE(rc))
215	{
216	pState->pvPageR3 = NULL;
217	return rc;
218	}
219	}
220
221	/* check the segemnt limit */
222	if (!pState->f64Bits && PtrSrc > pState->cbSegLimit)
223	return VERR_OUT_OF_SELECTOR_BOUNDS;
224
225	/* calc how much we can read */
226	uint32_t cb = PAGE_SIZE - (GCPtr & PAGE_OFFSET_MASK);
227	if (!pState->f64Bits)
228	{
229	RTGCUINTPTR cbSeg = pState->GCPtrSegEnd - GCPtr;
230	if (cb > cbSeg && cbSeg)
231	cb = cbSeg;
232	}
233	if (cb > cbRead)
234	cb = cbRead;
235
236	/* read and advance */
237	memcpy(pu8Dst, (char *)pState->pvPageR3 + (GCPtr & PAGE_OFFSET_MASK), cb);
238	cbRead -= cb;
239	if (!cbRead)
240	return VINF_SUCCESS;
241	pu8Dst += cb;
242	PtrSrc += cb;
243	}
244	}
245
246
247	/**
248	* @copydoc FNDISGETSYMBOL
249	*/
250	static DECLCALLBACK(int) dbgfR3DisasGetSymbol(PCDISCPUSTATE pCpu, uint32_t u32Sel, RTUINTPTR uAddress, char pszBuf, size_t cchBuf, RTINTPTR poff, void *pvUser)
251	{
252	PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pCpu;
253	PCSELMSELINFO pSelInfo = (PCSELMSELINFO)pvUser;
254	DBGFSYMBOL Sym;
255	RTGCINTPTR off;
256	int rc;
257
258	if (DIS_FMT_SEL_IS_REG(u32Sel))
259	{
260	if (DIS_FMT_SEL_GET_REG(u32Sel) == DIS_SELREG_CS)
261	rc = DBGFR3SymbolByAddr(pState->pVM, uAddress + pSelInfo->GCPtrBase, &off, &Sym);
262	else
263	rc = VERR_SYMBOL_NOT_FOUND; /** @todo implement this */
264	}
265	else
266	{
267	if (pSelInfo->Sel == DIS_FMT_SEL_GET_VALUE(u32Sel))
268	rc = DBGFR3SymbolByAddr(pState->pVM, uAddress + pSelInfo->GCPtrBase, &off, &Sym);
269	else
270	rc = VERR_SYMBOL_NOT_FOUND; /** @todo implement this */
271	}
272
273	if (RT_SUCCESS(rc))
274	{
275	size_t cchName = strlen(Sym.szName);
276	if (cchName >= cchBuf)
277	cchName = cchBuf - 1;
278	memcpy(pszBuf, Sym.szName, cchName);
279	pszBuf[cchName] = '\0';
280
281	*poff = off;
282	}
283
284	return rc;
285	}
286
287
288	/**
289	* Disassembles the one instruction according to the specified flags and address.
290	*
291	* @returns VBox status code.
292	* @param pVM VM handle.
293	* @param Sel The code selector. This used to determin the 32/16 bit ness and
294	* calculation of the actual instruction address.
295	* @param GCPtr The code address relative to the base of Sel.
296	* @param fFlags Flags controlling where to start and how to format.
297	* A combination of the DBGF_DISAS_FLAGS_* \#defines.
298	* @param pszOutput Output buffer.
299	* @param cchOutput Size of the output buffer.
300	* @param pcbInstr Where to return the size of the instruction.
301	*/
302	VMMR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char pszOutput, uint32_t cchOutput, uint32_t pcbInstr)
303	{
304	/*
305	* Get the Sel and GCPtr if fFlags requests that.
306	*/
307	PCCPUMCTXCORE pCtxCore = NULL;
308	CPUMSELREGHID *pHiddenSel = NULL;
309	int rc;
310	if (fFlags & (DBGF_DISAS_FLAGS_CURRENT_GUEST \| DBGF_DISAS_FLAGS_CURRENT_HYPER))
311	{
312	if (fFlags & DBGF_DISAS_FLAGS_CURRENT_GUEST)
313	pCtxCore = CPUMGetGuestCtxCoreEx(pVM, VMMGetCpu(pVM)); /* @todo SMP */
314	else
315	pCtxCore = CPUMGetHyperCtxCore(pVM);
316	Sel = pCtxCore->cs;
317	pHiddenSel = (CPUMSELREGHID *)&pCtxCore->csHid;
318	GCPtr = pCtxCore->rip;
319	}
320
321	/*
322	* Read the selector info - assume no stale selectors and nasty stuff like that.
323	* Since the selector flags in the CPUMCTX structures aren't up to date unless
324	* we recently visited REM, we'll not search for the selector there.
325	*/
326	SELMSELINFO SelInfo;
327	const PGMMODE enmMode = PGMGetGuestMode(pVM);
328	bool fRealModeAddress = false;
329
330	if ( pHiddenSel
331	&& CPUMAreHiddenSelRegsValid(pVM))
332	{
333	SelInfo.GCPtrBase = pHiddenSel->u64Base;
334	SelInfo.cbLimit = pHiddenSel->u32Limit;
335	SelInfo.fHyper = false;
336	SelInfo.fRealMode = !!((pCtxCore && pCtxCore->eflags.Bits.u1VM) \|\| enmMode == PGMMODE_REAL);
337	SelInfo.Raw.au32[0] = 0;
338	SelInfo.Raw.au32[1] = 0;
339	SelInfo.Raw.Gen.u16LimitLow = 0xffff;
340	SelInfo.Raw.Gen.u4LimitHigh = 0xf;
341	SelInfo.Raw.Gen.u1Present = pHiddenSel->Attr.n.u1Present;
342	SelInfo.Raw.Gen.u1Granularity = pHiddenSel->Attr.n.u1Granularity;;
343	SelInfo.Raw.Gen.u1DefBig = pHiddenSel->Attr.n.u1DefBig;
344	SelInfo.Raw.Gen.u1Long = pHiddenSel->Attr.n.u1Long;
345	SelInfo.Raw.Gen.u1DescType = pHiddenSel->Attr.n.u1DescType;
346	SelInfo.Raw.Gen.u4Type = pHiddenSel->Attr.n.u4Type;
347	fRealModeAddress = SelInfo.fRealMode;
348	}
349	else if (Sel == DBGF_SEL_FLAT)
350	{
351	SelInfo.GCPtrBase = 0;
352	SelInfo.cbLimit = ~0;
353	SelInfo.fHyper = false;
354	SelInfo.fRealMode = false;
355	SelInfo.Raw.au32[0] = 0;
356	SelInfo.Raw.au32[1] = 0;
357	SelInfo.Raw.Gen.u16LimitLow = 0xffff;
358	SelInfo.Raw.Gen.u4LimitHigh = 0xf;
359
360	if (CPUMAreHiddenSelRegsValid(pVM))
361	{ /* Assume the current CS defines the execution mode. */
362	pCtxCore = CPUMGetGuestCtxCoreEx(pVM, VMMGetCpu(pVM)); /* @todo SMP */
363	pHiddenSel = (CPUMSELREGHID *)&pCtxCore->csHid;
364
365	SelInfo.Raw.Gen.u1Present = pHiddenSel->Attr.n.u1Present;
366	SelInfo.Raw.Gen.u1Granularity = pHiddenSel->Attr.n.u1Granularity;;
367	SelInfo.Raw.Gen.u1DefBig = pHiddenSel->Attr.n.u1DefBig;
368	SelInfo.Raw.Gen.u1Long = pHiddenSel->Attr.n.u1Long;
369	SelInfo.Raw.Gen.u1DescType = pHiddenSel->Attr.n.u1DescType;
370	SelInfo.Raw.Gen.u4Type = pHiddenSel->Attr.n.u4Type;
371	}
372	else
373	{
374	SelInfo.Raw.Gen.u1Present = 1;
375	SelInfo.Raw.Gen.u1Granularity = 1;
376	SelInfo.Raw.Gen.u1DefBig = 1;
377	SelInfo.Raw.Gen.u1DescType = 1;
378	SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
379	}
380	}
381	else if ( !(fFlags & DBGF_DISAS_FLAGS_CURRENT_HYPER)
382	&& ( (pCtxCore && pCtxCore->eflags.Bits.u1VM)
383	\|\| enmMode == PGMMODE_REAL) )
384	{ /* V86 mode or real mode - real mode addressing */
385	SelInfo.GCPtrBase = Sel * 16;
386	SelInfo.cbLimit = ~0;
387	SelInfo.fHyper = false;
388	SelInfo.fRealMode = true;
389	SelInfo.Raw.au32[0] = 0;
390	SelInfo.Raw.au32[1] = 0;
391	SelInfo.Raw.Gen.u16LimitLow = 0xffff;
392	SelInfo.Raw.Gen.u4LimitHigh = 0xf;
393	SelInfo.Raw.Gen.u1Present = 1;
394	SelInfo.Raw.Gen.u1Granularity = 1;
395	SelInfo.Raw.Gen.u1DefBig = 0; /* 16 bits */
396	SelInfo.Raw.Gen.u1DescType = 1;
397	SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
398	fRealModeAddress = true;
399	}
400	else
401	{
402	rc = SELMR3GetSelectorInfo(pVM, Sel, &SelInfo);
403	if (RT_FAILURE(rc))
404	{
405	RTStrPrintf(pszOutput, cchOutput, "Sel=%04x -> %Rrc\n", Sel, rc);
406	return rc;
407	}
408	}
409
410	/*
411	* Disassemble it.
412	*/
413	DBGFDISASSTATE State;
414	rc = dbgfR3DisasInstrFirst(pVM, &SelInfo, enmMode, GCPtr, &State);
415	if (RT_FAILURE(rc))
416	{
417	RTStrPrintf(pszOutput, cchOutput, "Disas -> %Rrc\n", rc);
418	return rc;
419	}
420
421	/*
422	* Format it.
423	*/
424	char szBuf[512];
425	DISFormatYasmEx(&State.Cpu, szBuf, sizeof(szBuf),
426	DIS_FMT_FLAGS_RELATIVE_BRANCH,
427	fFlags & DBGF_DISAS_FLAGS_NO_SYMBOLS ? NULL : dbgfR3DisasGetSymbol,
428	&SelInfo);
429
430	/*
431	* Print it to the user specified buffer.
432	*/
433	if (fFlags & DBGF_DISAS_FLAGS_NO_BYTES)
434	{
435	if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
436	RTStrPrintf(pszOutput, cchOutput, "%s", szBuf);
437	else if (fRealModeAddress)
438	RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %s", Sel, (unsigned)GCPtr, szBuf);
439	else if (Sel == DBGF_SEL_FLAT)
440	{
441	if (enmMode >= PGMMODE_AMD64)
442	RTStrPrintf(pszOutput, cchOutput, "%RGv %s", GCPtr, szBuf);
443	else
444	RTStrPrintf(pszOutput, cchOutput, "%08RX32 %s", (uint32_t)GCPtr, szBuf);
445	}
446	else
447	{
448	if (enmMode >= PGMMODE_AMD64)
449	RTStrPrintf(pszOutput, cchOutput, "%04x:%RGv %s", Sel, GCPtr, szBuf);
450	else
451	RTStrPrintf(pszOutput, cchOutput, "%04x:%08RX32 %s", Sel, (uint32_t)GCPtr, szBuf);
452	}
453	}
454	else
455	{
456	uint32_t cbBits = State.Cpu.opsize;
457	uint8_t pau8Bits = (uint8_t )alloca(cbBits);
458	rc = dbgfR3DisasInstrRead(GCPtr, pau8Bits, cbBits, &State);
459	AssertRC(rc);
460	if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
461	RTStrPrintf(pszOutput, cchOutput, "%.Rhxs%s %s",
462	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
463	szBuf);
464	else if (fRealModeAddress)
465	RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %.Rhxs%s %s",
466	Sel, (unsigned)GCPtr,
467	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
468	szBuf);
469	else if (Sel == DBGF_SEL_FLAT)
470	{
471	if (enmMode >= PGMMODE_AMD64)
472	RTStrPrintf(pszOutput, cchOutput, "%RGv %.Rhxs%s %s",
473	GCPtr,
474	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
475	szBuf);
476	else
477	RTStrPrintf(pszOutput, cchOutput, "%08RX32 %.Rhxs%s %s",
478	(uint32_t)GCPtr,
479	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
480	szBuf);
481	}
482	else
483	{
484	if (enmMode >= PGMMODE_AMD64)
485	RTStrPrintf(pszOutput, cchOutput, "%04x:%RGv %.Rhxs%s %s",
486	Sel, GCPtr,
487	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
488	szBuf);
489	else
490	RTStrPrintf(pszOutput, cchOutput, "%04x:%08RX32 %.Rhxs%s %s",
491	Sel, (uint32_t)GCPtr,
492	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
493	szBuf);
494	}
495	}
496
497	if (pcbInstr)
498	*pcbInstr = State.Cpu.opsize;
499
500	dbgfR3DisasInstrDone(&State);
501	return VINF_SUCCESS;
502	}
503
504
505	/**
506	* Disassembles an instruction.
507	* Addresses will be tried resolved to symbols
508	*
509	* @returns VBox status code.
510	* @param pVM VM handle.
511	* @param Sel The code selector. This used to determin the 32/16 bit ness and
512	* calculation of the actual instruction address.
513	* @param GCPtr The code address relative to the base of Sel.
514	* @param pszOutput Output buffer.
515	* @param cchOutput Size of the output buffer.
516	*/
517	VMMR3DECL(int) DBGFR3DisasInstr(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cchOutput)
518	{
519	return DBGFR3DisasInstrEx(pVM, Sel, GCPtr, 0, pszOutput, cchOutput, NULL);
520	}
521
522
523	/**
524	* Disassembles the current guest context instruction.
525	* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
526	*
527	* @returns VBox status code.
528	* @param pVM VM handle.
529	* @param pszOutput Output buffer.
530	* @param cchOutput Size of the output buffer.
531	*/
532	VMMR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cchOutput)
533	{
534	return DBGFR3DisasInstrEx(pVM, 0, 0, DBGF_DISAS_FLAGS_CURRENT_GUEST, pszOutput, cchOutput, NULL);
535	}
536
537
538	/**
539	* Disassembles the current guest context instruction and writes it to the log.
540	* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
541	*
542	* @returns VBox status code.
543	* @param pVM VM handle.
544	* @param pszPrefix Short prefix string to the dissassembly string. (optional)
545	*/
546	VMMR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVM pVM, const char *pszPrefix)
547	{
548	char szBuf[256];
549	szBuf[0] = '\0';
550	int rc = DBGFR3DisasInstrCurrent(pVM, &szBuf[0], sizeof(szBuf));
551	if (RT_FAILURE(rc))
552	RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrCurrentLog failed with rc=%Rrc\n", rc);
553	if (pszPrefix && *pszPrefix)
554	RTLogPrintf("%s: %s\n", pszPrefix, szBuf);
555	else
556	RTLogPrintf("%s\n", szBuf);
557	return rc;
558	}
559
560
561
562	/**
563	* Disassembles the specified guest context instruction and writes it to the log.
564	* Addresses will be attempted resolved to symbols.
565	*
566	* @returns VBox status code.
567	* @param pVM VM handle.
568	* @param Sel The code selector. This used to determin the 32/16 bit-ness and
569	* calculation of the actual instruction address.
570	* @param GCPtr The code address relative to the base of Sel.
571	*/
572	VMMR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr)
573	{
574	char szBuf[256];
575	szBuf[0] = '\0';
576	int rc = DBGFR3DisasInstr(pVM, Sel, GCPtr, &szBuf[0], sizeof(szBuf));
577	if (RT_FAILURE(rc))
578	RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Rrc\n", Sel, GCPtr, rc);
579	RTLogPrintf("%s\n", szBuf);
580	return rc;
581	}
582

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source: vbox/trunk/src/VBox/VMM/DBGFDisas.cpp@ 16462

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