VirtualBox

source: vbox/trunk/src/VBox/VMM/DBGFDisas.cpp@ 4953

Last change on this file since 4953 was 4953, checked in by vboxsync, 18 years ago

Cleaned up disassembler
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 24.2 KB
Line 
1/* $Id: DBGFDisas.cpp 4953 2007-09-21 14:08:19Z vboxsync $ */
2/** @file
3 * VMM DBGF - Debugger Facility, Disassembler.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_DBGF
23#include <VBox/dbgf.h>
24#include <VBox/selm.h>
25#include <VBox/mm.h>
26#include <VBox/pgm.h>
27#include "DBGFInternal.h"
28#include <VBox/dis.h>
29#include <VBox/err.h>
30#include <VBox/param.h>
31
32#include <VBox/log.h>
33#include <iprt/assert.h>
34#include <iprt/string.h>
35#include <iprt/alloca.h>
36#include <iprt/ctype.h>
37
38
39/*******************************************************************************
40* Internal Functions *
41*******************************************************************************/
42static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTHCUINTPTR pSrc, uint8_t *pDest, uint32_t size, void *pvUserdata);
43
44
45/**
46 * Structure used when disassembling and instructions in DBGF.
47 * This is used so the reader function can get the stuff it needs.
48 */
49typedef struct
50{
51 /** The core structure. */
52 DISCPUSTATE Cpu;
53 /** The VM handle. */
54 PVM pVM;
55 /** Pointer to the first byte in the segemnt. */
56 RTGCUINTPTR GCPtrSegBase;
57 /** Pointer to the byte after the end of the segment. (might have wrapped!) */
58 RTGCUINTPTR GCPtrSegEnd;
59 /** The size of the segment minus 1. */
60 RTGCUINTPTR cbSegLimit;
61 /** The guest paging mode. */
62 PGMMODE enmMode;
63 /** Pointer to the current page - HC Ptr. */
64 void *pvPageHC;
65 /** Pointer to the current page - GC Ptr. */
66 RTGCPTR pvPageGC;
67 /** Pointer to the next instruction (relative to GCPtrSegBase). */
68 RTGCUINTPTR GCPtrNext;
69} DBGFDISASSTATE, *PDBGFDISASSTATE;
70
71
72
73/**
74 * Calls the dissassembler with the proper reader functions and such for disa
75 *
76 * @returns VBox status code.
77 * @param pVM VM handle
78 * @param pSelInfo The selector info.
79 * @param enmMode The guest paging mode.
80 * @param GCPtr The GC pointer (selector offset).
81 * @param pState The disas CPU state.
82 */
83static int dbgfR3DisasInstrFirst(PVM pVM, PSELMSELINFO pSelInfo, PGMMODE enmMode, RTGCPTR GCPtr, PDBGFDISASSTATE pState)
84{
85 pState->Cpu.mode = pSelInfo->Raw.Gen.u1DefBig ? CPUMODE_32BIT : CPUMODE_16BIT;
86 pState->Cpu.pfnReadBytes = dbgfR3DisasInstrRead;
87 pState->GCPtrSegBase = pSelInfo->GCPtrBase;
88 pState->GCPtrSegEnd = pSelInfo->cbLimit + 1 + (RTGCUINTPTR)pSelInfo->GCPtrBase;
89 pState->cbSegLimit = pSelInfo->cbLimit;
90 pState->enmMode = enmMode;
91 pState->pvPageGC = 0;
92 pState->pvPageHC = NULL;
93 pState->pVM = pVM;
94 Assert((uintptr_t)GCPtr == GCPtr);
95 uint32_t cbInstr;
96 int rc = DISInstr(&pState->Cpu, GCPtr, 0, &cbInstr, NULL);
97 if (VBOX_SUCCESS(rc))
98 {
99 pState->GCPtrNext = GCPtr + cbInstr;
100 return VINF_SUCCESS;
101 }
102 return rc;
103}
104
105
106#if 0
107/**
108 * Calls the dissassembler for disassembling the next instruction.
109 *
110 * @returns VBox status code.
111 * @param pState The disas CPU state.
112 */
113static int dbgfR3DisasInstrNext(PDBGFDISASSTATE pState)
114{
115 pState->rc = VINF_SUCCESS;
116 uint32_t cbInstr;
117 int rc = DISInstr(&pState->Cpu, (void *)pState->GCPtrNext, 0, &cbInstr, NULL);
118 if (VBOX_SUCCESS(rc))
119 {
120 pState->GCPtrNext = GCPtr + cbInstr;
121 return VINF_SUCCESS;
122 }
123 return rc;
124}
125#endif
126
127
128/**
129 * Instruction reader.
130 *
131 * @returns VBox status code. (Why this is a int32_t and not just an int is also beyond me.)
132 * @param PtrSrc Address to read from.
133 * In our case this is relative to the selector pointed to by the 2nd user argument of uDisCpu.
134 * @param pu8Dst Where to store the bytes.
135 * @param cbRead Number of bytes to read.
136 * @param uDisCpu Pointer to the disassembler cpu state. (Why this is a VBOXHUINTPTR is beyond me...)
137 * In this context it's always pointer to the Core of a DBGFDISASSTATE.
138 */
139static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTHCUINTPTR PtrSrc, uint8_t *pu8Dst, unsigned cbRead, void *pvDisCpu)
140{
141 PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pvDisCpu;
142 Assert(cbRead > 0);
143 for (;;)
144 {
145 RTGCUINTPTR GCPtr = PtrSrc + pState->GCPtrSegBase;
146
147 /* Need to update the page translation? */
148 if ( !pState->pvPageHC
149 || (GCPtr >> PAGE_SHIFT) != (pState->pvPageGC >> PAGE_SHIFT))
150 {
151 int rc = VINF_SUCCESS;
152
153 /* translate the address */
154 pState->pvPageGC = GCPtr & PAGE_BASE_GC_MASK;
155 if (MMHyperIsInsideArea(pState->pVM, pState->pvPageGC))
156 {
157 pState->pvPageHC = MMHyperGC2HC(pState->pVM, pState->pvPageGC);
158 if (!pState->pvPageHC)
159 rc = VERR_INVALID_POINTER;
160 }
161 else if (pState->enmMode <= PGMMODE_PROTECTED)
162 rc = PGMPhysGCPhys2HCPtr(pState->pVM, pState->pvPageGC, PAGE_SIZE, &pState->pvPageHC);
163 else
164 rc = PGMPhysGCPtr2HCPtr(pState->pVM, pState->pvPageGC, &pState->pvPageHC);
165 if (VBOX_FAILURE(rc))
166 {
167 pState->pvPageHC = NULL;
168 return rc;
169 }
170 }
171
172 /* check the segemnt limit */
173 if (PtrSrc > pState->cbSegLimit)
174 return VERR_OUT_OF_SELECTOR_BOUNDS;
175
176 /* calc how much we can read */
177 uint32_t cb = PAGE_SIZE - (GCPtr & PAGE_OFFSET_MASK);
178 RTGCUINTPTR cbSeg = pState->GCPtrSegEnd - GCPtr;
179 if (cb > cbSeg && cbSeg)
180 cb = cbSeg;
181 if (cb > cbRead)
182 cb = cbRead;
183
184 /* read and advance */
185 memcpy(pu8Dst, (char *)pState->pvPageHC + (GCPtr & PAGE_OFFSET_MASK), cb);
186 cbRead -= cb;
187 if (!cbRead)
188 return VINF_SUCCESS;
189 pu8Dst += cb;
190 PtrSrc += cb;
191 }
192}
193
194
195/**
196 * Copy a string and return pointer to the terminator char in the copy.
197 */
198inline char *mystrpcpy(char *pszDst, const char *pszSrc)
199{
200 size_t cch = strlen(pszSrc);
201 memcpy(pszDst, pszSrc, cch + 1);
202 return pszDst + cch;
203}
204
205
206/**
207 * Disassembles the one instruction according to the specified flags and address.
208 *
209 * @returns VBox status code.
210 * @param pVM VM handle.
211 * @param Sel The code selector. This used to determin the 32/16 bit ness and
212 * calculation of the actual instruction address.
213 * @param GCPtr The code address relative to the base of Sel.
214 * @param fFlags Flags controlling where to start and how to format.
215 * A combination of the DBGF_DISAS_FLAGS_* \#defines.
216 * @param pszOutput Output buffer.
217 * @param cchOutput Size of the output buffer.
218 * @param pcbInstr Where to return the size of the instruction.
219 */
220DBGFR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char *pszOutput, uint32_t cchOutput, uint32_t *pcbInstr)
221{
222 /*
223 * Get the Sel and GCPtr if fFlags requests that.
224 */
225 PCCPUMCTXCORE pCtxCore = NULL;
226 CPUMSELREGHID *pHiddenSel = NULL;
227 int rc;
228 if (fFlags & (DBGF_DISAS_FLAGS_CURRENT_GUEST | DBGF_DISAS_FLAGS_CURRENT_HYPER))
229 {
230 if (fFlags & DBGF_DISAS_FLAGS_CURRENT_GUEST)
231 pCtxCore = CPUMGetGuestCtxCore(pVM);
232 else
233 pCtxCore = CPUMGetHyperCtxCore(pVM);
234 Sel = pCtxCore->cs;
235 pHiddenSel = (CPUMSELREGHID *)&pCtxCore->csHid;
236 GCPtr = pCtxCore->eip;
237 }
238
239 /*
240 * Read the selector info - assume no stale selectors and nasty stuff like that.
241 * Since the selector flags in the CPUMCTX structures aren't up to date unless
242 * we recently visited REM, we'll not search for the selector there.
243 */
244 SELMSELINFO SelInfo;
245 const PGMMODE enmMode = PGMGetGuestMode(pVM);
246 bool fRealModeAddress = false;
247
248 if ( pHiddenSel
249 && CPUMAreHiddenSelRegsValid(pVM))
250 {
251 SelInfo.GCPtrBase = pHiddenSel->u32Base;
252 SelInfo.cbLimit = pHiddenSel->u32Limit;
253 SelInfo.fHyper = false;
254 SelInfo.fRealMode = !!(pCtxCore && pCtxCore->eflags.Bits.u1VM || enmMode == PGMMODE_REAL);
255 SelInfo.Raw.au32[0] = 0;
256 SelInfo.Raw.au32[1] = 0;
257 SelInfo.Raw.Gen.u16LimitLow = ~0;
258 SelInfo.Raw.Gen.u4LimitHigh = ~0;
259 SelInfo.Raw.Gen.u1Present = pHiddenSel->Attr.n.u1Present;
260 SelInfo.Raw.Gen.u1Granularity = pHiddenSel->Attr.n.u1Granularity;;
261 SelInfo.Raw.Gen.u1DefBig = pHiddenSel->Attr.n.u1DefBig;
262 SelInfo.Raw.Gen.u1DescType = pHiddenSel->Attr.n.u1DescType;
263 SelInfo.Raw.Gen.u4Type = pHiddenSel->Attr.n.u4Type;
264 fRealModeAddress = SelInfo.fRealMode;
265 }
266 else if ( !(fFlags & DBGF_DISAS_FLAGS_CURRENT_HYPER)
267 && ( (pCtxCore && pCtxCore->eflags.Bits.u1VM)
268 || enmMode == PGMMODE_REAL) )
269 { /* V86 mode or real mode - real mode addressing */
270 SelInfo.GCPtrBase = Sel * 16;
271 SelInfo.cbLimit = ~0;
272 SelInfo.fHyper = false;
273 SelInfo.fRealMode = true;
274 SelInfo.Raw.au32[0] = 0;
275 SelInfo.Raw.au32[1] = 0;
276 SelInfo.Raw.Gen.u16LimitLow = ~0;
277 SelInfo.Raw.Gen.u4LimitHigh = ~0;
278 SelInfo.Raw.Gen.u1Present = 1;
279 SelInfo.Raw.Gen.u1Granularity = 1;
280 SelInfo.Raw.Gen.u1DefBig = 0; /* 16 bits */
281 SelInfo.Raw.Gen.u1DescType = 1;
282 SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
283 fRealModeAddress = true;
284 }
285 else if (Sel == DBGF_SEL_FLAT)
286 {
287 SelInfo.GCPtrBase = 0;
288 SelInfo.cbLimit = ~0;
289 SelInfo.fHyper = false;
290 SelInfo.fRealMode = false;
291 SelInfo.Raw.au32[0] = 0;
292 SelInfo.Raw.au32[1] = 0;
293 SelInfo.Raw.Gen.u16LimitLow = ~0;
294 SelInfo.Raw.Gen.u4LimitHigh = ~0;
295 SelInfo.Raw.Gen.u1Present = 1;
296 SelInfo.Raw.Gen.u1Granularity = 1;
297 SelInfo.Raw.Gen.u1DefBig = 1;
298 SelInfo.Raw.Gen.u1DescType = 1;
299 SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
300 }
301 else
302 {
303 rc = SELMR3GetSelectorInfo(pVM, Sel, &SelInfo);
304 if (VBOX_FAILURE(rc))
305 {
306 RTStrPrintf(pszOutput, cchOutput, "Sel=%04x -> %Vrc\n", Sel, rc);
307 return rc;
308 }
309 }
310
311 /*
312 * Disassemble it.
313 */
314 DBGFDISASSTATE State;
315 rc = dbgfR3DisasInstrFirst(pVM, &SelInfo, enmMode, GCPtr, &State);
316 if (VBOX_FAILURE(rc))
317 {
318 RTStrPrintf(pszOutput, cchOutput, "Disas -> %Vrc\n", rc);
319 return rc;
320 }
321
322 /*
323 * Format it.
324 */
325 char szBuf[512];
326 char *psz = &szBuf[0];
327
328 /* prefix */
329 if (State.Cpu.prefix & PREFIX_LOCK)
330 psz = (char *)memcpy(psz, "lock ", sizeof("lock ")) + sizeof("lock ") - 1;
331 if (State.Cpu.prefix & PREFIX_REP)
332 psz = (char *)memcpy(psz, "rep(e) ", sizeof("rep(e) ")) + sizeof("rep(e) ") - 1;
333 else if(State.Cpu.prefix & PREFIX_REPNE)
334 psz = (char *)memcpy(psz, "repne ", sizeof("repne ")) + sizeof("repne ") - 1;
335
336 /* the instruction */
337 const char *pszFormat = State.Cpu.pszOpcode;
338 char ch;
339 while ((ch = *pszFormat) && !isspace(ch) && ch != '%')
340 {
341 *psz++ = ch;
342 pszFormat++;
343 }
344 if (isspace(ch))
345 {
346 do *psz++ = ' ';
347#ifdef DEBUG_bird /* Not sure if Sander want's this because of log size */
348 while (psz - szBuf < 8);
349#else
350 while (0);
351#endif
352 while (isspace(*pszFormat))
353 pszFormat++;
354 }
355
356 if (fFlags & DBGF_DISAS_FLAGS_NO_ANNOTATION)
357 pCtxCore = NULL;
358
359 /** @todo implement annotation and symbol lookup! */
360 int iParam = 1;
361 for (;;)
362 {
363 ch = *pszFormat;
364 if (ch == '%')
365 {
366 ch = pszFormat[1];
367 switch (ch)
368 {
369 /*
370 * Relative jump offset.
371 */
372 case 'J':
373 {
374 AssertMsg(iParam == 1, ("Invalid branch parameter nr %d\n", iParam));
375 int32_t i32Disp;
376 if (State.Cpu.param1.flags & USE_IMMEDIATE8_REL)
377 i32Disp = (int32_t)(int8_t)State.Cpu.param1.parval;
378 else if (State.Cpu.param1.flags & USE_IMMEDIATE16_REL)
379 i32Disp = (int32_t)(int16_t)State.Cpu.param1.parval;
380 else if (State.Cpu.param1.flags & USE_IMMEDIATE32_REL)
381 i32Disp = (int32_t)State.Cpu.param1.parval;
382 else
383 {
384 AssertMsgFailed(("Oops!\n"));
385 return VERR_GENERAL_FAILURE;
386 }
387 RTGCUINTPTR GCPtrTarget = (RTGCUINTPTR)GCPtr + State.Cpu.opsize + i32Disp;
388 switch (State.Cpu.opmode)
389 {
390 case CPUMODE_16BIT: GCPtrTarget &= UINT16_MAX; break;
391 case CPUMODE_32BIT: GCPtrTarget &= UINT32_MAX; break;
392 }
393#ifdef DEBUG_bird /* an experiment. */
394 DBGFSYMBOL Sym;
395 RTGCINTPTR off;
396 int rc = DBGFR3SymbolByAddr(pVM, GCPtrTarget + SelInfo.GCPtrBase, &off, &Sym);
397 if ( VBOX_SUCCESS(rc)
398 && Sym.Value - SelInfo.GCPtrBase <= SelInfo.cbLimit
399 && off < _1M * 16 && off > -_1M * 16)
400 {
401 psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz, "%s", Sym.szName);
402 if (off > 0)
403 psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz, "+%#x", (int)off);
404 else if (off > 0)
405 psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz, "-%#x", -(int)off);
406 switch (State.Cpu.opmode)
407 {
408 case CPUMODE_16BIT:
409 psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
410 i32Disp >= 0 ? " (%04VGv/+%x)" : " (%04VGv/-%x)",
411 GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
412 break;
413 case CPUMODE_32BIT:
414 psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
415 i32Disp >= 0 ? " (%08VGv/+%x)" : " (%08VGv/-%x)",
416 GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
417 break;
418 default:
419 psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
420 i32Disp >= 0 ? " (%VGv/+%x)" : " (%VGv/-%x)",
421 GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
422 break;
423 }
424 }
425 else
426#endif /* DEBUG_bird */
427 {
428 switch (State.Cpu.opmode)
429 {
430 case CPUMODE_16BIT:
431 psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
432 i32Disp >= 0 ? "%04VGv (+%x)" : "%04VGv (-%x)",
433 GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
434 break;
435 case CPUMODE_32BIT:
436 psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
437 i32Disp >= 0 ? "%08VGv (+%x)" : "%08VGv (-%x)",
438 GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
439 break;
440 default:
441 psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
442 i32Disp >= 0 ? "%VGv (+%x)" : "%VGv (-%x)",
443 GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
444 break;
445 }
446 }
447 break;
448 }
449
450 case 'A': //direct address
451 case 'C': //control register
452 case 'D': //debug register
453 case 'E': //ModRM specifies parameter
454 case 'F': //Eflags register
455 case 'G': //ModRM selects general register
456 case 'I': //Immediate data
457 case 'M': //ModRM may only refer to memory
458 case 'O': //No ModRM byte
459 case 'P': //ModRM byte selects MMX register
460 case 'Q': //ModRM byte selects MMX register or memory address
461 case 'R': //ModRM byte may only refer to a general register
462 case 'S': //ModRM byte selects a segment register
463 case 'T': //ModRM byte selects a test register
464 case 'V': //ModRM byte selects an XMM/SSE register
465 case 'W': //ModRM byte selects an XMM/SSE register or a memory address
466 case 'X': //DS:SI
467 case 'Y': //ES:DI
468 switch (iParam)
469 {
470 case 1: psz = mystrpcpy(psz, State.Cpu.param1.szParam); break;
471 case 2: psz = mystrpcpy(psz, State.Cpu.param2.szParam); break;
472 case 3: psz = mystrpcpy(psz, State.Cpu.param3.szParam); break;
473 }
474 pszFormat += 2;
475 break;
476
477 case 'e': //register based on operand size (e.g. %eAX)
478 if (State.Cpu.opmode == CPUMODE_32BIT)
479 *psz++ = 'E';
480 *psz++ = pszFormat[2];
481 *psz++ = pszFormat[3];
482 pszFormat += 4;
483 break;
484
485 default:
486 AssertMsgFailed(("Oops! ch=%c\n", ch));
487 break;
488 }
489
490 /* Skip to the next parameter in the format string. */
491 pszFormat = strchr(pszFormat, ',');
492 if (!pszFormat)
493 break;
494 pszFormat++;
495 *psz++ = ch = ',';
496 iParam++;
497 }
498 else
499 {
500 /* output char, but check for parameter separator first. */
501 if (ch == ',')
502 iParam++;
503 *psz++ = ch;
504 if (!ch)
505 break;
506 pszFormat++;
507 }
508
509#ifdef DEBUG_bird /* Not sure if Sander want's this because of log size */
510 /* space after commas */
511 if (ch == ',')
512 {
513 while (isspace(*pszFormat))
514 pszFormat++;
515 *psz++ = ' ';
516 }
517#endif
518 } /* foreach char in pszFormat */
519 *psz = '\0';
520
521 /*
522 * Print it to the user specified buffer.
523 */
524 if (fFlags & DBGF_DISAS_FLAGS_NO_BYTES)
525 {
526 if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
527 RTStrPrintf(pszOutput, cchOutput, "%s", szBuf);
528 else if (fRealModeAddress)
529 RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %s", Sel, (unsigned)GCPtr, szBuf);
530 else if (Sel == DBGF_SEL_FLAT)
531 RTStrPrintf(pszOutput, cchOutput, "%VGv %s", GCPtr, szBuf);
532 else
533 RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv %s", Sel, GCPtr, szBuf);
534 }
535 else
536 {
537 size_t cbBits = State.Cpu.opsize;
538 uint8_t *pau8Bits = (uint8_t *)alloca(cbBits);
539 rc = dbgfR3DisasInstrRead(GCPtr, pau8Bits, cbBits, &State);
540 AssertRC(rc);
541 if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
542 RTStrPrintf(pszOutput, cchOutput, "%.*Vhxs%*s %s",
543 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
544 szBuf);
545 else if (fRealModeAddress)
546 RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %.*Vhxs%*s %s",
547 Sel, (unsigned)GCPtr,
548 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
549 szBuf);
550 else if (Sel == DBGF_SEL_FLAT)
551 RTStrPrintf(pszOutput, cchOutput, "%VGv %.*Vhxs%*s %s",
552 GCPtr,
553 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
554 szBuf);
555 else
556 RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv %.*Vhxs%*s %s",
557 Sel, GCPtr,
558 cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
559 szBuf);
560
561 }
562
563 if (pcbInstr)
564 *pcbInstr = State.Cpu.opsize;
565 return VINF_SUCCESS;
566}
567
568
569/**
570 * Disassembles an instruction.
571 * Addresses will be tried resolved to symbols
572 *
573 * @returns VBox status code.
574 * @param pVM VM handle.
575 * @param Sel The code selector. This used to determin the 32/16 bit ness and
576 * calculation of the actual instruction address.
577 * @param GCPtr The code address relative to the base of Sel.
578 * @param pszOutput Output buffer.
579 * @param cchOutput Size of the output buffer.
580 */
581DBGFR3DECL(int) DBGFR3DisasInstr(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cchOutput)
582{
583 return DBGFR3DisasInstrEx(pVM, Sel, GCPtr, 0, pszOutput, cchOutput, NULL);
584}
585
586
587/**
588 * Disassembles the current guest context instruction.
589 * All registers and data will be displayed. Addresses will be attempted resolved to symbols.
590 *
591 * @returns VBox status code.
592 * @param pVM VM handle.
593 * @param pszOutput Output buffer.
594 * @param cchOutput Size of the output buffer.
595 */
596DBGFR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cchOutput)
597{
598 return DBGFR3DisasInstrEx(pVM, 0, 0, DBGF_DISAS_FLAGS_CURRENT_GUEST, pszOutput, cchOutput, NULL);
599}
600
601
602/**
603 * Disassembles the current guest context instruction and writes it to the log.
604 * All registers and data will be displayed. Addresses will be attempted resolved to symbols.
605 *
606 * @returns VBox status code.
607 * @param pVM VM handle.
608 * @param pszPrefix Short prefix string to the dissassembly string. (optional)
609 */
610DBGFR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVM pVM, const char *pszPrefix)
611{
612 char szBuf[256];
613 szBuf[0] = '\0';
614 int rc = DBGFR3DisasInstrCurrent(pVM, &szBuf[0], sizeof(szBuf));
615 if (VBOX_FAILURE(rc))
616 RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrCurrentLog failed with rc=%Vrc\n", rc);
617 if (pszPrefix && *pszPrefix)
618 RTLogPrintf("%s: %s\n", pszPrefix, szBuf);
619 else
620 RTLogPrintf("%s\n", szBuf);
621 return rc;
622}
623
624
625
626/**
627 * Disassembles the specified guest context instruction and writes it to the log.
628 * Addresses will be attempted resolved to symbols.
629 *
630 * @returns VBox status code.
631 * @param pVM VM handle.
632 * @param Sel The code selector. This used to determin the 32/16 bit-ness and
633 * calculation of the actual instruction address.
634 * @param GCPtr The code address relative to the base of Sel.
635 */
636DBGFR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr)
637{
638 char szBuf[256];
639 szBuf[0] = '\0';
640 int rc = DBGFR3DisasInstr(pVM, Sel, GCPtr, &szBuf[0], sizeof(szBuf));
641 if (VBOX_FAILURE(rc))
642 RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Vrc\n", Sel, GCPtr, rc);
643 RTLogPrintf("%s\n", szBuf);
644 return rc;
645}
646
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