DBGFDisas.cpp@ 9273

Last change on this file since 9273 was 9273, checked in by vboxsync, 17 years ago
Use the new DISFormat* stuff so we can get useful disassembly in non-logging builds too.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 27.6 KB

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1	/* $Id: DBGFDisas.cpp 9273 2008-05-31 18:46:03Z vboxsync $ */
2	/** @file
3	* VMM DBGF - Debugger Facility, Disassembler.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	#define USE_DIS_FORMAT
23
24	/*******************************************************************************
25	* Header Files *
26	*******************************************************************************/
27	#define LOG_GROUP LOG_GROUP_DBGF
28	#include <VBox/dbgf.h>
29	#include <VBox/selm.h>
30	#include <VBox/mm.h>
31	#include <VBox/pgm.h>
32	#include <VBox/cpum.h>
33	#include "DBGFInternal.h"
34	#include <VBox/dis.h>
35	#include <VBox/err.h>
36	#include <VBox/param.h>
37
38	#include <VBox/log.h>
39	#include <iprt/assert.h>
40	#include <iprt/string.h>
41	#include <iprt/alloca.h>
42	#include <iprt/ctype.h>
43
44
45	/*******************************************************************************
46	* Internal Functions *
47	*******************************************************************************/
48	static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTUINTPTR pSrc, uint8_t pDest, uint32_t size, void pvUserdata);
49
50
51	/**
52	* Structure used when disassembling and instructions in DBGF.
53	* This is used so the reader function can get the stuff it needs.
54	*/
55	typedef struct
56	{
57	/** The core structure. */
58	DISCPUSTATE Cpu;
59	/** The VM handle. */
60	PVM pVM;
61	/** Pointer to the first byte in the segemnt. */
62	RTGCUINTPTR GCPtrSegBase;
63	/** Pointer to the byte after the end of the segment. (might have wrapped!) */
64	RTGCUINTPTR GCPtrSegEnd;
65	/** The size of the segment minus 1. */
66	RTGCUINTPTR cbSegLimit;
67	/** The guest paging mode. */
68	PGMMODE enmMode;
69	/** Pointer to the current page - HC Ptr. */
70	void const *pvPageHC;
71	/** Pointer to the current page - GC Ptr. */
72	RTGCPTR pvPageGC;
73	/** Pointer to the next instruction (relative to GCPtrSegBase). */
74	RTGCUINTPTR GCPtrNext;
75	/** The lock information that PGMPhysReleasePageMappingLock needs. */
76	PGMPAGEMAPLOCK PageMapLock;
77	/** Whether the PageMapLock is valid or not. */
78	bool fLocked;
79	} DBGFDISASSTATE, *PDBGFDISASSTATE;
80
81
82
83	/**
84	* Calls the dissassembler with the proper reader functions and such for disa
85	*
86	* @returns VBox status code.
87	* @param pVM VM handle
88	* @param pSelInfo The selector info.
89	* @param enmMode The guest paging mode.
90	* @param GCPtr The GC pointer (selector offset).
91	* @param pState The disas CPU state.
92	*/
93	static int dbgfR3DisasInstrFirst(PVM pVM, PSELMSELINFO pSelInfo, PGMMODE enmMode, RTGCPTR GCPtr, PDBGFDISASSTATE pState)
94	{
95	pState->GCPtrSegBase = pSelInfo->GCPtrBase;
96	pState->GCPtrSegEnd = pSelInfo->cbLimit + 1 + (RTGCUINTPTR)pSelInfo->GCPtrBase;
97	pState->cbSegLimit = pSelInfo->cbLimit;
98	pState->enmMode = enmMode;
99	pState->pvPageGC = 0;
100	pState->pvPageHC = NULL;
101	pState->pVM = pVM;
102	pState->fLocked = false;
103	Assert((uintptr_t)GCPtr == GCPtr);
104	uint32_t cbInstr;
105	#ifdef USE_DIS_FORMAT
106	int rc = DISCoreOneEx(GCPtr,
107	pSelInfo->Raw.Gen.u1DefBig
108	? enmMode >= PGMMODE_AMD64 && pSelInfo->Raw.Gen.u1Reserved
109	? CPUMODE_64BIT
110	: CPUMODE_32BIT
111	: CPUMODE_16BIT,
112	dbgfR3DisasInstrRead,
113	&pState->Cpu,
114	&pState->Cpu,
115	&cbInstr);
116	#else
117	pState->Cpu.mode = pSelInfo->Raw.Gen.u1DefBig ? CPUMODE_32BIT : CPUMODE_16BIT;
118	pState->Cpu.pfnReadBytes = dbgfR3DisasInstrRead;
119	int rc = DISInstr(&pState->Cpu, GCPtr, 0, &cbInstr, NULL);
120	#endif
121	if (VBOX_SUCCESS(rc))
122	{
123	pState->GCPtrNext = GCPtr + cbInstr;
124	return VINF_SUCCESS;
125	}
126
127	/* cleanup */
128	if (pState->fLocked)
129	{
130	PGMPhysReleasePageMappingLock(pVM, &pState->PageMapLock);
131	pState->fLocked = false;
132	}
133	return rc;
134	}
135
136
137	#if 0
138	/**
139	* Calls the dissassembler for disassembling the next instruction.
140	*
141	* @returns VBox status code.
142	* @param pState The disas CPU state.
143	*/
144	static int dbgfR3DisasInstrNext(PDBGFDISASSTATE pState)
145	{
146	uint32_t cbInstr;
147	int rc = DISInstr(&pState->Cpu, (void *)pState->GCPtrNext, 0, &cbInstr, NULL);
148	if (VBOX_SUCCESS(rc))
149	{
150	pState->GCPtrNext = GCPtr + cbInstr;
151	return VINF_SUCCESS;
152	}
153	return rc;
154	}
155	#endif
156
157
158	/**
159	* Done with the dissassembler state, free associated resources.
160	*
161	* @param pState The disas CPU state ++.
162	*/
163	static void dbgfR3DisasInstrDone(PDBGFDISASSTATE pState)
164	{
165	if (pState->fLocked)
166	{
167	PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
168	pState->fLocked = false;
169	}
170	}
171
172
173	/**
174	* Instruction reader.
175	*
176	* @returns VBox status code. (Why this is a int32_t and not just an int is also beyond me.)
177	* @param PtrSrc Address to read from.
178	* In our case this is relative to the selector pointed to by the 2nd user argument of uDisCpu.
179	* @param pu8Dst Where to store the bytes.
180	* @param cbRead Number of bytes to read.
181	* @param uDisCpu Pointer to the disassembler cpu state. (Why this is a VBOXHUINTPTR is beyond me...)
182	* In this context it's always pointer to the Core of a DBGFDISASSTATE.
183	*/
184	static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTUINTPTR PtrSrc, uint8_t pu8Dst, uint32_t cbRead, void pvDisCpu)
185	{
186	PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pvDisCpu;
187	Assert(cbRead > 0);
188	for (;;)
189	{
190	RTGCUINTPTR GCPtr = PtrSrc + pState->GCPtrSegBase;
191
192	/* Need to update the page translation? */
193	if ( !pState->pvPageHC
194	\|\| (GCPtr >> PAGE_SHIFT) != (pState->pvPageGC >> PAGE_SHIFT))
195	{
196	int rc = VINF_SUCCESS;
197
198	/* translate the address */
199	pState->pvPageGC = GCPtr & PAGE_BASE_GC_MASK;
200	if (MMHyperIsInsideArea(pState->pVM, pState->pvPageGC))
201	{
202	pState->pvPageHC = MMHyperGC2HC(pState->pVM, pState->pvPageGC);
203	if (!pState->pvPageHC)
204	rc = VERR_INVALID_POINTER;
205	}
206	else
207	{
208	if (pState->fLocked)
209	PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
210
211	if (pState->enmMode <= PGMMODE_PROTECTED)
212	rc = PGMPhysGCPhys2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageHC, &pState->PageMapLock);
213	else
214	rc = PGMPhysGCPtr2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageHC, &pState->PageMapLock);
215	pState->fLocked = RT_SUCCESS_NP(rc);
216	}
217	if (VBOX_FAILURE(rc))
218	{
219	pState->pvPageHC = NULL;
220	return rc;
221	}
222	}
223
224	/* check the segemnt limit */
225	if (PtrSrc > pState->cbSegLimit)
226	return VERR_OUT_OF_SELECTOR_BOUNDS;
227
228	/* calc how much we can read */
229	uint32_t cb = PAGE_SIZE - (GCPtr & PAGE_OFFSET_MASK);
230	RTGCUINTPTR cbSeg = pState->GCPtrSegEnd - GCPtr;
231	if (cb > cbSeg && cbSeg)
232	cb = cbSeg;
233	if (cb > cbRead)
234	cb = cbRead;
235
236	/* read and advance */
237	memcpy(pu8Dst, (char *)pState->pvPageHC + (GCPtr & PAGE_OFFSET_MASK), cb);
238	cbRead -= cb;
239	if (!cbRead)
240	return VINF_SUCCESS;
241	pu8Dst += cb;
242	PtrSrc += cb;
243	}
244	}
245
246
247	#ifdef USE_DIS_FORMAT
248	/**
249	* @copydoc FNDISGETSYMBOL
250	*/
251	static DECLCALLBACK(int) dbgfR3DisasGetSymbol(PCDISCPUSTATE pCpu, uint32_t u32Sel, RTUINTPTR uAddress, char pszBuf, size_t cchBuf, RTINTPTR poff, void *pvUser)
252	{
253	PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pCpu;
254	PCSELMSELINFO pSelInfo = (PCSELMSELINFO)pvUser;
255	DBGFSYMBOL Sym;
256	RTGCINTPTR off;
257	int rc;
258
259	if (DIS_FMT_SEL_IS_REG(u32Sel))
260	{
261	if (DIS_FMT_SEL_GET_REG(u32Sel) == USE_REG_CS)
262	rc = DBGFR3SymbolByAddr(pState->pVM, uAddress + pSelInfo->GCPtrBase, &off, &Sym);
263	else
264	rc = VERR_SYMBOL_NOT_FOUND; /** @todo implement this */
265	}
266	else
267	{
268	if (pSelInfo->Sel == DIS_FMT_SEL_GET_VALUE(u32Sel))
269	rc = DBGFR3SymbolByAddr(pState->pVM, uAddress + pSelInfo->GCPtrBase, &off, &Sym);
270	else
271	rc = VERR_SYMBOL_NOT_FOUND; /** @todo implement this */
272	}
273
274	if (RT_SUCCESS(rc))
275	{
276	size_t cchName = strlen(Sym.szName);
277	if (cchName >= cchBuf)
278	cchName = cchBuf - 1;
279	memcpy(pszBuf, Sym.szName, cchName);
280	pszBuf[cchName] = '\0';
281
282	*poff = off;
283	}
284
285	return rc;
286	}
287	#else
288	/**
289	* Copy a string and return pointer to the terminator char in the copy.
290	*/
291	inline char mystrpcpy(char pszDst, const char *pszSrc)
292	{
293	size_t cch = strlen(pszSrc);
294	memcpy(pszDst, pszSrc, cch + 1);
295	return pszDst + cch;
296	}
297	#endif
298
299
300	/**
301	* Disassembles the one instruction according to the specified flags and address.
302	*
303	* @returns VBox status code.
304	* @param pVM VM handle.
305	* @param Sel The code selector. This used to determin the 32/16 bit ness and
306	* calculation of the actual instruction address.
307	* @param GCPtr The code address relative to the base of Sel.
308	* @param fFlags Flags controlling where to start and how to format.
309	* A combination of the DBGF_DISAS_FLAGS_* \#defines.
310	* @param pszOutput Output buffer.
311	* @param cchOutput Size of the output buffer.
312	* @param pcbInstr Where to return the size of the instruction.
313	*/
314	DBGFR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char pszOutput, uint32_t cchOutput, uint32_t pcbInstr)
315	{
316	/*
317	* Get the Sel and GCPtr if fFlags requests that.
318	*/
319	PCCPUMCTXCORE pCtxCore = NULL;
320	CPUMSELREGHID *pHiddenSel = NULL;
321	int rc;
322	if (fFlags & (DBGF_DISAS_FLAGS_CURRENT_GUEST \| DBGF_DISAS_FLAGS_CURRENT_HYPER))
323	{
324	if (fFlags & DBGF_DISAS_FLAGS_CURRENT_GUEST)
325	pCtxCore = CPUMGetGuestCtxCore(pVM);
326	else
327	pCtxCore = CPUMGetHyperCtxCore(pVM);
328	Sel = pCtxCore->cs;
329	pHiddenSel = (CPUMSELREGHID *)&pCtxCore->csHid;
330	GCPtr = pCtxCore->eip;
331	}
332
333	/*
334	* Read the selector info - assume no stale selectors and nasty stuff like that.
335	* Since the selector flags in the CPUMCTX structures aren't up to date unless
336	* we recently visited REM, we'll not search for the selector there.
337	*/
338	SELMSELINFO SelInfo;
339	const PGMMODE enmMode = PGMGetGuestMode(pVM);
340	bool fRealModeAddress = false;
341
342	if ( pHiddenSel
343	&& CPUMAreHiddenSelRegsValid(pVM))
344	{
345	SelInfo.GCPtrBase = pHiddenSel->u32Base;
346	SelInfo.cbLimit = pHiddenSel->u32Limit;
347	SelInfo.fHyper = false;
348	SelInfo.fRealMode = !!((pCtxCore && pCtxCore->eflags.Bits.u1VM) \|\| enmMode == PGMMODE_REAL);
349	SelInfo.Raw.au32[0] = 0;
350	SelInfo.Raw.au32[1] = 0;
351	SelInfo.Raw.Gen.u16LimitLow = ~0;
352	SelInfo.Raw.Gen.u4LimitHigh = ~0;
353	SelInfo.Raw.Gen.u1Present = pHiddenSel->Attr.n.u1Present;
354	SelInfo.Raw.Gen.u1Granularity = pHiddenSel->Attr.n.u1Granularity;;
355	SelInfo.Raw.Gen.u1DefBig = pHiddenSel->Attr.n.u1DefBig;
356	SelInfo.Raw.Gen.u1DescType = pHiddenSel->Attr.n.u1DescType;
357	SelInfo.Raw.Gen.u4Type = pHiddenSel->Attr.n.u4Type;
358	fRealModeAddress = SelInfo.fRealMode;
359	}
360	else if (Sel == DBGF_SEL_FLAT)
361	{
362	SelInfo.GCPtrBase = 0;
363	SelInfo.cbLimit = ~0;
364	SelInfo.fHyper = false;
365	SelInfo.fRealMode = false;
366	SelInfo.Raw.au32[0] = 0;
367	SelInfo.Raw.au32[1] = 0;
368	SelInfo.Raw.Gen.u16LimitLow = ~0;
369	SelInfo.Raw.Gen.u4LimitHigh = ~0;
370	SelInfo.Raw.Gen.u1Present = 1;
371	SelInfo.Raw.Gen.u1Granularity = 1;
372	SelInfo.Raw.Gen.u1DefBig = 1;
373	SelInfo.Raw.Gen.u1DescType = 1;
374	SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
375	}
376	else if ( !(fFlags & DBGF_DISAS_FLAGS_CURRENT_HYPER)
377	&& ( (pCtxCore && pCtxCore->eflags.Bits.u1VM)
378	\|\| enmMode == PGMMODE_REAL) )
379	{ /* V86 mode or real mode - real mode addressing */
380	SelInfo.GCPtrBase = Sel * 16;
381	SelInfo.cbLimit = ~0;
382	SelInfo.fHyper = false;
383	SelInfo.fRealMode = true;
384	SelInfo.Raw.au32[0] = 0;
385	SelInfo.Raw.au32[1] = 0;
386	SelInfo.Raw.Gen.u16LimitLow = ~0;
387	SelInfo.Raw.Gen.u4LimitHigh = ~0;
388	SelInfo.Raw.Gen.u1Present = 1;
389	SelInfo.Raw.Gen.u1Granularity = 1;
390	SelInfo.Raw.Gen.u1DefBig = 0; /* 16 bits */
391	SelInfo.Raw.Gen.u1DescType = 1;
392	SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
393	fRealModeAddress = true;
394	}
395	else
396	{
397	rc = SELMR3GetSelectorInfo(pVM, Sel, &SelInfo);
398	if (VBOX_FAILURE(rc))
399	{
400	RTStrPrintf(pszOutput, cchOutput, "Sel=%04x -> %Vrc\n", Sel, rc);
401	return rc;
402	}
403	}
404
405	/*
406	* Disassemble it.
407	*/
408	DBGFDISASSTATE State;
409	rc = dbgfR3DisasInstrFirst(pVM, &SelInfo, enmMode, GCPtr, &State);
410	if (VBOX_FAILURE(rc))
411	{
412	RTStrPrintf(pszOutput, cchOutput, "Disas -> %Vrc\n", rc);
413	return rc;
414	}
415
416	/*
417	* Format it.
418	*/
419	#ifdef USE_DIS_FORMAT
420	char szBuf[512];
421	DISFormatYasmEx(&State.Cpu, szBuf, sizeof(szBuf),
422	DIS_FMT_FLAGS_RELATIVE_BRANCH,
423	fFlags & DBGF_DISAS_FLAGS_NO_SYMBOLS ? NULL : dbgfR3DisasGetSymbol,
424	&SelInfo);
425	#else
426	char szBuf[512];
427	char *psz = &szBuf[0];
428
429	/* prefix */
430	if (State.Cpu.prefix & PREFIX_LOCK)
431	psz = (char *)memcpy(psz, "lock ", sizeof("lock ")) + sizeof("lock ") - 1;
432	if (State.Cpu.prefix & PREFIX_REP)
433	psz = (char *)memcpy(psz, "rep(e) ", sizeof("rep(e) ")) + sizeof("rep(e) ") - 1;
434	else if(State.Cpu.prefix & PREFIX_REPNE)
435	psz = (char *)memcpy(psz, "repne ", sizeof("repne ")) + sizeof("repne ") - 1;
436
437	/* the instruction */
438	const char *pszFormat = State.Cpu.pszOpcode;
439	char ch;
440	while ((ch = *pszFormat) && !isspace(ch) && ch != '%')
441	{
442	*psz++ = ch;
443	pszFormat++;
444	}
445	if (isspace(ch))
446	{
447	do *psz++ = ' ';
448	#ifdef DEBUG_bird /* Not sure if Sander want's this because of log size */
449	while (psz - szBuf < 8);
450	#else
451	while (0);
452	#endif
453	while (isspace(*pszFormat))
454	pszFormat++;
455	}
456
457	if (fFlags & DBGF_DISAS_FLAGS_NO_ANNOTATION)
458	pCtxCore = NULL;
459
460	/** @todo implement annotation and symbol lookup! */
461	int iParam = 1;
462	for (;;)
463	{
464	ch = *pszFormat;
465	if (ch == '%')
466	{
467	ch = pszFormat[1];
468	switch (ch)
469	{
470	/*
471	* Relative jump offset.
472	*/
473	case 'J':
474	{
475	AssertMsg(iParam == 1, ("Invalid branch parameter nr %d\n", iParam));
476	int32_t i32Disp;
477	if (State.Cpu.param1.flags & USE_IMMEDIATE8_REL)
478	i32Disp = (int32_t)(int8_t)State.Cpu.param1.parval;
479	else if (State.Cpu.param1.flags & USE_IMMEDIATE16_REL)
480	i32Disp = (int32_t)(int16_t)State.Cpu.param1.parval;
481	else if (State.Cpu.param1.flags & USE_IMMEDIATE32_REL)
482	i32Disp = (int32_t)State.Cpu.param1.parval;
483	else
484	{
485	AssertMsgFailed(("Oops!\n"));
486	dbgfR3DisasInstrDone(&State);
487	return VERR_GENERAL_FAILURE;
488	}
489	RTGCUINTPTR GCPtrTarget = (RTGCUINTPTR)GCPtr + State.Cpu.opsize + i32Disp;
490	switch (State.Cpu.opmode)
491	{
492	case CPUMODE_16BIT: GCPtrTarget &= UINT16_MAX; break;
493	case CPUMODE_32BIT: GCPtrTarget &= UINT32_MAX; break;
494	case CPUMODE_64BIT: GCPtrTarget &= UINT64_MAX; break;
495	default: break;
496	}
497	#ifdef DEBUG_bird /* an experiment. */
498	DBGFSYMBOL Sym;
499	RTGCINTPTR off;
500	int rc = DBGFR3SymbolByAddr(pVM, GCPtrTarget + SelInfo.GCPtrBase, &off, &Sym);
501	if ( VBOX_SUCCESS(rc)
502	&& Sym.Value - SelInfo.GCPtrBase <= SelInfo.cbLimit
503	&& off < _1M * 16 && off > -_1M * 16)
504	{
505	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz, "%s", Sym.szName);
506	if (off > 0)
507	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz, "+%#x", (int)off);
508	else if (off > 0)
509	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz, "-%#x", -(int)off);
510	switch (State.Cpu.opmode)
511	{
512	case CPUMODE_16BIT:
513	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
514	i32Disp >= 0 ? " (%04VGv/+%x)" : " (%04VGv/-%x)",
515	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
516	break;
517	case CPUMODE_32BIT:
518	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
519	i32Disp >= 0 ? " (%08VGv/+%x)" : " (%08VGv/-%x)",
520	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
521	break;
522	default:
523	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
524	i32Disp >= 0 ? " (%VGv/+%x)" : " (%VGv/-%x)",
525	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
526	break;
527	}
528	}
529	else
530	#endif /* DEBUG_bird */
531	{
532	switch (State.Cpu.opmode)
533	{
534	case CPUMODE_16BIT:
535	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
536	i32Disp >= 0 ? "%04VGv (+%x)" : "%04VGv (-%x)",
537	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
538	break;
539	case CPUMODE_32BIT:
540	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
541	i32Disp >= 0 ? "%08VGv (+%x)" : "%08VGv (-%x)",
542	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
543	break;
544	default:
545	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
546	i32Disp >= 0 ? "%VGv (+%x)" : "%VGv (-%x)",
547	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
548	break;
549	}
550	}
551	break;
552	}
553
554	case 'A': //direct address
555	case 'C': //control register
556	case 'D': //debug register
557	case 'E': //ModRM specifies parameter
558	case 'F': //Eflags register
559	case 'G': //ModRM selects general register
560	case 'I': //Immediate data
561	case 'M': //ModRM may only refer to memory
562	case 'O': //No ModRM byte
563	case 'P': //ModRM byte selects MMX register
564	case 'Q': //ModRM byte selects MMX register or memory address
565	case 'R': //ModRM byte may only refer to a general register
566	case 'S': //ModRM byte selects a segment register
567	case 'T': //ModRM byte selects a test register
568	case 'V': //ModRM byte selects an XMM/SSE register
569	case 'W': //ModRM byte selects an XMM/SSE register or a memory address
570	case 'X': //DS:SI
571	case 'Y': //ES:DI
572	switch (iParam)
573	{
574	case 1: psz = mystrpcpy(psz, State.Cpu.param1.szParam); break;
575	case 2: psz = mystrpcpy(psz, State.Cpu.param2.szParam); break;
576	case 3: psz = mystrpcpy(psz, State.Cpu.param3.szParam); break;
577	}
578	pszFormat += 2;
579	break;
580
581	case 'e': //register based on operand size (e.g. %eAX)
582	if (State.Cpu.opmode == CPUMODE_32BIT)
583	*psz++ = 'E';
584	*psz++ = pszFormat[2];
585	*psz++ = pszFormat[3];
586	pszFormat += 4;
587	break;
588
589	default:
590	AssertMsgFailed(("Oops! ch=%c\n", ch));
591	break;
592	}
593
594	/* Skip to the next parameter in the format string. */
595	pszFormat = strchr(pszFormat, ',');
596	if (!pszFormat)
597	break;
598	pszFormat++;
599	*psz++ = ch = ',';
600	iParam++;
601	}
602	else
603	{
604	/* output char, but check for parameter separator first. */
605	if (ch == ',')
606	iParam++;
607	*psz++ = ch;
608	if (!ch)
609	break;
610	pszFormat++;
611	}
612
613	#ifdef DEBUG_bird /* Not sure if Sander want's this because of log size */
614	/* space after commas */
615	if (ch == ',')
616	{
617	while (isspace(*pszFormat))
618	pszFormat++;
619	*psz++ = ' ';
620	}
621	#endif
622	} /* foreach char in pszFormat */
623	*psz = '\0';
624	#endif /* !USE_DIS_FORMAT */
625
626	/*
627	* Print it to the user specified buffer.
628	*/
629	if (fFlags & DBGF_DISAS_FLAGS_NO_BYTES)
630	{
631	if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
632	RTStrPrintf(pszOutput, cchOutput, "%s", szBuf);
633	else if (fRealModeAddress)
634	RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %s", Sel, (unsigned)GCPtr, szBuf);
635	else if (Sel == DBGF_SEL_FLAT)
636	RTStrPrintf(pszOutput, cchOutput, "%VGv %s", GCPtr, szBuf);
637	else
638	RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv %s", Sel, GCPtr, szBuf);
639	}
640	else
641	{
642	uint32_t cbBits = State.Cpu.opsize;
643	uint8_t pau8Bits = (uint8_t )alloca(cbBits);
644	rc = dbgfR3DisasInstrRead(GCPtr, pau8Bits, cbBits, &State);
645	AssertRC(rc);
646	if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
647	RTStrPrintf(pszOutput, cchOutput, "%.Vhxs%s %s",
648	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
649	szBuf);
650	else if (fRealModeAddress)
651	RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %.Vhxs%s %s",
652	Sel, (unsigned)GCPtr,
653	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
654	szBuf);
655	else if (Sel == DBGF_SEL_FLAT)
656	RTStrPrintf(pszOutput, cchOutput, "%VGv %.Vhxs%s %s",
657	GCPtr,
658	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
659	szBuf);
660	else
661	RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv %.Vhxs%s %s",
662	Sel, GCPtr,
663	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
664	szBuf);
665
666	}
667
668	if (pcbInstr)
669	*pcbInstr = State.Cpu.opsize;
670
671	dbgfR3DisasInstrDone(&State);
672	return VINF_SUCCESS;
673	}
674
675
676	/**
677	* Disassembles an instruction.
678	* Addresses will be tried resolved to symbols
679	*
680	* @returns VBox status code.
681	* @param pVM VM handle.
682	* @param Sel The code selector. This used to determin the 32/16 bit ness and
683	* calculation of the actual instruction address.
684	* @param GCPtr The code address relative to the base of Sel.
685	* @param pszOutput Output buffer.
686	* @param cchOutput Size of the output buffer.
687	*/
688	DBGFR3DECL(int) DBGFR3DisasInstr(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cchOutput)
689	{
690	return DBGFR3DisasInstrEx(pVM, Sel, GCPtr, 0, pszOutput, cchOutput, NULL);
691	}
692
693
694	/**
695	* Disassembles the current guest context instruction.
696	* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
697	*
698	* @returns VBox status code.
699	* @param pVM VM handle.
700	* @param pszOutput Output buffer.
701	* @param cchOutput Size of the output buffer.
702	*/
703	DBGFR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cchOutput)
704	{
705	return DBGFR3DisasInstrEx(pVM, 0, 0, DBGF_DISAS_FLAGS_CURRENT_GUEST, pszOutput, cchOutput, NULL);
706	}
707
708
709	/**
710	* Disassembles the current guest context instruction and writes it to the log.
711	* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
712	*
713	* @returns VBox status code.
714	* @param pVM VM handle.
715	* @param pszPrefix Short prefix string to the dissassembly string. (optional)
716	*/
717	DBGFR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVM pVM, const char *pszPrefix)
718	{
719	char szBuf[256];
720	szBuf[0] = '\0';
721	int rc = DBGFR3DisasInstrCurrent(pVM, &szBuf[0], sizeof(szBuf));
722	if (VBOX_FAILURE(rc))
723	RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrCurrentLog failed with rc=%Vrc\n", rc);
724	if (pszPrefix && *pszPrefix)
725	RTLogPrintf("%s: %s\n", pszPrefix, szBuf);
726	else
727	RTLogPrintf("%s\n", szBuf);
728	return rc;
729	}
730
731
732
733	/**
734	* Disassembles the specified guest context instruction and writes it to the log.
735	* Addresses will be attempted resolved to symbols.
736	*
737	* @returns VBox status code.
738	* @param pVM VM handle.
739	* @param Sel The code selector. This used to determin the 32/16 bit-ness and
740	* calculation of the actual instruction address.
741	* @param GCPtr The code address relative to the base of Sel.
742	*/
743	DBGFR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr)
744	{
745	char szBuf[256];
746	szBuf[0] = '\0';
747	int rc = DBGFR3DisasInstr(pVM, Sel, GCPtr, &szBuf[0], sizeof(szBuf));
748	if (VBOX_FAILURE(rc))
749	RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Vrc\n", Sel, GCPtr, rc);
750	RTLogPrintf("%s\n", szBuf);
751	return rc;
752	}
753

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source: vbox/trunk/src/VBox/VMM/DBGFDisas.cpp@ 9273

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