DBGFDisas.cpp@ 9701

Last change on this file since 9701 was 9700, checked in by vboxsync, 17 years ago
Fixed several problems for 64 bits code disassembly
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 19.6 KB

Line
1	/* $Id: DBGFDisas.cpp 9700 2008-06-16 08:49:47Z vboxsync $ */
2	/** @file
3	* VMM DBGF - Debugger Facility, Disassembler.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	/*******************************************************************************
23	* Header Files *
24	*******************************************************************************/
25	#define LOG_GROUP LOG_GROUP_DBGF
26	#include <VBox/dbgf.h>
27	#include <VBox/selm.h>
28	#include <VBox/mm.h>
29	#include <VBox/pgm.h>
30	#include <VBox/cpum.h>
31	#include "DBGFInternal.h"
32	#include <VBox/dis.h>
33	#include <VBox/err.h>
34	#include <VBox/param.h>
35
36	#include <VBox/log.h>
37	#include <iprt/assert.h>
38	#include <iprt/string.h>
39	#include <iprt/alloca.h>
40	#include <iprt/ctype.h>
41
42
43	/*******************************************************************************
44	* Internal Functions *
45	*******************************************************************************/
46	static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTUINTPTR pSrc, uint8_t pDest, uint32_t size, void pvUserdata);
47
48
49	/**
50	* Structure used when disassembling and instructions in DBGF.
51	* This is used so the reader function can get the stuff it needs.
52	*/
53	typedef struct
54	{
55	/** The core structure. */
56	DISCPUSTATE Cpu;
57	/** The VM handle. */
58	PVM pVM;
59	/** Pointer to the first byte in the segemnt. */
60	RTGCUINTPTR GCPtrSegBase;
61	/** Pointer to the byte after the end of the segment. (might have wrapped!) */
62	RTGCUINTPTR GCPtrSegEnd;
63	/** The size of the segment minus 1. */
64	RTGCUINTPTR cbSegLimit;
65	/** The guest paging mode. */
66	PGMMODE enmMode;
67	/** Pointer to the current page - HC Ptr. */
68	void const *pvPageHC;
69	/** Pointer to the current page - GC Ptr. */
70	RTGCPTR pvPageGC;
71	/** Pointer to the next instruction (relative to GCPtrSegBase). */
72	RTGCUINTPTR GCPtrNext;
73	/** The lock information that PGMPhysReleasePageMappingLock needs. */
74	PGMPAGEMAPLOCK PageMapLock;
75	/** Whether the PageMapLock is valid or not. */
76	bool fLocked;
77	} DBGFDISASSTATE, *PDBGFDISASSTATE;
78
79
80
81	/**
82	* Calls the dissassembler with the proper reader functions and such for disa
83	*
84	* @returns VBox status code.
85	* @param pVM VM handle
86	* @param pSelInfo The selector info.
87	* @param enmMode The guest paging mode.
88	* @param GCPtr The GC pointer (selector offset).
89	* @param pState The disas CPU state.
90	*/
91	static int dbgfR3DisasInstrFirst(PVM pVM, PSELMSELINFO pSelInfo, PGMMODE enmMode, RTGCPTR GCPtr, PDBGFDISASSTATE pState)
92	{
93	pState->GCPtrSegBase = pSelInfo->GCPtrBase;
94	pState->GCPtrSegEnd = pSelInfo->cbLimit + 1 + (RTGCUINTPTR)pSelInfo->GCPtrBase;
95	pState->cbSegLimit = pSelInfo->cbLimit;
96	pState->enmMode = enmMode;
97	pState->pvPageGC = 0;
98	pState->pvPageHC = NULL;
99	pState->pVM = pVM;
100	pState->fLocked = false;
101	Assert((uintptr_t)GCPtr == GCPtr);
102	uint32_t cbInstr;
103	int rc = DISCoreOneEx(GCPtr,
104	enmMode >= PGMMODE_AMD64 && pSelInfo->Raw.Gen.u1Long
105	? CPUMODE_64BIT
106	: pSelInfo->Raw.Gen.u1DefBig
107	? CPUMODE_32BIT
108	: CPUMODE_16BIT,
109	dbgfR3DisasInstrRead,
110	&pState->Cpu,
111	&pState->Cpu,
112	&cbInstr);
113	if (VBOX_SUCCESS(rc))
114	{
115	pState->GCPtrNext = GCPtr + cbInstr;
116	return VINF_SUCCESS;
117	}
118
119	/* cleanup */
120	if (pState->fLocked)
121	{
122	PGMPhysReleasePageMappingLock(pVM, &pState->PageMapLock);
123	pState->fLocked = false;
124	}
125	return rc;
126	}
127
128
129	#if 0
130	/**
131	* Calls the dissassembler for disassembling the next instruction.
132	*
133	* @returns VBox status code.
134	* @param pState The disas CPU state.
135	*/
136	static int dbgfR3DisasInstrNext(PDBGFDISASSTATE pState)
137	{
138	uint32_t cbInstr;
139	int rc = DISInstr(&pState->Cpu, (void *)pState->GCPtrNext, 0, &cbInstr, NULL);
140	if (VBOX_SUCCESS(rc))
141	{
142	pState->GCPtrNext = GCPtr + cbInstr;
143	return VINF_SUCCESS;
144	}
145	return rc;
146	}
147	#endif
148
149
150	/**
151	* Done with the dissassembler state, free associated resources.
152	*
153	* @param pState The disas CPU state ++.
154	*/
155	static void dbgfR3DisasInstrDone(PDBGFDISASSTATE pState)
156	{
157	if (pState->fLocked)
158	{
159	PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
160	pState->fLocked = false;
161	}
162	}
163
164
165	/**
166	* Instruction reader.
167	*
168	* @returns VBox status code. (Why this is a int32_t and not just an int is also beyond me.)
169	* @param PtrSrc Address to read from.
170	* In our case this is relative to the selector pointed to by the 2nd user argument of uDisCpu.
171	* @param pu8Dst Where to store the bytes.
172	* @param cbRead Number of bytes to read.
173	* @param uDisCpu Pointer to the disassembler cpu state. (Why this is a VBOXHUINTPTR is beyond me...)
174	* In this context it's always pointer to the Core of a DBGFDISASSTATE.
175	*/
176	static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTUINTPTR PtrSrc, uint8_t pu8Dst, uint32_t cbRead, void pvDisCpu)
177	{
178	PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pvDisCpu;
179	Assert(cbRead > 0);
180	for (;;)
181	{
182	RTGCUINTPTR GCPtr = PtrSrc + pState->GCPtrSegBase;
183
184	/* Need to update the page translation? */
185	if ( !pState->pvPageHC
186	\|\| (GCPtr >> PAGE_SHIFT) != (pState->pvPageGC >> PAGE_SHIFT))
187	{
188	int rc = VINF_SUCCESS;
189
190	/* translate the address */
191	pState->pvPageGC = GCPtr & PAGE_BASE_GC_MASK;
192	if (MMHyperIsInsideArea(pState->pVM, pState->pvPageGC))
193	{
194	pState->pvPageHC = MMHyperGC2HC(pState->pVM, pState->pvPageGC);
195	if (!pState->pvPageHC)
196	rc = VERR_INVALID_POINTER;
197	}
198	else
199	{
200	if (pState->fLocked)
201	PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
202
203	if (pState->enmMode <= PGMMODE_PROTECTED)
204	rc = PGMPhysGCPhys2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageHC, &pState->PageMapLock);
205	else
206	rc = PGMPhysGCPtr2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageHC, &pState->PageMapLock);
207	pState->fLocked = RT_SUCCESS_NP(rc);
208	}
209	if (VBOX_FAILURE(rc))
210	{
211	pState->pvPageHC = NULL;
212	return rc;
213	}
214	}
215
216	/* check the segemnt limit */
217	if (PtrSrc > pState->cbSegLimit)
218	return VERR_OUT_OF_SELECTOR_BOUNDS;
219
220	/* calc how much we can read */
221	uint32_t cb = PAGE_SIZE - (GCPtr & PAGE_OFFSET_MASK);
222	RTGCUINTPTR cbSeg = pState->GCPtrSegEnd - GCPtr;
223	if (cb > cbSeg && cbSeg)
224	cb = cbSeg;
225	if (cb > cbRead)
226	cb = cbRead;
227
228	/* read and advance */
229	memcpy(pu8Dst, (char *)pState->pvPageHC + (GCPtr & PAGE_OFFSET_MASK), cb);
230	cbRead -= cb;
231	if (!cbRead)
232	return VINF_SUCCESS;
233	pu8Dst += cb;
234	PtrSrc += cb;
235	}
236	}
237
238
239	/**
240	* @copydoc FNDISGETSYMBOL
241	*/
242	static DECLCALLBACK(int) dbgfR3DisasGetSymbol(PCDISCPUSTATE pCpu, uint32_t u32Sel, RTUINTPTR uAddress, char pszBuf, size_t cchBuf, RTINTPTR poff, void *pvUser)
243	{
244	PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pCpu;
245	PCSELMSELINFO pSelInfo = (PCSELMSELINFO)pvUser;
246	DBGFSYMBOL Sym;
247	RTGCINTPTR off;
248	int rc;
249
250	if (DIS_FMT_SEL_IS_REG(u32Sel))
251	{
252	if (DIS_FMT_SEL_GET_REG(u32Sel) == DIS_SELREG_CS)
253	rc = DBGFR3SymbolByAddr(pState->pVM, uAddress + pSelInfo->GCPtrBase, &off, &Sym);
254	else
255	rc = VERR_SYMBOL_NOT_FOUND; /** @todo implement this */
256	}
257	else
258	{
259	if (pSelInfo->Sel == DIS_FMT_SEL_GET_VALUE(u32Sel))
260	rc = DBGFR3SymbolByAddr(pState->pVM, uAddress + pSelInfo->GCPtrBase, &off, &Sym);
261	else
262	rc = VERR_SYMBOL_NOT_FOUND; /** @todo implement this */
263	}
264
265	if (RT_SUCCESS(rc))
266	{
267	size_t cchName = strlen(Sym.szName);
268	if (cchName >= cchBuf)
269	cchName = cchBuf - 1;
270	memcpy(pszBuf, Sym.szName, cchName);
271	pszBuf[cchName] = '\0';
272
273	*poff = off;
274	}
275
276	return rc;
277	}
278
279
280	/**
281	* Disassembles the one instruction according to the specified flags and address.
282	*
283	* @returns VBox status code.
284	* @param pVM VM handle.
285	* @param Sel The code selector. This used to determin the 32/16 bit ness and
286	* calculation of the actual instruction address.
287	* @param GCPtr The code address relative to the base of Sel.
288	* @param fFlags Flags controlling where to start and how to format.
289	* A combination of the DBGF_DISAS_FLAGS_* \#defines.
290	* @param pszOutput Output buffer.
291	* @param cchOutput Size of the output buffer.
292	* @param pcbInstr Where to return the size of the instruction.
293	*/
294	DBGFR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char pszOutput, uint32_t cchOutput, uint32_t pcbInstr)
295	{
296	/*
297	* Get the Sel and GCPtr if fFlags requests that.
298	*/
299	PCCPUMCTXCORE pCtxCore = NULL;
300	CPUMSELREGHID *pHiddenSel = NULL;
301	int rc;
302	if (fFlags & (DBGF_DISAS_FLAGS_CURRENT_GUEST \| DBGF_DISAS_FLAGS_CURRENT_HYPER))
303	{
304	if (fFlags & DBGF_DISAS_FLAGS_CURRENT_GUEST)
305	pCtxCore = CPUMGetGuestCtxCore(pVM);
306	else
307	pCtxCore = CPUMGetHyperCtxCore(pVM);
308	Sel = pCtxCore->cs;
309	pHiddenSel = (CPUMSELREGHID *)&pCtxCore->csHid;
310	GCPtr = pCtxCore->rip;
311	}
312
313	/*
314	* Read the selector info - assume no stale selectors and nasty stuff like that.
315	* Since the selector flags in the CPUMCTX structures aren't up to date unless
316	* we recently visited REM, we'll not search for the selector there.
317	*/
318	SELMSELINFO SelInfo;
319	const PGMMODE enmMode = PGMGetGuestMode(pVM);
320	bool fRealModeAddress = false;
321
322	if ( pHiddenSel
323	&& CPUMAreHiddenSelRegsValid(pVM))
324	{
325	SelInfo.GCPtrBase = pHiddenSel->u64Base;
326	SelInfo.cbLimit = pHiddenSel->u32Limit;
327	SelInfo.fHyper = false;
328	SelInfo.fRealMode = !!((pCtxCore && pCtxCore->eflags.Bits.u1VM) \|\| enmMode == PGMMODE_REAL);
329	SelInfo.Raw.au32[0] = 0;
330	SelInfo.Raw.au32[1] = 0;
331	SelInfo.Raw.Gen.u16LimitLow = ~0;
332	SelInfo.Raw.Gen.u4LimitHigh = ~0;
333	SelInfo.Raw.Gen.u1Present = pHiddenSel->Attr.n.u1Present;
334	SelInfo.Raw.Gen.u1Granularity = pHiddenSel->Attr.n.u1Granularity;;
335	SelInfo.Raw.Gen.u1DefBig = pHiddenSel->Attr.n.u1DefBig;
336	SelInfo.Raw.Gen.u1Long = pHiddenSel->Attr.n.u1Long;
337	SelInfo.Raw.Gen.u1DescType = pHiddenSel->Attr.n.u1DescType;
338	SelInfo.Raw.Gen.u4Type = pHiddenSel->Attr.n.u4Type;
339	fRealModeAddress = SelInfo.fRealMode;
340	}
341	else if (Sel == DBGF_SEL_FLAT)
342	{
343	SelInfo.GCPtrBase = 0;
344	SelInfo.cbLimit = ~0;
345	SelInfo.fHyper = false;
346	SelInfo.fRealMode = false;
347	SelInfo.Raw.au32[0] = 0;
348	SelInfo.Raw.au32[1] = 0;
349	SelInfo.Raw.Gen.u16LimitLow = ~0;
350	SelInfo.Raw.Gen.u4LimitHigh = ~0;
351	SelInfo.Raw.Gen.u1Present = 1;
352	SelInfo.Raw.Gen.u1Granularity = 1;
353	SelInfo.Raw.Gen.u1DefBig = 1;
354	SelInfo.Raw.Gen.u1DescType = 1;
355	SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
356	}
357	else if ( !(fFlags & DBGF_DISAS_FLAGS_CURRENT_HYPER)
358	&& ( (pCtxCore && pCtxCore->eflags.Bits.u1VM)
359	\|\| enmMode == PGMMODE_REAL) )
360	{ /* V86 mode or real mode - real mode addressing */
361	SelInfo.GCPtrBase = Sel * 16;
362	SelInfo.cbLimit = ~0;
363	SelInfo.fHyper = false;
364	SelInfo.fRealMode = true;
365	SelInfo.Raw.au32[0] = 0;
366	SelInfo.Raw.au32[1] = 0;
367	SelInfo.Raw.Gen.u16LimitLow = ~0;
368	SelInfo.Raw.Gen.u4LimitHigh = ~0;
369	SelInfo.Raw.Gen.u1Present = 1;
370	SelInfo.Raw.Gen.u1Granularity = 1;
371	SelInfo.Raw.Gen.u1DefBig = 0; /* 16 bits */
372	SelInfo.Raw.Gen.u1DescType = 1;
373	SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
374	fRealModeAddress = true;
375	}
376	else
377	{
378	rc = SELMR3GetSelectorInfo(pVM, Sel, &SelInfo);
379	if (VBOX_FAILURE(rc))
380	{
381	RTStrPrintf(pszOutput, cchOutput, "Sel=%04x -> %Vrc\n", Sel, rc);
382	return rc;
383	}
384	}
385
386	/*
387	* Disassemble it.
388	*/
389	DBGFDISASSTATE State;
390	rc = dbgfR3DisasInstrFirst(pVM, &SelInfo, enmMode, GCPtr, &State);
391	if (VBOX_FAILURE(rc))
392	{
393	RTStrPrintf(pszOutput, cchOutput, "Disas -> %Vrc\n", rc);
394	return rc;
395	}
396
397	/*
398	* Format it.
399	*/
400	char szBuf[512];
401	DISFormatYasmEx(&State.Cpu, szBuf, sizeof(szBuf),
402	DIS_FMT_FLAGS_RELATIVE_BRANCH,
403	fFlags & DBGF_DISAS_FLAGS_NO_SYMBOLS ? NULL : dbgfR3DisasGetSymbol,
404	&SelInfo);
405
406	/*
407	* Print it to the user specified buffer.
408	*/
409	if (fFlags & DBGF_DISAS_FLAGS_NO_BYTES)
410	{
411	if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
412	RTStrPrintf(pszOutput, cchOutput, "%s", szBuf);
413	else if (fRealModeAddress)
414	RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %s", Sel, (unsigned)GCPtr, szBuf);
415	else if (Sel == DBGF_SEL_FLAT)
416	{
417	if (enmMode >= PGMMODE_AMD64)
418	RTStrPrintf(pszOutput, cchOutput, "%VGv %s", GCPtr, szBuf);
419	else
420	RTStrPrintf(pszOutput, cchOutput, "%VRv %s", (RTRCPTR)GCPtr, szBuf);
421	}
422	else
423	{
424	if (enmMode >= PGMMODE_AMD64)
425	RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv %s", Sel, GCPtr, szBuf);
426	else
427	RTStrPrintf(pszOutput, cchOutput, "%04x:%VRv %s", Sel, (RTRCPTR)GCPtr, szBuf);
428	}
429	}
430	else
431	{
432	uint32_t cbBits = State.Cpu.opsize;
433	uint8_t pau8Bits = (uint8_t )alloca(cbBits);
434	rc = dbgfR3DisasInstrRead(GCPtr, pau8Bits, cbBits, &State);
435	AssertRC(rc);
436	if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
437	RTStrPrintf(pszOutput, cchOutput, "%.Vhxs%s %s",
438	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
439	szBuf);
440	else if (fRealModeAddress)
441	RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %.Vhxs%s %s",
442	Sel, (unsigned)GCPtr,
443	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
444	szBuf);
445	else if (Sel == DBGF_SEL_FLAT)
446	{
447	if (enmMode >= PGMMODE_AMD64)
448	RTStrPrintf(pszOutput, cchOutput, "%VGv %.Vhxs%s %s",
449	GCPtr,
450	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
451	szBuf);
452	else
453	RTStrPrintf(pszOutput, cchOutput, "%VRv %.Vhxs%s %s",
454	(RTRCPTR)GCPtr,
455	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
456	szBuf);
457	}
458	else
459	{
460	if (enmMode >= PGMMODE_AMD64)
461	RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv %.Vhxs%s %s",
462	Sel, GCPtr,
463	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
464	szBuf);
465	else
466	RTStrPrintf(pszOutput, cchOutput, "%04x:%VRv %.Vhxs%s %s",
467	Sel, (RTRCPTR)GCPtr,
468	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
469	szBuf);
470	}
471	}
472
473	if (pcbInstr)
474	*pcbInstr = State.Cpu.opsize;
475
476	dbgfR3DisasInstrDone(&State);
477	return VINF_SUCCESS;
478	}
479
480
481	/**
482	* Disassembles an instruction.
483	* Addresses will be tried resolved to symbols
484	*
485	* @returns VBox status code.
486	* @param pVM VM handle.
487	* @param Sel The code selector. This used to determin the 32/16 bit ness and
488	* calculation of the actual instruction address.
489	* @param GCPtr The code address relative to the base of Sel.
490	* @param pszOutput Output buffer.
491	* @param cchOutput Size of the output buffer.
492	*/
493	DBGFR3DECL(int) DBGFR3DisasInstr(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cchOutput)
494	{
495	return DBGFR3DisasInstrEx(pVM, Sel, GCPtr, 0, pszOutput, cchOutput, NULL);
496	}
497
498
499	/**
500	* Disassembles the current guest context instruction.
501	* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
502	*
503	* @returns VBox status code.
504	* @param pVM VM handle.
505	* @param pszOutput Output buffer.
506	* @param cchOutput Size of the output buffer.
507	*/
508	DBGFR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cchOutput)
509	{
510	return DBGFR3DisasInstrEx(pVM, 0, 0, DBGF_DISAS_FLAGS_CURRENT_GUEST, pszOutput, cchOutput, NULL);
511	}
512
513
514	/**
515	* Disassembles the current guest context instruction and writes it to the log.
516	* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
517	*
518	* @returns VBox status code.
519	* @param pVM VM handle.
520	* @param pszPrefix Short prefix string to the dissassembly string. (optional)
521	*/
522	DBGFR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVM pVM, const char *pszPrefix)
523	{
524	char szBuf[256];
525	szBuf[0] = '\0';
526	int rc = DBGFR3DisasInstrCurrent(pVM, &szBuf[0], sizeof(szBuf));
527	if (VBOX_FAILURE(rc))
528	RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrCurrentLog failed with rc=%Vrc\n", rc);
529	if (pszPrefix && *pszPrefix)
530	RTLogPrintf("%s: %s\n", pszPrefix, szBuf);
531	else
532	RTLogPrintf("%s\n", szBuf);
533	return rc;
534	}
535
536
537
538	/**
539	* Disassembles the specified guest context instruction and writes it to the log.
540	* Addresses will be attempted resolved to symbols.
541	*
542	* @returns VBox status code.
543	* @param pVM VM handle.
544	* @param Sel The code selector. This used to determin the 32/16 bit-ness and
545	* calculation of the actual instruction address.
546	* @param GCPtr The code address relative to the base of Sel.
547	*/
548	DBGFR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr)
549	{
550	char szBuf[256];
551	szBuf[0] = '\0';
552	int rc = DBGFR3DisasInstr(pVM, Sel, GCPtr, &szBuf[0], sizeof(szBuf));
553	if (VBOX_FAILURE(rc))
554	RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Vrc\n", Sel, GCPtr, rc);
555	RTLogPrintf("%s\n", szBuf);
556	return rc;
557	}
558

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source: vbox/trunk/src/VBox/VMM/DBGFDisas.cpp@ 9701

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