VirtualBox

source: vbox/trunk/src/VBox/VMM/EMHandleRCTmpl.h@ 21221

Last change on this file since 21221 was 21221, checked in by vboxsync, 15 years ago

EMHandleRCTmpl.h: Ran svn-ps.cmd on it.
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1/* $Id: EMHandleRCTmpl.h 21221 2009-07-05 14:21:16Z vboxsync $ */
2/** @file
3 * EM - emR3RawHandleRC template
4 */
5
6/*
7 * Copyright (C) 2006-2009 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21#ifndef __EMHandleRCTmpl_h__
22#define __EMHandleRCTmpl_h__
23
24/**
25 * Process a subset of the raw-mode return code.
26 *
27 * Since we have to share this with raw-mode single stepping, this inline
28 * function has been created to avoid code duplication.
29 *
30 * @returns VINF_SUCCESS if it's ok to continue raw mode.
31 * @returns VBox status code to return to the EM main loop.
32 *
33 * @param pVM The VM handle
34 * @param pVCpu The VMCPU handle
35 * @param rc The return code.
36 * @param pCtx The guest cpu context.
37 */
38#ifdef EMHANDLERC_WITH_PATM
39int emR3RawHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc)
40#elif defined(EMHANDLERC_WITH_HWACCM)
41int emR3HwaccmHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc)
42#endif
43{
44 switch (rc)
45 {
46 /*
47 * Common & simple ones.
48 */
49 case VINF_SUCCESS:
50 break;
51 case VINF_EM_RESCHEDULE_RAW:
52 case VINF_EM_RESCHEDULE_HWACC:
53 case VINF_EM_RAW_INTERRUPT:
54 case VINF_EM_RAW_TO_R3:
55 case VINF_EM_RAW_TIMER_PENDING:
56 case VINF_EM_PENDING_REQUEST:
57 rc = VINF_SUCCESS;
58 break;
59
60#ifdef EMHANDLERC_WITH_PATM
61 /*
62 * Privileged instruction.
63 */
64 case VINF_EM_RAW_EXCEPTION_PRIVILEGED:
65 case VINF_PATM_PATCH_TRAP_GP:
66 rc = emR3RawPrivileged(pVM, pVCpu);
67 break;
68
69 case VINF_EM_RAW_GUEST_TRAP:
70 /*
71 * Got a trap which needs dispatching.
72 */
73 if (PATMR3IsInsidePatchJump(pVM, pCtx->eip, NULL))
74 {
75 AssertReleaseMsgFailed(("FATAL ERROR: executing random instruction inside generated patch jump %08X\n", CPUMGetGuestEIP(pVCpu)));
76 rc = VERR_EM_RAW_PATCH_CONFLICT;
77 break;
78 }
79 rc = emR3RawGuestTrap(pVM, pVCpu);
80 break;
81
82 /*
83 * Trap in patch code.
84 */
85 case VINF_PATM_PATCH_TRAP_PF:
86 case VINF_PATM_PATCH_INT3:
87 rc = emR3PatchTrap(pVM, pVCpu, pCtx, rc);
88 break;
89
90 case VINF_PATM_DUPLICATE_FUNCTION:
91 Assert(PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtx->eip));
92 rc = PATMR3DuplicateFunctionRequest(pVM, pCtx);
93 AssertRC(rc);
94 rc = VINF_SUCCESS;
95 break;
96
97 case VINF_PATM_CHECK_PATCH_PAGE:
98 rc = PATMR3HandleMonitoredPage(pVM);
99 AssertRC(rc);
100 rc = VINF_SUCCESS;
101 break;
102
103 /*
104 * Patch manager.
105 */
106 case VERR_EM_RAW_PATCH_CONFLICT:
107 AssertReleaseMsgFailed(("%Rrc handling is not yet implemented\n", rc));
108 break;
109#endif /* EMHANDLERC_WITH_PATM */
110
111#ifdef VBOX_WITH_VMI
112 /*
113 * PARAV function.
114 */
115 case VINF_EM_RESCHEDULE_PARAV:
116 rc = PARAVCallFunction(pVM);
117 break;
118#endif
119
120#ifdef EMHANDLERC_WITH_PATM
121 /*
122 * Memory mapped I/O access - attempt to patch the instruction
123 */
124 case VINF_PATM_HC_MMIO_PATCH_READ:
125 rc = PATMR3InstallPatch(pVM, SELMToFlat(pVM, DIS_SELREG_CS, CPUMCTX2CORE(pCtx), pCtx->eip),
126 PATMFL_MMIO_ACCESS | ((SELMGetCpuModeFromSelector(pVM, pCtx->eflags, pCtx->cs, &pCtx->csHid) == CPUMODE_32BIT) ? PATMFL_CODE32 : 0));
127 if (RT_FAILURE(rc))
128 rc = emR3ExecuteInstruction(pVM, pVCpu, "MMIO");
129 break;
130
131 case VINF_PATM_HC_MMIO_PATCH_WRITE:
132 AssertFailed(); /* not yet implemented. */
133 rc = emR3ExecuteInstruction(pVM, pVCpu, "MMIO");
134 break;
135#endif /* EMHANDLERC_WITH_PATM */
136
137 /*
138 * Conflict or out of page tables.
139 *
140 * VM_FF_PGM_SYNC_CR3 is set by the hypervisor and all we need to
141 * do here is to execute the pending forced actions.
142 */
143 case VINF_PGM_SYNC_CR3:
144 AssertMsg(VMCPU_FF_ISPENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL),
145 ("VINF_PGM_SYNC_CR3 and no VMCPU_FF_PGM_SYNC_CR3*!\n"));
146 rc = VINF_SUCCESS;
147 break;
148
149 /*
150 * Paging mode change.
151 */
152 case VINF_PGM_CHANGE_MODE:
153 rc = PGMChangeMode(pVCpu, pCtx->cr0, pCtx->cr4, pCtx->msrEFER);
154 if (rc == VINF_SUCCESS)
155 rc = VINF_EM_RESCHEDULE;
156 AssertMsg(RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST), ("%Rrc\n", rc));
157 break;
158
159#ifdef EMHANDLERC_WITH_PATM
160 /*
161 * CSAM wants to perform a task in ring-3. It has set an FF action flag.
162 */
163 case VINF_CSAM_PENDING_ACTION:
164 rc = VINF_SUCCESS;
165 break;
166
167 /*
168 * Invoked Interrupt gate - must directly (!) go to the recompiler.
169 */
170 case VINF_EM_RAW_INTERRUPT_PENDING:
171 case VINF_EM_RAW_RING_SWITCH_INT:
172 Assert(TRPMHasTrap(pVCpu));
173 Assert(!PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtx->eip));
174
175 if (TRPMHasTrap(pVCpu))
176 {
177 /* If the guest gate is marked unpatched, then we will check again if we can patch it. */
178 uint8_t u8Interrupt = TRPMGetTrapNo(pVCpu);
179 if (TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) == TRPM_INVALID_HANDLER)
180 {
181 CSAMR3CheckGates(pVM, u8Interrupt, 1);
182 Log(("emR3RawHandleRC: recheck gate %x -> valid=%d\n", u8Interrupt, TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) != TRPM_INVALID_HANDLER));
183 /* Note: If it was successful, then we could go back to raw mode, but let's keep things simple for now. */
184 }
185 }
186 rc = VINF_EM_RESCHEDULE_REM;
187 break;
188
189 /*
190 * Other ring switch types.
191 */
192 case VINF_EM_RAW_RING_SWITCH:
193 rc = emR3RawRingSwitch(pVM, pVCpu);
194 break;
195#endif /* EMHANDLERC_WITH_PATM */
196
197 /*
198 * I/O Port access - emulate the instruction.
199 */
200 case VINF_IOM_HC_IOPORT_READ:
201 case VINF_IOM_HC_IOPORT_WRITE:
202 rc = emR3ExecuteIOInstruction(pVM, pVCpu);
203 break;
204
205 /*
206 * Memory mapped I/O access - emulate the instruction.
207 */
208 case VINF_IOM_HC_MMIO_READ:
209 case VINF_IOM_HC_MMIO_WRITE:
210 case VINF_IOM_HC_MMIO_READ_WRITE:
211 rc = emR3ExecuteInstruction(pVM, pVCpu, "MMIO");
212 break;
213
214#ifdef EMHANDLERC_WITH_HWACCM
215 /*
216 * (MM)IO intensive code block detected; fall back to the recompiler for better performance
217 */
218 case VINF_EM_RAW_EMULATE_IO_BLOCK:
219 rc = HWACCMR3EmulateIoBlock(pVM, pCtx);
220 break;
221#endif
222
223#ifdef EMHANDLERC_WITH_PATM
224 /*
225 * Execute instruction.
226 */
227 case VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT:
228 rc = emR3ExecuteInstruction(pVM, pVCpu, "LDT FAULT: ");
229 break;
230 case VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT:
231 rc = emR3ExecuteInstruction(pVM, pVCpu, "GDT FAULT: ");
232 break;
233 case VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT:
234 rc = emR3ExecuteInstruction(pVM, pVCpu, "IDT FAULT: ");
235 break;
236 case VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT:
237 rc = emR3ExecuteInstruction(pVM, pVCpu, "TSS FAULT: ");
238 break;
239 case VINF_EM_RAW_EMULATE_INSTR_PD_FAULT:
240 rc = emR3ExecuteInstruction(pVM, pVCpu, "PD FAULT: ");
241 break;
242 case VINF_EM_RAW_EMULATE_INSTR_HLT:
243 /** @todo skip instruction and go directly to the halt state. (see REM for implementation details) */
244 rc = emR3RawPrivileged(pVM, pVCpu);
245 break;
246#endif
247
248#ifdef EMHANDLERC_WITH_PATM
249 case VINF_PATM_PENDING_IRQ_AFTER_IRET:
250 rc = emR3ExecuteInstruction(pVM, pVCpu, "EMUL: ", VINF_PATM_PENDING_IRQ_AFTER_IRET);
251 break;
252
253 case VINF_PATCH_EMULATE_INSTR:
254#else
255 case VINF_EM_RAW_GUEST_TRAP:
256#endif
257 case VINF_EM_RAW_EMULATE_INSTR:
258 rc = emR3ExecuteInstruction(pVM, pVCpu, "EMUL: ");
259 break;
260
261#ifdef EMHANDLERC_WITH_PATM
262 /*
263 * Stale selector and iret traps => REM.
264 */
265 case VINF_EM_RAW_STALE_SELECTOR:
266 case VINF_EM_RAW_IRET_TRAP:
267 /* We will not go to the recompiler if EIP points to patch code. */
268 if (PATMIsPatchGCAddr(pVM, pCtx->eip))
269 {
270 pCtx->eip = PATMR3PatchToGCPtr(pVM, (RTGCPTR)pCtx->eip, 0);
271 }
272 LogFlow(("emR3RawHandleRC: %Rrc -> %Rrc\n", rc, VINF_EM_RESCHEDULE_REM));
273 rc = VINF_EM_RESCHEDULE_REM;
274 break;
275#endif
276
277 /*
278 * Up a level.
279 */
280 case VINF_EM_TERMINATE:
281 case VINF_EM_OFF:
282 case VINF_EM_RESET:
283 case VINF_EM_SUSPEND:
284 case VINF_EM_HALT:
285 case VINF_EM_RESUME:
286 case VINF_EM_NO_MEMORY:
287 case VINF_EM_RESCHEDULE:
288 case VINF_EM_RESCHEDULE_REM:
289 case VINF_EM_WAIT_SIPI:
290 break;
291
292 /*
293 * Up a level and invoke the debugger.
294 */
295 case VINF_EM_DBG_STEPPED:
296 case VINF_EM_DBG_BREAKPOINT:
297 case VINF_EM_DBG_STEP:
298 case VINF_EM_DBG_HYPER_BREAKPOINT:
299 case VINF_EM_DBG_HYPER_STEPPED:
300 case VINF_EM_DBG_HYPER_ASSERTION:
301 case VINF_EM_DBG_STOP:
302 break;
303
304 /*
305 * Up a level, dump and debug.
306 */
307 case VERR_TRPM_DONT_PANIC:
308 case VERR_TRPM_PANIC:
309 case VERR_VMM_RING0_ASSERTION:
310 case VERR_VMM_HYPER_CR3_MISMATCH:
311 case VERR_VMM_RING3_CALL_DISABLED:
312 break;
313
314#ifdef EMHANDLERC_WITH_HWACCM
315 /*
316 * Up a level, after HwAccM have done some release logging.
317 */
318 case VERR_VMX_INVALID_VMCS_FIELD:
319 case VERR_VMX_INVALID_VMCS_PTR:
320 case VERR_VMX_INVALID_VMXON_PTR:
321 case VERR_VMX_UNEXPECTED_INTERRUPTION_EXIT_CODE:
322 case VERR_VMX_UNEXPECTED_EXCEPTION:
323 case VERR_VMX_UNEXPECTED_EXIT_CODE:
324 case VERR_VMX_INVALID_GUEST_STATE:
325 case VERR_VMX_UNABLE_TO_START_VM:
326 case VERR_VMX_UNABLE_TO_RESUME_VM:
327 HWACCMR3CheckError(pVM, rc);
328 break;
329#endif
330
331 /*
332 * Anything which is not known to us means an internal error
333 * and the termination of the VM!
334 */
335 default:
336 AssertMsgFailed(("Unknown GC return code: %Rra\n", rc));
337 break;
338 }
339 return rc;
340}
341
342#endif
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