VirtualBox

source: vbox/trunk/src/VBox/VMM/EMInternal.h@ 27948

Last change on this file since 27948 was 27570, checked in by vboxsync, 15 years ago

EMInternal.h: build fix.
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1/* $Id: EMInternal.h 27570 2010-03-22 08:32:11Z vboxsync $ */
2/** @file
3 * EM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___EMInternal_h
23#define ___EMInternal_h
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/em.h>
28#include <VBox/stam.h>
29#include <VBox/patm.h>
30#include <VBox/dis.h>
31#include <VBox/pdmcritsect.h>
32#include <iprt/avl.h>
33#include <setjmp.h>
34
35RT_C_DECLS_BEGIN
36
37
38/** @defgroup grp_em_int Internal
39 * @ingroup grp_em
40 * @internal
41 * @{
42 */
43
44/** The saved state version. */
45#define EM_SAVED_STATE_VERSION 4
46#define EM_SAVED_STATE_VERSION_PRE_MWAIT 3
47#define EM_SAVED_STATE_VERSION_PRE_SMP 2
48
49
50/**
51 * MWait state flags.
52 */
53/* MWait activated. */
54#define EMMWAIT_FLAG_ACTIVE RT_BIT(0)
55/* MWait will continue when an interrupt is pending even when IF=0. */
56#define EMMWAIT_FLAG_BREAKIRQIF0 RT_BIT(1)
57/* Monitor instruction was executed previously. */
58#define EMMWAIT_FLAG_MONITOR_ACTIVE RT_BIT(2)
59
60
61/**
62 * Cli node structure
63 */
64typedef struct CLISTAT
65{
66 /** The key is the cli address. */
67 AVLGCPTRNODECORE Core;
68#if HC_ARCH_BITS == 32 && !defined(RT_OS_WINDOWS)
69 /** Padding. */
70 uint32_t u32Padding;
71#endif
72 /** Occurrences. */
73 STAMCOUNTER Counter;
74} CLISTAT, *PCLISTAT;
75#ifdef IN_RING3
76AssertCompileMemberAlignment(CLISTAT, Counter, 8);
77#endif
78
79
80/**
81 * Excessive EM statistics.
82 */
83typedef struct EMSTATS
84{
85 /** GC: Profiling of EMInterpretInstruction(). */
86 STAMPROFILE StatRZEmulate;
87 /** HC: Profiling of EMInterpretInstruction(). */
88 STAMPROFILE StatR3Emulate;
89
90 /** @name Interpreter Instruction statistics.
91 * @{
92 */
93 STAMCOUNTER StatRZInterpretSucceeded;
94 STAMCOUNTER StatR3InterpretSucceeded;
95
96 STAMCOUNTER StatRZAnd;
97 STAMCOUNTER StatR3And;
98 STAMCOUNTER StatRZCpuId;
99 STAMCOUNTER StatR3CpuId;
100 STAMCOUNTER StatRZDec;
101 STAMCOUNTER StatR3Dec;
102 STAMCOUNTER StatRZHlt;
103 STAMCOUNTER StatR3Hlt;
104 STAMCOUNTER StatRZInc;
105 STAMCOUNTER StatR3Inc;
106 STAMCOUNTER StatRZInvlPg;
107 STAMCOUNTER StatR3InvlPg;
108 STAMCOUNTER StatRZIret;
109 STAMCOUNTER StatR3Iret;
110 STAMCOUNTER StatRZLLdt;
111 STAMCOUNTER StatR3LLdt;
112 STAMCOUNTER StatRZLIdt;
113 STAMCOUNTER StatR3LIdt;
114 STAMCOUNTER StatRZLGdt;
115 STAMCOUNTER StatR3LGdt;
116 STAMCOUNTER StatRZMov;
117 STAMCOUNTER StatR3Mov;
118 STAMCOUNTER StatRZMovCRx;
119 STAMCOUNTER StatR3MovCRx;
120 STAMCOUNTER StatRZMovDRx;
121 STAMCOUNTER StatR3MovDRx;
122 STAMCOUNTER StatRZOr;
123 STAMCOUNTER StatR3Or;
124 STAMCOUNTER StatRZPop;
125 STAMCOUNTER StatR3Pop;
126 STAMCOUNTER StatRZSti;
127 STAMCOUNTER StatR3Sti;
128 STAMCOUNTER StatRZXchg;
129 STAMCOUNTER StatR3Xchg;
130 STAMCOUNTER StatRZXor;
131 STAMCOUNTER StatR3Xor;
132 STAMCOUNTER StatRZMonitor;
133 STAMCOUNTER StatR3Monitor;
134 STAMCOUNTER StatRZMWait;
135 STAMCOUNTER StatR3MWait;
136 STAMCOUNTER StatRZAdd;
137 STAMCOUNTER StatR3Add;
138 STAMCOUNTER StatRZSub;
139 STAMCOUNTER StatR3Sub;
140 STAMCOUNTER StatRZAdc;
141 STAMCOUNTER StatR3Adc;
142 STAMCOUNTER StatRZRdtsc;
143 STAMCOUNTER StatR3Rdtsc;
144 STAMCOUNTER StatRZRdpmc;
145 STAMCOUNTER StatR3Rdpmc;
146 STAMCOUNTER StatRZBtr;
147 STAMCOUNTER StatR3Btr;
148 STAMCOUNTER StatRZBts;
149 STAMCOUNTER StatR3Bts;
150 STAMCOUNTER StatRZBtc;
151 STAMCOUNTER StatR3Btc;
152 STAMCOUNTER StatRZCmpXchg;
153 STAMCOUNTER StatR3CmpXchg;
154 STAMCOUNTER StatRZCmpXchg8b;
155 STAMCOUNTER StatR3CmpXchg8b;
156 STAMCOUNTER StatRZXAdd;
157 STAMCOUNTER StatR3XAdd;
158 STAMCOUNTER StatRZClts;
159 STAMCOUNTER StatR3Clts;
160 STAMCOUNTER StatRZStosWD;
161 STAMCOUNTER StatR3StosWD;
162 STAMCOUNTER StatR3Rdmsr;
163 STAMCOUNTER StatR3Wrmsr;
164 STAMCOUNTER StatRZRdmsr;
165 STAMCOUNTER StatRZWrmsr;
166 STAMCOUNTER StatRZWbInvd;
167 STAMCOUNTER StatR3WbInvd;
168 STAMCOUNTER StatRZLmsw;
169 STAMCOUNTER StatR3Lmsw;
170 STAMCOUNTER StatRZSmsw;
171 STAMCOUNTER StatR3Smsw;
172
173 STAMCOUNTER StatRZInterpretFailed;
174 STAMCOUNTER StatR3InterpretFailed;
175
176 STAMCOUNTER StatRZFailedAnd;
177 STAMCOUNTER StatR3FailedAnd;
178 STAMCOUNTER StatRZFailedCpuId;
179 STAMCOUNTER StatR3FailedCpuId;
180 STAMCOUNTER StatRZFailedDec;
181 STAMCOUNTER StatR3FailedDec;
182 STAMCOUNTER StatRZFailedHlt;
183 STAMCOUNTER StatR3FailedHlt;
184 STAMCOUNTER StatRZFailedInc;
185 STAMCOUNTER StatR3FailedInc;
186 STAMCOUNTER StatRZFailedInvlPg;
187 STAMCOUNTER StatR3FailedInvlPg;
188 STAMCOUNTER StatRZFailedIret;
189 STAMCOUNTER StatR3FailedIret;
190 STAMCOUNTER StatRZFailedLLdt;
191 STAMCOUNTER StatR3FailedLLdt;
192 STAMCOUNTER StatRZFailedLGdt;
193 STAMCOUNTER StatR3FailedLGdt;
194 STAMCOUNTER StatRZFailedLIdt;
195 STAMCOUNTER StatR3FailedLIdt;
196 STAMCOUNTER StatRZFailedMisc;
197 STAMCOUNTER StatR3FailedMisc;
198 STAMCOUNTER StatRZFailedMov;
199 STAMCOUNTER StatR3FailedMov;
200 STAMCOUNTER StatRZFailedMovCRx;
201 STAMCOUNTER StatR3FailedMovCRx;
202 STAMCOUNTER StatRZFailedMovDRx;
203 STAMCOUNTER StatR3FailedMovDRx;
204 STAMCOUNTER StatRZFailedOr;
205 STAMCOUNTER StatR3FailedOr;
206 STAMCOUNTER StatRZFailedPop;
207 STAMCOUNTER StatR3FailedPop;
208 STAMCOUNTER StatRZFailedSti;
209 STAMCOUNTER StatR3FailedSti;
210 STAMCOUNTER StatRZFailedXchg;
211 STAMCOUNTER StatR3FailedXchg;
212 STAMCOUNTER StatRZFailedXor;
213 STAMCOUNTER StatR3FailedXor;
214 STAMCOUNTER StatRZFailedMonitor;
215 STAMCOUNTER StatR3FailedMonitor;
216 STAMCOUNTER StatRZFailedMWait;
217 STAMCOUNTER StatR3FailedMWait;
218 STAMCOUNTER StatR3FailedRdmsr;
219 STAMCOUNTER StatR3FailedWrmsr;
220 STAMCOUNTER StatRZFailedRdmsr;
221 STAMCOUNTER StatRZFailedWrmsr;
222 STAMCOUNTER StatRZFailedLmsw;
223 STAMCOUNTER StatR3FailedLmsw;
224 STAMCOUNTER StatRZFailedSmsw;
225 STAMCOUNTER StatR3FailedSmsw;
226
227 STAMCOUNTER StatRZFailedAdd;
228 STAMCOUNTER StatR3FailedAdd;
229 STAMCOUNTER StatRZFailedAdc;
230 STAMCOUNTER StatR3FailedAdc;
231 STAMCOUNTER StatRZFailedBtr;
232 STAMCOUNTER StatR3FailedBtr;
233 STAMCOUNTER StatRZFailedBts;
234 STAMCOUNTER StatR3FailedBts;
235 STAMCOUNTER StatRZFailedBtc;
236 STAMCOUNTER StatR3FailedBtc;
237 STAMCOUNTER StatRZFailedCli;
238 STAMCOUNTER StatR3FailedCli;
239 STAMCOUNTER StatRZFailedCmpXchg;
240 STAMCOUNTER StatR3FailedCmpXchg;
241 STAMCOUNTER StatRZFailedCmpXchg8b;
242 STAMCOUNTER StatR3FailedCmpXchg8b;
243 STAMCOUNTER StatRZFailedXAdd;
244 STAMCOUNTER StatR3FailedXAdd;
245 STAMCOUNTER StatR3FailedMovNTPS;
246 STAMCOUNTER StatRZFailedMovNTPS;
247 STAMCOUNTER StatRZFailedStosWD;
248 STAMCOUNTER StatR3FailedStosWD;
249 STAMCOUNTER StatRZFailedSub;
250 STAMCOUNTER StatR3FailedSub;
251 STAMCOUNTER StatRZFailedWbInvd;
252 STAMCOUNTER StatR3FailedWbInvd;
253 STAMCOUNTER StatRZFailedRdtsc;
254 STAMCOUNTER StatR3FailedRdtsc;
255 STAMCOUNTER StatRZFailedRdpmc;
256 STAMCOUNTER StatR3FailedRdpmc;
257 STAMCOUNTER StatRZFailedClts;
258 STAMCOUNTER StatR3FailedClts;
259
260 STAMCOUNTER StatRZFailedUserMode;
261 STAMCOUNTER StatR3FailedUserMode;
262 STAMCOUNTER StatRZFailedPrefix;
263 STAMCOUNTER StatR3FailedPrefix;
264 /** @} */
265
266 /** @name Privileged Instructions Ending Up In HC.
267 * @{ */
268 STAMCOUNTER StatCli;
269 STAMCOUNTER StatSti;
270 STAMCOUNTER StatIn;
271 STAMCOUNTER StatIoRestarted;
272 STAMCOUNTER StatOut;
273 STAMCOUNTER StatInvlpg;
274 STAMCOUNTER StatHlt;
275 STAMCOUNTER StatMovReadCR[USE_REG_CR4 + 1];
276 STAMCOUNTER StatMovWriteCR[USE_REG_CR4 + 1];
277 STAMCOUNTER StatMovDRx;
278 STAMCOUNTER StatIret;
279 STAMCOUNTER StatMovLgdt;
280 STAMCOUNTER StatMovLldt;
281 STAMCOUNTER StatMovLidt;
282 STAMCOUNTER StatMisc;
283 STAMCOUNTER StatSysEnter;
284 STAMCOUNTER StatSysExit;
285 STAMCOUNTER StatSysCall;
286 STAMCOUNTER StatSysRet;
287 /** @} */
288
289} EMSTATS;
290/** Pointer to the excessive EM statistics. */
291typedef EMSTATS *PEMSTATS;
292
293
294/**
295 * Converts a EM pointer into a VM pointer.
296 * @returns Pointer to the VM structure the EM is part of.
297 * @param pEM Pointer to EM instance data.
298 */
299#define EM2VM(pEM) ( (PVM)((char*)pEM - pEM->offVM) )
300
301/**
302 * EM VM Instance data.
303 * Changes to this must checked against the padding of the cfgm union in VM!
304 */
305typedef struct EM
306{
307 /** Offset to the VM structure.
308 * See EM2VM(). */
309 RTUINT offVM;
310
311 /** Id of the VCPU that last executed code in the recompiler. */
312 VMCPUID idLastRemCpu;
313
314 /** REM critical section.
315 * This protects recompiler usage
316 */
317 PDMCRITSECT CritSectREM;
318} EM;
319/** Pointer to EM VM instance data. */
320typedef EM *PEM;
321
322
323/**
324 * EM VMCPU Instance data.
325 */
326typedef struct EMCPU
327{
328 /** Offset to the VM structure.
329 * See EMCPU2VM(). */
330 RTUINT offVMCPU;
331
332 /** Execution Manager State. */
333 EMSTATE volatile enmState;
334
335 /** Previous Execution Manager State. */
336 EMSTATE enmPrevState;
337
338 /** Force raw-mode execution.
339 * This is used to prevent REM from trying to execute patch code.
340 * The flag is cleared upon entering emR3RawExecute() and updated in certain return paths. */
341 bool fForceRAW;
342
343 uint8_t u8Padding[3];
344
345 /** Inhibit interrupts for this instruction. Valid only when VM_FF_INHIBIT_INTERRUPTS is set. */
346 RTGCUINTPTR GCPtrInhibitInterrupts;
347
348 /** Pointer to the PATM status structure. (R3 Ptr) */
349 R3PTRTYPE(PPATMGCSTATE) pPatmGCState;
350
351 /** Pointer to the guest CPUM state. (R3 Ptr) */
352 R3PTRTYPE(PCPUMCTX) pCtx;
353
354#if GC_ARCH_BITS == 64
355 RTGCPTR aPadding1;
356#endif
357
358 /* MWait halt state. */
359 struct
360 {
361 uint32_t fWait; /* type of mwait; see EMMWAIT_FLAG_* */
362 uint32_t a32Padding[1];
363 RTGCPTR uMWaitEAX; /* mwait hints */
364 RTGCPTR uMWaitECX; /* mwait extensions */
365 RTGCPTR uMonitorEAX; /* monitored address. */
366 RTGCPTR uMonitorECX; /* monitor extension. */
367 RTGCPTR uMonitorEDX; /* monitor hint. */
368 } mwait;
369
370 union
371 {
372 /** Padding used in the other rings.
373 * This must be larger than jmp_buf on any supported platform. */
374 char achPaddingFatalLongJump[HC_ARCH_BITS == 32 ? 176 : 256];
375#ifdef IN_RING3
376 /** Long buffer jump for fatal VM errors.
377 * It will jump to before the outer EM loop is entered. */
378 jmp_buf FatalLongJump;
379#endif
380 } u;
381
382 /** For saving stack space, the disassembler state is allocated here instead of
383 * on the stack.
384 * @note The DISCPUSTATE structure is not R3/R0/RZ clean! */
385 union
386 {
387 /** The disassembler scratch space. */
388 DISCPUSTATE DisState;
389 /** Padding. */
390 uint8_t abDisStatePadding[DISCPUSTATE_PADDING_SIZE];
391 };
392
393 /** @name Execution profiling.
394 * @{ */
395 STAMPROFILE StatForcedActions;
396 STAMPROFILE StatHalted;
397 STAMPROFILEADV StatHwAccEntry;
398 STAMPROFILE StatHwAccExec;
399 STAMPROFILE StatREMEmu;
400 STAMPROFILE StatREMExec;
401 STAMPROFILE StatREMSync;
402 STAMPROFILEADV StatREMTotal;
403 STAMPROFILE StatRAWExec;
404 STAMPROFILEADV StatRAWEntry;
405 STAMPROFILEADV StatRAWTail;
406 STAMPROFILEADV StatRAWTotal;
407 STAMPROFILEADV StatTotal;
408 /** @} */
409
410 /** R3: Profiling of emR3RawExecuteIOInstruction. */
411 STAMPROFILE StatIOEmu;
412 /** R3: Profiling of emR3RawPrivileged. */
413 STAMPROFILE StatPrivEmu;
414 /** R3: Number of time emR3HwAccExecute is called. */
415 STAMCOUNTER StatHwAccExecuteEntry;
416
417 /** More statistics (R3). */
418 R3PTRTYPE(PEMSTATS) pStatsR3;
419 /** More statistics (R0). */
420 R0PTRTYPE(PEMSTATS) pStatsR0;
421 /** More statistics (RC). */
422 RCPTRTYPE(PEMSTATS) pStatsRC;
423#if HC_ARCH_BITS == 64
424 RTRCPTR padding0;
425#endif
426
427 /** Tree for keeping track of cli occurances (debug only). */
428 R3PTRTYPE(PAVLGCPTRNODECORE) pCliStatTree;
429 STAMCOUNTER StatTotalClis;
430#if 0
431 /** 64-bit Visual C++ rounds the struct size up to 16 byte. */
432 uint64_t padding1;
433#endif
434} EMCPU;
435/** Pointer to EM VM instance data. */
436typedef EMCPU *PEMCPU;
437
438/** @} */
439
440
441int emR3HwAccExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
442int emR3RawExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
443int emR3RawHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc);
444int emR3HwaccmHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc);
445EMSTATE emR3Reschedule(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
446int emR3ForcedActions(PVM pVM, PVMCPU pVCpu, int rc);
447int emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, int rc);
448int emR3RawUpdateForceFlag(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc);
449int emR3RawResumeHyper(PVM pVM, PVMCPU pVCpu);
450int emR3RawStep(PVM pVM, PVMCPU pVCpu);
451int emR3SingleStepExecRem(PVM pVM, PVMCPU pVCpu, uint32_t cIterations);
452
453RT_C_DECLS_END
454
455#endif
456
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