VirtualBox

source: vbox/trunk/src/VBox/VMM/HWACCMInternal.h@ 8862

Last change on this file since 8862 was 8860, checked in by vboxsync, 17 years ago

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1/* $Id: HWACCMInternal.h 8860 2008-05-15 14:43:16Z vboxsync $ */
2/** @file
3 * HWACCM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___HWACCMInternal_h
23#define ___HWACCMInternal_h
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/em.h>
28#include <VBox/stam.h>
29#include <VBox/dis.h>
30#include <VBox/hwaccm.h>
31#include <VBox/pgm.h>
32#include <iprt/memobj.h>
33
34__BEGIN_DECLS
35
36
37/** @defgroup grp_hwaccm_int Internal
38 * @ingroup grp_hwaccm
39 * @internal
40 * @{
41 */
42
43
44/**
45 * Converts a HWACCM pointer into a VM pointer.
46 * @returns Pointer to the VM structure the EM is part of.
47 * @param pHWACCM Pointer to HWACCM instance data.
48 */
49#define HWACCM2VM(pHWACCM) ( (PVM)((char*)pHWACCM - pHWACCM->offVM) )
50
51/** Maximum number of exit reason statistics counters. */
52#define MAX_EXITREASON_STAT 0x100
53#define MASK_EXITREASON_STAT 0xff
54
55/** @name Changed flags
56 * These flags are used to keep track of which important registers that
57 * have been changed since last they were reset.
58 * @{
59 */
60#define HWACCM_CHANGED_GUEST_FPU RT_BIT(0)
61#define HWACCM_CHANGED_GUEST_CR0 RT_BIT(1)
62#define HWACCM_CHANGED_GUEST_CR3 RT_BIT(2)
63#define HWACCM_CHANGED_GUEST_CR4 RT_BIT(3)
64#define HWACCM_CHANGED_GUEST_GDTR RT_BIT(4)
65#define HWACCM_CHANGED_GUEST_IDTR RT_BIT(5)
66#define HWACCM_CHANGED_GUEST_LDTR RT_BIT(6)
67#define HWACCM_CHANGED_GUEST_TR RT_BIT(7)
68#define HWACCM_CHANGED_GUEST_SYSENTER_MSR RT_BIT(8)
69#define HWACCM_CHANGED_GUEST_SEGMENT_REGS RT_BIT(9)
70#define HWACCM_CHANGED_GUEST_DEBUG RT_BIT(10)
71#define HWACCM_CHANGED_HOST_CONTEXT RT_BIT(11)
72
73#define HWACCM_CHANGED_ALL ( HWACCM_CHANGED_GUEST_SEGMENT_REGS \
74 | HWACCM_CHANGED_GUEST_CR0 \
75 | HWACCM_CHANGED_GUEST_CR3 \
76 | HWACCM_CHANGED_GUEST_CR4 \
77 | HWACCM_CHANGED_GUEST_GDTR \
78 | HWACCM_CHANGED_GUEST_IDTR \
79 | HWACCM_CHANGED_GUEST_LDTR \
80 | HWACCM_CHANGED_GUEST_TR \
81 | HWACCM_CHANGED_GUEST_SYSENTER_MSR \
82 | HWACCM_CHANGED_GUEST_FPU \
83 | HWACCM_CHANGED_GUEST_DEBUG \
84 | HWACCM_CHANGED_HOST_CONTEXT)
85
86#define HWACCM_CHANGED_ALL_GUEST ( HWACCM_CHANGED_GUEST_SEGMENT_REGS \
87 | HWACCM_CHANGED_GUEST_CR0 \
88 | HWACCM_CHANGED_GUEST_CR3 \
89 | HWACCM_CHANGED_GUEST_CR4 \
90 | HWACCM_CHANGED_GUEST_GDTR \
91 | HWACCM_CHANGED_GUEST_IDTR \
92 | HWACCM_CHANGED_GUEST_LDTR \
93 | HWACCM_CHANGED_GUEST_TR \
94 | HWACCM_CHANGED_GUEST_SYSENTER_MSR \
95 | HWACCM_CHANGED_GUEST_DEBUG \
96 | HWACCM_CHANGED_GUEST_FPU)
97
98/** @} */
99
100/** @name Intercepted traps
101 * Traps that need to be intercepted so we can correctly dispatch them to the guest if required.
102 * Currently #NM and #PF only
103 */
104#ifdef VBOX_STRICT
105#define HWACCM_VMX_TRAP_MASK RT_BIT(0) | RT_BIT(7) | RT_BIT(14) | RT_BIT(6) | RT_BIT(11) | RT_BIT(12) | RT_BIT(13) | RT_BIT(16)
106#define HWACCM_SVM_TRAP_MASK HWACCM_VMX_TRAP_MASK
107#else
108#define HWACCM_VMX_TRAP_MASK RT_BIT(7) | RT_BIT(14)
109#define HWACCM_SVM_TRAP_MASK HWACCM_VMX_TRAP_MASK
110#endif
111/** @} */
112
113
114/** Maxium resume loops allowed in ring 0 (safety precaution) */
115#define HWACCM_MAX_RESUME_LOOPS 1024
116
117/** HWACCM SSM version
118 */
119#define HWACCM_SSM_VERSION 3
120
121/**
122 * HWACCM VM Instance data.
123 * Changes to this must checked against the padding of the cfgm union in VM!
124 */
125typedef struct HWACCM
126{
127 /** Offset to the VM structure.
128 * See HWACCM2VM(). */
129 RTUINT offVM;
130
131 /** Set when we've initialized VMX or SVM. */
132 bool fInitialized;
133 /** Set when we're using VMX/SVN at that moment. */
134 bool fActive;
135
136 /** Set when hardware acceleration is allowed. */
137 bool fAllowed;
138
139 /** HWACCM_CHANGED_* flags. */
140 uint32_t fContextUseFlags;
141
142 /** Old style FPU reporting trap mask override performed (optimization) */
143 uint32_t fFPUOldStyleOverride;
144
145 struct
146 {
147 /** Set by the ring-0 driver to indicate VMX is supported by the CPU. */
148 bool fSupported;
149
150 /** Set when we've enabled VMX. */
151 bool fEnabled;
152
153 /** Set if we can use VMXResume to execute guest code. */
154 bool fResumeVM;
155
156 /** R0 memory object for the VM control structure (VMCS). */
157 RTR0MEMOBJ pMemObjVMCS;
158 /** Physical address of the VM control structure (VMCS). */
159 RTHCPHYS pVMCSPhys;
160 /** Virtual address of the VM control structure (VMCS). */
161 R0PTRTYPE(void *) pVMCS;
162
163 /** R0 memory object for the TSS page used for real mode emulation. */
164 RTR0MEMOBJ pMemObjRealModeTSS;
165 /** Physical address of the TSS page used for real mode emulation. */
166 RTHCPHYS pRealModeTSSPhys;
167 /** Virtual address of the TSS page used for real mode emulation. */
168 R0PTRTYPE(PVBOXTSS) pRealModeTSS;
169
170 /** Host CR4 value (set by ring-0 VMX init) */
171 uint64_t hostCR4;
172
173 /** Current VMX_VMCS_CTRL_PROC_EXEC_CONTROLS. */
174 uint64_t proc_ctls;
175
176 /** Current CR0 mask. */
177 uint64_t cr0_mask;
178 /** Current CR4 mask. */
179 uint64_t cr4_mask;
180
181 /** VMX MSR values */
182 struct
183 {
184 uint64_t feature_ctrl;
185 uint64_t vmx_basic_info;
186 uint64_t vmx_pin_ctls;
187 uint64_t vmx_proc_ctls;
188 uint64_t vmx_exit;
189 uint64_t vmx_entry;
190 uint64_t vmx_misc;
191 uint64_t vmx_cr0_fixed0;
192 uint64_t vmx_cr0_fixed1;
193 uint64_t vmx_cr4_fixed0;
194 uint64_t vmx_cr4_fixed1;
195 uint64_t vmx_vmcs_enum;
196 } msr;
197
198 /* Last instruction error */
199 uint32_t ulLastInstrError;
200 } vmx;
201
202 struct
203 {
204 /** Set by the ring-0 driver to indicate SVM is supported by the CPU. */
205 bool fSupported;
206
207 /** Set when we've enabled SVM. */
208 bool fEnabled;
209
210 /** Set if we don't have to flush the TLB on VM entry. */
211 bool fResumeVM;
212 /** Set if erratum 170 affects the AMD cpu. */
213 bool fAlwaysFlushTLB;
214 /** Set if we need to flush the TLB during the world switch. */
215 bool fForceTLBFlush;
216
217 /** R0 memory object for the VM control block (VMCB). */
218 RTR0MEMOBJ pMemObjVMCB;
219 /** Physical address of the VM control block (VMCB). */
220 RTHCPHYS pVMCBPhys;
221 /** Virtual address of the VM control block (VMCB). */
222 R0PTRTYPE(void *) pVMCB;
223
224 /** R0 memory object for the host VM control block (VMCB). */
225 RTR0MEMOBJ pMemObjVMCBHost;
226 /** Physical address of the host VM control block (VMCB). */
227 RTHCPHYS pVMCBHostPhys;
228 /** Virtual address of the host VM control block (VMCB). */
229 R0PTRTYPE(void *) pVMCBHost;
230
231 /** R0 memory object for the IO bitmap (12kb). */
232 RTR0MEMOBJ pMemObjIOBitmap;
233 /** Physical address of the IO bitmap (12kb). */
234 RTHCPHYS pIOBitmapPhys;
235 /** Virtual address of the IO bitmap. */
236 R0PTRTYPE(void *) pIOBitmap;
237
238 /** R0 memory object for the MSR bitmap (8kb). */
239 RTR0MEMOBJ pMemObjMSRBitmap;
240 /** Physical address of the MSR bitmap (8kb). */
241 RTHCPHYS pMSRBitmapPhys;
242 /** Virtual address of the MSR bitmap. */
243 R0PTRTYPE(void *) pMSRBitmap;
244
245 /** SVM revision. */
246 uint32_t u32Rev;
247
248 /** Maximum ASID allowed. */
249 uint32_t u32MaxASID;
250 } svm;
251
252 struct
253 {
254 uint32_t u32AMDFeatureECX;
255 uint32_t u32AMDFeatureEDX;
256 } cpuid;
257
258 /* Event injection state. */
259 struct
260 {
261 uint32_t fPending;
262 uint32_t errCode;
263 uint64_t intInfo;
264 } Event;
265
266 /** Saved error from detection */
267 int32_t lLastError;
268
269 /** HWACCMR0Init was run */
270 bool fHWACCMR0Init;
271
272 /** Currenty shadow paging mode. */
273 PGMMODE enmShadowMode;
274
275 STAMPROFILEADV StatEntry;
276 STAMPROFILEADV StatExit;
277 STAMPROFILEADV StatInGC;
278
279 STAMCOUNTER StatIntInject;
280
281 STAMCOUNTER StatExitShadowNM;
282 STAMCOUNTER StatExitGuestNM;
283 STAMCOUNTER StatExitShadowPF;
284 STAMCOUNTER StatExitGuestPF;
285 STAMCOUNTER StatExitGuestUD;
286 STAMCOUNTER StatExitGuestSS;
287 STAMCOUNTER StatExitGuestNP;
288 STAMCOUNTER StatExitGuestGP;
289 STAMCOUNTER StatExitGuestDE;
290 STAMCOUNTER StatExitGuestMF;
291 STAMCOUNTER StatExitInvpg;
292 STAMCOUNTER StatExitInvd;
293 STAMCOUNTER StatExitCpuid;
294 STAMCOUNTER StatExitRdtsc;
295 STAMCOUNTER StatExitCRxWrite;
296 STAMCOUNTER StatExitCRxRead;
297 STAMCOUNTER StatExitDRxWrite;
298 STAMCOUNTER StatExitDRxRead;
299 STAMCOUNTER StatExitCLTS;
300 STAMCOUNTER StatExitLMSW;
301 STAMCOUNTER StatExitIOWrite;
302 STAMCOUNTER StatExitIORead;
303 STAMCOUNTER StatExitIOStringWrite;
304 STAMCOUNTER StatExitIOStringRead;
305 STAMCOUNTER StatExitIrqWindow;
306 STAMCOUNTER StatExitMaxResume;
307 STAMCOUNTER StatIntReinject;
308 STAMCOUNTER StatPendingHostIrq;
309
310 STAMCOUNTER StatFlushPageManual;
311 STAMCOUNTER StatFlushTLBManual;
312 STAMCOUNTER StatFlushPageInvlpg;
313 STAMCOUNTER StatFlushTLBWorldSwitch;
314 STAMCOUNTER StatNoFlushTLBWorldSwitch;
315 STAMCOUNTER StatFlushTLBCRxChange;
316
317 STAMCOUNTER StatSwitchGuestIrq;
318 STAMCOUNTER StatSwitchToR3;
319
320 R3PTRTYPE(PSTAMCOUNTER) pStatExitReason;
321 R0PTRTYPE(PSTAMCOUNTER) pStatExitReasonR0;
322} HWACCM;
323/** Pointer to HWACCM VM instance data. */
324typedef HWACCM *PHWACCM;
325
326
327#ifdef IN_RING0
328
329#ifdef VBOX_STRICT
330HWACCMR0DECL(void) HWACCMDumpRegs(PCPUMCTX pCtx);
331HWACCMR0DECL(void) HWACCMR0DumpDescriptor(PX86DESCHC Desc, RTSEL Sel, const char *pszMsg);
332#else
333#define HWACCMDumpRegs(a) do { } while (0)
334#define HWACCMR0DumpDescriptor(a, b, c) do { } while (0)
335#endif
336
337#endif
338
339/** @} */
340
341__END_DECLS
342
343#endif
344
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