VirtualBox

source: vbox/trunk/src/VBox/VMM/IOM.cpp@ 29287

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1/* $Id: IOM.cpp 28800 2010-04-27 08:22:32Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/** @page pg_iom IOM - The Input / Output Monitor
20 *
21 * The input/output monitor will handle I/O exceptions routing them to the
22 * appropriate device. It implements an API to register and deregister virtual
23 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
24 * and a set of callback functions.
25 *
26 * @see grp_iom
27 *
28 *
29 * @section sec_iom_rawmode Raw-Mode
30 *
31 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
32 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
33 * dissassembler (DIS) to figure which instruction caused it (there are a number
34 * of instructions in addition to the I/O ones) and if it's an I/O port access
35 * it will hand it to IOMGCIOPortHandler (via EMInterpretPortIO).
36 * IOMGCIOPortHandler will lookup the port in the AVL tree of registered
37 * handlers. If found, the handler will be called otherwise default action is
38 * taken. (Default action is to write into the void and read all set bits.)
39 *
40 * Memory Mapped I/O (MMIO) is implemented as a sligtly special case of PGM
41 * access handlers. An MMIO range is registered with IOM which then registers it
42 * with the PGM access handler sub-system. The access handler catches all
43 * access and will be called in the context of a \#PF handler. In RC and R0 this
44 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (althought in
45 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
46 * the instruction that is doing the access and pass the corresponding reads /
47 * writes to the device.
48 *
49 * Emulating I/O port access is less complex and should be sligtly faster than
50 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
51 * Devices which are freqently accessed should register GC handlers to speed up
52 * execution.
53 *
54 *
55 * @section sec_iom_hwaccm Hardware Assisted Virtualization Mode
56 *
57 * When running in hardware assisted virtualization mode we'll be doing much the
58 * same things as in raw-mode. The main difference is that we're running in the
59 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
60 * exits.
61 *
62 *
63 * @section sec_iom_rem Recompiled Execution Mode
64 *
65 * When running in the recompiler things are different. I/O port access is
66 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
67 * be handled in one of two ways. The normal way is that we have a registered a
68 * special RAM range with the recompiler and in the three callbacks (for byte,
69 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
70 * alternative ways that the physical memory access which goes via PGM will take
71 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
72 * - this shouldn't happen but it is an alternative...
73 *
74 *
75 * @section sec_iom_other Other Accesses
76 *
77 * I/O ports aren't really exposed in any other way, unless you count the
78 * instruction interpreter in EM, but that's just what we're doing in the
79 * raw-mode \#GP(0) case really. Now it's possible to call IOMIOPortRead and
80 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
81 * and should only be done as temporary hacks (the PC BIOS device used to
82 * setup the CMOS this way back in the dark ages).
83 *
84 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
85 * for the same reasons and with the same restrictions. OTOH since MMIO is
86 * mapped into the physical memory address space, it can be accessed in a number
87 * of ways thru PGM.
88 *
89 */
90
91
92/*******************************************************************************
93* Header Files *
94*******************************************************************************/
95#define LOG_GROUP LOG_GROUP_IOM
96#include <VBox/iom.h>
97#include <VBox/cpum.h>
98#include <VBox/pgm.h>
99#include <VBox/sup.h>
100#include <VBox/mm.h>
101#include <VBox/stam.h>
102#include <VBox/dbgf.h>
103#include <VBox/pdmapi.h>
104#include <VBox/pdmdev.h>
105#include "IOMInternal.h"
106#include <VBox/vm.h>
107
108#include <VBox/param.h>
109#include <iprt/assert.h>
110#include <iprt/alloc.h>
111#include <iprt/string.h>
112#include <VBox/log.h>
113#include <VBox/err.h>
114
115
116/*******************************************************************************
117* Internal Functions *
118*******************************************************************************/
119static void iomR3FlushCache(PVM pVM);
120static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
121static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
122static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
123static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
124static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
125static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
126static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
127static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
128
129#ifdef VBOX_WITH_STATISTICS
130static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
131#endif
132
133
134/**
135 * Initializes the IOM.
136 *
137 * @returns VBox status code.
138 * @param pVM The VM to operate on.
139 */
140VMMR3DECL(int) IOMR3Init(PVM pVM)
141{
142 LogFlow(("IOMR3Init:\n"));
143
144 /*
145 * Assert alignment and sizes.
146 */
147 AssertCompileMemberAlignment(VM, iom.s, 32);
148 AssertCompile(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
149 AssertCompileMemberAlignment(IOM, EmtLock, sizeof(uintptr_t));
150
151 /*
152 * Setup any fixed pointers and offsets.
153 */
154 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
155
156 /*
157 * Initialize the REM critical section.
158 */
159 int rc = PDMR3CritSectInit(pVM, &pVM->iom.s.EmtLock, RT_SRC_POS, "IOM EMT Lock");
160 AssertRCReturn(rc, rc);
161
162 /*
163 * Allocate the trees structure.
164 */
165 rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
166 if (RT_SUCCESS(rc))
167 {
168 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
169 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
170 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;
171 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;
172
173 /*
174 * Info.
175 */
176 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
177 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
178
179 /*
180 * Statistics.
181 */
182 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
183 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
184 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
185 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
186 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
187 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
188 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
189 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
190 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
191 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
192 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
193 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
194 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
195 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
196 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
197 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
198#ifdef IOM_WITH_MOVS_SUPPORT
199 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
200 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
201 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
202 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
203#endif
204 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
205 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
206 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
207 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
208 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
209 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
210 }
211
212 /* Redundant, but just in case we change something in the future */
213 iomR3FlushCache(pVM);
214
215 LogFlow(("IOMR3Init: returns %Rrc\n", rc));
216 return rc;
217}
218
219
220/**
221 * Flushes the IOM port & statistics lookup cache
222 *
223 * @param pVM The VM.
224 */
225static void iomR3FlushCache(PVM pVM)
226{
227 iomLock(pVM);
228 /*
229 * Caching of port and statistics (saves some time in rep outs/ins instruction emulation)
230 */
231 pVM->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
232 pVM->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
233 pVM->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
234 pVM->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
235 pVM->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
236 pVM->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
237
238 pVM->iom.s.pRangeLastReadR3 = NULL;
239 pVM->iom.s.pRangeLastWriteR3 = NULL;
240 pVM->iom.s.pStatsLastReadR3 = NULL;
241 pVM->iom.s.pStatsLastWriteR3 = NULL;
242 pVM->iom.s.pMMIORangeLastR3 = NULL;
243 pVM->iom.s.pMMIOStatsLastR3 = NULL;
244
245 pVM->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
246 pVM->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
247 pVM->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
248 pVM->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
249 pVM->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
250 pVM->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
251
252 iomUnlock(pVM);
253}
254
255
256/**
257 * The VM is being reset.
258 *
259 * @param pVM VM handle.
260 */
261VMMR3DECL(void) IOMR3Reset(PVM pVM)
262{
263 iomR3FlushCache(pVM);
264}
265
266
267/**
268 * Applies relocations to data and code managed by this
269 * component. This function will be called at init and
270 * whenever the VMM need to relocate it self inside the GC.
271 *
272 * The IOM will update the addresses used by the switcher.
273 *
274 * @param pVM The VM.
275 * @param offDelta Relocation delta relative to old location.
276 */
277VMMR3DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
278{
279 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
280
281 /*
282 * Apply relocations to the GC callbacks.
283 */
284 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
285 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
286 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
287
288 if (pVM->iom.s.pfnMMIOHandlerRC)
289 pVM->iom.s.pfnMMIOHandlerRC += offDelta;
290
291 /*
292 * Apply relocations to the cached GC handlers
293 */
294 if (pVM->iom.s.pRangeLastReadRC)
295 pVM->iom.s.pRangeLastReadRC += offDelta;
296 if (pVM->iom.s.pRangeLastWriteRC)
297 pVM->iom.s.pRangeLastWriteRC += offDelta;
298 if (pVM->iom.s.pStatsLastReadRC)
299 pVM->iom.s.pStatsLastReadRC += offDelta;
300 if (pVM->iom.s.pStatsLastWriteRC)
301 pVM->iom.s.pStatsLastWriteRC += offDelta;
302 if (pVM->iom.s.pMMIORangeLastRC)
303 pVM->iom.s.pMMIORangeLastRC += offDelta;
304 if (pVM->iom.s.pMMIOStatsLastRC)
305 pVM->iom.s.pMMIOStatsLastRC += offDelta;
306}
307
308
309/**
310 * Callback function for relocating a I/O port range.
311 *
312 * @returns 0 (continue enum)
313 * @param pNode Pointer to a IOMIOPORTRANGERC node.
314 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
315 * not certain the delta will fit in a void pointer for all possible configs.
316 */
317static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
318{
319 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
320 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
321
322 Assert(pRange->pDevIns);
323 pRange->pDevIns += offDelta;
324 if (pRange->pfnOutCallback)
325 pRange->pfnOutCallback += offDelta;
326 if (pRange->pfnInCallback)
327 pRange->pfnInCallback += offDelta;
328 if (pRange->pfnOutStrCallback)
329 pRange->pfnOutStrCallback += offDelta;
330 if (pRange->pfnInStrCallback)
331 pRange->pfnInStrCallback += offDelta;
332 if (pRange->pvUser > _64K)
333 pRange->pvUser += offDelta;
334 return 0;
335}
336
337
338/**
339 * Callback function for relocating a MMIO range.
340 *
341 * @returns 0 (continue enum)
342 * @param pNode Pointer to a IOMMMIORANGE node.
343 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
344 * not certain the delta will fit in a void pointer for all possible configs.
345 */
346static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
347{
348 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
349 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
350
351 if (pRange->pDevInsRC)
352 pRange->pDevInsRC += offDelta;
353 if (pRange->pfnWriteCallbackRC)
354 pRange->pfnWriteCallbackRC += offDelta;
355 if (pRange->pfnReadCallbackRC)
356 pRange->pfnReadCallbackRC += offDelta;
357 if (pRange->pfnFillCallbackRC)
358 pRange->pfnFillCallbackRC += offDelta;
359 if (pRange->pvUserRC > _64K)
360 pRange->pvUserRC += offDelta;
361
362 return 0;
363}
364
365
366/**
367 * Terminates the IOM.
368 *
369 * Termination means cleaning up and freeing all resources,
370 * the VM it self is at this point powered off or suspended.
371 *
372 * @returns VBox status code.
373 * @param pVM The VM to operate on.
374 */
375VMMR3DECL(int) IOMR3Term(PVM pVM)
376{
377 /*
378 * IOM is not owning anything but automatically freed resources,
379 * so there's nothing to do here.
380 */
381 return VINF_SUCCESS;
382}
383
384#ifdef VBOX_WITH_STATISTICS
385
386/**
387 * Create the statistics node for an I/O port.
388 *
389 * @returns Pointer to new stats node.
390 *
391 * @param pVM VM handle.
392 * @param Port Port.
393 * @param pszDesc Description.
394 */
395PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
396{
397 Assert(IOMIsLockOwner(pVM));
398 /* check if it already exists. */
399 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
400 if (pPort)
401 return pPort;
402
403 /* allocate stats node. */
404 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
405 AssertRC(rc);
406 if (RT_SUCCESS(rc))
407 {
408 /* insert into the tree. */
409 pPort->Core.Key = Port;
410 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
411 {
412 /* put a name on common ports. */
413 if (!pszDesc)
414 pszDesc = iomR3IOPortGetStandardName(Port);
415
416 /* register the statistics counters. */
417 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
418 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
419 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
420 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
421 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
422 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
423
424 /* Profiling */
425 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
426 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
427 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
428 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
429
430 return pPort;
431 }
432 AssertMsgFailed(("what! Port=%d\n", Port));
433 MMHyperFree(pVM, pPort);
434 }
435 return NULL;
436}
437
438
439/**
440 * Create the statistics node for an MMIO address.
441 *
442 * @returns Pointer to new stats node.
443 *
444 * @param pVM VM handle.
445 * @param GCPhys The address.
446 * @param pszDesc Description.
447 */
448PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
449{
450 Assert(IOMIsLockOwner(pVM));
451#ifdef DEBUG_sandervl
452 AssertGCPhys32(GCPhys);
453#endif
454 /* check if it already exists. */
455 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MMIOStatTree, GCPhys);
456 if (pStats)
457 return pStats;
458
459 /* allocate stats node. */
460 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
461 AssertRC(rc);
462 if (RT_SUCCESS(rc))
463 {
464 /* insert into the tree. */
465 pStats->Core.Key = GCPhys;
466 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOStatTree, &pStats->Core))
467 {
468 /* register the statistics counters. */
469 rc = STAMR3RegisterF(pVM, &pStats->ReadR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Read-R3", GCPhys); AssertRC(rc);
470 rc = STAMR3RegisterF(pVM, &pStats->WriteR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Write-R3", GCPhys); AssertRC(rc);
471 rc = STAMR3RegisterF(pVM, &pStats->ReadRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Read-RZ", GCPhys); AssertRC(rc);
472 rc = STAMR3RegisterF(pVM, &pStats->WriteRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Write-RZ", GCPhys); AssertRC(rc);
473 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Read-RZtoR3", GCPhys); AssertRC(rc);
474 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Write-RZtoR3", GCPhys); AssertRC(rc);
475
476 /* Profiling */
477 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Read-R3/Prof", GCPhys); AssertRC(rc);
478 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Write-R3/Prof", GCPhys); AssertRC(rc);
479 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Read-RZ/Prof", GCPhys); AssertRC(rc);
480 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Write-RZ/Prof", GCPhys); AssertRC(rc);
481
482 return pStats;
483 }
484 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
485 MMHyperFree(pVM, pStats);
486 }
487 return NULL;
488}
489
490#endif /* VBOX_WITH_STATISTICS */
491
492/**
493 * Registers a I/O port ring-3 handler.
494 *
495 * This API is called by PDM on behalf of a device. Devices must first register
496 * ring-3 ranges before any GC and R0 ranges can be registerd using IOMR3IOPortRegisterRC()
497 * and IOMR3IOPortRegisterR0().
498 *
499 *
500 * @returns VBox status code.
501 *
502 * @param pVM VM handle.
503 * @param pDevIns PDM device instance owning the port range.
504 * @param PortStart First port number in the range.
505 * @param cPorts Number of ports to register.
506 * @param pvUser User argument for the callbacks.
507 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
508 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
509 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
510 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
511 * @param pszDesc Pointer to description string. This must not be freed.
512 */
513VMMR3DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
514 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
515 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
516{
517 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
518 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
519
520 /*
521 * Validate input.
522 */
523 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
524 || (RTUINT)PortStart + cPorts > 0x10000)
525 {
526 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
527 return VERR_IOM_INVALID_IOPORT_RANGE;
528 }
529 if (!pfnOutCallback && !pfnInCallback)
530 {
531 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
532 return VERR_INVALID_PARAMETER;
533 }
534 if (!pfnOutCallback)
535 pfnOutCallback = iomR3IOPortDummyOut;
536 if (!pfnInCallback)
537 pfnInCallback = iomR3IOPortDummyIn;
538 if (!pfnOutStrCallback)
539 pfnOutStrCallback = iomR3IOPortDummyOutStr;
540 if (!pfnInStrCallback)
541 pfnInStrCallback = iomR3IOPortDummyInStr;
542
543 /* Flush the IO port lookup cache */
544 iomR3FlushCache(pVM);
545
546 /*
547 * Allocate new range record and initialize it.
548 */
549 PIOMIOPORTRANGER3 pRange;
550 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
551 if (RT_SUCCESS(rc))
552 {
553 pRange->Core.Key = PortStart;
554 pRange->Core.KeyLast = PortStart + (cPorts - 1);
555 pRange->Port = PortStart;
556 pRange->cPorts = cPorts;
557 pRange->pvUser = pvUser;
558 pRange->pDevIns = pDevIns;
559 pRange->pfnOutCallback = pfnOutCallback;
560 pRange->pfnInCallback = pfnInCallback;
561 pRange->pfnOutStrCallback = pfnOutStrCallback;
562 pRange->pfnInStrCallback = pfnInStrCallback;
563 pRange->pszDesc = pszDesc;
564
565 /*
566 * Try Insert it.
567 */
568 iomLock(pVM);
569 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
570 {
571 #ifdef VBOX_WITH_STATISTICS
572 for (unsigned iPort = 0; iPort < cPorts; iPort++)
573 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
574 #endif
575 iomUnlock(pVM);
576 return VINF_SUCCESS;
577 }
578 iomUnlock(pVM);
579
580 /* conflict. */
581 DBGFR3Info(pVM, "ioport", NULL, NULL);
582 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
583 MMHyperFree(pVM, pRange);
584 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
585 }
586
587 return rc;
588}
589
590
591/**
592 * Registers a I/O port RC handler.
593 *
594 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
595 * using IOMIOPortRegisterR3() before calling this function.
596 *
597 *
598 * @returns VBox status code.
599 *
600 * @param pVM VM handle.
601 * @param pDevIns PDM device instance owning the port range.
602 * @param PortStart First port number in the range.
603 * @param cPorts Number of ports to register.
604 * @param pvUser User argument for the callbacks.
605 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
606 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
607 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
608 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
609 * @param pszDesc Pointer to description string. This must not be freed.
610 */
611VMMR3DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
612 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
613 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
614{
615 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",
616 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
617
618 /*
619 * Validate input.
620 */
621 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
622 || (RTUINT)PortStart + cPorts > 0x10000)
623 {
624 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
625 return VERR_IOM_INVALID_IOPORT_RANGE;
626 }
627 RTIOPORT PortLast = PortStart + (cPorts - 1);
628 if (!pfnOutCallback && !pfnInCallback)
629 {
630 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
631 return VERR_INVALID_PARAMETER;
632 }
633
634 iomLock(pVM);
635
636 /*
637 * Validate that there are ring-3 ranges for the ports.
638 */
639 RTIOPORT Port = PortStart;
640 while (Port <= PortLast && Port >= PortStart)
641 {
642 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
643 if (!pRange)
644 {
645 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
646 iomUnlock(pVM);
647 return VERR_IOM_NO_HC_IOPORT_RANGE;
648 }
649#ifndef IOM_NO_PDMINS_CHECKS
650# ifndef IN_RC
651 if (pRange->pDevIns != pDevIns)
652# else
653 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
654# endif
655 {
656 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
657 iomUnlock(pVM);
658 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
659 }
660#endif
661 Port = pRange->Core.KeyLast + 1;
662 }
663
664 /* Flush the IO port lookup cache */
665 iomR3FlushCache(pVM);
666
667 /*
668 * Allocate new range record and initialize it.
669 */
670 PIOMIOPORTRANGERC pRange;
671 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
672 if (RT_SUCCESS(rc))
673 {
674 pRange->Core.Key = PortStart;
675 pRange->Core.KeyLast = PortLast;
676 pRange->Port = PortStart;
677 pRange->cPorts = cPorts;
678 pRange->pvUser = pvUser;
679 pRange->pfnOutCallback = pfnOutCallback;
680 pRange->pfnInCallback = pfnInCallback;
681 pRange->pfnOutStrCallback = pfnOutStrCallback;
682 pRange->pfnInStrCallback = pfnInStrCallback;
683 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
684 pRange->pszDesc = pszDesc;
685
686 /*
687 * Insert it.
688 */
689 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
690 {
691 iomUnlock(pVM);
692 return VINF_SUCCESS;
693 }
694
695 /* conflict. */
696 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
697 MMHyperFree(pVM, pRange);
698 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
699 }
700 iomUnlock(pVM);
701 return rc;
702}
703
704
705/**
706 * Registers a Port IO R0 handler.
707 *
708 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
709 * using IOMR3IOPortRegisterR3() before calling this function.
710 *
711 *
712 * @returns VBox status code.
713 *
714 * @param pVM VM handle.
715 * @param pDevIns PDM device instance owning the port range.
716 * @param PortStart First port number in the range.
717 * @param cPorts Number of ports to register.
718 * @param pvUser User argument for the callbacks.
719 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
720 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
721 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
722 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
723 * @param pszDesc Pointer to description string. This must not be freed.
724 */
725VMMR3DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
726 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
727 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
728 const char *pszDesc)
729{
730 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%RHv pfnInCallback=%RHv pfnOutStrCallback=%RHv pfnInStrCallback=%RHv pszDesc=%s\n",
731 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
732
733 /*
734 * Validate input.
735 */
736 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
737 || (RTUINT)PortStart + cPorts > 0x10000)
738 {
739 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
740 return VERR_IOM_INVALID_IOPORT_RANGE;
741 }
742 RTIOPORT PortLast = PortStart + (cPorts - 1);
743 if (!pfnOutCallback && !pfnInCallback)
744 {
745 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
746 return VERR_INVALID_PARAMETER;
747 }
748
749 iomLock(pVM);
750 /*
751 * Validate that there are ring-3 ranges for the ports.
752 */
753 RTIOPORT Port = PortStart;
754 while (Port <= PortLast && Port >= PortStart)
755 {
756 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
757 if (!pRange)
758 {
759 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
760 iomUnlock(pVM);
761 return VERR_IOM_NO_HC_IOPORT_RANGE;
762 }
763#ifndef IOM_NO_PDMINS_CHECKS
764# ifndef IN_RC
765 if (pRange->pDevIns != pDevIns)
766# else
767 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
768# endif
769 {
770 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
771 iomUnlock(pVM);
772 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
773 }
774#endif
775 Port = pRange->Core.KeyLast + 1;
776 }
777
778 /* Flush the IO port lookup cache */
779 iomR3FlushCache(pVM);
780
781 /*
782 * Allocate new range record and initialize it.
783 */
784 PIOMIOPORTRANGER0 pRange;
785 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
786 if (RT_SUCCESS(rc))
787 {
788 pRange->Core.Key = PortStart;
789 pRange->Core.KeyLast = PortLast;
790 pRange->Port = PortStart;
791 pRange->cPorts = cPorts;
792 pRange->pvUser = pvUser;
793 pRange->pfnOutCallback = pfnOutCallback;
794 pRange->pfnInCallback = pfnInCallback;
795 pRange->pfnOutStrCallback = pfnOutStrCallback;
796 pRange->pfnInStrCallback = pfnInStrCallback;
797 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
798 pRange->pszDesc = pszDesc;
799
800 /*
801 * Insert it.
802 */
803 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
804 {
805 iomUnlock(pVM);
806 return VINF_SUCCESS;
807 }
808
809 /* conflict. */
810 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
811 MMHyperFree(pVM, pRange);
812 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
813 }
814 iomUnlock(pVM);
815 return rc;
816}
817
818
819/**
820 * Deregisters a I/O Port range.
821 *
822 * The specified range must be registered using IOMR3IOPortRegister previous to
823 * this call. The range does can be a smaller part of the range specified to
824 * IOMR3IOPortRegister, but it can never be larger.
825 *
826 * This function will remove GC, R0 and R3 context port handlers for this range.
827 *
828 * @returns VBox status code.
829 *
830 * @param pVM The virtual machine.
831 * @param pDevIns The device instance associated with the range.
832 * @param PortStart First port number in the range.
833 * @param cPorts Number of ports to remove starting at PortStart.
834 *
835 * @remark This function mainly for PCI PnP Config and will not do
836 * all the checks you might expect it to do.
837 */
838VMMR3DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
839{
840 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
841
842 /*
843 * Validate input.
844 */
845 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
846 || (RTUINT)PortStart + cPorts > 0x10000)
847 {
848 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
849 return VERR_IOM_INVALID_IOPORT_RANGE;
850 }
851
852 iomLock(pVM);
853
854 /* Flush the IO port lookup cache */
855 iomR3FlushCache(pVM);
856
857 /*
858 * Check ownership.
859 */
860 RTIOPORT PortLast = PortStart + (cPorts - 1);
861 RTIOPORT Port = PortStart;
862 while (Port <= PortLast && Port >= PortStart)
863 {
864 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
865 if (pRange)
866 {
867 Assert(Port <= pRange->Core.KeyLast);
868#ifndef IOM_NO_PDMINS_CHECKS
869 if (pRange->pDevIns != pDevIns)
870 {
871 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
872 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
873 iomUnlock(pVM);
874 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
875 }
876#endif /* !IOM_NO_PDMINS_CHECKS */
877 Port = pRange->Core.KeyLast;
878 }
879 Port++;
880 }
881
882 /*
883 * Remove any RC ranges first.
884 */
885 int rc = VINF_SUCCESS;
886 Port = PortStart;
887 while (Port <= PortLast && Port >= PortStart)
888 {
889 /*
890 * Try find range.
891 */
892 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
893 if (pRange)
894 {
895 if ( pRange->Core.Key == Port
896 && pRange->Core.KeyLast <= PortLast)
897 {
898 /*
899 * Kick out the entire range.
900 */
901 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
902 Assert(pv == (void *)pRange); NOREF(pv);
903 Port += pRange->cPorts;
904 MMHyperFree(pVM, pRange);
905 }
906 else if (pRange->Core.Key == Port)
907 {
908 /*
909 * Cut of the head of the range, done.
910 */
911 pRange->cPorts -= Port - pRange->Port;
912 pRange->Core.Key = Port;
913 pRange->Port = Port;
914 break;
915 }
916 else if (pRange->Core.KeyLast <= PortLast)
917 {
918 /*
919 * Just cut of the tail.
920 */
921 unsigned c = pRange->Core.KeyLast - Port + 1;
922 pRange->Core.KeyLast -= c;
923 pRange->cPorts -= c;
924 Port += c;
925 }
926 else
927 {
928 /*
929 * Split the range, done.
930 */
931 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
932 /* create tail. */
933 PIOMIOPORTRANGERC pRangeNew;
934 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
935 if (RT_FAILURE(rc2))
936 {
937 iomUnlock(pVM);
938 return rc2;
939 }
940 *pRangeNew = *pRange;
941 pRangeNew->Core.Key = PortLast;
942 pRangeNew->Port = PortLast;
943 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
944
945 LogFlow(("IOMR3IOPortDeregister (rc): split the range; new %x\n", pRangeNew->Core.Key));
946
947 /* adjust head */
948 pRange->Core.KeyLast = Port - 1;
949 pRange->cPorts = Port - pRange->Port;
950
951 /* insert */
952 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
953 {
954 AssertMsgFailed(("This cannot happen!\n"));
955 MMHyperFree(pVM, pRangeNew);
956 rc = VERR_INTERNAL_ERROR;
957 }
958 break;
959 }
960 }
961 else /* next port */
962 Port++;
963 } /* for all ports - RC. */
964
965
966 /*
967 * Remove any R0 ranges.
968 */
969 Port = PortStart;
970 while (Port <= PortLast && Port >= PortStart)
971 {
972 /*
973 * Try find range.
974 */
975 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
976 if (pRange)
977 {
978 if ( pRange->Core.Key == Port
979 && pRange->Core.KeyLast <= PortLast)
980 {
981 /*
982 * Kick out the entire range.
983 */
984 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
985 Assert(pv == (void *)pRange); NOREF(pv);
986 Port += pRange->cPorts;
987 MMHyperFree(pVM, pRange);
988 }
989 else if (pRange->Core.Key == Port)
990 {
991 /*
992 * Cut of the head of the range, done.
993 */
994 pRange->cPorts -= Port - pRange->Port;
995 pRange->Core.Key = Port;
996 pRange->Port = Port;
997 break;
998 }
999 else if (pRange->Core.KeyLast <= PortLast)
1000 {
1001 /*
1002 * Just cut of the tail.
1003 */
1004 unsigned c = pRange->Core.KeyLast - Port + 1;
1005 pRange->Core.KeyLast -= c;
1006 pRange->cPorts -= c;
1007 Port += c;
1008 }
1009 else
1010 {
1011 /*
1012 * Split the range, done.
1013 */
1014 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1015 /* create tail. */
1016 PIOMIOPORTRANGER0 pRangeNew;
1017 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1018 if (RT_FAILURE(rc2))
1019 {
1020 iomUnlock(pVM);
1021 return rc2;
1022 }
1023 *pRangeNew = *pRange;
1024 pRangeNew->Core.Key = PortLast;
1025 pRangeNew->Port = PortLast;
1026 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1027
1028 LogFlow(("IOMR3IOPortDeregister (r0): split the range; new %x\n", pRangeNew->Core.Key));
1029
1030 /* adjust head */
1031 pRange->Core.KeyLast = Port - 1;
1032 pRange->cPorts = Port - pRange->Port;
1033
1034 /* insert */
1035 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
1036 {
1037 AssertMsgFailed(("This cannot happen!\n"));
1038 MMHyperFree(pVM, pRangeNew);
1039 rc = VERR_INTERNAL_ERROR;
1040 }
1041 break;
1042 }
1043 }
1044 else /* next port */
1045 Port++;
1046 } /* for all ports - R0. */
1047
1048 /*
1049 * And the same procedure for ring-3 ranges.
1050 */
1051 Port = PortStart;
1052 while (Port <= PortLast && Port >= PortStart)
1053 {
1054 /*
1055 * Try find range.
1056 */
1057 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1058 if (pRange)
1059 {
1060 if ( pRange->Core.Key == Port
1061 && pRange->Core.KeyLast <= PortLast)
1062 {
1063 /*
1064 * Kick out the entire range.
1065 */
1066 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1067 Assert(pv == (void *)pRange); NOREF(pv);
1068 Port += pRange->cPorts;
1069 MMHyperFree(pVM, pRange);
1070 }
1071 else if (pRange->Core.Key == Port)
1072 {
1073 /*
1074 * Cut of the head of the range, done.
1075 */
1076 pRange->cPorts -= Port - pRange->Port;
1077 pRange->Core.Key = Port;
1078 pRange->Port = Port;
1079 break;
1080 }
1081 else if (pRange->Core.KeyLast <= PortLast)
1082 {
1083 /*
1084 * Just cut of the tail.
1085 */
1086 unsigned c = pRange->Core.KeyLast - Port + 1;
1087 pRange->Core.KeyLast -= c;
1088 pRange->cPorts -= c;
1089 Port += c;
1090 }
1091 else
1092 {
1093 /*
1094 * Split the range, done.
1095 */
1096 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1097 /* create tail. */
1098 PIOMIOPORTRANGER3 pRangeNew;
1099 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1100 if (RT_FAILURE(rc2))
1101 {
1102 iomUnlock(pVM);
1103 return rc2;
1104 }
1105 *pRangeNew = *pRange;
1106 pRangeNew->Core.Key = PortLast;
1107 pRangeNew->Port = PortLast;
1108 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1109
1110 LogFlow(("IOMR3IOPortDeregister (r3): split the range; new %x\n", pRangeNew->Core.Key));
1111
1112 /* adjust head */
1113 pRange->Core.KeyLast = Port - 1;
1114 pRange->cPorts = Port - pRange->Port;
1115
1116 /* insert */
1117 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1118 {
1119 AssertMsgFailed(("This cannot happen!\n"));
1120 MMHyperFree(pVM, pRangeNew);
1121 rc = VERR_INTERNAL_ERROR;
1122 }
1123 break;
1124 }
1125 }
1126 else /* next port */
1127 Port++;
1128 } /* for all ports - ring-3. */
1129
1130 /* done */
1131 iomUnlock(pVM);
1132 return rc;
1133}
1134
1135
1136/**
1137 * Dummy Port I/O Handler for IN operations.
1138 *
1139 * @returns VBox status code.
1140 *
1141 * @param pDevIns The device instance.
1142 * @param pvUser User argument.
1143 * @param Port Port number used for the IN operation.
1144 * @param pu32 Where to store the result.
1145 * @param cb Number of bytes read.
1146 */
1147static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1148{
1149 switch (cb)
1150 {
1151 case 1: *pu32 = 0xff; break;
1152 case 2: *pu32 = 0xffff; break;
1153 case 4: *pu32 = UINT32_C(0xffffffff); break;
1154 default:
1155 AssertReleaseMsgFailed(("cb=%d\n", cb));
1156 return VERR_INTERNAL_ERROR;
1157 }
1158 return VINF_SUCCESS;
1159}
1160
1161
1162/**
1163 * Dummy Port I/O Handler for string IN operations.
1164 *
1165 * @returns VBox status code.
1166 *
1167 * @param pDevIns The device instance.
1168 * @param pvUser User argument.
1169 * @param Port Port number used for the string IN operation.
1170 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1171 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1172 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1173 */
1174static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb)
1175{
1176 return VINF_SUCCESS;
1177}
1178
1179
1180/**
1181 * Dummy Port I/O Handler for OUT operations.
1182 *
1183 * @returns VBox status code.
1184 *
1185 * @param pDevIns The device instance.
1186 * @param pvUser User argument.
1187 * @param Port Port number used for the OUT operation.
1188 * @param u32 The value to output.
1189 * @param cb The value size in bytes.
1190 */
1191static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1192{
1193 return VINF_SUCCESS;
1194}
1195
1196
1197/**
1198 * Dummy Port I/O Handler for string OUT operations.
1199 *
1200 * @returns VBox status code.
1201 *
1202 * @param pDevIns The device instance.
1203 * @param pvUser User argument.
1204 * @param Port Port number used for the string OUT operation.
1205 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1206 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1207 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1208 */
1209static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb)
1210{
1211 return VINF_SUCCESS;
1212}
1213
1214
1215/**
1216 * Display a single I/O port ring-3 range.
1217 *
1218 * @returns 0
1219 * @param pNode Pointer to I/O port HC range.
1220 * @param pvUser Pointer to info output callback structure.
1221 */
1222static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1223{
1224 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1225 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1226 pHlp->pfnPrintf(pHlp,
1227 "%04x-%04x %p %p %p %p %s\n",
1228 pRange->Core.Key,
1229 pRange->Core.KeyLast,
1230 pRange->pDevIns,
1231 pRange->pfnInCallback,
1232 pRange->pfnOutCallback,
1233 pRange->pvUser,
1234 pRange->pszDesc);
1235 return 0;
1236}
1237
1238
1239/**
1240 * Display a single I/O port GC range.
1241 *
1242 * @returns 0
1243 * @param pNode Pointer to IOPORT GC range.
1244 * @param pvUser Pointer to info output callback structure.
1245 */
1246static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1247{
1248 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1249 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1250 pHlp->pfnPrintf(pHlp,
1251 "%04x-%04x %RRv %RRv %RRv %RRv %s\n",
1252 pRange->Core.Key,
1253 pRange->Core.KeyLast,
1254 pRange->pDevIns,
1255 pRange->pfnInCallback,
1256 pRange->pfnOutCallback,
1257 pRange->pvUser,
1258 pRange->pszDesc);
1259 return 0;
1260}
1261
1262
1263/**
1264 * Display all registered I/O port ranges.
1265 *
1266 * @param pVM VM Handle.
1267 * @param pHlp The info helpers.
1268 * @param pszArgs Arguments, ignored.
1269 */
1270static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1271{
1272 NOREF(pszArgs);
1273 pHlp->pfnPrintf(pHlp,
1274 "I/O Port R3 ranges (pVM=%p)\n"
1275 "Range %.*s %.*s %.*s %.*s Description\n",
1276 pVM,
1277 sizeof(RTHCPTR) * 2, "pDevIns ",
1278 sizeof(RTHCPTR) * 2, "In ",
1279 sizeof(RTHCPTR) * 2, "Out ",
1280 sizeof(RTHCPTR) * 2, "pvUser ");
1281 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1282
1283 pHlp->pfnPrintf(pHlp,
1284 "I/O Port R0 ranges (pVM=%p)\n"
1285 "Range %.*s %.*s %.*s %.*s Description\n",
1286 pVM,
1287 sizeof(RTHCPTR) * 2, "pDevIns ",
1288 sizeof(RTHCPTR) * 2, "In ",
1289 sizeof(RTHCPTR) * 2, "Out ",
1290 sizeof(RTHCPTR) * 2, "pvUser ");
1291 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1292
1293 pHlp->pfnPrintf(pHlp,
1294 "I/O Port GC ranges (pVM=%p)\n"
1295 "Range %.*s %.*s %.*s %.*s Description\n",
1296 pVM,
1297 sizeof(RTRCPTR) * 2, "pDevIns ",
1298 sizeof(RTRCPTR) * 2, "In ",
1299 sizeof(RTRCPTR) * 2, "Out ",
1300 sizeof(RTRCPTR) * 2, "pvUser ");
1301 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1302
1303 if (pVM->iom.s.pRangeLastReadRC)
1304 {
1305 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastReadRC);
1306 pHlp->pfnPrintf(pHlp, "RC Read Ports: %#04x-%#04x %RRv %s\n",
1307 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastReadRC, pRange->pszDesc);
1308 }
1309 if (pVM->iom.s.pStatsLastReadRC)
1310 {
1311 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastReadRC);
1312 pHlp->pfnPrintf(pHlp, "RC Read Stats: %#04x %RRv\n",
1313 pRange->Core.Key, pVM->iom.s.pStatsLastReadRC);
1314 }
1315
1316 if (pVM->iom.s.pRangeLastWriteRC)
1317 {
1318 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastWriteRC);
1319 pHlp->pfnPrintf(pHlp, "RC Write Ports: %#04x-%#04x %RRv %s\n",
1320 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastWriteRC, pRange->pszDesc);
1321 }
1322 if (pVM->iom.s.pStatsLastWriteRC)
1323 {
1324 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastWriteRC);
1325 pHlp->pfnPrintf(pHlp, "RC Write Stats: %#04x %RRv\n",
1326 pRange->Core.Key, pVM->iom.s.pStatsLastWriteRC);
1327 }
1328
1329 if (pVM->iom.s.pRangeLastReadR3)
1330 {
1331 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastReadR3;
1332 pHlp->pfnPrintf(pHlp, "R3 Read Ports: %#04x-%#04x %p %s\n",
1333 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1334 }
1335 if (pVM->iom.s.pStatsLastReadR3)
1336 {
1337 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR3;
1338 pHlp->pfnPrintf(pHlp, "R3 Read Stats: %#04x %p\n",
1339 pRange->Core.Key, pRange);
1340 }
1341
1342 if (pVM->iom.s.pRangeLastWriteR3)
1343 {
1344 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastWriteR3;
1345 pHlp->pfnPrintf(pHlp, "R3 Write Ports: %#04x-%#04x %p %s\n",
1346 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1347 }
1348 if (pVM->iom.s.pStatsLastWriteR3)
1349 {
1350 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR3;
1351 pHlp->pfnPrintf(pHlp, "R3 Write Stats: %#04x %p\n",
1352 pRange->Core.Key, pRange);
1353 }
1354
1355 if (pVM->iom.s.pRangeLastReadR0)
1356 {
1357 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastReadR0);
1358 pHlp->pfnPrintf(pHlp, "R0 Read Ports: %#04x-%#04x %p %s\n",
1359 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1360 }
1361 if (pVM->iom.s.pStatsLastReadR0)
1362 {
1363 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastReadR0);
1364 pHlp->pfnPrintf(pHlp, "R0 Read Stats: %#04x %p\n",
1365 pRange->Core.Key, pRange);
1366 }
1367
1368 if (pVM->iom.s.pRangeLastWriteR0)
1369 {
1370 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastWriteR0);
1371 pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %p %s\n",
1372 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1373 }
1374 if (pVM->iom.s.pStatsLastWriteR0)
1375 {
1376 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastWriteR0);
1377 pHlp->pfnPrintf(pHlp, "R0 Write Stats: %#04x %p\n",
1378 pRange->Core.Key, pRange);
1379 }
1380}
1381
1382
1383/**
1384 * Registers a Memory Mapped I/O R3 handler.
1385 *
1386 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1387 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1388 *
1389 * @returns VBox status code.
1390 *
1391 * @param pVM VM handle.
1392 * @param pDevIns PDM device instance owning the MMIO range.
1393 * @param GCPhysStart First physical address in the range.
1394 * @param cbRange The size of the range (in bytes).
1395 * @param pvUser User argument for the callbacks.
1396 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1397 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1398 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1399 * @param pszDesc Pointer to description string. This must not be freed.
1400 */
1401VMMR3DECL(int) IOMR3MMIORegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1402 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1403 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, const char *pszDesc)
1404{
1405 LogFlow(("IOMR3MMIORegisterR3: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x pszDesc=%s\n",
1406 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, pszDesc));
1407 int rc;
1408
1409 /*
1410 * Validate input.
1411 */
1412 if (GCPhysStart + (cbRange - 1) < GCPhysStart)
1413 {
1414 AssertMsgFailed(("Wrapped! %RGp %#x bytes\n", GCPhysStart, cbRange));
1415 return VERR_IOM_INVALID_MMIO_RANGE;
1416 }
1417 /** @todo implement per-device locks for MMIO access. */
1418 AssertReturn(!pDevIns->pCritSectR3, VERR_INTERNAL_ERROR_2);
1419
1420 /*
1421 * Resolve the GC/R0 handler addresses lazily because of init order.
1422 */
1423 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)
1424 {
1425 rc = PDMR3LdrGetSymbolRCLazy(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);
1426 AssertLogRelRCReturn(rc, rc);
1427 rc = PDMR3LdrGetSymbolR0Lazy(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);
1428 AssertLogRelRCReturn(rc, rc);
1429 }
1430
1431 /*
1432 * For the 2nd+ instance, mangle the description string so it's unique.
1433 * (PGM requires this.)
1434 */
1435 if (pDevIns->iInstance > 0) /** @todo Move to PDMDevHlp.cpp and use a string cache. */
1436 {
1437 pszDesc = MMR3HeapAPrintf(pVM, MM_TAG_IOM, "%s [%u]", pszDesc, pDevIns->iInstance);
1438 if (!pszDesc)
1439 return VERR_NO_MEMORY;
1440 }
1441
1442
1443 /*
1444 * Allocate new range record and initialize it.
1445 */
1446 PIOMMMIORANGE pRange;
1447 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1448 if (RT_SUCCESS(rc))
1449 {
1450 pRange->Core.Key = GCPhysStart;
1451 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1452 pRange->GCPhys = GCPhysStart;
1453 pRange->cb = cbRange;
1454 pRange->pszDesc = pszDesc;
1455
1456 pRange->pvUserR3 = pvUser;
1457 pRange->pDevInsR3 = pDevIns;
1458 pRange->pfnReadCallbackR3 = pfnReadCallback;
1459 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1460 pRange->pfnFillCallbackR3 = pfnFillCallback;
1461
1462 //pRange->pvUserR0 = NIL_RTR0PTR;
1463 //pRange->pDevInsR0 = NIL_RTR0PTR;
1464 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1465 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1466 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1467
1468 //pRange->pvUserRC = NIL_RTRCPTR;
1469 //pRange->pDevInsRC = NIL_RTRCPTR;
1470 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1471 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1472 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1473
1474 /*
1475 * Try register it with PGM and then insert it into the tree.
1476 */
1477 iomLock(pVM);
1478 iomR3FlushCache(pVM);
1479 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange,
1480 IOMR3MMIOHandler, pRange,
1481 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange),
1482 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc);
1483 if (RT_SUCCESS(rc))
1484 {
1485 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1486 {
1487 iomUnlock(pVM);
1488 return VINF_SUCCESS;
1489 }
1490
1491 /* bail out */
1492 iomUnlock(pVM);
1493 DBGFR3Info(pVM, "mmio", NULL, NULL);
1494 AssertMsgFailed(("This cannot happen!\n"));
1495 rc = VERR_INTERNAL_ERROR;
1496 }
1497 else
1498 iomUnlock(pVM);
1499
1500 MMHyperFree(pVM, pRange);
1501 }
1502 if (pDevIns->iInstance > 0)
1503 MMR3HeapFree((void *)pszDesc);
1504 return rc;
1505}
1506
1507
1508/**
1509 * Registers a Memory Mapped I/O RC handler range.
1510 *
1511 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1512 * using IOMMMIORegisterR3() before calling this function.
1513 *
1514 *
1515 * @returns VBox status code.
1516 *
1517 * @param pVM VM handle.
1518 * @param pDevIns PDM device instance owning the MMIO range.
1519 * @param GCPhysStart First physical address in the range.
1520 * @param cbRange The size of the range (in bytes).
1521 * @param pvUser User argument for the callbacks.
1522 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1523 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1524 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1525 */
1526VMMR3DECL(int) IOMR3MMIORegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1527 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1528 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1529{
1530 LogFlow(("IOMR3MMIORegisterRC: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1531 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1532
1533 /*
1534 * Validate input.
1535 */
1536 if (!pfnWriteCallback && !pfnReadCallback)
1537 {
1538 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1539 return VERR_INVALID_PARAMETER;
1540 }
1541
1542 /*
1543 * Find the MMIO range and check that the input matches.
1544 */
1545 iomLock(pVM);
1546 PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhysStart);
1547 AssertReturnStmt(pRange, iomUnlock(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1548 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, iomUnlock(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1549 AssertReturnStmt(pRange->GCPhys == GCPhysStart, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1550 AssertReturnStmt(pRange->cb == cbRange, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1551
1552 pRange->pvUserRC = pvUser;
1553 pRange->pfnReadCallbackRC = pfnReadCallback;
1554 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1555 pRange->pfnFillCallbackRC = pfnFillCallback;
1556 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1557 iomUnlock(pVM);
1558
1559 return VINF_SUCCESS;
1560}
1561
1562
1563/**
1564 * Registers a Memory Mapped I/O R0 handler range.
1565 *
1566 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1567 * using IOMMR3MIORegisterHC() before calling this function.
1568 *
1569 *
1570 * @returns VBox status code.
1571 *
1572 * @param pVM VM handle.
1573 * @param pDevIns PDM device instance owning the MMIO range.
1574 * @param GCPhysStart First physical address in the range.
1575 * @param cbRange The size of the range (in bytes).
1576 * @param pvUser User argument for the callbacks.
1577 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1578 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1579 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1580 */
1581VMMR3DECL(int) IOMR3MMIORegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1582 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1583 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1584 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1585{
1586 LogFlow(("IOMR3MMIORegisterR0: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1587 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1588
1589 /*
1590 * Validate input.
1591 */
1592 if (!pfnWriteCallback && !pfnReadCallback)
1593 {
1594 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1595 return VERR_INVALID_PARAMETER;
1596 }
1597
1598 /*
1599 * Find the MMIO range and check that the input matches.
1600 */
1601 iomLock(pVM);
1602 PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhysStart);
1603 AssertReturnStmt(pRange, iomUnlock(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1604 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, iomUnlock(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1605 AssertReturnStmt(pRange->GCPhys == GCPhysStart, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1606 AssertReturnStmt(pRange->cb == cbRange, iomUnlock(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1607
1608 pRange->pvUserR0 = pvUser;
1609 pRange->pfnReadCallbackR0 = pfnReadCallback;
1610 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1611 pRange->pfnFillCallbackR0 = pfnFillCallback;
1612 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1613 iomUnlock(pVM);
1614
1615 return VINF_SUCCESS;
1616}
1617
1618
1619/**
1620 * Deregisters a Memory Mapped I/O handler range.
1621 *
1622 * Registered GC, R0, and R3 ranges are affected.
1623 *
1624 * @returns VBox status code.
1625 *
1626 * @param pVM The virtual machine.
1627 * @param pDevIns Device instance which the MMIO region is registered.
1628 * @param GCPhysStart First physical address (GC) in the range.
1629 * @param cbRange Number of bytes to deregister.
1630 *
1631 * @remark This function mainly for PCI PnP Config and will not do
1632 * all the checks you might expect it to do.
1633 */
1634VMMR3DECL(int) IOMR3MMIODeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
1635{
1636 LogFlow(("IOMR3MMIODeregister: pDevIns=%p GCPhysStart=%RGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1637
1638 /*
1639 * Validate input.
1640 */
1641 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1642 if (GCPhysLast < GCPhysStart)
1643 {
1644 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1645 return VERR_IOM_INVALID_MMIO_RANGE;
1646 }
1647
1648 iomLock(pVM);
1649
1650 /*
1651 * Check ownership and such for the entire area.
1652 */
1653 RTGCPHYS GCPhys = GCPhysStart;
1654 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1655 {
1656 PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhys);
1657 if (!pRange)
1658 {
1659 iomUnlock(pVM);
1660 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1661 }
1662 AssertMsgReturnStmt(pRange->pDevInsR3 == pDevIns,
1663 ("Not owner! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1664 iomUnlock(pVM),
1665 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1666 AssertMsgReturnStmt(pRange->Core.KeyLast <= GCPhysLast,
1667 ("Incomplete R3 range! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1668 iomUnlock(pVM),
1669 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1670
1671 /* next */
1672 Assert(GCPhys <= pRange->Core.KeyLast);
1673 GCPhys = pRange->Core.KeyLast + 1;
1674 }
1675
1676 /*
1677 * Do the actual removing of the MMIO ranges.
1678 */
1679 GCPhys = GCPhysStart;
1680 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1681 {
1682 iomR3FlushCache(pVM);
1683
1684 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1685 Assert(pRange);
1686 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1687 iomUnlock(pVM);
1688
1689 /* remove it from PGM */
1690 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1691 AssertRC(rc);
1692
1693 iomLock(pVM);
1694
1695 /* advance and free. */
1696 GCPhys = pRange->Core.KeyLast + 1;
1697 if (pDevIns->iInstance > 0)
1698 MMR3HeapFree((void *)pRange->pszDesc);
1699 MMHyperFree(pVM, pRange);
1700 }
1701
1702 iomUnlock(pVM);
1703 return VINF_SUCCESS;
1704}
1705
1706
1707/**
1708 * Release the IOM lock if owned by the current VCPU
1709 *
1710 * @param pVM The VM to operate on.
1711 */
1712VMMR3DECL(void) IOMR3ReleaseOwnedLocks(PVM pVM)
1713{
1714 while (PDMCritSectIsOwner(&pVM->iom.s.EmtLock))
1715 PDMCritSectLeave(&pVM->iom.s.EmtLock);
1716}
1717
1718
1719/**
1720 * For TM only!
1721 *
1722 * @returns Pointer to the critical section.
1723 * @param pVM The VM handle.
1724 */
1725VMMR3DECL(PPDMCRITSECT) IOMR3GetCritSect(PVM pVM)
1726{
1727 return &pVM->iom.s.EmtLock;
1728}
1729
1730
1731/**
1732 * Display a single MMIO range.
1733 *
1734 * @returns 0
1735 * @param pNode Pointer to MMIO R3 range.
1736 * @param pvUser Pointer to info output callback structure.
1737 */
1738static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1739{
1740 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1741 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1742 pHlp->pfnPrintf(pHlp,
1743 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1744 pRange->Core.Key,
1745 pRange->Core.KeyLast,
1746 pRange->pDevInsR3,
1747 pRange->pfnReadCallbackR3,
1748 pRange->pfnWriteCallbackR3,
1749 pRange->pfnFillCallbackR3,
1750 pRange->pvUserR3,
1751 pRange->pszDesc);
1752 pHlp->pfnPrintf(pHlp,
1753 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1754 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1755 pRange->pDevInsR0,
1756 pRange->pfnReadCallbackR0,
1757 pRange->pfnWriteCallbackR0,
1758 pRange->pfnFillCallbackR0,
1759 pRange->pvUserR0);
1760 pHlp->pfnPrintf(pHlp,
1761 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1762 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1763 pRange->pDevInsRC,
1764 pRange->pfnReadCallbackRC,
1765 pRange->pfnWriteCallbackRC,
1766 pRange->pfnFillCallbackRC,
1767 pRange->pvUserRC);
1768 return 0;
1769}
1770
1771
1772/**
1773 * Display registered MMIO ranges to the log.
1774 *
1775 * @param pVM VM Handle.
1776 * @param pHlp The info helpers.
1777 * @param pszArgs Arguments, ignored.
1778 */
1779static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1780{
1781 NOREF(pszArgs);
1782 pHlp->pfnPrintf(pHlp,
1783 "MMIO ranges (pVM=%p)\n"
1784 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1785 pVM,
1786 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1787 sizeof(RTHCPTR) * 2, "pDevIns ",
1788 sizeof(RTHCPTR) * 2, "Read ",
1789 sizeof(RTHCPTR) * 2, "Write ",
1790 sizeof(RTHCPTR) * 2, "Fill ",
1791 sizeof(RTHCPTR) * 2, "pvUser ",
1792 "Description");
1793 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1794}
1795
1796
1797#ifdef VBOX_WITH_STATISTICS
1798/**
1799 * Tries to come up with the standard name for a port.
1800 *
1801 * @returns Pointer to readonly string if known.
1802 * @returns NULL if unknown port number.
1803 *
1804 * @param Port The port to name.
1805 */
1806static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1807{
1808 switch (Port)
1809 {
1810 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1811 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1812 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1813 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1814 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1815 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1816 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1817 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1818 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1819 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1820 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1821 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1822 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1823 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1824 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1825 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1826
1827 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1828 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1829 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1830 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1831 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1832 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1833 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1834 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1835 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1836 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1837 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1838 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1839 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1840 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1841 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1842 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1843 return "System Reserved";
1844
1845 case 0x60:
1846 case 0x64:
1847 return "Keyboard & Mouse";
1848
1849 case 0x378:
1850 case 0x379:
1851 case 0x37a:
1852 case 0x37b:
1853 case 0x37c:
1854 case 0x37d:
1855 case 0x37e:
1856 case 0x37f:
1857 case 0x3bc:
1858 case 0x3bd:
1859 case 0x3be:
1860 case 0x3bf:
1861 case 0x278:
1862 case 0x279:
1863 case 0x27a:
1864 case 0x27b:
1865 case 0x27c:
1866 case 0x27d:
1867 case 0x27e:
1868 case 0x27f:
1869 return "LPT1/2/3";
1870
1871 case 0x3f8:
1872 case 0x3f9:
1873 case 0x3fa:
1874 case 0x3fb:
1875 case 0x3fc:
1876 case 0x3fd:
1877 case 0x3fe:
1878 case 0x3ff:
1879 return "COM1";
1880
1881 case 0x2f8:
1882 case 0x2f9:
1883 case 0x2fa:
1884 case 0x2fb:
1885 case 0x2fc:
1886 case 0x2fd:
1887 case 0x2fe:
1888 case 0x2ff:
1889 return "COM2";
1890
1891 case 0x3e8:
1892 case 0x3e9:
1893 case 0x3ea:
1894 case 0x3eb:
1895 case 0x3ec:
1896 case 0x3ed:
1897 case 0x3ee:
1898 case 0x3ef:
1899 return "COM3";
1900
1901 case 0x2e8:
1902 case 0x2e9:
1903 case 0x2ea:
1904 case 0x2eb:
1905 case 0x2ec:
1906 case 0x2ed:
1907 case 0x2ee:
1908 case 0x2ef:
1909 return "COM4";
1910
1911 case 0x200:
1912 case 0x201:
1913 case 0x202:
1914 case 0x203:
1915 case 0x204:
1916 case 0x205:
1917 case 0x206:
1918 case 0x207:
1919 return "Joystick";
1920
1921 case 0x3f0:
1922 case 0x3f1:
1923 case 0x3f2:
1924 case 0x3f3:
1925 case 0x3f4:
1926 case 0x3f5:
1927 case 0x3f6:
1928 case 0x3f7:
1929 return "Floppy";
1930
1931 case 0x1f0:
1932 case 0x1f1:
1933 case 0x1f2:
1934 case 0x1f3:
1935 case 0x1f4:
1936 case 0x1f5:
1937 case 0x1f6:
1938 case 0x1f7:
1939 //case 0x3f6:
1940 //case 0x3f7:
1941 return "IDE 1st";
1942
1943 case 0x170:
1944 case 0x171:
1945 case 0x172:
1946 case 0x173:
1947 case 0x174:
1948 case 0x175:
1949 case 0x176:
1950 case 0x177:
1951 case 0x376:
1952 case 0x377:
1953 return "IDE 2nd";
1954
1955 case 0x1e0:
1956 case 0x1e1:
1957 case 0x1e2:
1958 case 0x1e3:
1959 case 0x1e4:
1960 case 0x1e5:
1961 case 0x1e6:
1962 case 0x1e7:
1963 case 0x3e6:
1964 case 0x3e7:
1965 return "IDE 3rd";
1966
1967 case 0x160:
1968 case 0x161:
1969 case 0x162:
1970 case 0x163:
1971 case 0x164:
1972 case 0x165:
1973 case 0x166:
1974 case 0x167:
1975 case 0x366:
1976 case 0x367:
1977 return "IDE 4th";
1978
1979 case 0x130: case 0x140: case 0x150:
1980 case 0x131: case 0x141: case 0x151:
1981 case 0x132: case 0x142: case 0x152:
1982 case 0x133: case 0x143: case 0x153:
1983 case 0x134: case 0x144: case 0x154:
1984 case 0x135: case 0x145: case 0x155:
1985 case 0x136: case 0x146: case 0x156:
1986 case 0x137: case 0x147: case 0x157:
1987 case 0x138: case 0x148: case 0x158:
1988 case 0x139: case 0x149: case 0x159:
1989 case 0x13a: case 0x14a: case 0x15a:
1990 case 0x13b: case 0x14b: case 0x15b:
1991 case 0x13c: case 0x14c: case 0x15c:
1992 case 0x13d: case 0x14d: case 0x15d:
1993 case 0x13e: case 0x14e: case 0x15e:
1994 case 0x13f: case 0x14f: case 0x15f:
1995 case 0x220: case 0x230:
1996 case 0x221: case 0x231:
1997 case 0x222: case 0x232:
1998 case 0x223: case 0x233:
1999 case 0x224: case 0x234:
2000 case 0x225: case 0x235:
2001 case 0x226: case 0x236:
2002 case 0x227: case 0x237:
2003 case 0x228: case 0x238:
2004 case 0x229: case 0x239:
2005 case 0x22a: case 0x23a:
2006 case 0x22b: case 0x23b:
2007 case 0x22c: case 0x23c:
2008 case 0x22d: case 0x23d:
2009 case 0x22e: case 0x23e:
2010 case 0x22f: case 0x23f:
2011 case 0x330: case 0x340: case 0x350:
2012 case 0x331: case 0x341: case 0x351:
2013 case 0x332: case 0x342: case 0x352:
2014 case 0x333: case 0x343: case 0x353:
2015 case 0x334: case 0x344: case 0x354:
2016 case 0x335: case 0x345: case 0x355:
2017 case 0x336: case 0x346: case 0x356:
2018 case 0x337: case 0x347: case 0x357:
2019 case 0x338: case 0x348: case 0x358:
2020 case 0x339: case 0x349: case 0x359:
2021 case 0x33a: case 0x34a: case 0x35a:
2022 case 0x33b: case 0x34b: case 0x35b:
2023 case 0x33c: case 0x34c: case 0x35c:
2024 case 0x33d: case 0x34d: case 0x35d:
2025 case 0x33e: case 0x34e: case 0x35e:
2026 case 0x33f: case 0x34f: case 0x35f:
2027 return "SCSI (typically)";
2028
2029 case 0x320:
2030 case 0x321:
2031 case 0x322:
2032 case 0x323:
2033 case 0x324:
2034 case 0x325:
2035 case 0x326:
2036 case 0x327:
2037 return "XT HD";
2038
2039 case 0x3b0:
2040 case 0x3b1:
2041 case 0x3b2:
2042 case 0x3b3:
2043 case 0x3b4:
2044 case 0x3b5:
2045 case 0x3b6:
2046 case 0x3b7:
2047 case 0x3b8:
2048 case 0x3b9:
2049 case 0x3ba:
2050 case 0x3bb:
2051 return "VGA";
2052
2053 case 0x3c0: case 0x3d0:
2054 case 0x3c1: case 0x3d1:
2055 case 0x3c2: case 0x3d2:
2056 case 0x3c3: case 0x3d3:
2057 case 0x3c4: case 0x3d4:
2058 case 0x3c5: case 0x3d5:
2059 case 0x3c6: case 0x3d6:
2060 case 0x3c7: case 0x3d7:
2061 case 0x3c8: case 0x3d8:
2062 case 0x3c9: case 0x3d9:
2063 case 0x3ca: case 0x3da:
2064 case 0x3cb: case 0x3db:
2065 case 0x3cc: case 0x3dc:
2066 case 0x3cd: case 0x3dd:
2067 case 0x3ce: case 0x3de:
2068 case 0x3cf: case 0x3df:
2069 return "VGA/EGA";
2070
2071 case 0x240: case 0x260: case 0x280:
2072 case 0x241: case 0x261: case 0x281:
2073 case 0x242: case 0x262: case 0x282:
2074 case 0x243: case 0x263: case 0x283:
2075 case 0x244: case 0x264: case 0x284:
2076 case 0x245: case 0x265: case 0x285:
2077 case 0x246: case 0x266: case 0x286:
2078 case 0x247: case 0x267: case 0x287:
2079 case 0x248: case 0x268: case 0x288:
2080 case 0x249: case 0x269: case 0x289:
2081 case 0x24a: case 0x26a: case 0x28a:
2082 case 0x24b: case 0x26b: case 0x28b:
2083 case 0x24c: case 0x26c: case 0x28c:
2084 case 0x24d: case 0x26d: case 0x28d:
2085 case 0x24e: case 0x26e: case 0x28e:
2086 case 0x24f: case 0x26f: case 0x28f:
2087 case 0x300:
2088 case 0x301:
2089 case 0x388:
2090 case 0x389:
2091 case 0x38a:
2092 case 0x38b:
2093 return "Sound Card (typically)";
2094
2095 default:
2096 return NULL;
2097 }
2098}
2099#endif /* VBOX_WITH_STATISTICS */
2100
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