VirtualBox

source: vbox/trunk/src/VBox/VMM/IOM.cpp@ 552

Last change on this file since 552 was 23, checked in by vboxsync, 18 years ago

string.h & stdio.h + header cleanups.

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1/* $Id: IOM.cpp 23 2007-01-15 14:08:28Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006 InnoTek Systemberatung GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22
23/** @page pg_iom IOM - The Input/Output Monitor
24 *
25 * The input/output monitor will handle I/O exceptions routing them to the
26 * appropriate device. It implements an API to register and deregister
27 * virtual port I/O handler and memory mapped I/O handlers. A handler is
28 * PDM devices and a set of callback functions.
29 *
30 * Port I/O (PIO) is easily trapped by ensuring IOPL is 0, thus causing \#GP(0) on
31 * any access to I/O ports. Using the dissassembler (DIS) the faulting
32 * instruction will be interpreted determing the port and if there is a handler
33 * for it. If a handler exists it will be called, else default action will be
34 * performed.
35 *
36 * Memory Mapped I/O (MMIO) is gonna be worse since there are numerous instructions
37 * which can access memory. I'm afraid we might have to emulate each
38 * instruction which faults. The Execution Monitor (EM) will provide facilities
39 * for doing this using DIS.
40 *
41 * Emulating I/O port access is less complex and sligtly faster than emulating MMIO,
42 * so in most cases we should encourage the OS to use PIO. Devices which are freqently
43 * accessed should register GC handlers to speed up execution.
44 *
45 */
46
47
48/*******************************************************************************
49* Header Files *
50*******************************************************************************/
51#define LOG_GROUP LOG_GROUP_IOM
52#include <VBox/iom.h>
53#include <VBox/cpum.h>
54#include <VBox/pgm.h>
55#include <VBox/sup.h>
56#include <VBox/mm.h>
57#include <VBox/stam.h>
58#include <VBox/dbgf.h>
59#include "IOMInternal.h"
60#include <VBox/vm.h>
61
62#include <VBox/param.h>
63#include <iprt/assert.h>
64#include <iprt/alloc.h>
65#include <iprt/string.h>
66#include <VBox/log.h>
67#include <VBox/err.h>
68
69
70/*******************************************************************************
71* Internal Functions *
72*******************************************************************************/
73static DECLCALLBACK(int) iomr3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
74static DECLCALLBACK(int) iomr3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
75static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
76static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
77static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
78static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
79static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, unsigned *pcTransfer, unsigned cb);
80static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, unsigned *pcTransfer, unsigned cb);
81
82#ifdef VBOX_WITH_STATISTICS
83static const char *iomr3IOPortGetStandardName(RTIOPORT Port);
84#endif
85
86
87/**
88 * Initializes the IOM.
89 *
90 * @returns VBox status code.
91 * @param pVM The VM to operate on.
92 */
93IOMR3DECL(int) IOMR3Init(PVM pVM)
94{
95 LogFlow(("IOMR3Init:\n"));
96
97 /*
98 * Assert alignment and sizes.
99 */
100 AssertRelease(!(RT_OFFSETOF(VM, iom.s) & 31));
101 AssertRelease(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
102
103 /*
104 * Setup any fixed pointers and offsets.
105 */
106 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
107
108 /*
109 * Allocate the trees structure.
110 */
111 int rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesHC), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesHC);
112 if (VBOX_SUCCESS(rc))
113 {
114 pVM->iom.s.pTreesGC = MMHyperHC2GC(pVM, pVM->iom.s.pTreesHC);
115
116 /*
117 * Info.
118 */
119 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
120 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
121
122 /*
123 * Statistics.
124 */
125 STAM_REG(pVM, &pVM->iom.s.StatGCMMIOHandler, STAMTYPE_PROFILE, "/IOM/GC/MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMGCMMIOHandler() body, only success calls.");
126 STAM_REG(pVM, &pVM->iom.s.StatGCMMIOFailures, STAMTYPE_COUNTER, "/IOM/GC/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMGCMMIOHandler() didn't service the request.");
127 STAM_REG(pVM, &pVM->iom.s.StatGCInstMov, STAMTYPE_PROFILE, "/IOM/GC/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
128 STAM_REG(pVM, &pVM->iom.s.StatGCInstCmp, STAMTYPE_PROFILE, "/IOM/GC/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
129 STAM_REG(pVM, &pVM->iom.s.StatGCInstAnd, STAMTYPE_PROFILE, "/IOM/GC/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
130 STAM_REG(pVM, &pVM->iom.s.StatGCInstTest, STAMTYPE_PROFILE, "/IOM/GC/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
131 STAM_REG(pVM, &pVM->iom.s.StatGCInstXchg, STAMTYPE_PROFILE, "/IOM/GC/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
132 STAM_REG(pVM, &pVM->iom.s.StatGCInstStos, STAMTYPE_PROFILE, "/IOM/GC/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
133 STAM_REG(pVM, &pVM->iom.s.StatGCInstLods, STAMTYPE_PROFILE, "/IOM/GC/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
134 STAM_REG(pVM, &pVM->iom.s.StatGCInstMovs, STAMTYPE_PROFILE, "/IOM/GC/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
135 STAM_REG(pVM, &pVM->iom.s.StatGCInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/GC/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
136 STAM_REG(pVM, &pVM->iom.s.StatGCInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/GC/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
137 STAM_REG(pVM, &pVM->iom.s.StatGCInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/GC/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
138 STAM_REG(pVM, &pVM->iom.s.StatGCInstOther, STAMTYPE_COUNTER, "/IOM/GC/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
139 STAM_REG(pVM, &pVM->iom.s.StatGCMMIO1Byte, STAMTYPE_COUNTER, "/IOM/GC/MMIO/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
140 STAM_REG(pVM, &pVM->iom.s.StatGCMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/GC/MMIO/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
141 STAM_REG(pVM, &pVM->iom.s.StatGCMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/GC/MMIO/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
142 STAM_REG(pVM, &pVM->iom.s.StatGCIOPortHandler, STAMTYPE_PROFILE, "/IOM/GC/PortIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMGCPortIOHandler() body, only success calls.");
143 STAM_REG(pVM, &pVM->iom.s.StatGCInstIn, STAMTYPE_COUNTER, "/IOM/GC/Inst/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
144 STAM_REG(pVM, &pVM->iom.s.StatGCInstOut, STAMTYPE_COUNTER, "/IOM/GC/Inst/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
145 STAM_REG(pVM, &pVM->iom.s.StatGCInstIns, STAMTYPE_COUNTER, "/IOM/GC/Inst/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
146 STAM_REG(pVM, &pVM->iom.s.StatGCInstOuts, STAMTYPE_COUNTER, "/IOM/GC/Inst/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
147 }
148
149 /* Redundant, but just in case we change something in the future */
150 IOMFlushCache(pVM);
151
152 LogFlow(("IOMR3Init: returns %Vrc\n", rc));
153 return rc;
154}
155
156
157/**
158 * The VM is being reset.
159 *
160 * @param pVM VM handle.
161 */
162IOMR3DECL(void) IOMR3Reset(PVM pVM)
163{
164 IOMFlushCache(pVM);
165}
166
167
168/**
169 * Applies relocations to data and code managed by this
170 * component. This function will be called at init and
171 * whenever the VMM need to relocate it self inside the GC.
172 *
173 * The IOM will update the addresses used by the switcher.
174 *
175 * @param pVM The VM.
176 * @param offDelta Relocation delta relative to old location.
177 */
178IOMR3DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
179{
180 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
181
182 /*
183 * Apply relocations to the GC callbacks.
184 */
185 pVM->iom.s.pTreesGC = MMHyperHC2GC(pVM, pVM->iom.s.pTreesHC);
186 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesHC->IOPortTreeGC, true, iomr3RelocateIOPortCallback, &offDelta);
187 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesHC->MMIOTreeGC, true, iomr3RelocateMMIOCallback, &offDelta);
188
189 /*
190 * Apply relocations to the cached GC handlers
191 */
192 if (pVM->iom.s.pRangeLastReadGC)
193 pVM->iom.s.pRangeLastReadGC += offDelta;
194 if (pVM->iom.s.pRangeLastWriteGC)
195 pVM->iom.s.pRangeLastWriteGC += offDelta;
196 if (pVM->iom.s.pStatsLastReadGC)
197 pVM->iom.s.pStatsLastReadGC += offDelta;
198 if (pVM->iom.s.pStatsLastWriteGC)
199 pVM->iom.s.pStatsLastWriteGC += offDelta;
200}
201
202
203/**
204 * Callback function for relocating a I/O port range.
205 *
206 * @returns 0 (continue enum)
207 * @param pNode Pointer to a IOMIOPORTRANGEGC node.
208 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
209 * not certain the delta will fit in a void pointer for all possible configs.
210 */
211static DECLCALLBACK(int) iomr3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
212{
213 PIOMIOPORTRANGEGC pRange = (PIOMIOPORTRANGEGC)pNode;
214 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
215
216 Assert(pRange->pDevIns);
217 pRange->pDevIns += offDelta;
218 if (pRange->pfnOutCallback)
219 pRange->pfnOutCallback += offDelta;
220 if (pRange->pfnInCallback)
221 pRange->pfnInCallback += offDelta;
222 if (pRange->pfnOutStrCallback)
223 pRange->pfnOutStrCallback += offDelta;
224 if (pRange->pfnInStrCallback)
225 pRange->pfnInStrCallback += offDelta;
226 /** @todo IOMIOPORTRANGEGC::pvUser hack - relocate if 64KB or higher. This hack should be removed! */
227 if (pRange->pvUser > _64K)
228 pRange->pvUser += offDelta;
229 return 0;
230}
231
232
233/**
234 * Callback function for relocating a MMIO range.
235 *
236 * @returns 0 (continue enum)
237 * @param pNode Pointer to a IOMMMIORANGEGC node.
238 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
239 * not certain the delta will fit in a void pointer for all possible configs.
240 */
241static DECLCALLBACK(int) iomr3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
242{
243 PIOMMMIORANGEGC pRange = (PIOMMMIORANGEGC)pNode;
244 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
245
246 Assert(pRange->pDevIns);
247 pRange->pDevIns += offDelta;
248
249 if (pRange->pfnWriteCallback)
250 pRange->pfnWriteCallback += offDelta;
251 if (pRange->pfnReadCallback)
252 pRange->pfnReadCallback += offDelta;
253 if (pRange->pfnFillCallback)
254 pRange->pfnFillCallback += offDelta;
255 /** @todo IOMMMIORANGEGC::pvUser hack - relocate if 64KB or higher. This hack should be removed! */
256 if (pRange->pvUser > _64K)
257 pRange->pvUser += offDelta;
258 return 0;
259}
260
261
262/**
263 * Terminates the IOM.
264 *
265 * Termination means cleaning up and freeing all resources,
266 * the VM it self is at this point powered off or suspended.
267 *
268 * @returns VBox status code.
269 * @param pVM The VM to operate on.
270 */
271IOMR3DECL(int) IOMR3Term(PVM pVM)
272{
273 /*
274 * IOM is not owning anything but automatically freed resources,
275 * so there's nothing to do here.
276 */
277 return VINF_SUCCESS;
278}
279
280
281#ifdef VBOX_WITH_STATISTICS
282/**
283 * Create the statistics node for an I/O port.
284 *
285 * @returns Pointer to new stats node.
286 *
287 * @param pVM VM handle.
288 * @param Port Port.
289 * @param pszDesc Description.
290 */
291PIOMIOPORTSTATS iomr3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
292{
293 /* check if it already exists. */
294 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesHC->IOPortStatTree, Port);
295 if (pPort)
296 return pPort;
297
298 /* allocate stats node. */
299 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
300 AssertRC(rc);
301 if (VBOX_SUCCESS(rc))
302 {
303 /* insert into the tree. */
304 pPort->Core.Key = Port;
305 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesHC->IOPortStatTree, &pPort->Core))
306 {
307 /* put a name on common ports. */
308 if (!pszDesc)
309 pszDesc = iomr3IOPortGetStandardName(Port);
310
311 /* register the statistics counters. */
312 char szName[64];
313 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-R3", Port);
314 rc = STAMR3Register(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
315 AssertRC(rc);
316
317 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-R3", Port);
318 rc = STAMR3Register(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
319 AssertRC(rc);
320
321 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-GC", Port);
322 rc = STAMR3Register(pVM, &pPort->InGC, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
323 AssertRC(rc);
324
325 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-GC", Port);
326 rc = STAMR3Register(pVM, &pPort->OutGC, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
327 AssertRC(rc);
328
329 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-GC-2-R3", Port);
330 rc = STAMR3Register(pVM, &pPort->InGCToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
331 AssertRC(rc);
332
333 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-GC-2-R3", Port);
334 rc = STAMR3Register(pVM, &pPort->OutGCToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
335 AssertRC(rc);
336
337 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-R0", Port);
338 rc = STAMR3Register(pVM, &pPort->InR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
339 AssertRC(rc);
340
341 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-R0", Port);
342 rc = STAMR3Register(pVM, &pPort->OutR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
343 AssertRC(rc);
344
345 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-R0-2-R3", Port);
346 rc = STAMR3Register(pVM, &pPort->InR0ToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
347 AssertRC(rc);
348
349 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-R0-2-R3", Port);
350 rc = STAMR3Register(pVM, &pPort->OutR0ToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
351 AssertRC(rc);
352
353 return pPort;
354 }
355 AssertMsgFailed(("what! Port=%d\n", Port));
356 MMHyperFree(pVM, pPort);
357 }
358 return NULL;
359}
360
361
362/**
363 * Create the statistics node for an MMIO address.
364 *
365 * @returns Pointer to new stats node.
366 *
367 * @param pVM VM handle.
368 * @param GCPhys The address.
369 * @param pszDesc Description.
370 */
371PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
372{
373 /* check if it already exists. */
374 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesHC->MMIOStatTree, GCPhys);
375 if (pStats)
376 return pStats;
377#if 1
378 /* allocate stats node. */
379 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
380 AssertRC(rc);
381 if (VBOX_SUCCESS(rc))
382 {
383 /* insert into the tree. */
384 pStats->Core.Key = GCPhys;
385 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesHC->MMIOStatTree, &pStats->Core))
386 {
387 /* register the statistics counters. */
388 char szName[64];
389 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-R3", GCPhys);
390 rc = STAMR3Register(pVM, &pStats->ReadR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
391 AssertRC(rc);
392
393 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-R3", GCPhys);
394 rc = STAMR3Register(pVM, &pStats->WriteR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
395 AssertRC(rc);
396
397 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-GC", GCPhys);
398 rc = STAMR3Register(pVM, &pStats->ReadGC, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
399 AssertRC(rc);
400
401 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-GC", GCPhys);
402 rc = STAMR3Register(pVM, &pStats->WriteGC, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
403 AssertRC(rc);
404
405 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-GC-2-R3", GCPhys);
406 rc = STAMR3Register(pVM, &pStats->ReadGCToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
407 AssertRC(rc);
408
409 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-GC-2-R3", GCPhys);
410 rc = STAMR3Register(pVM, &pStats->WriteGCToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
411 AssertRC(rc);
412
413 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-R0", GCPhys);
414 rc = STAMR3Register(pVM, &pStats->ReadR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
415 AssertRC(rc);
416
417 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-R0", GCPhys);
418 rc = STAMR3Register(pVM, &pStats->WriteR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
419 AssertRC(rc);
420
421 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-R0-2-R3", GCPhys);
422 rc = STAMR3Register(pVM, &pStats->ReadR0ToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
423 AssertRC(rc);
424
425 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-R0-2-R3", GCPhys);
426 rc = STAMR3Register(pVM, &pStats->WriteR0ToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
427 AssertRC(rc);
428
429 return pStats;
430 }
431 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
432 MMHyperFree(pVM, pStats);
433 }
434#endif
435 return NULL;
436}
437#endif /* VBOX_WITH_STATISTICS */
438
439
440/**
441 * Registers a I/O port ring-3 handler.
442 *
443 * This API is called by PDM on behalf of a device. Devices must first register
444 * ring-3 ranges before any GC and R0 ranges can be registerd using IOMIOPortRegisterGC()
445 * and IOMIOPortRegisterR0().
446 *
447 *
448 * @returns VBox status code.
449 *
450 * @param pVM VM handle.
451 * @param pDevIns PDM device instance owning the port range.
452 * @param PortStart First port number in the range.
453 * @param cPorts Number of ports to register.
454 * @param pvUser User argument for the callbacks.
455 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
456 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
457 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
458 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
459 * @param pszDesc Pointer to description string. This must not be freed.
460 */
461IOMR3DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
462 HCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, HCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
463 HCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, HCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
464{
465 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%VHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
466 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pszDesc, pfnOutStrCallback, pfnInStrCallback));
467
468 /*
469 * Validate input.
470 */
471 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
472 || (RTUINT)PortStart + cPorts > 0x10000)
473 {
474 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
475 return VERR_IOM_INVALID_IOPORT_RANGE;
476 }
477 if (!pfnOutCallback && !pfnInCallback)
478 {
479 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
480 return VERR_INVALID_PARAMETER;
481 }
482 if (!pfnOutCallback)
483 pfnOutCallback = iomR3IOPortDummyOut;
484 if (!pfnInCallback)
485 pfnInCallback = iomR3IOPortDummyIn;
486 if (!pfnOutStrCallback)
487 pfnOutStrCallback = iomR3IOPortDummyOutStr;
488 if (!pfnInStrCallback)
489 pfnInStrCallback = iomR3IOPortDummyInStr;
490
491 /* Flush the IO port lookup cache */
492 IOMFlushCache(pVM);
493
494 /*
495 * Allocate new range record and initialize it.
496 */
497 PIOMIOPORTRANGER3 pRange;
498 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
499 if (VBOX_SUCCESS(rc))
500 {
501 pRange->Core.Key = PortStart;
502 pRange->Core.KeyLast = PortStart + (cPorts - 1);
503 pRange->Port = PortStart;
504 pRange->cPorts = cPorts;
505 pRange->pvUser = pvUser;
506 pRange->pDevIns = pDevIns;
507 pRange->pfnOutCallback = pfnOutCallback;
508 pRange->pfnInCallback = pfnInCallback;
509 pRange->pfnOutStrCallback = pfnOutStrCallback;
510 pRange->pfnInStrCallback = pfnInStrCallback;
511 pRange->pszDesc = pszDesc;
512
513 /*
514 * Try Insert it.
515 */
516 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesHC->IOPortTreeR3, &pRange->Core))
517 {
518 #ifdef VBOX_WITH_STATISTICS
519 for (unsigned iPort = 0; iPort < cPorts; iPort++)
520 iomr3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
521 #endif
522 return VINF_SUCCESS;
523 }
524
525 /* conflict. */
526 DBGFR3Info(pVM, "ioport", NULL, NULL);
527 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
528 MMHyperFree(pVM, pRange);
529 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
530 }
531
532 return rc;
533}
534
535
536/**
537 * Deregisters a I/O Port range.
538 *
539 * The specified range must be registered using IOMR3IOPortRegister previous to
540 * this call. The range does can be a smaller part of the range specified to
541 * IOMR3IOPortRegister, but it can never be larger.
542 *
543 * This function will remove GC, R0 and R3 context port handlers for this range.
544 *
545 * @returns VBox status code.
546 *
547 * @param pVM The virtual machine.
548 * @param pDevIns The device instance associated with the range.
549 * @param PortStart First port number in the range.
550 * @param cPorts Number of ports to remove starting at PortStart.
551 *
552 * @remark This function mainly for PCI PnP Config and will not do
553 * all the checks you might expect it to do.
554 */
555IOMR3DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
556{
557 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
558
559 /*
560 * Validate input.
561 */
562 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
563 || (RTUINT)PortStart + cPorts > 0x10000)
564 {
565 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
566 return VERR_IOM_INVALID_IOPORT_RANGE;
567 }
568
569 /* Flush the IO port lookup cache */
570 IOMFlushCache(pVM);
571
572 /*
573 * Check ownership.
574 */
575 RTIOPORT PortLast = PortStart + (cPorts - 1);
576 RTIOPORT Port = PortStart;
577 while (Port <= PortLast && Port >= PortStart)
578 {
579 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesHC->IOPortTreeR3, Port);
580 if (pRange)
581 {
582 Assert(Port <= pRange->Core.KeyLast);
583#ifndef IOM_NO_PDMINS_CHECKS
584 if (pRange->pDevIns != pDevIns)
585 {
586 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
587 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
588 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
589 }
590#endif /* !IOM_NO_PDMINS_CHECKS */
591 Port = pRange->Core.KeyLast;
592 }
593 Port++;
594 }
595
596 /*
597 * Remove any GC ranges first.
598 */
599 int rc = VINF_SUCCESS;
600 Port = PortStart;
601 while (Port <= PortLast && Port >= PortStart)
602 {
603 /*
604 * Try find range.
605 */
606 PIOMIOPORTRANGEGC pRange = (PIOMIOPORTRANGEGC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesHC->IOPortTreeGC, Port);
607 if (pRange)
608 {
609 if ( pRange->Core.Key == Port
610 && pRange->Core.KeyLast <= PortLast)
611 {
612 /*
613 * Kick out the entire range.
614 */
615 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesHC->IOPortTreeGC, Port);
616 Assert(pv == (void *)pRange); NOREF(pv);
617 Port += pRange->cPorts;
618 MMHyperFree(pVM, pRange);
619 }
620 else if (pRange->Core.Key == Port)
621 {
622 /*
623 * Cut of the head of the range, done.
624 */
625 pRange->cPorts -= Port - pRange->Port;
626 pRange->Core.Key = Port;
627 pRange->Port = Port;
628 break;
629 }
630 else if (pRange->Core.KeyLast <= PortLast)
631 {
632 /*
633 * Just cut of the tail.
634 */
635 unsigned c = pRange->Core.KeyLast - Port + 1;
636 pRange->Core.KeyLast -= c;
637 pRange->cPorts -= c;
638 Port += c;
639 }
640 else
641 {
642 /*
643 * Split the range, done.
644 */
645 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
646 /* create tail. */
647 PIOMIOPORTRANGEGC pRangeNew;
648 int rc = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
649 if (VBOX_FAILURE(rc))
650 return rc;
651
652 *pRangeNew = *pRange;
653 pRangeNew->Core.Key = PortLast;
654 pRangeNew->Port = PortLast;
655 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
656
657 /* adjust head */
658 pRange->Core.KeyLast = Port - 1;
659 pRange->cPorts = Port - pRange->Port;
660
661 /* insert */
662 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesHC->IOPortTreeGC, &pRangeNew->Core))
663 {
664 AssertMsgFailed(("This cannot happen!\n"));
665 MMHyperFree(pVM, pRangeNew);
666 rc = VERR_INTERNAL_ERROR;
667 }
668 break;
669 }
670 }
671 else /* next port */
672 Port++;
673 } /* for all ports - GC. */
674
675
676 /*
677 * Remove any R0 ranges first.
678 */
679 rc = VINF_SUCCESS;
680 Port = PortStart;
681 while (Port <= PortLast && Port >= PortStart)
682 {
683 /*
684 * Try find range.
685 */
686 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesHC->IOPortTreeR0, Port);
687 if (pRange)
688 {
689 if ( pRange->Core.Key == Port
690 && pRange->Core.KeyLast <= PortLast)
691 {
692 /*
693 * Kick out the entire range.
694 */
695 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesHC->IOPortTreeR0, Port);
696 Assert(pv == (void *)pRange); NOREF(pv);
697 Port += pRange->cPorts;
698 MMHyperFree(pVM, pRange);
699 }
700 else if (pRange->Core.Key == Port)
701 {
702 /*
703 * Cut of the head of the range, done.
704 */
705 pRange->cPorts -= Port - pRange->Port;
706 pRange->Core.Key = Port;
707 pRange->Port = Port;
708 break;
709 }
710 else if (pRange->Core.KeyLast <= PortLast)
711 {
712 /*
713 * Just cut of the tail.
714 */
715 unsigned c = pRange->Core.KeyLast - Port + 1;
716 pRange->Core.KeyLast -= c;
717 pRange->cPorts -= c;
718 Port += c;
719 }
720 else
721 {
722 /*
723 * Split the range, done.
724 */
725 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
726 /* create tail. */
727 PIOMIOPORTRANGER0 pRangeNew;
728 int rc = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
729 if (VBOX_FAILURE(rc))
730 return rc;
731
732 *pRangeNew = *pRange;
733 pRangeNew->Core.Key = PortLast;
734 pRangeNew->Port = PortLast;
735 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
736
737 /* adjust head */
738 pRange->Core.KeyLast = Port - 1;
739 pRange->cPorts = Port - pRange->Port;
740
741 /* insert */
742 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesHC->IOPortTreeR0, &pRangeNew->Core))
743 {
744 AssertMsgFailed(("This cannot happen!\n"));
745 MMHyperFree(pVM, pRangeNew);
746 rc = VERR_INTERNAL_ERROR;
747 }
748 break;
749 }
750 }
751 else /* next port */
752 Port++;
753 } /* for all ports - R0. */
754
755 /*
756 * And the same procedure for ring-3 ranges.
757 */
758 Port = PortStart;
759 while (Port <= PortLast && Port >= PortStart)
760 {
761 /*
762 * Try find range.
763 */
764 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesHC->IOPortTreeR3, Port);
765 if (pRange)
766 {
767 if ( pRange->Core.Key == Port
768 && pRange->Core.KeyLast <= PortLast)
769 {
770 /*
771 * Kick out the entire range.
772 */
773 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesHC->IOPortTreeR3, Port);
774 Assert(pv == (void *)pRange); NOREF(pv);
775 Port += pRange->cPorts;
776 MMHyperFree(pVM, pRange);
777 }
778 else if (pRange->Core.Key == Port)
779 {
780 /*
781 * Cut of the head of the range, done.
782 */
783 pRange->cPorts -= Port - pRange->Port;
784 pRange->Core.Key = Port;
785 pRange->Port = Port;
786 break;
787 }
788 else if (pRange->Core.KeyLast <= PortLast)
789 {
790 /*
791 * Just cut of the tail.
792 */
793 unsigned c = pRange->Core.KeyLast - Port + 1;
794 pRange->Core.KeyLast -= c;
795 pRange->cPorts -= c;
796 Port += c;
797 }
798 else
799 {
800 /*
801 * Split the range, done.
802 */
803 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
804 /* create tail. */
805 PIOMIOPORTRANGER3 pRangeNew;
806 int rc = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
807 if (VBOX_FAILURE(rc))
808 return rc;
809
810 *pRangeNew = *pRange;
811 pRangeNew->Core.Key = PortLast;
812 pRangeNew->Port = PortLast;
813 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
814
815 /* adjust head */
816 pRange->Core.KeyLast = Port - 1;
817 pRange->cPorts = Port - pRange->Port;
818
819 /* insert */
820 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesHC->IOPortTreeR3, &pRangeNew->Core))
821 {
822 AssertMsgFailed(("This cannot happen!\n"));
823 MMHyperFree(pVM, pRangeNew);
824 rc = VERR_INTERNAL_ERROR;
825 }
826 break;
827 }
828 }
829 else /* next port */
830 Port++;
831 } /* for all ports - ring-3. */
832
833 /* done */
834 return rc;
835}
836
837
838/**
839 * Dummy Port I/O Handler for IN operations.
840 *
841 * @returns VBox status code.
842 *
843 * @param pDevIns The device instance.
844 * @param pvUser User argument.
845 * @param Port Port number used for the IN operation.
846 * @param pu32 Where to store the result.
847 * @param cb Number of bytes read.
848 */
849static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
850{
851 switch (cb)
852 {
853 case 1: *pu32 = 0xff; break;
854 case 2: *pu32 = 0xffff; break;
855 case 4: *pu32 = 0xffffffff; break;
856 default:
857 AssertReleaseMsgFailed(("cb=%d\n", cb));
858 return VERR_INTERNAL_ERROR;
859 }
860 return VINF_SUCCESS;
861}
862
863
864/**
865 * Dummy Port I/O Handler for string IN operations.
866 *
867 * @returns VBox status code.
868 *
869 * @param pDevIns The device instance.
870 * @param pvUser User argument.
871 * @param Port Port number used for the string IN operation.
872 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
873 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
874 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
875 */
876static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, unsigned *pcTransfer, unsigned cb)
877{
878 return VINF_SUCCESS;
879}
880
881
882/**
883 * Dummy Port I/O Handler for OUT operations.
884 *
885 * @returns VBox status code.
886 *
887 * @param pDevIns The device instance.
888 * @param pvUser User argument.
889 * @param Port Port number used for the OUT operation.
890 * @param u32 The value to output.
891 * @param cb The value size in bytes.
892 */
893static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
894{
895 return VINF_SUCCESS;
896}
897
898
899/**
900 * Dummy Port I/O Handler for string OUT operations.
901 *
902 * @returns VBox status code.
903 *
904 * @param pDevIns The device instance.
905 * @param pvUser User argument.
906 * @param Port Port number used for the string OUT operation.
907 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
908 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
909 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
910 */
911static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, unsigned *pcTransfer, unsigned cb)
912{
913 return VINF_SUCCESS;
914}
915
916
917/**
918 * Display a single I/O port ring-3 range.
919 *
920 * @returns 0
921 * @param pNode Pointer to I/O port HC range.
922 * @param pvUser Pointer to info output callback structure.
923 */
924static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
925{
926 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
927 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
928 pHlp->pfnPrintf(pHlp,
929 "%04x-%04x %VHv %VHv %VHv %VHv %s\n",
930 pRange->Core.Key,
931 pRange->Core.KeyLast,
932 pRange->pDevIns,
933 pRange->pfnInCallback,
934 pRange->pfnOutCallback,
935 pRange->pvUser,
936 pRange->pszDesc);
937 return 0;
938}
939
940
941/**
942 * Display a single I/O port GC range.
943 *
944 * @returns 0
945 * @param pNode Pointer to IOPORT GC range.
946 * @param pvUser Pointer to info output callback structure.
947 */
948static DECLCALLBACK(int) iomR3IOPortInfoOneGC(PAVLROIOPORTNODECORE pNode, void *pvUser)
949{
950 PIOMIOPORTRANGEGC pRange = (PIOMIOPORTRANGEGC)pNode;
951 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
952 pHlp->pfnPrintf(pHlp,
953 "%04x-%04x %VGv %VGv %VGv %VGv %s\n",
954 pRange->Core.Key,
955 pRange->Core.KeyLast,
956 pRange->pDevIns,
957 pRange->pfnInCallback,
958 pRange->pfnOutCallback,
959 pRange->pvUser,
960 pRange->pszDesc);
961 return 0;
962}
963
964
965/**
966 * Display all registered I/O port ranges.
967 *
968 * @param pVM VM Handle.
969 * @param pHlp The info helpers.
970 * @param pszArgs Arguments, ignored.
971 */
972static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
973{
974 NOREF(pszArgs);
975 pHlp->pfnPrintf(pHlp,
976 "I/O Port R3 ranges (pVM=%p)\n"
977 "Range %.*s %.*s %.*s %.*s Description\n",
978 pVM,
979 sizeof(RTHCPTR) * 2, "pDevIns ",
980 sizeof(RTHCPTR) * 2, "In ",
981 sizeof(RTHCPTR) * 2, "Out ",
982 sizeof(RTHCPTR) * 2, "pvUser ");
983 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesHC->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
984
985 pHlp->pfnPrintf(pHlp,
986 "I/O Port R0 ranges (pVM=%p)\n"
987 "Range %.*s %.*s %.*s %.*s Description\n",
988 pVM,
989 sizeof(RTHCPTR) * 2, "pDevIns ",
990 sizeof(RTHCPTR) * 2, "In ",
991 sizeof(RTHCPTR) * 2, "Out ",
992 sizeof(RTHCPTR) * 2, "pvUser ");
993 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesHC->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
994
995 pHlp->pfnPrintf(pHlp,
996 "I/O Port GC ranges (pVM=%p)\n"
997 "Range %.*s %.*s %.*s %.*s Description\n",
998 pVM,
999 sizeof(RTGCPTR) * 2, "pDevIns ",
1000 sizeof(RTGCPTR) * 2, "In ",
1001 sizeof(RTGCPTR) * 2, "Out ",
1002 sizeof(RTGCPTR) * 2, "pvUser ");
1003 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesHC->IOPortTreeGC, true, iomR3IOPortInfoOneGC, (void *)pHlp);
1004
1005 if (pVM->iom.s.pRangeLastReadGC)
1006 {
1007 PIOMIOPORTRANGEGC pRange = (PIOMIOPORTRANGEGC)MMHyperGC2HC(pVM, pVM->iom.s.pRangeLastReadGC);
1008 pHlp->pfnPrintf(pHlp, "GC Read Ports: %#04x-%#04x %VGv %s\n",
1009 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastReadGC, pRange->pszDesc);
1010 }
1011 if (pVM->iom.s.pStatsLastReadGC)
1012 {
1013 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperGC2HC(pVM, pVM->iom.s.pStatsLastReadGC);
1014 pHlp->pfnPrintf(pHlp, "GC Read Stats: %#04x %VGv\n",
1015 pRange->Core.Key, pVM->iom.s.pStatsLastReadGC);
1016 }
1017
1018 if (pVM->iom.s.pRangeLastWriteGC)
1019 {
1020 PIOMIOPORTRANGEGC pRange = (PIOMIOPORTRANGEGC)MMHyperGC2HC(pVM, pVM->iom.s.pRangeLastWriteGC);
1021 pHlp->pfnPrintf(pHlp, "GC Write Ports: %#04x-%#04x %VGv %s\n",
1022 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastWriteGC, pRange->pszDesc);
1023 }
1024 if (pVM->iom.s.pStatsLastWriteGC)
1025 {
1026 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperGC2HC(pVM, pVM->iom.s.pStatsLastWriteGC);
1027 pHlp->pfnPrintf(pHlp, "GC Write Stats: %#04x %VGv\n",
1028 pRange->Core.Key, pVM->iom.s.pStatsLastWriteGC);
1029 }
1030
1031 if (pVM->iom.s.pRangeLastReadR3)
1032 {
1033 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastReadR3;
1034 pHlp->pfnPrintf(pHlp, "HC Read Ports: %#04x-%#04x %VGv %s\n",
1035 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1036 }
1037 if (pVM->iom.s.pStatsLastReadR3)
1038 {
1039 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR3;
1040 pHlp->pfnPrintf(pHlp, "HC Read Stats: %#04x %VGv\n",
1041 pRange->Core.Key, pRange);
1042 }
1043
1044 if (pVM->iom.s.pRangeLastWriteR3)
1045 {
1046 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastWriteR3;
1047 pHlp->pfnPrintf(pHlp, "HC Write Ports: %#04x-%#04x %VGv %s\n",
1048 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1049 }
1050 if (pVM->iom.s.pStatsLastWriteR3)
1051 {
1052 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR3;
1053 pHlp->pfnPrintf(pHlp, "HC Write Stats: %#04x %VGv\n",
1054 pRange->Core.Key, pRange);
1055 }
1056
1057 if (pVM->iom.s.pRangeLastReadR0)
1058 {
1059 PIOMIOPORTRANGER0 pRange = pVM->iom.s.pRangeLastReadR0;
1060 pHlp->pfnPrintf(pHlp, "R0 Read Ports: %#04x-%#04x %VGv %s\n",
1061 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1062 }
1063 if (pVM->iom.s.pStatsLastReadR0)
1064 {
1065 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR0;
1066 pHlp->pfnPrintf(pHlp, "R0 Read Stats: %#04x %VGv\n",
1067 pRange->Core.Key, pRange);
1068 }
1069
1070 if (pVM->iom.s.pRangeLastWriteR0)
1071 {
1072 PIOMIOPORTRANGER0 pRange = pVM->iom.s.pRangeLastWriteR0;
1073 pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %VGv %s\n",
1074 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1075 }
1076 if (pVM->iom.s.pStatsLastWriteR0)
1077 {
1078 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR0;
1079 pHlp->pfnPrintf(pHlp, "R0 Write Stats: %#04x %VGv\n",
1080 pRange->Core.Key, pRange);
1081 }
1082}
1083
1084
1085/**
1086 * Registers a Memory Mapped I/O R3 handler.
1087 *
1088 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1089 * before any GC and R0 ranges can be registered using IOMMMIORegisterGC() and IOMMMIORegisterR0().
1090 *
1091 * @returns VBox status code.
1092 *
1093 * @param pVM VM handle.
1094 * @param pDevIns PDM device instance owning the MMIO range.
1095 * @param GCPhysStart First physical address in the range.
1096 * @param cbRange The size of the range (in bytes).
1097 * @param pvUser User argument for the callbacks.
1098 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1099 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1100 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1101 * @param pszDesc Pointer to description string. This must not be freed.
1102 */
1103IOMR3DECL(int) IOMR3MMIORegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1104 HCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, HCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1105 HCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, const char *pszDesc)
1106{
1107 LogFlow(("IOMR3MMIORegisterR3: pDevIns=%p GCPhysStart=%#x cbRange=%#x pvUser=%VHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x pszDesc=%s\n",
1108 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, pszDesc));
1109
1110 /*
1111 * Validate input.
1112 */
1113 if (GCPhysStart + (cbRange - 1) < GCPhysStart)
1114 {
1115 AssertMsgFailed(("Wrapped! %#x %#x bytes\n", GCPhysStart, cbRange));
1116 return VERR_IOM_INVALID_MMIO_RANGE;
1117 }
1118
1119 /*
1120 * Allocate new range record and initialize it.
1121 */
1122 PIOMMMIORANGER3 pRange;
1123 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1124 if (VBOX_SUCCESS(rc))
1125 {
1126 pRange->Core.Key = GCPhysStart;
1127 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1128 pRange->GCPhys = GCPhysStart;
1129 pRange->cbSize = cbRange;
1130 pRange->pvUser = pvUser;
1131 pRange->pDevIns = pDevIns;
1132 pRange->pfnReadCallback = pfnReadCallback;
1133 pRange->pfnWriteCallback= pfnWriteCallback;
1134 pRange->pfnFillCallback = pfnFillCallback;
1135 pRange->pszDesc = pszDesc;
1136
1137 /*
1138 * Try register it with PGM and then insert it.
1139 */
1140 int rc = PGMR3HandlerPhysicalRegister(pVM, PGMPHYSHANDLERTYPE_MMIO, GCPhysStart, GCPhysStart + (cbRange - 1),
1141 /*IOMR3MMIOHandler*/ NULL, pRange,
1142 NULL, "IOMMMIOHandler", pRange,
1143 NULL, "IOMMMIOHandler", MMHyperHC2GC(pVM, pRange), pszDesc);
1144 if (VBOX_SUCCESS(rc))
1145 {
1146 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesHC->MMIOTreeR3, &pRange->Core))
1147 return VINF_SUCCESS;
1148
1149 DBGFR3Info(pVM, "mmio", NULL, NULL);
1150 AssertMsgFailed(("This cannot happen!\n"));
1151 rc = VERR_INTERNAL_ERROR;
1152 }
1153 MMHyperFree(pVM, pRange);
1154 }
1155
1156 return rc;
1157}
1158
1159
1160/**
1161 * Deregisters a Memory Mapped I/O handler range.
1162 *
1163 * Registered GC, R0, and R3 ranges are affected.
1164 *
1165 * @returns VBox status code.
1166 *
1167 * @param pVM The virtual machine.
1168 * @param pDevIns Device instance which the MMIO region is registered.
1169 * @param GCPhysStart First physical address (GC) in the range.
1170 * @param cbRange Number of bytes to deregister.
1171 *
1172 * @remark This function mainly for PCI PnP Config and will not do
1173 * all the checks you might expect it to do.
1174 */
1175IOMR3DECL(int) IOMR3MMIODeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
1176{
1177 LogFlow(("IOMR3MMIODeregister: pDevIns=%p GCPhysStart=#x cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1178
1179 /*
1180 * Validate input.
1181 */
1182 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1183 if (GCPhysLast < GCPhysStart)
1184 {
1185 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1186 return VERR_IOM_INVALID_MMIO_RANGE;
1187 }
1188
1189 /*
1190 * Check ownership and such.
1191 */
1192 RTGCPHYS GCPhys = GCPhysStart;
1193 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1194 {
1195 PIOMMMIORANGER3 pRange = (PIOMMMIORANGER3)RTAvlroGCPhysGet(&pVM->iom.s.pTreesHC->MMIOTreeR3, GCPhys);
1196 if (!pRange)
1197 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1198#ifndef IOM_NO_PDMINS_CHECKS
1199 if (pRange->pDevIns != pDevIns)
1200 {
1201 AssertMsgFailed(("Not owner! GCPhys=%#x %#x LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc));
1202 return VERR_IOM_NOT_MMIO_RANGE_OWNER;
1203 }
1204#endif /* !IOM_NO_PDMINS_CHECKS */
1205 if (pRange->Core.KeyLast > GCPhysLast)
1206 {
1207 AssertMsgFailed(("Incomplete R3 range! GCPhys=%#x %#x LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc));
1208 return VERR_IOM_INCOMPLETE_MMIO_RANGE;
1209 }
1210 /* next */
1211 Assert(GCPhys <= pRange->Core.KeyLast);
1212 GCPhys = pRange->Core.KeyLast + 1;
1213 }
1214
1215 /*
1216 * Remove GC ranges.
1217 */
1218 GCPhys = GCPhysStart;
1219 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1220 {
1221 PIOMMMIORANGEGC pRange = (PIOMMMIORANGEGC)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesHC->MMIOTreeGC, GCPhys);
1222 if (pRange)
1223 {
1224 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1225
1226 /* next and delete. */
1227 GCPhys = pRange->Core.KeyLast + 1;
1228 MMHyperFree(pVM, pRange);
1229 }
1230 else /* next - this'll be damned slow! */
1231 GCPhys++;
1232 }
1233
1234 /*
1235 * Remove R0 ranges.
1236 */
1237 GCPhys = GCPhysStart;
1238 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1239 {
1240 PIOMMMIORANGER0 pRange = (PIOMMMIORANGER0)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesHC->MMIOTreeR0, GCPhys);
1241 if (pRange)
1242 {
1243 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1244
1245 /* next and delete. */
1246 GCPhys = pRange->Core.KeyLast + 1;
1247 MMHyperFree(pVM, pRange);
1248 }
1249 else /* next - this'll be damned slow! */
1250 GCPhys++;
1251 }
1252
1253 /*
1254 * Remove R3 ranges.
1255 */
1256 GCPhys = GCPhysStart;
1257 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1258 {
1259 PIOMMMIORANGER3 pRange = (PIOMMMIORANGER3)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesHC->MMIOTreeR3, GCPhys);
1260 Assert(pRange);
1261 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1262
1263 /* remove it from PGM */
1264 int rc = PGMHandlerPhysicalDeregister(pVM, GCPhys);
1265 AssertRC(rc);
1266
1267 /* next and delete. */
1268 GCPhys = pRange->Core.KeyLast + 1;
1269 MMHyperFree(pVM, pRange);
1270 }
1271
1272 return VINF_SUCCESS;
1273}
1274
1275
1276/**
1277 * Display a single MMIO R3 range.
1278 *
1279 * @returns 0
1280 * @param pNode Pointer to MMIO R3 range.
1281 * @param pvUser Pointer to info output callback structure.
1282 */
1283static DECLCALLBACK(int) iomR3MMIOInfoOneR3(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1284{
1285 PIOMMMIORANGER3 pRange = (PIOMMMIORANGER3)pNode;
1286 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1287 pHlp->pfnPrintf(pHlp,
1288 "%VGp-%VGp %VHv %VHv %VHv %VHv %VHv %s\n",
1289 pRange->Core.Key,
1290 pRange->Core.KeyLast,
1291 pRange->pDevIns,
1292 pRange->pfnReadCallback,
1293 pRange->pfnWriteCallback,
1294 pRange->pfnFillCallback,
1295 pRange->pvUser,
1296 pRange->pszDesc);
1297 return 0;
1298}
1299
1300
1301/**
1302 * Display a single MMIO GC range.
1303 *
1304 * @returns 0
1305 * @param pNode Pointer to MMIO GC range.
1306 * @param pvUser Pointer to info output callback structure.
1307 */
1308static DECLCALLBACK(int) iomR3MMIOInfoOneGC(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1309{
1310 PIOMMMIORANGEGC pRange = (PIOMMMIORANGEGC)pNode;
1311 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1312 pHlp->pfnPrintf(pHlp,
1313 "%VGp-%VGp %VGv %VGv %VGv %VGv %VGv %s\n",
1314 pRange->Core.Key,
1315 pRange->Core.KeyLast,
1316 pRange->pDevIns,
1317 pRange->pfnReadCallback,
1318 pRange->pfnWriteCallback,
1319 pRange->pfnFillCallback,
1320 pRange->pvUser,
1321 pRange->pszDesc);
1322 return 0;
1323}
1324
1325
1326/**
1327 * Display registered MMIO ranges to the log.
1328 *
1329 * @param pVM VM Handle.
1330 * @param pHlp The info helpers.
1331 * @param pszArgs Arguments, ignored.
1332 */
1333static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1334{
1335 NOREF(pszArgs);
1336 pHlp->pfnPrintf(pHlp,
1337 "MMIO R3 ranges (pVM=%p)\n"
1338 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1339 pVM,
1340 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1341 sizeof(RTHCPTR) * 2, "pDevIns ",
1342 sizeof(RTHCPTR) * 2, "Read ",
1343 sizeof(RTHCPTR) * 2, "Write ",
1344 sizeof(RTHCPTR) * 2, "Fill ",
1345 sizeof(RTHCPTR) * 2, "pvUser ",
1346 "Description");
1347 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesHC->MMIOTreeR3, true, iomR3MMIOInfoOneR3, (void *)pHlp);
1348
1349 pHlp->pfnPrintf(pHlp,
1350 "MMIO R0 ranges (pVM=%p)\n"
1351 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1352 pVM,
1353 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1354 sizeof(RTGCPTR) * 2, "pDevIns ",
1355 sizeof(RTGCPTR) * 2, "Read ",
1356 sizeof(RTGCPTR) * 2, "Write ",
1357 sizeof(RTGCPTR) * 2, "Fill ",
1358 sizeof(RTGCPTR) * 2, "pvUser ",
1359 "Description");
1360 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesHC->MMIOTreeR0, true, iomR3MMIOInfoOneR3, (void *)pHlp);
1361
1362 pHlp->pfnPrintf(pHlp,
1363 "MMIO GC ranges (pVM=%p)\n"
1364 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1365 pVM,
1366 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1367 sizeof(RTGCPTR) * 2, "pDevIns ",
1368 sizeof(RTGCPTR) * 2, "Read ",
1369 sizeof(RTGCPTR) * 2, "Write ",
1370 sizeof(RTGCPTR) * 2, "Fill ",
1371 sizeof(RTGCPTR) * 2, "pvUser ",
1372 "Description");
1373 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesHC->MMIOTreeGC, true, iomR3MMIOInfoOneGC, (void *)pHlp);
1374}
1375
1376
1377#ifdef VBOX_WITH_STATISTICS
1378/**
1379 * Tries to come up with the standard name for a port.
1380 *
1381 * @returns Pointer to readonly string if known.
1382 * @returns NULL if unknown port number.
1383 *
1384 * @param Port The port to name.
1385 */
1386static const char *iomr3IOPortGetStandardName(RTIOPORT Port)
1387{
1388 switch (Port)
1389 {
1390 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1391 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1392 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1393 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1394 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1395 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1396 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1397 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1398 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1399 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1400 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1401 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1402 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1403 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1404 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1405 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1406
1407 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1408 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1409 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1410 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1411 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1412 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1413 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1414 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1415 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1416 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1417 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1418 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1419 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1420 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1421 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1422 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1423 return "System Reserved";
1424
1425 case 0x60:
1426 case 0x64:
1427 return "Keyboard & Mouse";
1428
1429 case 0x378:
1430 case 0x379:
1431 case 0x37a:
1432 case 0x37b:
1433 case 0x37c:
1434 case 0x37d:
1435 case 0x37e:
1436 case 0x37f:
1437 case 0x3bc:
1438 case 0x3bd:
1439 case 0x3be:
1440 case 0x3bf:
1441 case 0x278:
1442 case 0x279:
1443 case 0x27a:
1444 case 0x27b:
1445 case 0x27c:
1446 case 0x27d:
1447 case 0x27e:
1448 case 0x27f:
1449 return "LPT1/2/3";
1450
1451 case 0x3f8:
1452 case 0x3f9:
1453 case 0x3fa:
1454 case 0x3fb:
1455 case 0x3fc:
1456 case 0x3fd:
1457 case 0x3fe:
1458 case 0x3ff:
1459 return "COM1";
1460
1461 case 0x2f8:
1462 case 0x2f9:
1463 case 0x2fa:
1464 case 0x2fb:
1465 case 0x2fc:
1466 case 0x2fd:
1467 case 0x2fe:
1468 case 0x2ff:
1469 return "COM2";
1470
1471 case 0x3e8:
1472 case 0x3e9:
1473 case 0x3ea:
1474 case 0x3eb:
1475 case 0x3ec:
1476 case 0x3ed:
1477 case 0x3ee:
1478 case 0x3ef:
1479 return "COM3";
1480
1481 case 0x2e8:
1482 case 0x2e9:
1483 case 0x2ea:
1484 case 0x2eb:
1485 case 0x2ec:
1486 case 0x2ed:
1487 case 0x2ee:
1488 case 0x2ef:
1489 return "COM4";
1490
1491 case 0x200:
1492 case 0x201:
1493 case 0x202:
1494 case 0x203:
1495 case 0x204:
1496 case 0x205:
1497 case 0x206:
1498 case 0x207:
1499 return "Joystick";
1500
1501 case 0x3f0:
1502 case 0x3f1:
1503 case 0x3f2:
1504 case 0x3f3:
1505 case 0x3f4:
1506 case 0x3f5:
1507 case 0x3f6:
1508 case 0x3f7:
1509 return "Floppy";
1510
1511 case 0x1f0:
1512 case 0x1f1:
1513 case 0x1f2:
1514 case 0x1f3:
1515 case 0x1f4:
1516 case 0x1f5:
1517 case 0x1f6:
1518 case 0x1f7:
1519 //case 0x3f6:
1520 //case 0x3f7:
1521 return "IDE 1st";
1522
1523 case 0x170:
1524 case 0x171:
1525 case 0x172:
1526 case 0x173:
1527 case 0x174:
1528 case 0x175:
1529 case 0x176:
1530 case 0x177:
1531 case 0x376:
1532 case 0x377:
1533 return "IDE 2nd";
1534
1535 case 0x1e0:
1536 case 0x1e1:
1537 case 0x1e2:
1538 case 0x1e3:
1539 case 0x1e4:
1540 case 0x1e5:
1541 case 0x1e6:
1542 case 0x1e7:
1543 case 0x3e6:
1544 case 0x3e7:
1545 return "IDE 3rd";
1546
1547 case 0x160:
1548 case 0x161:
1549 case 0x162:
1550 case 0x163:
1551 case 0x164:
1552 case 0x165:
1553 case 0x166:
1554 case 0x167:
1555 case 0x366:
1556 case 0x367:
1557 return "IDE 4th";
1558
1559 case 0x130: case 0x140: case 0x150:
1560 case 0x131: case 0x141: case 0x151:
1561 case 0x132: case 0x142: case 0x152:
1562 case 0x133: case 0x143: case 0x153:
1563 case 0x134: case 0x144: case 0x154:
1564 case 0x135: case 0x145: case 0x155:
1565 case 0x136: case 0x146: case 0x156:
1566 case 0x137: case 0x147: case 0x157:
1567 case 0x138: case 0x148: case 0x158:
1568 case 0x139: case 0x149: case 0x159:
1569 case 0x13a: case 0x14a: case 0x15a:
1570 case 0x13b: case 0x14b: case 0x15b:
1571 case 0x13c: case 0x14c: case 0x15c:
1572 case 0x13d: case 0x14d: case 0x15d:
1573 case 0x13e: case 0x14e: case 0x15e:
1574 case 0x13f: case 0x14f: case 0x15f:
1575 case 0x220: case 0x230:
1576 case 0x221: case 0x231:
1577 case 0x222: case 0x232:
1578 case 0x223: case 0x233:
1579 case 0x224: case 0x234:
1580 case 0x225: case 0x235:
1581 case 0x226: case 0x236:
1582 case 0x227: case 0x237:
1583 case 0x228: case 0x238:
1584 case 0x229: case 0x239:
1585 case 0x22a: case 0x23a:
1586 case 0x22b: case 0x23b:
1587 case 0x22c: case 0x23c:
1588 case 0x22d: case 0x23d:
1589 case 0x22e: case 0x23e:
1590 case 0x22f: case 0x23f:
1591 case 0x330: case 0x340: case 0x350:
1592 case 0x331: case 0x341: case 0x351:
1593 case 0x332: case 0x342: case 0x352:
1594 case 0x333: case 0x343: case 0x353:
1595 case 0x334: case 0x344: case 0x354:
1596 case 0x335: case 0x345: case 0x355:
1597 case 0x336: case 0x346: case 0x356:
1598 case 0x337: case 0x347: case 0x357:
1599 case 0x338: case 0x348: case 0x358:
1600 case 0x339: case 0x349: case 0x359:
1601 case 0x33a: case 0x34a: case 0x35a:
1602 case 0x33b: case 0x34b: case 0x35b:
1603 case 0x33c: case 0x34c: case 0x35c:
1604 case 0x33d: case 0x34d: case 0x35d:
1605 case 0x33e: case 0x34e: case 0x35e:
1606 case 0x33f: case 0x34f: case 0x35f:
1607 return "SCSI (typically)";
1608
1609 case 0x320:
1610 case 0x321:
1611 case 0x322:
1612 case 0x323:
1613 case 0x324:
1614 case 0x325:
1615 case 0x326:
1616 case 0x327:
1617 return "XT HD";
1618
1619 case 0x3b0:
1620 case 0x3b1:
1621 case 0x3b2:
1622 case 0x3b3:
1623 case 0x3b4:
1624 case 0x3b5:
1625 case 0x3b6:
1626 case 0x3b7:
1627 case 0x3b8:
1628 case 0x3b9:
1629 case 0x3ba:
1630 case 0x3bb:
1631 return "VGA";
1632
1633 case 0x3c0: case 0x3d0:
1634 case 0x3c1: case 0x3d1:
1635 case 0x3c2: case 0x3d2:
1636 case 0x3c3: case 0x3d3:
1637 case 0x3c4: case 0x3d4:
1638 case 0x3c5: case 0x3d5:
1639 case 0x3c6: case 0x3d6:
1640 case 0x3c7: case 0x3d7:
1641 case 0x3c8: case 0x3d8:
1642 case 0x3c9: case 0x3d9:
1643 case 0x3ca: case 0x3da:
1644 case 0x3cb: case 0x3db:
1645 case 0x3cc: case 0x3dc:
1646 case 0x3cd: case 0x3dd:
1647 case 0x3ce: case 0x3de:
1648 case 0x3cf: case 0x3df:
1649 return "VGA/EGA";
1650
1651 case 0x240: case 0x260: case 0x280:
1652 case 0x241: case 0x261: case 0x281:
1653 case 0x242: case 0x262: case 0x282:
1654 case 0x243: case 0x263: case 0x283:
1655 case 0x244: case 0x264: case 0x284:
1656 case 0x245: case 0x265: case 0x285:
1657 case 0x246: case 0x266: case 0x286:
1658 case 0x247: case 0x267: case 0x287:
1659 case 0x248: case 0x268: case 0x288:
1660 case 0x249: case 0x269: case 0x289:
1661 case 0x24a: case 0x26a: case 0x28a:
1662 case 0x24b: case 0x26b: case 0x28b:
1663 case 0x24c: case 0x26c: case 0x28c:
1664 case 0x24d: case 0x26d: case 0x28d:
1665 case 0x24e: case 0x26e: case 0x28e:
1666 case 0x24f: case 0x26f: case 0x28f:
1667 case 0x300:
1668 case 0x301:
1669 case 0x388:
1670 case 0x389:
1671 case 0x38a:
1672 case 0x38b:
1673 return "Sound Card (typically)";
1674
1675 default:
1676 return NULL;
1677 }
1678}
1679#endif /* VBOX_WITH_STATISTICS */
1680
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