1 | /* $Id: CSAMInternal.h 518 2007-02-01 18:46:18Z vboxsync $ */
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2 | /** @file
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3 | * CSAM - Internal header file.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006 InnoTek Systemberatung GmbH
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License as published by the Free Software Foundation,
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13 | * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
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14 | * distribution. VirtualBox OSE is distributed in the hope that it will
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15 | * be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * If you received this file as part of a commercial VirtualBox
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18 | * distribution, then only the terms of your commercial VirtualBox
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19 | * license agreement apply instead of the previous paragraph.
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20 | */
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21 |
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22 | #ifndef __CSAMInternal_h__
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23 | #define __CSAMInternal_h__
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24 |
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25 | #include <VBox/cdefs.h>
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26 | #include <VBox/types.h>
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27 | #include <VBox/csam.h>
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28 | #include <VBox/dis.h>
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29 | #include <VBox/log.h>
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30 |
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31 | #if !defined(IN_CSAM_R3) && !defined(IN_CSAM_R0) && !defined(IN_CSAM_GC)
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32 | # error "Not in CSAM! This is an internal header!"
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33 | #endif
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34 |
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35 | /** Page flags.
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36 | * These are placed in the three bits available for system programs in
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37 | * the page entries.
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38 | * @{ */
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39 | #ifndef PGM_PTFLAGS_CSAM_VALIDATED
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40 | /** Scanned and approved by CSAM (tm). */
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41 | /** NOTE: Must be identical to the one defined in PGMInternal.h!! */
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42 | #define PGM_PTFLAGS_CSAM_VALIDATED BIT64(11)
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43 | #endif
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44 |
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45 | /** @} */
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46 |
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47 | #define CSAM_SSM_VERSION 13
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48 |
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49 | #define CSAM_PGDIRBMP_CHUNKS 1024
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50 |
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51 | #define CSAM_PAGE_BITMAP_SIZE (PAGE_SIZE/(sizeof(uint8_t)*8))
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52 |
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53 | /* Maximum nr of dirty page that are cached. */
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54 | #define CSAM_MAX_DIRTY_PAGES 32
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55 |
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56 | /* Maximum number of cached addresses of dangerous instructions that have been scanned before. */
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57 | #define CSAM_MAX_DANGR_INSTR 16 /* power of two! */
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58 | #define CSAM_MAX_DANGR_INSTR_MASK (CSAM_MAX_DANGR_INSTR-1)
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59 |
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60 |
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61 | #define CSAM_MAX_CALLEXIT_RET 16
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62 |
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63 | /* copy from PATMInternal.h */
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64 | #define SIZEOF_NEARJUMP32 5 //opcode byte + 4 byte relative offset
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65 |
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66 | typedef struct
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67 | {
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68 | RTGCPTR pInstrAfterRetGC[CSAM_MAX_CALLEXIT_RET];
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69 | uint32_t cInstrAfterRet;
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70 | } CSAMCALLEXITREC, *PCSAMCALLEXITREC;
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71 |
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72 | typedef struct
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73 | {
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74 | HCPTRTYPE(uint8_t *) pPageLocStartHC;
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75 | HCPTRTYPE(uint8_t *) pPageLocEndHC;
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76 | GCPTRTYPE(uint8_t *) pGuestLoc;
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77 | uint32_t depth; //call/jump depth
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78 |
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79 | PCSAMCALLEXITREC pCallExitRec;
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80 | } CSAMP2GLOOKUPREC, *PCSAMP2GLOOKUPREC;
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81 |
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82 | typedef struct
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83 | {
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84 | RTGCPTR pPageGC;
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85 | RTGCPHYS GCPhys;
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86 | uint64_t fFlags;
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87 | uint32_t uSize;
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88 |
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89 | uint8_t *pBitmap;
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90 |
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91 | bool fCode32;
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92 | bool fMonitorActive;
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93 | bool fMonitorInvalidation;
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94 |
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95 | CSAMTAG enmTag;
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96 |
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97 | uint64_t u64Hash;
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98 | } CSAMPAGE, *PCSAMPAGE;
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99 |
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100 | typedef struct
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101 | {
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102 | // GC Patch pointer
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103 | RTGCPTR pInstrGC;
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104 |
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105 | // Disassembly state for original instruction
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106 | DISCPUSTATE cpu;
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107 |
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108 | uint32_t uState;
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109 |
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110 | PCSAMPAGE pPage;
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111 | } CSAMPATCH, *PCSAMPATCH;
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112 |
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113 | /**
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114 | * Lookup record for CSAM pages
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115 | */
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116 | typedef struct CSAMPAGEREC
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117 | {
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118 | /** The key is a GC virtual address. */
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119 | AVLPVNODECORE Core;
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120 | CSAMPAGE page;
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121 |
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122 | } CSAMPAGEREC, *PCSAMPAGEREC;
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123 |
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124 | /**
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125 | * Lookup record for patches
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126 | */
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127 | typedef struct CSAMPATCHREC
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128 | {
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129 | /** The key is a GC virtual address. */
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130 | AVLPVNODECORE Core;
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131 | CSAMPATCH patch;
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132 |
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133 | } CSAMPATCHREC, *PCSAMPATCHREC;
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134 |
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135 |
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136 | /**
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137 | * CSAM VM Instance data.
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138 | * Changes to this must checked against the padding of the CSAM union in VM!
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139 | * @note change SSM version when changing it!!
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140 | */
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141 | typedef struct CSAM
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142 | {
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143 | /** Offset to the VM structure.
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144 | * See CSAM2VM(). */
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145 | RTINT offVM;
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146 | #if HC_ARCH_BITS == 64
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147 | RTINT Alignment0; /**< Align pPageTree correctly. */
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148 | #endif
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149 |
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150 | HCPTRTYPE(PAVLPVNODECORE) pPageTree;
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151 |
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152 | /* Array to store previously scanned dangerous instructions, so we don't need to
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153 | * switch back to ring 3 each time we encounter them in GC.
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154 | */
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155 | RTGCPTR aDangerousInstr[CSAM_MAX_DANGR_INSTR];
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156 | uint32_t cDangerousInstr;
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157 | uint32_t iDangerousInstr;
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158 |
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159 | GCPTRTYPE(RTGCPTR *) pPDBitmapGC;
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160 | GCPTRTYPE(RTHCPTR *) pPDHCBitmapGC;
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161 | HCPTRTYPE(uint8_t **) pPDBitmapHC;
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162 | HCPTRTYPE(RTGCPTR *) pPDGCBitmapHC;
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163 |
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164 | /* Temporary storage during load/save state */
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165 | struct
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166 | {
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167 | HCPTRTYPE(PSSMHANDLE) pSSM;
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168 | uint32_t cPageRecords;
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169 | uint32_t cPatchPageRecords;
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170 | } savedstate;
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171 |
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172 | /* To keep track of dirty pages */
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173 | uint32_t cDirtyPages;
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174 | RTGCPTR pvDirtyBasePage[CSAM_MAX_DIRTY_PAGES];
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175 | RTGCPTR pvDirtyFaultPage[CSAM_MAX_DIRTY_PAGES];
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176 |
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177 | /* Set when scanning has started. */
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178 | bool fScanningStarted;
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179 |
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180 | /* Set when the IDT gates have been checked for the first time. */
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181 | bool fGatesChecked;
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182 | bool Alignment1[2]; /**< Align the stats on an 8-byte boundrary. */
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183 |
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184 | STAMCOUNTER StatNrTraps;
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185 | STAMCOUNTER StatNrPages;
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186 | STAMCOUNTER StatNrPagesInv;
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187 | STAMCOUNTER StatNrRemovedPages;
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188 | STAMCOUNTER StatNrPatchPages;
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189 | STAMCOUNTER StatNrPageNPHC;
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190 | STAMCOUNTER StatNrPageNPGC;
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191 | STAMCOUNTER StatNrFlushes;
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192 | STAMCOUNTER StatNrFlushesSkipped;
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193 | STAMCOUNTER StatNrKnownPagesHC;
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194 | STAMCOUNTER StatNrKnownPagesGC;
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195 | STAMCOUNTER StatNrInstr;
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196 | STAMCOUNTER StatNrBytesRead;
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197 | STAMCOUNTER StatNrOpcodeRead;
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198 | STAMPROFILE StatTime;
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199 | STAMPROFILE StatTimeCheckAddr;
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200 | STAMPROFILE StatTimeAddrConv;
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201 | STAMPROFILE StatTimeFlushPage;
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202 | STAMPROFILE StatTimeDisasm;
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203 | STAMPROFILE StatFlushDirtyPages;
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204 | STAMPROFILE StatCheckGates;
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205 | STAMCOUNTER StatCodePageModified;
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206 | STAMCOUNTER StatDangerousWrite;
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207 |
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208 | STAMCOUNTER StatInstrCacheHit;
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209 | STAMCOUNTER StatInstrCacheMiss;
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210 |
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211 | STAMCOUNTER StatPagePATM;
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212 | STAMCOUNTER StatPageCSAM;
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213 | STAMCOUNTER StatPageREM;
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214 | STAMCOUNTER StatNrUserPages;
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215 | STAMCOUNTER StatPageMonitor;
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216 | STAMCOUNTER StatPageRemoveREMFlush;
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217 |
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218 | STAMCOUNTER StatBitmapAlloc;
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219 |
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220 | STAMCOUNTER StatScanNextFunction;
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221 | STAMCOUNTER StatScanNextFunctionFailed;
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222 | } CSAM, *PCSAM;
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223 |
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224 | /**
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225 | * Call for analyzing the instructions following the privileged instr. for compliance with our heuristics
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226 | *
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227 | * @returns VBox status code.
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228 | * @param pVM The VM to operate on.
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229 | * @param pCpu CPU disassembly state
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230 | * @param pInstrHC Guest context pointer to privileged instruction
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231 | * @param pCurInstrGC Guest context pointer to current instruction
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232 | * @param pUserData User pointer
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233 | *
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234 | */
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235 | typedef int (VBOXCALL *PFN_CSAMR3ANALYSE)(PVM pVM, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, PCSAMP2GLOOKUPREC pCacheRec, void *pUserData);
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236 |
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237 | /**
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238 | * Check if the current instruction is the start of a known guest block that requires our attention
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239 | *
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240 | * @param pVM The VM to operate on.
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241 | * @param pInstrGC Guest context pointer of instruction to check
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242 | * @param pInstrHC Host context pointer of instruction to check
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243 | * @param opcode Opcode of instruction at pInstrGC
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244 | *
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245 | * @returns true if patched
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246 | *
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247 | */
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248 | bool csamCheckGuestSpecificPatch(PVM pVM, RTGCPTR pInstrGC, HCPTRTYPE(uint8_t *)pInstrHC, uint32_t opcode);
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249 |
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250 | /**
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251 | * Calculate the branch destination
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252 | *
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253 | * @returns branch destination or 0 if failed
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254 | * @param pCpu Disassembly state of instruction.
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255 | * @param pBranchInstrGC GC pointer of branch instruction
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256 | */
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257 | inline RTGCPTR CSAMResolveBranch(PDISCPUSTATE pCpu, RTGCPTR pBranchInstrGC)
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258 | {
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259 | uint32_t disp;
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260 | if (pCpu->param1.flags & USE_IMMEDIATE8_REL)
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261 | {
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262 | disp = (int32_t)(char)pCpu->param1.parval;
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263 | }
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264 | else
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265 | if (pCpu->param1.flags & USE_IMMEDIATE16_REL)
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266 | {
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267 | disp = (int32_t)(uint16_t)pCpu->param1.parval;
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268 | }
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269 | else
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270 | if (pCpu->param1.flags & USE_IMMEDIATE32_REL)
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271 | {
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272 | disp = (int32_t)pCpu->param1.parval;
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273 | }
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274 | else
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275 | {
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276 | Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.flags));
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277 | return 0;
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278 | }
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279 | #ifdef IN_GC
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280 | return (RTGCPTR)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);
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281 | #else
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282 | return pBranchInstrGC + pCpu->opsize + disp;
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283 | #endif
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284 | }
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285 |
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286 | __BEGIN_DECLS
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287 | CSAMGCDECL(int) CSAMGCCodePageWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);
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288 | __END_DECLS
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289 |
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290 | #endif
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