VirtualBox

source: vbox/trunk/src/VBox/VMM/PATM/CSAMInternal.h@ 552

Last change on this file since 552 was 518, checked in by vboxsync, 18 years ago

64-bit alignment in CSAM.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 8.6 KB
Line 
1/* $Id: CSAMInternal.h 518 2007-02-01 18:46:18Z vboxsync $ */
2/** @file
3 * CSAM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006 InnoTek Systemberatung GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22#ifndef __CSAMInternal_h__
23#define __CSAMInternal_h__
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/csam.h>
28#include <VBox/dis.h>
29#include <VBox/log.h>
30
31#if !defined(IN_CSAM_R3) && !defined(IN_CSAM_R0) && !defined(IN_CSAM_GC)
32# error "Not in CSAM! This is an internal header!"
33#endif
34
35/** Page flags.
36 * These are placed in the three bits available for system programs in
37 * the page entries.
38 * @{ */
39#ifndef PGM_PTFLAGS_CSAM_VALIDATED
40/** Scanned and approved by CSAM (tm). */
41/** NOTE: Must be identical to the one defined in PGMInternal.h!! */
42#define PGM_PTFLAGS_CSAM_VALIDATED BIT64(11)
43#endif
44
45/** @} */
46
47#define CSAM_SSM_VERSION 13
48
49#define CSAM_PGDIRBMP_CHUNKS 1024
50
51#define CSAM_PAGE_BITMAP_SIZE (PAGE_SIZE/(sizeof(uint8_t)*8))
52
53/* Maximum nr of dirty page that are cached. */
54#define CSAM_MAX_DIRTY_PAGES 32
55
56/* Maximum number of cached addresses of dangerous instructions that have been scanned before. */
57#define CSAM_MAX_DANGR_INSTR 16 /* power of two! */
58#define CSAM_MAX_DANGR_INSTR_MASK (CSAM_MAX_DANGR_INSTR-1)
59
60
61#define CSAM_MAX_CALLEXIT_RET 16
62
63/* copy from PATMInternal.h */
64#define SIZEOF_NEARJUMP32 5 //opcode byte + 4 byte relative offset
65
66typedef struct
67{
68 RTGCPTR pInstrAfterRetGC[CSAM_MAX_CALLEXIT_RET];
69 uint32_t cInstrAfterRet;
70} CSAMCALLEXITREC, *PCSAMCALLEXITREC;
71
72typedef struct
73{
74 HCPTRTYPE(uint8_t *) pPageLocStartHC;
75 HCPTRTYPE(uint8_t *) pPageLocEndHC;
76 GCPTRTYPE(uint8_t *) pGuestLoc;
77 uint32_t depth; //call/jump depth
78
79 PCSAMCALLEXITREC pCallExitRec;
80} CSAMP2GLOOKUPREC, *PCSAMP2GLOOKUPREC;
81
82typedef struct
83{
84 RTGCPTR pPageGC;
85 RTGCPHYS GCPhys;
86 uint64_t fFlags;
87 uint32_t uSize;
88
89 uint8_t *pBitmap;
90
91 bool fCode32;
92 bool fMonitorActive;
93 bool fMonitorInvalidation;
94
95 CSAMTAG enmTag;
96
97 uint64_t u64Hash;
98} CSAMPAGE, *PCSAMPAGE;
99
100typedef struct
101{
102 // GC Patch pointer
103 RTGCPTR pInstrGC;
104
105 // Disassembly state for original instruction
106 DISCPUSTATE cpu;
107
108 uint32_t uState;
109
110 PCSAMPAGE pPage;
111} CSAMPATCH, *PCSAMPATCH;
112
113/**
114 * Lookup record for CSAM pages
115 */
116typedef struct CSAMPAGEREC
117{
118 /** The key is a GC virtual address. */
119 AVLPVNODECORE Core;
120 CSAMPAGE page;
121
122} CSAMPAGEREC, *PCSAMPAGEREC;
123
124/**
125 * Lookup record for patches
126 */
127typedef struct CSAMPATCHREC
128{
129 /** The key is a GC virtual address. */
130 AVLPVNODECORE Core;
131 CSAMPATCH patch;
132
133} CSAMPATCHREC, *PCSAMPATCHREC;
134
135
136/**
137 * CSAM VM Instance data.
138 * Changes to this must checked against the padding of the CSAM union in VM!
139 * @note change SSM version when changing it!!
140 */
141typedef struct CSAM
142{
143 /** Offset to the VM structure.
144 * See CSAM2VM(). */
145 RTINT offVM;
146#if HC_ARCH_BITS == 64
147 RTINT Alignment0; /**< Align pPageTree correctly. */
148#endif
149
150 HCPTRTYPE(PAVLPVNODECORE) pPageTree;
151
152 /* Array to store previously scanned dangerous instructions, so we don't need to
153 * switch back to ring 3 each time we encounter them in GC.
154 */
155 RTGCPTR aDangerousInstr[CSAM_MAX_DANGR_INSTR];
156 uint32_t cDangerousInstr;
157 uint32_t iDangerousInstr;
158
159 GCPTRTYPE(RTGCPTR *) pPDBitmapGC;
160 GCPTRTYPE(RTHCPTR *) pPDHCBitmapGC;
161 HCPTRTYPE(uint8_t **) pPDBitmapHC;
162 HCPTRTYPE(RTGCPTR *) pPDGCBitmapHC;
163
164 /* Temporary storage during load/save state */
165 struct
166 {
167 HCPTRTYPE(PSSMHANDLE) pSSM;
168 uint32_t cPageRecords;
169 uint32_t cPatchPageRecords;
170 } savedstate;
171
172 /* To keep track of dirty pages */
173 uint32_t cDirtyPages;
174 RTGCPTR pvDirtyBasePage[CSAM_MAX_DIRTY_PAGES];
175 RTGCPTR pvDirtyFaultPage[CSAM_MAX_DIRTY_PAGES];
176
177 /* Set when scanning has started. */
178 bool fScanningStarted;
179
180 /* Set when the IDT gates have been checked for the first time. */
181 bool fGatesChecked;
182 bool Alignment1[2]; /**< Align the stats on an 8-byte boundrary. */
183
184 STAMCOUNTER StatNrTraps;
185 STAMCOUNTER StatNrPages;
186 STAMCOUNTER StatNrPagesInv;
187 STAMCOUNTER StatNrRemovedPages;
188 STAMCOUNTER StatNrPatchPages;
189 STAMCOUNTER StatNrPageNPHC;
190 STAMCOUNTER StatNrPageNPGC;
191 STAMCOUNTER StatNrFlushes;
192 STAMCOUNTER StatNrFlushesSkipped;
193 STAMCOUNTER StatNrKnownPagesHC;
194 STAMCOUNTER StatNrKnownPagesGC;
195 STAMCOUNTER StatNrInstr;
196 STAMCOUNTER StatNrBytesRead;
197 STAMCOUNTER StatNrOpcodeRead;
198 STAMPROFILE StatTime;
199 STAMPROFILE StatTimeCheckAddr;
200 STAMPROFILE StatTimeAddrConv;
201 STAMPROFILE StatTimeFlushPage;
202 STAMPROFILE StatTimeDisasm;
203 STAMPROFILE StatFlushDirtyPages;
204 STAMPROFILE StatCheckGates;
205 STAMCOUNTER StatCodePageModified;
206 STAMCOUNTER StatDangerousWrite;
207
208 STAMCOUNTER StatInstrCacheHit;
209 STAMCOUNTER StatInstrCacheMiss;
210
211 STAMCOUNTER StatPagePATM;
212 STAMCOUNTER StatPageCSAM;
213 STAMCOUNTER StatPageREM;
214 STAMCOUNTER StatNrUserPages;
215 STAMCOUNTER StatPageMonitor;
216 STAMCOUNTER StatPageRemoveREMFlush;
217
218 STAMCOUNTER StatBitmapAlloc;
219
220 STAMCOUNTER StatScanNextFunction;
221 STAMCOUNTER StatScanNextFunctionFailed;
222} CSAM, *PCSAM;
223
224/**
225 * Call for analyzing the instructions following the privileged instr. for compliance with our heuristics
226 *
227 * @returns VBox status code.
228 * @param pVM The VM to operate on.
229 * @param pCpu CPU disassembly state
230 * @param pInstrHC Guest context pointer to privileged instruction
231 * @param pCurInstrGC Guest context pointer to current instruction
232 * @param pUserData User pointer
233 *
234 */
235typedef int (VBOXCALL *PFN_CSAMR3ANALYSE)(PVM pVM, DISCPUSTATE *pCpu, GCPTRTYPE(uint8_t *) pInstrGC, GCPTRTYPE(uint8_t *) pCurInstrGC, PCSAMP2GLOOKUPREC pCacheRec, void *pUserData);
236
237/**
238 * Check if the current instruction is the start of a known guest block that requires our attention
239 *
240 * @param pVM The VM to operate on.
241 * @param pInstrGC Guest context pointer of instruction to check
242 * @param pInstrHC Host context pointer of instruction to check
243 * @param opcode Opcode of instruction at pInstrGC
244 *
245 * @returns true if patched
246 *
247 */
248bool csamCheckGuestSpecificPatch(PVM pVM, RTGCPTR pInstrGC, HCPTRTYPE(uint8_t *)pInstrHC, uint32_t opcode);
249
250/**
251 * Calculate the branch destination
252 *
253 * @returns branch destination or 0 if failed
254 * @param pCpu Disassembly state of instruction.
255 * @param pBranchInstrGC GC pointer of branch instruction
256 */
257inline RTGCPTR CSAMResolveBranch(PDISCPUSTATE pCpu, RTGCPTR pBranchInstrGC)
258{
259 uint32_t disp;
260 if (pCpu->param1.flags & USE_IMMEDIATE8_REL)
261 {
262 disp = (int32_t)(char)pCpu->param1.parval;
263 }
264 else
265 if (pCpu->param1.flags & USE_IMMEDIATE16_REL)
266 {
267 disp = (int32_t)(uint16_t)pCpu->param1.parval;
268 }
269 else
270 if (pCpu->param1.flags & USE_IMMEDIATE32_REL)
271 {
272 disp = (int32_t)pCpu->param1.parval;
273 }
274 else
275 {
276 Log(("We don't support far jumps here!! (%08X)\n", pCpu->param1.flags));
277 return 0;
278 }
279#ifdef IN_GC
280 return (RTGCPTR)((uint8_t *)pBranchInstrGC + pCpu->opsize + disp);
281#else
282 return pBranchInstrGC + pCpu->opsize + disp;
283#endif
284}
285
286__BEGIN_DECLS
287CSAMGCDECL(int) CSAMGCCodePageWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPTR pvRange, uintptr_t offRange);
288__END_DECLS
289
290#endif
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette