1 | /* $Id: PATMPatch.cpp 12285 2008-09-09 11:25:23Z vboxsync $ */
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2 | /** @file
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3 | * PATMPatch - Dynamic Guest OS Instruction patches
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4 | *
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5 | * NOTE: CSAM assumes patch memory is never reused!!
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6 | */
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7 |
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8 | /*
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9 | * Copyright (C) 2006-2007 Sun Microsystems, Inc.
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10 | *
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11 | * This file is part of VirtualBox Open Source Edition (OSE), as
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12 | * available from http://www.virtualbox.org. This file is free software;
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13 | * you can redistribute it and/or modify it under the terms of the GNU
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14 | * General Public License (GPL) as published by the Free Software
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15 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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16 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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17 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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18 | *
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19 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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20 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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21 | * additional information or have any questions.
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22 | */
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23 |
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24 | /*******************************************************************************
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25 | * Header Files *
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26 | *******************************************************************************/
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27 | #define LOG_GROUP LOG_GROUP_PATM
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28 | #include <VBox/patm.h>
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29 | #include <VBox/stam.h>
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30 | #include <VBox/pgm.h>
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31 | #include <VBox/cpum.h>
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32 | #include <VBox/iom.h>
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33 | #include <VBox/sup.h>
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34 | #include <VBox/mm.h>
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35 | #include <VBox/ssm.h>
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36 | #include <VBox/pdm.h>
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37 | #include <VBox/trpm.h>
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38 | #include <VBox/param.h>
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39 | #include <iprt/avl.h>
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40 | #include "PATMInternal.h"
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41 | #include <VBox/vm.h>
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42 | #include <VBox/csam.h>
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43 |
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44 | #include <VBox/dbg.h>
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45 | #include <VBox/err.h>
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46 | #include <VBox/log.h>
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47 | #include <iprt/assert.h>
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48 | #include <iprt/asm.h>
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49 | #include <iprt/string.h>
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50 | #include <VBox/dis.h>
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51 | #include <VBox/disopcode.h>
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52 |
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53 | #include <stdlib.h>
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54 | #include <stdio.h>
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55 | #include "PATMA.h"
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56 | #include "PATMPatch.h"
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57 |
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58 | /* internal structure for passing more information about call fixups to patmPatchGenCode */
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59 | typedef struct
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60 | {
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61 | RTRCPTR pTargetGC;
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62 | RTRCPTR pCurInstrGC;
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63 | RTRCPTR pNextInstrGC;
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64 | RTRCPTR pReturnGC;
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65 | } PATMCALLINFO, *PPATMCALLINFO;
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66 |
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67 | int patmPatchAddReloc32(PVM pVM, PPATCHINFO pPatch, uint8_t *pRelocHC, uint32_t uType, RTRCPTR pSource, RTRCPTR pDest)
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68 | {
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69 | PRELOCREC pRec;
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70 |
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71 | Assert(uType == FIXUP_ABSOLUTE || ((uType == FIXUP_REL_JMPTOPATCH || uType == FIXUP_REL_JMPTOGUEST) && pSource && pDest));
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72 |
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73 | LogFlow(("patmPatchAddReloc32 type=%d pRelocGC=%VRv source=%VRv dest=%VRv\n", uType, pRelocHC - pVM->patm.s.pPatchMemGC + pVM->patm.s.pPatchMemGC , pSource, pDest));
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74 |
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75 | pRec = (PRELOCREC)MMR3HeapAllocZ(pVM, MM_TAG_PATM_PATCH, sizeof(*pRec));
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76 | Assert(pRec);
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77 | pRec->Core.Key = (AVLPVKEY)pRelocHC;
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78 | pRec->pRelocPos = pRelocHC; /* @todo redundant. */
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79 | pRec->pSource = pSource;
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80 | pRec->pDest = pDest;
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81 | pRec->uType = uType;
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82 |
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83 | bool ret = RTAvlPVInsert(&pPatch->FixupTree, &pRec->Core);
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84 | Assert(ret); NOREF(ret);
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85 | pPatch->nrFixups++;
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86 |
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87 | return VINF_SUCCESS;
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88 | }
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89 |
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90 | int patmPatchAddJump(PVM pVM, PPATCHINFO pPatch, uint8_t *pJumpHC, uint32_t offset, RTRCPTR pTargetGC, uint32_t opcode)
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91 | {
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92 | PJUMPREC pRec;
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93 |
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94 | pRec = (PJUMPREC)MMR3HeapAllocZ(pVM, MM_TAG_PATM_PATCH, sizeof(*pRec));
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95 | Assert(pRec);
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96 |
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97 | pRec->Core.Key = (AVLPVKEY)pJumpHC;
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98 | pRec->pJumpHC = pJumpHC; /* @todo redundant. */
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99 | pRec->offDispl = offset;
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100 | pRec->pTargetGC = pTargetGC;
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101 | pRec->opcode = opcode;
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102 |
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103 | bool ret = RTAvlPVInsert(&pPatch->JumpTree, &pRec->Core);
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104 | Assert(ret); NOREF(ret);
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105 | pPatch->nrJumpRecs++;
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106 |
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107 | return VINF_SUCCESS;
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108 | }
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109 |
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110 | #define PATCHGEN_PROLOG_NODEF(pVM, pPatch) \
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111 | pPB = PATCHCODE_PTR_HC(pPatch) + pPatch->uCurPatchOffset; \
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112 | \
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113 | if (pPB + 256 >= pVM->patm.s.pPatchMemHC + pVM->patm.s.cbPatchMem) \
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114 | { \
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115 | pVM->patm.s.fOutOfMemory = true; \
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116 | Assert(pPB + 256 >= pVM->patm.s.pPatchMemHC + pVM->patm.s.cbPatchMem); \
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117 | return VERR_NO_MEMORY; \
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118 | }
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119 |
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120 | #define PATCHGEN_PROLOG(pVM, pPatch) \
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121 | uint8_t *pPB; \
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122 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
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123 |
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124 |
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125 | #define PATCHGEN_EPILOG(pPatch, size) \
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126 | Assert(size <= 640); \
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127 | pPatch->uCurPatchOffset += size;
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128 |
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129 |
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130 | static uint32_t patmPatchGenCode(PVM pVM, PPATCHINFO pPatch, uint8_t *pPB, PPATCHASMRECORD pAsmRecord, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fGenJump,
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131 | PPATMCALLINFO pCallInfo = 0)
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132 | {
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133 | uint32_t i, j;
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134 |
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135 | Assert(fGenJump == false || pReturnAddrGC);
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136 | Assert(fGenJump == false || pAsmRecord->offJump);
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137 | Assert(pAsmRecord && pAsmRecord->size > sizeof(pAsmRecord->uReloc[0]));
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138 |
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139 | // Copy the code block
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140 | memcpy(pPB, pAsmRecord->pFunction, pAsmRecord->size);
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141 |
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142 | // Process all fixups
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143 | for (j=0,i=0;i<pAsmRecord->nrRelocs*2; i+=2)
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144 | {
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145 | for (;j<pAsmRecord->size;j++)
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146 | {
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147 | if (*(uint32_t*)&pPB[j] == pAsmRecord->uReloc[i])
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148 | {
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149 | RCPTRTYPE(uint32_t *) dest;
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150 |
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151 | #ifdef VBOX_STRICT
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152 | if (pAsmRecord->uReloc[i] == PATM_FIXUP)
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153 | Assert(pAsmRecord->uReloc[i+1] != 0);
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154 | else
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155 | Assert(pAsmRecord->uReloc[i+1] == 0);
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156 | #endif
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157 |
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158 | /**
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159 | * BE VERY CAREFUL WITH THESE FIXUPS. TAKE INTO ACCOUNT THAT PROBLEMS MAY ARISE WHEN RESTORING A SAVED STATE WITH
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160 | * A DIFFERENT HYPERVISOR LAYOUT.
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161 | */
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162 | switch (pAsmRecord->uReloc[i])
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163 | {
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164 | case PATM_VMFLAGS:
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165 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uVMFlags);
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166 | break;
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167 |
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168 | case PATM_PENDINGACTION:
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169 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uPendingAction);
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170 | break;
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171 |
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172 | case PATM_FIXUP:
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173 | /* Offset in uReloc[i+1] is from the base of the function. */
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174 | dest = (RTGCUINTPTR32)pVM->patm.s.pPatchMemGC + pAsmRecord->uReloc[i+1] + (RTGCUINTPTR32)(pPB - pVM->patm.s.pPatchMemHC);
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175 | break;
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176 | #ifdef VBOX_WITH_STATISTICS
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177 | case PATM_ALLPATCHCALLS:
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178 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uPatchCalls);
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179 | break;
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180 |
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181 | case PATM_IRETEFLAGS:
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182 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uIretEFlags);
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183 | break;
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184 |
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185 | case PATM_IRETCS:
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186 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uIretCS);
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187 | break;
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188 |
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189 | case PATM_IRETEIP:
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190 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, uIretEIP);
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191 | break;
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192 |
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193 | case PATM_PERPATCHCALLS:
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194 | dest = patmPatchQueryStatAddress(pVM, pPatch);
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195 | break;
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196 | #endif
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197 | case PATM_STACKPTR:
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198 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Psp);
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199 | break;
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200 |
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201 | /* The first part of our PATM stack is used to store offsets of patch return addresses; the 2nd
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202 | * part to store the original return addresses.
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203 | */
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204 | case PATM_STACKBASE:
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205 | dest = pVM->patm.s.pGCStackGC;
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206 | break;
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207 |
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208 | case PATM_STACKBASE_GUEST:
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209 | dest = pVM->patm.s.pGCStackGC + PATM_STACK_SIZE;
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210 | break;
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211 |
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212 | case PATM_RETURNADDR: /* absolute guest address; no fixup required */
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213 | Assert(pCallInfo && pAsmRecord->uReloc[i] >= PATM_NO_FIXUP);
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214 | dest = pCallInfo->pReturnGC;
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215 | break;
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216 |
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217 | case PATM_PATCHNEXTBLOCK: /* relative address of instruction following this block */
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218 | Assert(pCallInfo && pAsmRecord->uReloc[i] >= PATM_NO_FIXUP);
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219 |
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220 | /** @note hardcoded assumption that we must return to the instruction following this block */
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221 | dest = (uintptr_t)pPB - (uintptr_t)pVM->patm.s.pPatchMemHC + pAsmRecord->size;
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222 | break;
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223 |
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224 | case PATM_CALLTARGET: /* relative to patch address; no fixup requird */
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225 | Assert(pCallInfo && pAsmRecord->uReloc[i] >= PATM_NO_FIXUP);
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226 |
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227 | /* Address must be filled in later. (see patmr3SetBranchTargets) */
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228 | patmPatchAddJump(pVM, pPatch, &pPB[j-1], 1, pCallInfo->pTargetGC, OP_CALL);
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229 | dest = PATM_ILLEGAL_DESTINATION;
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230 | break;
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231 |
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232 | case PATM_PATCHBASE: /* Patch GC base address */
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233 | dest = pVM->patm.s.pPatchMemGC;
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234 | break;
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235 |
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236 | case PATM_CPUID_STD_PTR:
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237 | /* @todo dirty hack when correcting this fixup (state restore) */
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238 | dest = CPUMGetGuestCpuIdStdGCPtr(pVM);
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239 | break;
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240 |
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241 | case PATM_CPUID_EXT_PTR:
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242 | /* @todo dirty hack when correcting this fixup (state restore) */
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243 | dest = CPUMGetGuestCpuIdExtGCPtr(pVM);
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244 | break;
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245 |
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246 | case PATM_CPUID_CENTAUR_PTR:
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247 | /* @todo dirty hack when correcting this fixup (state restore) */
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248 | dest = CPUMGetGuestCpuIdCentaurGCPtr(pVM);
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249 | break;
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250 |
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251 | case PATM_CPUID_DEF_PTR:
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252 | /* @todo dirty hack when correcting this fixup (state restore) */
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253 | dest = CPUMGetGuestCpuIdDefGCPtr(pVM);
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254 | break;
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255 |
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256 | case PATM_CPUID_STD_MAX:
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257 | dest = CPUMGetGuestCpuIdStdMax(pVM);
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258 | break;
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259 |
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260 | case PATM_CPUID_EXT_MAX:
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261 | dest = CPUMGetGuestCpuIdExtMax(pVM);
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262 | break;
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263 |
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264 | case PATM_CPUID_CENTAUR_MAX:
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265 | dest = CPUMGetGuestCpuIdCentaurMax(pVM);
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266 | break;
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267 |
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268 | case PATM_INTERRUPTFLAG:
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269 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, fPIF);
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270 | break;
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271 |
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272 | case PATM_INHIBITIRQADDR:
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273 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, GCPtrInhibitInterrupts);
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274 | break;
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275 |
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276 | case PATM_NEXTINSTRADDR:
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277 | Assert(pCallInfo);
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278 | /* pNextInstrGC can be 0 if several instructions, that inhibit irqs, follow each other */
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279 | dest = pCallInfo->pNextInstrGC;
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280 | break;
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281 |
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282 | case PATM_CURINSTRADDR:
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283 | Assert(pCallInfo);
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284 | dest = pCallInfo->pCurInstrGC;
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285 | break;
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286 |
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287 | case PATM_VM_FORCEDACTIONS:
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288 | /* @todo dirty assumptions when correcting this fixup during saved state loading. */
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289 | dest = pVM->pVMGC + RT_OFFSETOF(VM, fForcedActions);
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290 | break;
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291 |
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292 | case PATM_TEMP_EAX:
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293 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Restore.uEAX);
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294 | break;
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295 | case PATM_TEMP_ECX:
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296 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Restore.uECX);
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297 | break;
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298 | case PATM_TEMP_EDI:
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299 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Restore.uEDI);
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300 | break;
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301 | case PATM_TEMP_EFLAGS:
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302 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Restore.eFlags);
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303 | break;
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304 | case PATM_TEMP_RESTORE_FLAGS:
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305 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, Restore.uFlags);
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306 | break;
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307 | case PATM_CALL_PATCH_TARGET_ADDR:
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308 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, GCCallPatchTargetAddr);
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309 | break;
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310 | case PATM_CALL_RETURN_ADDR:
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311 | dest = pVM->patm.s.pGCStateGC + RT_OFFSETOF(PATMGCSTATE, GCCallReturnAddr);
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312 | break;
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313 |
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314 | /* Relative address of global patm lookup and call function. */
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315 | case PATM_LOOKUP_AND_CALL_FUNCTION:
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316 | {
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317 | RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC);
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318 | Assert(pVM->patm.s.pfnHelperCallGC);
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319 | Assert(sizeof(uint32_t) == sizeof(RTRCPTR));
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320 |
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321 | /* Relative value is target minus address of instruction after the actual call instruction. */
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322 | dest = pVM->patm.s.pfnHelperCallGC - pInstrAfterCall;
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323 | break;
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324 | }
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325 |
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326 | case PATM_RETURN_FUNCTION:
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327 | {
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328 | RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC);
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329 | Assert(pVM->patm.s.pfnHelperRetGC);
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330 | Assert(sizeof(uint32_t) == sizeof(RTRCPTR));
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331 |
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332 | /* Relative value is target minus address of instruction after the actual call instruction. */
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333 | dest = pVM->patm.s.pfnHelperRetGC - pInstrAfterCall;
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334 | break;
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335 | }
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336 |
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337 | case PATM_IRET_FUNCTION:
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338 | {
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339 | RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC);
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340 | Assert(pVM->patm.s.pfnHelperIretGC);
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341 | Assert(sizeof(uint32_t) == sizeof(RTRCPTR));
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342 |
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343 | /* Relative value is target minus address of instruction after the actual call instruction. */
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344 | dest = pVM->patm.s.pfnHelperIretGC - pInstrAfterCall;
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345 | break;
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346 | }
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347 |
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348 | case PATM_LOOKUP_AND_JUMP_FUNCTION:
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349 | {
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350 | RTRCPTR pInstrAfterCall = pVM->patm.s.pPatchMemGC + (RTGCUINTPTR32)(&pPB[j] + sizeof(RTRCPTR) - pVM->patm.s.pPatchMemHC);
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351 | Assert(pVM->patm.s.pfnHelperJumpGC);
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352 | Assert(sizeof(uint32_t) == sizeof(RTRCPTR));
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353 |
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354 | /* Relative value is target minus address of instruction after the actual call instruction. */
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355 | dest = pVM->patm.s.pfnHelperJumpGC - pInstrAfterCall;
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356 | break;
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357 | }
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358 |
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359 | default:
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360 | dest = PATM_ILLEGAL_DESTINATION;
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361 | AssertRelease(0);
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362 | break;
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363 | }
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364 |
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365 | *(RTRCPTR *)&pPB[j] = dest;
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366 | if (pAsmRecord->uReloc[i] < PATM_NO_FIXUP)
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367 | {
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368 | patmPatchAddReloc32(pVM, pPatch, &pPB[j], FIXUP_ABSOLUTE);
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369 | }
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370 | break;
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371 | }
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372 | }
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373 | Assert(j < pAsmRecord->size);
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374 | }
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375 | Assert(pAsmRecord->uReloc[i] == 0xffffffff);
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376 |
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377 | /* Add the jump back to guest code (if required) */
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378 | if (fGenJump)
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379 | {
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380 | int32_t displ = pReturnAddrGC - (PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset + pAsmRecord->offJump - 1 + SIZEOF_NEARJUMP32);
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381 |
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382 | /* Add lookup record for patch to guest address translation */
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383 | Assert(pPB[pAsmRecord->offJump - 1] == 0xE9);
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384 | patmr3AddP2GLookupRecord(pVM, pPatch, &pPB[pAsmRecord->offJump - 1], pReturnAddrGC, PATM_LOOKUP_PATCH2GUEST);
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385 |
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386 | *(uint32_t *)&pPB[pAsmRecord->offJump] = displ;
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387 | patmPatchAddReloc32(pVM, pPatch, &pPB[pAsmRecord->offJump], FIXUP_REL_JMPTOGUEST,
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388 | PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset + pAsmRecord->offJump - 1 + SIZEOF_NEARJUMP32,
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389 | pReturnAddrGC);
|
---|
390 | }
|
---|
391 |
|
---|
392 | // Calculate the right size of this patch block
|
---|
393 | if ((fGenJump && pAsmRecord->offJump) || (!fGenJump && !pAsmRecord->offJump))
|
---|
394 | {
|
---|
395 | return pAsmRecord->size;
|
---|
396 | }
|
---|
397 | else {
|
---|
398 | // if a jump instruction is present and we don't want one, then subtract SIZEOF_NEARJUMP32
|
---|
399 | return pAsmRecord->size - SIZEOF_NEARJUMP32;
|
---|
400 | }
|
---|
401 | }
|
---|
402 |
|
---|
403 | /* Read bytes and check for overwritten instructions. */
|
---|
404 | static int patmPatchReadBytes(PVM pVM, uint8_t *pDest, RTRCPTR pSrc, uint32_t cb)
|
---|
405 | {
|
---|
406 | int rc = PGMPhysReadGCPtr(pVM, pDest, pSrc, cb);
|
---|
407 | AssertRCReturn(rc, rc);
|
---|
408 | /*
|
---|
409 | * Could be patched already; make sure this is checked!
|
---|
410 | */
|
---|
411 | for (uint32_t i=0;i<cb;i++)
|
---|
412 | {
|
---|
413 | uint8_t temp;
|
---|
414 |
|
---|
415 | int rc2 = PATMR3QueryOpcode(pVM, pSrc+i, &temp);
|
---|
416 | if (VBOX_SUCCESS(rc2))
|
---|
417 | {
|
---|
418 | pDest[i] = temp;
|
---|
419 | }
|
---|
420 | else
|
---|
421 | break; /* no more */
|
---|
422 | }
|
---|
423 | return VINF_SUCCESS;
|
---|
424 | }
|
---|
425 |
|
---|
426 | int patmPatchGenDuplicate(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pCurInstrGC)
|
---|
427 | {
|
---|
428 | int rc = VINF_SUCCESS;
|
---|
429 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
430 |
|
---|
431 | rc = patmPatchReadBytes(pVM, pPB, pCurInstrGC, pCpu->opsize);
|
---|
432 | AssertRC(rc);
|
---|
433 | PATCHGEN_EPILOG(pPatch, pCpu->opsize);
|
---|
434 | return rc;
|
---|
435 | }
|
---|
436 |
|
---|
437 | int patmPatchGenIret(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, bool fSizeOverride)
|
---|
438 | {
|
---|
439 | uint32_t size;
|
---|
440 | PATMCALLINFO callInfo;
|
---|
441 |
|
---|
442 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
443 |
|
---|
444 | AssertMsg(fSizeOverride == false, ("operand size override!!\n"));
|
---|
445 |
|
---|
446 | callInfo.pCurInstrGC = pCurInstrGC;
|
---|
447 |
|
---|
448 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMIretRecord, 0, false, &callInfo);
|
---|
449 |
|
---|
450 | PATCHGEN_EPILOG(pPatch, size);
|
---|
451 | return VINF_SUCCESS;
|
---|
452 | }
|
---|
453 |
|
---|
454 | int patmPatchGenCli(PVM pVM, PPATCHINFO pPatch)
|
---|
455 | {
|
---|
456 | uint32_t size;
|
---|
457 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
458 |
|
---|
459 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMCliRecord, 0, false);
|
---|
460 |
|
---|
461 | PATCHGEN_EPILOG(pPatch, size);
|
---|
462 | return VINF_SUCCESS;
|
---|
463 | }
|
---|
464 |
|
---|
465 | /*
|
---|
466 | * Generate an STI patch
|
---|
467 | */
|
---|
468 | int patmPatchGenSti(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, RTRCPTR pNextInstrGC)
|
---|
469 | {
|
---|
470 | PATMCALLINFO callInfo;
|
---|
471 | uint32_t size;
|
---|
472 |
|
---|
473 | Log(("patmPatchGenSti at %VRv; next %VRv\n", pCurInstrGC, pNextInstrGC));
|
---|
474 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
475 | callInfo.pNextInstrGC = pNextInstrGC;
|
---|
476 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMStiRecord, 0, false, &callInfo);
|
---|
477 | PATCHGEN_EPILOG(pPatch, size);
|
---|
478 |
|
---|
479 | return VINF_SUCCESS;
|
---|
480 | }
|
---|
481 |
|
---|
482 |
|
---|
483 | int patmPatchGenPopf(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fSizeOverride, bool fGenJumpBack)
|
---|
484 | {
|
---|
485 | uint32_t size;
|
---|
486 | PATMCALLINFO callInfo;
|
---|
487 |
|
---|
488 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
489 |
|
---|
490 | callInfo.pNextInstrGC = pReturnAddrGC;
|
---|
491 |
|
---|
492 | Log(("patmPatchGenPopf at %VRv\n", pReturnAddrGC));
|
---|
493 |
|
---|
494 | /* Note: keep IOPL in mind when changing any of this!! (see comments in PATMA.asm, PATMPopf32Replacement) */
|
---|
495 | if (fSizeOverride == true)
|
---|
496 | {
|
---|
497 | Log(("operand size override!!\n"));
|
---|
498 | size = patmPatchGenCode(pVM, pPatch, pPB, (fGenJumpBack) ? &PATMPopf16Record : &PATMPopf16Record_NoExit , pReturnAddrGC, fGenJumpBack, &callInfo);
|
---|
499 | }
|
---|
500 | else
|
---|
501 | {
|
---|
502 | size = patmPatchGenCode(pVM, pPatch, pPB, (fGenJumpBack) ? &PATMPopf32Record : &PATMPopf32Record_NoExit, pReturnAddrGC, fGenJumpBack, &callInfo);
|
---|
503 | }
|
---|
504 |
|
---|
505 | PATCHGEN_EPILOG(pPatch, size);
|
---|
506 | STAM_COUNTER_INC(&pVM->patm.s.StatGenPopf);
|
---|
507 | return VINF_SUCCESS;
|
---|
508 | }
|
---|
509 |
|
---|
510 | int patmPatchGenPushf(PVM pVM, PPATCHINFO pPatch, bool fSizeOverride)
|
---|
511 | {
|
---|
512 | uint32_t size;
|
---|
513 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
514 |
|
---|
515 | if (fSizeOverride == true)
|
---|
516 | {
|
---|
517 | Log(("operand size override!!\n"));
|
---|
518 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMPushf16Record, 0, false);
|
---|
519 | }
|
---|
520 | else
|
---|
521 | {
|
---|
522 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMPushf32Record, 0, false);
|
---|
523 | }
|
---|
524 |
|
---|
525 | PATCHGEN_EPILOG(pPatch, size);
|
---|
526 | return VINF_SUCCESS;
|
---|
527 | }
|
---|
528 |
|
---|
529 | int patmPatchGenPushCS(PVM pVM, PPATCHINFO pPatch)
|
---|
530 | {
|
---|
531 | uint32_t size;
|
---|
532 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
533 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMPushCSRecord, 0, false);
|
---|
534 | PATCHGEN_EPILOG(pPatch, size);
|
---|
535 | return VINF_SUCCESS;
|
---|
536 | }
|
---|
537 |
|
---|
538 | int patmPatchGenLoop(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride)
|
---|
539 | {
|
---|
540 | uint32_t size = 0;
|
---|
541 | PPATCHASMRECORD pPatchAsmRec;
|
---|
542 |
|
---|
543 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
544 |
|
---|
545 | switch (opcode)
|
---|
546 | {
|
---|
547 | case OP_LOOP:
|
---|
548 | pPatchAsmRec = &PATMLoopRecord;
|
---|
549 | break;
|
---|
550 | case OP_LOOPNE:
|
---|
551 | pPatchAsmRec = &PATMLoopNZRecord;
|
---|
552 | break;
|
---|
553 | case OP_LOOPE:
|
---|
554 | pPatchAsmRec = &PATMLoopZRecord;
|
---|
555 | break;
|
---|
556 | case OP_JECXZ:
|
---|
557 | pPatchAsmRec = &PATMJEcxRecord;
|
---|
558 | break;
|
---|
559 | default:
|
---|
560 | AssertMsgFailed(("PatchGenLoop: invalid opcode %d\n", opcode));
|
---|
561 | return VERR_INVALID_PARAMETER;
|
---|
562 | }
|
---|
563 | Assert(pPatchAsmRec->offSizeOverride && pPatchAsmRec->offRelJump);
|
---|
564 |
|
---|
565 | Log(("PatchGenLoop %d jump %d to %08x offrel=%d\n", opcode, pPatch->nrJumpRecs, pTargetGC, pPatchAsmRec->offRelJump));
|
---|
566 |
|
---|
567 | // Generate the patch code
|
---|
568 | size = patmPatchGenCode(pVM, pPatch, pPB, pPatchAsmRec, 0, false);
|
---|
569 |
|
---|
570 | if (fSizeOverride)
|
---|
571 | {
|
---|
572 | pPB[pPatchAsmRec->offSizeOverride] = 0x66; // ecx -> cx or vice versa
|
---|
573 | }
|
---|
574 |
|
---|
575 | *(RTRCPTR *)&pPB[pPatchAsmRec->offRelJump] = 0xDEADBEEF;
|
---|
576 |
|
---|
577 | patmPatchAddJump(pVM, pPatch, &pPB[pPatchAsmRec->offRelJump - 1], 1, pTargetGC, opcode);
|
---|
578 |
|
---|
579 | PATCHGEN_EPILOG(pPatch, size);
|
---|
580 | return VINF_SUCCESS;
|
---|
581 | }
|
---|
582 |
|
---|
583 | int patmPatchGenRelJump(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pTargetGC, uint32_t opcode, bool fSizeOverride)
|
---|
584 | {
|
---|
585 | uint32_t offset = 0;
|
---|
586 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
587 |
|
---|
588 | // internal relative jumps from patch code to patch code; no relocation record required
|
---|
589 |
|
---|
590 | Assert(PATMIsPatchGCAddr(pVM, pTargetGC) == false);
|
---|
591 |
|
---|
592 | switch (opcode)
|
---|
593 | {
|
---|
594 | case OP_JO:
|
---|
595 | pPB[1] = 0x80;
|
---|
596 | break;
|
---|
597 | case OP_JNO:
|
---|
598 | pPB[1] = 0x81;
|
---|
599 | break;
|
---|
600 | case OP_JC:
|
---|
601 | pPB[1] = 0x82;
|
---|
602 | break;
|
---|
603 | case OP_JNC:
|
---|
604 | pPB[1] = 0x83;
|
---|
605 | break;
|
---|
606 | case OP_JE:
|
---|
607 | pPB[1] = 0x84;
|
---|
608 | break;
|
---|
609 | case OP_JNE:
|
---|
610 | pPB[1] = 0x85;
|
---|
611 | break;
|
---|
612 | case OP_JBE:
|
---|
613 | pPB[1] = 0x86;
|
---|
614 | break;
|
---|
615 | case OP_JNBE:
|
---|
616 | pPB[1] = 0x87;
|
---|
617 | break;
|
---|
618 | case OP_JS:
|
---|
619 | pPB[1] = 0x88;
|
---|
620 | break;
|
---|
621 | case OP_JNS:
|
---|
622 | pPB[1] = 0x89;
|
---|
623 | break;
|
---|
624 | case OP_JP:
|
---|
625 | pPB[1] = 0x8A;
|
---|
626 | break;
|
---|
627 | case OP_JNP:
|
---|
628 | pPB[1] = 0x8B;
|
---|
629 | break;
|
---|
630 | case OP_JL:
|
---|
631 | pPB[1] = 0x8C;
|
---|
632 | break;
|
---|
633 | case OP_JNL:
|
---|
634 | pPB[1] = 0x8D;
|
---|
635 | break;
|
---|
636 | case OP_JLE:
|
---|
637 | pPB[1] = 0x8E;
|
---|
638 | break;
|
---|
639 | case OP_JNLE:
|
---|
640 | pPB[1] = 0x8F;
|
---|
641 | break;
|
---|
642 |
|
---|
643 | case OP_JMP:
|
---|
644 | /* If interrupted here, then jump to the target instruction. Used by PATM.cpp for jumping to known instructions. */
|
---|
645 | /* Add lookup record for patch to guest address translation */
|
---|
646 | patmr3AddP2GLookupRecord(pVM, pPatch, pPB, pTargetGC, PATM_LOOKUP_PATCH2GUEST);
|
---|
647 |
|
---|
648 | pPB[0] = 0xE9;
|
---|
649 | break;
|
---|
650 |
|
---|
651 | case OP_JECXZ:
|
---|
652 | case OP_LOOP:
|
---|
653 | case OP_LOOPNE:
|
---|
654 | case OP_LOOPE:
|
---|
655 | return patmPatchGenLoop(pVM, pPatch, pTargetGC, opcode, fSizeOverride);
|
---|
656 |
|
---|
657 | default:
|
---|
658 | AssertMsg(0, ("Invalid jump opcode %d\n", opcode));
|
---|
659 | return VERR_PATCHING_REFUSED;
|
---|
660 | }
|
---|
661 | if (opcode != OP_JMP)
|
---|
662 | {
|
---|
663 | pPB[0] = 0xF;
|
---|
664 | offset += 2;
|
---|
665 | }
|
---|
666 | else offset++;
|
---|
667 |
|
---|
668 | *(RTRCPTR *)&pPB[offset] = 0xDEADBEEF;
|
---|
669 |
|
---|
670 | patmPatchAddJump(pVM, pPatch, pPB, offset, pTargetGC, opcode);
|
---|
671 |
|
---|
672 | offset += sizeof(RTRCPTR);
|
---|
673 |
|
---|
674 | PATCHGEN_EPILOG(pPatch, offset);
|
---|
675 | return VINF_SUCCESS;
|
---|
676 | }
|
---|
677 |
|
---|
678 | /*
|
---|
679 | * Rewrite call to dynamic or currently unknown function (on-demand patching of function)
|
---|
680 | */
|
---|
681 | int patmPatchGenCall(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC, RTRCPTR pTargetGC, bool fIndirect)
|
---|
682 | {
|
---|
683 | PATMCALLINFO callInfo;
|
---|
684 | uint32_t offset;
|
---|
685 | uint32_t i, size;
|
---|
686 | int rc;
|
---|
687 |
|
---|
688 | /** @note Don't check for IF=1 here. The ret instruction will do this. */
|
---|
689 | /** @note It's dangerous to do this for 'normal' patches. the jump target might be inside the generated patch jump. (seen this!) */
|
---|
690 |
|
---|
691 | /* 1: Clear PATM interrupt flag on entry. */
|
---|
692 | rc = patmPatchGenClearPIF(pVM, pPatch, pCurInstrGC);
|
---|
693 | if (rc == VERR_NO_MEMORY)
|
---|
694 | return rc;
|
---|
695 | AssertRCReturn(rc, rc);
|
---|
696 |
|
---|
697 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
698 | /* 2: We must push the target address onto the stack before appending the indirect call code. */
|
---|
699 |
|
---|
700 | if (fIndirect)
|
---|
701 | {
|
---|
702 | Log(("patmPatchGenIndirectCall\n"));
|
---|
703 | Assert(pCpu->param1.size == 4);
|
---|
704 | Assert(OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J);
|
---|
705 |
|
---|
706 | /* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause
|
---|
707 | * a page fault. The assembly code restores the stack afterwards.
|
---|
708 | */
|
---|
709 | offset = 0;
|
---|
710 | /* include prefix byte to make sure we don't use the incorrect selector register. */
|
---|
711 | if (pCpu->prefix & PREFIX_SEG)
|
---|
712 | pPB[offset++] = DISQuerySegPrefixByte(pCpu);
|
---|
713 | pPB[offset++] = 0xFF; // push r/m32
|
---|
714 | pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, 6 /* group 5 */, pCpu->ModRM.Bits.Rm);
|
---|
715 | i = 2; /* standard offset of modrm bytes */
|
---|
716 | if (pCpu->prefix & PREFIX_OPSIZE)
|
---|
717 | i++; //skip operand prefix
|
---|
718 | if (pCpu->prefix & PREFIX_SEG)
|
---|
719 | i++; //skip segment prefix
|
---|
720 |
|
---|
721 | rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
|
---|
722 | AssertRCReturn(rc, rc);
|
---|
723 | offset += (pCpu->opsize - i);
|
---|
724 | }
|
---|
725 | else
|
---|
726 | {
|
---|
727 | AssertMsg(PATMIsPatchGCAddr(pVM, pTargetGC) == false, ("Target is already a patch address (%VRv)?!?\n", pTargetGC));
|
---|
728 | Assert(pTargetGC);
|
---|
729 | Assert(OP_PARM_VTYPE(pCpu->pCurInstr->param1) == OP_PARM_J);
|
---|
730 |
|
---|
731 | /** @todo wasting memory as the complex search is overkill and we need only one lookup slot... */
|
---|
732 |
|
---|
733 | /* Relative call to patch code (patch to patch -> no fixup). */
|
---|
734 | Log(("PatchGenCall from %VRv (next=%VRv) to %VRv\n", pCurInstrGC, pCurInstrGC + pCpu->opsize, pTargetGC));
|
---|
735 |
|
---|
736 | /* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause
|
---|
737 | * a page fault. The assembly code restores the stack afterwards.
|
---|
738 | */
|
---|
739 | offset = 0;
|
---|
740 | pPB[offset++] = 0x68; // push %Iv
|
---|
741 | *(RTRCPTR *)&pPB[offset] = pTargetGC;
|
---|
742 | offset += sizeof(RTRCPTR);
|
---|
743 | }
|
---|
744 |
|
---|
745 | /* align this block properly to make sure the jump table will not be misaligned. */
|
---|
746 | size = (RTHCUINTPTR)&pPB[offset] & 3;
|
---|
747 | if (size)
|
---|
748 | size = 4 - size;
|
---|
749 |
|
---|
750 | for (i=0;i<size;i++)
|
---|
751 | {
|
---|
752 | pPB[offset++] = 0x90; /* nop */
|
---|
753 | }
|
---|
754 | PATCHGEN_EPILOG(pPatch, offset);
|
---|
755 |
|
---|
756 | /* 3: Generate code to lookup address in our local cache; call hypervisor PATM code if it can't be located. */
|
---|
757 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
|
---|
758 | callInfo.pReturnGC = pCurInstrGC + pCpu->opsize;
|
---|
759 | callInfo.pTargetGC = (fIndirect) ? 0xDEADBEEF : pTargetGC;
|
---|
760 | size = patmPatchGenCode(pVM, pPatch, pPB, (fIndirect) ? &PATMCallIndirectRecord : &PATMCallRecord, 0, false, &callInfo);
|
---|
761 | PATCHGEN_EPILOG(pPatch, size);
|
---|
762 |
|
---|
763 | /* Need to set PATM_INTERRUPTFLAG after the patched ret returns here. */
|
---|
764 | rc = patmPatchGenSetPIF(pVM, pPatch, pCurInstrGC);
|
---|
765 | if (rc == VERR_NO_MEMORY)
|
---|
766 | return rc;
|
---|
767 | AssertRCReturn(rc, rc);
|
---|
768 |
|
---|
769 | STAM_COUNTER_INC(&pVM->patm.s.StatGenCall);
|
---|
770 | return VINF_SUCCESS;
|
---|
771 | }
|
---|
772 |
|
---|
773 | /**
|
---|
774 | * Generate indirect jump to unknown destination
|
---|
775 | *
|
---|
776 | * @returns VBox status code.
|
---|
777 | * @param pVM The VM to operate on.
|
---|
778 | * @param pPatch Patch record
|
---|
779 | * @param pCpu Disassembly state
|
---|
780 | * @param pCurInstrGC Current instruction address
|
---|
781 | */
|
---|
782 | int patmPatchGenJump(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC)
|
---|
783 | {
|
---|
784 | PATMCALLINFO callInfo;
|
---|
785 | uint32_t offset;
|
---|
786 | uint32_t i, size;
|
---|
787 | int rc;
|
---|
788 |
|
---|
789 | /* 1: Clear PATM interrupt flag on entry. */
|
---|
790 | rc = patmPatchGenClearPIF(pVM, pPatch, pCurInstrGC);
|
---|
791 | if (rc == VERR_NO_MEMORY)
|
---|
792 | return rc;
|
---|
793 | AssertRCReturn(rc, rc);
|
---|
794 |
|
---|
795 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
796 | /* 2: We must push the target address onto the stack before appending the indirect call code. */
|
---|
797 |
|
---|
798 | Log(("patmPatchGenIndirectJump\n"));
|
---|
799 | Assert(pCpu->param1.size == 4);
|
---|
800 | Assert(OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J);
|
---|
801 |
|
---|
802 | /* We push it onto the stack here, so the guest's context isn't ruined when this happens to cause
|
---|
803 | * a page fault. The assembly code restores the stack afterwards.
|
---|
804 | */
|
---|
805 | offset = 0;
|
---|
806 | /* include prefix byte to make sure we don't use the incorrect selector register. */
|
---|
807 | if (pCpu->prefix & PREFIX_SEG)
|
---|
808 | pPB[offset++] = DISQuerySegPrefixByte(pCpu);
|
---|
809 |
|
---|
810 | pPB[offset++] = 0xFF; // push r/m32
|
---|
811 | pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, 6 /* group 5 */, pCpu->ModRM.Bits.Rm);
|
---|
812 | i = 2; /* standard offset of modrm bytes */
|
---|
813 | if (pCpu->prefix & PREFIX_OPSIZE)
|
---|
814 | i++; //skip operand prefix
|
---|
815 | if (pCpu->prefix & PREFIX_SEG)
|
---|
816 | i++; //skip segment prefix
|
---|
817 |
|
---|
818 | rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
|
---|
819 | AssertRCReturn(rc, rc);
|
---|
820 | offset += (pCpu->opsize - i);
|
---|
821 |
|
---|
822 | /* align this block properly to make sure the jump table will not be misaligned. */
|
---|
823 | size = (RTHCUINTPTR)&pPB[offset] & 3;
|
---|
824 | if (size)
|
---|
825 | size = 4 - size;
|
---|
826 |
|
---|
827 | for (i=0;i<size;i++)
|
---|
828 | {
|
---|
829 | pPB[offset++] = 0x90; /* nop */
|
---|
830 | }
|
---|
831 | PATCHGEN_EPILOG(pPatch, offset);
|
---|
832 |
|
---|
833 | /* 3: Generate code to lookup address in our local cache; call hypervisor PATM code if it can't be located. */
|
---|
834 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
|
---|
835 | callInfo.pReturnGC = pCurInstrGC + pCpu->opsize;
|
---|
836 | callInfo.pTargetGC = 0xDEADBEEF;
|
---|
837 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMJumpIndirectRecord, 0, false, &callInfo);
|
---|
838 | PATCHGEN_EPILOG(pPatch, size);
|
---|
839 |
|
---|
840 | STAM_COUNTER_INC(&pVM->patm.s.StatGenJump);
|
---|
841 | return VINF_SUCCESS;
|
---|
842 | }
|
---|
843 |
|
---|
844 | /**
|
---|
845 | * Generate return instruction
|
---|
846 | *
|
---|
847 | * @returns VBox status code.
|
---|
848 | * @param pVM The VM to operate on.
|
---|
849 | * @param pPatch Patch structure
|
---|
850 | * @param pCpu Disassembly struct
|
---|
851 | * @param pCurInstrGC Current instruction pointer
|
---|
852 | *
|
---|
853 | */
|
---|
854 | int patmPatchGenRet(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RCPTRTYPE(uint8_t *) pCurInstrGC)
|
---|
855 | {
|
---|
856 | int size = 0, rc;
|
---|
857 | RTRCPTR pPatchRetInstrGC;
|
---|
858 |
|
---|
859 | /* Remember start of this patch for below. */
|
---|
860 | pPatchRetInstrGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset;
|
---|
861 |
|
---|
862 | Log(("patmPatchGenRet %VRv\n", pCurInstrGC));
|
---|
863 |
|
---|
864 | /** @note optimization: multiple identical ret instruction in a single patch can share a single patched ret. */
|
---|
865 | if ( pPatch->pTempInfo->pPatchRetInstrGC
|
---|
866 | && pPatch->pTempInfo->uPatchRetParam1 == (uint32_t)pCpu->param1.parval) /* nr of bytes popped off the stack should be identical of course! */
|
---|
867 | {
|
---|
868 | Assert(pCpu->pCurInstr->opcode == OP_RETN);
|
---|
869 | STAM_COUNTER_INC(&pVM->patm.s.StatGenRetReused);
|
---|
870 |
|
---|
871 | return patmPatchGenPatchJump(pVM, pPatch, pCurInstrGC, pPatch->pTempInfo->pPatchRetInstrGC);
|
---|
872 | }
|
---|
873 |
|
---|
874 | /* Jump back to the original instruction if IF is set again. */
|
---|
875 | Assert(!PATMFindActivePatchByEntrypoint(pVM, pCurInstrGC));
|
---|
876 | rc = patmPatchGenCheckIF(pVM, pPatch, pCurInstrGC);
|
---|
877 | AssertRCReturn(rc, rc);
|
---|
878 |
|
---|
879 | /* align this block properly to make sure the jump table will not be misaligned. */
|
---|
880 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
881 | size = (RTHCUINTPTR)pPB & 3;
|
---|
882 | if (size)
|
---|
883 | size = 4 - size;
|
---|
884 |
|
---|
885 | for (int i=0;i<size;i++)
|
---|
886 | pPB[i] = 0x90; /* nop */
|
---|
887 | PATCHGEN_EPILOG(pPatch, size);
|
---|
888 |
|
---|
889 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
|
---|
890 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMRetRecord, 0, false);
|
---|
891 | PATCHGEN_EPILOG(pPatch, size);
|
---|
892 |
|
---|
893 | STAM_COUNTER_INC(&pVM->patm.s.StatGenRet);
|
---|
894 | /* Duplicate the ret or ret n instruction; it will use the PATM return address */
|
---|
895 | rc = patmPatchGenDuplicate(pVM, pPatch, pCpu, pCurInstrGC);
|
---|
896 |
|
---|
897 | if (rc == VINF_SUCCESS)
|
---|
898 | {
|
---|
899 | pPatch->pTempInfo->pPatchRetInstrGC = pPatchRetInstrGC;
|
---|
900 | pPatch->pTempInfo->uPatchRetParam1 = pCpu->param1.parval;
|
---|
901 | }
|
---|
902 | return rc;
|
---|
903 | }
|
---|
904 |
|
---|
905 | /**
|
---|
906 | * Generate all global patm functions
|
---|
907 | *
|
---|
908 | * @returns VBox status code.
|
---|
909 | * @param pVM The VM to operate on.
|
---|
910 | * @param pPatch Patch structure
|
---|
911 | *
|
---|
912 | */
|
---|
913 | int patmPatchGenGlobalFunctions(PVM pVM, PPATCHINFO pPatch)
|
---|
914 | {
|
---|
915 | int size = 0;
|
---|
916 |
|
---|
917 | pVM->patm.s.pfnHelperCallGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset;
|
---|
918 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
919 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMLookupAndCallRecord, 0, false);
|
---|
920 | PATCHGEN_EPILOG(pPatch, size);
|
---|
921 |
|
---|
922 | /* Round to next 8 byte boundary. */
|
---|
923 | pPatch->uCurPatchOffset = RT_ALIGN_32(pPatch->uCurPatchOffset, 8);
|
---|
924 |
|
---|
925 | pVM->patm.s.pfnHelperRetGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset;
|
---|
926 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
|
---|
927 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMRetFunctionRecord, 0, false);
|
---|
928 | PATCHGEN_EPILOG(pPatch, size);
|
---|
929 |
|
---|
930 | /* Round to next 8 byte boundary. */
|
---|
931 | pPatch->uCurPatchOffset = RT_ALIGN_32(pPatch->uCurPatchOffset, 8);
|
---|
932 |
|
---|
933 | pVM->patm.s.pfnHelperJumpGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset;
|
---|
934 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
|
---|
935 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMLookupAndJumpRecord, 0, false);
|
---|
936 | PATCHGEN_EPILOG(pPatch, size);
|
---|
937 |
|
---|
938 | /* Round to next 8 byte boundary. */
|
---|
939 | pPatch->uCurPatchOffset = RT_ALIGN_32(pPatch->uCurPatchOffset, 8);
|
---|
940 |
|
---|
941 | pVM->patm.s.pfnHelperIretGC = PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset;
|
---|
942 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
|
---|
943 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMIretFunctionRecord, 0, false);
|
---|
944 | PATCHGEN_EPILOG(pPatch, size);
|
---|
945 |
|
---|
946 | Log(("pfnHelperCallGC %VRv\n", pVM->patm.s.pfnHelperCallGC));
|
---|
947 | Log(("pfnHelperRetGC %VRv\n", pVM->patm.s.pfnHelperRetGC));
|
---|
948 | Log(("pfnHelperJumpGC %VRv\n", pVM->patm.s.pfnHelperJumpGC));
|
---|
949 | Log(("pfnHelperIretGC %VRv\n", pVM->patm.s.pfnHelperIretGC));
|
---|
950 |
|
---|
951 | return VINF_SUCCESS;
|
---|
952 | }
|
---|
953 |
|
---|
954 | /**
|
---|
955 | * Generate illegal instruction (int 3)
|
---|
956 | *
|
---|
957 | * @returns VBox status code.
|
---|
958 | * @param pVM The VM to operate on.
|
---|
959 | * @param pPatch Patch structure
|
---|
960 | *
|
---|
961 | */
|
---|
962 | int patmPatchGenIllegalInstr(PVM pVM, PPATCHINFO pPatch)
|
---|
963 | {
|
---|
964 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
965 |
|
---|
966 | pPB[0] = 0xCC;
|
---|
967 |
|
---|
968 | PATCHGEN_EPILOG(pPatch, 1);
|
---|
969 | return VINF_SUCCESS;
|
---|
970 | }
|
---|
971 |
|
---|
972 | /**
|
---|
973 | * Check virtual IF flag and jump back to original guest code if set
|
---|
974 | *
|
---|
975 | * @returns VBox status code.
|
---|
976 | * @param pVM The VM to operate on.
|
---|
977 | * @param pPatch Patch structure
|
---|
978 | * @param pCurInstrGC Guest context pointer to the current instruction
|
---|
979 | *
|
---|
980 | */
|
---|
981 | int patmPatchGenCheckIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC)
|
---|
982 | {
|
---|
983 | uint32_t size;
|
---|
984 |
|
---|
985 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
986 |
|
---|
987 | /* Add lookup record for patch to guest address translation */
|
---|
988 | patmr3AddP2GLookupRecord(pVM, pPatch, pPB, pCurInstrGC, PATM_LOOKUP_PATCH2GUEST);
|
---|
989 |
|
---|
990 | /* Generate code to check for IF=1 before executing the call to the duplicated function. */
|
---|
991 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMCheckIFRecord, pCurInstrGC, true);
|
---|
992 |
|
---|
993 | PATCHGEN_EPILOG(pPatch, size);
|
---|
994 | return VINF_SUCCESS;
|
---|
995 | }
|
---|
996 |
|
---|
997 | /**
|
---|
998 | * Set PATM interrupt flag
|
---|
999 | *
|
---|
1000 | * @returns VBox status code.
|
---|
1001 | * @param pVM The VM to operate on.
|
---|
1002 | * @param pPatch Patch structure
|
---|
1003 | * @param pInstrGC Corresponding guest instruction
|
---|
1004 | *
|
---|
1005 | */
|
---|
1006 | int patmPatchGenSetPIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC)
|
---|
1007 | {
|
---|
1008 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1009 |
|
---|
1010 | /* Add lookup record for patch to guest address translation */
|
---|
1011 | patmr3AddP2GLookupRecord(pVM, pPatch, pPB, pInstrGC, PATM_LOOKUP_PATCH2GUEST);
|
---|
1012 |
|
---|
1013 | int size = patmPatchGenCode(pVM, pPatch, pPB, &PATMSetPIFRecord, 0, false);
|
---|
1014 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1015 | return VINF_SUCCESS;
|
---|
1016 | }
|
---|
1017 |
|
---|
1018 | /**
|
---|
1019 | * Clear PATM interrupt flag
|
---|
1020 | *
|
---|
1021 | * @returns VBox status code.
|
---|
1022 | * @param pVM The VM to operate on.
|
---|
1023 | * @param pPatch Patch structure
|
---|
1024 | * @param pInstrGC Corresponding guest instruction
|
---|
1025 | *
|
---|
1026 | */
|
---|
1027 | int patmPatchGenClearPIF(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC)
|
---|
1028 | {
|
---|
1029 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1030 |
|
---|
1031 | /* Add lookup record for patch to guest address translation */
|
---|
1032 | patmr3AddP2GLookupRecord(pVM, pPatch, pPB, pInstrGC, PATM_LOOKUP_PATCH2GUEST);
|
---|
1033 |
|
---|
1034 | int size = patmPatchGenCode(pVM, pPatch, pPB, &PATMClearPIFRecord, 0, false);
|
---|
1035 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1036 | return VINF_SUCCESS;
|
---|
1037 | }
|
---|
1038 |
|
---|
1039 |
|
---|
1040 | /**
|
---|
1041 | * Clear PATM inhibit irq flag
|
---|
1042 | *
|
---|
1043 | * @returns VBox status code.
|
---|
1044 | * @param pVM The VM to operate on.
|
---|
1045 | * @param pPatch Patch structure
|
---|
1046 | * @param pNextInstrGC Next guest instruction
|
---|
1047 | */
|
---|
1048 | int patmPatchGenClearInhibitIRQ(PVM pVM, PPATCHINFO pPatch, RTRCPTR pNextInstrGC)
|
---|
1049 | {
|
---|
1050 | int size;
|
---|
1051 | PATMCALLINFO callInfo;
|
---|
1052 |
|
---|
1053 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1054 |
|
---|
1055 | Assert((pPatch->flags & (PATMFL_GENERATE_JUMPTOGUEST|PATMFL_DUPLICATE_FUNCTION)) != (PATMFL_GENERATE_JUMPTOGUEST|PATMFL_DUPLICATE_FUNCTION));
|
---|
1056 |
|
---|
1057 | /* Add lookup record for patch to guest address translation */
|
---|
1058 | patmr3AddP2GLookupRecord(pVM, pPatch, pPB, pNextInstrGC, PATM_LOOKUP_PATCH2GUEST);
|
---|
1059 |
|
---|
1060 | callInfo.pNextInstrGC = pNextInstrGC;
|
---|
1061 |
|
---|
1062 | if (pPatch->flags & PATMFL_DUPLICATE_FUNCTION)
|
---|
1063 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMClearInhibitIRQContIF0Record, 0, false, &callInfo);
|
---|
1064 | else
|
---|
1065 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMClearInhibitIRQFaultIF0Record, 0, false, &callInfo);
|
---|
1066 |
|
---|
1067 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1068 | return VINF_SUCCESS;
|
---|
1069 | }
|
---|
1070 |
|
---|
1071 | /**
|
---|
1072 | * Generate an interrupt handler entrypoint
|
---|
1073 | *
|
---|
1074 | * @returns VBox status code.
|
---|
1075 | * @param pVM The VM to operate on.
|
---|
1076 | * @param pPatch Patch record
|
---|
1077 | * @param pIntHandlerGC IDT handler address
|
---|
1078 | *
|
---|
1079 | ** @todo must check if virtual IF is already cleared on entry!!!!!!!!!!!!!!!!!!!!!!!
|
---|
1080 | */
|
---|
1081 | int patmPatchGenIntEntry(PVM pVM, PPATCHINFO pPatch, RTRCPTR pIntHandlerGC)
|
---|
1082 | {
|
---|
1083 | uint32_t size;
|
---|
1084 | int rc = VINF_SUCCESS;
|
---|
1085 |
|
---|
1086 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1087 |
|
---|
1088 | /* Add lookup record for patch to guest address translation */
|
---|
1089 | patmr3AddP2GLookupRecord(pVM, pPatch, pPB, pIntHandlerGC, PATM_LOOKUP_PATCH2GUEST);
|
---|
1090 |
|
---|
1091 | /* Generate entrypoint for the interrupt handler (correcting CS in the interrupt stack frame) */
|
---|
1092 | size = patmPatchGenCode(pVM, pPatch, pPB,
|
---|
1093 | (pPatch->flags & PATMFL_INTHANDLER_WITH_ERRORCODE) ? &PATMIntEntryRecordErrorCode : &PATMIntEntryRecord,
|
---|
1094 | 0, false);
|
---|
1095 |
|
---|
1096 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1097 |
|
---|
1098 | // Interrupt gates set IF to 0
|
---|
1099 | rc = patmPatchGenCli(pVM, pPatch);
|
---|
1100 | AssertRCReturn(rc, rc);
|
---|
1101 |
|
---|
1102 | return rc;
|
---|
1103 | }
|
---|
1104 |
|
---|
1105 | /**
|
---|
1106 | * Generate a trap handler entrypoint
|
---|
1107 | *
|
---|
1108 | * @returns VBox status code.
|
---|
1109 | * @param pVM The VM to operate on.
|
---|
1110 | * @param pPatch Patch record
|
---|
1111 | * @param pTrapHandlerGC IDT handler address
|
---|
1112 | */
|
---|
1113 | int patmPatchGenTrapEntry(PVM pVM, PPATCHINFO pPatch, RTRCPTR pTrapHandlerGC)
|
---|
1114 | {
|
---|
1115 | uint32_t size;
|
---|
1116 |
|
---|
1117 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1118 |
|
---|
1119 | /* Add lookup record for patch to guest address translation */
|
---|
1120 | patmr3AddP2GLookupRecord(pVM, pPatch, pPB, pTrapHandlerGC, PATM_LOOKUP_PATCH2GUEST);
|
---|
1121 |
|
---|
1122 | /* Generate entrypoint for the trap handler (correcting CS in the interrupt stack frame) */
|
---|
1123 | size = patmPatchGenCode(pVM, pPatch, pPB,
|
---|
1124 | (pPatch->flags & PATMFL_TRAPHANDLER_WITH_ERRORCODE) ? &PATMTrapEntryRecordErrorCode : &PATMTrapEntryRecord,
|
---|
1125 | pTrapHandlerGC, true);
|
---|
1126 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1127 |
|
---|
1128 | return VINF_SUCCESS;
|
---|
1129 | }
|
---|
1130 |
|
---|
1131 | #ifdef VBOX_WITH_STATISTICS
|
---|
1132 | int patmPatchGenStats(PVM pVM, PPATCHINFO pPatch, RTRCPTR pInstrGC)
|
---|
1133 | {
|
---|
1134 | uint32_t size;
|
---|
1135 |
|
---|
1136 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1137 |
|
---|
1138 | /* Add lookup record for stats code -> guest handler. */
|
---|
1139 | patmr3AddP2GLookupRecord(pVM, pPatch, pPB, pInstrGC, PATM_LOOKUP_PATCH2GUEST);
|
---|
1140 |
|
---|
1141 | /* Generate code to keep calling statistics for this patch */
|
---|
1142 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMStatsRecord, pInstrGC, false);
|
---|
1143 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1144 |
|
---|
1145 | return VINF_SUCCESS;
|
---|
1146 | }
|
---|
1147 | #endif
|
---|
1148 |
|
---|
1149 | /**
|
---|
1150 | * Debug register moves to or from general purpose registers
|
---|
1151 | * mov GPR, DRx
|
---|
1152 | * mov DRx, GPR
|
---|
1153 | *
|
---|
1154 | * @todo: if we ever want to support hardware debug registers natively, then
|
---|
1155 | * this will need to be changed!
|
---|
1156 | */
|
---|
1157 | int patmPatchGenMovDebug(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu)
|
---|
1158 | {
|
---|
1159 | int rc = VINF_SUCCESS;
|
---|
1160 | int reg, mod, rm, dbgreg;
|
---|
1161 | uint32_t offset;
|
---|
1162 |
|
---|
1163 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1164 |
|
---|
1165 | mod = 0; //effective address (only)
|
---|
1166 | rm = 5; //disp32
|
---|
1167 | if (pCpu->pCurInstr->param1 == OP_PARM_Dd)
|
---|
1168 | {
|
---|
1169 | Assert(0); // You not come here. Illegal!
|
---|
1170 |
|
---|
1171 | // mov DRx, GPR
|
---|
1172 | pPB[0] = 0x89; //mov disp32, GPR
|
---|
1173 | Assert(pCpu->param1.flags & USE_REG_DBG);
|
---|
1174 | Assert(pCpu->param2.flags & USE_REG_GEN32);
|
---|
1175 |
|
---|
1176 | dbgreg = pCpu->param1.base.reg_dbg;
|
---|
1177 | reg = pCpu->param2.base.reg_gen;
|
---|
1178 | }
|
---|
1179 | else
|
---|
1180 | {
|
---|
1181 | // mov GPR, DRx
|
---|
1182 | Assert(pCpu->param1.flags & USE_REG_GEN32);
|
---|
1183 | Assert(pCpu->param2.flags & USE_REG_DBG);
|
---|
1184 |
|
---|
1185 | pPB[0] = 0x8B; // mov GPR, disp32
|
---|
1186 | reg = pCpu->param1.base.reg_gen;
|
---|
1187 | dbgreg = pCpu->param2.base.reg_dbg;
|
---|
1188 | }
|
---|
1189 |
|
---|
1190 | pPB[1] = MAKE_MODRM(mod, reg, rm);
|
---|
1191 |
|
---|
1192 | /// @todo: make this an array in the context structure
|
---|
1193 | switch (dbgreg)
|
---|
1194 | {
|
---|
1195 | case USE_REG_DR0:
|
---|
1196 | offset = RT_OFFSETOF(CPUMCTX, dr0);
|
---|
1197 | break;
|
---|
1198 | case USE_REG_DR1:
|
---|
1199 | offset = RT_OFFSETOF(CPUMCTX, dr1);
|
---|
1200 | break;
|
---|
1201 | case USE_REG_DR2:
|
---|
1202 | offset = RT_OFFSETOF(CPUMCTX, dr2);
|
---|
1203 | break;
|
---|
1204 | case USE_REG_DR3:
|
---|
1205 | offset = RT_OFFSETOF(CPUMCTX, dr3);
|
---|
1206 | break;
|
---|
1207 | case USE_REG_DR4:
|
---|
1208 | offset = RT_OFFSETOF(CPUMCTX, dr4);
|
---|
1209 | break;
|
---|
1210 | case USE_REG_DR5:
|
---|
1211 | offset = RT_OFFSETOF(CPUMCTX, dr5);
|
---|
1212 | break;
|
---|
1213 | case USE_REG_DR6:
|
---|
1214 | offset = RT_OFFSETOF(CPUMCTX, dr6);
|
---|
1215 | break;
|
---|
1216 | case USE_REG_DR7:
|
---|
1217 | offset = RT_OFFSETOF(CPUMCTX, dr7);
|
---|
1218 | break;
|
---|
1219 | default: /* Shut up compiler warning. */
|
---|
1220 | AssertFailed();
|
---|
1221 | offset = 0;
|
---|
1222 | break;
|
---|
1223 | }
|
---|
1224 | *(RTRCPTR *)&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset;
|
---|
1225 | patmPatchAddReloc32(pVM, pPatch, &pPB[2], FIXUP_ABSOLUTE);
|
---|
1226 |
|
---|
1227 | PATCHGEN_EPILOG(pPatch, 2 + sizeof(RTRCPTR));
|
---|
1228 | return rc;
|
---|
1229 | }
|
---|
1230 |
|
---|
1231 | /*
|
---|
1232 | * Control register moves to or from general purpose registers
|
---|
1233 | * mov GPR, CRx
|
---|
1234 | * mov CRx, GPR
|
---|
1235 | */
|
---|
1236 | int patmPatchGenMovControl(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu)
|
---|
1237 | {
|
---|
1238 | int rc = VINF_SUCCESS;
|
---|
1239 | int reg, mod, rm, ctrlreg;
|
---|
1240 | uint32_t offset;
|
---|
1241 |
|
---|
1242 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1243 |
|
---|
1244 | mod = 0; //effective address (only)
|
---|
1245 | rm = 5; //disp32
|
---|
1246 | if (pCpu->pCurInstr->param1 == OP_PARM_Cd)
|
---|
1247 | {
|
---|
1248 | Assert(0); // You not come here. Illegal!
|
---|
1249 |
|
---|
1250 | // mov CRx, GPR
|
---|
1251 | pPB[0] = 0x89; //mov disp32, GPR
|
---|
1252 | ctrlreg = pCpu->param1.base.reg_ctrl;
|
---|
1253 | reg = pCpu->param2.base.reg_gen;
|
---|
1254 | Assert(pCpu->param1.flags & USE_REG_CR);
|
---|
1255 | Assert(pCpu->param2.flags & USE_REG_GEN32);
|
---|
1256 | }
|
---|
1257 | else
|
---|
1258 | {
|
---|
1259 | // mov GPR, DRx
|
---|
1260 | Assert(pCpu->param1.flags & USE_REG_GEN32);
|
---|
1261 | Assert(pCpu->param2.flags & USE_REG_CR);
|
---|
1262 |
|
---|
1263 | pPB[0] = 0x8B; // mov GPR, disp32
|
---|
1264 | reg = pCpu->param1.base.reg_gen;
|
---|
1265 | ctrlreg = pCpu->param2.base.reg_ctrl;
|
---|
1266 | }
|
---|
1267 |
|
---|
1268 | pPB[1] = MAKE_MODRM(mod, reg, rm);
|
---|
1269 |
|
---|
1270 | /// @todo: make this an array in the context structure
|
---|
1271 | switch (ctrlreg)
|
---|
1272 | {
|
---|
1273 | case USE_REG_CR0:
|
---|
1274 | offset = RT_OFFSETOF(CPUMCTX, cr0);
|
---|
1275 | break;
|
---|
1276 | case USE_REG_CR2:
|
---|
1277 | offset = RT_OFFSETOF(CPUMCTX, cr2);
|
---|
1278 | break;
|
---|
1279 | case USE_REG_CR3:
|
---|
1280 | offset = RT_OFFSETOF(CPUMCTX, cr3);
|
---|
1281 | break;
|
---|
1282 | case USE_REG_CR4:
|
---|
1283 | offset = RT_OFFSETOF(CPUMCTX, cr4);
|
---|
1284 | break;
|
---|
1285 | default: /* Shut up compiler warning. */
|
---|
1286 | AssertFailed();
|
---|
1287 | offset = 0;
|
---|
1288 | break;
|
---|
1289 | }
|
---|
1290 | *(RTRCPTR *)&pPB[2] = pVM->patm.s.pCPUMCtxGC + offset;
|
---|
1291 | patmPatchAddReloc32(pVM, pPatch, &pPB[2], FIXUP_ABSOLUTE);
|
---|
1292 |
|
---|
1293 | PATCHGEN_EPILOG(pPatch, 2 + sizeof(RTRCPTR));
|
---|
1294 | return rc;
|
---|
1295 | }
|
---|
1296 |
|
---|
1297 | /*
|
---|
1298 | * mov GPR, SS
|
---|
1299 | */
|
---|
1300 | int patmPatchGenMovFromSS(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC)
|
---|
1301 | {
|
---|
1302 | uint32_t size, offset;
|
---|
1303 |
|
---|
1304 | Log(("patmPatchGenMovFromSS %VRv\n", pCurInstrGC));
|
---|
1305 |
|
---|
1306 | Assert(pPatch->flags & PATMFL_CODE32);
|
---|
1307 |
|
---|
1308 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1309 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMClearPIFRecord, 0, false);
|
---|
1310 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1311 |
|
---|
1312 | /* push ss */
|
---|
1313 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
|
---|
1314 | offset = 0;
|
---|
1315 | if (pCpu->prefix & PREFIX_OPSIZE)
|
---|
1316 | pPB[offset++] = 0x66; /* size override -> 16 bits push */
|
---|
1317 | pPB[offset++] = 0x16;
|
---|
1318 | PATCHGEN_EPILOG(pPatch, offset);
|
---|
1319 |
|
---|
1320 | /* checks and corrects RPL of pushed ss*/
|
---|
1321 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
|
---|
1322 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMMovFromSSRecord, 0, false);
|
---|
1323 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1324 |
|
---|
1325 | /* pop general purpose register */
|
---|
1326 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
|
---|
1327 | offset = 0;
|
---|
1328 | if (pCpu->prefix & PREFIX_OPSIZE)
|
---|
1329 | pPB[offset++] = 0x66; /* size override -> 16 bits pop */
|
---|
1330 | pPB[offset++] = 0x58 + pCpu->param1.base.reg_gen;
|
---|
1331 | PATCHGEN_EPILOG(pPatch, offset);
|
---|
1332 |
|
---|
1333 |
|
---|
1334 | PATCHGEN_PROLOG_NODEF(pVM, pPatch);
|
---|
1335 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMSetPIFRecord, 0, false);
|
---|
1336 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1337 |
|
---|
1338 | return VINF_SUCCESS;
|
---|
1339 | }
|
---|
1340 |
|
---|
1341 |
|
---|
1342 | /**
|
---|
1343 | * Generate an sldt or str patch instruction
|
---|
1344 | *
|
---|
1345 | * @returns VBox status code.
|
---|
1346 | * @param pVM The VM to operate on.
|
---|
1347 | * @param pPatch Patch record
|
---|
1348 | * @param pCpu Disassembly state
|
---|
1349 | * @param pCurInstrGC Guest instruction address
|
---|
1350 | */
|
---|
1351 | int patmPatchGenSldtStr(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC)
|
---|
1352 | {
|
---|
1353 | // sldt %Ew
|
---|
1354 | int rc = VINF_SUCCESS;
|
---|
1355 | uint32_t offset = 0;
|
---|
1356 | uint32_t i;
|
---|
1357 |
|
---|
1358 | /** @todo segment prefix (untested) */
|
---|
1359 | Assert(pCpu->prefix == PREFIX_NONE || pCpu->prefix == PREFIX_OPSIZE);
|
---|
1360 |
|
---|
1361 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1362 |
|
---|
1363 | if (pCpu->param1.flags == USE_REG_GEN32 || pCpu->param1.flags == USE_REG_GEN16)
|
---|
1364 | {
|
---|
1365 | /* Register operand */
|
---|
1366 | // 8B 15 [32 bits addr] mov edx, CPUMCTX.tr/ldtr
|
---|
1367 |
|
---|
1368 | if (pCpu->prefix == PREFIX_OPSIZE)
|
---|
1369 | pPB[offset++] = 0x66;
|
---|
1370 |
|
---|
1371 | pPB[offset++] = 0x8B; // mov destreg, CPUMCTX.tr/ldtr
|
---|
1372 | /* Modify REG part according to destination of original instruction */
|
---|
1373 | pPB[offset++] = MAKE_MODRM(0, pCpu->param1.base.reg_gen, 5);
|
---|
1374 | if (pCpu->pCurInstr->opcode == OP_STR)
|
---|
1375 | {
|
---|
1376 | *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);
|
---|
1377 | }
|
---|
1378 | else
|
---|
1379 | {
|
---|
1380 | *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr);
|
---|
1381 | }
|
---|
1382 | patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
|
---|
1383 | offset += sizeof(RTRCPTR);
|
---|
1384 | }
|
---|
1385 | else
|
---|
1386 | {
|
---|
1387 | /* Memory operand */
|
---|
1388 | //50 push eax
|
---|
1389 | //52 push edx
|
---|
1390 | //8D 15 48 7C 42 00 lea edx, dword ptr [dest]
|
---|
1391 | //66 A1 48 7C 42 00 mov ax, CPUMCTX.tr/ldtr
|
---|
1392 | //66 89 02 mov word ptr [edx],ax
|
---|
1393 | //5A pop edx
|
---|
1394 | //58 pop eax
|
---|
1395 |
|
---|
1396 | pPB[offset++] = 0x50; // push eax
|
---|
1397 | pPB[offset++] = 0x52; // push edx
|
---|
1398 |
|
---|
1399 | if (pCpu->prefix == PREFIX_SEG)
|
---|
1400 | {
|
---|
1401 | pPB[offset++] = DISQuerySegPrefixByte(pCpu);
|
---|
1402 | }
|
---|
1403 | pPB[offset++] = 0x8D; // lea edx, dword ptr [dest]
|
---|
1404 | // duplicate and modify modrm byte and additional bytes if present (e.g. direct address)
|
---|
1405 | pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, USE_REG_EDX, pCpu->ModRM.Bits.Rm);
|
---|
1406 |
|
---|
1407 | i = 3; /* standard offset of modrm bytes */
|
---|
1408 | if (pCpu->prefix == PREFIX_OPSIZE)
|
---|
1409 | i++; //skip operand prefix
|
---|
1410 | if (pCpu->prefix == PREFIX_SEG)
|
---|
1411 | i++; //skip segment prefix
|
---|
1412 |
|
---|
1413 | rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
|
---|
1414 | AssertRCReturn(rc, rc);
|
---|
1415 | offset += (pCpu->opsize - i);
|
---|
1416 |
|
---|
1417 | pPB[offset++] = 0x66; // mov ax, CPUMCTX.tr/ldtr
|
---|
1418 | pPB[offset++] = 0xA1;
|
---|
1419 | if (pCpu->pCurInstr->opcode == OP_STR)
|
---|
1420 | {
|
---|
1421 | *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, tr);
|
---|
1422 | }
|
---|
1423 | else
|
---|
1424 | {
|
---|
1425 | *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + RT_OFFSETOF(CPUMCTX, ldtr);
|
---|
1426 | }
|
---|
1427 | patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
|
---|
1428 | offset += sizeof(RTRCPTR);
|
---|
1429 |
|
---|
1430 | pPB[offset++] = 0x66; // mov word ptr [edx],ax
|
---|
1431 | pPB[offset++] = 0x89;
|
---|
1432 | pPB[offset++] = 0x02;
|
---|
1433 |
|
---|
1434 | pPB[offset++] = 0x5A; // pop edx
|
---|
1435 | pPB[offset++] = 0x58; // pop eax
|
---|
1436 | }
|
---|
1437 |
|
---|
1438 | PATCHGEN_EPILOG(pPatch, offset);
|
---|
1439 |
|
---|
1440 | return rc;
|
---|
1441 | }
|
---|
1442 |
|
---|
1443 | /**
|
---|
1444 | * Generate an sgdt or sidt patch instruction
|
---|
1445 | *
|
---|
1446 | * @returns VBox status code.
|
---|
1447 | * @param pVM The VM to operate on.
|
---|
1448 | * @param pPatch Patch record
|
---|
1449 | * @param pCpu Disassembly state
|
---|
1450 | * @param pCurInstrGC Guest instruction address
|
---|
1451 | */
|
---|
1452 | int patmPatchGenSxDT(PVM pVM, PPATCHINFO pPatch, DISCPUSTATE *pCpu, RTRCPTR pCurInstrGC)
|
---|
1453 | {
|
---|
1454 | int rc = VINF_SUCCESS;
|
---|
1455 | uint32_t offset = 0, offset_base, offset_limit;
|
---|
1456 | uint32_t i;
|
---|
1457 |
|
---|
1458 | /* @todo segment prefix (untested) */
|
---|
1459 | Assert(pCpu->prefix == PREFIX_NONE);
|
---|
1460 |
|
---|
1461 | // sgdt %Ms
|
---|
1462 | // sidt %Ms
|
---|
1463 |
|
---|
1464 | switch (pCpu->pCurInstr->opcode)
|
---|
1465 | {
|
---|
1466 | case OP_SGDT:
|
---|
1467 | offset_base = RT_OFFSETOF(CPUMCTX, gdtr.pGdt);
|
---|
1468 | offset_limit = RT_OFFSETOF(CPUMCTX, gdtr.cbGdt);
|
---|
1469 | break;
|
---|
1470 |
|
---|
1471 | case OP_SIDT:
|
---|
1472 | offset_base = RT_OFFSETOF(CPUMCTX, idtr.pIdt);
|
---|
1473 | offset_limit = RT_OFFSETOF(CPUMCTX, idtr.cbIdt);
|
---|
1474 | break;
|
---|
1475 |
|
---|
1476 | default:
|
---|
1477 | return VERR_INVALID_PARAMETER;
|
---|
1478 | }
|
---|
1479 |
|
---|
1480 | //50 push eax
|
---|
1481 | //52 push edx
|
---|
1482 | //8D 15 48 7C 42 00 lea edx, dword ptr [dest]
|
---|
1483 | //66 A1 48 7C 42 00 mov ax, CPUMCTX.gdtr.limit
|
---|
1484 | //66 89 02 mov word ptr [edx],ax
|
---|
1485 | //A1 48 7C 42 00 mov eax, CPUMCTX.gdtr.base
|
---|
1486 | //89 42 02 mov dword ptr [edx+2],eax
|
---|
1487 | //5A pop edx
|
---|
1488 | //58 pop eax
|
---|
1489 |
|
---|
1490 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1491 | pPB[offset++] = 0x50; // push eax
|
---|
1492 | pPB[offset++] = 0x52; // push edx
|
---|
1493 |
|
---|
1494 | if (pCpu->prefix == PREFIX_SEG)
|
---|
1495 | {
|
---|
1496 | pPB[offset++] = DISQuerySegPrefixByte(pCpu);
|
---|
1497 | }
|
---|
1498 | pPB[offset++] = 0x8D; // lea edx, dword ptr [dest]
|
---|
1499 | // duplicate and modify modrm byte and additional bytes if present (e.g. direct address)
|
---|
1500 | pPB[offset++] = MAKE_MODRM(pCpu->ModRM.Bits.Mod, USE_REG_EDX, pCpu->ModRM.Bits.Rm);
|
---|
1501 |
|
---|
1502 | i = 3; /* standard offset of modrm bytes */
|
---|
1503 | if (pCpu->prefix == PREFIX_OPSIZE)
|
---|
1504 | i++; //skip operand prefix
|
---|
1505 | if (pCpu->prefix == PREFIX_SEG)
|
---|
1506 | i++; //skip segment prefix
|
---|
1507 | rc = patmPatchReadBytes(pVM, &pPB[offset], (RTRCPTR)((RTGCUINTPTR32)pCurInstrGC + i), pCpu->opsize - i);
|
---|
1508 | AssertRCReturn(rc, rc);
|
---|
1509 | offset += (pCpu->opsize - i);
|
---|
1510 |
|
---|
1511 | pPB[offset++] = 0x66; // mov ax, CPUMCTX.gdtr.limit
|
---|
1512 | pPB[offset++] = 0xA1;
|
---|
1513 | *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_limit;
|
---|
1514 | patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
|
---|
1515 | offset += sizeof(RTRCPTR);
|
---|
1516 |
|
---|
1517 | pPB[offset++] = 0x66; // mov word ptr [edx],ax
|
---|
1518 | pPB[offset++] = 0x89;
|
---|
1519 | pPB[offset++] = 0x02;
|
---|
1520 |
|
---|
1521 | pPB[offset++] = 0xA1; // mov eax, CPUMCTX.gdtr.base
|
---|
1522 | *(RTRCPTR *)&pPB[offset] = pVM->patm.s.pCPUMCtxGC + offset_base;
|
---|
1523 | patmPatchAddReloc32(pVM, pPatch, &pPB[offset], FIXUP_ABSOLUTE);
|
---|
1524 | offset += sizeof(RTRCPTR);
|
---|
1525 |
|
---|
1526 | pPB[offset++] = 0x89; // mov dword ptr [edx+2],eax
|
---|
1527 | pPB[offset++] = 0x42;
|
---|
1528 | pPB[offset++] = 0x02;
|
---|
1529 |
|
---|
1530 | pPB[offset++] = 0x5A; // pop edx
|
---|
1531 | pPB[offset++] = 0x58; // pop eax
|
---|
1532 |
|
---|
1533 | PATCHGEN_EPILOG(pPatch, offset);
|
---|
1534 |
|
---|
1535 | return rc;
|
---|
1536 | }
|
---|
1537 |
|
---|
1538 | /**
|
---|
1539 | * Generate a cpuid patch instruction
|
---|
1540 | *
|
---|
1541 | * @returns VBox status code.
|
---|
1542 | * @param pVM The VM to operate on.
|
---|
1543 | * @param pPatch Patch record
|
---|
1544 | * @param pCurInstrGC Guest instruction address
|
---|
1545 | */
|
---|
1546 | int patmPatchGenCpuid(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC)
|
---|
1547 | {
|
---|
1548 | uint32_t size;
|
---|
1549 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1550 |
|
---|
1551 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMCpuidRecord, 0, false);
|
---|
1552 |
|
---|
1553 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1554 | return VINF_SUCCESS;
|
---|
1555 | }
|
---|
1556 |
|
---|
1557 | /**
|
---|
1558 | * Generate the jump from guest to patch code
|
---|
1559 | *
|
---|
1560 | * @returns VBox status code.
|
---|
1561 | * @param pVM The VM to operate on.
|
---|
1562 | * @param pPatch Patch record
|
---|
1563 | * @param pTargetGC Guest target jump
|
---|
1564 | * @param fClearInhibitIRQs Clear inhibit irq flag
|
---|
1565 | */
|
---|
1566 | int patmPatchGenJumpToGuest(PVM pVM, PPATCHINFO pPatch, RCPTRTYPE(uint8_t *) pReturnAddrGC, bool fClearInhibitIRQs)
|
---|
1567 | {
|
---|
1568 | int rc = VINF_SUCCESS;
|
---|
1569 | uint32_t size;
|
---|
1570 |
|
---|
1571 | if (fClearInhibitIRQs)
|
---|
1572 | {
|
---|
1573 | rc = patmPatchGenClearInhibitIRQ(pVM, pPatch, pReturnAddrGC);
|
---|
1574 | if (rc == VERR_NO_MEMORY)
|
---|
1575 | return rc;
|
---|
1576 | AssertRCReturn(rc, rc);
|
---|
1577 | }
|
---|
1578 |
|
---|
1579 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1580 |
|
---|
1581 | /* Add lookup record for patch to guest address translation */
|
---|
1582 | patmr3AddP2GLookupRecord(pVM, pPatch, pPB, pReturnAddrGC, PATM_LOOKUP_PATCH2GUEST);
|
---|
1583 |
|
---|
1584 | /* Generate code to jump to guest code if IF=1, else fault. */
|
---|
1585 | size = patmPatchGenCode(pVM, pPatch, pPB, &PATMJumpToGuest_IF1Record, pReturnAddrGC, true);
|
---|
1586 | PATCHGEN_EPILOG(pPatch, size);
|
---|
1587 |
|
---|
1588 | return rc;
|
---|
1589 | }
|
---|
1590 |
|
---|
1591 | /*
|
---|
1592 | * Relative jump from patch code to patch code (no fixup required)
|
---|
1593 | */
|
---|
1594 | int patmPatchGenPatchJump(PVM pVM, PPATCHINFO pPatch, RTRCPTR pCurInstrGC, RCPTRTYPE(uint8_t *) pPatchAddrGC, bool fAddLookupRecord)
|
---|
1595 | {
|
---|
1596 | int32_t displ;
|
---|
1597 | int rc = VINF_SUCCESS;
|
---|
1598 |
|
---|
1599 | Assert(PATMIsPatchGCAddr(pVM, pPatchAddrGC));
|
---|
1600 | PATCHGEN_PROLOG(pVM, pPatch);
|
---|
1601 |
|
---|
1602 | if (fAddLookupRecord)
|
---|
1603 | {
|
---|
1604 | /* Add lookup record for patch to guest address translation */
|
---|
1605 | patmr3AddP2GLookupRecord(pVM, pPatch, pPB, pCurInstrGC, PATM_LOOKUP_PATCH2GUEST);
|
---|
1606 | }
|
---|
1607 |
|
---|
1608 | pPB[0] = 0xE9; //JMP
|
---|
1609 |
|
---|
1610 | displ = pPatchAddrGC - (PATCHCODE_PTR_GC(pPatch) + pPatch->uCurPatchOffset + SIZEOF_NEARJUMP32);
|
---|
1611 |
|
---|
1612 | *(uint32_t *)&pPB[1] = displ;
|
---|
1613 |
|
---|
1614 | PATCHGEN_EPILOG(pPatch, SIZEOF_NEARJUMP32);
|
---|
1615 |
|
---|
1616 | return rc;
|
---|
1617 | }
|
---|