PDMDevHlp.cpp@ 25659

Last change on this file since 25659 was 25600, checked in by vboxsync, 15 years ago
PDMDevHlp.cpp: Don't send VERR_DBGF_NOT_ATTACHED up the chain?
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File size: 141.3 KB

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1	/* $Id: PDMDevHlp.cpp 25600 2009-12-31 00:38:44Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, Device Helpers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27	#include "PDMInternal.h"
28	#include <VBox/pdm.h>
29	#include <VBox/mm.h>
30	#include <VBox/pgm.h>
31	#include <VBox/iom.h>
32	#include <VBox/rem.h>
33	#include <VBox/dbgf.h>
34	#include <VBox/vm.h>
35	#include <VBox/vmm.h>
36
37	#include <VBox/version.h>
38	#include <VBox/log.h>
39	#include <VBox/err.h>
40	#include <iprt/asm.h>
41	#include <iprt/assert.h>
42	#include <iprt/string.h>
43	#include <iprt/thread.h>
44
45
46	/*******************************************************************************
47	* Defined Constants And Macros *
48	*******************************************************************************/
49	/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50	* Define this to enable the deadlock detection when accessing physical memory.
51	*/
52	#if /defined(DEBUG_bird) \|\|/ defined(DOXYGEN_RUNNING)
53	# define PDM_DEVHLP_DEADLOCK_DETECTION
54	#endif
55
56
57	/*******************************************************************************
58	* Defined Constants And Macros *
59	*******************************************************************************/
60	/** @name R3 DevHlp
61	* @{
62	*/
63
64
65	/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
66	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67	PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68	{
69	PDMDEV_ASSERT_DEVINS(pDevIns);
70	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
71	Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74	#if 0 /** @todo needs a real string cache for this */
75	if (pDevIns->iInstance > 0)
76	{
77	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
78	if (pszDesc2)
79	pszDesc = pszDesc2;
80	}
81	#endif
82
83	int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
84
85	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
86	return rc;
87	}
88
89
90	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
91	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
92	const char pszOut, const char pszIn,
93	const char pszOutStr, const char pszInStr, const char *pszDesc)
94	{
95	PDMDEV_ASSERT_DEVINS(pDevIns);
96	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
98	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
99
100	/*
101	* Resolve the functions (one of the can be NULL).
102	*/
103	int rc = VINF_SUCCESS;
104	if ( pDevIns->pDevReg->szRCMod[0]
105	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
106	{
107	RTRCPTR RCPtrIn = NIL_RTRCPTR;
108	if (pszIn)
109	{
110	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
111	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
112	}
113	RTRCPTR RCPtrOut = NIL_RTRCPTR;
114	if (pszOut && RT_SUCCESS(rc))
115	{
116	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
117	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
118	}
119	RTRCPTR RCPtrInStr = NIL_RTRCPTR;
120	if (pszInStr && RT_SUCCESS(rc))
121	{
122	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
123	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
124	}
125	RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
126	if (pszOutStr && RT_SUCCESS(rc))
127	{
128	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
129	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
130	}
131
132	if (RT_SUCCESS(rc))
133	{
134	#if 0 /** @todo needs a real string cache for this */
135	if (pDevIns->iInstance > 0)
136	{
137	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
138	if (pszDesc2)
139	pszDesc = pszDesc2;
140	}
141	#endif
142
143	rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
144	}
145	}
146	else
147	{
148	AssertMsgFailed(("No GC module for this driver!\n"));
149	rc = VERR_INVALID_PARAMETER;
150	}
151
152	LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
153	return rc;
154	}
155
156
157	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
158	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
159	const char pszOut, const char pszIn,
160	const char pszOutStr, const char pszInStr, const char *pszDesc)
161	{
162	PDMDEV_ASSERT_DEVINS(pDevIns);
163	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
164	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
165	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
166
167	/*
168	* Resolve the functions (one of the can be NULL).
169	*/
170	int rc = VINF_SUCCESS;
171	if ( pDevIns->pDevReg->szR0Mod[0]
172	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
173	{
174	R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
175	if (pszIn)
176	{
177	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
178	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
179	}
180	R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
181	if (pszOut && RT_SUCCESS(rc))
182	{
183	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
184	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
185	}
186	R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
187	if (pszInStr && RT_SUCCESS(rc))
188	{
189	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
190	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
191	}
192	R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
193	if (pszOutStr && RT_SUCCESS(rc))
194	{
195	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
196	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
197	}
198
199	if (RT_SUCCESS(rc))
200	{
201	#if 0 /** @todo needs a real string cache for this */
202	if (pDevIns->iInstance > 0)
203	{
204	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
205	if (pszDesc2)
206	pszDesc = pszDesc2;
207	}
208	#endif
209
210	rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
211	}
212	}
213	else
214	{
215	AssertMsgFailed(("No R0 module for this driver!\n"));
216	rc = VERR_INVALID_PARAMETER;
217	}
218
219	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
220	return rc;
221	}
222
223
224	/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
225	static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
226	{
227	PDMDEV_ASSERT_DEVINS(pDevIns);
228	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
229	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
230	Port, cPorts));
231
232	int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
233
234	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
235	return rc;
236	}
237
238
239	/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
240	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
241	PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
242	const char *pszDesc)
243	{
244	PDMDEV_ASSERT_DEVINS(pDevIns);
245	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
246	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
247	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
248
249	/** @todo IOMR3MMIORegisterR3 mangles the description, move it here. */
250	int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
251
252	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
253	return rc;
254	}
255
256
257	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
258	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
259	const char pszWrite, const char pszRead, const char *pszFill,
260	const char *pszDesc)
261	{
262	PDMDEV_ASSERT_DEVINS(pDevIns);
263	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
264	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
265	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
266
267	/** @todo pszDesc is unused here, drop it. */
268
269	/*
270	* Resolve the functions.
271	* Not all function have to present, leave it to IOM to enforce this.
272	*/
273	int rc = VINF_SUCCESS;
274	if ( pDevIns->pDevReg->szRCMod[0]
275	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
276	{
277	RTRCPTR RCPtrWrite = NIL_RTRCPTR;
278	if (pszWrite)
279	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
280
281	RTRCPTR RCPtrRead = NIL_RTRCPTR;
282	int rc2 = VINF_SUCCESS;
283	if (pszRead)
284	rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
285
286	RTRCPTR RCPtrFill = NIL_RTRCPTR;
287	int rc3 = VINF_SUCCESS;
288	if (pszFill)
289	rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
290
291	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
292	rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
293	else
294	{
295	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
296	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
297	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
298	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
299	rc = rc2;
300	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
301	rc = rc3;
302	}
303	}
304	else
305	{
306	AssertMsgFailed(("No GC module for this driver!\n"));
307	rc = VERR_INVALID_PARAMETER;
308	}
309
310	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
311	return rc;
312	}
313
314	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
315	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
316	const char pszWrite, const char pszRead, const char *pszFill,
317	const char *pszDesc)
318	{
319	PDMDEV_ASSERT_DEVINS(pDevIns);
320	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
321	LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
322	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
323
324	/** @todo pszDesc is unused here, remove it. */
325
326	/*
327	* Resolve the functions.
328	* Not all function have to present, leave it to IOM to enforce this.
329	*/
330	int rc = VINF_SUCCESS;
331	if ( pDevIns->pDevReg->szR0Mod[0]
332	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
333	{
334	R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
335	if (pszWrite)
336	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
337	R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
338	int rc2 = VINF_SUCCESS;
339	if (pszRead)
340	rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
341	R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
342	int rc3 = VINF_SUCCESS;
343	if (pszFill)
344	rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
345	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
346	rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
347	else
348	{
349	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
350	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
351	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
352	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
353	rc = rc2;
354	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
355	rc = rc3;
356	}
357	}
358	else
359	{
360	AssertMsgFailed(("No R0 module for this driver!\n"));
361	rc = VERR_INVALID_PARAMETER;
362	}
363
364	LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
365	return rc;
366	}
367
368
369	/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
370	static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
371	{
372	PDMDEV_ASSERT_DEVINS(pDevIns);
373	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
374	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
375	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
376
377	int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
378
379	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
380	return rc;
381	}
382
383
384	/** @copydoc PDMDEVHLPR3::pfnROMRegister */
385	static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void pvBinary, uint32_t fFlags, const char pszDesc)
386	{
387	PDMDEV_ASSERT_DEVINS(pDevIns);
388	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
389	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
390	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
391
392	/** @todo can we mangle pszDesc? */
393	int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
394
395	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
396	return rc;
397	}
398
399
400	/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
401	static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
402	PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
403	PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
404	PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
405	{
406	PDMDEV_ASSERT_DEVINS(pDevIns);
407	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
408	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
409	" pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
410	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
411	pfnLivePrep, pfnLiveExec, pfnLiveVote,
412	pfnSavePrep, pfnSaveExec, pfnSaveDone,
413	pfnLoadPrep, pfnLoadExec, pfnLoadDone));
414
415	int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
416	uVersion, cbGuess, pszBefore,
417	pfnLivePrep, pfnLiveExec, pfnLiveVote,
418	pfnSavePrep, pfnSaveExec, pfnSaveDone,
419	pfnLoadPrep, pfnLoadExec, pfnLoadDone);
420
421	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
422	return rc;
423	}
424
425
426	/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
427	static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void pvUser, uint32_t fFlags, const char pszDesc, PPTMTIMERR3 ppTimer)
428	{
429	PDMDEV_ASSERT_DEVINS(pDevIns);
430	PVM pVM = pDevIns->Internal.s.pVMR3;
431	VM_ASSERT_EMT(pVM);
432	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
433	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
434
435	if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
436	{
437	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
438	if (pszDesc2)
439	pszDesc = pszDesc2;
440	}
441
442	int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
443
444	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
445	return rc;
446	}
447
448
449	/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
450	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
451	{
452	PDMDEV_ASSERT_DEVINS(pDevIns);
453	PVM pVM = pDevIns->Internal.s.pVMR3;
454	VM_ASSERT_EMT(pVM);
455	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
456	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
457
458	/*
459	* Validate input.
460	*/
461	if (!pPciDev)
462	{
463	Assert(pPciDev);
464	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
465	return VERR_INVALID_PARAMETER;
466	}
467	if (!pPciDev->config[0] && !pPciDev->config[1])
468	{
469	Assert(pPciDev->config[0] \|\| pPciDev->config[1]);
470	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
471	return VERR_INVALID_PARAMETER;
472	}
473	if (pDevIns->Internal.s.pPciDeviceR3)
474	{
475	/** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
476	* support a PDM device with multiple PCI devices. This might become a problem
477	* when upgrading the chipset for instance because of multiple functions in some
478	* devices...
479	*/
480	AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
481	return VERR_INTERNAL_ERROR;
482	}
483
484	/*
485	* Choose the PCI bus for the device.
486	*
487	* This is simple. If the device was configured for a particular bus, the PCIBusNo
488	* configuration value will be set. If not the default bus is 0.
489	*/
490	int rc;
491	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
492	if (!pBus)
493	{
494	uint8_t u8Bus;
495	rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
496	AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
497	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
498	AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
499	("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
500	RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
501	VERR_PDM_NO_PCI_BUS);
502	pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
503	}
504	if (pBus->pDevInsR3)
505	{
506	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
507	pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
508	else
509	pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
510
511	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
512	pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
513	else
514	pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
515
516	/*
517	* Check the configuration for PCI device and function assignment.
518	*/
519	int iDev = -1;
520	uint8_t u8Device;
521	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
522	if (RT_SUCCESS(rc))
523	{
524	if (u8Device > 31)
525	{
526	AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
527	u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
528	return VERR_INTERNAL_ERROR;
529	}
530
531	uint8_t u8Function;
532	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
533	if (RT_FAILURE(rc))
534	{
535	AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
536	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
537	return rc;
538	}
539	if (u8Function > 7)
540	{
541	AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
542	u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
543	return VERR_INTERNAL_ERROR;
544	}
545	iDev = (u8Device << 3) \| u8Function;
546	}
547	else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
548	{
549	AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
550	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
551	return rc;
552	}
553
554	/*
555	* Call the pci bus device to do the actual registration.
556	*/
557	pdmLock(pVM);
558	rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
559	pdmUnlock(pVM);
560	if (RT_SUCCESS(rc))
561	{
562	pPciDev->pDevIns = pDevIns;
563
564	pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
565	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
566	pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
567	else
568	pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
569
570	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
571	pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
572	else
573	pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
574
575	Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
576	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
577	}
578	}
579	else
580	{
581	AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
582	rc = VERR_PDM_NO_PCI_BUS;
583	}
584
585	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
586	return rc;
587	}
588
589
590	/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
591	static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
592	{
593	PDMDEV_ASSERT_DEVINS(pDevIns);
594	PVM pVM = pDevIns->Internal.s.pVMR3;
595	VM_ASSERT_EMT(pVM);
596	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
597	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
598
599	/*
600	* Validate input.
601	*/
602	if (iRegion < 0 \|\| iRegion >= PCI_NUM_REGIONS)
603	{
604	Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
605	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
606	return VERR_INVALID_PARAMETER;
607	}
608	switch (enmType)
609	{
610	case PCI_ADDRESS_SPACE_IO:
611	/*
612	* Sanity check: don't allow to register more than 32K of the PCI I/O space.
613	*/
614	AssertMsgReturn(cbRegion <= _32K,
615	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
616	VERR_INVALID_PARAMETER);
617	break;
618
619	case PCI_ADDRESS_SPACE_MEM:
620	case PCI_ADDRESS_SPACE_MEM_PREFETCH:
621	/*
622	* Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
623	* now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
624	*/
625	AssertMsgReturn(cbRegion <= 512 * _1M,
626	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
627	VERR_INVALID_PARAMETER);
628	break;
629	default:
630	AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
631	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
632	return VERR_INVALID_PARAMETER;
633	}
634	if (!pfnCallback)
635	{
636	Assert(pfnCallback);
637	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
638	return VERR_INVALID_PARAMETER;
639	}
640	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
641
642	/*
643	* Must have a PCI device registered!
644	*/
645	int rc;
646	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
647	if (pPciDev)
648	{
649	/*
650	* We're currently restricted to page aligned MMIO regions.
651	*/
652	if ( (enmType == PCI_ADDRESS_SPACE_MEM \|\| enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
653	&& cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
654	{
655	Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
656	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
657	cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
658	}
659
660	/*
661	* For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
662	*/
663	int iLastSet = ASMBitLastSetU32(cbRegion);
664	Assert(iLastSet > 0);
665	uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
666	if (cbRegion > cbRegionAligned)
667	cbRegion = cbRegionAligned * 2; /* round up */
668
669	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
670	Assert(pBus);
671	pdmLock(pVM);
672	rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
673	pdmUnlock(pVM);
674	}
675	else
676	{
677	AssertMsgFailed(("No PCI device registered!\n"));
678	rc = VERR_PDM_NOT_PCI_DEVICE;
679	}
680
681	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
682	return rc;
683	}
684
685
686	/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
687	static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
688	PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
689	{
690	PDMDEV_ASSERT_DEVINS(pDevIns);
691	PVM pVM = pDevIns->Internal.s.pVMR3;
692	VM_ASSERT_EMT(pVM);
693	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
694	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
695
696	/*
697	* Validate input and resolve defaults.
698	*/
699	AssertPtr(pfnRead);
700	AssertPtr(pfnWrite);
701	AssertPtrNull(ppfnReadOld);
702	AssertPtrNull(ppfnWriteOld);
703	AssertPtrNull(pPciDev);
704
705	if (!pPciDev)
706	pPciDev = pDevIns->Internal.s.pPciDeviceR3;
707	AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
708	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
709	AssertRelease(pBus);
710	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
711
712	/*
713	* Do the job.
714	*/
715	pdmLock(pVM);
716	pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
717	pdmUnlock(pVM);
718
719	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
720	}
721
722
723	/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
724	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
725	{
726	PDMDEV_ASSERT_DEVINS(pDevIns);
727	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
728
729	/*
730	* Validate input.
731	*/
732	/** @todo iIrq and iLevel checks. */
733
734	/*
735	* Must have a PCI device registered!
736	*/
737	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
738	if (pPciDev)
739	{
740	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
741	Assert(pBus);
742	PVM pVM = pDevIns->Internal.s.pVMR3;
743	pdmLock(pVM);
744	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
745	pdmUnlock(pVM);
746	}
747	else
748	AssertReleaseMsgFailed(("No PCI device registered!\n"));
749
750	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
751	}
752
753
754	/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
755	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
756	{
757	pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
758	}
759
760
761	/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
762	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
763	{
764	PDMDEV_ASSERT_DEVINS(pDevIns);
765	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
766
767	/*
768	* Validate input.
769	*/
770	/** @todo iIrq and iLevel checks. */
771
772	PVM pVM = pDevIns->Internal.s.pVMR3;
773	PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
774
775	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
776	}
777
778
779	/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
780	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
781	{
782	pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
783	}
784
785
786	/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
787	static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE ppBaseInterface, const char pszDesc)
788	{
789	PDMDEV_ASSERT_DEVINS(pDevIns);
790	PVM pVM = pDevIns->Internal.s.pVMR3;
791	VM_ASSERT_EMT(pVM);
792	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
793	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
794
795	/*
796	* Lookup the LUN, it might already be registered.
797	*/
798	PPDMLUN pLunPrev = NULL;
799	PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
800	for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
801	if (pLun->iLun == iLun)
802	break;
803
804	/*
805	* Create the LUN if if wasn't found, else check if driver is already attached to it.
806	*/
807	if (!pLun)
808	{
809	if ( !pBaseInterface
810	\|\| !pszDesc
811	\|\| !*pszDesc)
812	{
813	Assert(pBaseInterface);
814	Assert(pszDesc \|\| *pszDesc);
815	return VERR_INVALID_PARAMETER;
816	}
817
818	pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
819	if (!pLun)
820	return VERR_NO_MEMORY;
821
822	pLun->iLun = iLun;
823	pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
824	pLun->pTop = NULL;
825	pLun->pBottom = NULL;
826	pLun->pDevIns = pDevIns;
827	pLun->pszDesc = pszDesc;
828	pLun->pBase = pBaseInterface;
829	if (!pLunPrev)
830	pDevIns->Internal.s.pLunsR3 = pLun;
831	else
832	pLunPrev->pNext = pLun;
833	Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
834	iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
835	}
836	else if (pLun->pTop)
837	{
838	AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
839	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
840	return VERR_PDM_DRIVER_ALREADY_ATTACHED;
841	}
842	Assert(pLun->pBase == pBaseInterface);
843
844
845	/*
846	* Get the attached driver configuration.
847	*/
848	int rc;
849	PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
850	if (pNode)
851	{
852	char *pszName;
853	rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
854	if (RT_SUCCESS(rc))
855	{
856	/*
857	* Find the driver.
858	*/
859	PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
860	if ( pDrv
861	&& pDrv->cInstances < pDrv->pDrvReg->cMaxInstances)
862	{
863	/* config node */
864	PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
865	if (!pConfigNode)
866	rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
867	if (RT_SUCCESS(rc))
868	{
869	CFGMR3SetRestrictedRoot(pConfigNode);
870
871	/*
872	* Allocate the driver instance.
873	*/
874	size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
875	cb = RT_ALIGN_Z(cb, 16);
876	PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
877	if (pNew)
878	{
879	/*
880	* Initialize the instance structure (declaration order).
881	*/
882	pNew->u32Version = PDM_DRVINS_VERSION;
883	//pNew->Internal.s.pUp = NULL;
884	//pNew->Internal.s.pDown = NULL;
885	pNew->Internal.s.pLun = pLun;
886	pNew->Internal.s.pDrv = pDrv;
887	pNew->Internal.s.pVM = pVM;
888	//pNew->Internal.s.fDetaching = false;
889	pNew->Internal.s.fVMSuspended = true;
890	//pNew->Internal.s.pfnAsyncNotify = NULL;
891	pNew->Internal.s.pCfgHandle = pNode;
892	pNew->pDrvHlp = &g_pdmR3DrvHlp;
893	pNew->pDrvReg = pDrv->pDrvReg;
894	pNew->pCfgHandle = pConfigNode;
895	pNew->iInstance = pDrv->iNextInstance;
896	pNew->pUpBase = pBaseInterface;
897	//pNew->pDownBase = NULL;
898	//pNew->IBase.pfnQueryInterface = NULL;
899	pNew->pvInstanceData = &pNew->achInstanceData[0];
900
901	pDrv->iNextInstance++;
902	pDrv->cInstances++;
903
904	/*
905	* Link with LUN and call the constructor.
906	*/
907	pLun->pTop = pLun->pBottom = pNew;
908	rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle, 0 /fFlags/);
909	if (RT_SUCCESS(rc))
910	{
911	MMR3HeapFree(pszName);
912	*ppBaseInterface = &pNew->IBase;
913	Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
914	pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
915	LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
916
917	return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
918	}
919
920	/*
921	* Free the driver.
922	*/
923	pLun->pTop = pLun->pBottom = NULL;
924	ASMMemFill32(pNew, cb, 0xdeadd0d0);
925	MMR3HeapFree(pNew);
926	pDrv->cInstances--;
927	}
928	else
929	{
930	AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
931	rc = VERR_NO_MEMORY;
932	}
933	}
934	else
935	AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
936	}
937	else if (pDrv)
938	{
939	AssertMsgFailed(("Too many instances of driver '%s', max is %u\n", pszName, pDrv->pDrvReg->cMaxInstances));
940	rc = VERR_PDM_TOO_MANY_DRIVER_INSTANCES;
941	}
942	else
943	{
944	AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
945	rc = VERR_PDM_DRIVER_NOT_FOUND;
946	}
947	MMR3HeapFree(pszName);
948	}
949	else
950	{
951	AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
952	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
953	rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
954	}
955	}
956	else
957	rc = VERR_PDM_NO_ATTACHED_DRIVER;
958
959
960	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
961	return rc;
962	}
963
964
965	/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
966	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
967	{
968	PDMDEV_ASSERT_DEVINS(pDevIns);
969	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
970
971	void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
972
973	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
974	return pv;
975	}
976
977
978	/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
979	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
980	{
981	PDMDEV_ASSERT_DEVINS(pDevIns);
982	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
983
984	void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
985
986	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
987	return pv;
988	}
989
990
991	/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
992	static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
993	{
994	PDMDEV_ASSERT_DEVINS(pDevIns);
995	LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
996
997	MMR3HeapFree(pv);
998
999	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1000	}
1001
1002
1003	/** @copydoc PDMDEVHLPR3::pfnVMSetError */
1004	static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
1005	{
1006	PDMDEV_ASSERT_DEVINS(pDevIns);
1007	va_list args;
1008	va_start(args, pszFormat);
1009	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
1010	va_end(args);
1011	return rc;
1012	}
1013
1014
1015	/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
1016	static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
1017	{
1018	PDMDEV_ASSERT_DEVINS(pDevIns);
1019	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
1020	return rc;
1021	}
1022
1023
1024	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
1025	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, ...)
1026	{
1027	PDMDEV_ASSERT_DEVINS(pDevIns);
1028	va_list args;
1029	va_start(args, pszFormat);
1030	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
1031	va_end(args);
1032	return rc;
1033	}
1034
1035
1036	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
1037	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, va_list va)
1038	{
1039	PDMDEV_ASSERT_DEVINS(pDevIns);
1040	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
1041	return rc;
1042	}
1043
1044
1045	/** @copydoc PDMDEVHLPR3::pfnVMState */
1046	static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
1047	{
1048	PDMDEV_ASSERT_DEVINS(pDevIns);
1049
1050	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1051
1052	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1053	enmVMState, VMR3GetStateName(enmVMState)));
1054	return enmVMState;
1055	}
1056
1057
1058	/** @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet */
1059	static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
1060	{
1061	PDMDEV_ASSERT_DEVINS(pDevIns);
1062
1063	bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
1064
1065	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1066	fRc));
1067	return fRc;
1068	}
1069
1070
1071	/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
1072	static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1073	{
1074	PDMDEV_ASSERT_DEVINS(pDevIns);
1075	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1076	return true;
1077
1078	char szMsg[100];
1079	RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1080	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1081	AssertBreakpoint();
1082	return false;
1083	}
1084
1085
1086	/** @copydoc PDMDEVHLPR3::pfnAssertOther */
1087	static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1088	{
1089	PDMDEV_ASSERT_DEVINS(pDevIns);
1090	if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1091	return true;
1092
1093	char szMsg[100];
1094	RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1095	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1096	AssertBreakpoint();
1097	return false;
1098	}
1099
1100
1101	/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
1102	static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction, const char *pszFormat, va_list args)
1103	{
1104	PDMDEV_ASSERT_DEVINS(pDevIns);
1105	#ifdef LOG_ENABLED
1106	va_list va2;
1107	va_copy(va2, args);
1108	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1109	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1110	va_end(va2);
1111	#endif
1112
1113	PVM pVM = pDevIns->Internal.s.pVMR3;
1114	VM_ASSERT_EMT(pVM);
1115	int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1116	if (rc == VERR_DBGF_NOT_ATTACHED)
1117	rc = VINF_SUCCESS;
1118
1119	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1120	return rc;
1121	}
1122
1123
1124	/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1125	static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char pszName, const char pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1126	{
1127	PDMDEV_ASSERT_DEVINS(pDevIns);
1128	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1129	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1130
1131	PVM pVM = pDevIns->Internal.s.pVMR3;
1132	VM_ASSERT_EMT(pVM);
1133	int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1134
1135	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1136	return rc;
1137	}
1138
1139
1140	/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1141	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void pvSample, STAMTYPE enmType, const char pszName, STAMUNIT enmUnit, const char *pszDesc)
1142	{
1143	PDMDEV_ASSERT_DEVINS(pDevIns);
1144	PVM pVM = pDevIns->Internal.s.pVMR3;
1145	VM_ASSERT_EMT(pVM);
1146
1147	STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1148	NOREF(pVM);
1149	}
1150
1151
1152
1153	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1154	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1155	STAMUNIT enmUnit, const char pszDesc, const char pszName, ...)
1156	{
1157	PDMDEV_ASSERT_DEVINS(pDevIns);
1158	PVM pVM = pDevIns->Internal.s.pVMR3;
1159	VM_ASSERT_EMT(pVM);
1160
1161	va_list args;
1162	va_start(args, pszName);
1163	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1164	va_end(args);
1165	AssertRC(rc);
1166
1167	NOREF(pVM);
1168	}
1169
1170
1171	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1172	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1173	STAMUNIT enmUnit, const char pszDesc, const char pszName, va_list args)
1174	{
1175	PDMDEV_ASSERT_DEVINS(pDevIns);
1176	PVM pVM = pDevIns->Internal.s.pVMR3;
1177	VM_ASSERT_EMT(pVM);
1178
1179	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1180	AssertRC(rc);
1181
1182	NOREF(pVM);
1183	}
1184
1185
1186	/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1187	static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1188	{
1189	PDMDEV_ASSERT_DEVINS(pDevIns);
1190	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1191	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1192	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1193	pRtcReg->pfnWrite, ppRtcHlp));
1194
1195	/*
1196	* Validate input.
1197	*/
1198	if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1199	{
1200	AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1201	PDM_RTCREG_VERSION));
1202	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1203	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1204	return VERR_INVALID_PARAMETER;
1205	}
1206	if ( !pRtcReg->pfnWrite
1207	\|\| !pRtcReg->pfnRead)
1208	{
1209	Assert(pRtcReg->pfnWrite);
1210	Assert(pRtcReg->pfnRead);
1211	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1212	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1213	return VERR_INVALID_PARAMETER;
1214	}
1215
1216	if (!ppRtcHlp)
1217	{
1218	Assert(ppRtcHlp);
1219	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1220	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1221	return VERR_INVALID_PARAMETER;
1222	}
1223
1224	/*
1225	* Only one DMA device.
1226	*/
1227	PVM pVM = pDevIns->Internal.s.pVMR3;
1228	if (pVM->pdm.s.pRtc)
1229	{
1230	AssertMsgFailed(("Only one RTC device is supported!\n"));
1231	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1232	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1233	return VERR_INVALID_PARAMETER;
1234	}
1235
1236	/*
1237	* Allocate and initialize pci bus structure.
1238	*/
1239	int rc = VINF_SUCCESS;
1240	PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1241	if (pRtc)
1242	{
1243	pRtc->pDevIns = pDevIns;
1244	pRtc->Reg = *pRtcReg;
1245	pVM->pdm.s.pRtc = pRtc;
1246
1247	/* set the helper pointer. */
1248	*ppRtcHlp = &g_pdmR3DevRtcHlp;
1249	Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1250	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1251	}
1252	else
1253	rc = VERR_NO_MEMORY;
1254
1255	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1256	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1257	return rc;
1258	}
1259
1260
1261	/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1262	static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1263	PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char pszName, PPDMQUEUE ppQueue)
1264	{
1265	PDMDEV_ASSERT_DEVINS(pDevIns);
1266	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1267	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1268
1269	PVM pVM = pDevIns->Internal.s.pVMR3;
1270	VM_ASSERT_EMT(pVM);
1271
1272	if (pDevIns->iInstance > 0)
1273	{
1274	pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1275	AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1276	}
1277
1278	int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1279
1280	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, ppQueue));
1281	return rc;
1282	}
1283
1284
1285	/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1286	static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1287	{
1288	PDMDEV_ASSERT_DEVINS(pDevIns);
1289	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1290	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1291
1292	PVM pVM = pDevIns->Internal.s.pVMR3;
1293	VM_ASSERT_EMT(pVM);
1294	int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1295
1296	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1297	return rc;
1298	}
1299
1300
1301	/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1302	static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1303	{
1304	PDMDEV_ASSERT_DEVINS(pDevIns);
1305	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1306	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1307
1308	pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1309
1310	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1311	return pTime;
1312	}
1313
1314
1315	/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1316	static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1317	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1318	{
1319	PDMDEV_ASSERT_DEVINS(pDevIns);
1320	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1321	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1322	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1323
1324	int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1325
1326	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1327	rc, *ppThread));
1328	return rc;
1329	}
1330
1331
1332	/** @copydoc PDMDEVHLPR3::pfnGetVM */
1333	static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1334	{
1335	PDMDEV_ASSERT_DEVINS(pDevIns);
1336	LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1337	return pDevIns->Internal.s.pVMR3;
1338	}
1339
1340
1341	/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
1342	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1343	{
1344	PDMDEV_ASSERT_DEVINS(pDevIns);
1345	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1346	LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1347	return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1348	}
1349
1350
1351	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1352	static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1353	{
1354	PDMDEV_ASSERT_DEVINS(pDevIns);
1355	PVM pVM = pDevIns->Internal.s.pVMR3;
1356	VM_ASSERT_EMT(pVM);
1357	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1358	".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1359	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1360	pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1361	pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1362
1363	/*
1364	* Validate the structure.
1365	*/
1366	if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1367	{
1368	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1369	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1370	return VERR_INVALID_PARAMETER;
1371	}
1372	if ( !pPciBusReg->pfnRegisterR3
1373	\|\| !pPciBusReg->pfnIORegionRegisterR3
1374	\|\| !pPciBusReg->pfnSetIrqR3
1375	\|\| !pPciBusReg->pfnSaveExecR3
1376	\|\| !pPciBusReg->pfnLoadExecR3
1377	\|\| (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1378	{
1379	Assert(pPciBusReg->pfnRegisterR3);
1380	Assert(pPciBusReg->pfnIORegionRegisterR3);
1381	Assert(pPciBusReg->pfnSetIrqR3);
1382	Assert(pPciBusReg->pfnSaveExecR3);
1383	Assert(pPciBusReg->pfnLoadExecR3);
1384	Assert(pPciBusReg->pfnFakePCIBIOSR3);
1385	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1386	return VERR_INVALID_PARAMETER;
1387	}
1388	if ( pPciBusReg->pszSetIrqRC
1389	&& !VALID_PTR(pPciBusReg->pszSetIrqRC))
1390	{
1391	Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1392	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1393	return VERR_INVALID_PARAMETER;
1394	}
1395	if ( pPciBusReg->pszSetIrqR0
1396	&& !VALID_PTR(pPciBusReg->pszSetIrqR0))
1397	{
1398	Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1399	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1400	return VERR_INVALID_PARAMETER;
1401	}
1402	if (!ppPciHlpR3)
1403	{
1404	Assert(ppPciHlpR3);
1405	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1406	return VERR_INVALID_PARAMETER;
1407	}
1408
1409	/*
1410	* Find free PCI bus entry.
1411	*/
1412	unsigned iBus = 0;
1413	for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1414	if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1415	break;
1416	if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1417	{
1418	AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1419	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1420	return VERR_INVALID_PARAMETER;
1421	}
1422	PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1423
1424	/*
1425	* Resolve and init the RC bits.
1426	*/
1427	if (pPciBusReg->pszSetIrqRC)
1428	{
1429	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1430	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1431	if (RT_FAILURE(rc))
1432	{
1433	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1434	return rc;
1435	}
1436	pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1437	}
1438	else
1439	{
1440	pPciBus->pfnSetIrqRC = 0;
1441	pPciBus->pDevInsRC = 0;
1442	}
1443
1444	/*
1445	* Resolve and init the R0 bits.
1446	*/
1447	if (pPciBusReg->pszSetIrqR0)
1448	{
1449	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1450	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1451	if (RT_FAILURE(rc))
1452	{
1453	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1454	return rc;
1455	}
1456	pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1457	}
1458	else
1459	{
1460	pPciBus->pfnSetIrqR0 = 0;
1461	pPciBus->pDevInsR0 = 0;
1462	}
1463
1464	/*
1465	* Init the R3 bits.
1466	*/
1467	pPciBus->iBus = iBus;
1468	pPciBus->pDevInsR3 = pDevIns;
1469	pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1470	pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1471	pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1472	pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1473	pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1474	pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1475	pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1476
1477	Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1478
1479	/* set the helper pointer and return. */
1480	*ppPciHlpR3 = &g_pdmR3DevPciHlp;
1481	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1482	return VINF_SUCCESS;
1483	}
1484
1485
1486	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1487	static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1488	{
1489	PDMDEV_ASSERT_DEVINS(pDevIns);
1490	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1491	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1492	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1493	pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1494	pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1495	ppPicHlpR3));
1496
1497	/*
1498	* Validate input.
1499	*/
1500	if (pPicReg->u32Version != PDM_PICREG_VERSION)
1501	{
1502	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1503	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1504	return VERR_INVALID_PARAMETER;
1505	}
1506	if ( !pPicReg->pfnSetIrqR3
1507	\|\| !pPicReg->pfnGetInterruptR3)
1508	{
1509	Assert(pPicReg->pfnSetIrqR3);
1510	Assert(pPicReg->pfnGetInterruptR3);
1511	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1512	return VERR_INVALID_PARAMETER;
1513	}
1514	if ( ( pPicReg->pszSetIrqRC
1515	\|\| pPicReg->pszGetInterruptRC)
1516	&& ( !VALID_PTR(pPicReg->pszSetIrqRC)
1517	\|\| !VALID_PTR(pPicReg->pszGetInterruptRC))
1518	)
1519	{
1520	Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1521	Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1522	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1523	return VERR_INVALID_PARAMETER;
1524	}
1525	if ( pPicReg->pszSetIrqRC
1526	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1527	{
1528	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1529	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1530	return VERR_INVALID_PARAMETER;
1531	}
1532	if ( pPicReg->pszSetIrqR0
1533	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1534	{
1535	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1536	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1537	return VERR_INVALID_PARAMETER;
1538	}
1539	if (!ppPicHlpR3)
1540	{
1541	Assert(ppPicHlpR3);
1542	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1543	return VERR_INVALID_PARAMETER;
1544	}
1545
1546	/*
1547	* Only one PIC device.
1548	*/
1549	PVM pVM = pDevIns->Internal.s.pVMR3;
1550	if (pVM->pdm.s.Pic.pDevInsR3)
1551	{
1552	AssertMsgFailed(("Only one pic device is supported!\n"));
1553	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1554	return VERR_INVALID_PARAMETER;
1555	}
1556
1557	/*
1558	* RC stuff.
1559	*/
1560	if (pPicReg->pszSetIrqRC)
1561	{
1562	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1563	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1564	if (RT_SUCCESS(rc))
1565	{
1566	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1567	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1568	}
1569	if (RT_FAILURE(rc))
1570	{
1571	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1572	return rc;
1573	}
1574	pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1575	}
1576	else
1577	{
1578	pVM->pdm.s.Pic.pDevInsRC = 0;
1579	pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1580	pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1581	}
1582
1583	/*
1584	* R0 stuff.
1585	*/
1586	if (pPicReg->pszSetIrqR0)
1587	{
1588	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1589	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1590	if (RT_SUCCESS(rc))
1591	{
1592	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1593	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1594	}
1595	if (RT_FAILURE(rc))
1596	{
1597	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1598	return rc;
1599	}
1600	pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1601	Assert(pVM->pdm.s.Pic.pDevInsR0);
1602	}
1603	else
1604	{
1605	pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1606	pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1607	pVM->pdm.s.Pic.pDevInsR0 = 0;
1608	}
1609
1610	/*
1611	* R3 stuff.
1612	*/
1613	pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1614	pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1615	pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1616	Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1617
1618	/* set the helper pointer and return. */
1619	*ppPicHlpR3 = &g_pdmR3DevPicHlp;
1620	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1621	return VINF_SUCCESS;
1622	}
1623
1624
1625	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1626	static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1627	{
1628	PDMDEV_ASSERT_DEVINS(pDevIns);
1629	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1630	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1631	".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1632	".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
1633	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1634	pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
1635	pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1636	pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1637	pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
1638
1639	/*
1640	* Validate input.
1641	*/
1642	if (pApicReg->u32Version != PDM_APICREG_VERSION)
1643	{
1644	AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1645	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1646	return VERR_INVALID_PARAMETER;
1647	}
1648	if ( !pApicReg->pfnGetInterruptR3
1649	\|\| !pApicReg->pfnHasPendingIrqR3
1650	\|\| !pApicReg->pfnSetBaseR3
1651	\|\| !pApicReg->pfnGetBaseR3
1652	\|\| !pApicReg->pfnSetTPRR3
1653	\|\| !pApicReg->pfnGetTPRR3
1654	\|\| !pApicReg->pfnWriteMSRR3
1655	\|\| !pApicReg->pfnReadMSRR3
1656	\|\| !pApicReg->pfnBusDeliverR3
1657	\|\| !pApicReg->pfnLocalInterruptR3)
1658	{
1659	Assert(pApicReg->pfnGetInterruptR3);
1660	Assert(pApicReg->pfnHasPendingIrqR3);
1661	Assert(pApicReg->pfnSetBaseR3);
1662	Assert(pApicReg->pfnGetBaseR3);
1663	Assert(pApicReg->pfnSetTPRR3);
1664	Assert(pApicReg->pfnGetTPRR3);
1665	Assert(pApicReg->pfnWriteMSRR3);
1666	Assert(pApicReg->pfnReadMSRR3);
1667	Assert(pApicReg->pfnBusDeliverR3);
1668	Assert(pApicReg->pfnLocalInterruptR3);
1669	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1670	return VERR_INVALID_PARAMETER;
1671	}
1672	if ( ( pApicReg->pszGetInterruptRC
1673	\|\| pApicReg->pszHasPendingIrqRC
1674	\|\| pApicReg->pszSetBaseRC
1675	\|\| pApicReg->pszGetBaseRC
1676	\|\| pApicReg->pszSetTPRRC
1677	\|\| pApicReg->pszGetTPRRC
1678	\|\| pApicReg->pszWriteMSRRC
1679	\|\| pApicReg->pszReadMSRRC
1680	\|\| pApicReg->pszBusDeliverRC
1681	\|\| pApicReg->pszLocalInterruptRC)
1682	&& ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1683	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1684	\|\| !VALID_PTR(pApicReg->pszSetBaseRC)
1685	\|\| !VALID_PTR(pApicReg->pszGetBaseRC)
1686	\|\| !VALID_PTR(pApicReg->pszSetTPRRC)
1687	\|\| !VALID_PTR(pApicReg->pszGetTPRRC)
1688	\|\| !VALID_PTR(pApicReg->pszWriteMSRRC)
1689	\|\| !VALID_PTR(pApicReg->pszReadMSRRC)
1690	\|\| !VALID_PTR(pApicReg->pszBusDeliverRC)
1691	\|\| !VALID_PTR(pApicReg->pszLocalInterruptRC))
1692	)
1693	{
1694	Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1695	Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1696	Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1697	Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1698	Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1699	Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1700	Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1701	Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1702	Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1703	Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
1704	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1705	return VERR_INVALID_PARAMETER;
1706	}
1707	if ( ( pApicReg->pszGetInterruptR0
1708	\|\| pApicReg->pszHasPendingIrqR0
1709	\|\| pApicReg->pszSetBaseR0
1710	\|\| pApicReg->pszGetBaseR0
1711	\|\| pApicReg->pszSetTPRR0
1712	\|\| pApicReg->pszGetTPRR0
1713	\|\| pApicReg->pszWriteMSRR0
1714	\|\| pApicReg->pszReadMSRR0
1715	\|\| pApicReg->pszBusDeliverR0
1716	\|\| pApicReg->pszLocalInterruptR0)
1717	&& ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1718	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1719	\|\| !VALID_PTR(pApicReg->pszSetBaseR0)
1720	\|\| !VALID_PTR(pApicReg->pszGetBaseR0)
1721	\|\| !VALID_PTR(pApicReg->pszSetTPRR0)
1722	\|\| !VALID_PTR(pApicReg->pszGetTPRR0)
1723	\|\| !VALID_PTR(pApicReg->pszReadMSRR0)
1724	\|\| !VALID_PTR(pApicReg->pszWriteMSRR0)
1725	\|\| !VALID_PTR(pApicReg->pszBusDeliverR0)
1726	\|\| !VALID_PTR(pApicReg->pszLocalInterruptR0))
1727	)
1728	{
1729	Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1730	Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1731	Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1732	Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1733	Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1734	Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1735	Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1736	Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1737	Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1738	Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
1739	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1740	return VERR_INVALID_PARAMETER;
1741	}
1742	if (!ppApicHlpR3)
1743	{
1744	Assert(ppApicHlpR3);
1745	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1746	return VERR_INVALID_PARAMETER;
1747	}
1748
1749	/*
1750	* Only one APIC device. On SMP we have single logical device covering all LAPICs,
1751	* as they need to communicate and share state easily.
1752	*/
1753	PVM pVM = pDevIns->Internal.s.pVMR3;
1754	if (pVM->pdm.s.Apic.pDevInsR3)
1755	{
1756	AssertMsgFailed(("Only one apic device is supported!\n"));
1757	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1758	return VERR_INVALID_PARAMETER;
1759	}
1760
1761	/*
1762	* Resolve & initialize the RC bits.
1763	*/
1764	if (pApicReg->pszGetInterruptRC)
1765	{
1766	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1767	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1768	if (RT_SUCCESS(rc))
1769	{
1770	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1771	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1772	}
1773	if (RT_SUCCESS(rc))
1774	{
1775	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1776	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1777	}
1778	if (RT_SUCCESS(rc))
1779	{
1780	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1781	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1782	}
1783	if (RT_SUCCESS(rc))
1784	{
1785	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1786	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1787	}
1788	if (RT_SUCCESS(rc))
1789	{
1790	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1791	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1792	}
1793	if (RT_SUCCESS(rc))
1794	{
1795	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1796	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1797	}
1798	if (RT_SUCCESS(rc))
1799	{
1800	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1801	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1802	}
1803	if (RT_SUCCESS(rc))
1804	{
1805	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1806	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1807	}
1808	if (RT_SUCCESS(rc))
1809	{
1810	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
1811	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
1812	}
1813	if (RT_FAILURE(rc))
1814	{
1815	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1816	return rc;
1817	}
1818	pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1819	}
1820	else
1821	{
1822	pVM->pdm.s.Apic.pDevInsRC = 0;
1823	pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1824	pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1825	pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1826	pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1827	pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1828	pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1829	pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1830	pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1831	pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1832	pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
1833	}
1834
1835	/*
1836	* Resolve & initialize the R0 bits.
1837	*/
1838	if (pApicReg->pszGetInterruptR0)
1839	{
1840	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1841	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1842	if (RT_SUCCESS(rc))
1843	{
1844	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1845	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1846	}
1847	if (RT_SUCCESS(rc))
1848	{
1849	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1850	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1851	}
1852	if (RT_SUCCESS(rc))
1853	{
1854	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1855	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1856	}
1857	if (RT_SUCCESS(rc))
1858	{
1859	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1860	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1861	}
1862	if (RT_SUCCESS(rc))
1863	{
1864	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1865	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1866	}
1867	if (RT_SUCCESS(rc))
1868	{
1869	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1870	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1871	}
1872	if (RT_SUCCESS(rc))
1873	{
1874	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1875	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1876	}
1877	if (RT_SUCCESS(rc))
1878	{
1879	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1880	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1881	}
1882	if (RT_SUCCESS(rc))
1883	{
1884	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
1885	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
1886	}
1887	if (RT_FAILURE(rc))
1888	{
1889	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1890	return rc;
1891	}
1892	pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1893	Assert(pVM->pdm.s.Apic.pDevInsR0);
1894	}
1895	else
1896	{
1897	pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1898	pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1899	pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1900	pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1901	pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1902	pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1903	pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1904	pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1905	pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1906	pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
1907	pVM->pdm.s.Apic.pDevInsR0 = 0;
1908	}
1909
1910	/*
1911	* Initialize the HC bits.
1912	*/
1913	pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1914	pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1915	pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1916	pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1917	pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1918	pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1919	pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1920	pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1921	pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1922	pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1923	pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
1924	Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1925
1926	/* set the helper pointer and return. */
1927	*ppApicHlpR3 = &g_pdmR3DevApicHlp;
1928	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1929	return VINF_SUCCESS;
1930	}
1931
1932
1933	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1934	static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1935	{
1936	PDMDEV_ASSERT_DEVINS(pDevIns);
1937	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1938	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1939	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1940	pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1941
1942	/*
1943	* Validate input.
1944	*/
1945	if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1946	{
1947	AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1948	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1949	return VERR_INVALID_PARAMETER;
1950	}
1951	if (!pIoApicReg->pfnSetIrqR3)
1952	{
1953	Assert(pIoApicReg->pfnSetIrqR3);
1954	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1955	return VERR_INVALID_PARAMETER;
1956	}
1957	if ( pIoApicReg->pszSetIrqRC
1958	&& !VALID_PTR(pIoApicReg->pszSetIrqRC))
1959	{
1960	Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1961	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1962	return VERR_INVALID_PARAMETER;
1963	}
1964	if ( pIoApicReg->pszSetIrqR0
1965	&& !VALID_PTR(pIoApicReg->pszSetIrqR0))
1966	{
1967	Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1968	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1969	return VERR_INVALID_PARAMETER;
1970	}
1971	if (!ppIoApicHlpR3)
1972	{
1973	Assert(ppIoApicHlpR3);
1974	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1975	return VERR_INVALID_PARAMETER;
1976	}
1977
1978	/*
1979	* The I/O APIC requires the APIC to be present (hacks++).
1980	* If the I/O APIC does GC stuff so must the APIC.
1981	*/
1982	PVM pVM = pDevIns->Internal.s.pVMR3;
1983	if (!pVM->pdm.s.Apic.pDevInsR3)
1984	{
1985	AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1986	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1987	return VERR_INVALID_PARAMETER;
1988	}
1989	if ( pIoApicReg->pszSetIrqRC
1990	&& !pVM->pdm.s.Apic.pDevInsRC)
1991	{
1992	AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1993	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1994	return VERR_INVALID_PARAMETER;
1995	}
1996
1997	/*
1998	* Only one I/O APIC device.
1999	*/
2000	if (pVM->pdm.s.IoApic.pDevInsR3)
2001	{
2002	AssertMsgFailed(("Only one ioapic device is supported!\n"));
2003	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2004	return VERR_INVALID_PARAMETER;
2005	}
2006
2007	/*
2008	* Resolve & initialize the GC bits.
2009	*/
2010	if (pIoApicReg->pszSetIrqRC)
2011	{
2012	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2013	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2014	if (RT_FAILURE(rc))
2015	{
2016	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2017	return rc;
2018	}
2019	pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2020	}
2021	else
2022	{
2023	pVM->pdm.s.IoApic.pDevInsRC = 0;
2024	pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2025	}
2026
2027	/*
2028	* Resolve & initialize the R0 bits.
2029	*/
2030	if (pIoApicReg->pszSetIrqR0)
2031	{
2032	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2033	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2034	if (RT_FAILURE(rc))
2035	{
2036	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2037	return rc;
2038	}
2039	pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2040	Assert(pVM->pdm.s.IoApic.pDevInsR0);
2041	}
2042	else
2043	{
2044	pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2045	pVM->pdm.s.IoApic.pDevInsR0 = 0;
2046	}
2047
2048	/*
2049	* Initialize the R3 bits.
2050	*/
2051	pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2052	pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2053	Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2054
2055	/* set the helper pointer and return. */
2056	*ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2057	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2058	return VINF_SUCCESS;
2059	}
2060
2061
2062	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2063	static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2064	{
2065	PDMDEV_ASSERT_DEVINS(pDevIns);
2066	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2067	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2068	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2069	pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2070
2071	/*
2072	* Validate input.
2073	*/
2074	if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2075	{
2076	AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2077	PDM_DMACREG_VERSION));
2078	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2079	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2080	return VERR_INVALID_PARAMETER;
2081	}
2082	if ( !pDmacReg->pfnRun
2083	\|\| !pDmacReg->pfnRegister
2084	\|\| !pDmacReg->pfnReadMemory
2085	\|\| !pDmacReg->pfnWriteMemory
2086	\|\| !pDmacReg->pfnSetDREQ
2087	\|\| !pDmacReg->pfnGetChannelMode)
2088	{
2089	Assert(pDmacReg->pfnRun);
2090	Assert(pDmacReg->pfnRegister);
2091	Assert(pDmacReg->pfnReadMemory);
2092	Assert(pDmacReg->pfnWriteMemory);
2093	Assert(pDmacReg->pfnSetDREQ);
2094	Assert(pDmacReg->pfnGetChannelMode);
2095	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2096	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2097	return VERR_INVALID_PARAMETER;
2098	}
2099
2100	if (!ppDmacHlp)
2101	{
2102	Assert(ppDmacHlp);
2103	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2104	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2105	return VERR_INVALID_PARAMETER;
2106	}
2107
2108	/*
2109	* Only one DMA device.
2110	*/
2111	PVM pVM = pDevIns->Internal.s.pVMR3;
2112	if (pVM->pdm.s.pDmac)
2113	{
2114	AssertMsgFailed(("Only one DMA device is supported!\n"));
2115	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2116	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2117	return VERR_INVALID_PARAMETER;
2118	}
2119
2120	/*
2121	* Allocate and initialize pci bus structure.
2122	*/
2123	int rc = VINF_SUCCESS;
2124	PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2125	if (pDmac)
2126	{
2127	pDmac->pDevIns = pDevIns;
2128	pDmac->Reg = *pDmacReg;
2129	pVM->pdm.s.pDmac = pDmac;
2130
2131	/* set the helper pointer. */
2132	*ppDmacHlp = &g_pdmR3DevDmacHlp;
2133	Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2134	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2135	}
2136	else
2137	rc = VERR_NO_MEMORY;
2138
2139	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2140	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2141	return rc;
2142	}
2143
2144
2145	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2146	static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2147	{
2148	PDMDEV_ASSERT_DEVINS(pDevIns);
2149	PVM pVM = pDevIns->Internal.s.pVMR3;
2150	LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2151	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2152
2153	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2154	if (!VM_IS_EMT(pVM))
2155	{
2156	char szNames[128];
2157	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2158	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2159	}
2160	#endif
2161
2162	int rc;
2163	if (VM_IS_EMT(pVM))
2164	rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
2165	else
2166	rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
2167
2168	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2169	return rc;
2170	}
2171
2172
2173	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2174	static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2175	{
2176	PDMDEV_ASSERT_DEVINS(pDevIns);
2177	PVM pVM = pDevIns->Internal.s.pVMR3;
2178	LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2179	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2180
2181	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2182	if (!VM_IS_EMT(pVM))
2183	{
2184	char szNames[128];
2185	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2186	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2187	}
2188	#endif
2189
2190	int rc;
2191	if (VM_IS_EMT(pVM))
2192	rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
2193	else
2194	rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pDevReg->szDeviceName);
2195
2196	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2197	return rc;
2198	}
2199
2200
2201	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2202	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2203	{
2204	PDMDEV_ASSERT_DEVINS(pDevIns);
2205	PVM pVM = pDevIns->Internal.s.pVMR3;
2206	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2207	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2208	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2209
2210	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2211	if (!VM_IS_EMT(pVM))
2212	{
2213	char szNames[128];
2214	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2215	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2216	}
2217	#endif
2218
2219	int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
2220
2221	Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2222	return rc;
2223	}
2224
2225
2226	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2227	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2228	{
2229	PDMDEV_ASSERT_DEVINS(pDevIns);
2230	PVM pVM = pDevIns->Internal.s.pVMR3;
2231	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2232	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2233	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2234
2235	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2236	if (!VM_IS_EMT(pVM))
2237	{
2238	char szNames[128];
2239	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2240	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2241	}
2242	#endif
2243
2244	int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
2245
2246	Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2247	return rc;
2248	}
2249
2250
2251	/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2252	static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2253	{
2254	PDMDEV_ASSERT_DEVINS(pDevIns);
2255	PVM pVM = pDevIns->Internal.s.pVMR3;
2256	LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
2257	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pLock));
2258
2259	PGMPhysReleasePageMappingLock(pVM, pLock);
2260
2261	Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2262	}
2263
2264
2265	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2266	static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2267	{
2268	PDMDEV_ASSERT_DEVINS(pDevIns);
2269	PVM pVM = pDevIns->Internal.s.pVMR3;
2270	VM_ASSERT_EMT(pVM);
2271	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2272	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2273
2274	PVMCPU pVCpu = VMMGetCpu(pVM);
2275	if (!pVCpu)
2276	return VERR_ACCESS_DENIED;
2277	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2278	/** @todo SMP. */
2279	#endif
2280
2281	int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
2282
2283	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2284
2285	return rc;
2286	}
2287
2288
2289	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2290	static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2291	{
2292	PDMDEV_ASSERT_DEVINS(pDevIns);
2293	PVM pVM = pDevIns->Internal.s.pVMR3;
2294	VM_ASSERT_EMT(pVM);
2295	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2296	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2297
2298	PVMCPU pVCpu = VMMGetCpu(pVM);
2299	if (!pVCpu)
2300	return VERR_ACCESS_DENIED;
2301	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2302	/** @todo SMP. */
2303	#endif
2304
2305	int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
2306
2307	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2308
2309	return rc;
2310	}
2311
2312
2313	/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2314	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2315	{
2316	PDMDEV_ASSERT_DEVINS(pDevIns);
2317	PVM pVM = pDevIns->Internal.s.pVMR3;
2318	VM_ASSERT_EMT(pVM);
2319	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2320	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2321
2322	PVMCPU pVCpu = VMMGetCpu(pVM);
2323	if (!pVCpu)
2324	return VERR_ACCESS_DENIED;
2325	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2326	/** @todo SMP. */
2327	#endif
2328
2329	int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
2330
2331	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pGCPhys));
2332
2333	return rc;
2334	}
2335
2336
2337	/** @copydoc PDMDEVHLPR3::pfnSetAsyncNotification */
2338	static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
2339	{
2340	PDMDEV_ASSERT_DEVINS(pDevIns);
2341	VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
2342	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pfnAsyncNotify));
2343
2344	int rc = VINF_SUCCESS;
2345	AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
2346	AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
2347	AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED \| PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
2348	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2349	AssertStmt( enmVMState == VMSTATE_SUSPENDING
2350	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
2351	\|\| enmVMState == VMSTATE_SUSPENDING_LS
2352	\|\| enmVMState == VMSTATE_RESETTING
2353	\|\| enmVMState == VMSTATE_RESETTING_LS
2354	\|\| enmVMState == VMSTATE_POWERING_OFF
2355	\|\| enmVMState == VMSTATE_POWERING_OFF_LS,
2356	rc = VERR_INVALID_STATE);
2357
2358	if (RT_SUCCESS(rc))
2359	pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
2360
2361	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2362	return rc;
2363	}
2364
2365
2366	/** @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted */
2367	static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
2368	{
2369	PDMDEV_ASSERT_DEVINS(pDevIns);
2370	PVM pVM = pDevIns->Internal.s.pVMR3;
2371
2372	VMSTATE enmVMState = VMR3GetState(pVM);
2373	if ( enmVMState == VMSTATE_SUSPENDING
2374	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
2375	\|\| enmVMState == VMSTATE_SUSPENDING_LS
2376	\|\| enmVMState == VMSTATE_RESETTING
2377	\|\| enmVMState == VMSTATE_RESETTING_LS
2378	\|\| enmVMState == VMSTATE_POWERING_OFF
2379	\|\| enmVMState == VMSTATE_POWERING_OFF_LS)
2380	{
2381	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2382	VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
2383	}
2384	else
2385	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmVMState));
2386	}
2387
2388
2389	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2390	static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2391	{
2392	PDMDEV_ASSERT_DEVINS(pDevIns);
2393	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2394
2395	bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
2396
2397	LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2398	return fRc;
2399	}
2400
2401
2402	/** @copydoc PDMDEVHLPR3::pfnA20Set */
2403	static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2404	{
2405	PDMDEV_ASSERT_DEVINS(pDevIns);
2406	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2407	LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2408	PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
2409	}
2410
2411
2412	/** @copydoc PDMDEVHLPR3::pfnVMReset */
2413	static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2414	{
2415	PDMDEV_ASSERT_DEVINS(pDevIns);
2416	PVM pVM = pDevIns->Internal.s.pVMR3;
2417	VM_ASSERT_EMT(pVM);
2418	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2419	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2420
2421	/*
2422	* We postpone this operation because we're likely to be inside a I/O instruction
2423	* and the EIP will be updated when we return.
2424	* We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2425	*/
2426	bool fHaltOnReset;
2427	int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2428	if (RT_SUCCESS(rc) && fHaltOnReset)
2429	{
2430	Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2431	rc = VINF_EM_HALT;
2432	}
2433	else
2434	{
2435	VM_FF_SET(pVM, VM_FF_RESET);
2436	rc = VINF_EM_RESET;
2437	}
2438
2439	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2440	return rc;
2441	}
2442
2443
2444	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2445	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2446	{
2447	int rc;
2448	PDMDEV_ASSERT_DEVINS(pDevIns);
2449	PVM pVM = pDevIns->Internal.s.pVMR3;
2450	VM_ASSERT_EMT(pVM);
2451	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2452	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2453
2454	if (pVM->cCpus > 1)
2455	{
2456	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2457	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
2458	AssertRC(rc);
2459	rc = VINF_EM_SUSPEND;
2460	}
2461	else
2462	rc = VMR3Suspend(pVM);
2463
2464	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2465	return rc;
2466	}
2467
2468
2469	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2470	static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2471	{
2472	int rc;
2473	PDMDEV_ASSERT_DEVINS(pDevIns);
2474	PVM pVM = pDevIns->Internal.s.pVMR3;
2475	VM_ASSERT_EMT(pVM);
2476	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2477	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2478
2479	if (pVM->cCpus > 1)
2480	{
2481	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2482	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
2483	AssertRC(rc);
2484	/* Set the VCPU state to stopped here as well to make sure no
2485	* inconsistency with the EM state occurs.
2486	*/
2487	VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
2488	rc = VINF_EM_OFF;
2489	}
2490	else
2491	rc = VMR3PowerOff(pVM);
2492
2493	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2494	return rc;
2495	}
2496
2497	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2498	static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2499	{
2500	PDMDEV_ASSERT_DEVINS(pDevIns);
2501	PVM pVM = pDevIns->Internal.s.pVMR3;
2502	VM_ASSERT_EMT(pVM);
2503	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2504	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2505	int rc = VINF_SUCCESS;
2506	if (pVM->pdm.s.pDmac)
2507	pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2508	else
2509	{
2510	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2511	rc = VERR_PDM_NO_DMAC_INSTANCE;
2512	}
2513	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2514	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2515	return rc;
2516	}
2517
2518	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2519	static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
2520	{
2521	PDMDEV_ASSERT_DEVINS(pDevIns);
2522	PVM pVM = pDevIns->Internal.s.pVMR3;
2523	VM_ASSERT_EMT(pVM);
2524	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2525	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2526	int rc = VINF_SUCCESS;
2527	if (pVM->pdm.s.pDmac)
2528	{
2529	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2530	if (pcbRead)
2531	*pcbRead = cb;
2532	}
2533	else
2534	{
2535	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2536	rc = VERR_PDM_NO_DMAC_INSTANCE;
2537	}
2538	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2539	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2540	return rc;
2541	}
2542
2543	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2544	static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
2545	{
2546	PDMDEV_ASSERT_DEVINS(pDevIns);
2547	PVM pVM = pDevIns->Internal.s.pVMR3;
2548	VM_ASSERT_EMT(pVM);
2549	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2550	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2551	int rc = VINF_SUCCESS;
2552	if (pVM->pdm.s.pDmac)
2553	{
2554	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2555	if (pcbWritten)
2556	*pcbWritten = cb;
2557	}
2558	else
2559	{
2560	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2561	rc = VERR_PDM_NO_DMAC_INSTANCE;
2562	}
2563	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2564	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2565	return rc;
2566	}
2567
2568	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2569	static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2570	{
2571	PDMDEV_ASSERT_DEVINS(pDevIns);
2572	PVM pVM = pDevIns->Internal.s.pVMR3;
2573	VM_ASSERT_EMT(pVM);
2574	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2575	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2576	int rc = VINF_SUCCESS;
2577	if (pVM->pdm.s.pDmac)
2578	pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2579	else
2580	{
2581	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2582	rc = VERR_PDM_NO_DMAC_INSTANCE;
2583	}
2584	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2585	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2586	return rc;
2587	}
2588
2589	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2590	static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2591	{
2592	PDMDEV_ASSERT_DEVINS(pDevIns);
2593	PVM pVM = pDevIns->Internal.s.pVMR3;
2594	VM_ASSERT_EMT(pVM);
2595	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2596	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2597	uint8_t u8Mode;
2598	if (pVM->pdm.s.pDmac)
2599	u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2600	else
2601	{
2602	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2603	u8Mode = 3 << 2 /* illegal mode type */;
2604	}
2605	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2606	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2607	return u8Mode;
2608	}
2609
2610	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2611	static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2612	{
2613	PDMDEV_ASSERT_DEVINS(pDevIns);
2614	PVM pVM = pDevIns->Internal.s.pVMR3;
2615	VM_ASSERT_EMT(pVM);
2616	LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2617	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2618
2619	AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2620	VM_FF_SET(pVM, VM_FF_PDM_DMA);
2621	REMR3NotifyDmaPending(pVM);
2622	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
2623	}
2624
2625
2626	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2627	static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2628	{
2629	PDMDEV_ASSERT_DEVINS(pDevIns);
2630	PVM pVM = pDevIns->Internal.s.pVMR3;
2631	VM_ASSERT_EMT(pVM);
2632
2633	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2634	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2635	int rc;
2636	if (pVM->pdm.s.pRtc)
2637	rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2638	else
2639	rc = VERR_PDM_NO_RTC_INSTANCE;
2640
2641	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2642	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2643	return rc;
2644	}
2645
2646
2647	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2648	static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2649	{
2650	PDMDEV_ASSERT_DEVINS(pDevIns);
2651	PVM pVM = pDevIns->Internal.s.pVMR3;
2652	VM_ASSERT_EMT(pVM);
2653
2654	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2655	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2656	int rc;
2657	if (pVM->pdm.s.pRtc)
2658	rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2659	else
2660	rc = VERR_PDM_NO_RTC_INSTANCE;
2661
2662	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2663	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2664	return rc;
2665	}
2666
2667
2668	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2669	static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2670	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
2671	{
2672	PDMDEV_ASSERT_DEVINS(pDevIns);
2673	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2674
2675	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2676	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2677	AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2678
2679	CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
2680
2681	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - pEax=%#x pEbx=%#x pEcx=%#x pEdx=%#x\n",
2682	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pEax, pEbx, pEcx, pEdx));
2683	}
2684
2685
2686	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2687	static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
2688	{
2689	PDMDEV_ASSERT_DEVINS(pDevIns);
2690	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
2691	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
2692
2693	int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
2694
2695	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2696	return rc;
2697	}
2698
2699
2700	/**
2701	* @copydoc PDMDEVHLPR3::pfnMMIO2Register
2702	*/
2703	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
2704	{
2705	PDMDEV_ASSERT_DEVINS(pDevIns);
2706	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2707	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2708	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2709
2710	/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
2711	* use a real string cache. */
2712	int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2713
2714	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2715	return rc;
2716	}
2717
2718
2719	/**
2720	* @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2721	*/
2722	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2723	{
2724	PDMDEV_ASSERT_DEVINS(pDevIns);
2725	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2726	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
2727	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2728
2729	AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2730
2731	int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2732
2733	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2734	return rc;
2735	}
2736
2737
2738	/**
2739	* @copydoc PDMDEVHLPR3::pfnMMIO2Map
2740	*/
2741	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2742	{
2743	PDMDEV_ASSERT_DEVINS(pDevIns);
2744	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2745	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
2746	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2747
2748	int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2749
2750	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2751	return rc;
2752	}
2753
2754
2755	/**
2756	* @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2757	*/
2758	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2759	{
2760	PDMDEV_ASSERT_DEVINS(pDevIns);
2761	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2762	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
2763	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2764
2765	int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2766
2767	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2768	return rc;
2769	}
2770
2771
2772	/**
2773	* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2774	*/
2775	static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2776	const char *pszDesc, PRTRCPTR pRCPtr)
2777	{
2778	PDMDEV_ASSERT_DEVINS(pDevIns);
2779	PVM pVM = pDevIns->Internal.s.pVMR3;
2780	VM_ASSERT_EMT(pVM);
2781	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2782	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2783
2784	if (pDevIns->iInstance > 0)
2785	{
2786	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
2787	if (pszDesc2)
2788	pszDesc = pszDesc2;
2789	}
2790
2791	int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2792
2793	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pRCPtr));
2794	return rc;
2795	}
2796
2797
2798	/**
2799	* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2800	*/
2801	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2802	const char *pszDesc, PRTR0PTR pR0Ptr)
2803	{
2804	PDMDEV_ASSERT_DEVINS(pDevIns);
2805	PVM pVM = pDevIns->Internal.s.pVMR3;
2806	VM_ASSERT_EMT(pVM);
2807	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2808	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2809
2810	if (pDevIns->iInstance > 0)
2811	{
2812	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
2813	if (pszDesc2)
2814	pszDesc = pszDesc2;
2815	}
2816
2817	int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2818
2819	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pR0Ptr));
2820	return rc;
2821	}
2822
2823
2824	/**
2825	* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2826	*/
2827	static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2828	{
2829	PDMDEV_ASSERT_DEVINS(pDevIns);
2830	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2831
2832	int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2833	return rc;
2834	}
2835
2836
2837	/**
2838	* @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2839	*/
2840	static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2841	{
2842	PDMDEV_ASSERT_DEVINS(pDevIns);
2843	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2844
2845	int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2846	return rc;
2847	}
2848
2849
2850	/**
2851	* The device helper structure for trusted devices.
2852	*/
2853	const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2854	{
2855	PDM_DEVHLP_VERSION,
2856	pdmR3DevHlp_IOPortRegister,
2857	pdmR3DevHlp_IOPortRegisterGC,
2858	pdmR3DevHlp_IOPortRegisterR0,
2859	pdmR3DevHlp_IOPortDeregister,
2860	pdmR3DevHlp_MMIORegister,
2861	pdmR3DevHlp_MMIORegisterGC,
2862	pdmR3DevHlp_MMIORegisterR0,
2863	pdmR3DevHlp_MMIODeregister,
2864	pdmR3DevHlp_ROMRegister,
2865	pdmR3DevHlp_SSMRegister,
2866	pdmR3DevHlp_TMTimerCreate,
2867	pdmR3DevHlp_PCIRegister,
2868	pdmR3DevHlp_PCIIORegionRegister,
2869	pdmR3DevHlp_PCISetConfigCallbacks,
2870	pdmR3DevHlp_PCISetIrq,
2871	pdmR3DevHlp_PCISetIrqNoWait,
2872	pdmR3DevHlp_ISASetIrq,
2873	pdmR3DevHlp_ISASetIrqNoWait,
2874	pdmR3DevHlp_DriverAttach,
2875	pdmR3DevHlp_MMHeapAlloc,
2876	pdmR3DevHlp_MMHeapAllocZ,
2877	pdmR3DevHlp_MMHeapFree,
2878	pdmR3DevHlp_VMSetError,
2879	pdmR3DevHlp_VMSetErrorV,
2880	pdmR3DevHlp_VMSetRuntimeError,
2881	pdmR3DevHlp_VMSetRuntimeErrorV,
2882	pdmR3DevHlp_VMState,
2883	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
2884	pdmR3DevHlp_AssertEMT,
2885	pdmR3DevHlp_AssertOther,
2886	pdmR3DevHlp_DBGFStopV,
2887	pdmR3DevHlp_DBGFInfoRegister,
2888	pdmR3DevHlp_STAMRegister,
2889	pdmR3DevHlp_STAMRegisterF,
2890	pdmR3DevHlp_STAMRegisterV,
2891	pdmR3DevHlp_RTCRegister,
2892	pdmR3DevHlp_PDMQueueCreate,
2893	pdmR3DevHlp_CritSectInit,
2894	pdmR3DevHlp_UTCNow,
2895	pdmR3DevHlp_PDMThreadCreate,
2896	pdmR3DevHlp_PhysGCPtr2GCPhys,
2897	pdmR3DevHlp_SetAsyncNotification,
2898	pdmR3DevHlp_AsyncNotificationCompleted,
2899	0,
2900	0,
2901	0,
2902	0,
2903	0,
2904	0,
2905	0,
2906	0,
2907	0,
2908	0,
2909	pdmR3DevHlp_GetVM,
2910	pdmR3DevHlp_PCIBusRegister,
2911	pdmR3DevHlp_PICRegister,
2912	pdmR3DevHlp_APICRegister,
2913	pdmR3DevHlp_IOAPICRegister,
2914	pdmR3DevHlp_DMACRegister,
2915	pdmR3DevHlp_PhysRead,
2916	pdmR3DevHlp_PhysWrite,
2917	pdmR3DevHlp_PhysGCPhys2CCPtr,
2918	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2919	pdmR3DevHlp_PhysReleasePageMappingLock,
2920	pdmR3DevHlp_PhysReadGCVirt,
2921	pdmR3DevHlp_PhysWriteGCVirt,
2922	pdmR3DevHlp_A20IsEnabled,
2923	pdmR3DevHlp_A20Set,
2924	pdmR3DevHlp_VMReset,
2925	pdmR3DevHlp_VMSuspend,
2926	pdmR3DevHlp_VMPowerOff,
2927	pdmR3DevHlp_DMARegister,
2928	pdmR3DevHlp_DMAReadMemory,
2929	pdmR3DevHlp_DMAWriteMemory,
2930	pdmR3DevHlp_DMASetDREQ,
2931	pdmR3DevHlp_DMAGetChannelMode,
2932	pdmR3DevHlp_DMASchedule,
2933	pdmR3DevHlp_CMOSWrite,
2934	pdmR3DevHlp_CMOSRead,
2935	pdmR3DevHlp_GetCpuId,
2936	pdmR3DevHlp_ROMProtectShadow,
2937	pdmR3DevHlp_MMIO2Register,
2938	pdmR3DevHlp_MMIO2Deregister,
2939	pdmR3DevHlp_MMIO2Map,
2940	pdmR3DevHlp_MMIO2Unmap,
2941	pdmR3DevHlp_MMHyperMapMMIO2,
2942	pdmR3DevHlp_MMIO2MapKernel,
2943	pdmR3DevHlp_RegisterVMMDevHeap,
2944	pdmR3DevHlp_UnregisterVMMDevHeap,
2945	pdmR3DevHlp_GetVMCPU,
2946	PDM_DEVHLP_VERSION /* the end */
2947	};
2948
2949
2950
2951
2952	/** @copydoc PDMDEVHLPR3::pfnGetVM */
2953	static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2954	{
2955	PDMDEV_ASSERT_DEVINS(pDevIns);
2956	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2957	return NULL;
2958	}
2959
2960
2961	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2962	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2963	{
2964	PDMDEV_ASSERT_DEVINS(pDevIns);
2965	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2966	NOREF(pPciBusReg);
2967	NOREF(ppPciHlpR3);
2968	return VERR_ACCESS_DENIED;
2969	}
2970
2971
2972	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2973	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2974	{
2975	PDMDEV_ASSERT_DEVINS(pDevIns);
2976	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2977	NOREF(pPicReg);
2978	NOREF(ppPicHlpR3);
2979	return VERR_ACCESS_DENIED;
2980	}
2981
2982
2983	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2984	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2985	{
2986	PDMDEV_ASSERT_DEVINS(pDevIns);
2987	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2988	NOREF(pApicReg);
2989	NOREF(ppApicHlpR3);
2990	return VERR_ACCESS_DENIED;
2991	}
2992
2993
2994	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2995	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2996	{
2997	PDMDEV_ASSERT_DEVINS(pDevIns);
2998	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2999	NOREF(pIoApicReg);
3000	NOREF(ppIoApicHlpR3);
3001	return VERR_ACCESS_DENIED;
3002	}
3003
3004
3005	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
3006	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3007	{
3008	PDMDEV_ASSERT_DEVINS(pDevIns);
3009	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3010	NOREF(pDmacReg);
3011	NOREF(ppDmacHlp);
3012	return VERR_ACCESS_DENIED;
3013	}
3014
3015
3016	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
3017	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3018	{
3019	PDMDEV_ASSERT_DEVINS(pDevIns);
3020	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3021	NOREF(GCPhys);
3022	NOREF(pvBuf);
3023	NOREF(cbRead);
3024	return VERR_ACCESS_DENIED;
3025	}
3026
3027
3028	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
3029	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3030	{
3031	PDMDEV_ASSERT_DEVINS(pDevIns);
3032	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3033	NOREF(GCPhys);
3034	NOREF(pvBuf);
3035	NOREF(cbWrite);
3036	return VERR_ACCESS_DENIED;
3037	}
3038
3039
3040	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
3041	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3042	{
3043	PDMDEV_ASSERT_DEVINS(pDevIns);
3044	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3045	NOREF(GCPhys);
3046	NOREF(fFlags);
3047	NOREF(ppv);
3048	NOREF(pLock);
3049	return VERR_ACCESS_DENIED;
3050	}
3051
3052
3053	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
3054	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
3055	{
3056	PDMDEV_ASSERT_DEVINS(pDevIns);
3057	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3058	NOREF(GCPhys);
3059	NOREF(fFlags);
3060	NOREF(ppv);
3061	NOREF(pLock);
3062	return VERR_ACCESS_DENIED;
3063	}
3064
3065
3066	/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
3067	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3068	{
3069	PDMDEV_ASSERT_DEVINS(pDevIns);
3070	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3071	NOREF(pLock);
3072	}
3073
3074
3075	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
3076	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3077	{
3078	PDMDEV_ASSERT_DEVINS(pDevIns);
3079	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3080	NOREF(pvDst);
3081	NOREF(GCVirtSrc);
3082	NOREF(cb);
3083	return VERR_ACCESS_DENIED;
3084	}
3085
3086
3087	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
3088	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3089	{
3090	PDMDEV_ASSERT_DEVINS(pDevIns);
3091	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3092	NOREF(GCVirtDst);
3093	NOREF(pvSrc);
3094	NOREF(cb);
3095	return VERR_ACCESS_DENIED;
3096	}
3097
3098
3099	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
3100	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3101	{
3102	PDMDEV_ASSERT_DEVINS(pDevIns);
3103	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3104	return false;
3105	}
3106
3107
3108	/** @copydoc PDMDEVHLPR3::pfnA20Set */
3109	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3110	{
3111	PDMDEV_ASSERT_DEVINS(pDevIns);
3112	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3113	NOREF(fEnable);
3114	}
3115
3116
3117	/** @copydoc PDMDEVHLPR3::pfnVMReset */
3118	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3119	{
3120	PDMDEV_ASSERT_DEVINS(pDevIns);
3121	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3122	return VERR_ACCESS_DENIED;
3123	}
3124
3125
3126	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
3127	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3128	{
3129	PDMDEV_ASSERT_DEVINS(pDevIns);
3130	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3131	return VERR_ACCESS_DENIED;
3132	}
3133
3134
3135	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
3136	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3137	{
3138	PDMDEV_ASSERT_DEVINS(pDevIns);
3139	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3140	return VERR_ACCESS_DENIED;
3141	}
3142
3143	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
3144	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3145	{
3146	PDMDEV_ASSERT_DEVINS(pDevIns);
3147	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3148	return VERR_ACCESS_DENIED;
3149	}
3150
3151
3152	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
3153	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
3154	{
3155	PDMDEV_ASSERT_DEVINS(pDevIns);
3156	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3157	if (pcbRead)
3158	*pcbRead = 0;
3159	return VERR_ACCESS_DENIED;
3160	}
3161
3162
3163	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
3164	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
3165	{
3166	PDMDEV_ASSERT_DEVINS(pDevIns);
3167	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3168	if (pcbWritten)
3169	*pcbWritten = 0;
3170	return VERR_ACCESS_DENIED;
3171	}
3172
3173
3174	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
3175	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3176	{
3177	PDMDEV_ASSERT_DEVINS(pDevIns);
3178	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3179	return VERR_ACCESS_DENIED;
3180	}
3181
3182
3183	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
3184	static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3185	{
3186	PDMDEV_ASSERT_DEVINS(pDevIns);
3187	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3188	return 3 << 2 /* illegal mode type */;
3189	}
3190
3191
3192	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3193	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3194	{
3195	PDMDEV_ASSERT_DEVINS(pDevIns);
3196	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3197	}
3198
3199
3200	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3201	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3202	{
3203	PDMDEV_ASSERT_DEVINS(pDevIns);
3204	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3205	return VERR_ACCESS_DENIED;
3206	}
3207
3208
3209	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3210	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3211	{
3212	PDMDEV_ASSERT_DEVINS(pDevIns);
3213	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3214	return VERR_ACCESS_DENIED;
3215	}
3216
3217
3218	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3219	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3220	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3221	{
3222	PDMDEV_ASSERT_DEVINS(pDevIns);
3223	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3224	}
3225
3226
3227	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3228	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3229	{
3230	PDMDEV_ASSERT_DEVINS(pDevIns);
3231	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3232	return VERR_ACCESS_DENIED;
3233	}
3234
3235
3236	/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3237	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
3238	{
3239	PDMDEV_ASSERT_DEVINS(pDevIns);
3240	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3241	return VERR_ACCESS_DENIED;
3242	}
3243
3244
3245	/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3246	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3247	{
3248	PDMDEV_ASSERT_DEVINS(pDevIns);
3249	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3250	return VERR_ACCESS_DENIED;
3251	}
3252
3253
3254	/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3255	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3256	{
3257	PDMDEV_ASSERT_DEVINS(pDevIns);
3258	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3259	return VERR_ACCESS_DENIED;
3260	}
3261
3262
3263	/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3264	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3265	{
3266	PDMDEV_ASSERT_DEVINS(pDevIns);
3267	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3268	return VERR_ACCESS_DENIED;
3269	}
3270
3271
3272	/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3273	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3274	{
3275	PDMDEV_ASSERT_DEVINS(pDevIns);
3276	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3277	return VERR_ACCESS_DENIED;
3278	}
3279
3280
3281	/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3282	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3283	{
3284	PDMDEV_ASSERT_DEVINS(pDevIns);
3285	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3286	return VERR_ACCESS_DENIED;
3287	}
3288
3289
3290	/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3291	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3292	{
3293	PDMDEV_ASSERT_DEVINS(pDevIns);
3294	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3295	return VERR_ACCESS_DENIED;
3296	}
3297
3298
3299	/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3300	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3301	{
3302	PDMDEV_ASSERT_DEVINS(pDevIns);
3303	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3304	return VERR_ACCESS_DENIED;
3305	}
3306
3307
3308	/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
3309	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3310	{
3311	PDMDEV_ASSERT_DEVINS(pDevIns);
3312	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3313	return NULL;
3314	}
3315
3316
3317	/**
3318	* The device helper structure for non-trusted devices.
3319	*/
3320	const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3321	{
3322	PDM_DEVHLP_VERSION,
3323	pdmR3DevHlp_IOPortRegister,
3324	pdmR3DevHlp_IOPortRegisterGC,
3325	pdmR3DevHlp_IOPortRegisterR0,
3326	pdmR3DevHlp_IOPortDeregister,
3327	pdmR3DevHlp_MMIORegister,
3328	pdmR3DevHlp_MMIORegisterGC,
3329	pdmR3DevHlp_MMIORegisterR0,
3330	pdmR3DevHlp_MMIODeregister,
3331	pdmR3DevHlp_ROMRegister,
3332	pdmR3DevHlp_SSMRegister,
3333	pdmR3DevHlp_TMTimerCreate,
3334	pdmR3DevHlp_PCIRegister,
3335	pdmR3DevHlp_PCIIORegionRegister,
3336	pdmR3DevHlp_PCISetConfigCallbacks,
3337	pdmR3DevHlp_PCISetIrq,
3338	pdmR3DevHlp_PCISetIrqNoWait,
3339	pdmR3DevHlp_ISASetIrq,
3340	pdmR3DevHlp_ISASetIrqNoWait,
3341	pdmR3DevHlp_DriverAttach,
3342	pdmR3DevHlp_MMHeapAlloc,
3343	pdmR3DevHlp_MMHeapAllocZ,
3344	pdmR3DevHlp_MMHeapFree,
3345	pdmR3DevHlp_VMSetError,
3346	pdmR3DevHlp_VMSetErrorV,
3347	pdmR3DevHlp_VMSetRuntimeError,
3348	pdmR3DevHlp_VMSetRuntimeErrorV,
3349	pdmR3DevHlp_VMState,
3350	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3351	pdmR3DevHlp_AssertEMT,
3352	pdmR3DevHlp_AssertOther,
3353	pdmR3DevHlp_DBGFStopV,
3354	pdmR3DevHlp_DBGFInfoRegister,
3355	pdmR3DevHlp_STAMRegister,
3356	pdmR3DevHlp_STAMRegisterF,
3357	pdmR3DevHlp_STAMRegisterV,
3358	pdmR3DevHlp_RTCRegister,
3359	pdmR3DevHlp_PDMQueueCreate,
3360	pdmR3DevHlp_CritSectInit,
3361	pdmR3DevHlp_UTCNow,
3362	pdmR3DevHlp_PDMThreadCreate,
3363	pdmR3DevHlp_PhysGCPtr2GCPhys,
3364	pdmR3DevHlp_SetAsyncNotification,
3365	pdmR3DevHlp_AsyncNotificationCompleted,
3366	0,
3367	0,
3368	0,
3369	0,
3370	0,
3371	0,
3372	0,
3373	0,
3374	0,
3375	0,
3376	pdmR3DevHlp_Untrusted_GetVM,
3377	pdmR3DevHlp_Untrusted_PCIBusRegister,
3378	pdmR3DevHlp_Untrusted_PICRegister,
3379	pdmR3DevHlp_Untrusted_APICRegister,
3380	pdmR3DevHlp_Untrusted_IOAPICRegister,
3381	pdmR3DevHlp_Untrusted_DMACRegister,
3382	pdmR3DevHlp_Untrusted_PhysRead,
3383	pdmR3DevHlp_Untrusted_PhysWrite,
3384	pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr,
3385	pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly,
3386	pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock,
3387	pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3388	pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3389	pdmR3DevHlp_Untrusted_A20IsEnabled,
3390	pdmR3DevHlp_Untrusted_A20Set,
3391	pdmR3DevHlp_Untrusted_VMReset,
3392	pdmR3DevHlp_Untrusted_VMSuspend,
3393	pdmR3DevHlp_Untrusted_VMPowerOff,
3394	pdmR3DevHlp_Untrusted_DMARegister,
3395	pdmR3DevHlp_Untrusted_DMAReadMemory,
3396	pdmR3DevHlp_Untrusted_DMAWriteMemory,
3397	pdmR3DevHlp_Untrusted_DMASetDREQ,
3398	pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3399	pdmR3DevHlp_Untrusted_DMASchedule,
3400	pdmR3DevHlp_Untrusted_CMOSWrite,
3401	pdmR3DevHlp_Untrusted_CMOSRead,
3402	pdmR3DevHlp_Untrusted_GetCpuId,
3403	pdmR3DevHlp_Untrusted_ROMProtectShadow,
3404	pdmR3DevHlp_Untrusted_MMIO2Register,
3405	pdmR3DevHlp_Untrusted_MMIO2Deregister,
3406	pdmR3DevHlp_Untrusted_MMIO2Map,
3407	pdmR3DevHlp_Untrusted_MMIO2Unmap,
3408	pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3409	pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3410	pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3411	pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3412	pdmR3DevHlp_Untrusted_GetVMCPU,
3413	PDM_DEVHLP_VERSION /* the end */
3414	};
3415
3416
3417
3418	/**
3419	* Queue consumer callback for internal component.
3420	*
3421	* @returns Success indicator.
3422	* If false the item will not be removed and the flushing will stop.
3423	* @param pVM The VM handle.
3424	* @param pItem The item to consume. Upon return this item will be freed.
3425	*/
3426	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3427	{
3428	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3429	LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3430	switch (pTask->enmOp)
3431	{
3432	case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3433	PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3434	break;
3435
3436	case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3437	pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3438	break;
3439
3440	case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3441	PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3442	break;
3443
3444	default:
3445	AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3446	break;
3447	}
3448	return true;
3449	}
3450
3451	/** @} */
3452

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source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 25659

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