PDMDevHlp.cpp@ 32657

Last change on this file since 32657 was 32190, checked in by vboxsync, 14 years ago
PDMDevHlpVMSuspendSaveAndPowerOff: More code.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 133.9 KB

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1	/* $Id: PDMDevHlp.cpp 32190 2010-09-02 12:20:06Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, Device Helpers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2010 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*******************************************************************************
20	* Header Files *
21	*******************************************************************************/
22	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23	#include "PDMInternal.h"
24	#include <VBox/pdm.h>
25	#include <VBox/mm.h>
26	#include <VBox/pgm.h>
27	#include <VBox/iom.h>
28	#include <VBox/rem.h>
29	#include <VBox/dbgf.h>
30	#include <VBox/vmapi.h>
31	#include <VBox/vm.h>
32	#include <VBox/uvm.h>
33	#include <VBox/vmm.h>
34
35	#include <VBox/version.h>
36	#include <VBox/log.h>
37	#include <VBox/err.h>
38	#include <iprt/asm.h>
39	#include <iprt/assert.h>
40	#include <iprt/ctype.h>
41	#include <iprt/string.h>
42	#include <iprt/thread.h>
43
44
45	/*******************************************************************************
46	* Defined Constants And Macros *
47	*******************************************************************************/
48	/** @def PDM_DEVHLP_DEADLOCK_DETECTION
49	* Define this to enable the deadlock detection when accessing physical memory.
50	*/
51	#if /defined(DEBUG_bird) \|\|/ defined(DOXYGEN_RUNNING)
52	# define PDM_DEVHLP_DEADLOCK_DETECTION /*< @todo enable DevHlp deadlock detection! /
53	#endif
54
55
56	/*******************************************************************************
57	* Defined Constants And Macros *
58	*******************************************************************************/
59	/** @name R3 DevHlp
60	* @{
61	*/
62
63
64	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
65	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
66	PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
67	{
68	PDMDEV_ASSERT_DEVINS(pDevIns);
69	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
70	Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
71	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
72
73	#if 0 /** @todo needs a real string cache for this */
74	if (pDevIns->iInstance > 0)
75	{
76	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
77	if (pszDesc2)
78	pszDesc = pszDesc2;
79	}
80	#endif
81
82	int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
83
84	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
85	return rc;
86	}
87
88
89	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
90	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
91	const char pszOut, const char pszIn,
92	const char pszOutStr, const char pszInStr, const char *pszDesc)
93	{
94	PDMDEV_ASSERT_DEVINS(pDevIns);
95	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
96	LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
97	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
98
99	/*
100	* Resolve the functions (one of the can be NULL).
101	*/
102	int rc = VINF_SUCCESS;
103	if ( pDevIns->pReg->szRCMod[0]
104	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
105	{
106	RTRCPTR RCPtrIn = NIL_RTRCPTR;
107	if (pszIn)
108	{
109	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszIn, &RCPtrIn);
110	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szRCMod, pszIn));
111	}
112	RTRCPTR RCPtrOut = NIL_RTRCPTR;
113	if (pszOut && RT_SUCCESS(rc))
114	{
115	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszOut, &RCPtrOut);
116	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szRCMod, pszOut));
117	}
118	RTRCPTR RCPtrInStr = NIL_RTRCPTR;
119	if (pszInStr && RT_SUCCESS(rc))
120	{
121	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszInStr, &RCPtrInStr);
122	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szRCMod, pszInStr));
123	}
124	RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
125	if (pszOutStr && RT_SUCCESS(rc))
126	{
127	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszOutStr, &RCPtrOutStr);
128	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szRCMod, pszOutStr));
129	}
130
131	if (RT_SUCCESS(rc))
132	{
133	#if 0 /** @todo needs a real string cache for this */
134	if (pDevIns->iInstance > 0)
135	{
136	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
137	if (pszDesc2)
138	pszDesc = pszDesc2;
139	}
140	#endif
141
142	rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
143	}
144	}
145	else
146	{
147	AssertMsgFailed(("No GC module for this driver!\n"));
148	rc = VERR_INVALID_PARAMETER;
149	}
150
151	LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
152	return rc;
153	}
154
155
156	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
157	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
158	const char pszOut, const char pszIn,
159	const char pszOutStr, const char pszInStr, const char *pszDesc)
160	{
161	PDMDEV_ASSERT_DEVINS(pDevIns);
162	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
163	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
164	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
165
166	/*
167	* Resolve the functions (one of the can be NULL).
168	*/
169	int rc = VINF_SUCCESS;
170	if ( pDevIns->pReg->szR0Mod[0]
171	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
172	{
173	R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
174	if (pszIn)
175	{
176	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszIn, &pfnR0PtrIn);
177	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szR0Mod, pszIn));
178	}
179	R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
180	if (pszOut && RT_SUCCESS(rc))
181	{
182	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszOut, &pfnR0PtrOut);
183	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szR0Mod, pszOut));
184	}
185	R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
186	if (pszInStr && RT_SUCCESS(rc))
187	{
188	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
189	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szR0Mod, pszInStr));
190	}
191	R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
192	if (pszOutStr && RT_SUCCESS(rc))
193	{
194	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
195	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szR0Mod, pszOutStr));
196	}
197
198	if (RT_SUCCESS(rc))
199	{
200	#if 0 /** @todo needs a real string cache for this */
201	if (pDevIns->iInstance > 0)
202	{
203	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
204	if (pszDesc2)
205	pszDesc = pszDesc2;
206	}
207	#endif
208
209	rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
210	}
211	}
212	else
213	{
214	AssertMsgFailed(("No R0 module for this driver!\n"));
215	rc = VERR_INVALID_PARAMETER;
216	}
217
218	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
219	return rc;
220	}
221
222
223	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
224	static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
225	{
226	PDMDEV_ASSERT_DEVINS(pDevIns);
227	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
228	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance,
229	Port, cPorts));
230
231	int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
232
233	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
234	return rc;
235	}
236
237
238	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
239	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
240	PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
241	const char *pszDesc)
242	{
243	PDMDEV_ASSERT_DEVINS(pDevIns);
244	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
245	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
246	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
247
248	/** @todo IOMR3MMIORegisterR3 mangles the description, move it here. */
249	int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
250
251	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
252	return rc;
253	}
254
255
256	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
257	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
258	const char pszWrite, const char pszRead, const char *pszFill,
259	const char *pszDesc)
260	{
261	PDMDEV_ASSERT_DEVINS(pDevIns);
262	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
263	LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
264	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
265
266	/** @todo pszDesc is unused here, drop it. */
267
268	/*
269	* Resolve the functions.
270	* Not all function have to present, leave it to IOM to enforce this.
271	*/
272	int rc = VINF_SUCCESS;
273	if ( pDevIns->pReg->szRCMod[0]
274	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
275	{
276	RTRCPTR RCPtrWrite = NIL_RTRCPTR;
277	if (pszWrite)
278	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszWrite, &RCPtrWrite);
279
280	RTRCPTR RCPtrRead = NIL_RTRCPTR;
281	int rc2 = VINF_SUCCESS;
282	if (pszRead)
283	rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszRead, &RCPtrRead);
284
285	RTRCPTR RCPtrFill = NIL_RTRCPTR;
286	int rc3 = VINF_SUCCESS;
287	if (pszFill)
288	rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszFill, &RCPtrFill);
289
290	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
291	rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
292	else
293	{
294	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szRCMod, pszWrite));
295	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szRCMod, pszRead));
296	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szRCMod, pszFill));
297	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
298	rc = rc2;
299	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
300	rc = rc3;
301	}
302	}
303	else
304	{
305	AssertMsgFailed(("No GC module for this driver!\n"));
306	rc = VERR_INVALID_PARAMETER;
307	}
308
309	LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
310	return rc;
311	}
312
313	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
314	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
315	const char pszWrite, const char pszRead, const char *pszFill,
316	const char *pszDesc)
317	{
318	PDMDEV_ASSERT_DEVINS(pDevIns);
319	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
320	LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
321	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
322
323	/** @todo pszDesc is unused here, remove it. */
324
325	/*
326	* Resolve the functions.
327	* Not all function have to present, leave it to IOM to enforce this.
328	*/
329	int rc = VINF_SUCCESS;
330	if ( pDevIns->pReg->szR0Mod[0]
331	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
332	{
333	R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
334	if (pszWrite)
335	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
336	R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
337	int rc2 = VINF_SUCCESS;
338	if (pszRead)
339	rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszRead, &pfnR0PtrRead);
340	R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
341	int rc3 = VINF_SUCCESS;
342	if (pszFill)
343	rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszFill, &pfnR0PtrFill);
344	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
345	rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
346	else
347	{
348	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szR0Mod, pszWrite));
349	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szR0Mod, pszRead));
350	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szR0Mod, pszFill));
351	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
352	rc = rc2;
353	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
354	rc = rc3;
355	}
356	}
357	else
358	{
359	AssertMsgFailed(("No R0 module for this driver!\n"));
360	rc = VERR_INVALID_PARAMETER;
361	}
362
363	LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
364	return rc;
365	}
366
367
368	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
369	static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
370	{
371	PDMDEV_ASSERT_DEVINS(pDevIns);
372	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
373	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
374	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange));
375
376	int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
377
378	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
379	return rc;
380	}
381
382
383	/**
384	* @copydoc PDMDEVHLPR3::pfnMMIO2Register
385	*/
386	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
387	{
388	PDMDEV_ASSERT_DEVINS(pDevIns);
389	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
390	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
391	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
392
393	/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
394	* use a real string cache. */
395	int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
396
397	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
398	return rc;
399	}
400
401
402	/**
403	* @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
404	*/
405	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
406	{
407	PDMDEV_ASSERT_DEVINS(pDevIns);
408	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
409	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
410	pDevIns->pReg->szName, pDevIns->iInstance, iRegion));
411
412	AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
413
414	int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
415
416	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
417	return rc;
418	}
419
420
421	/**
422	* @copydoc PDMDEVHLPR3::pfnMMIO2Map
423	*/
424	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
425	{
426	PDMDEV_ASSERT_DEVINS(pDevIns);
427	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
428	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
429	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
430
431	int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
432
433	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
434	return rc;
435	}
436
437
438	/**
439	* @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
440	*/
441	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
442	{
443	PDMDEV_ASSERT_DEVINS(pDevIns);
444	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
445	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
446	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
447
448	int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
449
450	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
451	return rc;
452	}
453
454
455	/**
456	* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
457	*/
458	static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
459	const char *pszDesc, PRTRCPTR pRCPtr)
460	{
461	PDMDEV_ASSERT_DEVINS(pDevIns);
462	PVM pVM = pDevIns->Internal.s.pVMR3;
463	VM_ASSERT_EMT(pVM);
464	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
465	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
466
467	if (pDevIns->iInstance > 0)
468	{
469	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
470	if (pszDesc2)
471	pszDesc = pszDesc2;
472	}
473
474	int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
475
476	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc pRCPtr=%RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pRCPtr));
477	return rc;
478	}
479
480
481	/**
482	* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
483	*/
484	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
485	const char *pszDesc, PRTR0PTR pR0Ptr)
486	{
487	PDMDEV_ASSERT_DEVINS(pDevIns);
488	PVM pVM = pDevIns->Internal.s.pVMR3;
489	VM_ASSERT_EMT(pVM);
490	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
491	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
492
493	if (pDevIns->iInstance > 0)
494	{
495	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
496	if (pszDesc2)
497	pszDesc = pszDesc2;
498	}
499
500	int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
501
502	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc pR0Ptr=%RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pR0Ptr));
503	return rc;
504	}
505
506
507	/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
508	static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void pvBinary, uint32_t fFlags, const char pszDesc)
509	{
510	PDMDEV_ASSERT_DEVINS(pDevIns);
511	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
512	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
513	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
514
515	/** @todo can we mangle pszDesc? */
516	int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
517
518	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
519	return rc;
520	}
521
522
523	/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
524	static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
525	{
526	PDMDEV_ASSERT_DEVINS(pDevIns);
527	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
528	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
529
530	int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
531
532	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
533	return rc;
534	}
535
536
537	/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
538	static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
539	PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
540	PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
541	PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
542	{
543	PDMDEV_ASSERT_DEVINS(pDevIns);
544	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
545	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
546	" pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
547	pDevIns->pReg->szName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
548	pfnLivePrep, pfnLiveExec, pfnLiveVote,
549	pfnSavePrep, pfnSaveExec, pfnSaveDone,
550	pfnLoadPrep, pfnLoadExec, pfnLoadDone));
551
552	int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance,
553	uVersion, cbGuess, pszBefore,
554	pfnLivePrep, pfnLiveExec, pfnLiveVote,
555	pfnSavePrep, pfnSaveExec, pfnSaveDone,
556	pfnLoadPrep, pfnLoadExec, pfnLoadDone);
557
558	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
559	return rc;
560	}
561
562
563	/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
564	static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void pvUser, uint32_t fFlags, const char pszDesc, PPTMTIMERR3 ppTimer)
565	{
566	PDMDEV_ASSERT_DEVINS(pDevIns);
567	PVM pVM = pDevIns->Internal.s.pVMR3;
568	VM_ASSERT_EMT(pVM);
569	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
570	pDevIns->pReg->szName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
571
572	if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
573	{
574	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
575	if (pszDesc2)
576	pszDesc = pszDesc2;
577	}
578
579	int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
580
581	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
582	return rc;
583	}
584
585
586	/** @interface_method_impl{PDMDEVHLPR3,pfnTMUtcNow} */
587	static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_TMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
588	{
589	PDMDEV_ASSERT_DEVINS(pDevIns);
590	LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: pTime=%p\n",
591	pDevIns->pReg->szName, pDevIns->iInstance, pTime));
592
593	pTime = TMR3UtcNow(pDevIns->Internal.s.pVMR3, pTime);
594
595	LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
596	return pTime;
597	}
598
599
600	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
601	static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
602	{
603	PDMDEV_ASSERT_DEVINS(pDevIns);
604	PVM pVM = pDevIns->Internal.s.pVMR3;
605	LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
606	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
607
608	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
609	if (!VM_IS_EMT(pVM))
610	{
611	char szNames[128];
612	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
613	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
614	}
615	#endif
616
617	int rc;
618	if (VM_IS_EMT(pVM))
619	rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
620	else
621	rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
622
623	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
624	return rc;
625	}
626
627
628	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
629	static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
630	{
631	PDMDEV_ASSERT_DEVINS(pDevIns);
632	PVM pVM = pDevIns->Internal.s.pVMR3;
633	LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
634	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
635
636	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
637	if (!VM_IS_EMT(pVM))
638	{
639	char szNames[128];
640	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
641	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
642	}
643	#endif
644
645	int rc;
646	if (VM_IS_EMT(pVM))
647	rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
648	else
649	rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pReg->szName);
650
651	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
652	return rc;
653	}
654
655
656	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
657	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
658	{
659	PDMDEV_ASSERT_DEVINS(pDevIns);
660	PVM pVM = pDevIns->Internal.s.pVMR3;
661	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
662	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
663	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
664
665	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
666	if (!VM_IS_EMT(pVM))
667	{
668	char szNames[128];
669	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
670	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
671	}
672	#endif
673
674	int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
675
676	Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
677	return rc;
678	}
679
680
681	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
682	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
683	{
684	PDMDEV_ASSERT_DEVINS(pDevIns);
685	PVM pVM = pDevIns->Internal.s.pVMR3;
686	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
687	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
688	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
689
690	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
691	if (!VM_IS_EMT(pVM))
692	{
693	char szNames[128];
694	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
695	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
696	}
697	#endif
698
699	int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
700
701	Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
702	return rc;
703	}
704
705
706	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
707	static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
708	{
709	PDMDEV_ASSERT_DEVINS(pDevIns);
710	PVM pVM = pDevIns->Internal.s.pVMR3;
711	LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
712	pDevIns->pReg->szName, pDevIns->iInstance, pLock));
713
714	PGMPhysReleasePageMappingLock(pVM, pLock);
715
716	Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
717	}
718
719
720	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
721	static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
722	{
723	PDMDEV_ASSERT_DEVINS(pDevIns);
724	PVM pVM = pDevIns->Internal.s.pVMR3;
725	VM_ASSERT_EMT(pVM);
726	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
727	pDevIns->pReg->szName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
728
729	PVMCPU pVCpu = VMMGetCpu(pVM);
730	if (!pVCpu)
731	return VERR_ACCESS_DENIED;
732	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
733	/** @todo SMP. */
734	#endif
735
736	int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
737
738	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
739
740	return rc;
741	}
742
743
744	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
745	static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
746	{
747	PDMDEV_ASSERT_DEVINS(pDevIns);
748	PVM pVM = pDevIns->Internal.s.pVMR3;
749	VM_ASSERT_EMT(pVM);
750	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
751	pDevIns->pReg->szName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
752
753	PVMCPU pVCpu = VMMGetCpu(pVM);
754	if (!pVCpu)
755	return VERR_ACCESS_DENIED;
756	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
757	/** @todo SMP. */
758	#endif
759
760	int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
761
762	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
763
764	return rc;
765	}
766
767
768	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
769	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
770	{
771	PDMDEV_ASSERT_DEVINS(pDevIns);
772	PVM pVM = pDevIns->Internal.s.pVMR3;
773	VM_ASSERT_EMT(pVM);
774	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
775	pDevIns->pReg->szName, pDevIns->iInstance, GCPtr, pGCPhys));
776
777	PVMCPU pVCpu = VMMGetCpu(pVM);
778	if (!pVCpu)
779	return VERR_ACCESS_DENIED;
780	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
781	/** @todo SMP. */
782	#endif
783
784	int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
785
786	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc pGCPhys=%RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pGCPhys));
787
788	return rc;
789	}
790
791
792	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
793	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
794	{
795	PDMDEV_ASSERT_DEVINS(pDevIns);
796	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
797
798	void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
799
800	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
801	return pv;
802	}
803
804
805	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
806	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
807	{
808	PDMDEV_ASSERT_DEVINS(pDevIns);
809	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
810
811	void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
812
813	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
814	return pv;
815	}
816
817
818	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
819	static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
820	{
821	PDMDEV_ASSERT_DEVINS(pDevIns);
822	LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
823
824	MMR3HeapFree(pv);
825
826	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
827	}
828
829
830	/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
831	static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
832	{
833	PDMDEV_ASSERT_DEVINS(pDevIns);
834
835	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
836
837	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pReg->szName, pDevIns->iInstance,
838	enmVMState, VMR3GetStateName(enmVMState)));
839	return enmVMState;
840	}
841
842
843	/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
844	static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
845	{
846	PDMDEV_ASSERT_DEVINS(pDevIns);
847
848	bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
849
850	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance,
851	fRc));
852	return fRc;
853	}
854
855
856	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
857	static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
858	{
859	PDMDEV_ASSERT_DEVINS(pDevIns);
860	va_list args;
861	va_start(args, pszFormat);
862	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
863	va_end(args);
864	return rc;
865	}
866
867
868	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
869	static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
870	{
871	PDMDEV_ASSERT_DEVINS(pDevIns);
872	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
873	return rc;
874	}
875
876
877	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
878	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, ...)
879	{
880	PDMDEV_ASSERT_DEVINS(pDevIns);
881	va_list args;
882	va_start(args, pszFormat);
883	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
884	va_end(args);
885	return rc;
886	}
887
888
889	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
890	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, va_list va)
891	{
892	PDMDEV_ASSERT_DEVINS(pDevIns);
893	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
894	return rc;
895	}
896
897
898	/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
899	static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction, const char *pszFormat, va_list args)
900	{
901	PDMDEV_ASSERT_DEVINS(pDevIns);
902	#ifdef LOG_ENABLED
903	va_list va2;
904	va_copy(va2, args);
905	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
906	pDevIns->pReg->szName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
907	va_end(va2);
908	#endif
909
910	PVM pVM = pDevIns->Internal.s.pVMR3;
911	VM_ASSERT_EMT(pVM);
912	int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
913	if (rc == VERR_DBGF_NOT_ATTACHED)
914	rc = VINF_SUCCESS;
915
916	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
917	return rc;
918	}
919
920
921	/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
922	static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char pszName, const char pszDesc, PFNDBGFHANDLERDEV pfnHandler)
923	{
924	PDMDEV_ASSERT_DEVINS(pDevIns);
925	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
926	pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
927
928	PVM pVM = pDevIns->Internal.s.pVMR3;
929	VM_ASSERT_EMT(pVM);
930	int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
931
932	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
933	return rc;
934	}
935
936
937	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
938	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void pvSample, STAMTYPE enmType, const char pszName, STAMUNIT enmUnit, const char *pszDesc)
939	{
940	PDMDEV_ASSERT_DEVINS(pDevIns);
941	PVM pVM = pDevIns->Internal.s.pVMR3;
942	VM_ASSERT_EMT(pVM);
943
944	STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
945	NOREF(pVM);
946	}
947
948
949
950	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
951	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
952	STAMUNIT enmUnit, const char pszDesc, const char pszName, ...)
953	{
954	PDMDEV_ASSERT_DEVINS(pDevIns);
955	PVM pVM = pDevIns->Internal.s.pVMR3;
956	VM_ASSERT_EMT(pVM);
957
958	va_list args;
959	va_start(args, pszName);
960	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
961	va_end(args);
962	AssertRC(rc);
963
964	NOREF(pVM);
965	}
966
967
968	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
969	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
970	STAMUNIT enmUnit, const char pszDesc, const char pszName, va_list args)
971	{
972	PDMDEV_ASSERT_DEVINS(pDevIns);
973	PVM pVM = pDevIns->Internal.s.pVMR3;
974	VM_ASSERT_EMT(pVM);
975
976	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
977	AssertRC(rc);
978
979	NOREF(pVM);
980	}
981
982
983	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister} */
984	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
985	{
986	PDMDEV_ASSERT_DEVINS(pDevIns);
987	PVM pVM = pDevIns->Internal.s.pVMR3;
988	VM_ASSERT_EMT(pVM);
989	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
990	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->config));
991
992	/*
993	* Validate input.
994	*/
995	if (!pPciDev)
996	{
997	Assert(pPciDev);
998	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
999	return VERR_INVALID_PARAMETER;
1000	}
1001	if (!pPciDev->config[0] && !pPciDev->config[1])
1002	{
1003	Assert(pPciDev->config[0] \|\| pPciDev->config[1]);
1004	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1005	return VERR_INVALID_PARAMETER;
1006	}
1007	if (pDevIns->Internal.s.pPciDeviceR3)
1008	{
1009	/** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1010	* support a PDM device with multiple PCI devices. This might become a problem
1011	* when upgrading the chipset for instance because of multiple functions in some
1012	* devices...
1013	*/
1014	AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1015	return VERR_INTERNAL_ERROR;
1016	}
1017
1018	/*
1019	* Choose the PCI bus for the device.
1020	*
1021	* This is simple. If the device was configured for a particular bus, the PCIBusNo
1022	* configuration value will be set. If not the default bus is 0.
1023	*/
1024	int rc;
1025	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1026	if (!pBus)
1027	{
1028	uint8_t u8Bus;
1029	rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
1030	AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1031	rc, pDevIns->pReg->szName, pDevIns->iInstance), rc);
1032	AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1033	("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1034	RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance),
1035	VERR_PDM_NO_PCI_BUS);
1036	pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1037	}
1038	if (pBus->pDevInsR3)
1039	{
1040	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1041	pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
1042	else
1043	pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
1044
1045	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1046	pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
1047	else
1048	pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
1049
1050	/*
1051	* Check the configuration for PCI device and function assignment.
1052	*/
1053	int iDev = -1;
1054	uint8_t u8Device;
1055	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1056	if (RT_SUCCESS(rc))
1057	{
1058	if (u8Device > 31)
1059	{
1060	AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1061	u8Device, pDevIns->pReg->szName, pDevIns->iInstance));
1062	return VERR_INTERNAL_ERROR;
1063	}
1064
1065	uint8_t u8Function;
1066	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1067	if (RT_FAILURE(rc))
1068	{
1069	AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
1070	rc, pDevIns->pReg->szName, pDevIns->iInstance));
1071	return rc;
1072	}
1073	if (u8Function > 7)
1074	{
1075	AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1076	u8Function, pDevIns->pReg->szName, pDevIns->iInstance));
1077	return VERR_INTERNAL_ERROR;
1078	}
1079	iDev = (u8Device << 3) \| u8Function;
1080	}
1081	else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1082	{
1083	AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
1084	rc, pDevIns->pReg->szName, pDevIns->iInstance));
1085	return rc;
1086	}
1087
1088	/*
1089	* Call the pci bus device to do the actual registration.
1090	*/
1091	pdmLock(pVM);
1092	rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pReg->szName, iDev);
1093	pdmUnlock(pVM);
1094	if (RT_SUCCESS(rc))
1095	{
1096	pPciDev->pDevIns = pDevIns;
1097
1098	pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
1099	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1100	pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
1101	else
1102	pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
1103
1104	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1105	pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
1106	else
1107	pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
1108
1109	Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1110	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
1111	}
1112	}
1113	else
1114	{
1115	AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1116	rc = VERR_PDM_NO_PCI_BUS;
1117	}
1118
1119	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1120	return rc;
1121	}
1122
1123
1124	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1125	static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1126	{
1127	PDMDEV_ASSERT_DEVINS(pDevIns);
1128	PVM pVM = pDevIns->Internal.s.pVMR3;
1129	VM_ASSERT_EMT(pVM);
1130	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1131	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1132
1133	/*
1134	* Validate input.
1135	*/
1136	if (iRegion < 0 \|\| iRegion >= PCI_NUM_REGIONS)
1137	{
1138	Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1139	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1140	return VERR_INVALID_PARAMETER;
1141	}
1142	switch (enmType)
1143	{
1144	case PCI_ADDRESS_SPACE_IO:
1145	/*
1146	* Sanity check: don't allow to register more than 32K of the PCI I/O space.
1147	*/
1148	AssertMsgReturn(cbRegion <= _32K,
1149	("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1150	VERR_INVALID_PARAMETER);
1151	break;
1152
1153	case PCI_ADDRESS_SPACE_MEM:
1154	case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1155	/*
1156	* Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
1157	* now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
1158	*/
1159	AssertMsgReturn(cbRegion <= 512 * _1M,
1160	("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1161	VERR_INVALID_PARAMETER);
1162	break;
1163	default:
1164	AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1165	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1166	return VERR_INVALID_PARAMETER;
1167	}
1168	if (!pfnCallback)
1169	{
1170	Assert(pfnCallback);
1171	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1172	return VERR_INVALID_PARAMETER;
1173	}
1174	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1175
1176	/*
1177	* Must have a PCI device registered!
1178	*/
1179	int rc;
1180	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1181	if (pPciDev)
1182	{
1183	/*
1184	* We're currently restricted to page aligned MMIO regions.
1185	*/
1186	if ( (enmType == PCI_ADDRESS_SPACE_MEM \|\| enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
1187	&& cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1188	{
1189	Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1190	pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1191	cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1192	}
1193
1194	/*
1195	* For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1196	*/
1197	int iLastSet = ASMBitLastSetU32(cbRegion);
1198	Assert(iLastSet > 0);
1199	uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
1200	if (cbRegion > cbRegionAligned)
1201	cbRegion = cbRegionAligned * 2; /* round up */
1202
1203	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1204	Assert(pBus);
1205	pdmLock(pVM);
1206	rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1207	pdmUnlock(pVM);
1208	}
1209	else
1210	{
1211	AssertMsgFailed(("No PCI device registered!\n"));
1212	rc = VERR_PDM_NOT_PCI_DEVICE;
1213	}
1214
1215	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1216	return rc;
1217	}
1218
1219
1220	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1221	static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1222	PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1223	{
1224	PDMDEV_ASSERT_DEVINS(pDevIns);
1225	PVM pVM = pDevIns->Internal.s.pVMR3;
1226	VM_ASSERT_EMT(pVM);
1227	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1228	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1229
1230	/*
1231	* Validate input and resolve defaults.
1232	*/
1233	AssertPtr(pfnRead);
1234	AssertPtr(pfnWrite);
1235	AssertPtrNull(ppfnReadOld);
1236	AssertPtrNull(ppfnWriteOld);
1237	AssertPtrNull(pPciDev);
1238
1239	if (!pPciDev)
1240	pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1241	AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1242	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1243	AssertRelease(pBus);
1244	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1245
1246	/*
1247	* Do the job.
1248	*/
1249	pdmLock(pVM);
1250	pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1251	pdmUnlock(pVM);
1252
1253	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1254	}
1255
1256
1257	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1258	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1259	{
1260	PDMDEV_ASSERT_DEVINS(pDevIns);
1261	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1262
1263	/*
1264	* Validate input.
1265	*/
1266	/** @todo iIrq and iLevel checks. */
1267
1268	/*
1269	* Must have a PCI device registered!
1270	*/
1271	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1272	if (pPciDev)
1273	{
1274	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1275	Assert(pBus);
1276	PVM pVM = pDevIns->Internal.s.pVMR3;
1277	pdmLock(pVM);
1278	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1279	pdmUnlock(pVM);
1280	}
1281	else
1282	AssertReleaseMsgFailed(("No PCI device registered!\n"));
1283
1284	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1285	}
1286
1287
1288	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1289	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1290	{
1291	pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1292	}
1293
1294
1295	/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1296	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1297	{
1298	PDMDEV_ASSERT_DEVINS(pDevIns);
1299	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1300
1301	/*
1302	* Validate input.
1303	*/
1304	/** @todo iIrq and iLevel checks. */
1305
1306	PVM pVM = pDevIns->Internal.s.pVMR3;
1307	PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
1308
1309	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1310	}
1311
1312
1313	/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1314	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1315	{
1316	pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1317	}
1318
1319
1320	/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
1321	static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE ppBaseInterface, const char pszDesc)
1322	{
1323	PDMDEV_ASSERT_DEVINS(pDevIns);
1324	PVM pVM = pDevIns->Internal.s.pVMR3;
1325	VM_ASSERT_EMT(pVM);
1326	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1327	pDevIns->pReg->szName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1328
1329	/*
1330	* Lookup the LUN, it might already be registered.
1331	*/
1332	PPDMLUN pLunPrev = NULL;
1333	PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
1334	for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1335	if (pLun->iLun == iLun)
1336	break;
1337
1338	/*
1339	* Create the LUN if if wasn't found, else check if driver is already attached to it.
1340	*/
1341	if (!pLun)
1342	{
1343	if ( !pBaseInterface
1344	\|\| !pszDesc
1345	\|\| !*pszDesc)
1346	{
1347	Assert(pBaseInterface);
1348	Assert(pszDesc \|\| *pszDesc);
1349	return VERR_INVALID_PARAMETER;
1350	}
1351
1352	pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1353	if (!pLun)
1354	return VERR_NO_MEMORY;
1355
1356	pLun->iLun = iLun;
1357	pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1358	pLun->pTop = NULL;
1359	pLun->pBottom = NULL;
1360	pLun->pDevIns = pDevIns;
1361	pLun->pUsbIns = NULL;
1362	pLun->pszDesc = pszDesc;
1363	pLun->pBase = pBaseInterface;
1364	if (!pLunPrev)
1365	pDevIns->Internal.s.pLunsR3 = pLun;
1366	else
1367	pLunPrev->pNext = pLun;
1368	Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1369	iLun, pszDesc, pDevIns->pReg->szName, pDevIns->iInstance));
1370	}
1371	else if (pLun->pTop)
1372	{
1373	AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1374	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1375	return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1376	}
1377	Assert(pLun->pBase == pBaseInterface);
1378
1379
1380	/*
1381	* Get the attached driver configuration.
1382	*/
1383	int rc;
1384	PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
1385	if (pNode)
1386	rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /pDrvAbove/, pLun, ppBaseInterface);
1387	else
1388	rc = VERR_PDM_NO_ATTACHED_DRIVER;
1389
1390
1391	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1392	return rc;
1393	}
1394
1395
1396	/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
1397	static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1398	PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char pszName, PPDMQUEUE ppQueue)
1399	{
1400	PDMDEV_ASSERT_DEVINS(pDevIns);
1401	LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1402	pDevIns->pReg->szName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1403
1404	PVM pVM = pDevIns->Internal.s.pVMR3;
1405	VM_ASSERT_EMT(pVM);
1406
1407	if (pDevIns->iInstance > 0)
1408	{
1409	pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1410	AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1411	}
1412
1413	int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1414
1415	LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc ppQueue=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, ppQueue));
1416	return rc;
1417	}
1418
1419
1420	/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
1421	static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1422	const char *pszNameFmt, va_list va)
1423	{
1424	PDMDEV_ASSERT_DEVINS(pDevIns);
1425	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
1426	pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
1427
1428	PVM pVM = pDevIns->Internal.s.pVMR3;
1429	VM_ASSERT_EMT(pVM);
1430	int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
1431
1432	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1433	return rc;
1434	}
1435
1436
1437	/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
1438	static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1439	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1440	{
1441	PDMDEV_ASSERT_DEVINS(pDevIns);
1442	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1443	LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1444	pDevIns->pReg->szName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1445
1446	int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1447
1448	LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pReg->szName, pDevIns->iInstance,
1449	rc, *ppThread));
1450	return rc;
1451	}
1452
1453
1454	/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
1455	static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
1456	{
1457	PDMDEV_ASSERT_DEVINS(pDevIns);
1458	VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
1459	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pfnAsyncNotify));
1460
1461	int rc = VINF_SUCCESS;
1462	AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
1463	AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
1464	AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED \| PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
1465	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1466	AssertStmt( enmVMState == VMSTATE_SUSPENDING
1467	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
1468	\|\| enmVMState == VMSTATE_SUSPENDING_LS
1469	\|\| enmVMState == VMSTATE_RESETTING
1470	\|\| enmVMState == VMSTATE_RESETTING_LS
1471	\|\| enmVMState == VMSTATE_POWERING_OFF
1472	\|\| enmVMState == VMSTATE_POWERING_OFF_LS,
1473	rc = VERR_INVALID_STATE);
1474
1475	if (RT_SUCCESS(rc))
1476	pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
1477
1478	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1479	return rc;
1480	}
1481
1482
1483	/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
1484	static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
1485	{
1486	PDMDEV_ASSERT_DEVINS(pDevIns);
1487	PVM pVM = pDevIns->Internal.s.pVMR3;
1488
1489	VMSTATE enmVMState = VMR3GetState(pVM);
1490	if ( enmVMState == VMSTATE_SUSPENDING
1491	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
1492	\|\| enmVMState == VMSTATE_SUSPENDING_LS
1493	\|\| enmVMState == VMSTATE_RESETTING
1494	\|\| enmVMState == VMSTATE_RESETTING_LS
1495	\|\| enmVMState == VMSTATE_POWERING_OFF
1496	\|\| enmVMState == VMSTATE_POWERING_OFF_LS)
1497	{
1498	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
1499	VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
1500	}
1501	else
1502	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, enmVMState));
1503	}
1504
1505
1506	/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
1507	static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1508	{
1509	PDMDEV_ASSERT_DEVINS(pDevIns);
1510	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1511	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1512	pDevIns->pReg->szName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1513	pRtcReg->pfnWrite, ppRtcHlp));
1514
1515	/*
1516	* Validate input.
1517	*/
1518	if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1519	{
1520	AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1521	PDM_RTCREG_VERSION));
1522	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1523	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1524	return VERR_INVALID_PARAMETER;
1525	}
1526	if ( !pRtcReg->pfnWrite
1527	\|\| !pRtcReg->pfnRead)
1528	{
1529	Assert(pRtcReg->pfnWrite);
1530	Assert(pRtcReg->pfnRead);
1531	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1532	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1533	return VERR_INVALID_PARAMETER;
1534	}
1535
1536	if (!ppRtcHlp)
1537	{
1538	Assert(ppRtcHlp);
1539	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1540	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1541	return VERR_INVALID_PARAMETER;
1542	}
1543
1544	/*
1545	* Only one DMA device.
1546	*/
1547	PVM pVM = pDevIns->Internal.s.pVMR3;
1548	if (pVM->pdm.s.pRtc)
1549	{
1550	AssertMsgFailed(("Only one RTC device is supported!\n"));
1551	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1552	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1553	return VERR_INVALID_PARAMETER;
1554	}
1555
1556	/*
1557	* Allocate and initialize pci bus structure.
1558	*/
1559	int rc = VINF_SUCCESS;
1560	PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1561	if (pRtc)
1562	{
1563	pRtc->pDevIns = pDevIns;
1564	pRtc->Reg = *pRtcReg;
1565	pVM->pdm.s.pRtc = pRtc;
1566
1567	/* set the helper pointer. */
1568	*ppRtcHlp = &g_pdmR3DevRtcHlp;
1569	Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1570	pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1571	}
1572	else
1573	rc = VERR_NO_MEMORY;
1574
1575	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1576	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1577	return rc;
1578	}
1579
1580
1581	/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
1582	static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
1583	{
1584	PDMDEV_ASSERT_DEVINS(pDevIns);
1585	PVM pVM = pDevIns->Internal.s.pVMR3;
1586	VM_ASSERT_EMT(pVM);
1587	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
1588	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
1589	int rc = VINF_SUCCESS;
1590	if (pVM->pdm.s.pDmac)
1591	pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
1592	else
1593	{
1594	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1595	rc = VERR_PDM_NO_DMAC_INSTANCE;
1596	}
1597	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
1598	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1599	return rc;
1600	}
1601
1602
1603	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
1604	static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
1605	{
1606	PDMDEV_ASSERT_DEVINS(pDevIns);
1607	PVM pVM = pDevIns->Internal.s.pVMR3;
1608	VM_ASSERT_EMT(pVM);
1609	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
1610	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
1611	int rc = VINF_SUCCESS;
1612	if (pVM->pdm.s.pDmac)
1613	{
1614	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1615	if (pcbRead)
1616	*pcbRead = cb;
1617	}
1618	else
1619	{
1620	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1621	rc = VERR_PDM_NO_DMAC_INSTANCE;
1622	}
1623	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
1624	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1625	return rc;
1626	}
1627
1628
1629	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
1630	static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
1631	{
1632	PDMDEV_ASSERT_DEVINS(pDevIns);
1633	PVM pVM = pDevIns->Internal.s.pVMR3;
1634	VM_ASSERT_EMT(pVM);
1635	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
1636	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
1637	int rc = VINF_SUCCESS;
1638	if (pVM->pdm.s.pDmac)
1639	{
1640	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1641	if (pcbWritten)
1642	*pcbWritten = cb;
1643	}
1644	else
1645	{
1646	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1647	rc = VERR_PDM_NO_DMAC_INSTANCE;
1648	}
1649	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
1650	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1651	return rc;
1652	}
1653
1654
1655	/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
1656	static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
1657	{
1658	PDMDEV_ASSERT_DEVINS(pDevIns);
1659	PVM pVM = pDevIns->Internal.s.pVMR3;
1660	VM_ASSERT_EMT(pVM);
1661	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
1662	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, uLevel));
1663	int rc = VINF_SUCCESS;
1664	if (pVM->pdm.s.pDmac)
1665	pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
1666	else
1667	{
1668	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1669	rc = VERR_PDM_NO_DMAC_INSTANCE;
1670	}
1671	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
1672	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1673	return rc;
1674	}
1675
1676	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
1677	static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
1678	{
1679	PDMDEV_ASSERT_DEVINS(pDevIns);
1680	PVM pVM = pDevIns->Internal.s.pVMR3;
1681	VM_ASSERT_EMT(pVM);
1682	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
1683	pDevIns->pReg->szName, pDevIns->iInstance, uChannel));
1684	uint8_t u8Mode;
1685	if (pVM->pdm.s.pDmac)
1686	u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
1687	else
1688	{
1689	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1690	u8Mode = 3 << 2 /* illegal mode type */;
1691	}
1692	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
1693	pDevIns->pReg->szName, pDevIns->iInstance, u8Mode));
1694	return u8Mode;
1695	}
1696
1697	/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
1698	static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
1699	{
1700	PDMDEV_ASSERT_DEVINS(pDevIns);
1701	PVM pVM = pDevIns->Internal.s.pVMR3;
1702	VM_ASSERT_EMT(pVM);
1703	LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
1704	pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
1705
1706	AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1707	VM_FF_SET(pVM, VM_FF_PDM_DMA);
1708	REMR3NotifyDmaPending(pVM);
1709	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
1710	}
1711
1712
1713	/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
1714	static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
1715	{
1716	PDMDEV_ASSERT_DEVINS(pDevIns);
1717	PVM pVM = pDevIns->Internal.s.pVMR3;
1718	VM_ASSERT_EMT(pVM);
1719
1720	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
1721	pDevIns->pReg->szName, pDevIns->iInstance, iReg, u8Value));
1722	int rc;
1723	if (pVM->pdm.s.pRtc)
1724	rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
1725	else
1726	rc = VERR_PDM_NO_RTC_INSTANCE;
1727
1728	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1729	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1730	return rc;
1731	}
1732
1733
1734	/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
1735	static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
1736	{
1737	PDMDEV_ASSERT_DEVINS(pDevIns);
1738	PVM pVM = pDevIns->Internal.s.pVMR3;
1739	VM_ASSERT_EMT(pVM);
1740
1741	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
1742	pDevIns->pReg->szName, pDevIns->iInstance, iReg, pu8Value));
1743	int rc;
1744	if (pVM->pdm.s.pRtc)
1745	rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
1746	else
1747	rc = VERR_PDM_NO_RTC_INSTANCE;
1748
1749	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1750	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1751	return rc;
1752	}
1753
1754
1755	/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
1756	static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1757	{
1758	PDMDEV_ASSERT_DEVINS(pDevIns);
1759	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1760	return true;
1761
1762	char szMsg[100];
1763	RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1764	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1765	AssertBreakpoint();
1766	return false;
1767	}
1768
1769
1770	/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
1771	static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1772	{
1773	PDMDEV_ASSERT_DEVINS(pDevIns);
1774	if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1775	return true;
1776
1777	char szMsg[100];
1778	RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1779	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1780	AssertBreakpoint();
1781	return false;
1782	}
1783
1784
1785	/** @interface_method_impl{PDMDEVHLP,pfnLdrGetRCInterfaceSymbols} */
1786	static DECLCALLBACK(int) pdmR3DevHlp_LdrGetRCInterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
1787	const char pszSymPrefix, const char pszSymList)
1788	{
1789	PDMDEV_ASSERT_DEVINS(pDevIns);
1790	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1791	LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
1792	pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
1793
1794	int rc;
1795	if ( strncmp(pszSymPrefix, "dev", 3) == 0
1796	&& RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
1797	{
1798	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1799	rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3, pvInterface, cbInterface,
1800	pDevIns->pReg->szRCMod, pszSymPrefix, pszSymList,
1801	false /fRing0OrRC/);
1802	else
1803	{
1804	AssertMsgFailed(("Not a raw-mode enabled driver\n"));
1805	rc = VERR_PERMISSION_DENIED;
1806	}
1807	}
1808	else
1809	{
1810	AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
1811	pszSymPrefix, pDevIns->pReg->szName));
1812	rc = VERR_INVALID_NAME;
1813	}
1814
1815	LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
1816	pDevIns->iInstance, rc));
1817	return rc;
1818	}
1819
1820
1821	/** @interface_method_impl{PDMDEVHLP,pfnLdrGetR0InterfaceSymbols} */
1822	static DECLCALLBACK(int) pdmR3DevHlp_LdrGetR0InterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
1823	const char pszSymPrefix, const char pszSymList)
1824	{
1825	PDMDEV_ASSERT_DEVINS(pDevIns);
1826	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1827	LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
1828	pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
1829
1830	int rc;
1831	if ( strncmp(pszSymPrefix, "dev", 3) == 0
1832	&& RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
1833	{
1834	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1835	rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3, pvInterface, cbInterface,
1836	pDevIns->pReg->szR0Mod, pszSymPrefix, pszSymList,
1837	true /fRing0OrRC/);
1838	else
1839	{
1840	AssertMsgFailed(("Not a ring-0 enabled driver\n"));
1841	rc = VERR_PERMISSION_DENIED;
1842	}
1843	}
1844	else
1845	{
1846	AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
1847	pszSymPrefix, pDevIns->pReg->szName));
1848	rc = VERR_INVALID_NAME;
1849	}
1850
1851	LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
1852	pDevIns->iInstance, rc));
1853	return rc;
1854	}
1855
1856
1857	/** @interface_method_impl{PDMDEVHLP,pfnCallR0} */
1858	static DECLCALLBACK(int) pdmR3DevHlp_CallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
1859	{
1860	PDMDEV_ASSERT_DEVINS(pDevIns);
1861	PVM pVM = pDevIns->Internal.s.pVMR3;
1862	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1863	LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: uOperation=%#x u64Arg=%#RX64\n",
1864	pDevIns->pReg->szName, pDevIns->iInstance, uOperation, u64Arg));
1865
1866	/*
1867	* Resolve the ring-0 entry point. There is not need to remember this like
1868	* we do for drivers since this is mainly for construction time hacks and
1869	* other things that aren't performance critical.
1870	*/
1871	int rc;
1872	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1873	{
1874	char szSymbol[ sizeof("devR0") + sizeof(pDevIns->pReg->szName) + sizeof("ReqHandler")];
1875	strcat(strcat(strcpy(szSymbol, "devR0"), pDevIns->pReg->szName), "ReqHandler");
1876	szSymbol[sizeof("devR0") - 1] = RT_C_TO_UPPER(szSymbol[sizeof("devR0") - 1]);
1877
1878	PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
1879	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, szSymbol, &pfnReqHandlerR0);
1880	if (RT_SUCCESS(rc))
1881	{
1882	/*
1883	* Make the ring-0 call.
1884	*/
1885	PDMDEVICECALLREQHANDLERREQ Req;
1886	Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
1887	Req.Hdr.cbReq = sizeof(Req);
1888	Req.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1889	Req.pfnReqHandlerR0 = pfnReqHandlerR0;
1890	Req.uOperation = uOperation;
1891	Req.u32Alignment = 0;
1892	Req.u64Arg = u64Arg;
1893	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr);
1894	}
1895	else
1896	pfnReqHandlerR0 = NIL_RTR0PTR;
1897	}
1898	else
1899	rc = VERR_ACCESS_DENIED;
1900	LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
1901	pDevIns->iInstance, rc));
1902	return rc;
1903	}
1904
1905
1906	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
1907	static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1908	{
1909	PDMDEV_ASSERT_DEVINS(pDevIns);
1910	LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1911	return pDevIns->Internal.s.pVMR3;
1912	}
1913
1914
1915	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
1916	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1917	{
1918	PDMDEV_ASSERT_DEVINS(pDevIns);
1919	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1920	LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1921	return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1922	}
1923
1924
1925	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
1926	static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1927	{
1928	PDMDEV_ASSERT_DEVINS(pDevIns);
1929	PVM pVM = pDevIns->Internal.s.pVMR3;
1930	VM_ASSERT_EMT(pVM);
1931	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1932	".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1933	pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1934	pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1935	pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1936
1937	/*
1938	* Validate the structure.
1939	*/
1940	if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1941	{
1942	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1943	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1944	return VERR_INVALID_PARAMETER;
1945	}
1946	if ( !pPciBusReg->pfnRegisterR3
1947	\|\| !pPciBusReg->pfnIORegionRegisterR3
1948	\|\| !pPciBusReg->pfnSetIrqR3
1949	\|\| !pPciBusReg->pfnSaveExecR3
1950	\|\| !pPciBusReg->pfnLoadExecR3
1951	\|\| (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1952	{
1953	Assert(pPciBusReg->pfnRegisterR3);
1954	Assert(pPciBusReg->pfnIORegionRegisterR3);
1955	Assert(pPciBusReg->pfnSetIrqR3);
1956	Assert(pPciBusReg->pfnSaveExecR3);
1957	Assert(pPciBusReg->pfnLoadExecR3);
1958	Assert(pPciBusReg->pfnFakePCIBIOSR3);
1959	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1960	return VERR_INVALID_PARAMETER;
1961	}
1962	if ( pPciBusReg->pszSetIrqRC
1963	&& !VALID_PTR(pPciBusReg->pszSetIrqRC))
1964	{
1965	Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1966	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1967	return VERR_INVALID_PARAMETER;
1968	}
1969	if ( pPciBusReg->pszSetIrqR0
1970	&& !VALID_PTR(pPciBusReg->pszSetIrqR0))
1971	{
1972	Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1973	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1974	return VERR_INVALID_PARAMETER;
1975	}
1976	if (!ppPciHlpR3)
1977	{
1978	Assert(ppPciHlpR3);
1979	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1980	return VERR_INVALID_PARAMETER;
1981	}
1982
1983	/*
1984	* Find free PCI bus entry.
1985	*/
1986	unsigned iBus = 0;
1987	for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1988	if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1989	break;
1990	if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1991	{
1992	AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1993	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1994	return VERR_INVALID_PARAMETER;
1995	}
1996	PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1997
1998	/*
1999	* Resolve and init the RC bits.
2000	*/
2001	if (pPciBusReg->pszSetIrqRC)
2002	{
2003	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
2004	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
2005	if (RT_FAILURE(rc))
2006	{
2007	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2008	return rc;
2009	}
2010	pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2011	}
2012	else
2013	{
2014	pPciBus->pfnSetIrqRC = 0;
2015	pPciBus->pDevInsRC = 0;
2016	}
2017
2018	/*
2019	* Resolve and init the R0 bits.
2020	*/
2021	if (pPciBusReg->pszSetIrqR0)
2022	{
2023	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2024	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2025	if (RT_FAILURE(rc))
2026	{
2027	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2028	return rc;
2029	}
2030	pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2031	}
2032	else
2033	{
2034	pPciBus->pfnSetIrqR0 = 0;
2035	pPciBus->pDevInsR0 = 0;
2036	}
2037
2038	/*
2039	* Init the R3 bits.
2040	*/
2041	pPciBus->iBus = iBus;
2042	pPciBus->pDevInsR3 = pDevIns;
2043	pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
2044	pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
2045	pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
2046	pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
2047	pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
2048	pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
2049	pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
2050
2051	Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2052
2053	/* set the helper pointer and return. */
2054	*ppPciHlpR3 = &g_pdmR3DevPciHlp;
2055	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2056	return VINF_SUCCESS;
2057	}
2058
2059
2060	/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
2061	static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2062	{
2063	PDMDEV_ASSERT_DEVINS(pDevIns);
2064	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2065	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
2066	pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
2067	pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
2068	pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
2069	ppPicHlpR3));
2070
2071	/*
2072	* Validate input.
2073	*/
2074	if (pPicReg->u32Version != PDM_PICREG_VERSION)
2075	{
2076	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2077	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2078	return VERR_INVALID_PARAMETER;
2079	}
2080	if ( !pPicReg->pfnSetIrqR3
2081	\|\| !pPicReg->pfnGetInterruptR3)
2082	{
2083	Assert(pPicReg->pfnSetIrqR3);
2084	Assert(pPicReg->pfnGetInterruptR3);
2085	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2086	return VERR_INVALID_PARAMETER;
2087	}
2088	if ( ( pPicReg->pszSetIrqRC
2089	\|\| pPicReg->pszGetInterruptRC)
2090	&& ( !VALID_PTR(pPicReg->pszSetIrqRC)
2091	\|\| !VALID_PTR(pPicReg->pszGetInterruptRC))
2092	)
2093	{
2094	Assert(VALID_PTR(pPicReg->pszSetIrqRC));
2095	Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
2096	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2097	return VERR_INVALID_PARAMETER;
2098	}
2099	if ( pPicReg->pszSetIrqRC
2100	&& !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
2101	{
2102	Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
2103	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2104	return VERR_INVALID_PARAMETER;
2105	}
2106	if ( pPicReg->pszSetIrqR0
2107	&& !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
2108	{
2109	Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
2110	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2111	return VERR_INVALID_PARAMETER;
2112	}
2113	if (!ppPicHlpR3)
2114	{
2115	Assert(ppPicHlpR3);
2116	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2117	return VERR_INVALID_PARAMETER;
2118	}
2119
2120	/*
2121	* Only one PIC device.
2122	*/
2123	PVM pVM = pDevIns->Internal.s.pVMR3;
2124	if (pVM->pdm.s.Pic.pDevInsR3)
2125	{
2126	AssertMsgFailed(("Only one pic device is supported!\n"));
2127	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2128	return VERR_INVALID_PARAMETER;
2129	}
2130
2131	/*
2132	* RC stuff.
2133	*/
2134	if (pPicReg->pszSetIrqRC)
2135	{
2136	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2137	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, rc));
2138	if (RT_SUCCESS(rc))
2139	{
2140	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
2141	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
2142	}
2143	if (RT_FAILURE(rc))
2144	{
2145	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2146	return rc;
2147	}
2148	pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2149	}
2150	else
2151	{
2152	pVM->pdm.s.Pic.pDevInsRC = 0;
2153	pVM->pdm.s.Pic.pfnSetIrqRC = 0;
2154	pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
2155	}
2156
2157	/*
2158	* R0 stuff.
2159	*/
2160	if (pPicReg->pszSetIrqR0)
2161	{
2162	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2163	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2164	if (RT_SUCCESS(rc))
2165	{
2166	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2167	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2168	}
2169	if (RT_FAILURE(rc))
2170	{
2171	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2172	return rc;
2173	}
2174	pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2175	Assert(pVM->pdm.s.Pic.pDevInsR0);
2176	}
2177	else
2178	{
2179	pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2180	pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2181	pVM->pdm.s.Pic.pDevInsR0 = 0;
2182	}
2183
2184	/*
2185	* R3 stuff.
2186	*/
2187	pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2188	pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
2189	pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
2190	Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2191
2192	/* set the helper pointer and return. */
2193	*ppPicHlpR3 = &g_pdmR3DevPicHlp;
2194	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2195	return VINF_SUCCESS;
2196	}
2197
2198
2199	/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
2200	static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2201	{
2202	PDMDEV_ASSERT_DEVINS(pDevIns);
2203	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2204	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
2205	".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
2206	".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
2207	pDevIns->pReg->szName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
2208	pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
2209	pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
2210	pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
2211	pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
2212
2213	/*
2214	* Validate input.
2215	*/
2216	if (pApicReg->u32Version != PDM_APICREG_VERSION)
2217	{
2218	AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2219	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2220	return VERR_INVALID_PARAMETER;
2221	}
2222	if ( !pApicReg->pfnGetInterruptR3
2223	\|\| !pApicReg->pfnHasPendingIrqR3
2224	\|\| !pApicReg->pfnSetBaseR3
2225	\|\| !pApicReg->pfnGetBaseR3
2226	\|\| !pApicReg->pfnSetTPRR3
2227	\|\| !pApicReg->pfnGetTPRR3
2228	\|\| !pApicReg->pfnWriteMSRR3
2229	\|\| !pApicReg->pfnReadMSRR3
2230	\|\| !pApicReg->pfnBusDeliverR3
2231	\|\| !pApicReg->pfnLocalInterruptR3)
2232	{
2233	Assert(pApicReg->pfnGetInterruptR3);
2234	Assert(pApicReg->pfnHasPendingIrqR3);
2235	Assert(pApicReg->pfnSetBaseR3);
2236	Assert(pApicReg->pfnGetBaseR3);
2237	Assert(pApicReg->pfnSetTPRR3);
2238	Assert(pApicReg->pfnGetTPRR3);
2239	Assert(pApicReg->pfnWriteMSRR3);
2240	Assert(pApicReg->pfnReadMSRR3);
2241	Assert(pApicReg->pfnBusDeliverR3);
2242	Assert(pApicReg->pfnLocalInterruptR3);
2243	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2244	return VERR_INVALID_PARAMETER;
2245	}
2246	if ( ( pApicReg->pszGetInterruptRC
2247	\|\| pApicReg->pszHasPendingIrqRC
2248	\|\| pApicReg->pszSetBaseRC
2249	\|\| pApicReg->pszGetBaseRC
2250	\|\| pApicReg->pszSetTPRRC
2251	\|\| pApicReg->pszGetTPRRC
2252	\|\| pApicReg->pszWriteMSRRC
2253	\|\| pApicReg->pszReadMSRRC
2254	\|\| pApicReg->pszBusDeliverRC
2255	\|\| pApicReg->pszLocalInterruptRC)
2256	&& ( !VALID_PTR(pApicReg->pszGetInterruptRC)
2257	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqRC)
2258	\|\| !VALID_PTR(pApicReg->pszSetBaseRC)
2259	\|\| !VALID_PTR(pApicReg->pszGetBaseRC)
2260	\|\| !VALID_PTR(pApicReg->pszSetTPRRC)
2261	\|\| !VALID_PTR(pApicReg->pszGetTPRRC)
2262	\|\| !VALID_PTR(pApicReg->pszWriteMSRRC)
2263	\|\| !VALID_PTR(pApicReg->pszReadMSRRC)
2264	\|\| !VALID_PTR(pApicReg->pszBusDeliverRC)
2265	\|\| !VALID_PTR(pApicReg->pszLocalInterruptRC))
2266	)
2267	{
2268	Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
2269	Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
2270	Assert(VALID_PTR(pApicReg->pszSetBaseRC));
2271	Assert(VALID_PTR(pApicReg->pszGetBaseRC));
2272	Assert(VALID_PTR(pApicReg->pszSetTPRRC));
2273	Assert(VALID_PTR(pApicReg->pszGetTPRRC));
2274	Assert(VALID_PTR(pApicReg->pszReadMSRRC));
2275	Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
2276	Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
2277	Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
2278	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2279	return VERR_INVALID_PARAMETER;
2280	}
2281	if ( ( pApicReg->pszGetInterruptR0
2282	\|\| pApicReg->pszHasPendingIrqR0
2283	\|\| pApicReg->pszSetBaseR0
2284	\|\| pApicReg->pszGetBaseR0
2285	\|\| pApicReg->pszSetTPRR0
2286	\|\| pApicReg->pszGetTPRR0
2287	\|\| pApicReg->pszWriteMSRR0
2288	\|\| pApicReg->pszReadMSRR0
2289	\|\| pApicReg->pszBusDeliverR0
2290	\|\| pApicReg->pszLocalInterruptR0)
2291	&& ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2292	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqR0)
2293	\|\| !VALID_PTR(pApicReg->pszSetBaseR0)
2294	\|\| !VALID_PTR(pApicReg->pszGetBaseR0)
2295	\|\| !VALID_PTR(pApicReg->pszSetTPRR0)
2296	\|\| !VALID_PTR(pApicReg->pszGetTPRR0)
2297	\|\| !VALID_PTR(pApicReg->pszReadMSRR0)
2298	\|\| !VALID_PTR(pApicReg->pszWriteMSRR0)
2299	\|\| !VALID_PTR(pApicReg->pszBusDeliverR0)
2300	\|\| !VALID_PTR(pApicReg->pszLocalInterruptR0))
2301	)
2302	{
2303	Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2304	Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
2305	Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2306	Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2307	Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2308	Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2309	Assert(VALID_PTR(pApicReg->pszReadMSRR0));
2310	Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
2311	Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2312	Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
2313	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2314	return VERR_INVALID_PARAMETER;
2315	}
2316	if (!ppApicHlpR3)
2317	{
2318	Assert(ppApicHlpR3);
2319	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2320	return VERR_INVALID_PARAMETER;
2321	}
2322
2323	/*
2324	* Only one APIC device. On SMP we have single logical device covering all LAPICs,
2325	* as they need to communicate and share state easily.
2326	*/
2327	PVM pVM = pDevIns->Internal.s.pVMR3;
2328	if (pVM->pdm.s.Apic.pDevInsR3)
2329	{
2330	AssertMsgFailed(("Only one apic device is supported!\n"));
2331	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2332	return VERR_INVALID_PARAMETER;
2333	}
2334
2335	/*
2336	* Resolve & initialize the RC bits.
2337	*/
2338	if (pApicReg->pszGetInterruptRC)
2339	{
2340	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
2341	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
2342	if (RT_SUCCESS(rc))
2343	{
2344	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
2345	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
2346	}
2347	if (RT_SUCCESS(rc))
2348	{
2349	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
2350	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, rc));
2351	}
2352	if (RT_SUCCESS(rc))
2353	{
2354	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
2355	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, rc));
2356	}
2357	if (RT_SUCCESS(rc))
2358	{
2359	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
2360	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, rc));
2361	}
2362	if (RT_SUCCESS(rc))
2363	{
2364	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
2365	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, rc));
2366	}
2367	if (RT_SUCCESS(rc))
2368	{
2369	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
2370	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
2371	}
2372	if (RT_SUCCESS(rc))
2373	{
2374	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
2375	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, rc));
2376	}
2377	if (RT_SUCCESS(rc))
2378	{
2379	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
2380	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
2381	}
2382	if (RT_SUCCESS(rc))
2383	{
2384	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
2385	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
2386	}
2387	if (RT_FAILURE(rc))
2388	{
2389	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2390	return rc;
2391	}
2392	pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2393	}
2394	else
2395	{
2396	pVM->pdm.s.Apic.pDevInsRC = 0;
2397	pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
2398	pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
2399	pVM->pdm.s.Apic.pfnSetBaseRC = 0;
2400	pVM->pdm.s.Apic.pfnGetBaseRC = 0;
2401	pVM->pdm.s.Apic.pfnSetTPRRC = 0;
2402	pVM->pdm.s.Apic.pfnGetTPRRC = 0;
2403	pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
2404	pVM->pdm.s.Apic.pfnReadMSRRC = 0;
2405	pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
2406	pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
2407	}
2408
2409	/*
2410	* Resolve & initialize the R0 bits.
2411	*/
2412	if (pApicReg->pszGetInterruptR0)
2413	{
2414	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2415	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2416	if (RT_SUCCESS(rc))
2417	{
2418	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
2419	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
2420	}
2421	if (RT_SUCCESS(rc))
2422	{
2423	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2424	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2425	}
2426	if (RT_SUCCESS(rc))
2427	{
2428	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2429	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2430	}
2431	if (RT_SUCCESS(rc))
2432	{
2433	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2434	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2435	}
2436	if (RT_SUCCESS(rc))
2437	{
2438	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2439	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2440	}
2441	if (RT_SUCCESS(rc))
2442	{
2443	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
2444	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
2445	}
2446	if (RT_SUCCESS(rc))
2447	{
2448	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
2449	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
2450	}
2451	if (RT_SUCCESS(rc))
2452	{
2453	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2454	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2455	}
2456	if (RT_SUCCESS(rc))
2457	{
2458	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
2459	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
2460	}
2461	if (RT_FAILURE(rc))
2462	{
2463	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2464	return rc;
2465	}
2466	pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2467	Assert(pVM->pdm.s.Apic.pDevInsR0);
2468	}
2469	else
2470	{
2471	pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2472	pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
2473	pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2474	pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2475	pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2476	pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2477	pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
2478	pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
2479	pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2480	pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
2481	pVM->pdm.s.Apic.pDevInsR0 = 0;
2482	}
2483
2484	/*
2485	* Initialize the HC bits.
2486	*/
2487	pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2488	pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
2489	pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
2490	pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
2491	pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
2492	pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
2493	pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
2494	pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
2495	pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
2496	pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
2497	pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
2498	Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2499
2500	/* set the helper pointer and return. */
2501	*ppApicHlpR3 = &g_pdmR3DevApicHlp;
2502	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2503	return VINF_SUCCESS;
2504	}
2505
2506
2507	/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
2508	static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2509	{
2510	PDMDEV_ASSERT_DEVINS(pDevIns);
2511	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2512	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
2513	pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
2514	pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
2515
2516	/*
2517	* Validate input.
2518	*/
2519	if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2520	{
2521	AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2522	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2523	return VERR_INVALID_PARAMETER;
2524	}
2525	if (!pIoApicReg->pfnSetIrqR3)
2526	{
2527	Assert(pIoApicReg->pfnSetIrqR3);
2528	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2529	return VERR_INVALID_PARAMETER;
2530	}
2531	if ( pIoApicReg->pszSetIrqRC
2532	&& !VALID_PTR(pIoApicReg->pszSetIrqRC))
2533	{
2534	Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
2535	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2536	return VERR_INVALID_PARAMETER;
2537	}
2538	if ( pIoApicReg->pszSetIrqR0
2539	&& !VALID_PTR(pIoApicReg->pszSetIrqR0))
2540	{
2541	Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2542	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2543	return VERR_INVALID_PARAMETER;
2544	}
2545	if (!ppIoApicHlpR3)
2546	{
2547	Assert(ppIoApicHlpR3);
2548	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2549	return VERR_INVALID_PARAMETER;
2550	}
2551
2552	/*
2553	* The I/O APIC requires the APIC to be present (hacks++).
2554	* If the I/O APIC does GC stuff so must the APIC.
2555	*/
2556	PVM pVM = pDevIns->Internal.s.pVMR3;
2557	if (!pVM->pdm.s.Apic.pDevInsR3)
2558	{
2559	AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2560	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2561	return VERR_INVALID_PARAMETER;
2562	}
2563	if ( pIoApicReg->pszSetIrqRC
2564	&& !pVM->pdm.s.Apic.pDevInsRC)
2565	{
2566	AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2567	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2568	return VERR_INVALID_PARAMETER;
2569	}
2570
2571	/*
2572	* Only one I/O APIC device.
2573	*/
2574	if (pVM->pdm.s.IoApic.pDevInsR3)
2575	{
2576	AssertMsgFailed(("Only one ioapic device is supported!\n"));
2577	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2578	return VERR_INVALID_PARAMETER;
2579	}
2580
2581	/*
2582	* Resolve & initialize the GC bits.
2583	*/
2584	if (pIoApicReg->pszSetIrqRC)
2585	{
2586	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2587	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2588	if (RT_FAILURE(rc))
2589	{
2590	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2591	return rc;
2592	}
2593	pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2594	}
2595	else
2596	{
2597	pVM->pdm.s.IoApic.pDevInsRC = 0;
2598	pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2599	}
2600
2601	/*
2602	* Resolve & initialize the R0 bits.
2603	*/
2604	if (pIoApicReg->pszSetIrqR0)
2605	{
2606	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2607	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2608	if (RT_FAILURE(rc))
2609	{
2610	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2611	return rc;
2612	}
2613	pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2614	Assert(pVM->pdm.s.IoApic.pDevInsR0);
2615	}
2616	else
2617	{
2618	pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2619	pVM->pdm.s.IoApic.pDevInsR0 = 0;
2620	}
2621
2622	/*
2623	* Initialize the R3 bits.
2624	*/
2625	pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2626	pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2627	Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2628
2629	/* set the helper pointer and return. */
2630	*ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2631	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2632	return VINF_SUCCESS;
2633	}
2634
2635
2636	/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
2637	static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
2638	{
2639	PDMDEV_ASSERT_DEVINS(pDevIns);
2640	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2641	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n"));
2642
2643	/*
2644	* Validate input.
2645	*/
2646	if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
2647	{
2648	AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
2649	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2650	return VERR_INVALID_PARAMETER;
2651	}
2652
2653	if (!ppHpetHlpR3)
2654	{
2655	Assert(ppHpetHlpR3);
2656	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2657	return VERR_INVALID_PARAMETER;
2658	}
2659
2660	/* set the helper pointer and return. */
2661	*ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
2662	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2663	return VINF_SUCCESS;
2664	}
2665
2666
2667	/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
2668	static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2669	{
2670	PDMDEV_ASSERT_DEVINS(pDevIns);
2671	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2672	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2673	pDevIns->pReg->szName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2674	pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2675
2676	/*
2677	* Validate input.
2678	*/
2679	if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2680	{
2681	AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2682	PDM_DMACREG_VERSION));
2683	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2684	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2685	return VERR_INVALID_PARAMETER;
2686	}
2687	if ( !pDmacReg->pfnRun
2688	\|\| !pDmacReg->pfnRegister
2689	\|\| !pDmacReg->pfnReadMemory
2690	\|\| !pDmacReg->pfnWriteMemory
2691	\|\| !pDmacReg->pfnSetDREQ
2692	\|\| !pDmacReg->pfnGetChannelMode)
2693	{
2694	Assert(pDmacReg->pfnRun);
2695	Assert(pDmacReg->pfnRegister);
2696	Assert(pDmacReg->pfnReadMemory);
2697	Assert(pDmacReg->pfnWriteMemory);
2698	Assert(pDmacReg->pfnSetDREQ);
2699	Assert(pDmacReg->pfnGetChannelMode);
2700	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2701	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2702	return VERR_INVALID_PARAMETER;
2703	}
2704
2705	if (!ppDmacHlp)
2706	{
2707	Assert(ppDmacHlp);
2708	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2709	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2710	return VERR_INVALID_PARAMETER;
2711	}
2712
2713	/*
2714	* Only one DMA device.
2715	*/
2716	PVM pVM = pDevIns->Internal.s.pVMR3;
2717	if (pVM->pdm.s.pDmac)
2718	{
2719	AssertMsgFailed(("Only one DMA device is supported!\n"));
2720	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2721	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2722	return VERR_INVALID_PARAMETER;
2723	}
2724
2725	/*
2726	* Allocate and initialize pci bus structure.
2727	*/
2728	int rc = VINF_SUCCESS;
2729	PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2730	if (pDmac)
2731	{
2732	pDmac->pDevIns = pDevIns;
2733	pDmac->Reg = *pDmacReg;
2734	pVM->pdm.s.pDmac = pDmac;
2735
2736	/* set the helper pointer. */
2737	*ppDmacHlp = &g_pdmR3DevDmacHlp;
2738	Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2739	pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2740	}
2741	else
2742	rc = VERR_NO_MEMORY;
2743
2744	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2745	pDevIns->pReg->szName, pDevIns->iInstance, rc));
2746	return rc;
2747	}
2748
2749
2750	/**
2751	* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2752	*/
2753	static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2754	{
2755	PDMDEV_ASSERT_DEVINS(pDevIns);
2756	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2757
2758	int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2759	return rc;
2760	}
2761
2762
2763	/**
2764	* @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2765	*/
2766	static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2767	{
2768	PDMDEV_ASSERT_DEVINS(pDevIns);
2769	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2770
2771	int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2772	return rc;
2773	}
2774
2775
2776	/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
2777	static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2778	{
2779	PDMDEV_ASSERT_DEVINS(pDevIns);
2780	PVM pVM = pDevIns->Internal.s.pVMR3;
2781	VM_ASSERT_EMT(pVM);
2782	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2783	pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2784
2785	/*
2786	* We postpone this operation because we're likely to be inside a I/O instruction
2787	* and the EIP will be updated when we return.
2788	* We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2789	*/
2790	bool fHaltOnReset;
2791	int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2792	if (RT_SUCCESS(rc) && fHaltOnReset)
2793	{
2794	Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2795	rc = VINF_EM_HALT;
2796	}
2797	else
2798	{
2799	VM_FF_SET(pVM, VM_FF_RESET);
2800	rc = VINF_EM_RESET;
2801	}
2802
2803	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2804	return rc;
2805	}
2806
2807
2808	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
2809	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2810	{
2811	int rc;
2812	PDMDEV_ASSERT_DEVINS(pDevIns);
2813	PVM pVM = pDevIns->Internal.s.pVMR3;
2814	VM_ASSERT_EMT(pVM);
2815	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2816	pDevIns->pReg->szName, pDevIns->iInstance));
2817
2818	/** @todo Always take the SMP path - fewer code paths. */
2819	if (pVM->cCpus > 1)
2820	{
2821	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2822	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
2823	AssertRC(rc);
2824	rc = VINF_EM_SUSPEND;
2825	}
2826	else
2827	rc = VMR3Suspend(pVM);
2828
2829	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2830	return rc;
2831	}
2832
2833
2834	/**
2835	* Worker for pdmR3DevHlp_VMSuspendSaveAndPowerOff that is invoked via a queued
2836	* EMT request to avoid deadlocks.
2837	*
2838	* @returns VBox status code fit for scheduling.
2839	* @param pVM The VM handle.
2840	* @param pDevIns The device that triggered this action.
2841	*/
2842	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker(PVM pVM, PPDMDEVINS pDevIns)
2843	{
2844	/*
2845	* Suspend the VM first then do the saving.
2846	*/
2847	int rc = VMR3Suspend(pVM);
2848	if (RT_SUCCESS(rc))
2849	{
2850	rc = pVM->pUVM->pVmm2UserMethods->pfnSaveState(pVM->pUVM->pVmm2UserMethods, pVM);
2851
2852	/*
2853	* On success, power off the VM, on failure we'll leave it suspended.
2854	*/
2855	if (RT_SUCCESS(rc))
2856	{
2857	rc = VMR3PowerOff(pVM);
2858	if (RT_FAILURE(rc))
2859	LogRel(("%s/SSP: VMR3PowerOff failed: %Rrc\n", pDevIns->pReg->szName, rc));
2860	}
2861	else
2862	LogRel(("%s/SSP: pfnSaveState failed: %Rrc\n", pDevIns->pReg->szName, rc));
2863	}
2864	else
2865	LogRel(("%s/SSP: Suspend failed: %Rrc\n", pDevIns->pReg->szName, rc));
2866	return rc;
2867	}
2868
2869
2870	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
2871	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
2872	{
2873	PDMDEV_ASSERT_DEVINS(pDevIns);
2874	PVM pVM = pDevIns->Internal.s.pVMR3;
2875	VM_ASSERT_EMT(pVM);
2876	LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d:\n",
2877	pDevIns->pReg->szName, pDevIns->iInstance));
2878
2879	int rc;
2880	if ( pVM->pUVM->pVmm2UserMethods
2881	&& pVM->pUVM->pVmm2UserMethods->pfnSaveState)
2882	{
2883	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker, 2, pVM, pDevIns);
2884	if (RT_SUCCESS(rc))
2885	{
2886	LogRel(("%s: Suspending, Saving and Powering Off the VM\n", pDevIns->pReg->szName));
2887	rc = VINF_EM_SUSPEND;
2888	}
2889	}
2890	else
2891	rc = VERR_NOT_SUPPORTED;
2892
2893	LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2894	return rc;
2895	}
2896
2897
2898	/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
2899	static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2900	{
2901	int rc;
2902	PDMDEV_ASSERT_DEVINS(pDevIns);
2903	PVM pVM = pDevIns->Internal.s.pVMR3;
2904	VM_ASSERT_EMT(pVM);
2905	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2906	pDevIns->pReg->szName, pDevIns->iInstance));
2907
2908	/** @todo Always take the SMP path - fewer code paths. */
2909	if (pVM->cCpus > 1)
2910	{
2911	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2912	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
2913	AssertRC(rc);
2914	/* Set the VCPU state to stopped here as well to make sure no
2915	* inconsistency with the EM state occurs.
2916	*/
2917	VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
2918	rc = VINF_EM_OFF;
2919	}
2920	else
2921	rc = VMR3PowerOff(pVM);
2922
2923	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2924	return rc;
2925	}
2926
2927
2928	/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
2929	static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2930	{
2931	PDMDEV_ASSERT_DEVINS(pDevIns);
2932	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2933
2934	bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
2935
2936	LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pReg->szName, pDevIns->iInstance, fRc));
2937	return fRc;
2938	}
2939
2940
2941	/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
2942	static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2943	{
2944	PDMDEV_ASSERT_DEVINS(pDevIns);
2945	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2946	LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, fEnable));
2947	PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
2948	}
2949
2950
2951	/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
2952	static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2953	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
2954	{
2955	PDMDEV_ASSERT_DEVINS(pDevIns);
2956	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2957
2958	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2959	pDevIns->pReg->szName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2960	AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2961
2962	CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
2963
2964	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - pEax=%#x pEbx=%#x pEcx=%#x pEdx=%#x\n",
2965	pDevIns->pReg->szName, pDevIns->iInstance, pEax, pEbx, pEcx, pEdx));
2966	}
2967
2968
2969	/**
2970	* The device helper structure for trusted devices.
2971	*/
2972	const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2973	{
2974	PDM_DEVHLPR3_VERSION,
2975	pdmR3DevHlp_IOPortRegister,
2976	pdmR3DevHlp_IOPortRegisterRC,
2977	pdmR3DevHlp_IOPortRegisterR0,
2978	pdmR3DevHlp_IOPortDeregister,
2979	pdmR3DevHlp_MMIORegister,
2980	pdmR3DevHlp_MMIORegisterRC,
2981	pdmR3DevHlp_MMIORegisterR0,
2982	pdmR3DevHlp_MMIODeregister,
2983	pdmR3DevHlp_MMIO2Register,
2984	pdmR3DevHlp_MMIO2Deregister,
2985	pdmR3DevHlp_MMIO2Map,
2986	pdmR3DevHlp_MMIO2Unmap,
2987	pdmR3DevHlp_MMHyperMapMMIO2,
2988	pdmR3DevHlp_MMIO2MapKernel,
2989	pdmR3DevHlp_ROMRegister,
2990	pdmR3DevHlp_ROMProtectShadow,
2991	pdmR3DevHlp_SSMRegister,
2992	pdmR3DevHlp_TMTimerCreate,
2993	pdmR3DevHlp_TMUtcNow,
2994	pdmR3DevHlp_PhysRead,
2995	pdmR3DevHlp_PhysWrite,
2996	pdmR3DevHlp_PhysGCPhys2CCPtr,
2997	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2998	pdmR3DevHlp_PhysReleasePageMappingLock,
2999	pdmR3DevHlp_PhysReadGCVirt,
3000	pdmR3DevHlp_PhysWriteGCVirt,
3001	pdmR3DevHlp_PhysGCPtr2GCPhys,
3002	pdmR3DevHlp_MMHeapAlloc,
3003	pdmR3DevHlp_MMHeapAllocZ,
3004	pdmR3DevHlp_MMHeapFree,
3005	pdmR3DevHlp_VMState,
3006	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3007	pdmR3DevHlp_VMSetError,
3008	pdmR3DevHlp_VMSetErrorV,
3009	pdmR3DevHlp_VMSetRuntimeError,
3010	pdmR3DevHlp_VMSetRuntimeErrorV,
3011	pdmR3DevHlp_DBGFStopV,
3012	pdmR3DevHlp_DBGFInfoRegister,
3013	pdmR3DevHlp_STAMRegister,
3014	pdmR3DevHlp_STAMRegisterF,
3015	pdmR3DevHlp_STAMRegisterV,
3016	pdmR3DevHlp_PCIRegister,
3017	pdmR3DevHlp_PCIIORegionRegister,
3018	pdmR3DevHlp_PCISetConfigCallbacks,
3019	pdmR3DevHlp_PCISetIrq,
3020	pdmR3DevHlp_PCISetIrqNoWait,
3021	pdmR3DevHlp_ISASetIrq,
3022	pdmR3DevHlp_ISASetIrqNoWait,
3023	pdmR3DevHlp_DriverAttach,
3024	pdmR3DevHlp_QueueCreate,
3025	pdmR3DevHlp_CritSectInit,
3026	pdmR3DevHlp_ThreadCreate,
3027	pdmR3DevHlp_SetAsyncNotification,
3028	pdmR3DevHlp_AsyncNotificationCompleted,
3029	pdmR3DevHlp_RTCRegister,
3030	pdmR3DevHlp_PCIBusRegister,
3031	pdmR3DevHlp_PICRegister,
3032	pdmR3DevHlp_APICRegister,
3033	pdmR3DevHlp_IOAPICRegister,
3034	pdmR3DevHlp_HPETRegister,
3035	pdmR3DevHlp_DMACRegister,
3036	pdmR3DevHlp_DMARegister,
3037	pdmR3DevHlp_DMAReadMemory,
3038	pdmR3DevHlp_DMAWriteMemory,
3039	pdmR3DevHlp_DMASetDREQ,
3040	pdmR3DevHlp_DMAGetChannelMode,
3041	pdmR3DevHlp_DMASchedule,
3042	pdmR3DevHlp_CMOSWrite,
3043	pdmR3DevHlp_CMOSRead,
3044	pdmR3DevHlp_AssertEMT,
3045	pdmR3DevHlp_AssertOther,
3046	pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3047	pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3048	pdmR3DevHlp_CallR0,
3049	0,
3050	0,
3051	0,
3052	0,
3053	0,
3054	0,
3055	0,
3056	0,
3057	0,
3058	0,
3059	pdmR3DevHlp_GetVM,
3060	pdmR3DevHlp_GetVMCPU,
3061	pdmR3DevHlp_RegisterVMMDevHeap,
3062	pdmR3DevHlp_UnregisterVMMDevHeap,
3063	pdmR3DevHlp_VMReset,
3064	pdmR3DevHlp_VMSuspend,
3065	pdmR3DevHlp_VMSuspendSaveAndPowerOff,
3066	pdmR3DevHlp_VMPowerOff,
3067	pdmR3DevHlp_A20IsEnabled,
3068	pdmR3DevHlp_A20Set,
3069	pdmR3DevHlp_GetCpuId,
3070	PDM_DEVHLPR3_VERSION /* the end */
3071	};
3072
3073
3074
3075
3076	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
3077	static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3078	{
3079	PDMDEV_ASSERT_DEVINS(pDevIns);
3080	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3081	return NULL;
3082	}
3083
3084
3085	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
3086	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3087	{
3088	PDMDEV_ASSERT_DEVINS(pDevIns);
3089	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3090	return NULL;
3091	}
3092
3093
3094	/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
3095	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3096	{
3097	PDMDEV_ASSERT_DEVINS(pDevIns);
3098	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3099	return VERR_ACCESS_DENIED;
3100	}
3101
3102
3103	/** @interface_method_impl{PDMDEVHLPR3,pfnUnregisterVMMDevHeap} */
3104	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3105	{
3106	PDMDEV_ASSERT_DEVINS(pDevIns);
3107	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3108	return VERR_ACCESS_DENIED;
3109	}
3110
3111
3112	/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3113	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3114	{
3115	PDMDEV_ASSERT_DEVINS(pDevIns);
3116	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3117	return VERR_ACCESS_DENIED;
3118	}
3119
3120
3121	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3122	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3123	{
3124	PDMDEV_ASSERT_DEVINS(pDevIns);
3125	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3126	return VERR_ACCESS_DENIED;
3127	}
3128
3129
3130	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3131	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3132	{
3133	PDMDEV_ASSERT_DEVINS(pDevIns);
3134	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3135	return VERR_ACCESS_DENIED;
3136	}
3137
3138
3139	/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3140	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3141	{
3142	PDMDEV_ASSERT_DEVINS(pDevIns);
3143	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3144	return VERR_ACCESS_DENIED;
3145	}
3146
3147
3148	/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3149	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3150	{
3151	PDMDEV_ASSERT_DEVINS(pDevIns);
3152	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3153	return false;
3154	}
3155
3156
3157	/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3158	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3159	{
3160	PDMDEV_ASSERT_DEVINS(pDevIns);
3161	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3162	NOREF(fEnable);
3163	}
3164
3165
3166	/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3167	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3168	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3169	{
3170	PDMDEV_ASSERT_DEVINS(pDevIns);
3171	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3172	}
3173
3174
3175	/**
3176	* The device helper structure for non-trusted devices.
3177	*/
3178	const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3179	{
3180	PDM_DEVHLPR3_VERSION,
3181	pdmR3DevHlp_IOPortRegister,
3182	pdmR3DevHlp_IOPortRegisterRC,
3183	pdmR3DevHlp_IOPortRegisterR0,
3184	pdmR3DevHlp_IOPortDeregister,
3185	pdmR3DevHlp_MMIORegister,
3186	pdmR3DevHlp_MMIORegisterRC,
3187	pdmR3DevHlp_MMIORegisterR0,
3188	pdmR3DevHlp_MMIODeregister,
3189	pdmR3DevHlp_MMIO2Register,
3190	pdmR3DevHlp_MMIO2Deregister,
3191	pdmR3DevHlp_MMIO2Map,
3192	pdmR3DevHlp_MMIO2Unmap,
3193	pdmR3DevHlp_MMHyperMapMMIO2,
3194	pdmR3DevHlp_MMIO2MapKernel,
3195	pdmR3DevHlp_ROMRegister,
3196	pdmR3DevHlp_ROMProtectShadow,
3197	pdmR3DevHlp_SSMRegister,
3198	pdmR3DevHlp_TMTimerCreate,
3199	pdmR3DevHlp_TMUtcNow,
3200	pdmR3DevHlp_PhysRead,
3201	pdmR3DevHlp_PhysWrite,
3202	pdmR3DevHlp_PhysGCPhys2CCPtr,
3203	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3204	pdmR3DevHlp_PhysReleasePageMappingLock,
3205	pdmR3DevHlp_PhysReadGCVirt,
3206	pdmR3DevHlp_PhysWriteGCVirt,
3207	pdmR3DevHlp_PhysGCPtr2GCPhys,
3208	pdmR3DevHlp_MMHeapAlloc,
3209	pdmR3DevHlp_MMHeapAllocZ,
3210	pdmR3DevHlp_MMHeapFree,
3211	pdmR3DevHlp_VMState,
3212	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3213	pdmR3DevHlp_VMSetError,
3214	pdmR3DevHlp_VMSetErrorV,
3215	pdmR3DevHlp_VMSetRuntimeError,
3216	pdmR3DevHlp_VMSetRuntimeErrorV,
3217	pdmR3DevHlp_DBGFStopV,
3218	pdmR3DevHlp_DBGFInfoRegister,
3219	pdmR3DevHlp_STAMRegister,
3220	pdmR3DevHlp_STAMRegisterF,
3221	pdmR3DevHlp_STAMRegisterV,
3222	pdmR3DevHlp_PCIRegister,
3223	pdmR3DevHlp_PCIIORegionRegister,
3224	pdmR3DevHlp_PCISetConfigCallbacks,
3225	pdmR3DevHlp_PCISetIrq,
3226	pdmR3DevHlp_PCISetIrqNoWait,
3227	pdmR3DevHlp_ISASetIrq,
3228	pdmR3DevHlp_ISASetIrqNoWait,
3229	pdmR3DevHlp_DriverAttach,
3230	pdmR3DevHlp_QueueCreate,
3231	pdmR3DevHlp_CritSectInit,
3232	pdmR3DevHlp_ThreadCreate,
3233	pdmR3DevHlp_SetAsyncNotification,
3234	pdmR3DevHlp_AsyncNotificationCompleted,
3235	pdmR3DevHlp_RTCRegister,
3236	pdmR3DevHlp_PCIBusRegister,
3237	pdmR3DevHlp_PICRegister,
3238	pdmR3DevHlp_APICRegister,
3239	pdmR3DevHlp_IOAPICRegister,
3240	pdmR3DevHlp_HPETRegister,
3241	pdmR3DevHlp_DMACRegister,
3242	pdmR3DevHlp_DMARegister,
3243	pdmR3DevHlp_DMAReadMemory,
3244	pdmR3DevHlp_DMAWriteMemory,
3245	pdmR3DevHlp_DMASetDREQ,
3246	pdmR3DevHlp_DMAGetChannelMode,
3247	pdmR3DevHlp_DMASchedule,
3248	pdmR3DevHlp_CMOSWrite,
3249	pdmR3DevHlp_CMOSRead,
3250	pdmR3DevHlp_AssertEMT,
3251	pdmR3DevHlp_AssertOther,
3252	pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3253	pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3254	pdmR3DevHlp_CallR0,
3255	0,
3256	0,
3257	0,
3258	0,
3259	0,
3260	0,
3261	0,
3262	0,
3263	0,
3264	0,
3265	pdmR3DevHlp_Untrusted_GetVM,
3266	pdmR3DevHlp_Untrusted_GetVMCPU,
3267	pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3268	pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3269	pdmR3DevHlp_Untrusted_VMReset,
3270	pdmR3DevHlp_Untrusted_VMSuspend,
3271	pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff,
3272	pdmR3DevHlp_Untrusted_VMPowerOff,
3273	pdmR3DevHlp_Untrusted_A20IsEnabled,
3274	pdmR3DevHlp_Untrusted_A20Set,
3275	pdmR3DevHlp_Untrusted_GetCpuId,
3276	PDM_DEVHLPR3_VERSION /* the end */
3277	};
3278
3279
3280
3281	/**
3282	* Queue consumer callback for internal component.
3283	*
3284	* @returns Success indicator.
3285	* If false the item will not be removed and the flushing will stop.
3286	* @param pVM The VM handle.
3287	* @param pItem The item to consume. Upon return this item will be freed.
3288	*/
3289	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3290	{
3291	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3292	LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3293	switch (pTask->enmOp)
3294	{
3295	case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3296	PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3297	break;
3298
3299	case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3300	pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3301	break;
3302
3303	case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3304	PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3305	break;
3306
3307	default:
3308	AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3309	break;
3310	}
3311	return true;
3312	}
3313
3314	/** @} */

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source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 32657

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