VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 14823

Last change on this file since 14823 was 13840, checked in by vboxsync, 16 years ago

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1/* $Id: PDMDevHlp.cpp 13840 2008-11-05 03:31:46Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/mm.h>
30#include <VBox/pgm.h>
31#include <VBox/iom.h>
32#include <VBox/rem.h>
33#include <VBox/dbgf.h>
34#include <VBox/vm.h>
35#include <VBox/vmm.h>
36
37#include <VBox/version.h>
38#include <VBox/log.h>
39#include <VBox/err.h>
40#include <iprt/asm.h>
41#include <iprt/assert.h>
42#include <iprt/string.h>
43#include <iprt/thread.h>
44
45
46/*******************************************************************************
47* Defined Constants And Macros *
48*******************************************************************************/
49/** Allow physical read and writes from any thread.
50 * (pdmR3DevHlp_PhysRead and pdmR3DevHlp_PhysWrite.)
51 */
52#define PDM_PHYS_READWRITE_FROM_ANY_THREAD
53
54
55/** @name R3 DevHlp
56 * @{
57 */
58
59
60/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
61static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
62 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
63{
64 PDMDEV_ASSERT_DEVINS(pDevIns);
65 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
66 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
67 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
68
69 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
70
71 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
72 return rc;
73}
74
75
76/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
77static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
78 const char *pszOut, const char *pszIn,
79 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
80{
81 PDMDEV_ASSERT_DEVINS(pDevIns);
82 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
83 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
84 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
85
86 /*
87 * Resolve the functions (one of the can be NULL).
88 */
89 int rc = VINF_SUCCESS;
90 if ( pDevIns->pDevReg->szRCMod[0]
91 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
92 {
93 RTRCPTR RCPtrIn = NIL_RTRCPTR;
94 if (pszIn)
95 {
96 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
97 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
98 }
99 RTRCPTR RCPtrOut = NIL_RTRCPTR;
100 if (pszOut && RT_SUCCESS(rc))
101 {
102 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
103 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
104 }
105 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
106 if (pszInStr && RT_SUCCESS(rc))
107 {
108 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
109 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
110 }
111 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
112 if (pszOutStr && RT_SUCCESS(rc))
113 {
114 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
115 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
116 }
117
118 if (RT_SUCCESS(rc))
119 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
120 }
121 else
122 {
123 AssertMsgFailed(("No GC module for this driver!\n"));
124 rc = VERR_INVALID_PARAMETER;
125 }
126
127 LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
128 return rc;
129}
130
131
132/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
133static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
134 const char *pszOut, const char *pszIn,
135 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
136{
137 PDMDEV_ASSERT_DEVINS(pDevIns);
138 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
139 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
140 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
141
142 /*
143 * Resolve the functions (one of the can be NULL).
144 */
145 int rc = VINF_SUCCESS;
146 if ( pDevIns->pDevReg->szR0Mod[0]
147 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
148 {
149 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
150 if (pszIn)
151 {
152 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
153 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
154 }
155 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
156 if (pszOut && RT_SUCCESS(rc))
157 {
158 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
159 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
160 }
161 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
162 if (pszInStr && RT_SUCCESS(rc))
163 {
164 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
165 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
166 }
167 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
168 if (pszOutStr && RT_SUCCESS(rc))
169 {
170 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
171 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
172 }
173
174 if (RT_SUCCESS(rc))
175 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
176 }
177 else
178 {
179 AssertMsgFailed(("No R0 module for this driver!\n"));
180 rc = VERR_INVALID_PARAMETER;
181 }
182
183 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
184 return rc;
185}
186
187
188/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
189static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
190{
191 PDMDEV_ASSERT_DEVINS(pDevIns);
192 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
193 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
194 Port, cPorts));
195
196 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
197
198 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
199 return rc;
200}
201
202
203/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
204static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
205 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
206 const char *pszDesc)
207{
208 PDMDEV_ASSERT_DEVINS(pDevIns);
209 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
210 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
211 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
212
213 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
214
215 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
216 return rc;
217}
218
219
220/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
221static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
222 const char *pszWrite, const char *pszRead, const char *pszFill,
223 const char *pszDesc)
224{
225 PDMDEV_ASSERT_DEVINS(pDevIns);
226 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
227 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
228 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
229
230 /*
231 * Resolve the functions.
232 * Not all function have to present, leave it to IOM to enforce this.
233 */
234 int rc = VINF_SUCCESS;
235 if ( pDevIns->pDevReg->szRCMod[0]
236 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
237 {
238 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
239 if (pszWrite)
240 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
241
242 RTRCPTR RCPtrRead = NIL_RTRCPTR;
243 int rc2 = VINF_SUCCESS;
244 if (pszRead)
245 rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
246
247 RTRCPTR RCPtrFill = NIL_RTRCPTR;
248 int rc3 = VINF_SUCCESS;
249 if (pszFill)
250 rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
251
252 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
253 rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
254 else
255 {
256 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
257 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
258 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
259 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
260 rc = rc2;
261 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
262 rc = rc3;
263 }
264 }
265 else
266 {
267 AssertMsgFailed(("No GC module for this driver!\n"));
268 rc = VERR_INVALID_PARAMETER;
269 }
270
271 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
272 return rc;
273}
274
275/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
276static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
277 const char *pszWrite, const char *pszRead, const char *pszFill,
278 const char *pszDesc)
279{
280 PDMDEV_ASSERT_DEVINS(pDevIns);
281 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
282 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
283 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
284
285 /*
286 * Resolve the functions.
287 * Not all function have to present, leave it to IOM to enforce this.
288 */
289 int rc = VINF_SUCCESS;
290 if ( pDevIns->pDevReg->szR0Mod[0]
291 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
292 {
293 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
294 if (pszWrite)
295 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
296 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
297 int rc2 = VINF_SUCCESS;
298 if (pszRead)
299 rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
300 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
301 int rc3 = VINF_SUCCESS;
302 if (pszFill)
303 rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
304 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
305 rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
306 else
307 {
308 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
309 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
310 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
311 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
312 rc = rc2;
313 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
314 rc = rc3;
315 }
316 }
317 else
318 {
319 AssertMsgFailed(("No R0 module for this driver!\n"));
320 rc = VERR_INVALID_PARAMETER;
321 }
322
323 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
324 return rc;
325}
326
327
328/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
329static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
330{
331 PDMDEV_ASSERT_DEVINS(pDevIns);
332 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
333 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
334 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
335
336 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
337
338 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
339 return rc;
340}
341
342
343/** @copydoc PDMDEVHLPR3::pfnROMRegister */
344static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
345{
346 PDMDEV_ASSERT_DEVINS(pDevIns);
347 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
348 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fShadow=%RTbool pszDesc=%p:{%s}\n",
349 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc, pszDesc));
350
351 int rc = MMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
352
353 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
354 return rc;
355}
356
357
358/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
359static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
360 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
361 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
362{
363 PDMDEV_ASSERT_DEVINS(pDevIns);
364 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
365 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
366 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
367
368 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pszName, u32Instance, u32Version, cbGuess,
369 pfnSavePrep, pfnSaveExec, pfnSaveDone,
370 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
371
372 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
373 return rc;
374}
375
376
377/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
378static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
379{
380 PDMDEV_ASSERT_DEVINS(pDevIns);
381 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
382 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
383 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
384
385 int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
386
387 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
388 return rc;
389}
390
391
392/** @copydoc PDMDEVHLPR3::pfnTMTimerCreateExternal */
393static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)
394{
395 PDMDEV_ASSERT_DEVINS(pDevIns);
396 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
397
398 return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMR3, enmClock, pfnCallback, pvUser, pszDesc);
399}
400
401
402/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
403static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
404{
405 PDMDEV_ASSERT_DEVINS(pDevIns);
406 PVM pVM = pDevIns->Internal.s.pVMR3;
407 VM_ASSERT_EMT(pVM);
408 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
409 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
410
411 /*
412 * Validate input.
413 */
414 if (!pPciDev)
415 {
416 Assert(pPciDev);
417 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
418 return VERR_INVALID_PARAMETER;
419 }
420 if (!pPciDev->config[0] && !pPciDev->config[1])
421 {
422 Assert(pPciDev->config[0] || pPciDev->config[1]);
423 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
424 return VERR_INVALID_PARAMETER;
425 }
426 if (pDevIns->Internal.s.pPciDeviceR3)
427 {
428 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
429 * support a PDM device with multiple PCI devices. This might become a problem
430 * when upgrading the chipset for instance because of multiple functions in some
431 * devices...
432 */
433 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
434 return VERR_INTERNAL_ERROR;
435 }
436
437 /*
438 * Choose the PCI bus for the device.
439 *
440 * This is simple. If the device was configured for a particular bus, the PCIBusNo
441 * configuration value will be set. If not the default bus is 0.
442 */
443 int rc;
444 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
445 if (!pBus)
446 {
447 uint8_t u8Bus;
448 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
449 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
450 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
451 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
452 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
453 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
454 VERR_PDM_NO_PCI_BUS);
455 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
456 }
457 if (pBus->pDevInsR3)
458 {
459 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
460 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
461 else
462 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
463
464 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
465 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
466 else
467 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
468
469 /*
470 * Check the configuration for PCI device and function assignment.
471 */
472 int iDev = -1;
473 uint8_t u8Device;
474 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
475 if (RT_SUCCESS(rc))
476 {
477 if (u8Device > 31)
478 {
479 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
480 u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
481 return VERR_INTERNAL_ERROR;
482 }
483
484 uint8_t u8Function;
485 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
486 if (RT_FAILURE(rc))
487 {
488 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
489 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
490 return rc;
491 }
492 if (u8Function > 7)
493 {
494 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
495 u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
496 return VERR_INTERNAL_ERROR;
497 }
498 iDev = (u8Device << 3) | u8Function;
499 }
500 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
501 {
502 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
503 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
504 return rc;
505 }
506
507 /*
508 * Call the pci bus device to do the actual registration.
509 */
510 pdmLock(pVM);
511 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
512 pdmUnlock(pVM);
513 if (RT_SUCCESS(rc))
514 {
515 pPciDev->pDevIns = pDevIns;
516
517 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
518 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
519 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
520 else
521 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
522
523 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
524 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
525 else
526 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
527
528 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
529 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
530 }
531 }
532 else
533 {
534 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
535 rc = VERR_PDM_NO_PCI_BUS;
536 }
537
538 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
539 return rc;
540}
541
542
543/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
544static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
545{
546 PDMDEV_ASSERT_DEVINS(pDevIns);
547 PVM pVM = pDevIns->Internal.s.pVMR3;
548 VM_ASSERT_EMT(pVM);
549 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
550 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
551
552 /*
553 * Validate input.
554 */
555 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
556 {
557 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
558 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
559 return VERR_INVALID_PARAMETER;
560 }
561 switch (enmType)
562 {
563 case PCI_ADDRESS_SPACE_MEM:
564 case PCI_ADDRESS_SPACE_IO:
565 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
566 break;
567 default:
568 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
569 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
570 return VERR_INVALID_PARAMETER;
571 }
572 if (!pfnCallback)
573 {
574 Assert(pfnCallback);
575 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
576 return VERR_INVALID_PARAMETER;
577 }
578 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
579
580 /*
581 * Must have a PCI device registered!
582 */
583 int rc;
584 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
585 if (pPciDev)
586 {
587 /*
588 * We're currently restricted to page aligned MMIO regions.
589 */
590 if ( (enmType == PCI_ADDRESS_SPACE_MEM || enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
591 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
592 {
593 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
594 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
595 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
596 }
597
598 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
599 Assert(pBus);
600 pdmLock(pVM);
601 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
602 pdmUnlock(pVM);
603 }
604 else
605 {
606 AssertMsgFailed(("No PCI device registered!\n"));
607 rc = VERR_PDM_NOT_PCI_DEVICE;
608 }
609
610 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
611 return rc;
612}
613
614
615/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
616static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
617 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
618{
619 PDMDEV_ASSERT_DEVINS(pDevIns);
620 PVM pVM = pDevIns->Internal.s.pVMR3;
621 VM_ASSERT_EMT(pVM);
622 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
623 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
624
625 /*
626 * Validate input and resolve defaults.
627 */
628 AssertPtr(pfnRead);
629 AssertPtr(pfnWrite);
630 AssertPtrNull(ppfnReadOld);
631 AssertPtrNull(ppfnWriteOld);
632 AssertPtrNull(pPciDev);
633
634 if (!pPciDev)
635 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
636 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
637 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
638 AssertRelease(pBus);
639 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
640
641 /*
642 * Do the job.
643 */
644 pdmLock(pVM);
645 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
646 pdmUnlock(pVM);
647
648 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
649}
650
651
652/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
653static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
654{
655 PDMDEV_ASSERT_DEVINS(pDevIns);
656 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
657
658 /*
659 * Validate input.
660 */
661 /** @todo iIrq and iLevel checks. */
662
663 /*
664 * Must have a PCI device registered!
665 */
666 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
667 if (pPciDev)
668 {
669 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
670 Assert(pBus);
671 PVM pVM = pDevIns->Internal.s.pVMR3;
672 pdmLock(pVM);
673 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
674 pdmUnlock(pVM);
675 }
676 else
677 AssertReleaseMsgFailed(("No PCI device registered!\n"));
678
679 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
680}
681
682
683/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
684static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
685{
686 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
687}
688
689
690/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
691static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
692{
693 PDMDEV_ASSERT_DEVINS(pDevIns);
694 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
695
696 /*
697 * Validate input.
698 */
699 /** @todo iIrq and iLevel checks. */
700
701 PVM pVM = pDevIns->Internal.s.pVMR3;
702 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
703
704 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
705}
706
707
708/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
709static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
710{
711 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
712}
713
714
715/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
716static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
717{
718 PDMDEV_ASSERT_DEVINS(pDevIns);
719 PVM pVM = pDevIns->Internal.s.pVMR3;
720 VM_ASSERT_EMT(pVM);
721 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
722 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
723
724 /*
725 * Lookup the LUN, it might already be registered.
726 */
727 PPDMLUN pLunPrev = NULL;
728 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
729 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
730 if (pLun->iLun == iLun)
731 break;
732
733 /*
734 * Create the LUN if if wasn't found, else check if driver is already attached to it.
735 */
736 if (!pLun)
737 {
738 if ( !pBaseInterface
739 || !pszDesc
740 || !*pszDesc)
741 {
742 Assert(pBaseInterface);
743 Assert(pszDesc || *pszDesc);
744 return VERR_INVALID_PARAMETER;
745 }
746
747 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
748 if (!pLun)
749 return VERR_NO_MEMORY;
750
751 pLun->iLun = iLun;
752 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
753 pLun->pTop = NULL;
754 pLun->pBottom = NULL;
755 pLun->pDevIns = pDevIns;
756 pLun->pszDesc = pszDesc;
757 pLun->pBase = pBaseInterface;
758 if (!pLunPrev)
759 pDevIns->Internal.s.pLunsR3 = pLun;
760 else
761 pLunPrev->pNext = pLun;
762 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
763 iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
764 }
765 else if (pLun->pTop)
766 {
767 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
768 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
769 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
770 }
771 Assert(pLun->pBase == pBaseInterface);
772
773
774 /*
775 * Get the attached driver configuration.
776 */
777 int rc;
778 char szNode[48];
779 RTStrPrintf(szNode, sizeof(szNode), "LUN#%d", iLun);
780 PCFGMNODE pNode = CFGMR3GetChild(pDevIns->Internal.s.pCfgHandle, szNode);
781 if (pNode)
782 {
783 char *pszName;
784 rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
785 if (RT_SUCCESS(rc))
786 {
787 /*
788 * Find the driver.
789 */
790 PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
791 if (pDrv)
792 {
793 /* config node */
794 PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
795 if (!pConfigNode)
796 rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
797 if (RT_SUCCESS(rc))
798 {
799 CFGMR3SetRestrictedRoot(pConfigNode);
800
801 /*
802 * Allocate the driver instance.
803 */
804 size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
805 cb = RT_ALIGN_Z(cb, 16);
806 PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
807 if (pNew)
808 {
809 /*
810 * Initialize the instance structure (declaration order).
811 */
812 pNew->u32Version = PDM_DRVINS_VERSION;
813 //pNew->Internal.s.pUp = NULL;
814 //pNew->Internal.s.pDown = NULL;
815 pNew->Internal.s.pLun = pLun;
816 pNew->Internal.s.pDrv = pDrv;
817 pNew->Internal.s.pVM = pVM;
818 //pNew->Internal.s.fDetaching = false;
819 pNew->Internal.s.pCfgHandle = pNode;
820 pNew->pDrvHlp = &g_pdmR3DrvHlp;
821 pNew->pDrvReg = pDrv->pDrvReg;
822 pNew->pCfgHandle = pConfigNode;
823 pNew->iInstance = pDrv->cInstances++;
824 pNew->pUpBase = pBaseInterface;
825 //pNew->pDownBase = NULL;
826 //pNew->IBase.pfnQueryInterface = NULL;
827 pNew->pvInstanceData = &pNew->achInstanceData[0];
828
829 /*
830 * Link with LUN and call the constructor.
831 */
832 pLun->pTop = pLun->pBottom = pNew;
833 rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle);
834 if (RT_SUCCESS(rc))
835 {
836 MMR3HeapFree(pszName);
837 *ppBaseInterface = &pNew->IBase;
838 Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
839 pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
840 LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
841
842 return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
843 }
844
845 /*
846 * Free the driver.
847 */
848 pLun->pTop = pLun->pBottom = NULL;
849 ASMMemFill32(pNew, cb, 0xdeadd0d0);
850 MMR3HeapFree(pNew);
851 pDrv->cInstances--;
852 }
853 else
854 {
855 AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
856 rc = VERR_NO_MEMORY;
857 }
858 }
859 else
860 AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
861 }
862 else
863 {
864 AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
865 rc = VERR_PDM_DRIVER_NOT_FOUND;
866 }
867 MMR3HeapFree(pszName);
868 }
869 else
870 {
871 AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
872 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
873 rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
874 }
875 }
876 else
877 rc = VERR_PDM_NO_ATTACHED_DRIVER;
878
879
880 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
881 return rc;
882}
883
884
885/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
886static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
887{
888 PDMDEV_ASSERT_DEVINS(pDevIns);
889 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
890
891 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
892
893 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
894 return pv;
895}
896
897
898/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
899static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
900{
901 PDMDEV_ASSERT_DEVINS(pDevIns);
902 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
903
904 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
905
906 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
907 return pv;
908}
909
910
911/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
912static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
913{
914 PDMDEV_ASSERT_DEVINS(pDevIns);
915 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
916
917 MMR3HeapFree(pv);
918
919 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
920}
921
922
923/** @copydoc PDMDEVHLPR3::pfnVMSetError */
924static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
925{
926 PDMDEV_ASSERT_DEVINS(pDevIns);
927 va_list args;
928 va_start(args, pszFormat);
929 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
930 va_end(args);
931 return rc;
932}
933
934
935/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
936static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
937{
938 PDMDEV_ASSERT_DEVINS(pDevIns);
939 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
940 return rc;
941}
942
943
944/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
945static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
946{
947 PDMDEV_ASSERT_DEVINS(pDevIns);
948 va_list args;
949 va_start(args, pszFormat);
950 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFatal, pszErrorID, pszFormat, args);
951 va_end(args);
952 return rc;
953}
954
955
956/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
957static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va)
958{
959 PDMDEV_ASSERT_DEVINS(pDevIns);
960 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFatal, pszErrorID, pszFormat, va);
961 return rc;
962}
963
964
965/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
966static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
967{
968 PDMDEV_ASSERT_DEVINS(pDevIns);
969 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
970 return true;
971
972 char szMsg[100];
973 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
974 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
975 AssertBreakpoint();
976 return false;
977}
978
979
980/** @copydoc PDMDEVHLPR3::pfnAssertOther */
981static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
982{
983 PDMDEV_ASSERT_DEVINS(pDevIns);
984 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
985 return true;
986
987 char szMsg[100];
988 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
989 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
990 AssertBreakpoint();
991 return false;
992}
993
994
995/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
996static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
997{
998 PDMDEV_ASSERT_DEVINS(pDevIns);
999#ifdef LOG_ENABLED
1000 va_list va2;
1001 va_copy(va2, args);
1002 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1003 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1004 va_end(va2);
1005#endif
1006
1007 PVM pVM = pDevIns->Internal.s.pVMR3;
1008 VM_ASSERT_EMT(pVM);
1009 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1010
1011 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1012 return rc;
1013}
1014
1015
1016/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1017static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1018{
1019 PDMDEV_ASSERT_DEVINS(pDevIns);
1020 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1021 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1022
1023 PVM pVM = pDevIns->Internal.s.pVMR3;
1024 VM_ASSERT_EMT(pVM);
1025 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1026
1027 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1028 return rc;
1029}
1030
1031
1032/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1033static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1034{
1035 PDMDEV_ASSERT_DEVINS(pDevIns);
1036 PVM pVM = pDevIns->Internal.s.pVMR3;
1037 VM_ASSERT_EMT(pVM);
1038
1039 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1040 NOREF(pVM);
1041}
1042
1043
1044
1045/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1046static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1047 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1048{
1049 PDMDEV_ASSERT_DEVINS(pDevIns);
1050 PVM pVM = pDevIns->Internal.s.pVMR3;
1051 VM_ASSERT_EMT(pVM);
1052
1053 va_list args;
1054 va_start(args, pszName);
1055 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1056 va_end(args);
1057 AssertRC(rc);
1058
1059 NOREF(pVM);
1060}
1061
1062
1063/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1064static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1065 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1066{
1067 PDMDEV_ASSERT_DEVINS(pDevIns);
1068 PVM pVM = pDevIns->Internal.s.pVMR3;
1069 VM_ASSERT_EMT(pVM);
1070
1071 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1072 AssertRC(rc);
1073
1074 NOREF(pVM);
1075}
1076
1077
1078/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1079static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1080{
1081 PDMDEV_ASSERT_DEVINS(pDevIns);
1082 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1083 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1084 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1085 pRtcReg->pfnWrite, ppRtcHlp));
1086
1087 /*
1088 * Validate input.
1089 */
1090 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1091 {
1092 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1093 PDM_RTCREG_VERSION));
1094 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1095 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1096 return VERR_INVALID_PARAMETER;
1097 }
1098 if ( !pRtcReg->pfnWrite
1099 || !pRtcReg->pfnRead)
1100 {
1101 Assert(pRtcReg->pfnWrite);
1102 Assert(pRtcReg->pfnRead);
1103 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1104 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1105 return VERR_INVALID_PARAMETER;
1106 }
1107
1108 if (!ppRtcHlp)
1109 {
1110 Assert(ppRtcHlp);
1111 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1112 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1113 return VERR_INVALID_PARAMETER;
1114 }
1115
1116 /*
1117 * Only one DMA device.
1118 */
1119 PVM pVM = pDevIns->Internal.s.pVMR3;
1120 if (pVM->pdm.s.pRtc)
1121 {
1122 AssertMsgFailed(("Only one RTC device is supported!\n"));
1123 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1124 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1125 return VERR_INVALID_PARAMETER;
1126 }
1127
1128 /*
1129 * Allocate and initialize pci bus structure.
1130 */
1131 int rc = VINF_SUCCESS;
1132 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1133 if (pRtc)
1134 {
1135 pRtc->pDevIns = pDevIns;
1136 pRtc->Reg = *pRtcReg;
1137 pVM->pdm.s.pRtc = pRtc;
1138
1139 /* set the helper pointer. */
1140 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1141 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1142 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1143 }
1144 else
1145 rc = VERR_NO_MEMORY;
1146
1147 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1148 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1149 return rc;
1150}
1151
1152
1153/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1154static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1155 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
1156{
1157 PDMDEV_ASSERT_DEVINS(pDevIns);
1158 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool ppQueue=%p\n",
1159 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
1160
1161 PVM pVM = pDevIns->Internal.s.pVMR3;
1162 VM_ASSERT_EMT(pVM);
1163 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
1164
1165 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppQueue));
1166 return rc;
1167}
1168
1169
1170/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1171static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1172{
1173 PDMDEV_ASSERT_DEVINS(pDevIns);
1174 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1175 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1176
1177 PVM pVM = pDevIns->Internal.s.pVMR3;
1178 VM_ASSERT_EMT(pVM);
1179 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1180
1181 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1182 return rc;
1183}
1184
1185
1186/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1187static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1188{
1189 PDMDEV_ASSERT_DEVINS(pDevIns);
1190 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1191 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1192
1193 pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1194
1195 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1196 return pTime;
1197}
1198
1199
1200/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1201static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1202 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1203{
1204 PDMDEV_ASSERT_DEVINS(pDevIns);
1205 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1206 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1207 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1208
1209 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1210
1211 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1212 rc, *ppThread));
1213 return rc;
1214}
1215
1216
1217/** @copydoc PDMDEVHLPR3::pfnGetVM */
1218static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1219{
1220 PDMDEV_ASSERT_DEVINS(pDevIns);
1221 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1222 return pDevIns->Internal.s.pVMR3;
1223}
1224
1225
1226/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1227static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1228{
1229 PDMDEV_ASSERT_DEVINS(pDevIns);
1230 PVM pVM = pDevIns->Internal.s.pVMR3;
1231 VM_ASSERT_EMT(pVM);
1232 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1233 ".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1234 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1235 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1236 pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1237
1238 /*
1239 * Validate the structure.
1240 */
1241 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1242 {
1243 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1244 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1245 return VERR_INVALID_PARAMETER;
1246 }
1247 if ( !pPciBusReg->pfnRegisterR3
1248 || !pPciBusReg->pfnIORegionRegisterR3
1249 || !pPciBusReg->pfnSetIrqR3
1250 || !pPciBusReg->pfnSaveExecR3
1251 || !pPciBusReg->pfnLoadExecR3
1252 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1253 {
1254 Assert(pPciBusReg->pfnRegisterR3);
1255 Assert(pPciBusReg->pfnIORegionRegisterR3);
1256 Assert(pPciBusReg->pfnSetIrqR3);
1257 Assert(pPciBusReg->pfnSaveExecR3);
1258 Assert(pPciBusReg->pfnLoadExecR3);
1259 Assert(pPciBusReg->pfnFakePCIBIOSR3);
1260 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1261 return VERR_INVALID_PARAMETER;
1262 }
1263 if ( pPciBusReg->pszSetIrqRC
1264 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
1265 {
1266 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1267 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1268 return VERR_INVALID_PARAMETER;
1269 }
1270 if ( pPciBusReg->pszSetIrqR0
1271 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
1272 {
1273 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1274 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1275 return VERR_INVALID_PARAMETER;
1276 }
1277 if (!ppPciHlpR3)
1278 {
1279 Assert(ppPciHlpR3);
1280 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1281 return VERR_INVALID_PARAMETER;
1282 }
1283
1284 /*
1285 * Find free PCI bus entry.
1286 */
1287 unsigned iBus = 0;
1288 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1289 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1290 break;
1291 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1292 {
1293 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1294 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1295 return VERR_INVALID_PARAMETER;
1296 }
1297 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1298
1299 /*
1300 * Resolve and init the RC bits.
1301 */
1302 if (pPciBusReg->pszSetIrqRC)
1303 {
1304 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1305 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1306 if (RT_FAILURE(rc))
1307 {
1308 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1309 return rc;
1310 }
1311 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1312 }
1313 else
1314 {
1315 pPciBus->pfnSetIrqRC = 0;
1316 pPciBus->pDevInsRC = 0;
1317 }
1318
1319 /*
1320 * Resolve and init the R0 bits.
1321 */
1322 if (pPciBusReg->pszSetIrqR0)
1323 {
1324 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1325 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1326 if (RT_FAILURE(rc))
1327 {
1328 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1329 return rc;
1330 }
1331 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1332 }
1333 else
1334 {
1335 pPciBus->pfnSetIrqR0 = 0;
1336 pPciBus->pDevInsR0 = 0;
1337 }
1338
1339 /*
1340 * Init the R3 bits.
1341 */
1342 pPciBus->iBus = iBus;
1343 pPciBus->pDevInsR3 = pDevIns;
1344 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1345 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1346 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1347 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1348 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1349 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1350 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1351
1352 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1353
1354 /* set the helper pointer and return. */
1355 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
1356 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1357 return VINF_SUCCESS;
1358}
1359
1360
1361/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1362static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1363{
1364 PDMDEV_ASSERT_DEVINS(pDevIns);
1365 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1366 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1367 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1368 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1369 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1370 ppPicHlpR3));
1371
1372 /*
1373 * Validate input.
1374 */
1375 if (pPicReg->u32Version != PDM_PICREG_VERSION)
1376 {
1377 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1378 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1379 return VERR_INVALID_PARAMETER;
1380 }
1381 if ( !pPicReg->pfnSetIrqR3
1382 || !pPicReg->pfnGetInterruptR3)
1383 {
1384 Assert(pPicReg->pfnSetIrqR3);
1385 Assert(pPicReg->pfnGetInterruptR3);
1386 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1387 return VERR_INVALID_PARAMETER;
1388 }
1389 if ( ( pPicReg->pszSetIrqRC
1390 || pPicReg->pszGetInterruptRC)
1391 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
1392 || !VALID_PTR(pPicReg->pszGetInterruptRC))
1393 )
1394 {
1395 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1396 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1397 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1398 return VERR_INVALID_PARAMETER;
1399 }
1400 if ( pPicReg->pszSetIrqRC
1401 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1402 {
1403 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1404 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1405 return VERR_INVALID_PARAMETER;
1406 }
1407 if ( pPicReg->pszSetIrqR0
1408 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1409 {
1410 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1411 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1412 return VERR_INVALID_PARAMETER;
1413 }
1414 if (!ppPicHlpR3)
1415 {
1416 Assert(ppPicHlpR3);
1417 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1418 return VERR_INVALID_PARAMETER;
1419 }
1420
1421 /*
1422 * Only one PIC device.
1423 */
1424 PVM pVM = pDevIns->Internal.s.pVMR3;
1425 if (pVM->pdm.s.Pic.pDevInsR3)
1426 {
1427 AssertMsgFailed(("Only one pic device is supported!\n"));
1428 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1429 return VERR_INVALID_PARAMETER;
1430 }
1431
1432 /*
1433 * RC stuff.
1434 */
1435 if (pPicReg->pszSetIrqRC)
1436 {
1437 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1438 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1439 if (RT_SUCCESS(rc))
1440 {
1441 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1442 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1443 }
1444 if (RT_FAILURE(rc))
1445 {
1446 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1447 return rc;
1448 }
1449 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1450 }
1451 else
1452 {
1453 pVM->pdm.s.Pic.pDevInsRC = 0;
1454 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1455 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1456 }
1457
1458 /*
1459 * R0 stuff.
1460 */
1461 if (pPicReg->pszSetIrqR0)
1462 {
1463 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1464 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1465 if (RT_SUCCESS(rc))
1466 {
1467 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1468 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1469 }
1470 if (RT_FAILURE(rc))
1471 {
1472 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1473 return rc;
1474 }
1475 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1476 Assert(pVM->pdm.s.Pic.pDevInsR0);
1477 }
1478 else
1479 {
1480 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1481 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1482 pVM->pdm.s.Pic.pDevInsR0 = 0;
1483 }
1484
1485 /*
1486 * R3 stuff.
1487 */
1488 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1489 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1490 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1491 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1492
1493 /* set the helper pointer and return. */
1494 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
1495 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1496 return VINF_SUCCESS;
1497}
1498
1499
1500/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1501static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1502{
1503 PDMDEV_ASSERT_DEVINS(pDevIns);
1504 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1505 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1506 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1507 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}} ppApicHlpR3=%p\n",
1508 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1509 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pszGetInterruptRC,
1510 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1511 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1512 pApicReg->pszBusDeliverRC, ppApicHlpR3));
1513
1514 /*
1515 * Validate input.
1516 */
1517 if (pApicReg->u32Version != PDM_APICREG_VERSION)
1518 {
1519 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1520 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1521 return VERR_INVALID_PARAMETER;
1522 }
1523 if ( !pApicReg->pfnGetInterruptR3
1524 || !pApicReg->pfnHasPendingIrqR3
1525 || !pApicReg->pfnSetBaseR3
1526 || !pApicReg->pfnGetBaseR3
1527 || !pApicReg->pfnSetTPRR3
1528 || !pApicReg->pfnGetTPRR3
1529 || !pApicReg->pfnWriteMSRR3
1530 || !pApicReg->pfnReadMSRR3
1531 || !pApicReg->pfnBusDeliverR3)
1532 {
1533 Assert(pApicReg->pfnGetInterruptR3);
1534 Assert(pApicReg->pfnHasPendingIrqR3);
1535 Assert(pApicReg->pfnSetBaseR3);
1536 Assert(pApicReg->pfnGetBaseR3);
1537 Assert(pApicReg->pfnSetTPRR3);
1538 Assert(pApicReg->pfnGetTPRR3);
1539 Assert(pApicReg->pfnWriteMSRR3);
1540 Assert(pApicReg->pfnReadMSRR3);
1541 Assert(pApicReg->pfnBusDeliverR3);
1542 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1543 return VERR_INVALID_PARAMETER;
1544 }
1545 if ( ( pApicReg->pszGetInterruptRC
1546 || pApicReg->pszHasPendingIrqRC
1547 || pApicReg->pszSetBaseRC
1548 || pApicReg->pszGetBaseRC
1549 || pApicReg->pszSetTPRRC
1550 || pApicReg->pszGetTPRRC
1551 || pApicReg->pszWriteMSRRC
1552 || pApicReg->pszReadMSRRC
1553 || pApicReg->pszBusDeliverRC)
1554 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1555 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1556 || !VALID_PTR(pApicReg->pszSetBaseRC)
1557 || !VALID_PTR(pApicReg->pszGetBaseRC)
1558 || !VALID_PTR(pApicReg->pszSetTPRRC)
1559 || !VALID_PTR(pApicReg->pszGetTPRRC)
1560 || !VALID_PTR(pApicReg->pszWriteMSRRC)
1561 || !VALID_PTR(pApicReg->pszReadMSRRC)
1562 || !VALID_PTR(pApicReg->pszBusDeliverRC))
1563 )
1564 {
1565 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1566 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1567 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1568 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1569 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1570 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1571 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1572 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1573 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1574 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1575 return VERR_INVALID_PARAMETER;
1576 }
1577 if ( ( pApicReg->pszGetInterruptR0
1578 || pApicReg->pszHasPendingIrqR0
1579 || pApicReg->pszSetBaseR0
1580 || pApicReg->pszGetBaseR0
1581 || pApicReg->pszSetTPRR0
1582 || pApicReg->pszGetTPRR0
1583 || pApicReg->pszWriteMSRR0
1584 || pApicReg->pszReadMSRR0
1585 || pApicReg->pszBusDeliverR0)
1586 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1587 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1588 || !VALID_PTR(pApicReg->pszSetBaseR0)
1589 || !VALID_PTR(pApicReg->pszGetBaseR0)
1590 || !VALID_PTR(pApicReg->pszSetTPRR0)
1591 || !VALID_PTR(pApicReg->pszGetTPRR0)
1592 || !VALID_PTR(pApicReg->pszReadMSRR0)
1593 || !VALID_PTR(pApicReg->pszWriteMSRR0)
1594 || !VALID_PTR(pApicReg->pszBusDeliverR0))
1595 )
1596 {
1597 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1598 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1599 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1600 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1601 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1602 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1603 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1604 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1605 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1606 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1607 return VERR_INVALID_PARAMETER;
1608 }
1609 if (!ppApicHlpR3)
1610 {
1611 Assert(ppApicHlpR3);
1612 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1613 return VERR_INVALID_PARAMETER;
1614 }
1615
1616 /*
1617 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
1618 * as they need to communicate and share state easily.
1619 */
1620 PVM pVM = pDevIns->Internal.s.pVMR3;
1621 if (pVM->pdm.s.Apic.pDevInsR3)
1622 {
1623 AssertMsgFailed(("Only one apic device is supported!\n"));
1624 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1625 return VERR_INVALID_PARAMETER;
1626 }
1627
1628 /*
1629 * Resolve & initialize the RC bits.
1630 */
1631 if (pApicReg->pszGetInterruptRC)
1632 {
1633 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1634 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1635 if (RT_SUCCESS(rc))
1636 {
1637 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1638 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1639 }
1640 if (RT_SUCCESS(rc))
1641 {
1642 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1643 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1644 }
1645 if (RT_SUCCESS(rc))
1646 {
1647 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1648 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1649 }
1650 if (RT_SUCCESS(rc))
1651 {
1652 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1653 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1654 }
1655 if (RT_SUCCESS(rc))
1656 {
1657 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1658 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1659 }
1660 if (RT_SUCCESS(rc))
1661 {
1662 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1663 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1664 }
1665 if (RT_SUCCESS(rc))
1666 {
1667 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1668 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1669 }
1670 if (RT_SUCCESS(rc))
1671 {
1672 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1673 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1674 }
1675 if (RT_FAILURE(rc))
1676 {
1677 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1678 return rc;
1679 }
1680 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1681 }
1682 else
1683 {
1684 pVM->pdm.s.Apic.pDevInsRC = 0;
1685 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1686 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1687 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1688 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1689 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1690 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1691 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1692 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1693 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1694 }
1695
1696 /*
1697 * Resolve & initialize the R0 bits.
1698 */
1699 if (pApicReg->pszGetInterruptR0)
1700 {
1701 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1702 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1703 if (RT_SUCCESS(rc))
1704 {
1705 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1706 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1707 }
1708 if (RT_SUCCESS(rc))
1709 {
1710 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1711 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1712 }
1713 if (RT_SUCCESS(rc))
1714 {
1715 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1716 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1717 }
1718 if (RT_SUCCESS(rc))
1719 {
1720 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1721 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1722 }
1723 if (RT_SUCCESS(rc))
1724 {
1725 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1726 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1727 }
1728 if (RT_SUCCESS(rc))
1729 {
1730 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1731 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1732 }
1733 if (RT_SUCCESS(rc))
1734 {
1735 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1736 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1737 }
1738 if (RT_SUCCESS(rc))
1739 {
1740 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1741 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1742 }
1743 if (RT_FAILURE(rc))
1744 {
1745 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1746 return rc;
1747 }
1748 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1749 Assert(pVM->pdm.s.Apic.pDevInsR0);
1750 }
1751 else
1752 {
1753 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1754 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1755 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1756 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1757 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1758 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1759 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1760 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1761 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1762 pVM->pdm.s.Apic.pDevInsR0 = 0;
1763 }
1764
1765 /*
1766 * Initialize the HC bits.
1767 */
1768 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1769 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1770 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1771 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1772 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1773 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1774 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1775 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1776 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1777 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1778 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1779
1780 /* set the helper pointer and return. */
1781 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
1782 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1783 return VINF_SUCCESS;
1784}
1785
1786
1787/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1788static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1789{
1790 PDMDEV_ASSERT_DEVINS(pDevIns);
1791 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1792 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1793 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1794 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1795
1796 /*
1797 * Validate input.
1798 */
1799 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1800 {
1801 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1802 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1803 return VERR_INVALID_PARAMETER;
1804 }
1805 if (!pIoApicReg->pfnSetIrqR3)
1806 {
1807 Assert(pIoApicReg->pfnSetIrqR3);
1808 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1809 return VERR_INVALID_PARAMETER;
1810 }
1811 if ( pIoApicReg->pszSetIrqRC
1812 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
1813 {
1814 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1815 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1816 return VERR_INVALID_PARAMETER;
1817 }
1818 if ( pIoApicReg->pszSetIrqR0
1819 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
1820 {
1821 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1822 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1823 return VERR_INVALID_PARAMETER;
1824 }
1825 if (!ppIoApicHlpR3)
1826 {
1827 Assert(ppIoApicHlpR3);
1828 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1829 return VERR_INVALID_PARAMETER;
1830 }
1831
1832 /*
1833 * The I/O APIC requires the APIC to be present (hacks++).
1834 * If the I/O APIC does GC stuff so must the APIC.
1835 */
1836 PVM pVM = pDevIns->Internal.s.pVMR3;
1837 if (!pVM->pdm.s.Apic.pDevInsR3)
1838 {
1839 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1840 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1841 return VERR_INVALID_PARAMETER;
1842 }
1843 if ( pIoApicReg->pszSetIrqRC
1844 && !pVM->pdm.s.Apic.pDevInsRC)
1845 {
1846 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1847 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1848 return VERR_INVALID_PARAMETER;
1849 }
1850
1851 /*
1852 * Only one I/O APIC device.
1853 */
1854 if (pVM->pdm.s.IoApic.pDevInsR3)
1855 {
1856 AssertMsgFailed(("Only one ioapic device is supported!\n"));
1857 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1858 return VERR_INVALID_PARAMETER;
1859 }
1860
1861 /*
1862 * Resolve & initialize the GC bits.
1863 */
1864 if (pIoApicReg->pszSetIrqRC)
1865 {
1866 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
1867 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
1868 if (RT_FAILURE(rc))
1869 {
1870 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1871 return rc;
1872 }
1873 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1874 }
1875 else
1876 {
1877 pVM->pdm.s.IoApic.pDevInsRC = 0;
1878 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
1879 }
1880
1881 /*
1882 * Resolve & initialize the R0 bits.
1883 */
1884 if (pIoApicReg->pszSetIrqR0)
1885 {
1886 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
1887 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
1888 if (RT_FAILURE(rc))
1889 {
1890 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1891 return rc;
1892 }
1893 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1894 Assert(pVM->pdm.s.IoApic.pDevInsR0);
1895 }
1896 else
1897 {
1898 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
1899 pVM->pdm.s.IoApic.pDevInsR0 = 0;
1900 }
1901
1902 /*
1903 * Initialize the R3 bits.
1904 */
1905 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
1906 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
1907 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1908
1909 /* set the helper pointer and return. */
1910 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
1911 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1912 return VINF_SUCCESS;
1913}
1914
1915
1916/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
1917static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
1918{
1919 PDMDEV_ASSERT_DEVINS(pDevIns);
1920 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1921 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
1922 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
1923 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
1924
1925 /*
1926 * Validate input.
1927 */
1928 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
1929 {
1930 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
1931 PDM_DMACREG_VERSION));
1932 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
1933 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1934 return VERR_INVALID_PARAMETER;
1935 }
1936 if ( !pDmacReg->pfnRun
1937 || !pDmacReg->pfnRegister
1938 || !pDmacReg->pfnReadMemory
1939 || !pDmacReg->pfnWriteMemory
1940 || !pDmacReg->pfnSetDREQ
1941 || !pDmacReg->pfnGetChannelMode)
1942 {
1943 Assert(pDmacReg->pfnRun);
1944 Assert(pDmacReg->pfnRegister);
1945 Assert(pDmacReg->pfnReadMemory);
1946 Assert(pDmacReg->pfnWriteMemory);
1947 Assert(pDmacReg->pfnSetDREQ);
1948 Assert(pDmacReg->pfnGetChannelMode);
1949 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1950 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1951 return VERR_INVALID_PARAMETER;
1952 }
1953
1954 if (!ppDmacHlp)
1955 {
1956 Assert(ppDmacHlp);
1957 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
1958 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1959 return VERR_INVALID_PARAMETER;
1960 }
1961
1962 /*
1963 * Only one DMA device.
1964 */
1965 PVM pVM = pDevIns->Internal.s.pVMR3;
1966 if (pVM->pdm.s.pDmac)
1967 {
1968 AssertMsgFailed(("Only one DMA device is supported!\n"));
1969 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
1970 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1971 return VERR_INVALID_PARAMETER;
1972 }
1973
1974 /*
1975 * Allocate and initialize pci bus structure.
1976 */
1977 int rc = VINF_SUCCESS;
1978 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
1979 if (pDmac)
1980 {
1981 pDmac->pDevIns = pDevIns;
1982 pDmac->Reg = *pDmacReg;
1983 pVM->pdm.s.pDmac = pDmac;
1984
1985 /* set the helper pointer. */
1986 *ppDmacHlp = &g_pdmR3DevDmacHlp;
1987 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
1988 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1989 }
1990 else
1991 rc = VERR_NO_MEMORY;
1992
1993 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
1994 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1995 return rc;
1996}
1997
1998
1999/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2000static DECLCALLBACK(void) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2001{
2002 PDMDEV_ASSERT_DEVINS(pDevIns);
2003 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2004 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2005
2006 /*
2007 * For the convenience of the device we put no thread restriction on this interface.
2008 * That means we'll have to check which thread we're in and choose our path.
2009 */
2010#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
2011 PGMPhysRead(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
2012#else
2013 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMR3))
2014 PGMPhysRead(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
2015 else
2016 {
2017 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2018 PVMREQ pReq;
2019 AssertCompileSize(RTGCPHYS, 4);
2020 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMR3, &pReq, RT_INDEFINITE_WAIT,
2021 (PFNRT)PGMPhysRead, 4, pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
2022 while (rc == VERR_TIMEOUT)
2023 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
2024 AssertReleaseRC(rc);
2025 VMR3ReqFree(pReq);
2026 }
2027#endif
2028 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2029}
2030
2031
2032/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2033static DECLCALLBACK(void) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2034{
2035 PDMDEV_ASSERT_DEVINS(pDevIns);
2036 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2037 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2038
2039 /*
2040 * For the convenience of the device we put no thread restriction on this interface.
2041 * That means we'll have to check which thread we're in and choose our path.
2042 */
2043#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
2044 PGMPhysWrite(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
2045#else
2046 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMR3))
2047 PGMPhysWrite(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
2048 else
2049 {
2050 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2051 PVMREQ pReq;
2052 AssertCompileSize(RTGCPHYS, 4);
2053 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMR3, &pReq, RT_INDEFINITE_WAIT,
2054 (PFNRT)PGMPhysWrite, 4, pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
2055 while (rc == VERR_TIMEOUT)
2056 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
2057 AssertReleaseRC(rc);
2058 VMR3ReqFree(pReq);
2059 }
2060#endif
2061 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2062}
2063
2064
2065/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2066static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2067{
2068 PDMDEV_ASSERT_DEVINS(pDevIns);
2069 PVM pVM = pDevIns->Internal.s.pVMR3;
2070 VM_ASSERT_EMT(pVM);
2071 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2072 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2073
2074 if (!VM_IS_EMT(pVM))
2075 return VERR_ACCESS_DENIED;
2076
2077 int rc = PGMPhysSimpleReadGCPtr(pVM, pvDst, GCVirtSrc, cb);
2078
2079 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2080
2081 return rc;
2082}
2083
2084
2085/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2086static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2087{
2088 PDMDEV_ASSERT_DEVINS(pDevIns);
2089 PVM pVM = pDevIns->Internal.s.pVMR3;
2090 VM_ASSERT_EMT(pVM);
2091 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2092 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2093
2094 if (!VM_IS_EMT(pVM))
2095 return VERR_ACCESS_DENIED;
2096
2097 int rc = PGMPhysSimpleWriteGCPtr(pVM, GCVirtDst, pvSrc, cb);
2098
2099 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2100
2101 return rc;
2102}
2103
2104
2105/** @copydoc PDMDEVHLPR3::pfnPhysReserve */
2106static DECLCALLBACK(int) pdmR3DevHlp_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
2107{
2108 PDMDEV_ASSERT_DEVINS(pDevIns);
2109 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2110 LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: GCPhys=%RGp cbRange=%#x pszDesc=%p:{%s}\n",
2111 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, cbRange, pszDesc, pszDesc));
2112
2113 int rc = MMR3PhysReserve(pDevIns->Internal.s.pVMR3, GCPhys, cbRange, pszDesc);
2114
2115 LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2116
2117 return rc;
2118}
2119
2120
2121/** @copydoc PDMDEVHLPR3::pfnObsoletePhys2HCVirt */
2122static DECLCALLBACK(int) pdmR3DevHlp_Obsolete_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
2123{
2124 PDMDEV_ASSERT_DEVINS(pDevIns);
2125 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2126 NOREF(GCPhys);
2127 NOREF(cbRange);
2128 NOREF(ppvHC);
2129 return VERR_ACCESS_DENIED;
2130}
2131
2132
2133/** @copydoc PDMDEVHLPR3::pfnObsoletePhysGCPtr2HCPtr */
2134static DECLCALLBACK(int) pdmR3DevHlp_Obsolete_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
2135{
2136 PDMDEV_ASSERT_DEVINS(pDevIns);
2137 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2138 NOREF(GCPtr);
2139 NOREF(pHCPtr);
2140 return VERR_ACCESS_DENIED;
2141}
2142
2143
2144/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2145static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2146{
2147 PDMDEV_ASSERT_DEVINS(pDevIns);
2148 PVM pVM = pDevIns->Internal.s.pVMR3;
2149 VM_ASSERT_EMT(pVM);
2150 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2151 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2152
2153 if (!VM_IS_EMT(pVM))
2154 return VERR_ACCESS_DENIED;
2155
2156 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, pGCPhys);
2157
2158 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pGCPhys));
2159
2160 return rc;
2161}
2162
2163
2164/** @copydoc PDMDEVHLPR3::pfnVMState */
2165static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
2166{
2167 PDMDEV_ASSERT_DEVINS(pDevIns);
2168
2169 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2170
2171 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2172 enmVMState, VMR3GetStateName(enmVMState)));
2173 return enmVMState;
2174}
2175
2176
2177/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2178static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2179{
2180 PDMDEV_ASSERT_DEVINS(pDevIns);
2181 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2182
2183 bool fRc = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMR3);
2184
2185 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2186 return fRc;
2187}
2188
2189
2190/** @copydoc PDMDEVHLPR3::pfnA20Set */
2191static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2192{
2193 PDMDEV_ASSERT_DEVINS(pDevIns);
2194 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2195 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2196 //Assert(*(unsigned *)&fEnable <= 1);
2197 PGMR3PhysSetA20(pDevIns->Internal.s.pVMR3, fEnable);
2198}
2199
2200
2201/** @copydoc PDMDEVHLPR3::pfnVMReset */
2202static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2203{
2204 PDMDEV_ASSERT_DEVINS(pDevIns);
2205 PVM pVM = pDevIns->Internal.s.pVMR3;
2206 VM_ASSERT_EMT(pVM);
2207 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2208 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2209
2210 /*
2211 * We postpone this operation because we're likely to be inside a I/O instruction
2212 * and the EIP will be updated when we return.
2213 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2214 */
2215 bool fHaltOnReset;
2216 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2217 if (RT_SUCCESS(rc) && fHaltOnReset)
2218 {
2219 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2220 rc = VINF_EM_HALT;
2221 }
2222 else
2223 {
2224 VM_FF_SET(pVM, VM_FF_RESET);
2225 rc = VINF_EM_RESET;
2226 }
2227
2228 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2229 return rc;
2230}
2231
2232
2233/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2234static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2235{
2236 PDMDEV_ASSERT_DEVINS(pDevIns);
2237 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2238 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2239 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2240
2241 int rc = VMR3Suspend(pDevIns->Internal.s.pVMR3);
2242
2243 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2244 return rc;
2245}
2246
2247
2248/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2249static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2250{
2251 PDMDEV_ASSERT_DEVINS(pDevIns);
2252 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2253 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2254 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2255
2256 int rc = VMR3PowerOff(pDevIns->Internal.s.pVMR3);
2257
2258 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2259 return rc;
2260}
2261
2262
2263/** @copydoc PDMDEVHLPR3::pfnLockVM */
2264static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns)
2265{
2266 return VMMR3Lock(pDevIns->Internal.s.pVMR3);
2267}
2268
2269
2270/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2271static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns)
2272{
2273 return VMMR3Unlock(pDevIns->Internal.s.pVMR3);
2274}
2275
2276
2277/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
2278static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2279{
2280 PVM pVM = pDevIns->Internal.s.pVMR3;
2281 if (VMMR3LockIsOwner(pVM))
2282 return true;
2283
2284 RTNATIVETHREAD NativeThreadOwner = VMMR3LockGetOwner(pVM);
2285 RTTHREAD ThreadOwner = RTThreadFromNative(NativeThreadOwner);
2286 char szMsg[100];
2287 RTStrPrintf(szMsg, sizeof(szMsg), "AssertVMLocked '%s'/%d ThreadOwner=%RTnthrd/%RTthrd/'%s' Self='%s'\n",
2288 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2289 NativeThreadOwner, ThreadOwner, RTThreadGetName(ThreadOwner), RTThreadSelfName());
2290 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2291 AssertBreakpoint();
2292 return false;
2293}
2294
2295/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2296static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2297{
2298 PDMDEV_ASSERT_DEVINS(pDevIns);
2299 PVM pVM = pDevIns->Internal.s.pVMR3;
2300 VM_ASSERT_EMT(pVM);
2301 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2302 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2303 int rc = VINF_SUCCESS;
2304 if (pVM->pdm.s.pDmac)
2305 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2306 else
2307 {
2308 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2309 rc = VERR_PDM_NO_DMAC_INSTANCE;
2310 }
2311 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2312 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2313 return rc;
2314}
2315
2316/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2317static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
2318{
2319 PDMDEV_ASSERT_DEVINS(pDevIns);
2320 PVM pVM = pDevIns->Internal.s.pVMR3;
2321 VM_ASSERT_EMT(pVM);
2322 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2323 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2324 int rc = VINF_SUCCESS;
2325 if (pVM->pdm.s.pDmac)
2326 {
2327 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2328 if (pcbRead)
2329 *pcbRead = cb;
2330 }
2331 else
2332 {
2333 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2334 rc = VERR_PDM_NO_DMAC_INSTANCE;
2335 }
2336 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2337 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2338 return rc;
2339}
2340
2341/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2342static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
2343{
2344 PDMDEV_ASSERT_DEVINS(pDevIns);
2345 PVM pVM = pDevIns->Internal.s.pVMR3;
2346 VM_ASSERT_EMT(pVM);
2347 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2348 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2349 int rc = VINF_SUCCESS;
2350 if (pVM->pdm.s.pDmac)
2351 {
2352 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2353 if (pcbWritten)
2354 *pcbWritten = cb;
2355 }
2356 else
2357 {
2358 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2359 rc = VERR_PDM_NO_DMAC_INSTANCE;
2360 }
2361 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2362 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2363 return rc;
2364}
2365
2366/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2367static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2368{
2369 PDMDEV_ASSERT_DEVINS(pDevIns);
2370 PVM pVM = pDevIns->Internal.s.pVMR3;
2371 VM_ASSERT_EMT(pVM);
2372 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2373 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2374 int rc = VINF_SUCCESS;
2375 if (pVM->pdm.s.pDmac)
2376 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2377 else
2378 {
2379 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2380 rc = VERR_PDM_NO_DMAC_INSTANCE;
2381 }
2382 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2383 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2384 return rc;
2385}
2386
2387/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2388static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2389{
2390 PDMDEV_ASSERT_DEVINS(pDevIns);
2391 PVM pVM = pDevIns->Internal.s.pVMR3;
2392 VM_ASSERT_EMT(pVM);
2393 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2394 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2395 uint8_t u8Mode;
2396 if (pVM->pdm.s.pDmac)
2397 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2398 else
2399 {
2400 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2401 u8Mode = 3 << 2 /* illegal mode type */;
2402 }
2403 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2404 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2405 return u8Mode;
2406}
2407
2408/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2409static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2410{
2411 PDMDEV_ASSERT_DEVINS(pDevIns);
2412 PVM pVM = pDevIns->Internal.s.pVMR3;
2413 VM_ASSERT_EMT(pVM);
2414 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2415 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2416
2417 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2418 VM_FF_SET(pVM, VM_FF_PDM_DMA);
2419 REMR3NotifyDmaPending(pVM);
2420 VMR3NotifyFF(pVM, true);
2421}
2422
2423
2424/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2425static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2426{
2427 PDMDEV_ASSERT_DEVINS(pDevIns);
2428 PVM pVM = pDevIns->Internal.s.pVMR3;
2429 VM_ASSERT_EMT(pVM);
2430
2431 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2432 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2433 int rc;
2434 if (pVM->pdm.s.pRtc)
2435 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2436 else
2437 rc = VERR_PDM_NO_RTC_INSTANCE;
2438
2439 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2440 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2441 return rc;
2442}
2443
2444
2445/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2446static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2447{
2448 PDMDEV_ASSERT_DEVINS(pDevIns);
2449 PVM pVM = pDevIns->Internal.s.pVMR3;
2450 VM_ASSERT_EMT(pVM);
2451
2452 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2453 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2454 int rc;
2455 if (pVM->pdm.s.pRtc)
2456 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2457 else
2458 rc = VERR_PDM_NO_RTC_INSTANCE;
2459
2460 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2461 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2462 return rc;
2463}
2464
2465
2466/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2467static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2468 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
2469{
2470 PDMDEV_ASSERT_DEVINS(pDevIns);
2471 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2472 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2473 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2474
2475 CPUMGetGuestCpuId(pDevIns->Internal.s.pVMR3, iLeaf, pEax, pEbx, pEcx, pEdx);
2476
2477 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
2478 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
2479}
2480
2481
2482/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2483static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
2484{
2485 PDMDEV_ASSERT_DEVINS(pDevIns);
2486 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
2487 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
2488
2489 int rc = MMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange);
2490
2491 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2492 return rc;
2493}
2494
2495
2496/**
2497 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
2498 */
2499static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
2500{
2501 PDMDEV_ASSERT_DEVINS(pDevIns);
2502 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2503 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2504 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2505
2506 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2507
2508 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2509 return rc;
2510}
2511
2512
2513/**
2514 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2515 */
2516static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2517{
2518 PDMDEV_ASSERT_DEVINS(pDevIns);
2519 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2520 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=#x\n",
2521 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2522
2523 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2524
2525 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2526
2527 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2528 return rc;
2529}
2530
2531
2532/**
2533 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
2534 */
2535static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2536{
2537 PDMDEV_ASSERT_DEVINS(pDevIns);
2538 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2539 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2540 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2541
2542 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2543
2544 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2545 return rc;
2546}
2547
2548
2549/**
2550 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2551 */
2552static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2553{
2554 PDMDEV_ASSERT_DEVINS(pDevIns);
2555 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2556 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2557 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2558
2559 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2560
2561 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2562 return rc;
2563}
2564
2565
2566/**
2567 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2568 */
2569static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2570 const char *pszDesc, PRTRCPTR pRCPtr)
2571{
2572 PDMDEV_ASSERT_DEVINS(pDevIns);
2573 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2574 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2575 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2576
2577 int rc = MMR3HyperMapMMIO2(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2578
2579 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pRCPtr));
2580 return rc;
2581}
2582
2583
2584/**
2585 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2586 */
2587static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2588{
2589 PDMDEV_ASSERT_DEVINS(pDevIns);
2590 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2591
2592 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2593 return rc;
2594}
2595
2596
2597/**
2598 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2599 */
2600static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2601{
2602 PDMDEV_ASSERT_DEVINS(pDevIns);
2603 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2604
2605 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2606 return rc;
2607}
2608
2609
2610/**
2611 * The device helper structure for trusted devices.
2612 */
2613const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2614{
2615 PDM_DEVHLP_VERSION,
2616 pdmR3DevHlp_IOPortRegister,
2617 pdmR3DevHlp_IOPortRegisterGC,
2618 pdmR3DevHlp_IOPortRegisterR0,
2619 pdmR3DevHlp_IOPortDeregister,
2620 pdmR3DevHlp_MMIORegister,
2621 pdmR3DevHlp_MMIORegisterGC,
2622 pdmR3DevHlp_MMIORegisterR0,
2623 pdmR3DevHlp_MMIODeregister,
2624 pdmR3DevHlp_ROMRegister,
2625 pdmR3DevHlp_SSMRegister,
2626 pdmR3DevHlp_TMTimerCreate,
2627 pdmR3DevHlp_TMTimerCreateExternal,
2628 pdmR3DevHlp_PCIRegister,
2629 pdmR3DevHlp_PCIIORegionRegister,
2630 pdmR3DevHlp_PCISetConfigCallbacks,
2631 pdmR3DevHlp_PCISetIrq,
2632 pdmR3DevHlp_PCISetIrqNoWait,
2633 pdmR3DevHlp_ISASetIrq,
2634 pdmR3DevHlp_ISASetIrqNoWait,
2635 pdmR3DevHlp_DriverAttach,
2636 pdmR3DevHlp_MMHeapAlloc,
2637 pdmR3DevHlp_MMHeapAllocZ,
2638 pdmR3DevHlp_MMHeapFree,
2639 pdmR3DevHlp_VMSetError,
2640 pdmR3DevHlp_VMSetErrorV,
2641 pdmR3DevHlp_VMSetRuntimeError,
2642 pdmR3DevHlp_VMSetRuntimeErrorV,
2643 pdmR3DevHlp_AssertEMT,
2644 pdmR3DevHlp_AssertOther,
2645 pdmR3DevHlp_DBGFStopV,
2646 pdmR3DevHlp_DBGFInfoRegister,
2647 pdmR3DevHlp_STAMRegister,
2648 pdmR3DevHlp_STAMRegisterF,
2649 pdmR3DevHlp_STAMRegisterV,
2650 pdmR3DevHlp_RTCRegister,
2651 pdmR3DevHlp_PDMQueueCreate,
2652 pdmR3DevHlp_CritSectInit,
2653 pdmR3DevHlp_UTCNow,
2654 pdmR3DevHlp_PDMThreadCreate,
2655 pdmR3DevHlp_PhysGCPtr2GCPhys,
2656 pdmR3DevHlp_VMState,
2657 0,
2658 0,
2659 0,
2660 0,
2661 0,
2662 0,
2663 0,
2664 pdmR3DevHlp_GetVM,
2665 pdmR3DevHlp_PCIBusRegister,
2666 pdmR3DevHlp_PICRegister,
2667 pdmR3DevHlp_APICRegister,
2668 pdmR3DevHlp_IOAPICRegister,
2669 pdmR3DevHlp_DMACRegister,
2670 pdmR3DevHlp_PhysRead,
2671 pdmR3DevHlp_PhysWrite,
2672 pdmR3DevHlp_PhysReadGCVirt,
2673 pdmR3DevHlp_PhysWriteGCVirt,
2674 pdmR3DevHlp_PhysReserve,
2675 pdmR3DevHlp_Obsolete_Phys2HCVirt,
2676 pdmR3DevHlp_Obsolete_PhysGCPtr2HCPtr,
2677 pdmR3DevHlp_A20IsEnabled,
2678 pdmR3DevHlp_A20Set,
2679 pdmR3DevHlp_VMReset,
2680 pdmR3DevHlp_VMSuspend,
2681 pdmR3DevHlp_VMPowerOff,
2682 pdmR3DevHlp_LockVM,
2683 pdmR3DevHlp_UnlockVM,
2684 pdmR3DevHlp_AssertVMLock,
2685 pdmR3DevHlp_DMARegister,
2686 pdmR3DevHlp_DMAReadMemory,
2687 pdmR3DevHlp_DMAWriteMemory,
2688 pdmR3DevHlp_DMASetDREQ,
2689 pdmR3DevHlp_DMAGetChannelMode,
2690 pdmR3DevHlp_DMASchedule,
2691 pdmR3DevHlp_CMOSWrite,
2692 pdmR3DevHlp_CMOSRead,
2693 pdmR3DevHlp_GetCpuId,
2694 pdmR3DevHlp_ROMProtectShadow,
2695 pdmR3DevHlp_MMIO2Register,
2696 pdmR3DevHlp_MMIO2Deregister,
2697 pdmR3DevHlp_MMIO2Map,
2698 pdmR3DevHlp_MMIO2Unmap,
2699 pdmR3DevHlp_MMHyperMapMMIO2,
2700 pdmR3DevHlp_RegisterVMMDevHeap,
2701 pdmR3DevHlp_UnregisterVMMDevHeap,
2702 PDM_DEVHLP_VERSION /* the end */
2703};
2704
2705
2706
2707
2708/** @copydoc PDMDEVHLPR3::pfnGetVM */
2709static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2710{
2711 PDMDEV_ASSERT_DEVINS(pDevIns);
2712 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2713 return NULL;
2714}
2715
2716
2717/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2718static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2719{
2720 PDMDEV_ASSERT_DEVINS(pDevIns);
2721 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2722 NOREF(pPciBusReg);
2723 NOREF(ppPciHlpR3);
2724 return VERR_ACCESS_DENIED;
2725}
2726
2727
2728/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2729static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2730{
2731 PDMDEV_ASSERT_DEVINS(pDevIns);
2732 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2733 NOREF(pPicReg);
2734 NOREF(ppPicHlpR3);
2735 return VERR_ACCESS_DENIED;
2736}
2737
2738
2739/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2740static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2741{
2742 PDMDEV_ASSERT_DEVINS(pDevIns);
2743 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2744 NOREF(pApicReg);
2745 NOREF(ppApicHlpR3);
2746 return VERR_ACCESS_DENIED;
2747}
2748
2749
2750/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2751static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2752{
2753 PDMDEV_ASSERT_DEVINS(pDevIns);
2754 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2755 NOREF(pIoApicReg);
2756 NOREF(ppIoApicHlpR3);
2757 return VERR_ACCESS_DENIED;
2758}
2759
2760
2761/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2762static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2763{
2764 PDMDEV_ASSERT_DEVINS(pDevIns);
2765 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2766 NOREF(pDmacReg);
2767 NOREF(ppDmacHlp);
2768 return VERR_ACCESS_DENIED;
2769}
2770
2771
2772/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2773static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2774{
2775 PDMDEV_ASSERT_DEVINS(pDevIns);
2776 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2777 NOREF(GCPhys);
2778 NOREF(pvBuf);
2779 NOREF(cbRead);
2780}
2781
2782
2783/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2784static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2785{
2786 PDMDEV_ASSERT_DEVINS(pDevIns);
2787 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2788 NOREF(GCPhys);
2789 NOREF(pvBuf);
2790 NOREF(cbWrite);
2791}
2792
2793
2794/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2795static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2796{
2797 PDMDEV_ASSERT_DEVINS(pDevIns);
2798 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2799 NOREF(pvDst);
2800 NOREF(GCVirtSrc);
2801 NOREF(cb);
2802 return VERR_ACCESS_DENIED;
2803}
2804
2805
2806/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2807static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2808{
2809 PDMDEV_ASSERT_DEVINS(pDevIns);
2810 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2811 NOREF(GCVirtDst);
2812 NOREF(pvSrc);
2813 NOREF(cb);
2814 return VERR_ACCESS_DENIED;
2815}
2816
2817
2818/** @copydoc PDMDEVHLPR3::pfnPhysReserve */
2819static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
2820{
2821 PDMDEV_ASSERT_DEVINS(pDevIns);
2822 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2823 NOREF(GCPhys);
2824 NOREF(cbRange);
2825 return VERR_ACCESS_DENIED;
2826}
2827
2828
2829/** @copydoc PDMDEVHLPR3::pfnObsoletePhys2HCVirt */
2830static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
2831{
2832 PDMDEV_ASSERT_DEVINS(pDevIns);
2833 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2834 NOREF(GCPhys);
2835 NOREF(cbRange);
2836 NOREF(ppvHC);
2837 return VERR_ACCESS_DENIED;
2838}
2839
2840
2841/** @copydoc PDMDEVHLPR3::pfnObsoletePhysGCPtr2HCPtr */
2842static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
2843{
2844 PDMDEV_ASSERT_DEVINS(pDevIns);
2845 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2846 NOREF(GCPtr);
2847 NOREF(pHCPtr);
2848 return VERR_ACCESS_DENIED;
2849}
2850
2851
2852/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2853static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
2854{
2855 PDMDEV_ASSERT_DEVINS(pDevIns);
2856 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2857 return false;
2858}
2859
2860
2861/** @copydoc PDMDEVHLPR3::pfnA20Set */
2862static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2863{
2864 PDMDEV_ASSERT_DEVINS(pDevIns);
2865 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2866 NOREF(fEnable);
2867}
2868
2869
2870/** @copydoc PDMDEVHLPR3::pfnVMReset */
2871static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
2872{
2873 PDMDEV_ASSERT_DEVINS(pDevIns);
2874 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2875 return VERR_ACCESS_DENIED;
2876}
2877
2878
2879/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2880static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
2881{
2882 PDMDEV_ASSERT_DEVINS(pDevIns);
2883 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2884 return VERR_ACCESS_DENIED;
2885}
2886
2887
2888/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2889static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
2890{
2891 PDMDEV_ASSERT_DEVINS(pDevIns);
2892 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2893 return VERR_ACCESS_DENIED;
2894}
2895
2896
2897/** @copydoc PDMDEVHLPR3::pfnLockVM */
2898static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns)
2899{
2900 PDMDEV_ASSERT_DEVINS(pDevIns);
2901 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2902 return VERR_ACCESS_DENIED;
2903}
2904
2905
2906/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2907static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns)
2908{
2909 PDMDEV_ASSERT_DEVINS(pDevIns);
2910 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2911 return VERR_ACCESS_DENIED;
2912}
2913
2914
2915/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
2916static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2917{
2918 PDMDEV_ASSERT_DEVINS(pDevIns);
2919 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2920 return false;
2921}
2922
2923
2924/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2925static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2926{
2927 PDMDEV_ASSERT_DEVINS(pDevIns);
2928 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2929 return VERR_ACCESS_DENIED;
2930}
2931
2932
2933/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2934static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
2935{
2936 PDMDEV_ASSERT_DEVINS(pDevIns);
2937 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2938 if (pcbRead)
2939 *pcbRead = 0;
2940 return VERR_ACCESS_DENIED;
2941}
2942
2943
2944/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2945static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
2946{
2947 PDMDEV_ASSERT_DEVINS(pDevIns);
2948 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2949 if (pcbWritten)
2950 *pcbWritten = 0;
2951 return VERR_ACCESS_DENIED;
2952}
2953
2954
2955/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2956static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2957{
2958 PDMDEV_ASSERT_DEVINS(pDevIns);
2959 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2960 return VERR_ACCESS_DENIED;
2961}
2962
2963
2964/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2965static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2966{
2967 PDMDEV_ASSERT_DEVINS(pDevIns);
2968 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2969 return 3 << 2 /* illegal mode type */;
2970}
2971
2972
2973/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2974static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
2975{
2976 PDMDEV_ASSERT_DEVINS(pDevIns);
2977 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2978}
2979
2980
2981/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2982static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2983{
2984 PDMDEV_ASSERT_DEVINS(pDevIns);
2985 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2986 return VERR_ACCESS_DENIED;
2987}
2988
2989
2990/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2991static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2992{
2993 PDMDEV_ASSERT_DEVINS(pDevIns);
2994 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2995 return VERR_ACCESS_DENIED;
2996}
2997
2998
2999/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3000static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3001 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3002{
3003 PDMDEV_ASSERT_DEVINS(pDevIns);
3004 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3005}
3006
3007
3008/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3009static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3010{
3011 PDMDEV_ASSERT_DEVINS(pDevIns);
3012 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3013 return VERR_ACCESS_DENIED;
3014}
3015
3016
3017/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3018static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3019{
3020 PDMDEV_ASSERT_DEVINS(pDevIns);
3021 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3022 return VERR_ACCESS_DENIED;
3023}
3024
3025
3026/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3027static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3028{
3029 PDMDEV_ASSERT_DEVINS(pDevIns);
3030 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3031 return VERR_ACCESS_DENIED;
3032}
3033
3034
3035/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3036static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3037{
3038 PDMDEV_ASSERT_DEVINS(pDevIns);
3039 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3040 return VERR_ACCESS_DENIED;
3041}
3042
3043
3044/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3045static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3046{
3047 PDMDEV_ASSERT_DEVINS(pDevIns);
3048 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3049 return VERR_ACCESS_DENIED;
3050}
3051
3052
3053/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3054static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3055{
3056 PDMDEV_ASSERT_DEVINS(pDevIns);
3057 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3058 return VERR_ACCESS_DENIED;
3059}
3060
3061
3062/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3063static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3064{
3065 PDMDEV_ASSERT_DEVINS(pDevIns);
3066 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3067 return VERR_ACCESS_DENIED;
3068}
3069
3070
3071/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3072static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3073{
3074 PDMDEV_ASSERT_DEVINS(pDevIns);
3075 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3076 return VERR_ACCESS_DENIED;
3077}
3078
3079
3080/**
3081 * The device helper structure for non-trusted devices.
3082 */
3083const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3084{
3085 PDM_DEVHLP_VERSION,
3086 pdmR3DevHlp_IOPortRegister,
3087 pdmR3DevHlp_IOPortRegisterGC,
3088 pdmR3DevHlp_IOPortRegisterR0,
3089 pdmR3DevHlp_IOPortDeregister,
3090 pdmR3DevHlp_MMIORegister,
3091 pdmR3DevHlp_MMIORegisterGC,
3092 pdmR3DevHlp_MMIORegisterR0,
3093 pdmR3DevHlp_MMIODeregister,
3094 pdmR3DevHlp_ROMRegister,
3095 pdmR3DevHlp_SSMRegister,
3096 pdmR3DevHlp_TMTimerCreate,
3097 pdmR3DevHlp_TMTimerCreateExternal,
3098 pdmR3DevHlp_PCIRegister,
3099 pdmR3DevHlp_PCIIORegionRegister,
3100 pdmR3DevHlp_PCISetConfigCallbacks,
3101 pdmR3DevHlp_PCISetIrq,
3102 pdmR3DevHlp_PCISetIrqNoWait,
3103 pdmR3DevHlp_ISASetIrq,
3104 pdmR3DevHlp_ISASetIrqNoWait,
3105 pdmR3DevHlp_DriverAttach,
3106 pdmR3DevHlp_MMHeapAlloc,
3107 pdmR3DevHlp_MMHeapAllocZ,
3108 pdmR3DevHlp_MMHeapFree,
3109 pdmR3DevHlp_VMSetError,
3110 pdmR3DevHlp_VMSetErrorV,
3111 pdmR3DevHlp_VMSetRuntimeError,
3112 pdmR3DevHlp_VMSetRuntimeErrorV,
3113 pdmR3DevHlp_AssertEMT,
3114 pdmR3DevHlp_AssertOther,
3115 pdmR3DevHlp_DBGFStopV,
3116 pdmR3DevHlp_DBGFInfoRegister,
3117 pdmR3DevHlp_STAMRegister,
3118 pdmR3DevHlp_STAMRegisterF,
3119 pdmR3DevHlp_STAMRegisterV,
3120 pdmR3DevHlp_RTCRegister,
3121 pdmR3DevHlp_PDMQueueCreate,
3122 pdmR3DevHlp_CritSectInit,
3123 pdmR3DevHlp_UTCNow,
3124 pdmR3DevHlp_PDMThreadCreate,
3125 pdmR3DevHlp_PhysGCPtr2GCPhys,
3126 pdmR3DevHlp_VMState,
3127 0,
3128 0,
3129 0,
3130 0,
3131 0,
3132 0,
3133 0,
3134 pdmR3DevHlp_Untrusted_GetVM,
3135 pdmR3DevHlp_Untrusted_PCIBusRegister,
3136 pdmR3DevHlp_Untrusted_PICRegister,
3137 pdmR3DevHlp_Untrusted_APICRegister,
3138 pdmR3DevHlp_Untrusted_IOAPICRegister,
3139 pdmR3DevHlp_Untrusted_DMACRegister,
3140 pdmR3DevHlp_Untrusted_PhysRead,
3141 pdmR3DevHlp_Untrusted_PhysWrite,
3142 pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3143 pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3144 pdmR3DevHlp_Untrusted_PhysReserve,
3145 pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt,
3146 pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr,
3147 pdmR3DevHlp_Untrusted_A20IsEnabled,
3148 pdmR3DevHlp_Untrusted_A20Set,
3149 pdmR3DevHlp_Untrusted_VMReset,
3150 pdmR3DevHlp_Untrusted_VMSuspend,
3151 pdmR3DevHlp_Untrusted_VMPowerOff,
3152 pdmR3DevHlp_Untrusted_LockVM,
3153 pdmR3DevHlp_Untrusted_UnlockVM,
3154 pdmR3DevHlp_Untrusted_AssertVMLock,
3155 pdmR3DevHlp_Untrusted_DMARegister,
3156 pdmR3DevHlp_Untrusted_DMAReadMemory,
3157 pdmR3DevHlp_Untrusted_DMAWriteMemory,
3158 pdmR3DevHlp_Untrusted_DMASetDREQ,
3159 pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3160 pdmR3DevHlp_Untrusted_DMASchedule,
3161 pdmR3DevHlp_Untrusted_CMOSWrite,
3162 pdmR3DevHlp_Untrusted_CMOSRead,
3163 pdmR3DevHlp_Untrusted_GetCpuId,
3164 pdmR3DevHlp_Untrusted_ROMProtectShadow,
3165 pdmR3DevHlp_Untrusted_MMIO2Register,
3166 pdmR3DevHlp_Untrusted_MMIO2Deregister,
3167 pdmR3DevHlp_Untrusted_MMIO2Map,
3168 pdmR3DevHlp_Untrusted_MMIO2Unmap,
3169 pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3170 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3171 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3172 PDM_DEVHLP_VERSION /* the end */
3173};
3174
3175
3176
3177/**
3178 * Queue consumer callback for internal component.
3179 *
3180 * @returns Success indicator.
3181 * If false the item will not be removed and the flushing will stop.
3182 * @param pVM The VM handle.
3183 * @param pItem The item to consume. Upon return this item will be freed.
3184 */
3185DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3186{
3187 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3188 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3189 switch (pTask->enmOp)
3190 {
3191 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3192 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3193 break;
3194
3195 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3196 pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3197 break;
3198
3199 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3200 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3201 break;
3202
3203 default:
3204 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3205 break;
3206 }
3207 return true;
3208}
3209
3210/** @} */
3211
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