PDMDevHlp.cpp@ 16802

Last change on this file since 16802 was 15129, checked in by vboxsync, 16 years ago
PDMDevHlp: RT_BIT_32
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 133.8 KB

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1	/* $Id: PDMDevHlp.cpp 15129 2008-12-08 19:12:50Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, Device Helpers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27	#include "PDMInternal.h"
28	#include <VBox/pdm.h>
29	#include <VBox/mm.h>
30	#include <VBox/pgm.h>
31	#include <VBox/iom.h>
32	#include <VBox/rem.h>
33	#include <VBox/dbgf.h>
34	#include <VBox/vm.h>
35	#include <VBox/vmm.h>
36
37	#include <VBox/version.h>
38	#include <VBox/log.h>
39	#include <VBox/err.h>
40	#include <iprt/asm.h>
41	#include <iprt/assert.h>
42	#include <iprt/string.h>
43	#include <iprt/thread.h>
44
45
46	/*******************************************************************************
47	* Defined Constants And Macros *
48	*******************************************************************************/
49	/** Allow physical read and writes from any thread.
50	* (pdmR3DevHlp_PhysRead and pdmR3DevHlp_PhysWrite.)
51	*/
52	#define PDM_PHYS_READWRITE_FROM_ANY_THREAD
53
54
55	/** @name R3 DevHlp
56	* @{
57	*/
58
59
60	/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
61	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
62	PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
63	{
64	PDMDEV_ASSERT_DEVINS(pDevIns);
65	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
66	Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
67	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
68
69	int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
70
71	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
72	return rc;
73	}
74
75
76	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
77	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
78	const char pszOut, const char pszIn,
79	const char pszOutStr, const char pszInStr, const char *pszDesc)
80	{
81	PDMDEV_ASSERT_DEVINS(pDevIns);
82	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
83	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
84	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
85
86	/*
87	* Resolve the functions (one of the can be NULL).
88	*/
89	int rc = VINF_SUCCESS;
90	if ( pDevIns->pDevReg->szRCMod[0]
91	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
92	{
93	RTRCPTR RCPtrIn = NIL_RTRCPTR;
94	if (pszIn)
95	{
96	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
97	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
98	}
99	RTRCPTR RCPtrOut = NIL_RTRCPTR;
100	if (pszOut && RT_SUCCESS(rc))
101	{
102	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
103	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
104	}
105	RTRCPTR RCPtrInStr = NIL_RTRCPTR;
106	if (pszInStr && RT_SUCCESS(rc))
107	{
108	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
109	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
110	}
111	RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
112	if (pszOutStr && RT_SUCCESS(rc))
113	{
114	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
115	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
116	}
117
118	if (RT_SUCCESS(rc))
119	rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
120	}
121	else
122	{
123	AssertMsgFailed(("No GC module for this driver!\n"));
124	rc = VERR_INVALID_PARAMETER;
125	}
126
127	LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
128	return rc;
129	}
130
131
132	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
133	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
134	const char pszOut, const char pszIn,
135	const char pszOutStr, const char pszInStr, const char *pszDesc)
136	{
137	PDMDEV_ASSERT_DEVINS(pDevIns);
138	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
139	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
140	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
141
142	/*
143	* Resolve the functions (one of the can be NULL).
144	*/
145	int rc = VINF_SUCCESS;
146	if ( pDevIns->pDevReg->szR0Mod[0]
147	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
148	{
149	R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
150	if (pszIn)
151	{
152	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
153	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
154	}
155	R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
156	if (pszOut && RT_SUCCESS(rc))
157	{
158	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
159	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
160	}
161	R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
162	if (pszInStr && RT_SUCCESS(rc))
163	{
164	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
165	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
166	}
167	R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
168	if (pszOutStr && RT_SUCCESS(rc))
169	{
170	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
171	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
172	}
173
174	if (RT_SUCCESS(rc))
175	rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
176	}
177	else
178	{
179	AssertMsgFailed(("No R0 module for this driver!\n"));
180	rc = VERR_INVALID_PARAMETER;
181	}
182
183	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
184	return rc;
185	}
186
187
188	/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
189	static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
190	{
191	PDMDEV_ASSERT_DEVINS(pDevIns);
192	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
193	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
194	Port, cPorts));
195
196	int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
197
198	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
199	return rc;
200	}
201
202
203	/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
204	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
205	PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
206	const char *pszDesc)
207	{
208	PDMDEV_ASSERT_DEVINS(pDevIns);
209	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
210	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
211	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
212
213	int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
214
215	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
216	return rc;
217	}
218
219
220	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
221	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
222	const char pszWrite, const char pszRead, const char *pszFill,
223	const char *pszDesc)
224	{
225	PDMDEV_ASSERT_DEVINS(pDevIns);
226	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
227	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
228	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
229
230	/*
231	* Resolve the functions.
232	* Not all function have to present, leave it to IOM to enforce this.
233	*/
234	int rc = VINF_SUCCESS;
235	if ( pDevIns->pDevReg->szRCMod[0]
236	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
237	{
238	RTRCPTR RCPtrWrite = NIL_RTRCPTR;
239	if (pszWrite)
240	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
241
242	RTRCPTR RCPtrRead = NIL_RTRCPTR;
243	int rc2 = VINF_SUCCESS;
244	if (pszRead)
245	rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
246
247	RTRCPTR RCPtrFill = NIL_RTRCPTR;
248	int rc3 = VINF_SUCCESS;
249	if (pszFill)
250	rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
251
252	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
253	rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
254	else
255	{
256	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
257	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
258	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
259	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
260	rc = rc2;
261	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
262	rc = rc3;
263	}
264	}
265	else
266	{
267	AssertMsgFailed(("No GC module for this driver!\n"));
268	rc = VERR_INVALID_PARAMETER;
269	}
270
271	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
272	return rc;
273	}
274
275	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
276	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
277	const char pszWrite, const char pszRead, const char *pszFill,
278	const char *pszDesc)
279	{
280	PDMDEV_ASSERT_DEVINS(pDevIns);
281	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
282	LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
283	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
284
285	/*
286	* Resolve the functions.
287	* Not all function have to present, leave it to IOM to enforce this.
288	*/
289	int rc = VINF_SUCCESS;
290	if ( pDevIns->pDevReg->szR0Mod[0]
291	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
292	{
293	R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
294	if (pszWrite)
295	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
296	R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
297	int rc2 = VINF_SUCCESS;
298	if (pszRead)
299	rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
300	R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
301	int rc3 = VINF_SUCCESS;
302	if (pszFill)
303	rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
304	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
305	rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
306	else
307	{
308	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
309	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
310	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
311	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
312	rc = rc2;
313	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
314	rc = rc3;
315	}
316	}
317	else
318	{
319	AssertMsgFailed(("No R0 module for this driver!\n"));
320	rc = VERR_INVALID_PARAMETER;
321	}
322
323	LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
324	return rc;
325	}
326
327
328	/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
329	static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
330	{
331	PDMDEV_ASSERT_DEVINS(pDevIns);
332	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
333	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
334	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
335
336	int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
337
338	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
339	return rc;
340	}
341
342
343	/** @copydoc PDMDEVHLPR3::pfnROMRegister */
344	static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void pvBinary, bool fShadow, const char pszDesc)
345	{
346	PDMDEV_ASSERT_DEVINS(pDevIns);
347	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
348	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fShadow=%RTbool pszDesc=%p:{%s}\n",
349	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc, pszDesc));
350
351	int rc = MMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
352
353	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
354	return rc;
355	}
356
357
358	/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
359	static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
360	PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
361	PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
362	{
363	PDMDEV_ASSERT_DEVINS(pDevIns);
364	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
365	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
366	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
367
368	int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pszName, u32Instance, u32Version, cbGuess,
369	pfnSavePrep, pfnSaveExec, pfnSaveDone,
370	pfnLoadPrep, pfnLoadExec, pfnLoadDone);
371
372	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
373	return rc;
374	}
375
376
377	/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
378	static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
379	{
380	PDMDEV_ASSERT_DEVINS(pDevIns);
381	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
382	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
383	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
384
385	int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
386
387	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
388	return rc;
389	}
390
391
392	/** @copydoc PDMDEVHLPR3::pfnTMTimerCreateExternal */
393	static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void pvUser, const char pszDesc)
394	{
395	PDMDEV_ASSERT_DEVINS(pDevIns);
396	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
397
398	return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMR3, enmClock, pfnCallback, pvUser, pszDesc);
399	}
400
401
402	/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
403	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
404	{
405	PDMDEV_ASSERT_DEVINS(pDevIns);
406	PVM pVM = pDevIns->Internal.s.pVMR3;
407	VM_ASSERT_EMT(pVM);
408	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
409	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
410
411	/*
412	* Validate input.
413	*/
414	if (!pPciDev)
415	{
416	Assert(pPciDev);
417	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
418	return VERR_INVALID_PARAMETER;
419	}
420	if (!pPciDev->config[0] && !pPciDev->config[1])
421	{
422	Assert(pPciDev->config[0] \|\| pPciDev->config[1]);
423	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
424	return VERR_INVALID_PARAMETER;
425	}
426	if (pDevIns->Internal.s.pPciDeviceR3)
427	{
428	/** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
429	* support a PDM device with multiple PCI devices. This might become a problem
430	* when upgrading the chipset for instance because of multiple functions in some
431	* devices...
432	*/
433	AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
434	return VERR_INTERNAL_ERROR;
435	}
436
437	/*
438	* Choose the PCI bus for the device.
439	*
440	* This is simple. If the device was configured for a particular bus, the PCIBusNo
441	* configuration value will be set. If not the default bus is 0.
442	*/
443	int rc;
444	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
445	if (!pBus)
446	{
447	uint8_t u8Bus;
448	rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
449	AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
450	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
451	AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
452	("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
453	RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
454	VERR_PDM_NO_PCI_BUS);
455	pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
456	}
457	if (pBus->pDevInsR3)
458	{
459	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
460	pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
461	else
462	pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
463
464	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
465	pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
466	else
467	pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
468
469	/*
470	* Check the configuration for PCI device and function assignment.
471	*/
472	int iDev = -1;
473	uint8_t u8Device;
474	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
475	if (RT_SUCCESS(rc))
476	{
477	if (u8Device > 31)
478	{
479	AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
480	u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
481	return VERR_INTERNAL_ERROR;
482	}
483
484	uint8_t u8Function;
485	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
486	if (RT_FAILURE(rc))
487	{
488	AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
489	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
490	return rc;
491	}
492	if (u8Function > 7)
493	{
494	AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
495	u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
496	return VERR_INTERNAL_ERROR;
497	}
498	iDev = (u8Device << 3) \| u8Function;
499	}
500	else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
501	{
502	AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
503	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
504	return rc;
505	}
506
507	/*
508	* Call the pci bus device to do the actual registration.
509	*/
510	pdmLock(pVM);
511	rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
512	pdmUnlock(pVM);
513	if (RT_SUCCESS(rc))
514	{
515	pPciDev->pDevIns = pDevIns;
516
517	pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
518	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
519	pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
520	else
521	pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
522
523	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
524	pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
525	else
526	pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
527
528	Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
529	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
530	}
531	}
532	else
533	{
534	AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
535	rc = VERR_PDM_NO_PCI_BUS;
536	}
537
538	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
539	return rc;
540	}
541
542
543	/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
544	static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
545	{
546	PDMDEV_ASSERT_DEVINS(pDevIns);
547	PVM pVM = pDevIns->Internal.s.pVMR3;
548	VM_ASSERT_EMT(pVM);
549	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
550	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
551
552	/*
553	* Validate input.
554	*/
555	if (iRegion < 0 \|\| iRegion >= PCI_NUM_REGIONS)
556	{
557	Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
558	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
559	return VERR_INVALID_PARAMETER;
560	}
561	switch (enmType)
562	{
563	case PCI_ADDRESS_SPACE_IO:
564	/*
565	* Sanity check: don't allow to register more than 32K of the PCI I/O space.
566	*/
567	AssertMsgReturn(cbRegion <= _32K,
568	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
569	VERR_INVALID_PARAMETER);
570	break;
571
572	case PCI_ADDRESS_SPACE_MEM:
573	case PCI_ADDRESS_SPACE_MEM_PREFETCH:
574	/*
575	* Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
576	* now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
577	*/
578	AssertMsgReturn(cbRegion <= 512 * _1M,
579	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
580	VERR_INVALID_PARAMETER);
581	break;
582	default:
583	AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
584	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
585	return VERR_INVALID_PARAMETER;
586	}
587	if (!pfnCallback)
588	{
589	Assert(pfnCallback);
590	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
591	return VERR_INVALID_PARAMETER;
592	}
593	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
594
595	/*
596	* Must have a PCI device registered!
597	*/
598	int rc;
599	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
600	if (pPciDev)
601	{
602	/*
603	* We're currently restricted to page aligned MMIO regions.
604	*/
605	if ( (enmType == PCI_ADDRESS_SPACE_MEM \|\| enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
606	&& cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
607	{
608	Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
609	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
610	cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
611	}
612
613	/*
614	* For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
615	*/
616	int iLastSet = ASMBitLastSetU32(cbRegion);
617	Assert(iLastSet > 0);
618	uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
619	if (cbRegion > cbRegionAligned)
620	cbRegion = cbRegionAligned * 2; /* round up */
621
622	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
623	Assert(pBus);
624	pdmLock(pVM);
625	rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
626	pdmUnlock(pVM);
627	}
628	else
629	{
630	AssertMsgFailed(("No PCI device registered!\n"));
631	rc = VERR_PDM_NOT_PCI_DEVICE;
632	}
633
634	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
635	return rc;
636	}
637
638
639	/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
640	static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
641	PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
642	{
643	PDMDEV_ASSERT_DEVINS(pDevIns);
644	PVM pVM = pDevIns->Internal.s.pVMR3;
645	VM_ASSERT_EMT(pVM);
646	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
647	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
648
649	/*
650	* Validate input and resolve defaults.
651	*/
652	AssertPtr(pfnRead);
653	AssertPtr(pfnWrite);
654	AssertPtrNull(ppfnReadOld);
655	AssertPtrNull(ppfnWriteOld);
656	AssertPtrNull(pPciDev);
657
658	if (!pPciDev)
659	pPciDev = pDevIns->Internal.s.pPciDeviceR3;
660	AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
661	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
662	AssertRelease(pBus);
663	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
664
665	/*
666	* Do the job.
667	*/
668	pdmLock(pVM);
669	pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
670	pdmUnlock(pVM);
671
672	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
673	}
674
675
676	/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
677	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
678	{
679	PDMDEV_ASSERT_DEVINS(pDevIns);
680	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
681
682	/*
683	* Validate input.
684	*/
685	/** @todo iIrq and iLevel checks. */
686
687	/*
688	* Must have a PCI device registered!
689	*/
690	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
691	if (pPciDev)
692	{
693	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
694	Assert(pBus);
695	PVM pVM = pDevIns->Internal.s.pVMR3;
696	pdmLock(pVM);
697	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
698	pdmUnlock(pVM);
699	}
700	else
701	AssertReleaseMsgFailed(("No PCI device registered!\n"));
702
703	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
704	}
705
706
707	/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
708	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
709	{
710	pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
711	}
712
713
714	/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
715	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
716	{
717	PDMDEV_ASSERT_DEVINS(pDevIns);
718	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
719
720	/*
721	* Validate input.
722	*/
723	/** @todo iIrq and iLevel checks. */
724
725	PVM pVM = pDevIns->Internal.s.pVMR3;
726	PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
727
728	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
729	}
730
731
732	/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
733	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
734	{
735	pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
736	}
737
738
739	/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
740	static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE ppBaseInterface, const char pszDesc)
741	{
742	PDMDEV_ASSERT_DEVINS(pDevIns);
743	PVM pVM = pDevIns->Internal.s.pVMR3;
744	VM_ASSERT_EMT(pVM);
745	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
746	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
747
748	/*
749	* Lookup the LUN, it might already be registered.
750	*/
751	PPDMLUN pLunPrev = NULL;
752	PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
753	for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
754	if (pLun->iLun == iLun)
755	break;
756
757	/*
758	* Create the LUN if if wasn't found, else check if driver is already attached to it.
759	*/
760	if (!pLun)
761	{
762	if ( !pBaseInterface
763	\|\| !pszDesc
764	\|\| !*pszDesc)
765	{
766	Assert(pBaseInterface);
767	Assert(pszDesc \|\| *pszDesc);
768	return VERR_INVALID_PARAMETER;
769	}
770
771	pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
772	if (!pLun)
773	return VERR_NO_MEMORY;
774
775	pLun->iLun = iLun;
776	pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
777	pLun->pTop = NULL;
778	pLun->pBottom = NULL;
779	pLun->pDevIns = pDevIns;
780	pLun->pszDesc = pszDesc;
781	pLun->pBase = pBaseInterface;
782	if (!pLunPrev)
783	pDevIns->Internal.s.pLunsR3 = pLun;
784	else
785	pLunPrev->pNext = pLun;
786	Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
787	iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
788	}
789	else if (pLun->pTop)
790	{
791	AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
792	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
793	return VERR_PDM_DRIVER_ALREADY_ATTACHED;
794	}
795	Assert(pLun->pBase == pBaseInterface);
796
797
798	/*
799	* Get the attached driver configuration.
800	*/
801	int rc;
802	char szNode[48];
803	RTStrPrintf(szNode, sizeof(szNode), "LUN#%d", iLun);
804	PCFGMNODE pNode = CFGMR3GetChild(pDevIns->Internal.s.pCfgHandle, szNode);
805	if (pNode)
806	{
807	char *pszName;
808	rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
809	if (RT_SUCCESS(rc))
810	{
811	/*
812	* Find the driver.
813	*/
814	PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
815	if (pDrv)
816	{
817	/* config node */
818	PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
819	if (!pConfigNode)
820	rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
821	if (RT_SUCCESS(rc))
822	{
823	CFGMR3SetRestrictedRoot(pConfigNode);
824
825	/*
826	* Allocate the driver instance.
827	*/
828	size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
829	cb = RT_ALIGN_Z(cb, 16);
830	PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
831	if (pNew)
832	{
833	/*
834	* Initialize the instance structure (declaration order).
835	*/
836	pNew->u32Version = PDM_DRVINS_VERSION;
837	//pNew->Internal.s.pUp = NULL;
838	//pNew->Internal.s.pDown = NULL;
839	pNew->Internal.s.pLun = pLun;
840	pNew->Internal.s.pDrv = pDrv;
841	pNew->Internal.s.pVM = pVM;
842	//pNew->Internal.s.fDetaching = false;
843	pNew->Internal.s.pCfgHandle = pNode;
844	pNew->pDrvHlp = &g_pdmR3DrvHlp;
845	pNew->pDrvReg = pDrv->pDrvReg;
846	pNew->pCfgHandle = pConfigNode;
847	pNew->iInstance = pDrv->cInstances++;
848	pNew->pUpBase = pBaseInterface;
849	//pNew->pDownBase = NULL;
850	//pNew->IBase.pfnQueryInterface = NULL;
851	pNew->pvInstanceData = &pNew->achInstanceData[0];
852
853	/*
854	* Link with LUN and call the constructor.
855	*/
856	pLun->pTop = pLun->pBottom = pNew;
857	rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle);
858	if (RT_SUCCESS(rc))
859	{
860	MMR3HeapFree(pszName);
861	*ppBaseInterface = &pNew->IBase;
862	Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
863	pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
864	LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
865
866	return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
867	}
868
869	/*
870	* Free the driver.
871	*/
872	pLun->pTop = pLun->pBottom = NULL;
873	ASMMemFill32(pNew, cb, 0xdeadd0d0);
874	MMR3HeapFree(pNew);
875	pDrv->cInstances--;
876	}
877	else
878	{
879	AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
880	rc = VERR_NO_MEMORY;
881	}
882	}
883	else
884	AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
885	}
886	else
887	{
888	AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
889	rc = VERR_PDM_DRIVER_NOT_FOUND;
890	}
891	MMR3HeapFree(pszName);
892	}
893	else
894	{
895	AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
896	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
897	rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
898	}
899	}
900	else
901	rc = VERR_PDM_NO_ATTACHED_DRIVER;
902
903
904	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
905	return rc;
906	}
907
908
909	/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
910	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
911	{
912	PDMDEV_ASSERT_DEVINS(pDevIns);
913	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
914
915	void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
916
917	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
918	return pv;
919	}
920
921
922	/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
923	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
924	{
925	PDMDEV_ASSERT_DEVINS(pDevIns);
926	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
927
928	void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
929
930	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
931	return pv;
932	}
933
934
935	/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
936	static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
937	{
938	PDMDEV_ASSERT_DEVINS(pDevIns);
939	LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
940
941	MMR3HeapFree(pv);
942
943	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
944	}
945
946
947	/** @copydoc PDMDEVHLPR3::pfnVMSetError */
948	static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
949	{
950	PDMDEV_ASSERT_DEVINS(pDevIns);
951	va_list args;
952	va_start(args, pszFormat);
953	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
954	va_end(args);
955	return rc;
956	}
957
958
959	/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
960	static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
961	{
962	PDMDEV_ASSERT_DEVINS(pDevIns);
963	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
964	return rc;
965	}
966
967
968	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
969	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char pszErrorID, const char pszFormat, ...)
970	{
971	PDMDEV_ASSERT_DEVINS(pDevIns);
972	va_list args;
973	va_start(args, pszFormat);
974	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFatal, pszErrorID, pszFormat, args);
975	va_end(args);
976	return rc;
977	}
978
979
980	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
981	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char pszErrorID, const char pszFormat, va_list va)
982	{
983	PDMDEV_ASSERT_DEVINS(pDevIns);
984	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFatal, pszErrorID, pszFormat, va);
985	return rc;
986	}
987
988
989	/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
990	static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
991	{
992	PDMDEV_ASSERT_DEVINS(pDevIns);
993	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
994	return true;
995
996	char szMsg[100];
997	RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
998	AssertMsg1(szMsg, iLine, pszFile, pszFunction);
999	AssertBreakpoint();
1000	return false;
1001	}
1002
1003
1004	/** @copydoc PDMDEVHLPR3::pfnAssertOther */
1005	static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1006	{
1007	PDMDEV_ASSERT_DEVINS(pDevIns);
1008	if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1009	return true;
1010
1011	char szMsg[100];
1012	RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1013	AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1014	AssertBreakpoint();
1015	return false;
1016	}
1017
1018
1019	/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
1020	static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction, const char *pszFormat, va_list args)
1021	{
1022	PDMDEV_ASSERT_DEVINS(pDevIns);
1023	#ifdef LOG_ENABLED
1024	va_list va2;
1025	va_copy(va2, args);
1026	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1027	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1028	va_end(va2);
1029	#endif
1030
1031	PVM pVM = pDevIns->Internal.s.pVMR3;
1032	VM_ASSERT_EMT(pVM);
1033	int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1034
1035	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1036	return rc;
1037	}
1038
1039
1040	/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1041	static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char pszName, const char pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1042	{
1043	PDMDEV_ASSERT_DEVINS(pDevIns);
1044	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1045	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1046
1047	PVM pVM = pDevIns->Internal.s.pVMR3;
1048	VM_ASSERT_EMT(pVM);
1049	int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1050
1051	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1052	return rc;
1053	}
1054
1055
1056	/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1057	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void pvSample, STAMTYPE enmType, const char pszName, STAMUNIT enmUnit, const char *pszDesc)
1058	{
1059	PDMDEV_ASSERT_DEVINS(pDevIns);
1060	PVM pVM = pDevIns->Internal.s.pVMR3;
1061	VM_ASSERT_EMT(pVM);
1062
1063	STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1064	NOREF(pVM);
1065	}
1066
1067
1068
1069	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1070	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1071	STAMUNIT enmUnit, const char pszDesc, const char pszName, ...)
1072	{
1073	PDMDEV_ASSERT_DEVINS(pDevIns);
1074	PVM pVM = pDevIns->Internal.s.pVMR3;
1075	VM_ASSERT_EMT(pVM);
1076
1077	va_list args;
1078	va_start(args, pszName);
1079	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1080	va_end(args);
1081	AssertRC(rc);
1082
1083	NOREF(pVM);
1084	}
1085
1086
1087	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1088	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1089	STAMUNIT enmUnit, const char pszDesc, const char pszName, va_list args)
1090	{
1091	PDMDEV_ASSERT_DEVINS(pDevIns);
1092	PVM pVM = pDevIns->Internal.s.pVMR3;
1093	VM_ASSERT_EMT(pVM);
1094
1095	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1096	AssertRC(rc);
1097
1098	NOREF(pVM);
1099	}
1100
1101
1102	/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1103	static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1104	{
1105	PDMDEV_ASSERT_DEVINS(pDevIns);
1106	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1107	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1108	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1109	pRtcReg->pfnWrite, ppRtcHlp));
1110
1111	/*
1112	* Validate input.
1113	*/
1114	if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1115	{
1116	AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1117	PDM_RTCREG_VERSION));
1118	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1119	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1120	return VERR_INVALID_PARAMETER;
1121	}
1122	if ( !pRtcReg->pfnWrite
1123	\|\| !pRtcReg->pfnRead)
1124	{
1125	Assert(pRtcReg->pfnWrite);
1126	Assert(pRtcReg->pfnRead);
1127	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1128	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1129	return VERR_INVALID_PARAMETER;
1130	}
1131
1132	if (!ppRtcHlp)
1133	{
1134	Assert(ppRtcHlp);
1135	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1136	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1137	return VERR_INVALID_PARAMETER;
1138	}
1139
1140	/*
1141	* Only one DMA device.
1142	*/
1143	PVM pVM = pDevIns->Internal.s.pVMR3;
1144	if (pVM->pdm.s.pRtc)
1145	{
1146	AssertMsgFailed(("Only one RTC device is supported!\n"));
1147	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1148	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1149	return VERR_INVALID_PARAMETER;
1150	}
1151
1152	/*
1153	* Allocate and initialize pci bus structure.
1154	*/
1155	int rc = VINF_SUCCESS;
1156	PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1157	if (pRtc)
1158	{
1159	pRtc->pDevIns = pDevIns;
1160	pRtc->Reg = *pRtcReg;
1161	pVM->pdm.s.pRtc = pRtc;
1162
1163	/* set the helper pointer. */
1164	*ppRtcHlp = &g_pdmR3DevRtcHlp;
1165	Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1166	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1167	}
1168	else
1169	rc = VERR_NO_MEMORY;
1170
1171	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1172	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1173	return rc;
1174	}
1175
1176
1177	/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1178	static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1179	PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
1180	{
1181	PDMDEV_ASSERT_DEVINS(pDevIns);
1182	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool ppQueue=%p\n",
1183	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
1184
1185	PVM pVM = pDevIns->Internal.s.pVMR3;
1186	VM_ASSERT_EMT(pVM);
1187	int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
1188
1189	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, ppQueue));
1190	return rc;
1191	}
1192
1193
1194	/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1195	static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1196	{
1197	PDMDEV_ASSERT_DEVINS(pDevIns);
1198	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1199	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1200
1201	PVM pVM = pDevIns->Internal.s.pVMR3;
1202	VM_ASSERT_EMT(pVM);
1203	int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1204
1205	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1206	return rc;
1207	}
1208
1209
1210	/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1211	static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1212	{
1213	PDMDEV_ASSERT_DEVINS(pDevIns);
1214	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1215	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1216
1217	pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1218
1219	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1220	return pTime;
1221	}
1222
1223
1224	/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1225	static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1226	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1227	{
1228	PDMDEV_ASSERT_DEVINS(pDevIns);
1229	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1230	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1231	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1232
1233	int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1234
1235	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1236	rc, *ppThread));
1237	return rc;
1238	}
1239
1240
1241	/** @copydoc PDMDEVHLPR3::pfnGetVM */
1242	static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1243	{
1244	PDMDEV_ASSERT_DEVINS(pDevIns);
1245	LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1246	return pDevIns->Internal.s.pVMR3;
1247	}
1248
1249
1250	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1251	static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1252	{
1253	PDMDEV_ASSERT_DEVINS(pDevIns);
1254	PVM pVM = pDevIns->Internal.s.pVMR3;
1255	VM_ASSERT_EMT(pVM);
1256	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1257	".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1258	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1259	pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1260	pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1261
1262	/*
1263	* Validate the structure.
1264	*/
1265	if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1266	{
1267	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1268	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1269	return VERR_INVALID_PARAMETER;
1270	}
1271	if ( !pPciBusReg->pfnRegisterR3
1272	\|\| !pPciBusReg->pfnIORegionRegisterR3
1273	\|\| !pPciBusReg->pfnSetIrqR3
1274	\|\| !pPciBusReg->pfnSaveExecR3
1275	\|\| !pPciBusReg->pfnLoadExecR3
1276	\|\| (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1277	{
1278	Assert(pPciBusReg->pfnRegisterR3);
1279	Assert(pPciBusReg->pfnIORegionRegisterR3);
1280	Assert(pPciBusReg->pfnSetIrqR3);
1281	Assert(pPciBusReg->pfnSaveExecR3);
1282	Assert(pPciBusReg->pfnLoadExecR3);
1283	Assert(pPciBusReg->pfnFakePCIBIOSR3);
1284	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1285	return VERR_INVALID_PARAMETER;
1286	}
1287	if ( pPciBusReg->pszSetIrqRC
1288	&& !VALID_PTR(pPciBusReg->pszSetIrqRC))
1289	{
1290	Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1291	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1292	return VERR_INVALID_PARAMETER;
1293	}
1294	if ( pPciBusReg->pszSetIrqR0
1295	&& !VALID_PTR(pPciBusReg->pszSetIrqR0))
1296	{
1297	Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1298	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1299	return VERR_INVALID_PARAMETER;
1300	}
1301	if (!ppPciHlpR3)
1302	{
1303	Assert(ppPciHlpR3);
1304	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1305	return VERR_INVALID_PARAMETER;
1306	}
1307
1308	/*
1309	* Find free PCI bus entry.
1310	*/
1311	unsigned iBus = 0;
1312	for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1313	if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1314	break;
1315	if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1316	{
1317	AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1318	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1319	return VERR_INVALID_PARAMETER;
1320	}
1321	PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1322
1323	/*
1324	* Resolve and init the RC bits.
1325	*/
1326	if (pPciBusReg->pszSetIrqRC)
1327	{
1328	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1329	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1330	if (RT_FAILURE(rc))
1331	{
1332	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1333	return rc;
1334	}
1335	pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1336	}
1337	else
1338	{
1339	pPciBus->pfnSetIrqRC = 0;
1340	pPciBus->pDevInsRC = 0;
1341	}
1342
1343	/*
1344	* Resolve and init the R0 bits.
1345	*/
1346	if (pPciBusReg->pszSetIrqR0)
1347	{
1348	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1349	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1350	if (RT_FAILURE(rc))
1351	{
1352	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1353	return rc;
1354	}
1355	pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1356	}
1357	else
1358	{
1359	pPciBus->pfnSetIrqR0 = 0;
1360	pPciBus->pDevInsR0 = 0;
1361	}
1362
1363	/*
1364	* Init the R3 bits.
1365	*/
1366	pPciBus->iBus = iBus;
1367	pPciBus->pDevInsR3 = pDevIns;
1368	pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1369	pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1370	pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1371	pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1372	pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1373	pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1374	pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1375
1376	Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1377
1378	/* set the helper pointer and return. */
1379	*ppPciHlpR3 = &g_pdmR3DevPciHlp;
1380	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1381	return VINF_SUCCESS;
1382	}
1383
1384
1385	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1386	static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1387	{
1388	PDMDEV_ASSERT_DEVINS(pDevIns);
1389	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1390	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1391	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1392	pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1393	pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1394	ppPicHlpR3));
1395
1396	/*
1397	* Validate input.
1398	*/
1399	if (pPicReg->u32Version != PDM_PICREG_VERSION)
1400	{
1401	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1402	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1403	return VERR_INVALID_PARAMETER;
1404	}
1405	if ( !pPicReg->pfnSetIrqR3
1406	\|\| !pPicReg->pfnGetInterruptR3)
1407	{
1408	Assert(pPicReg->pfnSetIrqR3);
1409	Assert(pPicReg->pfnGetInterruptR3);
1410	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1411	return VERR_INVALID_PARAMETER;
1412	}
1413	if ( ( pPicReg->pszSetIrqRC
1414	\|\| pPicReg->pszGetInterruptRC)
1415	&& ( !VALID_PTR(pPicReg->pszSetIrqRC)
1416	\|\| !VALID_PTR(pPicReg->pszGetInterruptRC))
1417	)
1418	{
1419	Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1420	Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1421	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1422	return VERR_INVALID_PARAMETER;
1423	}
1424	if ( pPicReg->pszSetIrqRC
1425	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1426	{
1427	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1428	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1429	return VERR_INVALID_PARAMETER;
1430	}
1431	if ( pPicReg->pszSetIrqR0
1432	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1433	{
1434	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1435	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1436	return VERR_INVALID_PARAMETER;
1437	}
1438	if (!ppPicHlpR3)
1439	{
1440	Assert(ppPicHlpR3);
1441	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1442	return VERR_INVALID_PARAMETER;
1443	}
1444
1445	/*
1446	* Only one PIC device.
1447	*/
1448	PVM pVM = pDevIns->Internal.s.pVMR3;
1449	if (pVM->pdm.s.Pic.pDevInsR3)
1450	{
1451	AssertMsgFailed(("Only one pic device is supported!\n"));
1452	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1453	return VERR_INVALID_PARAMETER;
1454	}
1455
1456	/*
1457	* RC stuff.
1458	*/
1459	if (pPicReg->pszSetIrqRC)
1460	{
1461	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1462	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1463	if (RT_SUCCESS(rc))
1464	{
1465	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1466	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1467	}
1468	if (RT_FAILURE(rc))
1469	{
1470	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1471	return rc;
1472	}
1473	pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1474	}
1475	else
1476	{
1477	pVM->pdm.s.Pic.pDevInsRC = 0;
1478	pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1479	pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1480	}
1481
1482	/*
1483	* R0 stuff.
1484	*/
1485	if (pPicReg->pszSetIrqR0)
1486	{
1487	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1488	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1489	if (RT_SUCCESS(rc))
1490	{
1491	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1492	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1493	}
1494	if (RT_FAILURE(rc))
1495	{
1496	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1497	return rc;
1498	}
1499	pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1500	Assert(pVM->pdm.s.Pic.pDevInsR0);
1501	}
1502	else
1503	{
1504	pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1505	pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1506	pVM->pdm.s.Pic.pDevInsR0 = 0;
1507	}
1508
1509	/*
1510	* R3 stuff.
1511	*/
1512	pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1513	pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1514	pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1515	Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1516
1517	/* set the helper pointer and return. */
1518	*ppPicHlpR3 = &g_pdmR3DevPicHlp;
1519	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1520	return VINF_SUCCESS;
1521	}
1522
1523
1524	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1525	static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1526	{
1527	PDMDEV_ASSERT_DEVINS(pDevIns);
1528	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1529	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1530	".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1531	".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}} ppApicHlpR3=%p\n",
1532	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1533	pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pszGetInterruptRC,
1534	pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1535	pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1536	pApicReg->pszBusDeliverRC, ppApicHlpR3));
1537
1538	/*
1539	* Validate input.
1540	*/
1541	if (pApicReg->u32Version != PDM_APICREG_VERSION)
1542	{
1543	AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1544	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1545	return VERR_INVALID_PARAMETER;
1546	}
1547	if ( !pApicReg->pfnGetInterruptR3
1548	\|\| !pApicReg->pfnHasPendingIrqR3
1549	\|\| !pApicReg->pfnSetBaseR3
1550	\|\| !pApicReg->pfnGetBaseR3
1551	\|\| !pApicReg->pfnSetTPRR3
1552	\|\| !pApicReg->pfnGetTPRR3
1553	\|\| !pApicReg->pfnWriteMSRR3
1554	\|\| !pApicReg->pfnReadMSRR3
1555	\|\| !pApicReg->pfnBusDeliverR3)
1556	{
1557	Assert(pApicReg->pfnGetInterruptR3);
1558	Assert(pApicReg->pfnHasPendingIrqR3);
1559	Assert(pApicReg->pfnSetBaseR3);
1560	Assert(pApicReg->pfnGetBaseR3);
1561	Assert(pApicReg->pfnSetTPRR3);
1562	Assert(pApicReg->pfnGetTPRR3);
1563	Assert(pApicReg->pfnWriteMSRR3);
1564	Assert(pApicReg->pfnReadMSRR3);
1565	Assert(pApicReg->pfnBusDeliverR3);
1566	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1567	return VERR_INVALID_PARAMETER;
1568	}
1569	if ( ( pApicReg->pszGetInterruptRC
1570	\|\| pApicReg->pszHasPendingIrqRC
1571	\|\| pApicReg->pszSetBaseRC
1572	\|\| pApicReg->pszGetBaseRC
1573	\|\| pApicReg->pszSetTPRRC
1574	\|\| pApicReg->pszGetTPRRC
1575	\|\| pApicReg->pszWriteMSRRC
1576	\|\| pApicReg->pszReadMSRRC
1577	\|\| pApicReg->pszBusDeliverRC)
1578	&& ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1579	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1580	\|\| !VALID_PTR(pApicReg->pszSetBaseRC)
1581	\|\| !VALID_PTR(pApicReg->pszGetBaseRC)
1582	\|\| !VALID_PTR(pApicReg->pszSetTPRRC)
1583	\|\| !VALID_PTR(pApicReg->pszGetTPRRC)
1584	\|\| !VALID_PTR(pApicReg->pszWriteMSRRC)
1585	\|\| !VALID_PTR(pApicReg->pszReadMSRRC)
1586	\|\| !VALID_PTR(pApicReg->pszBusDeliverRC))
1587	)
1588	{
1589	Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1590	Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1591	Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1592	Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1593	Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1594	Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1595	Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1596	Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1597	Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1598	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1599	return VERR_INVALID_PARAMETER;
1600	}
1601	if ( ( pApicReg->pszGetInterruptR0
1602	\|\| pApicReg->pszHasPendingIrqR0
1603	\|\| pApicReg->pszSetBaseR0
1604	\|\| pApicReg->pszGetBaseR0
1605	\|\| pApicReg->pszSetTPRR0
1606	\|\| pApicReg->pszGetTPRR0
1607	\|\| pApicReg->pszWriteMSRR0
1608	\|\| pApicReg->pszReadMSRR0
1609	\|\| pApicReg->pszBusDeliverR0)
1610	&& ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1611	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1612	\|\| !VALID_PTR(pApicReg->pszSetBaseR0)
1613	\|\| !VALID_PTR(pApicReg->pszGetBaseR0)
1614	\|\| !VALID_PTR(pApicReg->pszSetTPRR0)
1615	\|\| !VALID_PTR(pApicReg->pszGetTPRR0)
1616	\|\| !VALID_PTR(pApicReg->pszReadMSRR0)
1617	\|\| !VALID_PTR(pApicReg->pszWriteMSRR0)
1618	\|\| !VALID_PTR(pApicReg->pszBusDeliverR0))
1619	)
1620	{
1621	Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1622	Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1623	Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1624	Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1625	Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1626	Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1627	Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1628	Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1629	Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1630	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1631	return VERR_INVALID_PARAMETER;
1632	}
1633	if (!ppApicHlpR3)
1634	{
1635	Assert(ppApicHlpR3);
1636	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1637	return VERR_INVALID_PARAMETER;
1638	}
1639
1640	/*
1641	* Only one APIC device. On SMP we have single logical device covering all LAPICs,
1642	* as they need to communicate and share state easily.
1643	*/
1644	PVM pVM = pDevIns->Internal.s.pVMR3;
1645	if (pVM->pdm.s.Apic.pDevInsR3)
1646	{
1647	AssertMsgFailed(("Only one apic device is supported!\n"));
1648	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1649	return VERR_INVALID_PARAMETER;
1650	}
1651
1652	/*
1653	* Resolve & initialize the RC bits.
1654	*/
1655	if (pApicReg->pszGetInterruptRC)
1656	{
1657	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1658	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1659	if (RT_SUCCESS(rc))
1660	{
1661	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1662	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1663	}
1664	if (RT_SUCCESS(rc))
1665	{
1666	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1667	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1668	}
1669	if (RT_SUCCESS(rc))
1670	{
1671	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1672	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1673	}
1674	if (RT_SUCCESS(rc))
1675	{
1676	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1677	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1678	}
1679	if (RT_SUCCESS(rc))
1680	{
1681	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1682	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1683	}
1684	if (RT_SUCCESS(rc))
1685	{
1686	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1687	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1688	}
1689	if (RT_SUCCESS(rc))
1690	{
1691	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1692	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1693	}
1694	if (RT_SUCCESS(rc))
1695	{
1696	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1697	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1698	}
1699	if (RT_FAILURE(rc))
1700	{
1701	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1702	return rc;
1703	}
1704	pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1705	}
1706	else
1707	{
1708	pVM->pdm.s.Apic.pDevInsRC = 0;
1709	pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1710	pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1711	pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1712	pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1713	pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1714	pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1715	pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1716	pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1717	pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1718	}
1719
1720	/*
1721	* Resolve & initialize the R0 bits.
1722	*/
1723	if (pApicReg->pszGetInterruptR0)
1724	{
1725	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1726	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1727	if (RT_SUCCESS(rc))
1728	{
1729	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1730	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1731	}
1732	if (RT_SUCCESS(rc))
1733	{
1734	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1735	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1736	}
1737	if (RT_SUCCESS(rc))
1738	{
1739	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1740	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1741	}
1742	if (RT_SUCCESS(rc))
1743	{
1744	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1745	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1746	}
1747	if (RT_SUCCESS(rc))
1748	{
1749	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1750	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1751	}
1752	if (RT_SUCCESS(rc))
1753	{
1754	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1755	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1756	}
1757	if (RT_SUCCESS(rc))
1758	{
1759	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1760	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1761	}
1762	if (RT_SUCCESS(rc))
1763	{
1764	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1765	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1766	}
1767	if (RT_FAILURE(rc))
1768	{
1769	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1770	return rc;
1771	}
1772	pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1773	Assert(pVM->pdm.s.Apic.pDevInsR0);
1774	}
1775	else
1776	{
1777	pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1778	pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1779	pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1780	pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1781	pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1782	pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1783	pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1784	pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1785	pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1786	pVM->pdm.s.Apic.pDevInsR0 = 0;
1787	}
1788
1789	/*
1790	* Initialize the HC bits.
1791	*/
1792	pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1793	pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1794	pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1795	pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1796	pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1797	pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1798	pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1799	pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1800	pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1801	pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1802	Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1803
1804	/* set the helper pointer and return. */
1805	*ppApicHlpR3 = &g_pdmR3DevApicHlp;
1806	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1807	return VINF_SUCCESS;
1808	}
1809
1810
1811	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1812	static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1813	{
1814	PDMDEV_ASSERT_DEVINS(pDevIns);
1815	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1816	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1817	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1818	pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1819
1820	/*
1821	* Validate input.
1822	*/
1823	if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1824	{
1825	AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1826	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1827	return VERR_INVALID_PARAMETER;
1828	}
1829	if (!pIoApicReg->pfnSetIrqR3)
1830	{
1831	Assert(pIoApicReg->pfnSetIrqR3);
1832	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1833	return VERR_INVALID_PARAMETER;
1834	}
1835	if ( pIoApicReg->pszSetIrqRC
1836	&& !VALID_PTR(pIoApicReg->pszSetIrqRC))
1837	{
1838	Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1839	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1840	return VERR_INVALID_PARAMETER;
1841	}
1842	if ( pIoApicReg->pszSetIrqR0
1843	&& !VALID_PTR(pIoApicReg->pszSetIrqR0))
1844	{
1845	Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1846	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1847	return VERR_INVALID_PARAMETER;
1848	}
1849	if (!ppIoApicHlpR3)
1850	{
1851	Assert(ppIoApicHlpR3);
1852	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1853	return VERR_INVALID_PARAMETER;
1854	}
1855
1856	/*
1857	* The I/O APIC requires the APIC to be present (hacks++).
1858	* If the I/O APIC does GC stuff so must the APIC.
1859	*/
1860	PVM pVM = pDevIns->Internal.s.pVMR3;
1861	if (!pVM->pdm.s.Apic.pDevInsR3)
1862	{
1863	AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1864	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1865	return VERR_INVALID_PARAMETER;
1866	}
1867	if ( pIoApicReg->pszSetIrqRC
1868	&& !pVM->pdm.s.Apic.pDevInsRC)
1869	{
1870	AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1871	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1872	return VERR_INVALID_PARAMETER;
1873	}
1874
1875	/*
1876	* Only one I/O APIC device.
1877	*/
1878	if (pVM->pdm.s.IoApic.pDevInsR3)
1879	{
1880	AssertMsgFailed(("Only one ioapic device is supported!\n"));
1881	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1882	return VERR_INVALID_PARAMETER;
1883	}
1884
1885	/*
1886	* Resolve & initialize the GC bits.
1887	*/
1888	if (pIoApicReg->pszSetIrqRC)
1889	{
1890	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
1891	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
1892	if (RT_FAILURE(rc))
1893	{
1894	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1895	return rc;
1896	}
1897	pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1898	}
1899	else
1900	{
1901	pVM->pdm.s.IoApic.pDevInsRC = 0;
1902	pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
1903	}
1904
1905	/*
1906	* Resolve & initialize the R0 bits.
1907	*/
1908	if (pIoApicReg->pszSetIrqR0)
1909	{
1910	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
1911	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
1912	if (RT_FAILURE(rc))
1913	{
1914	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1915	return rc;
1916	}
1917	pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1918	Assert(pVM->pdm.s.IoApic.pDevInsR0);
1919	}
1920	else
1921	{
1922	pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
1923	pVM->pdm.s.IoApic.pDevInsR0 = 0;
1924	}
1925
1926	/*
1927	* Initialize the R3 bits.
1928	*/
1929	pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
1930	pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
1931	Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1932
1933	/* set the helper pointer and return. */
1934	*ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
1935	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1936	return VINF_SUCCESS;
1937	}
1938
1939
1940	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
1941	static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
1942	{
1943	PDMDEV_ASSERT_DEVINS(pDevIns);
1944	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1945	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
1946	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
1947	pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
1948
1949	/*
1950	* Validate input.
1951	*/
1952	if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
1953	{
1954	AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
1955	PDM_DMACREG_VERSION));
1956	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
1957	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1958	return VERR_INVALID_PARAMETER;
1959	}
1960	if ( !pDmacReg->pfnRun
1961	\|\| !pDmacReg->pfnRegister
1962	\|\| !pDmacReg->pfnReadMemory
1963	\|\| !pDmacReg->pfnWriteMemory
1964	\|\| !pDmacReg->pfnSetDREQ
1965	\|\| !pDmacReg->pfnGetChannelMode)
1966	{
1967	Assert(pDmacReg->pfnRun);
1968	Assert(pDmacReg->pfnRegister);
1969	Assert(pDmacReg->pfnReadMemory);
1970	Assert(pDmacReg->pfnWriteMemory);
1971	Assert(pDmacReg->pfnSetDREQ);
1972	Assert(pDmacReg->pfnGetChannelMode);
1973	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1974	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1975	return VERR_INVALID_PARAMETER;
1976	}
1977
1978	if (!ppDmacHlp)
1979	{
1980	Assert(ppDmacHlp);
1981	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
1982	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1983	return VERR_INVALID_PARAMETER;
1984	}
1985
1986	/*
1987	* Only one DMA device.
1988	*/
1989	PVM pVM = pDevIns->Internal.s.pVMR3;
1990	if (pVM->pdm.s.pDmac)
1991	{
1992	AssertMsgFailed(("Only one DMA device is supported!\n"));
1993	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
1994	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1995	return VERR_INVALID_PARAMETER;
1996	}
1997
1998	/*
1999	* Allocate and initialize pci bus structure.
2000	*/
2001	int rc = VINF_SUCCESS;
2002	PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2003	if (pDmac)
2004	{
2005	pDmac->pDevIns = pDevIns;
2006	pDmac->Reg = *pDmacReg;
2007	pVM->pdm.s.pDmac = pDmac;
2008
2009	/* set the helper pointer. */
2010	*ppDmacHlp = &g_pdmR3DevDmacHlp;
2011	Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2012	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2013	}
2014	else
2015	rc = VERR_NO_MEMORY;
2016
2017	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2018	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2019	return rc;
2020	}
2021
2022
2023	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2024	static DECLCALLBACK(void) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2025	{
2026	PDMDEV_ASSERT_DEVINS(pDevIns);
2027	LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2028	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2029
2030	/*
2031	* For the convenience of the device we put no thread restriction on this interface.
2032	* That means we'll have to check which thread we're in and choose our path.
2033	*/
2034	#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
2035	PGMPhysRead(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
2036	#else
2037	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3) \|\| VMMR3LockIsOwner(pDevIns->Internal.s.pVMR3))
2038	PGMPhysRead(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
2039	else
2040	{
2041	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2042	PVMREQ pReq;
2043	AssertCompileSize(RTGCPHYS, 4);
2044	int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMR3, &pReq, RT_INDEFINITE_WAIT,
2045	(PFNRT)PGMPhysRead, 4, pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
2046	while (rc == VERR_TIMEOUT)
2047	rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
2048	AssertReleaseRC(rc);
2049	VMR3ReqFree(pReq);
2050	}
2051	#endif
2052	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2053	}
2054
2055
2056	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2057	static DECLCALLBACK(void) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2058	{
2059	PDMDEV_ASSERT_DEVINS(pDevIns);
2060	LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2061	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2062
2063	/*
2064	* For the convenience of the device we put no thread restriction on this interface.
2065	* That means we'll have to check which thread we're in and choose our path.
2066	*/
2067	#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
2068	PGMPhysWrite(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
2069	#else
2070	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3) \|\| VMMR3LockIsOwner(pDevIns->Internal.s.pVMR3))
2071	PGMPhysWrite(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
2072	else
2073	{
2074	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2075	PVMREQ pReq;
2076	AssertCompileSize(RTGCPHYS, 4);
2077	int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMR3, &pReq, RT_INDEFINITE_WAIT,
2078	(PFNRT)PGMPhysWrite, 4, pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
2079	while (rc == VERR_TIMEOUT)
2080	rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
2081	AssertReleaseRC(rc);
2082	VMR3ReqFree(pReq);
2083	}
2084	#endif
2085	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2086	}
2087
2088
2089	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2090	static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2091	{
2092	PDMDEV_ASSERT_DEVINS(pDevIns);
2093	PVM pVM = pDevIns->Internal.s.pVMR3;
2094	VM_ASSERT_EMT(pVM);
2095	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2096	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2097
2098	if (!VM_IS_EMT(pVM))
2099	return VERR_ACCESS_DENIED;
2100
2101	int rc = PGMPhysSimpleReadGCPtr(pVM, pvDst, GCVirtSrc, cb);
2102
2103	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2104
2105	return rc;
2106	}
2107
2108
2109	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2110	static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2111	{
2112	PDMDEV_ASSERT_DEVINS(pDevIns);
2113	PVM pVM = pDevIns->Internal.s.pVMR3;
2114	VM_ASSERT_EMT(pVM);
2115	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2116	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2117
2118	if (!VM_IS_EMT(pVM))
2119	return VERR_ACCESS_DENIED;
2120
2121	int rc = PGMPhysSimpleWriteGCPtr(pVM, GCVirtDst, pvSrc, cb);
2122
2123	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2124
2125	return rc;
2126	}
2127
2128
2129	/** @copydoc PDMDEVHLPR3::pfnPhysReserve */
2130	static DECLCALLBACK(int) pdmR3DevHlp_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
2131	{
2132	PDMDEV_ASSERT_DEVINS(pDevIns);
2133	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2134	LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: GCPhys=%RGp cbRange=%#x pszDesc=%p:{%s}\n",
2135	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, cbRange, pszDesc, pszDesc));
2136
2137	int rc = MMR3PhysReserve(pDevIns->Internal.s.pVMR3, GCPhys, cbRange, pszDesc);
2138
2139	LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2140
2141	return rc;
2142	}
2143
2144
2145	/** @copydoc PDMDEVHLPR3::pfnObsoletePhys2HCVirt */
2146	static DECLCALLBACK(int) pdmR3DevHlp_Obsolete_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
2147	{
2148	PDMDEV_ASSERT_DEVINS(pDevIns);
2149	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2150	NOREF(GCPhys);
2151	NOREF(cbRange);
2152	NOREF(ppvHC);
2153	return VERR_ACCESS_DENIED;
2154	}
2155
2156
2157	/** @copydoc PDMDEVHLPR3::pfnObsoletePhysGCPtr2HCPtr */
2158	static DECLCALLBACK(int) pdmR3DevHlp_Obsolete_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
2159	{
2160	PDMDEV_ASSERT_DEVINS(pDevIns);
2161	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2162	NOREF(GCPtr);
2163	NOREF(pHCPtr);
2164	return VERR_ACCESS_DENIED;
2165	}
2166
2167
2168	/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2169	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2170	{
2171	PDMDEV_ASSERT_DEVINS(pDevIns);
2172	PVM pVM = pDevIns->Internal.s.pVMR3;
2173	VM_ASSERT_EMT(pVM);
2174	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2175	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2176
2177	if (!VM_IS_EMT(pVM))
2178	return VERR_ACCESS_DENIED;
2179
2180	int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, pGCPhys);
2181
2182	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pGCPhys));
2183
2184	return rc;
2185	}
2186
2187
2188	/** @copydoc PDMDEVHLPR3::pfnVMState */
2189	static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
2190	{
2191	PDMDEV_ASSERT_DEVINS(pDevIns);
2192
2193	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2194
2195	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2196	enmVMState, VMR3GetStateName(enmVMState)));
2197	return enmVMState;
2198	}
2199
2200
2201	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2202	static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2203	{
2204	PDMDEV_ASSERT_DEVINS(pDevIns);
2205	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2206
2207	bool fRc = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMR3);
2208
2209	LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2210	return fRc;
2211	}
2212
2213
2214	/** @copydoc PDMDEVHLPR3::pfnA20Set */
2215	static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2216	{
2217	PDMDEV_ASSERT_DEVINS(pDevIns);
2218	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2219	LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2220	//Assert((unsigned )&fEnable <= 1);
2221	PGMR3PhysSetA20(pDevIns->Internal.s.pVMR3, fEnable);
2222	}
2223
2224
2225	/** @copydoc PDMDEVHLPR3::pfnVMReset */
2226	static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2227	{
2228	PDMDEV_ASSERT_DEVINS(pDevIns);
2229	PVM pVM = pDevIns->Internal.s.pVMR3;
2230	VM_ASSERT_EMT(pVM);
2231	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2232	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2233
2234	/*
2235	* We postpone this operation because we're likely to be inside a I/O instruction
2236	* and the EIP will be updated when we return.
2237	* We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2238	*/
2239	bool fHaltOnReset;
2240	int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2241	if (RT_SUCCESS(rc) && fHaltOnReset)
2242	{
2243	Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2244	rc = VINF_EM_HALT;
2245	}
2246	else
2247	{
2248	VM_FF_SET(pVM, VM_FF_RESET);
2249	rc = VINF_EM_RESET;
2250	}
2251
2252	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2253	return rc;
2254	}
2255
2256
2257	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2258	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2259	{
2260	PDMDEV_ASSERT_DEVINS(pDevIns);
2261	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2262	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2263	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2264
2265	int rc = VMR3Suspend(pDevIns->Internal.s.pVMR3);
2266
2267	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2268	return rc;
2269	}
2270
2271
2272	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2273	static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2274	{
2275	PDMDEV_ASSERT_DEVINS(pDevIns);
2276	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2277	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2278	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2279
2280	int rc = VMR3PowerOff(pDevIns->Internal.s.pVMR3);
2281
2282	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2283	return rc;
2284	}
2285
2286
2287	/** @copydoc PDMDEVHLPR3::pfnLockVM */
2288	static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns)
2289	{
2290	return VMMR3Lock(pDevIns->Internal.s.pVMR3);
2291	}
2292
2293
2294	/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2295	static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns)
2296	{
2297	return VMMR3Unlock(pDevIns->Internal.s.pVMR3);
2298	}
2299
2300
2301	/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
2302	static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
2303	{
2304	PVM pVM = pDevIns->Internal.s.pVMR3;
2305	if (VMMR3LockIsOwner(pVM))
2306	return true;
2307
2308	RTNATIVETHREAD NativeThreadOwner = VMMR3LockGetOwner(pVM);
2309	RTTHREAD ThreadOwner = RTThreadFromNative(NativeThreadOwner);
2310	char szMsg[100];
2311	RTStrPrintf(szMsg, sizeof(szMsg), "AssertVMLocked '%s'/%d ThreadOwner=%RTnthrd/%RTthrd/'%s' Self='%s'\n",
2312	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2313	NativeThreadOwner, ThreadOwner, RTThreadGetName(ThreadOwner), RTThreadSelfName());
2314	AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2315	AssertBreakpoint();
2316	return false;
2317	}
2318
2319	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2320	static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2321	{
2322	PDMDEV_ASSERT_DEVINS(pDevIns);
2323	PVM pVM = pDevIns->Internal.s.pVMR3;
2324	VM_ASSERT_EMT(pVM);
2325	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2326	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2327	int rc = VINF_SUCCESS;
2328	if (pVM->pdm.s.pDmac)
2329	pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2330	else
2331	{
2332	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2333	rc = VERR_PDM_NO_DMAC_INSTANCE;
2334	}
2335	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2336	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2337	return rc;
2338	}
2339
2340	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2341	static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
2342	{
2343	PDMDEV_ASSERT_DEVINS(pDevIns);
2344	PVM pVM = pDevIns->Internal.s.pVMR3;
2345	VM_ASSERT_EMT(pVM);
2346	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2347	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2348	int rc = VINF_SUCCESS;
2349	if (pVM->pdm.s.pDmac)
2350	{
2351	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2352	if (pcbRead)
2353	*pcbRead = cb;
2354	}
2355	else
2356	{
2357	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2358	rc = VERR_PDM_NO_DMAC_INSTANCE;
2359	}
2360	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2361	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2362	return rc;
2363	}
2364
2365	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2366	static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
2367	{
2368	PDMDEV_ASSERT_DEVINS(pDevIns);
2369	PVM pVM = pDevIns->Internal.s.pVMR3;
2370	VM_ASSERT_EMT(pVM);
2371	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2372	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2373	int rc = VINF_SUCCESS;
2374	if (pVM->pdm.s.pDmac)
2375	{
2376	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2377	if (pcbWritten)
2378	*pcbWritten = cb;
2379	}
2380	else
2381	{
2382	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2383	rc = VERR_PDM_NO_DMAC_INSTANCE;
2384	}
2385	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2386	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2387	return rc;
2388	}
2389
2390	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2391	static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2392	{
2393	PDMDEV_ASSERT_DEVINS(pDevIns);
2394	PVM pVM = pDevIns->Internal.s.pVMR3;
2395	VM_ASSERT_EMT(pVM);
2396	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2397	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2398	int rc = VINF_SUCCESS;
2399	if (pVM->pdm.s.pDmac)
2400	pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2401	else
2402	{
2403	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2404	rc = VERR_PDM_NO_DMAC_INSTANCE;
2405	}
2406	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2407	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2408	return rc;
2409	}
2410
2411	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2412	static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2413	{
2414	PDMDEV_ASSERT_DEVINS(pDevIns);
2415	PVM pVM = pDevIns->Internal.s.pVMR3;
2416	VM_ASSERT_EMT(pVM);
2417	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2418	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2419	uint8_t u8Mode;
2420	if (pVM->pdm.s.pDmac)
2421	u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2422	else
2423	{
2424	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2425	u8Mode = 3 << 2 /* illegal mode type */;
2426	}
2427	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2428	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2429	return u8Mode;
2430	}
2431
2432	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2433	static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2434	{
2435	PDMDEV_ASSERT_DEVINS(pDevIns);
2436	PVM pVM = pDevIns->Internal.s.pVMR3;
2437	VM_ASSERT_EMT(pVM);
2438	LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2439	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2440
2441	AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2442	VM_FF_SET(pVM, VM_FF_PDM_DMA);
2443	REMR3NotifyDmaPending(pVM);
2444	VMR3NotifyFF(pVM, true);
2445	}
2446
2447
2448	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2449	static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2450	{
2451	PDMDEV_ASSERT_DEVINS(pDevIns);
2452	PVM pVM = pDevIns->Internal.s.pVMR3;
2453	VM_ASSERT_EMT(pVM);
2454
2455	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2456	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2457	int rc;
2458	if (pVM->pdm.s.pRtc)
2459	rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2460	else
2461	rc = VERR_PDM_NO_RTC_INSTANCE;
2462
2463	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2464	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2465	return rc;
2466	}
2467
2468
2469	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2470	static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2471	{
2472	PDMDEV_ASSERT_DEVINS(pDevIns);
2473	PVM pVM = pDevIns->Internal.s.pVMR3;
2474	VM_ASSERT_EMT(pVM);
2475
2476	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2477	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2478	int rc;
2479	if (pVM->pdm.s.pRtc)
2480	rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2481	else
2482	rc = VERR_PDM_NO_RTC_INSTANCE;
2483
2484	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2485	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2486	return rc;
2487	}
2488
2489
2490	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2491	static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2492	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
2493	{
2494	PDMDEV_ASSERT_DEVINS(pDevIns);
2495	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2496	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2497	AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2498
2499	CPUMGetGuestCpuId(pDevIns->Internal.s.pVMR3, iLeaf, pEax, pEbx, pEcx, pEdx);
2500
2501	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - pEax=%#x pEbx=%#x pEcx=%#x pEdx=%#x\n",
2502	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pEax, pEbx, pEcx, pEdx));
2503	}
2504
2505
2506	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2507	static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
2508	{
2509	PDMDEV_ASSERT_DEVINS(pDevIns);
2510	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
2511	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
2512
2513	int rc = MMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange);
2514
2515	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2516	return rc;
2517	}
2518
2519
2520	/**
2521	* @copydoc PDMDEVHLPR3::pfnMMIO2Register
2522	*/
2523	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
2524	{
2525	PDMDEV_ASSERT_DEVINS(pDevIns);
2526	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2527	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2528	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2529
2530	int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2531
2532	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2533	return rc;
2534	}
2535
2536
2537	/**
2538	* @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2539	*/
2540	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2541	{
2542	PDMDEV_ASSERT_DEVINS(pDevIns);
2543	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2544	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=#x\n",
2545	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2546
2547	AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2548
2549	int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2550
2551	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2552	return rc;
2553	}
2554
2555
2556	/**
2557	* @copydoc PDMDEVHLPR3::pfnMMIO2Map
2558	*/
2559	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2560	{
2561	PDMDEV_ASSERT_DEVINS(pDevIns);
2562	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2563	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2564	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2565
2566	int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2567
2568	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2569	return rc;
2570	}
2571
2572
2573	/**
2574	* @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2575	*/
2576	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2577	{
2578	PDMDEV_ASSERT_DEVINS(pDevIns);
2579	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2580	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2581	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2582
2583	int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2584
2585	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2586	return rc;
2587	}
2588
2589
2590	/**
2591	* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2592	*/
2593	static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2594	const char *pszDesc, PRTRCPTR pRCPtr)
2595	{
2596	PDMDEV_ASSERT_DEVINS(pDevIns);
2597	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2598	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2599	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2600
2601	int rc = MMR3HyperMapMMIO2(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2602
2603	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pRCPtr));
2604	return rc;
2605	}
2606
2607
2608	/**
2609	* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2610	*/
2611	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2612	const char *pszDesc, PRTR0PTR pR0Ptr)
2613	{
2614	PDMDEV_ASSERT_DEVINS(pDevIns);
2615	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2616	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2617	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2618
2619	int rc = PGMR3PhysMMIO2MapKernel(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2620
2621	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pR0Ptr));
2622	return rc;
2623	}
2624
2625
2626	/**
2627	* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2628	*/
2629	static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2630	{
2631	PDMDEV_ASSERT_DEVINS(pDevIns);
2632	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2633
2634	int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2635	return rc;
2636	}
2637
2638
2639	/**
2640	* @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2641	*/
2642	static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2643	{
2644	PDMDEV_ASSERT_DEVINS(pDevIns);
2645	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2646
2647	int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2648	return rc;
2649	}
2650
2651
2652	/**
2653	* The device helper structure for trusted devices.
2654	*/
2655	const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2656	{
2657	PDM_DEVHLP_VERSION,
2658	pdmR3DevHlp_IOPortRegister,
2659	pdmR3DevHlp_IOPortRegisterGC,
2660	pdmR3DevHlp_IOPortRegisterR0,
2661	pdmR3DevHlp_IOPortDeregister,
2662	pdmR3DevHlp_MMIORegister,
2663	pdmR3DevHlp_MMIORegisterGC,
2664	pdmR3DevHlp_MMIORegisterR0,
2665	pdmR3DevHlp_MMIODeregister,
2666	pdmR3DevHlp_ROMRegister,
2667	pdmR3DevHlp_SSMRegister,
2668	pdmR3DevHlp_TMTimerCreate,
2669	pdmR3DevHlp_TMTimerCreateExternal,
2670	pdmR3DevHlp_PCIRegister,
2671	pdmR3DevHlp_PCIIORegionRegister,
2672	pdmR3DevHlp_PCISetConfigCallbacks,
2673	pdmR3DevHlp_PCISetIrq,
2674	pdmR3DevHlp_PCISetIrqNoWait,
2675	pdmR3DevHlp_ISASetIrq,
2676	pdmR3DevHlp_ISASetIrqNoWait,
2677	pdmR3DevHlp_DriverAttach,
2678	pdmR3DevHlp_MMHeapAlloc,
2679	pdmR3DevHlp_MMHeapAllocZ,
2680	pdmR3DevHlp_MMHeapFree,
2681	pdmR3DevHlp_VMSetError,
2682	pdmR3DevHlp_VMSetErrorV,
2683	pdmR3DevHlp_VMSetRuntimeError,
2684	pdmR3DevHlp_VMSetRuntimeErrorV,
2685	pdmR3DevHlp_AssertEMT,
2686	pdmR3DevHlp_AssertOther,
2687	pdmR3DevHlp_DBGFStopV,
2688	pdmR3DevHlp_DBGFInfoRegister,
2689	pdmR3DevHlp_STAMRegister,
2690	pdmR3DevHlp_STAMRegisterF,
2691	pdmR3DevHlp_STAMRegisterV,
2692	pdmR3DevHlp_RTCRegister,
2693	pdmR3DevHlp_PDMQueueCreate,
2694	pdmR3DevHlp_CritSectInit,
2695	pdmR3DevHlp_UTCNow,
2696	pdmR3DevHlp_PDMThreadCreate,
2697	pdmR3DevHlp_PhysGCPtr2GCPhys,
2698	pdmR3DevHlp_VMState,
2699	0,
2700	0,
2701	0,
2702	0,
2703	0,
2704	0,
2705	0,
2706	pdmR3DevHlp_GetVM,
2707	pdmR3DevHlp_PCIBusRegister,
2708	pdmR3DevHlp_PICRegister,
2709	pdmR3DevHlp_APICRegister,
2710	pdmR3DevHlp_IOAPICRegister,
2711	pdmR3DevHlp_DMACRegister,
2712	pdmR3DevHlp_PhysRead,
2713	pdmR3DevHlp_PhysWrite,
2714	pdmR3DevHlp_PhysReadGCVirt,
2715	pdmR3DevHlp_PhysWriteGCVirt,
2716	pdmR3DevHlp_PhysReserve,
2717	pdmR3DevHlp_Obsolete_Phys2HCVirt,
2718	pdmR3DevHlp_Obsolete_PhysGCPtr2HCPtr,
2719	pdmR3DevHlp_A20IsEnabled,
2720	pdmR3DevHlp_A20Set,
2721	pdmR3DevHlp_VMReset,
2722	pdmR3DevHlp_VMSuspend,
2723	pdmR3DevHlp_VMPowerOff,
2724	pdmR3DevHlp_LockVM,
2725	pdmR3DevHlp_UnlockVM,
2726	pdmR3DevHlp_AssertVMLock,
2727	pdmR3DevHlp_DMARegister,
2728	pdmR3DevHlp_DMAReadMemory,
2729	pdmR3DevHlp_DMAWriteMemory,
2730	pdmR3DevHlp_DMASetDREQ,
2731	pdmR3DevHlp_DMAGetChannelMode,
2732	pdmR3DevHlp_DMASchedule,
2733	pdmR3DevHlp_CMOSWrite,
2734	pdmR3DevHlp_CMOSRead,
2735	pdmR3DevHlp_GetCpuId,
2736	pdmR3DevHlp_ROMProtectShadow,
2737	pdmR3DevHlp_MMIO2Register,
2738	pdmR3DevHlp_MMIO2Deregister,
2739	pdmR3DevHlp_MMIO2Map,
2740	pdmR3DevHlp_MMIO2Unmap,
2741	pdmR3DevHlp_MMHyperMapMMIO2,
2742	pdmR3DevHlp_MMIO2MapKernel,
2743	pdmR3DevHlp_RegisterVMMDevHeap,
2744	pdmR3DevHlp_UnregisterVMMDevHeap,
2745	PDM_DEVHLP_VERSION /* the end */
2746	};
2747
2748
2749
2750
2751	/** @copydoc PDMDEVHLPR3::pfnGetVM */
2752	static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2753	{
2754	PDMDEV_ASSERT_DEVINS(pDevIns);
2755	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2756	return NULL;
2757	}
2758
2759
2760	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2761	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2762	{
2763	PDMDEV_ASSERT_DEVINS(pDevIns);
2764	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2765	NOREF(pPciBusReg);
2766	NOREF(ppPciHlpR3);
2767	return VERR_ACCESS_DENIED;
2768	}
2769
2770
2771	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2772	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2773	{
2774	PDMDEV_ASSERT_DEVINS(pDevIns);
2775	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2776	NOREF(pPicReg);
2777	NOREF(ppPicHlpR3);
2778	return VERR_ACCESS_DENIED;
2779	}
2780
2781
2782	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2783	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2784	{
2785	PDMDEV_ASSERT_DEVINS(pDevIns);
2786	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2787	NOREF(pApicReg);
2788	NOREF(ppApicHlpR3);
2789	return VERR_ACCESS_DENIED;
2790	}
2791
2792
2793	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2794	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2795	{
2796	PDMDEV_ASSERT_DEVINS(pDevIns);
2797	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2798	NOREF(pIoApicReg);
2799	NOREF(ppIoApicHlpR3);
2800	return VERR_ACCESS_DENIED;
2801	}
2802
2803
2804	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2805	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2806	{
2807	PDMDEV_ASSERT_DEVINS(pDevIns);
2808	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2809	NOREF(pDmacReg);
2810	NOREF(ppDmacHlp);
2811	return VERR_ACCESS_DENIED;
2812	}
2813
2814
2815	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2816	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2817	{
2818	PDMDEV_ASSERT_DEVINS(pDevIns);
2819	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2820	NOREF(GCPhys);
2821	NOREF(pvBuf);
2822	NOREF(cbRead);
2823	}
2824
2825
2826	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2827	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2828	{
2829	PDMDEV_ASSERT_DEVINS(pDevIns);
2830	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2831	NOREF(GCPhys);
2832	NOREF(pvBuf);
2833	NOREF(cbWrite);
2834	}
2835
2836
2837	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2838	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2839	{
2840	PDMDEV_ASSERT_DEVINS(pDevIns);
2841	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2842	NOREF(pvDst);
2843	NOREF(GCVirtSrc);
2844	NOREF(cb);
2845	return VERR_ACCESS_DENIED;
2846	}
2847
2848
2849	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2850	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2851	{
2852	PDMDEV_ASSERT_DEVINS(pDevIns);
2853	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2854	NOREF(GCVirtDst);
2855	NOREF(pvSrc);
2856	NOREF(cb);
2857	return VERR_ACCESS_DENIED;
2858	}
2859
2860
2861	/** @copydoc PDMDEVHLPR3::pfnPhysReserve */
2862	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
2863	{
2864	PDMDEV_ASSERT_DEVINS(pDevIns);
2865	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2866	NOREF(GCPhys);
2867	NOREF(cbRange);
2868	return VERR_ACCESS_DENIED;
2869	}
2870
2871
2872	/** @copydoc PDMDEVHLPR3::pfnObsoletePhys2HCVirt */
2873	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
2874	{
2875	PDMDEV_ASSERT_DEVINS(pDevIns);
2876	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2877	NOREF(GCPhys);
2878	NOREF(cbRange);
2879	NOREF(ppvHC);
2880	return VERR_ACCESS_DENIED;
2881	}
2882
2883
2884	/** @copydoc PDMDEVHLPR3::pfnObsoletePhysGCPtr2HCPtr */
2885	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
2886	{
2887	PDMDEV_ASSERT_DEVINS(pDevIns);
2888	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2889	NOREF(GCPtr);
2890	NOREF(pHCPtr);
2891	return VERR_ACCESS_DENIED;
2892	}
2893
2894
2895	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2896	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
2897	{
2898	PDMDEV_ASSERT_DEVINS(pDevIns);
2899	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2900	return false;
2901	}
2902
2903
2904	/** @copydoc PDMDEVHLPR3::pfnA20Set */
2905	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2906	{
2907	PDMDEV_ASSERT_DEVINS(pDevIns);
2908	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2909	NOREF(fEnable);
2910	}
2911
2912
2913	/** @copydoc PDMDEVHLPR3::pfnVMReset */
2914	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
2915	{
2916	PDMDEV_ASSERT_DEVINS(pDevIns);
2917	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2918	return VERR_ACCESS_DENIED;
2919	}
2920
2921
2922	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2923	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
2924	{
2925	PDMDEV_ASSERT_DEVINS(pDevIns);
2926	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2927	return VERR_ACCESS_DENIED;
2928	}
2929
2930
2931	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2932	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
2933	{
2934	PDMDEV_ASSERT_DEVINS(pDevIns);
2935	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2936	return VERR_ACCESS_DENIED;
2937	}
2938
2939
2940	/** @copydoc PDMDEVHLPR3::pfnLockVM */
2941	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns)
2942	{
2943	PDMDEV_ASSERT_DEVINS(pDevIns);
2944	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2945	return VERR_ACCESS_DENIED;
2946	}
2947
2948
2949	/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2950	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns)
2951	{
2952	PDMDEV_ASSERT_DEVINS(pDevIns);
2953	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2954	return VERR_ACCESS_DENIED;
2955	}
2956
2957
2958	/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
2959	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
2960	{
2961	PDMDEV_ASSERT_DEVINS(pDevIns);
2962	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2963	return false;
2964	}
2965
2966
2967	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2968	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2969	{
2970	PDMDEV_ASSERT_DEVINS(pDevIns);
2971	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2972	return VERR_ACCESS_DENIED;
2973	}
2974
2975
2976	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2977	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
2978	{
2979	PDMDEV_ASSERT_DEVINS(pDevIns);
2980	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2981	if (pcbRead)
2982	*pcbRead = 0;
2983	return VERR_ACCESS_DENIED;
2984	}
2985
2986
2987	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2988	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
2989	{
2990	PDMDEV_ASSERT_DEVINS(pDevIns);
2991	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2992	if (pcbWritten)
2993	*pcbWritten = 0;
2994	return VERR_ACCESS_DENIED;
2995	}
2996
2997
2998	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2999	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3000	{
3001	PDMDEV_ASSERT_DEVINS(pDevIns);
3002	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3003	return VERR_ACCESS_DENIED;
3004	}
3005
3006
3007	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
3008	static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3009	{
3010	PDMDEV_ASSERT_DEVINS(pDevIns);
3011	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3012	return 3 << 2 /* illegal mode type */;
3013	}
3014
3015
3016	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3017	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3018	{
3019	PDMDEV_ASSERT_DEVINS(pDevIns);
3020	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3021	}
3022
3023
3024	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3025	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3026	{
3027	PDMDEV_ASSERT_DEVINS(pDevIns);
3028	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3029	return VERR_ACCESS_DENIED;
3030	}
3031
3032
3033	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3034	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3035	{
3036	PDMDEV_ASSERT_DEVINS(pDevIns);
3037	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3038	return VERR_ACCESS_DENIED;
3039	}
3040
3041
3042	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3043	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3044	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3045	{
3046	PDMDEV_ASSERT_DEVINS(pDevIns);
3047	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3048	}
3049
3050
3051	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3052	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3053	{
3054	PDMDEV_ASSERT_DEVINS(pDevIns);
3055	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3056	return VERR_ACCESS_DENIED;
3057	}
3058
3059
3060	/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3061	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
3062	{
3063	PDMDEV_ASSERT_DEVINS(pDevIns);
3064	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3065	return VERR_ACCESS_DENIED;
3066	}
3067
3068
3069	/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3070	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3071	{
3072	PDMDEV_ASSERT_DEVINS(pDevIns);
3073	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3074	return VERR_ACCESS_DENIED;
3075	}
3076
3077
3078	/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3079	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3080	{
3081	PDMDEV_ASSERT_DEVINS(pDevIns);
3082	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3083	return VERR_ACCESS_DENIED;
3084	}
3085
3086
3087	/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3088	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3089	{
3090	PDMDEV_ASSERT_DEVINS(pDevIns);
3091	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3092	return VERR_ACCESS_DENIED;
3093	}
3094
3095
3096	/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3097	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3098	{
3099	PDMDEV_ASSERT_DEVINS(pDevIns);
3100	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3101	return VERR_ACCESS_DENIED;
3102	}
3103
3104
3105	/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3106	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3107	{
3108	PDMDEV_ASSERT_DEVINS(pDevIns);
3109	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3110	return VERR_ACCESS_DENIED;
3111	}
3112
3113
3114	/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3115	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3116	{
3117	PDMDEV_ASSERT_DEVINS(pDevIns);
3118	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3119	return VERR_ACCESS_DENIED;
3120	}
3121
3122
3123	/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3124	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3125	{
3126	PDMDEV_ASSERT_DEVINS(pDevIns);
3127	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3128	return VERR_ACCESS_DENIED;
3129	}
3130
3131
3132	/**
3133	* The device helper structure for non-trusted devices.
3134	*/
3135	const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3136	{
3137	PDM_DEVHLP_VERSION,
3138	pdmR3DevHlp_IOPortRegister,
3139	pdmR3DevHlp_IOPortRegisterGC,
3140	pdmR3DevHlp_IOPortRegisterR0,
3141	pdmR3DevHlp_IOPortDeregister,
3142	pdmR3DevHlp_MMIORegister,
3143	pdmR3DevHlp_MMIORegisterGC,
3144	pdmR3DevHlp_MMIORegisterR0,
3145	pdmR3DevHlp_MMIODeregister,
3146	pdmR3DevHlp_ROMRegister,
3147	pdmR3DevHlp_SSMRegister,
3148	pdmR3DevHlp_TMTimerCreate,
3149	pdmR3DevHlp_TMTimerCreateExternal,
3150	pdmR3DevHlp_PCIRegister,
3151	pdmR3DevHlp_PCIIORegionRegister,
3152	pdmR3DevHlp_PCISetConfigCallbacks,
3153	pdmR3DevHlp_PCISetIrq,
3154	pdmR3DevHlp_PCISetIrqNoWait,
3155	pdmR3DevHlp_ISASetIrq,
3156	pdmR3DevHlp_ISASetIrqNoWait,
3157	pdmR3DevHlp_DriverAttach,
3158	pdmR3DevHlp_MMHeapAlloc,
3159	pdmR3DevHlp_MMHeapAllocZ,
3160	pdmR3DevHlp_MMHeapFree,
3161	pdmR3DevHlp_VMSetError,
3162	pdmR3DevHlp_VMSetErrorV,
3163	pdmR3DevHlp_VMSetRuntimeError,
3164	pdmR3DevHlp_VMSetRuntimeErrorV,
3165	pdmR3DevHlp_AssertEMT,
3166	pdmR3DevHlp_AssertOther,
3167	pdmR3DevHlp_DBGFStopV,
3168	pdmR3DevHlp_DBGFInfoRegister,
3169	pdmR3DevHlp_STAMRegister,
3170	pdmR3DevHlp_STAMRegisterF,
3171	pdmR3DevHlp_STAMRegisterV,
3172	pdmR3DevHlp_RTCRegister,
3173	pdmR3DevHlp_PDMQueueCreate,
3174	pdmR3DevHlp_CritSectInit,
3175	pdmR3DevHlp_UTCNow,
3176	pdmR3DevHlp_PDMThreadCreate,
3177	pdmR3DevHlp_PhysGCPtr2GCPhys,
3178	pdmR3DevHlp_VMState,
3179	0,
3180	0,
3181	0,
3182	0,
3183	0,
3184	0,
3185	0,
3186	pdmR3DevHlp_Untrusted_GetVM,
3187	pdmR3DevHlp_Untrusted_PCIBusRegister,
3188	pdmR3DevHlp_Untrusted_PICRegister,
3189	pdmR3DevHlp_Untrusted_APICRegister,
3190	pdmR3DevHlp_Untrusted_IOAPICRegister,
3191	pdmR3DevHlp_Untrusted_DMACRegister,
3192	pdmR3DevHlp_Untrusted_PhysRead,
3193	pdmR3DevHlp_Untrusted_PhysWrite,
3194	pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3195	pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3196	pdmR3DevHlp_Untrusted_PhysReserve,
3197	pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt,
3198	pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr,
3199	pdmR3DevHlp_Untrusted_A20IsEnabled,
3200	pdmR3DevHlp_Untrusted_A20Set,
3201	pdmR3DevHlp_Untrusted_VMReset,
3202	pdmR3DevHlp_Untrusted_VMSuspend,
3203	pdmR3DevHlp_Untrusted_VMPowerOff,
3204	pdmR3DevHlp_Untrusted_LockVM,
3205	pdmR3DevHlp_Untrusted_UnlockVM,
3206	pdmR3DevHlp_Untrusted_AssertVMLock,
3207	pdmR3DevHlp_Untrusted_DMARegister,
3208	pdmR3DevHlp_Untrusted_DMAReadMemory,
3209	pdmR3DevHlp_Untrusted_DMAWriteMemory,
3210	pdmR3DevHlp_Untrusted_DMASetDREQ,
3211	pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3212	pdmR3DevHlp_Untrusted_DMASchedule,
3213	pdmR3DevHlp_Untrusted_CMOSWrite,
3214	pdmR3DevHlp_Untrusted_CMOSRead,
3215	pdmR3DevHlp_Untrusted_GetCpuId,
3216	pdmR3DevHlp_Untrusted_ROMProtectShadow,
3217	pdmR3DevHlp_Untrusted_MMIO2Register,
3218	pdmR3DevHlp_Untrusted_MMIO2Deregister,
3219	pdmR3DevHlp_Untrusted_MMIO2Map,
3220	pdmR3DevHlp_Untrusted_MMIO2Unmap,
3221	pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3222	pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3223	pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3224	pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3225	PDM_DEVHLP_VERSION /* the end */
3226	};
3227
3228
3229
3230	/**
3231	* Queue consumer callback for internal component.
3232	*
3233	* @returns Success indicator.
3234	* If false the item will not be removed and the flushing will stop.
3235	* @param pVM The VM handle.
3236	* @param pItem The item to consume. Upon return this item will be freed.
3237	*/
3238	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3239	{
3240	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3241	LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3242	switch (pTask->enmOp)
3243	{
3244	case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3245	PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3246	break;
3247
3248	case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3249	pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3250	break;
3251
3252	case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3253	PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3254	break;
3255
3256	default:
3257	AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3258	break;
3259	}
3260	return true;
3261	}
3262
3263	/** @} */
3264

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source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 16802

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