VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 17371

Last change on this file since 17371 was 17371, checked in by vboxsync, 16 years ago

PGM,GMM: Hacking on the new phys code.

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File size: 134.4 KB
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1/* $Id: PDMDevHlp.cpp 17371 2009-03-05 01:37:58Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/mm.h>
30#include <VBox/pgm.h>
31#include <VBox/iom.h>
32#include <VBox/rem.h>
33#include <VBox/dbgf.h>
34#include <VBox/vm.h>
35#include <VBox/vmm.h>
36
37#include <VBox/version.h>
38#include <VBox/log.h>
39#include <VBox/err.h>
40#include <iprt/asm.h>
41#include <iprt/assert.h>
42#include <iprt/string.h>
43#include <iprt/thread.h>
44
45
46/*******************************************************************************
47* Defined Constants And Macros *
48*******************************************************************************/
49/** Allow physical read and writes from any thread.
50 * (pdmR3DevHlp_PhysRead and pdmR3DevHlp_PhysWrite.)
51 */
52#define PDM_PHYS_READWRITE_FROM_ANY_THREAD
53
54
55/** @name R3 DevHlp
56 * @{
57 */
58
59
60/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
61static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
62 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
63{
64 PDMDEV_ASSERT_DEVINS(pDevIns);
65 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
66 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
67 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
68
69 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
70
71 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
72 return rc;
73}
74
75
76/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
77static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
78 const char *pszOut, const char *pszIn,
79 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
80{
81 PDMDEV_ASSERT_DEVINS(pDevIns);
82 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
83 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
84 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
85
86 /*
87 * Resolve the functions (one of the can be NULL).
88 */
89 int rc = VINF_SUCCESS;
90 if ( pDevIns->pDevReg->szRCMod[0]
91 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
92 {
93 RTRCPTR RCPtrIn = NIL_RTRCPTR;
94 if (pszIn)
95 {
96 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
97 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
98 }
99 RTRCPTR RCPtrOut = NIL_RTRCPTR;
100 if (pszOut && RT_SUCCESS(rc))
101 {
102 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
103 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
104 }
105 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
106 if (pszInStr && RT_SUCCESS(rc))
107 {
108 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
109 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
110 }
111 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
112 if (pszOutStr && RT_SUCCESS(rc))
113 {
114 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
115 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
116 }
117
118 if (RT_SUCCESS(rc))
119 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
120 }
121 else
122 {
123 AssertMsgFailed(("No GC module for this driver!\n"));
124 rc = VERR_INVALID_PARAMETER;
125 }
126
127 LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
128 return rc;
129}
130
131
132/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
133static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
134 const char *pszOut, const char *pszIn,
135 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
136{
137 PDMDEV_ASSERT_DEVINS(pDevIns);
138 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
139 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
140 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
141
142 /*
143 * Resolve the functions (one of the can be NULL).
144 */
145 int rc = VINF_SUCCESS;
146 if ( pDevIns->pDevReg->szR0Mod[0]
147 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
148 {
149 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
150 if (pszIn)
151 {
152 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
153 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
154 }
155 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
156 if (pszOut && RT_SUCCESS(rc))
157 {
158 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
159 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
160 }
161 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
162 if (pszInStr && RT_SUCCESS(rc))
163 {
164 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
165 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
166 }
167 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
168 if (pszOutStr && RT_SUCCESS(rc))
169 {
170 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
171 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
172 }
173
174 if (RT_SUCCESS(rc))
175 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
176 }
177 else
178 {
179 AssertMsgFailed(("No R0 module for this driver!\n"));
180 rc = VERR_INVALID_PARAMETER;
181 }
182
183 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
184 return rc;
185}
186
187
188/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
189static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
190{
191 PDMDEV_ASSERT_DEVINS(pDevIns);
192 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
193 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
194 Port, cPorts));
195
196 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
197
198 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
199 return rc;
200}
201
202
203/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
204static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
205 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
206 const char *pszDesc)
207{
208 PDMDEV_ASSERT_DEVINS(pDevIns);
209 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
210 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
211 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
212
213 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
214
215 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
216 return rc;
217}
218
219
220/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
221static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
222 const char *pszWrite, const char *pszRead, const char *pszFill,
223 const char *pszDesc)
224{
225 PDMDEV_ASSERT_DEVINS(pDevIns);
226 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
227 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
228 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
229
230 /*
231 * Resolve the functions.
232 * Not all function have to present, leave it to IOM to enforce this.
233 */
234 int rc = VINF_SUCCESS;
235 if ( pDevIns->pDevReg->szRCMod[0]
236 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
237 {
238 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
239 if (pszWrite)
240 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
241
242 RTRCPTR RCPtrRead = NIL_RTRCPTR;
243 int rc2 = VINF_SUCCESS;
244 if (pszRead)
245 rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
246
247 RTRCPTR RCPtrFill = NIL_RTRCPTR;
248 int rc3 = VINF_SUCCESS;
249 if (pszFill)
250 rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
251
252 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
253 rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
254 else
255 {
256 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
257 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
258 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
259 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
260 rc = rc2;
261 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
262 rc = rc3;
263 }
264 }
265 else
266 {
267 AssertMsgFailed(("No GC module for this driver!\n"));
268 rc = VERR_INVALID_PARAMETER;
269 }
270
271 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
272 return rc;
273}
274
275/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
276static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
277 const char *pszWrite, const char *pszRead, const char *pszFill,
278 const char *pszDesc)
279{
280 PDMDEV_ASSERT_DEVINS(pDevIns);
281 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
282 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
283 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
284
285 /*
286 * Resolve the functions.
287 * Not all function have to present, leave it to IOM to enforce this.
288 */
289 int rc = VINF_SUCCESS;
290 if ( pDevIns->pDevReg->szR0Mod[0]
291 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
292 {
293 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
294 if (pszWrite)
295 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
296 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
297 int rc2 = VINF_SUCCESS;
298 if (pszRead)
299 rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
300 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
301 int rc3 = VINF_SUCCESS;
302 if (pszFill)
303 rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
304 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
305 rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
306 else
307 {
308 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
309 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
310 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
311 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
312 rc = rc2;
313 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
314 rc = rc3;
315 }
316 }
317 else
318 {
319 AssertMsgFailed(("No R0 module for this driver!\n"));
320 rc = VERR_INVALID_PARAMETER;
321 }
322
323 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
324 return rc;
325}
326
327
328/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
329static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
330{
331 PDMDEV_ASSERT_DEVINS(pDevIns);
332 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
333 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
334 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
335
336 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
337
338 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
339 return rc;
340}
341
342
343/** @copydoc PDMDEVHLPR3::pfnROMRegister */
344static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
345{
346 PDMDEV_ASSERT_DEVINS(pDevIns);
347 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
348 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fShadow=%RTbool pszDesc=%p:{%s}\n",
349 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc, pszDesc));
350
351#ifdef VBOX_WITH_NEW_PHYS_CODE
352 uint32_t fFlags = 0;
353 if (fShadow)
354 fFlags |= PGMPHYS_ROM_FLAG_SHADOWED;
355 /** @todo PGMPHYS_ROM_FLAG_PERMANENT_BINARY */
356 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
357#else
358 int rc = MMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
359#endif
360
361 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
362 return rc;
363}
364
365
366/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
367static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
368 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
369 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
370{
371 PDMDEV_ASSERT_DEVINS(pDevIns);
372 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
373 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
374 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
375
376 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pszName, u32Instance, u32Version, cbGuess,
377 pfnSavePrep, pfnSaveExec, pfnSaveDone,
378 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
379
380 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
381 return rc;
382}
383
384
385/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
386static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
387{
388 PDMDEV_ASSERT_DEVINS(pDevIns);
389 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
390 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
391 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
392
393 int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
394
395 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
396 return rc;
397}
398
399
400/** @copydoc PDMDEVHLPR3::pfnTMTimerCreateExternal */
401static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)
402{
403 PDMDEV_ASSERT_DEVINS(pDevIns);
404 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
405
406 return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMR3, enmClock, pfnCallback, pvUser, pszDesc);
407}
408
409
410/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
411static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
412{
413 PDMDEV_ASSERT_DEVINS(pDevIns);
414 PVM pVM = pDevIns->Internal.s.pVMR3;
415 VM_ASSERT_EMT(pVM);
416 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
417 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
418
419 /*
420 * Validate input.
421 */
422 if (!pPciDev)
423 {
424 Assert(pPciDev);
425 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
426 return VERR_INVALID_PARAMETER;
427 }
428 if (!pPciDev->config[0] && !pPciDev->config[1])
429 {
430 Assert(pPciDev->config[0] || pPciDev->config[1]);
431 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
432 return VERR_INVALID_PARAMETER;
433 }
434 if (pDevIns->Internal.s.pPciDeviceR3)
435 {
436 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
437 * support a PDM device with multiple PCI devices. This might become a problem
438 * when upgrading the chipset for instance because of multiple functions in some
439 * devices...
440 */
441 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
442 return VERR_INTERNAL_ERROR;
443 }
444
445 /*
446 * Choose the PCI bus for the device.
447 *
448 * This is simple. If the device was configured for a particular bus, the PCIBusNo
449 * configuration value will be set. If not the default bus is 0.
450 */
451 int rc;
452 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
453 if (!pBus)
454 {
455 uint8_t u8Bus;
456 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
457 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
458 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
459 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
460 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
461 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
462 VERR_PDM_NO_PCI_BUS);
463 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
464 }
465 if (pBus->pDevInsR3)
466 {
467 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
468 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
469 else
470 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
471
472 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
473 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
474 else
475 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
476
477 /*
478 * Check the configuration for PCI device and function assignment.
479 */
480 int iDev = -1;
481 uint8_t u8Device;
482 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
483 if (RT_SUCCESS(rc))
484 {
485 if (u8Device > 31)
486 {
487 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
488 u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
489 return VERR_INTERNAL_ERROR;
490 }
491
492 uint8_t u8Function;
493 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
494 if (RT_FAILURE(rc))
495 {
496 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
497 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
498 return rc;
499 }
500 if (u8Function > 7)
501 {
502 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
503 u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
504 return VERR_INTERNAL_ERROR;
505 }
506 iDev = (u8Device << 3) | u8Function;
507 }
508 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
509 {
510 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
511 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
512 return rc;
513 }
514
515 /*
516 * Call the pci bus device to do the actual registration.
517 */
518 pdmLock(pVM);
519 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
520 pdmUnlock(pVM);
521 if (RT_SUCCESS(rc))
522 {
523 pPciDev->pDevIns = pDevIns;
524
525 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
526 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
527 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
528 else
529 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
530
531 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
532 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
533 else
534 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
535
536 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
537 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
538 }
539 }
540 else
541 {
542 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
543 rc = VERR_PDM_NO_PCI_BUS;
544 }
545
546 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
547 return rc;
548}
549
550
551/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
552static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
553{
554 PDMDEV_ASSERT_DEVINS(pDevIns);
555 PVM pVM = pDevIns->Internal.s.pVMR3;
556 VM_ASSERT_EMT(pVM);
557 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
558 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
559
560 /*
561 * Validate input.
562 */
563 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
564 {
565 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
566 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
567 return VERR_INVALID_PARAMETER;
568 }
569 switch (enmType)
570 {
571 case PCI_ADDRESS_SPACE_IO:
572 /*
573 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
574 */
575 AssertMsgReturn(cbRegion <= _32K,
576 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
577 VERR_INVALID_PARAMETER);
578 break;
579
580 case PCI_ADDRESS_SPACE_MEM:
581 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
582 /*
583 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
584 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
585 */
586 AssertMsgReturn(cbRegion <= 512 * _1M,
587 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
588 VERR_INVALID_PARAMETER);
589 break;
590 default:
591 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
592 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
593 return VERR_INVALID_PARAMETER;
594 }
595 if (!pfnCallback)
596 {
597 Assert(pfnCallback);
598 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
599 return VERR_INVALID_PARAMETER;
600 }
601 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
602
603 /*
604 * Must have a PCI device registered!
605 */
606 int rc;
607 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
608 if (pPciDev)
609 {
610 /*
611 * We're currently restricted to page aligned MMIO regions.
612 */
613 if ( (enmType == PCI_ADDRESS_SPACE_MEM || enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
614 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
615 {
616 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
617 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
618 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
619 }
620
621 /*
622 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
623 */
624 int iLastSet = ASMBitLastSetU32(cbRegion);
625 Assert(iLastSet > 0);
626 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
627 if (cbRegion > cbRegionAligned)
628 cbRegion = cbRegionAligned * 2; /* round up */
629
630 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
631 Assert(pBus);
632 pdmLock(pVM);
633 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
634 pdmUnlock(pVM);
635 }
636 else
637 {
638 AssertMsgFailed(("No PCI device registered!\n"));
639 rc = VERR_PDM_NOT_PCI_DEVICE;
640 }
641
642 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
643 return rc;
644}
645
646
647/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
648static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
649 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
650{
651 PDMDEV_ASSERT_DEVINS(pDevIns);
652 PVM pVM = pDevIns->Internal.s.pVMR3;
653 VM_ASSERT_EMT(pVM);
654 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
655 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
656
657 /*
658 * Validate input and resolve defaults.
659 */
660 AssertPtr(pfnRead);
661 AssertPtr(pfnWrite);
662 AssertPtrNull(ppfnReadOld);
663 AssertPtrNull(ppfnWriteOld);
664 AssertPtrNull(pPciDev);
665
666 if (!pPciDev)
667 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
668 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
669 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
670 AssertRelease(pBus);
671 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
672
673 /*
674 * Do the job.
675 */
676 pdmLock(pVM);
677 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
678 pdmUnlock(pVM);
679
680 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
681}
682
683
684/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
685static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
686{
687 PDMDEV_ASSERT_DEVINS(pDevIns);
688 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
689
690 /*
691 * Validate input.
692 */
693 /** @todo iIrq and iLevel checks. */
694
695 /*
696 * Must have a PCI device registered!
697 */
698 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
699 if (pPciDev)
700 {
701 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
702 Assert(pBus);
703 PVM pVM = pDevIns->Internal.s.pVMR3;
704 pdmLock(pVM);
705 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
706 pdmUnlock(pVM);
707 }
708 else
709 AssertReleaseMsgFailed(("No PCI device registered!\n"));
710
711 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
712}
713
714
715/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
716static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
717{
718 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
719}
720
721
722/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
723static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
724{
725 PDMDEV_ASSERT_DEVINS(pDevIns);
726 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
727
728 /*
729 * Validate input.
730 */
731 /** @todo iIrq and iLevel checks. */
732
733 PVM pVM = pDevIns->Internal.s.pVMR3;
734 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
735
736 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
737}
738
739
740/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
741static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
742{
743 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
744}
745
746
747/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
748static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
749{
750 PDMDEV_ASSERT_DEVINS(pDevIns);
751 PVM pVM = pDevIns->Internal.s.pVMR3;
752 VM_ASSERT_EMT(pVM);
753 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
754 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
755
756 /*
757 * Lookup the LUN, it might already be registered.
758 */
759 PPDMLUN pLunPrev = NULL;
760 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
761 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
762 if (pLun->iLun == iLun)
763 break;
764
765 /*
766 * Create the LUN if if wasn't found, else check if driver is already attached to it.
767 */
768 if (!pLun)
769 {
770 if ( !pBaseInterface
771 || !pszDesc
772 || !*pszDesc)
773 {
774 Assert(pBaseInterface);
775 Assert(pszDesc || *pszDesc);
776 return VERR_INVALID_PARAMETER;
777 }
778
779 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
780 if (!pLun)
781 return VERR_NO_MEMORY;
782
783 pLun->iLun = iLun;
784 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
785 pLun->pTop = NULL;
786 pLun->pBottom = NULL;
787 pLun->pDevIns = pDevIns;
788 pLun->pszDesc = pszDesc;
789 pLun->pBase = pBaseInterface;
790 if (!pLunPrev)
791 pDevIns->Internal.s.pLunsR3 = pLun;
792 else
793 pLunPrev->pNext = pLun;
794 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
795 iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
796 }
797 else if (pLun->pTop)
798 {
799 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
800 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
801 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
802 }
803 Assert(pLun->pBase == pBaseInterface);
804
805
806 /*
807 * Get the attached driver configuration.
808 */
809 int rc;
810 char szNode[48];
811 RTStrPrintf(szNode, sizeof(szNode), "LUN#%d", iLun);
812 PCFGMNODE pNode = CFGMR3GetChild(pDevIns->Internal.s.pCfgHandle, szNode);
813 if (pNode)
814 {
815 char *pszName;
816 rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
817 if (RT_SUCCESS(rc))
818 {
819 /*
820 * Find the driver.
821 */
822 PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
823 if (pDrv)
824 {
825 /* config node */
826 PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
827 if (!pConfigNode)
828 rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
829 if (RT_SUCCESS(rc))
830 {
831 CFGMR3SetRestrictedRoot(pConfigNode);
832
833 /*
834 * Allocate the driver instance.
835 */
836 size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
837 cb = RT_ALIGN_Z(cb, 16);
838 PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
839 if (pNew)
840 {
841 /*
842 * Initialize the instance structure (declaration order).
843 */
844 pNew->u32Version = PDM_DRVINS_VERSION;
845 //pNew->Internal.s.pUp = NULL;
846 //pNew->Internal.s.pDown = NULL;
847 pNew->Internal.s.pLun = pLun;
848 pNew->Internal.s.pDrv = pDrv;
849 pNew->Internal.s.pVM = pVM;
850 //pNew->Internal.s.fDetaching = false;
851 pNew->Internal.s.pCfgHandle = pNode;
852 pNew->pDrvHlp = &g_pdmR3DrvHlp;
853 pNew->pDrvReg = pDrv->pDrvReg;
854 pNew->pCfgHandle = pConfigNode;
855 pNew->iInstance = pDrv->cInstances++;
856 pNew->pUpBase = pBaseInterface;
857 //pNew->pDownBase = NULL;
858 //pNew->IBase.pfnQueryInterface = NULL;
859 pNew->pvInstanceData = &pNew->achInstanceData[0];
860
861 /*
862 * Link with LUN and call the constructor.
863 */
864 pLun->pTop = pLun->pBottom = pNew;
865 rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle);
866 if (RT_SUCCESS(rc))
867 {
868 MMR3HeapFree(pszName);
869 *ppBaseInterface = &pNew->IBase;
870 Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
871 pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
872 LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
873
874 return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
875 }
876
877 /*
878 * Free the driver.
879 */
880 pLun->pTop = pLun->pBottom = NULL;
881 ASMMemFill32(pNew, cb, 0xdeadd0d0);
882 MMR3HeapFree(pNew);
883 pDrv->cInstances--;
884 }
885 else
886 {
887 AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
888 rc = VERR_NO_MEMORY;
889 }
890 }
891 else
892 AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
893 }
894 else
895 {
896 AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
897 rc = VERR_PDM_DRIVER_NOT_FOUND;
898 }
899 MMR3HeapFree(pszName);
900 }
901 else
902 {
903 AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
904 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
905 rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
906 }
907 }
908 else
909 rc = VERR_PDM_NO_ATTACHED_DRIVER;
910
911
912 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
913 return rc;
914}
915
916
917/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
918static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
919{
920 PDMDEV_ASSERT_DEVINS(pDevIns);
921 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
922
923 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
924
925 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
926 return pv;
927}
928
929
930/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
931static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
932{
933 PDMDEV_ASSERT_DEVINS(pDevIns);
934 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
935
936 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
937
938 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
939 return pv;
940}
941
942
943/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
944static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
945{
946 PDMDEV_ASSERT_DEVINS(pDevIns);
947 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
948
949 MMR3HeapFree(pv);
950
951 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
952}
953
954
955/** @copydoc PDMDEVHLPR3::pfnVMSetError */
956static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
957{
958 PDMDEV_ASSERT_DEVINS(pDevIns);
959 va_list args;
960 va_start(args, pszFormat);
961 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
962 va_end(args);
963 return rc;
964}
965
966
967/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
968static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
969{
970 PDMDEV_ASSERT_DEVINS(pDevIns);
971 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
972 return rc;
973}
974
975
976/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
977static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
978{
979 PDMDEV_ASSERT_DEVINS(pDevIns);
980 va_list args;
981 va_start(args, pszFormat);
982 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFatal, pszErrorID, pszFormat, args);
983 va_end(args);
984 return rc;
985}
986
987
988/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
989static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va)
990{
991 PDMDEV_ASSERT_DEVINS(pDevIns);
992 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFatal, pszErrorID, pszFormat, va);
993 return rc;
994}
995
996
997/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
998static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
999{
1000 PDMDEV_ASSERT_DEVINS(pDevIns);
1001 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1002 return true;
1003
1004 char szMsg[100];
1005 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1006 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1007 AssertBreakpoint();
1008 return false;
1009}
1010
1011
1012/** @copydoc PDMDEVHLPR3::pfnAssertOther */
1013static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1014{
1015 PDMDEV_ASSERT_DEVINS(pDevIns);
1016 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1017 return true;
1018
1019 char szMsg[100];
1020 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1021 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1022 AssertBreakpoint();
1023 return false;
1024}
1025
1026
1027/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
1028static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
1029{
1030 PDMDEV_ASSERT_DEVINS(pDevIns);
1031#ifdef LOG_ENABLED
1032 va_list va2;
1033 va_copy(va2, args);
1034 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1035 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1036 va_end(va2);
1037#endif
1038
1039 PVM pVM = pDevIns->Internal.s.pVMR3;
1040 VM_ASSERT_EMT(pVM);
1041 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1042
1043 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1044 return rc;
1045}
1046
1047
1048/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1049static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1050{
1051 PDMDEV_ASSERT_DEVINS(pDevIns);
1052 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1053 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1054
1055 PVM pVM = pDevIns->Internal.s.pVMR3;
1056 VM_ASSERT_EMT(pVM);
1057 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1058
1059 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1060 return rc;
1061}
1062
1063
1064/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1065static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1066{
1067 PDMDEV_ASSERT_DEVINS(pDevIns);
1068 PVM pVM = pDevIns->Internal.s.pVMR3;
1069 VM_ASSERT_EMT(pVM);
1070
1071 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1072 NOREF(pVM);
1073}
1074
1075
1076
1077/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1078static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1079 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1080{
1081 PDMDEV_ASSERT_DEVINS(pDevIns);
1082 PVM pVM = pDevIns->Internal.s.pVMR3;
1083 VM_ASSERT_EMT(pVM);
1084
1085 va_list args;
1086 va_start(args, pszName);
1087 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1088 va_end(args);
1089 AssertRC(rc);
1090
1091 NOREF(pVM);
1092}
1093
1094
1095/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1096static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1097 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1098{
1099 PDMDEV_ASSERT_DEVINS(pDevIns);
1100 PVM pVM = pDevIns->Internal.s.pVMR3;
1101 VM_ASSERT_EMT(pVM);
1102
1103 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1104 AssertRC(rc);
1105
1106 NOREF(pVM);
1107}
1108
1109
1110/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1111static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1112{
1113 PDMDEV_ASSERT_DEVINS(pDevIns);
1114 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1115 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1116 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1117 pRtcReg->pfnWrite, ppRtcHlp));
1118
1119 /*
1120 * Validate input.
1121 */
1122 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1123 {
1124 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1125 PDM_RTCREG_VERSION));
1126 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1127 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1128 return VERR_INVALID_PARAMETER;
1129 }
1130 if ( !pRtcReg->pfnWrite
1131 || !pRtcReg->pfnRead)
1132 {
1133 Assert(pRtcReg->pfnWrite);
1134 Assert(pRtcReg->pfnRead);
1135 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1136 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1137 return VERR_INVALID_PARAMETER;
1138 }
1139
1140 if (!ppRtcHlp)
1141 {
1142 Assert(ppRtcHlp);
1143 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1144 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1145 return VERR_INVALID_PARAMETER;
1146 }
1147
1148 /*
1149 * Only one DMA device.
1150 */
1151 PVM pVM = pDevIns->Internal.s.pVMR3;
1152 if (pVM->pdm.s.pRtc)
1153 {
1154 AssertMsgFailed(("Only one RTC device is supported!\n"));
1155 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1156 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1157 return VERR_INVALID_PARAMETER;
1158 }
1159
1160 /*
1161 * Allocate and initialize pci bus structure.
1162 */
1163 int rc = VINF_SUCCESS;
1164 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1165 if (pRtc)
1166 {
1167 pRtc->pDevIns = pDevIns;
1168 pRtc->Reg = *pRtcReg;
1169 pVM->pdm.s.pRtc = pRtc;
1170
1171 /* set the helper pointer. */
1172 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1173 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1174 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1175 }
1176 else
1177 rc = VERR_NO_MEMORY;
1178
1179 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1180 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1181 return rc;
1182}
1183
1184
1185/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1186static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1187 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
1188{
1189 PDMDEV_ASSERT_DEVINS(pDevIns);
1190 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool ppQueue=%p\n",
1191 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
1192
1193 PVM pVM = pDevIns->Internal.s.pVMR3;
1194 VM_ASSERT_EMT(pVM);
1195 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
1196
1197 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppQueue));
1198 return rc;
1199}
1200
1201
1202/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1203static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1204{
1205 PDMDEV_ASSERT_DEVINS(pDevIns);
1206 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1207 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1208
1209 PVM pVM = pDevIns->Internal.s.pVMR3;
1210 VM_ASSERT_EMT(pVM);
1211 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1212
1213 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1214 return rc;
1215}
1216
1217
1218/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1219static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1220{
1221 PDMDEV_ASSERT_DEVINS(pDevIns);
1222 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1223 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1224
1225 pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1226
1227 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1228 return pTime;
1229}
1230
1231
1232/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1233static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1234 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1235{
1236 PDMDEV_ASSERT_DEVINS(pDevIns);
1237 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1238 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1239 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1240
1241 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1242
1243 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1244 rc, *ppThread));
1245 return rc;
1246}
1247
1248
1249/** @copydoc PDMDEVHLPR3::pfnGetVM */
1250static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1251{
1252 PDMDEV_ASSERT_DEVINS(pDevIns);
1253 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1254 return pDevIns->Internal.s.pVMR3;
1255}
1256
1257
1258/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1259static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1260{
1261 PDMDEV_ASSERT_DEVINS(pDevIns);
1262 PVM pVM = pDevIns->Internal.s.pVMR3;
1263 VM_ASSERT_EMT(pVM);
1264 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1265 ".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1266 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1267 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1268 pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1269
1270 /*
1271 * Validate the structure.
1272 */
1273 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1274 {
1275 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1276 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1277 return VERR_INVALID_PARAMETER;
1278 }
1279 if ( !pPciBusReg->pfnRegisterR3
1280 || !pPciBusReg->pfnIORegionRegisterR3
1281 || !pPciBusReg->pfnSetIrqR3
1282 || !pPciBusReg->pfnSaveExecR3
1283 || !pPciBusReg->pfnLoadExecR3
1284 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1285 {
1286 Assert(pPciBusReg->pfnRegisterR3);
1287 Assert(pPciBusReg->pfnIORegionRegisterR3);
1288 Assert(pPciBusReg->pfnSetIrqR3);
1289 Assert(pPciBusReg->pfnSaveExecR3);
1290 Assert(pPciBusReg->pfnLoadExecR3);
1291 Assert(pPciBusReg->pfnFakePCIBIOSR3);
1292 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1293 return VERR_INVALID_PARAMETER;
1294 }
1295 if ( pPciBusReg->pszSetIrqRC
1296 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
1297 {
1298 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1299 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1300 return VERR_INVALID_PARAMETER;
1301 }
1302 if ( pPciBusReg->pszSetIrqR0
1303 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
1304 {
1305 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1306 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1307 return VERR_INVALID_PARAMETER;
1308 }
1309 if (!ppPciHlpR3)
1310 {
1311 Assert(ppPciHlpR3);
1312 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1313 return VERR_INVALID_PARAMETER;
1314 }
1315
1316 /*
1317 * Find free PCI bus entry.
1318 */
1319 unsigned iBus = 0;
1320 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1321 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1322 break;
1323 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1324 {
1325 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1326 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1327 return VERR_INVALID_PARAMETER;
1328 }
1329 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1330
1331 /*
1332 * Resolve and init the RC bits.
1333 */
1334 if (pPciBusReg->pszSetIrqRC)
1335 {
1336 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1337 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1338 if (RT_FAILURE(rc))
1339 {
1340 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1341 return rc;
1342 }
1343 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1344 }
1345 else
1346 {
1347 pPciBus->pfnSetIrqRC = 0;
1348 pPciBus->pDevInsRC = 0;
1349 }
1350
1351 /*
1352 * Resolve and init the R0 bits.
1353 */
1354 if (pPciBusReg->pszSetIrqR0)
1355 {
1356 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1357 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1358 if (RT_FAILURE(rc))
1359 {
1360 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1361 return rc;
1362 }
1363 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1364 }
1365 else
1366 {
1367 pPciBus->pfnSetIrqR0 = 0;
1368 pPciBus->pDevInsR0 = 0;
1369 }
1370
1371 /*
1372 * Init the R3 bits.
1373 */
1374 pPciBus->iBus = iBus;
1375 pPciBus->pDevInsR3 = pDevIns;
1376 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1377 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1378 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1379 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1380 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1381 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1382 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1383
1384 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1385
1386 /* set the helper pointer and return. */
1387 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
1388 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1389 return VINF_SUCCESS;
1390}
1391
1392
1393/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1394static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1395{
1396 PDMDEV_ASSERT_DEVINS(pDevIns);
1397 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1398 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1399 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1400 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1401 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1402 ppPicHlpR3));
1403
1404 /*
1405 * Validate input.
1406 */
1407 if (pPicReg->u32Version != PDM_PICREG_VERSION)
1408 {
1409 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1410 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1411 return VERR_INVALID_PARAMETER;
1412 }
1413 if ( !pPicReg->pfnSetIrqR3
1414 || !pPicReg->pfnGetInterruptR3)
1415 {
1416 Assert(pPicReg->pfnSetIrqR3);
1417 Assert(pPicReg->pfnGetInterruptR3);
1418 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1419 return VERR_INVALID_PARAMETER;
1420 }
1421 if ( ( pPicReg->pszSetIrqRC
1422 || pPicReg->pszGetInterruptRC)
1423 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
1424 || !VALID_PTR(pPicReg->pszGetInterruptRC))
1425 )
1426 {
1427 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1428 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1429 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1430 return VERR_INVALID_PARAMETER;
1431 }
1432 if ( pPicReg->pszSetIrqRC
1433 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1434 {
1435 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1436 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1437 return VERR_INVALID_PARAMETER;
1438 }
1439 if ( pPicReg->pszSetIrqR0
1440 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1441 {
1442 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1443 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1444 return VERR_INVALID_PARAMETER;
1445 }
1446 if (!ppPicHlpR3)
1447 {
1448 Assert(ppPicHlpR3);
1449 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1450 return VERR_INVALID_PARAMETER;
1451 }
1452
1453 /*
1454 * Only one PIC device.
1455 */
1456 PVM pVM = pDevIns->Internal.s.pVMR3;
1457 if (pVM->pdm.s.Pic.pDevInsR3)
1458 {
1459 AssertMsgFailed(("Only one pic device is supported!\n"));
1460 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1461 return VERR_INVALID_PARAMETER;
1462 }
1463
1464 /*
1465 * RC stuff.
1466 */
1467 if (pPicReg->pszSetIrqRC)
1468 {
1469 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1470 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1471 if (RT_SUCCESS(rc))
1472 {
1473 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1474 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1475 }
1476 if (RT_FAILURE(rc))
1477 {
1478 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1479 return rc;
1480 }
1481 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1482 }
1483 else
1484 {
1485 pVM->pdm.s.Pic.pDevInsRC = 0;
1486 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1487 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1488 }
1489
1490 /*
1491 * R0 stuff.
1492 */
1493 if (pPicReg->pszSetIrqR0)
1494 {
1495 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1496 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1497 if (RT_SUCCESS(rc))
1498 {
1499 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1500 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1501 }
1502 if (RT_FAILURE(rc))
1503 {
1504 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1505 return rc;
1506 }
1507 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1508 Assert(pVM->pdm.s.Pic.pDevInsR0);
1509 }
1510 else
1511 {
1512 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1513 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1514 pVM->pdm.s.Pic.pDevInsR0 = 0;
1515 }
1516
1517 /*
1518 * R3 stuff.
1519 */
1520 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1521 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1522 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1523 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1524
1525 /* set the helper pointer and return. */
1526 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
1527 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1528 return VINF_SUCCESS;
1529}
1530
1531
1532/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1533static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1534{
1535 PDMDEV_ASSERT_DEVINS(pDevIns);
1536 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1537 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1538 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1539 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}} ppApicHlpR3=%p\n",
1540 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1541 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pszGetInterruptRC,
1542 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1543 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1544 pApicReg->pszBusDeliverRC, ppApicHlpR3));
1545
1546 /*
1547 * Validate input.
1548 */
1549 if (pApicReg->u32Version != PDM_APICREG_VERSION)
1550 {
1551 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1552 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1553 return VERR_INVALID_PARAMETER;
1554 }
1555 if ( !pApicReg->pfnGetInterruptR3
1556 || !pApicReg->pfnHasPendingIrqR3
1557 || !pApicReg->pfnSetBaseR3
1558 || !pApicReg->pfnGetBaseR3
1559 || !pApicReg->pfnSetTPRR3
1560 || !pApicReg->pfnGetTPRR3
1561 || !pApicReg->pfnWriteMSRR3
1562 || !pApicReg->pfnReadMSRR3
1563 || !pApicReg->pfnBusDeliverR3)
1564 {
1565 Assert(pApicReg->pfnGetInterruptR3);
1566 Assert(pApicReg->pfnHasPendingIrqR3);
1567 Assert(pApicReg->pfnSetBaseR3);
1568 Assert(pApicReg->pfnGetBaseR3);
1569 Assert(pApicReg->pfnSetTPRR3);
1570 Assert(pApicReg->pfnGetTPRR3);
1571 Assert(pApicReg->pfnWriteMSRR3);
1572 Assert(pApicReg->pfnReadMSRR3);
1573 Assert(pApicReg->pfnBusDeliverR3);
1574 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1575 return VERR_INVALID_PARAMETER;
1576 }
1577 if ( ( pApicReg->pszGetInterruptRC
1578 || pApicReg->pszHasPendingIrqRC
1579 || pApicReg->pszSetBaseRC
1580 || pApicReg->pszGetBaseRC
1581 || pApicReg->pszSetTPRRC
1582 || pApicReg->pszGetTPRRC
1583 || pApicReg->pszWriteMSRRC
1584 || pApicReg->pszReadMSRRC
1585 || pApicReg->pszBusDeliverRC)
1586 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1587 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1588 || !VALID_PTR(pApicReg->pszSetBaseRC)
1589 || !VALID_PTR(pApicReg->pszGetBaseRC)
1590 || !VALID_PTR(pApicReg->pszSetTPRRC)
1591 || !VALID_PTR(pApicReg->pszGetTPRRC)
1592 || !VALID_PTR(pApicReg->pszWriteMSRRC)
1593 || !VALID_PTR(pApicReg->pszReadMSRRC)
1594 || !VALID_PTR(pApicReg->pszBusDeliverRC))
1595 )
1596 {
1597 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1598 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1599 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1600 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1601 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1602 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1603 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1604 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1605 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1606 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1607 return VERR_INVALID_PARAMETER;
1608 }
1609 if ( ( pApicReg->pszGetInterruptR0
1610 || pApicReg->pszHasPendingIrqR0
1611 || pApicReg->pszSetBaseR0
1612 || pApicReg->pszGetBaseR0
1613 || pApicReg->pszSetTPRR0
1614 || pApicReg->pszGetTPRR0
1615 || pApicReg->pszWriteMSRR0
1616 || pApicReg->pszReadMSRR0
1617 || pApicReg->pszBusDeliverR0)
1618 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1619 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1620 || !VALID_PTR(pApicReg->pszSetBaseR0)
1621 || !VALID_PTR(pApicReg->pszGetBaseR0)
1622 || !VALID_PTR(pApicReg->pszSetTPRR0)
1623 || !VALID_PTR(pApicReg->pszGetTPRR0)
1624 || !VALID_PTR(pApicReg->pszReadMSRR0)
1625 || !VALID_PTR(pApicReg->pszWriteMSRR0)
1626 || !VALID_PTR(pApicReg->pszBusDeliverR0))
1627 )
1628 {
1629 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1630 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1631 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1632 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1633 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1634 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1635 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1636 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1637 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1638 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1639 return VERR_INVALID_PARAMETER;
1640 }
1641 if (!ppApicHlpR3)
1642 {
1643 Assert(ppApicHlpR3);
1644 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1645 return VERR_INVALID_PARAMETER;
1646 }
1647
1648 /*
1649 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
1650 * as they need to communicate and share state easily.
1651 */
1652 PVM pVM = pDevIns->Internal.s.pVMR3;
1653 if (pVM->pdm.s.Apic.pDevInsR3)
1654 {
1655 AssertMsgFailed(("Only one apic device is supported!\n"));
1656 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1657 return VERR_INVALID_PARAMETER;
1658 }
1659
1660 /*
1661 * Resolve & initialize the RC bits.
1662 */
1663 if (pApicReg->pszGetInterruptRC)
1664 {
1665 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1666 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1667 if (RT_SUCCESS(rc))
1668 {
1669 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1670 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1671 }
1672 if (RT_SUCCESS(rc))
1673 {
1674 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1675 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1676 }
1677 if (RT_SUCCESS(rc))
1678 {
1679 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1680 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1681 }
1682 if (RT_SUCCESS(rc))
1683 {
1684 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1685 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1686 }
1687 if (RT_SUCCESS(rc))
1688 {
1689 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1690 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1691 }
1692 if (RT_SUCCESS(rc))
1693 {
1694 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1695 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1696 }
1697 if (RT_SUCCESS(rc))
1698 {
1699 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1700 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1701 }
1702 if (RT_SUCCESS(rc))
1703 {
1704 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1705 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1706 }
1707 if (RT_FAILURE(rc))
1708 {
1709 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1710 return rc;
1711 }
1712 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1713 }
1714 else
1715 {
1716 pVM->pdm.s.Apic.pDevInsRC = 0;
1717 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1718 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1719 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1720 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1721 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1722 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1723 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1724 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1725 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1726 }
1727
1728 /*
1729 * Resolve & initialize the R0 bits.
1730 */
1731 if (pApicReg->pszGetInterruptR0)
1732 {
1733 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1734 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1735 if (RT_SUCCESS(rc))
1736 {
1737 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1738 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1739 }
1740 if (RT_SUCCESS(rc))
1741 {
1742 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1743 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1744 }
1745 if (RT_SUCCESS(rc))
1746 {
1747 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1748 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1749 }
1750 if (RT_SUCCESS(rc))
1751 {
1752 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1753 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1754 }
1755 if (RT_SUCCESS(rc))
1756 {
1757 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1758 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1759 }
1760 if (RT_SUCCESS(rc))
1761 {
1762 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1763 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1764 }
1765 if (RT_SUCCESS(rc))
1766 {
1767 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1768 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1769 }
1770 if (RT_SUCCESS(rc))
1771 {
1772 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1773 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1774 }
1775 if (RT_FAILURE(rc))
1776 {
1777 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1778 return rc;
1779 }
1780 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1781 Assert(pVM->pdm.s.Apic.pDevInsR0);
1782 }
1783 else
1784 {
1785 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1786 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1787 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1788 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1789 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1790 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1791 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1792 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1793 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1794 pVM->pdm.s.Apic.pDevInsR0 = 0;
1795 }
1796
1797 /*
1798 * Initialize the HC bits.
1799 */
1800 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1801 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1802 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1803 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1804 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1805 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1806 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1807 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1808 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1809 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1810 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1811
1812 /* set the helper pointer and return. */
1813 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
1814 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1815 return VINF_SUCCESS;
1816}
1817
1818
1819/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1820static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1821{
1822 PDMDEV_ASSERT_DEVINS(pDevIns);
1823 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1824 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1825 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1826 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1827
1828 /*
1829 * Validate input.
1830 */
1831 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1832 {
1833 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1834 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1835 return VERR_INVALID_PARAMETER;
1836 }
1837 if (!pIoApicReg->pfnSetIrqR3)
1838 {
1839 Assert(pIoApicReg->pfnSetIrqR3);
1840 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1841 return VERR_INVALID_PARAMETER;
1842 }
1843 if ( pIoApicReg->pszSetIrqRC
1844 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
1845 {
1846 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1847 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1848 return VERR_INVALID_PARAMETER;
1849 }
1850 if ( pIoApicReg->pszSetIrqR0
1851 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
1852 {
1853 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1854 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1855 return VERR_INVALID_PARAMETER;
1856 }
1857 if (!ppIoApicHlpR3)
1858 {
1859 Assert(ppIoApicHlpR3);
1860 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1861 return VERR_INVALID_PARAMETER;
1862 }
1863
1864 /*
1865 * The I/O APIC requires the APIC to be present (hacks++).
1866 * If the I/O APIC does GC stuff so must the APIC.
1867 */
1868 PVM pVM = pDevIns->Internal.s.pVMR3;
1869 if (!pVM->pdm.s.Apic.pDevInsR3)
1870 {
1871 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1872 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1873 return VERR_INVALID_PARAMETER;
1874 }
1875 if ( pIoApicReg->pszSetIrqRC
1876 && !pVM->pdm.s.Apic.pDevInsRC)
1877 {
1878 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1879 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1880 return VERR_INVALID_PARAMETER;
1881 }
1882
1883 /*
1884 * Only one I/O APIC device.
1885 */
1886 if (pVM->pdm.s.IoApic.pDevInsR3)
1887 {
1888 AssertMsgFailed(("Only one ioapic device is supported!\n"));
1889 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1890 return VERR_INVALID_PARAMETER;
1891 }
1892
1893 /*
1894 * Resolve & initialize the GC bits.
1895 */
1896 if (pIoApicReg->pszSetIrqRC)
1897 {
1898 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
1899 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
1900 if (RT_FAILURE(rc))
1901 {
1902 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1903 return rc;
1904 }
1905 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1906 }
1907 else
1908 {
1909 pVM->pdm.s.IoApic.pDevInsRC = 0;
1910 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
1911 }
1912
1913 /*
1914 * Resolve & initialize the R0 bits.
1915 */
1916 if (pIoApicReg->pszSetIrqR0)
1917 {
1918 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
1919 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
1920 if (RT_FAILURE(rc))
1921 {
1922 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1923 return rc;
1924 }
1925 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1926 Assert(pVM->pdm.s.IoApic.pDevInsR0);
1927 }
1928 else
1929 {
1930 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
1931 pVM->pdm.s.IoApic.pDevInsR0 = 0;
1932 }
1933
1934 /*
1935 * Initialize the R3 bits.
1936 */
1937 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
1938 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
1939 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1940
1941 /* set the helper pointer and return. */
1942 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
1943 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1944 return VINF_SUCCESS;
1945}
1946
1947
1948/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
1949static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
1950{
1951 PDMDEV_ASSERT_DEVINS(pDevIns);
1952 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1953 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
1954 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
1955 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
1956
1957 /*
1958 * Validate input.
1959 */
1960 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
1961 {
1962 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
1963 PDM_DMACREG_VERSION));
1964 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
1965 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1966 return VERR_INVALID_PARAMETER;
1967 }
1968 if ( !pDmacReg->pfnRun
1969 || !pDmacReg->pfnRegister
1970 || !pDmacReg->pfnReadMemory
1971 || !pDmacReg->pfnWriteMemory
1972 || !pDmacReg->pfnSetDREQ
1973 || !pDmacReg->pfnGetChannelMode)
1974 {
1975 Assert(pDmacReg->pfnRun);
1976 Assert(pDmacReg->pfnRegister);
1977 Assert(pDmacReg->pfnReadMemory);
1978 Assert(pDmacReg->pfnWriteMemory);
1979 Assert(pDmacReg->pfnSetDREQ);
1980 Assert(pDmacReg->pfnGetChannelMode);
1981 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1982 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1983 return VERR_INVALID_PARAMETER;
1984 }
1985
1986 if (!ppDmacHlp)
1987 {
1988 Assert(ppDmacHlp);
1989 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
1990 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1991 return VERR_INVALID_PARAMETER;
1992 }
1993
1994 /*
1995 * Only one DMA device.
1996 */
1997 PVM pVM = pDevIns->Internal.s.pVMR3;
1998 if (pVM->pdm.s.pDmac)
1999 {
2000 AssertMsgFailed(("Only one DMA device is supported!\n"));
2001 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2002 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2003 return VERR_INVALID_PARAMETER;
2004 }
2005
2006 /*
2007 * Allocate and initialize pci bus structure.
2008 */
2009 int rc = VINF_SUCCESS;
2010 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2011 if (pDmac)
2012 {
2013 pDmac->pDevIns = pDevIns;
2014 pDmac->Reg = *pDmacReg;
2015 pVM->pdm.s.pDmac = pDmac;
2016
2017 /* set the helper pointer. */
2018 *ppDmacHlp = &g_pdmR3DevDmacHlp;
2019 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2020 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2021 }
2022 else
2023 rc = VERR_NO_MEMORY;
2024
2025 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2026 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2027 return rc;
2028}
2029
2030
2031/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2032static DECLCALLBACK(void) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2033{
2034 PDMDEV_ASSERT_DEVINS(pDevIns);
2035 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2036 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2037
2038 /*
2039 * For the convenience of the device we put no thread restriction on this interface.
2040 * That means we'll have to check which thread we're in and choose our path.
2041 */
2042#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
2043 PGMPhysRead(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
2044#else
2045 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMR3))
2046 PGMPhysRead(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
2047 else
2048 {
2049 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2050 PVMREQ pReq;
2051 AssertCompileSize(RTGCPHYS, 4);
2052 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMR3, &pReq, RT_INDEFINITE_WAIT,
2053 (PFNRT)PGMPhysRead, 4, pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
2054 while (rc == VERR_TIMEOUT)
2055 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
2056 AssertReleaseRC(rc);
2057 VMR3ReqFree(pReq);
2058 }
2059#endif
2060 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2061}
2062
2063
2064/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2065static DECLCALLBACK(void) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2066{
2067 PDMDEV_ASSERT_DEVINS(pDevIns);
2068 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2069 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2070
2071 /*
2072 * For the convenience of the device we put no thread restriction on this interface.
2073 * That means we'll have to check which thread we're in and choose our path.
2074 */
2075#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
2076 PGMPhysWrite(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
2077#else
2078 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMR3))
2079 PGMPhysWrite(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
2080 else
2081 {
2082 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2083 PVMREQ pReq;
2084 AssertCompileSize(RTGCPHYS, 4);
2085 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMR3, &pReq, RT_INDEFINITE_WAIT,
2086 (PFNRT)PGMPhysWrite, 4, pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
2087 while (rc == VERR_TIMEOUT)
2088 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
2089 AssertReleaseRC(rc);
2090 VMR3ReqFree(pReq);
2091 }
2092#endif
2093 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2094}
2095
2096
2097/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2098static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2099{
2100 PDMDEV_ASSERT_DEVINS(pDevIns);
2101 PVM pVM = pDevIns->Internal.s.pVMR3;
2102 VM_ASSERT_EMT(pVM);
2103 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2104 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2105
2106 if (!VM_IS_EMT(pVM))
2107 return VERR_ACCESS_DENIED;
2108
2109 int rc = PGMPhysSimpleReadGCPtr(pVM, pvDst, GCVirtSrc, cb);
2110
2111 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2112
2113 return rc;
2114}
2115
2116
2117/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2118static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2119{
2120 PDMDEV_ASSERT_DEVINS(pDevIns);
2121 PVM pVM = pDevIns->Internal.s.pVMR3;
2122 VM_ASSERT_EMT(pVM);
2123 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2124 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2125
2126 if (!VM_IS_EMT(pVM))
2127 return VERR_ACCESS_DENIED;
2128
2129 int rc = PGMPhysSimpleWriteGCPtr(pVM, GCVirtDst, pvSrc, cb);
2130
2131 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2132
2133 return rc;
2134}
2135
2136
2137/** @copydoc PDMDEVHLPR3::pfnPhysReserve */
2138static DECLCALLBACK(int) pdmR3DevHlp_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
2139{
2140#ifdef VBOX_WITH_NEW_PHYS_CODE
2141 AssertFailed();
2142 return VERR_ACCESS_DENIED;
2143#else
2144 PDMDEV_ASSERT_DEVINS(pDevIns);
2145 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2146 LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: GCPhys=%RGp cbRange=%#x pszDesc=%p:{%s}\n",
2147 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, cbRange, pszDesc, pszDesc));
2148
2149 int rc = MMR3PhysReserve(pDevIns->Internal.s.pVMR3, GCPhys, cbRange, pszDesc);
2150
2151 LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2152
2153 return rc;
2154#endif
2155}
2156
2157
2158/** @copydoc PDMDEVHLPR3::pfnObsoletePhys2HCVirt */
2159static DECLCALLBACK(int) pdmR3DevHlp_Obsolete_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
2160{
2161 PDMDEV_ASSERT_DEVINS(pDevIns);
2162 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2163 NOREF(GCPhys);
2164 NOREF(cbRange);
2165 NOREF(ppvHC);
2166 return VERR_ACCESS_DENIED;
2167}
2168
2169
2170/** @copydoc PDMDEVHLPR3::pfnObsoletePhysGCPtr2HCPtr */
2171static DECLCALLBACK(int) pdmR3DevHlp_Obsolete_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
2172{
2173 PDMDEV_ASSERT_DEVINS(pDevIns);
2174 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2175 NOREF(GCPtr);
2176 NOREF(pHCPtr);
2177 return VERR_ACCESS_DENIED;
2178}
2179
2180
2181/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2182static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2183{
2184 PDMDEV_ASSERT_DEVINS(pDevIns);
2185 PVM pVM = pDevIns->Internal.s.pVMR3;
2186 VM_ASSERT_EMT(pVM);
2187 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2188 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2189
2190 if (!VM_IS_EMT(pVM))
2191 return VERR_ACCESS_DENIED;
2192
2193 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, pGCPhys);
2194
2195 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pGCPhys));
2196
2197 return rc;
2198}
2199
2200
2201/** @copydoc PDMDEVHLPR3::pfnVMState */
2202static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
2203{
2204 PDMDEV_ASSERT_DEVINS(pDevIns);
2205
2206 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2207
2208 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2209 enmVMState, VMR3GetStateName(enmVMState)));
2210 return enmVMState;
2211}
2212
2213
2214/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2215static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2216{
2217 PDMDEV_ASSERT_DEVINS(pDevIns);
2218 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2219
2220 bool fRc = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMR3);
2221
2222 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2223 return fRc;
2224}
2225
2226
2227/** @copydoc PDMDEVHLPR3::pfnA20Set */
2228static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2229{
2230 PDMDEV_ASSERT_DEVINS(pDevIns);
2231 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2232 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2233 //Assert(*(unsigned *)&fEnable <= 1);
2234 PGMR3PhysSetA20(pDevIns->Internal.s.pVMR3, fEnable);
2235}
2236
2237
2238/** @copydoc PDMDEVHLPR3::pfnVMReset */
2239static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2240{
2241 PDMDEV_ASSERT_DEVINS(pDevIns);
2242 PVM pVM = pDevIns->Internal.s.pVMR3;
2243 VM_ASSERT_EMT(pVM);
2244 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2245 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2246
2247 /*
2248 * We postpone this operation because we're likely to be inside a I/O instruction
2249 * and the EIP will be updated when we return.
2250 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2251 */
2252 bool fHaltOnReset;
2253 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2254 if (RT_SUCCESS(rc) && fHaltOnReset)
2255 {
2256 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2257 rc = VINF_EM_HALT;
2258 }
2259 else
2260 {
2261 VM_FF_SET(pVM, VM_FF_RESET);
2262 rc = VINF_EM_RESET;
2263 }
2264
2265 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2266 return rc;
2267}
2268
2269
2270/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2271static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2272{
2273 PDMDEV_ASSERT_DEVINS(pDevIns);
2274 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2275 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2276 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2277
2278 int rc = VMR3Suspend(pDevIns->Internal.s.pVMR3);
2279
2280 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2281 return rc;
2282}
2283
2284
2285/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2286static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2287{
2288 PDMDEV_ASSERT_DEVINS(pDevIns);
2289 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2290 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2291 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2292
2293 int rc = VMR3PowerOff(pDevIns->Internal.s.pVMR3);
2294
2295 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2296 return rc;
2297}
2298
2299
2300/** @copydoc PDMDEVHLPR3::pfnLockVM */
2301static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns)
2302{
2303 return VMMR3Lock(pDevIns->Internal.s.pVMR3);
2304}
2305
2306
2307/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2308static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns)
2309{
2310 return VMMR3Unlock(pDevIns->Internal.s.pVMR3);
2311}
2312
2313
2314/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
2315static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2316{
2317 PVM pVM = pDevIns->Internal.s.pVMR3;
2318 if (VMMR3LockIsOwner(pVM))
2319 return true;
2320
2321 RTNATIVETHREAD NativeThreadOwner = VMMR3LockGetOwner(pVM);
2322 RTTHREAD ThreadOwner = RTThreadFromNative(NativeThreadOwner);
2323 char szMsg[100];
2324 RTStrPrintf(szMsg, sizeof(szMsg), "AssertVMLocked '%s'/%d ThreadOwner=%RTnthrd/%RTthrd/'%s' Self='%s'\n",
2325 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2326 NativeThreadOwner, ThreadOwner, RTThreadGetName(ThreadOwner), RTThreadSelfName());
2327 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2328 AssertBreakpoint();
2329 return false;
2330}
2331
2332/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2333static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2334{
2335 PDMDEV_ASSERT_DEVINS(pDevIns);
2336 PVM pVM = pDevIns->Internal.s.pVMR3;
2337 VM_ASSERT_EMT(pVM);
2338 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2339 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2340 int rc = VINF_SUCCESS;
2341 if (pVM->pdm.s.pDmac)
2342 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2343 else
2344 {
2345 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2346 rc = VERR_PDM_NO_DMAC_INSTANCE;
2347 }
2348 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2349 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2350 return rc;
2351}
2352
2353/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2354static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
2355{
2356 PDMDEV_ASSERT_DEVINS(pDevIns);
2357 PVM pVM = pDevIns->Internal.s.pVMR3;
2358 VM_ASSERT_EMT(pVM);
2359 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2360 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2361 int rc = VINF_SUCCESS;
2362 if (pVM->pdm.s.pDmac)
2363 {
2364 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2365 if (pcbRead)
2366 *pcbRead = cb;
2367 }
2368 else
2369 {
2370 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2371 rc = VERR_PDM_NO_DMAC_INSTANCE;
2372 }
2373 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2374 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2375 return rc;
2376}
2377
2378/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2379static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
2380{
2381 PDMDEV_ASSERT_DEVINS(pDevIns);
2382 PVM pVM = pDevIns->Internal.s.pVMR3;
2383 VM_ASSERT_EMT(pVM);
2384 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2385 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2386 int rc = VINF_SUCCESS;
2387 if (pVM->pdm.s.pDmac)
2388 {
2389 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2390 if (pcbWritten)
2391 *pcbWritten = cb;
2392 }
2393 else
2394 {
2395 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2396 rc = VERR_PDM_NO_DMAC_INSTANCE;
2397 }
2398 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2399 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2400 return rc;
2401}
2402
2403/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2404static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2405{
2406 PDMDEV_ASSERT_DEVINS(pDevIns);
2407 PVM pVM = pDevIns->Internal.s.pVMR3;
2408 VM_ASSERT_EMT(pVM);
2409 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2410 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2411 int rc = VINF_SUCCESS;
2412 if (pVM->pdm.s.pDmac)
2413 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2414 else
2415 {
2416 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2417 rc = VERR_PDM_NO_DMAC_INSTANCE;
2418 }
2419 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2420 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2421 return rc;
2422}
2423
2424/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2425static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2426{
2427 PDMDEV_ASSERT_DEVINS(pDevIns);
2428 PVM pVM = pDevIns->Internal.s.pVMR3;
2429 VM_ASSERT_EMT(pVM);
2430 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2431 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2432 uint8_t u8Mode;
2433 if (pVM->pdm.s.pDmac)
2434 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2435 else
2436 {
2437 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2438 u8Mode = 3 << 2 /* illegal mode type */;
2439 }
2440 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2441 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2442 return u8Mode;
2443}
2444
2445/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2446static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2447{
2448 PDMDEV_ASSERT_DEVINS(pDevIns);
2449 PVM pVM = pDevIns->Internal.s.pVMR3;
2450 VM_ASSERT_EMT(pVM);
2451 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2452 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2453
2454 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2455 VM_FF_SET(pVM, VM_FF_PDM_DMA);
2456 REMR3NotifyDmaPending(pVM);
2457 VMR3NotifyFF(pVM, true);
2458}
2459
2460
2461/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2462static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2463{
2464 PDMDEV_ASSERT_DEVINS(pDevIns);
2465 PVM pVM = pDevIns->Internal.s.pVMR3;
2466 VM_ASSERT_EMT(pVM);
2467
2468 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2469 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2470 int rc;
2471 if (pVM->pdm.s.pRtc)
2472 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2473 else
2474 rc = VERR_PDM_NO_RTC_INSTANCE;
2475
2476 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2477 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2478 return rc;
2479}
2480
2481
2482/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2483static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2484{
2485 PDMDEV_ASSERT_DEVINS(pDevIns);
2486 PVM pVM = pDevIns->Internal.s.pVMR3;
2487 VM_ASSERT_EMT(pVM);
2488
2489 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2490 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2491 int rc;
2492 if (pVM->pdm.s.pRtc)
2493 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2494 else
2495 rc = VERR_PDM_NO_RTC_INSTANCE;
2496
2497 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2498 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2499 return rc;
2500}
2501
2502
2503/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2504static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2505 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
2506{
2507 PDMDEV_ASSERT_DEVINS(pDevIns);
2508 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2509 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2510 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2511
2512 CPUMGetGuestCpuId(pDevIns->Internal.s.pVMR3, iLeaf, pEax, pEbx, pEcx, pEdx);
2513
2514 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
2515 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
2516}
2517
2518
2519/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2520static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
2521{
2522 PDMDEV_ASSERT_DEVINS(pDevIns);
2523 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
2524 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
2525
2526#ifdef VBOX_WITH_NEW_PHYS_CODE
2527 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
2528#else
2529 int rc = MMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange);
2530#endif
2531
2532 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2533 return rc;
2534}
2535
2536
2537/**
2538 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
2539 */
2540static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
2541{
2542 PDMDEV_ASSERT_DEVINS(pDevIns);
2543 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2544 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2545 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2546
2547 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2548
2549 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2550 return rc;
2551}
2552
2553
2554/**
2555 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2556 */
2557static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2558{
2559 PDMDEV_ASSERT_DEVINS(pDevIns);
2560 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2561 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=#x\n",
2562 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2563
2564 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2565
2566 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2567
2568 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2569 return rc;
2570}
2571
2572
2573/**
2574 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
2575 */
2576static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2577{
2578 PDMDEV_ASSERT_DEVINS(pDevIns);
2579 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2580 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2581 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2582
2583 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2584
2585 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2586 return rc;
2587}
2588
2589
2590/**
2591 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2592 */
2593static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2594{
2595 PDMDEV_ASSERT_DEVINS(pDevIns);
2596 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2597 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2598 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2599
2600 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2601
2602 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2603 return rc;
2604}
2605
2606
2607/**
2608 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2609 */
2610static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2611 const char *pszDesc, PRTRCPTR pRCPtr)
2612{
2613 PDMDEV_ASSERT_DEVINS(pDevIns);
2614 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2615 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2616 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2617
2618 int rc = MMR3HyperMapMMIO2(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2619
2620 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pRCPtr));
2621 return rc;
2622}
2623
2624
2625/**
2626 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2627 */
2628static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2629 const char *pszDesc, PRTR0PTR pR0Ptr)
2630{
2631 PDMDEV_ASSERT_DEVINS(pDevIns);
2632 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2633 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2634 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2635
2636 int rc = PGMR3PhysMMIO2MapKernel(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2637
2638 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pR0Ptr));
2639 return rc;
2640}
2641
2642
2643/**
2644 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2645 */
2646static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2647{
2648 PDMDEV_ASSERT_DEVINS(pDevIns);
2649 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2650
2651 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2652 return rc;
2653}
2654
2655
2656/**
2657 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2658 */
2659static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2660{
2661 PDMDEV_ASSERT_DEVINS(pDevIns);
2662 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2663
2664 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2665 return rc;
2666}
2667
2668
2669/**
2670 * The device helper structure for trusted devices.
2671 */
2672const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2673{
2674 PDM_DEVHLP_VERSION,
2675 pdmR3DevHlp_IOPortRegister,
2676 pdmR3DevHlp_IOPortRegisterGC,
2677 pdmR3DevHlp_IOPortRegisterR0,
2678 pdmR3DevHlp_IOPortDeregister,
2679 pdmR3DevHlp_MMIORegister,
2680 pdmR3DevHlp_MMIORegisterGC,
2681 pdmR3DevHlp_MMIORegisterR0,
2682 pdmR3DevHlp_MMIODeregister,
2683 pdmR3DevHlp_ROMRegister,
2684 pdmR3DevHlp_SSMRegister,
2685 pdmR3DevHlp_TMTimerCreate,
2686 pdmR3DevHlp_TMTimerCreateExternal,
2687 pdmR3DevHlp_PCIRegister,
2688 pdmR3DevHlp_PCIIORegionRegister,
2689 pdmR3DevHlp_PCISetConfigCallbacks,
2690 pdmR3DevHlp_PCISetIrq,
2691 pdmR3DevHlp_PCISetIrqNoWait,
2692 pdmR3DevHlp_ISASetIrq,
2693 pdmR3DevHlp_ISASetIrqNoWait,
2694 pdmR3DevHlp_DriverAttach,
2695 pdmR3DevHlp_MMHeapAlloc,
2696 pdmR3DevHlp_MMHeapAllocZ,
2697 pdmR3DevHlp_MMHeapFree,
2698 pdmR3DevHlp_VMSetError,
2699 pdmR3DevHlp_VMSetErrorV,
2700 pdmR3DevHlp_VMSetRuntimeError,
2701 pdmR3DevHlp_VMSetRuntimeErrorV,
2702 pdmR3DevHlp_AssertEMT,
2703 pdmR3DevHlp_AssertOther,
2704 pdmR3DevHlp_DBGFStopV,
2705 pdmR3DevHlp_DBGFInfoRegister,
2706 pdmR3DevHlp_STAMRegister,
2707 pdmR3DevHlp_STAMRegisterF,
2708 pdmR3DevHlp_STAMRegisterV,
2709 pdmR3DevHlp_RTCRegister,
2710 pdmR3DevHlp_PDMQueueCreate,
2711 pdmR3DevHlp_CritSectInit,
2712 pdmR3DevHlp_UTCNow,
2713 pdmR3DevHlp_PDMThreadCreate,
2714 pdmR3DevHlp_PhysGCPtr2GCPhys,
2715 pdmR3DevHlp_VMState,
2716 0,
2717 0,
2718 0,
2719 0,
2720 0,
2721 0,
2722 0,
2723 pdmR3DevHlp_GetVM,
2724 pdmR3DevHlp_PCIBusRegister,
2725 pdmR3DevHlp_PICRegister,
2726 pdmR3DevHlp_APICRegister,
2727 pdmR3DevHlp_IOAPICRegister,
2728 pdmR3DevHlp_DMACRegister,
2729 pdmR3DevHlp_PhysRead,
2730 pdmR3DevHlp_PhysWrite,
2731 pdmR3DevHlp_PhysReadGCVirt,
2732 pdmR3DevHlp_PhysWriteGCVirt,
2733 pdmR3DevHlp_PhysReserve,
2734 pdmR3DevHlp_Obsolete_Phys2HCVirt,
2735 pdmR3DevHlp_Obsolete_PhysGCPtr2HCPtr,
2736 pdmR3DevHlp_A20IsEnabled,
2737 pdmR3DevHlp_A20Set,
2738 pdmR3DevHlp_VMReset,
2739 pdmR3DevHlp_VMSuspend,
2740 pdmR3DevHlp_VMPowerOff,
2741 pdmR3DevHlp_LockVM,
2742 pdmR3DevHlp_UnlockVM,
2743 pdmR3DevHlp_AssertVMLock,
2744 pdmR3DevHlp_DMARegister,
2745 pdmR3DevHlp_DMAReadMemory,
2746 pdmR3DevHlp_DMAWriteMemory,
2747 pdmR3DevHlp_DMASetDREQ,
2748 pdmR3DevHlp_DMAGetChannelMode,
2749 pdmR3DevHlp_DMASchedule,
2750 pdmR3DevHlp_CMOSWrite,
2751 pdmR3DevHlp_CMOSRead,
2752 pdmR3DevHlp_GetCpuId,
2753 pdmR3DevHlp_ROMProtectShadow,
2754 pdmR3DevHlp_MMIO2Register,
2755 pdmR3DevHlp_MMIO2Deregister,
2756 pdmR3DevHlp_MMIO2Map,
2757 pdmR3DevHlp_MMIO2Unmap,
2758 pdmR3DevHlp_MMHyperMapMMIO2,
2759 pdmR3DevHlp_MMIO2MapKernel,
2760 pdmR3DevHlp_RegisterVMMDevHeap,
2761 pdmR3DevHlp_UnregisterVMMDevHeap,
2762 PDM_DEVHLP_VERSION /* the end */
2763};
2764
2765
2766
2767
2768/** @copydoc PDMDEVHLPR3::pfnGetVM */
2769static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2770{
2771 PDMDEV_ASSERT_DEVINS(pDevIns);
2772 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2773 return NULL;
2774}
2775
2776
2777/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2778static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2779{
2780 PDMDEV_ASSERT_DEVINS(pDevIns);
2781 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2782 NOREF(pPciBusReg);
2783 NOREF(ppPciHlpR3);
2784 return VERR_ACCESS_DENIED;
2785}
2786
2787
2788/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2789static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2790{
2791 PDMDEV_ASSERT_DEVINS(pDevIns);
2792 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2793 NOREF(pPicReg);
2794 NOREF(ppPicHlpR3);
2795 return VERR_ACCESS_DENIED;
2796}
2797
2798
2799/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2800static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2801{
2802 PDMDEV_ASSERT_DEVINS(pDevIns);
2803 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2804 NOREF(pApicReg);
2805 NOREF(ppApicHlpR3);
2806 return VERR_ACCESS_DENIED;
2807}
2808
2809
2810/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2811static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2812{
2813 PDMDEV_ASSERT_DEVINS(pDevIns);
2814 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2815 NOREF(pIoApicReg);
2816 NOREF(ppIoApicHlpR3);
2817 return VERR_ACCESS_DENIED;
2818}
2819
2820
2821/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2822static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2823{
2824 PDMDEV_ASSERT_DEVINS(pDevIns);
2825 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2826 NOREF(pDmacReg);
2827 NOREF(ppDmacHlp);
2828 return VERR_ACCESS_DENIED;
2829}
2830
2831
2832/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2833static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2834{
2835 PDMDEV_ASSERT_DEVINS(pDevIns);
2836 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2837 NOREF(GCPhys);
2838 NOREF(pvBuf);
2839 NOREF(cbRead);
2840}
2841
2842
2843/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2844static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2845{
2846 PDMDEV_ASSERT_DEVINS(pDevIns);
2847 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2848 NOREF(GCPhys);
2849 NOREF(pvBuf);
2850 NOREF(cbWrite);
2851}
2852
2853
2854/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2855static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2856{
2857 PDMDEV_ASSERT_DEVINS(pDevIns);
2858 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2859 NOREF(pvDst);
2860 NOREF(GCVirtSrc);
2861 NOREF(cb);
2862 return VERR_ACCESS_DENIED;
2863}
2864
2865
2866/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2867static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2868{
2869 PDMDEV_ASSERT_DEVINS(pDevIns);
2870 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2871 NOREF(GCVirtDst);
2872 NOREF(pvSrc);
2873 NOREF(cb);
2874 return VERR_ACCESS_DENIED;
2875}
2876
2877
2878/** @copydoc PDMDEVHLPR3::pfnPhysReserve */
2879static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
2880{
2881 PDMDEV_ASSERT_DEVINS(pDevIns);
2882 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2883 NOREF(GCPhys);
2884 NOREF(cbRange);
2885 return VERR_ACCESS_DENIED;
2886}
2887
2888
2889/** @copydoc PDMDEVHLPR3::pfnObsoletePhys2HCVirt */
2890static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
2891{
2892 PDMDEV_ASSERT_DEVINS(pDevIns);
2893 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2894 NOREF(GCPhys);
2895 NOREF(cbRange);
2896 NOREF(ppvHC);
2897 return VERR_ACCESS_DENIED;
2898}
2899
2900
2901/** @copydoc PDMDEVHLPR3::pfnObsoletePhysGCPtr2HCPtr */
2902static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
2903{
2904 PDMDEV_ASSERT_DEVINS(pDevIns);
2905 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2906 NOREF(GCPtr);
2907 NOREF(pHCPtr);
2908 return VERR_ACCESS_DENIED;
2909}
2910
2911
2912/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2913static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
2914{
2915 PDMDEV_ASSERT_DEVINS(pDevIns);
2916 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2917 return false;
2918}
2919
2920
2921/** @copydoc PDMDEVHLPR3::pfnA20Set */
2922static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2923{
2924 PDMDEV_ASSERT_DEVINS(pDevIns);
2925 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2926 NOREF(fEnable);
2927}
2928
2929
2930/** @copydoc PDMDEVHLPR3::pfnVMReset */
2931static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
2932{
2933 PDMDEV_ASSERT_DEVINS(pDevIns);
2934 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2935 return VERR_ACCESS_DENIED;
2936}
2937
2938
2939/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2940static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
2941{
2942 PDMDEV_ASSERT_DEVINS(pDevIns);
2943 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2944 return VERR_ACCESS_DENIED;
2945}
2946
2947
2948/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2949static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
2950{
2951 PDMDEV_ASSERT_DEVINS(pDevIns);
2952 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2953 return VERR_ACCESS_DENIED;
2954}
2955
2956
2957/** @copydoc PDMDEVHLPR3::pfnLockVM */
2958static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns)
2959{
2960 PDMDEV_ASSERT_DEVINS(pDevIns);
2961 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2962 return VERR_ACCESS_DENIED;
2963}
2964
2965
2966/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2967static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns)
2968{
2969 PDMDEV_ASSERT_DEVINS(pDevIns);
2970 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2971 return VERR_ACCESS_DENIED;
2972}
2973
2974
2975/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
2976static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2977{
2978 PDMDEV_ASSERT_DEVINS(pDevIns);
2979 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2980 return false;
2981}
2982
2983
2984/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2985static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2986{
2987 PDMDEV_ASSERT_DEVINS(pDevIns);
2988 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2989 return VERR_ACCESS_DENIED;
2990}
2991
2992
2993/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2994static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
2995{
2996 PDMDEV_ASSERT_DEVINS(pDevIns);
2997 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2998 if (pcbRead)
2999 *pcbRead = 0;
3000 return VERR_ACCESS_DENIED;
3001}
3002
3003
3004/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
3005static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3006{
3007 PDMDEV_ASSERT_DEVINS(pDevIns);
3008 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3009 if (pcbWritten)
3010 *pcbWritten = 0;
3011 return VERR_ACCESS_DENIED;
3012}
3013
3014
3015/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
3016static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3017{
3018 PDMDEV_ASSERT_DEVINS(pDevIns);
3019 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3020 return VERR_ACCESS_DENIED;
3021}
3022
3023
3024/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
3025static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3026{
3027 PDMDEV_ASSERT_DEVINS(pDevIns);
3028 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3029 return 3 << 2 /* illegal mode type */;
3030}
3031
3032
3033/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3034static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3035{
3036 PDMDEV_ASSERT_DEVINS(pDevIns);
3037 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3038}
3039
3040
3041/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3042static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3043{
3044 PDMDEV_ASSERT_DEVINS(pDevIns);
3045 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3046 return VERR_ACCESS_DENIED;
3047}
3048
3049
3050/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3051static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3052{
3053 PDMDEV_ASSERT_DEVINS(pDevIns);
3054 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3055 return VERR_ACCESS_DENIED;
3056}
3057
3058
3059/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3060static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3061 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3062{
3063 PDMDEV_ASSERT_DEVINS(pDevIns);
3064 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3065}
3066
3067
3068/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3069static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3070{
3071 PDMDEV_ASSERT_DEVINS(pDevIns);
3072 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3073 return VERR_ACCESS_DENIED;
3074}
3075
3076
3077/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3078static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3079{
3080 PDMDEV_ASSERT_DEVINS(pDevIns);
3081 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3082 return VERR_ACCESS_DENIED;
3083}
3084
3085
3086/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3087static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3088{
3089 PDMDEV_ASSERT_DEVINS(pDevIns);
3090 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3091 return VERR_ACCESS_DENIED;
3092}
3093
3094
3095/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3096static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3097{
3098 PDMDEV_ASSERT_DEVINS(pDevIns);
3099 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3100 return VERR_ACCESS_DENIED;
3101}
3102
3103
3104/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3105static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3106{
3107 PDMDEV_ASSERT_DEVINS(pDevIns);
3108 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3109 return VERR_ACCESS_DENIED;
3110}
3111
3112
3113/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3114static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3115{
3116 PDMDEV_ASSERT_DEVINS(pDevIns);
3117 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3118 return VERR_ACCESS_DENIED;
3119}
3120
3121
3122/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3123static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3124{
3125 PDMDEV_ASSERT_DEVINS(pDevIns);
3126 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3127 return VERR_ACCESS_DENIED;
3128}
3129
3130
3131/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3132static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3133{
3134 PDMDEV_ASSERT_DEVINS(pDevIns);
3135 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3136 return VERR_ACCESS_DENIED;
3137}
3138
3139
3140/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3141static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3142{
3143 PDMDEV_ASSERT_DEVINS(pDevIns);
3144 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3145 return VERR_ACCESS_DENIED;
3146}
3147
3148
3149/**
3150 * The device helper structure for non-trusted devices.
3151 */
3152const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3153{
3154 PDM_DEVHLP_VERSION,
3155 pdmR3DevHlp_IOPortRegister,
3156 pdmR3DevHlp_IOPortRegisterGC,
3157 pdmR3DevHlp_IOPortRegisterR0,
3158 pdmR3DevHlp_IOPortDeregister,
3159 pdmR3DevHlp_MMIORegister,
3160 pdmR3DevHlp_MMIORegisterGC,
3161 pdmR3DevHlp_MMIORegisterR0,
3162 pdmR3DevHlp_MMIODeregister,
3163 pdmR3DevHlp_ROMRegister,
3164 pdmR3DevHlp_SSMRegister,
3165 pdmR3DevHlp_TMTimerCreate,
3166 pdmR3DevHlp_TMTimerCreateExternal,
3167 pdmR3DevHlp_PCIRegister,
3168 pdmR3DevHlp_PCIIORegionRegister,
3169 pdmR3DevHlp_PCISetConfigCallbacks,
3170 pdmR3DevHlp_PCISetIrq,
3171 pdmR3DevHlp_PCISetIrqNoWait,
3172 pdmR3DevHlp_ISASetIrq,
3173 pdmR3DevHlp_ISASetIrqNoWait,
3174 pdmR3DevHlp_DriverAttach,
3175 pdmR3DevHlp_MMHeapAlloc,
3176 pdmR3DevHlp_MMHeapAllocZ,
3177 pdmR3DevHlp_MMHeapFree,
3178 pdmR3DevHlp_VMSetError,
3179 pdmR3DevHlp_VMSetErrorV,
3180 pdmR3DevHlp_VMSetRuntimeError,
3181 pdmR3DevHlp_VMSetRuntimeErrorV,
3182 pdmR3DevHlp_AssertEMT,
3183 pdmR3DevHlp_AssertOther,
3184 pdmR3DevHlp_DBGFStopV,
3185 pdmR3DevHlp_DBGFInfoRegister,
3186 pdmR3DevHlp_STAMRegister,
3187 pdmR3DevHlp_STAMRegisterF,
3188 pdmR3DevHlp_STAMRegisterV,
3189 pdmR3DevHlp_RTCRegister,
3190 pdmR3DevHlp_PDMQueueCreate,
3191 pdmR3DevHlp_CritSectInit,
3192 pdmR3DevHlp_UTCNow,
3193 pdmR3DevHlp_PDMThreadCreate,
3194 pdmR3DevHlp_PhysGCPtr2GCPhys,
3195 pdmR3DevHlp_VMState,
3196 0,
3197 0,
3198 0,
3199 0,
3200 0,
3201 0,
3202 0,
3203 pdmR3DevHlp_Untrusted_GetVM,
3204 pdmR3DevHlp_Untrusted_PCIBusRegister,
3205 pdmR3DevHlp_Untrusted_PICRegister,
3206 pdmR3DevHlp_Untrusted_APICRegister,
3207 pdmR3DevHlp_Untrusted_IOAPICRegister,
3208 pdmR3DevHlp_Untrusted_DMACRegister,
3209 pdmR3DevHlp_Untrusted_PhysRead,
3210 pdmR3DevHlp_Untrusted_PhysWrite,
3211 pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3212 pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3213 pdmR3DevHlp_Untrusted_PhysReserve,
3214 pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt,
3215 pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr,
3216 pdmR3DevHlp_Untrusted_A20IsEnabled,
3217 pdmR3DevHlp_Untrusted_A20Set,
3218 pdmR3DevHlp_Untrusted_VMReset,
3219 pdmR3DevHlp_Untrusted_VMSuspend,
3220 pdmR3DevHlp_Untrusted_VMPowerOff,
3221 pdmR3DevHlp_Untrusted_LockVM,
3222 pdmR3DevHlp_Untrusted_UnlockVM,
3223 pdmR3DevHlp_Untrusted_AssertVMLock,
3224 pdmR3DevHlp_Untrusted_DMARegister,
3225 pdmR3DevHlp_Untrusted_DMAReadMemory,
3226 pdmR3DevHlp_Untrusted_DMAWriteMemory,
3227 pdmR3DevHlp_Untrusted_DMASetDREQ,
3228 pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3229 pdmR3DevHlp_Untrusted_DMASchedule,
3230 pdmR3DevHlp_Untrusted_CMOSWrite,
3231 pdmR3DevHlp_Untrusted_CMOSRead,
3232 pdmR3DevHlp_Untrusted_GetCpuId,
3233 pdmR3DevHlp_Untrusted_ROMProtectShadow,
3234 pdmR3DevHlp_Untrusted_MMIO2Register,
3235 pdmR3DevHlp_Untrusted_MMIO2Deregister,
3236 pdmR3DevHlp_Untrusted_MMIO2Map,
3237 pdmR3DevHlp_Untrusted_MMIO2Unmap,
3238 pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3239 pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3240 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3241 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3242 PDM_DEVHLP_VERSION /* the end */
3243};
3244
3245
3246
3247/**
3248 * Queue consumer callback for internal component.
3249 *
3250 * @returns Success indicator.
3251 * If false the item will not be removed and the flushing will stop.
3252 * @param pVM The VM handle.
3253 * @param pItem The item to consume. Upon return this item will be freed.
3254 */
3255DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3256{
3257 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3258 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3259 switch (pTask->enmOp)
3260 {
3261 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3262 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3263 break;
3264
3265 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3266 pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3267 break;
3268
3269 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3270 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3271 break;
3272
3273 default:
3274 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3275 break;
3276 }
3277 return true;
3278}
3279
3280/** @} */
3281
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