PDMDevHlp.cpp@ 18626

Last change on this file since 18626 was 18534, checked in by vboxsync, 16 years ago
PDMDevHlp: Added deadlock detection to the Phys APIs (disabled unless you're me).
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 135.5 KB

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1	/* $Id: PDMDevHlp.cpp 18534 2009-03-30 12:03:12Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, Device Helpers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27	#include "PDMInternal.h"
28	#include <VBox/pdm.h>
29	#include <VBox/mm.h>
30	#include <VBox/pgm.h>
31	#include <VBox/iom.h>
32	#include <VBox/rem.h>
33	#include <VBox/dbgf.h>
34	#include <VBox/vm.h>
35	#include <VBox/vmm.h>
36
37	#include <VBox/version.h>
38	#include <VBox/log.h>
39	#include <VBox/err.h>
40	#include <iprt/asm.h>
41	#include <iprt/assert.h>
42	#include <iprt/string.h>
43	#include <iprt/thread.h>
44
45
46	/*******************************************************************************
47	* Defined Constants And Macros *
48	*******************************************************************************/
49	/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50	* Define this to enable the deadlock detection when accessing physical memory.
51	*/
52	#if defined(DEBUG_bird) \|\| defined(DOXYGEN_RUNNING)
53	# define PDM_DEVHLP_DEADLOCK_DETECTION
54	#endif
55
56
57	/*******************************************************************************
58	* Defined Constants And Macros *
59	*******************************************************************************/
60	/** @name R3 DevHlp
61	* @{
62	*/
63
64
65	/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
66	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67	PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68	{
69	PDMDEV_ASSERT_DEVINS(pDevIns);
70	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
71	Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74	int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
75
76	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
77	return rc;
78	}
79
80
81	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
82	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
83	const char pszOut, const char pszIn,
84	const char pszOutStr, const char pszInStr, const char *pszDesc)
85	{
86	PDMDEV_ASSERT_DEVINS(pDevIns);
87	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
88	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
89	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
90
91	/*
92	* Resolve the functions (one of the can be NULL).
93	*/
94	int rc = VINF_SUCCESS;
95	if ( pDevIns->pDevReg->szRCMod[0]
96	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
97	{
98	RTRCPTR RCPtrIn = NIL_RTRCPTR;
99	if (pszIn)
100	{
101	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
102	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
103	}
104	RTRCPTR RCPtrOut = NIL_RTRCPTR;
105	if (pszOut && RT_SUCCESS(rc))
106	{
107	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
108	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
109	}
110	RTRCPTR RCPtrInStr = NIL_RTRCPTR;
111	if (pszInStr && RT_SUCCESS(rc))
112	{
113	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
114	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
115	}
116	RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
117	if (pszOutStr && RT_SUCCESS(rc))
118	{
119	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
120	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
121	}
122
123	if (RT_SUCCESS(rc))
124	rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
125	}
126	else
127	{
128	AssertMsgFailed(("No GC module for this driver!\n"));
129	rc = VERR_INVALID_PARAMETER;
130	}
131
132	LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
133	return rc;
134	}
135
136
137	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
138	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
139	const char pszOut, const char pszIn,
140	const char pszOutStr, const char pszInStr, const char *pszDesc)
141	{
142	PDMDEV_ASSERT_DEVINS(pDevIns);
143	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
144	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
145	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
146
147	/*
148	* Resolve the functions (one of the can be NULL).
149	*/
150	int rc = VINF_SUCCESS;
151	if ( pDevIns->pDevReg->szR0Mod[0]
152	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
153	{
154	R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
155	if (pszIn)
156	{
157	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
158	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
159	}
160	R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
161	if (pszOut && RT_SUCCESS(rc))
162	{
163	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
164	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
165	}
166	R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
167	if (pszInStr && RT_SUCCESS(rc))
168	{
169	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
170	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
171	}
172	R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
173	if (pszOutStr && RT_SUCCESS(rc))
174	{
175	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
176	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
177	}
178
179	if (RT_SUCCESS(rc))
180	rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
181	}
182	else
183	{
184	AssertMsgFailed(("No R0 module for this driver!\n"));
185	rc = VERR_INVALID_PARAMETER;
186	}
187
188	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
189	return rc;
190	}
191
192
193	/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
194	static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
195	{
196	PDMDEV_ASSERT_DEVINS(pDevIns);
197	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
198	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
199	Port, cPorts));
200
201	int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
202
203	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
204	return rc;
205	}
206
207
208	/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
209	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
210	PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
211	const char *pszDesc)
212	{
213	PDMDEV_ASSERT_DEVINS(pDevIns);
214	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
215	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
216	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
217
218	int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
219
220	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
221	return rc;
222	}
223
224
225	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
226	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
227	const char pszWrite, const char pszRead, const char *pszFill,
228	const char *pszDesc)
229	{
230	PDMDEV_ASSERT_DEVINS(pDevIns);
231	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
232	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
233	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
234
235	/*
236	* Resolve the functions.
237	* Not all function have to present, leave it to IOM to enforce this.
238	*/
239	int rc = VINF_SUCCESS;
240	if ( pDevIns->pDevReg->szRCMod[0]
241	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
242	{
243	RTRCPTR RCPtrWrite = NIL_RTRCPTR;
244	if (pszWrite)
245	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
246
247	RTRCPTR RCPtrRead = NIL_RTRCPTR;
248	int rc2 = VINF_SUCCESS;
249	if (pszRead)
250	rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
251
252	RTRCPTR RCPtrFill = NIL_RTRCPTR;
253	int rc3 = VINF_SUCCESS;
254	if (pszFill)
255	rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
256
257	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
258	rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
259	else
260	{
261	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
262	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
263	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
264	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
265	rc = rc2;
266	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
267	rc = rc3;
268	}
269	}
270	else
271	{
272	AssertMsgFailed(("No GC module for this driver!\n"));
273	rc = VERR_INVALID_PARAMETER;
274	}
275
276	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
277	return rc;
278	}
279
280	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
281	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
282	const char pszWrite, const char pszRead, const char *pszFill,
283	const char *pszDesc)
284	{
285	PDMDEV_ASSERT_DEVINS(pDevIns);
286	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
287	LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
288	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
289
290	/*
291	* Resolve the functions.
292	* Not all function have to present, leave it to IOM to enforce this.
293	*/
294	int rc = VINF_SUCCESS;
295	if ( pDevIns->pDevReg->szR0Mod[0]
296	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
297	{
298	R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
299	if (pszWrite)
300	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
301	R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
302	int rc2 = VINF_SUCCESS;
303	if (pszRead)
304	rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
305	R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
306	int rc3 = VINF_SUCCESS;
307	if (pszFill)
308	rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
309	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
310	rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
311	else
312	{
313	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
314	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
315	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
316	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
317	rc = rc2;
318	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
319	rc = rc3;
320	}
321	}
322	else
323	{
324	AssertMsgFailed(("No R0 module for this driver!\n"));
325	rc = VERR_INVALID_PARAMETER;
326	}
327
328	LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
329	return rc;
330	}
331
332
333	/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
334	static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
335	{
336	PDMDEV_ASSERT_DEVINS(pDevIns);
337	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
338	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
339	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
340
341	int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
342
343	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
344	return rc;
345	}
346
347
348	/** @copydoc PDMDEVHLPR3::pfnROMRegister */
349	static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void pvBinary, uint32_t fFlags, const char pszDesc)
350	{
351	PDMDEV_ASSERT_DEVINS(pDevIns);
352	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
353	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
354	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
355
356	#ifdef VBOX_WITH_NEW_PHYS_CODE
357	int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
358	#else
359	int rc = MMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary,
360	!!(fFlags & PGMPHYS_ROM_FLAGS_SHADOWED), pszDesc);
361	#endif
362
363	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
364	return rc;
365	}
366
367
368	/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
369	static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
370	PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
371	PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
372	{
373	PDMDEV_ASSERT_DEVINS(pDevIns);
374	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
375	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
376	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
377
378	int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pszName, u32Instance, u32Version, cbGuess,
379	pfnSavePrep, pfnSaveExec, pfnSaveDone,
380	pfnLoadPrep, pfnLoadExec, pfnLoadDone);
381
382	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
383	return rc;
384	}
385
386
387	/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
388	static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
389	{
390	PDMDEV_ASSERT_DEVINS(pDevIns);
391	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
392	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
393	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
394
395	int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
396
397	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
398	return rc;
399	}
400
401
402	/** @copydoc PDMDEVHLPR3::pfnTMTimerCreateExternal */
403	static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void pvUser, const char pszDesc)
404	{
405	PDMDEV_ASSERT_DEVINS(pDevIns);
406	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
407
408	return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMR3, enmClock, pfnCallback, pvUser, pszDesc);
409	}
410
411
412	/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
413	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
414	{
415	PDMDEV_ASSERT_DEVINS(pDevIns);
416	PVM pVM = pDevIns->Internal.s.pVMR3;
417	VM_ASSERT_EMT(pVM);
418	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
419	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
420
421	/*
422	* Validate input.
423	*/
424	if (!pPciDev)
425	{
426	Assert(pPciDev);
427	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
428	return VERR_INVALID_PARAMETER;
429	}
430	if (!pPciDev->config[0] && !pPciDev->config[1])
431	{
432	Assert(pPciDev->config[0] \|\| pPciDev->config[1]);
433	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
434	return VERR_INVALID_PARAMETER;
435	}
436	if (pDevIns->Internal.s.pPciDeviceR3)
437	{
438	/** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
439	* support a PDM device with multiple PCI devices. This might become a problem
440	* when upgrading the chipset for instance because of multiple functions in some
441	* devices...
442	*/
443	AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
444	return VERR_INTERNAL_ERROR;
445	}
446
447	/*
448	* Choose the PCI bus for the device.
449	*
450	* This is simple. If the device was configured for a particular bus, the PCIBusNo
451	* configuration value will be set. If not the default bus is 0.
452	*/
453	int rc;
454	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
455	if (!pBus)
456	{
457	uint8_t u8Bus;
458	rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
459	AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
460	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
461	AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
462	("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
463	RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
464	VERR_PDM_NO_PCI_BUS);
465	pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
466	}
467	if (pBus->pDevInsR3)
468	{
469	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
470	pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
471	else
472	pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
473
474	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
475	pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
476	else
477	pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
478
479	/*
480	* Check the configuration for PCI device and function assignment.
481	*/
482	int iDev = -1;
483	uint8_t u8Device;
484	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
485	if (RT_SUCCESS(rc))
486	{
487	if (u8Device > 31)
488	{
489	AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
490	u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
491	return VERR_INTERNAL_ERROR;
492	}
493
494	uint8_t u8Function;
495	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
496	if (RT_FAILURE(rc))
497	{
498	AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
499	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
500	return rc;
501	}
502	if (u8Function > 7)
503	{
504	AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
505	u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
506	return VERR_INTERNAL_ERROR;
507	}
508	iDev = (u8Device << 3) \| u8Function;
509	}
510	else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
511	{
512	AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
513	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
514	return rc;
515	}
516
517	/*
518	* Call the pci bus device to do the actual registration.
519	*/
520	pdmLock(pVM);
521	rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
522	pdmUnlock(pVM);
523	if (RT_SUCCESS(rc))
524	{
525	pPciDev->pDevIns = pDevIns;
526
527	pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
528	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
529	pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
530	else
531	pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
532
533	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
534	pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
535	else
536	pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
537
538	Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
539	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
540	}
541	}
542	else
543	{
544	AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
545	rc = VERR_PDM_NO_PCI_BUS;
546	}
547
548	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
549	return rc;
550	}
551
552
553	/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
554	static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
555	{
556	PDMDEV_ASSERT_DEVINS(pDevIns);
557	PVM pVM = pDevIns->Internal.s.pVMR3;
558	VM_ASSERT_EMT(pVM);
559	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
560	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
561
562	/*
563	* Validate input.
564	*/
565	if (iRegion < 0 \|\| iRegion >= PCI_NUM_REGIONS)
566	{
567	Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
568	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
569	return VERR_INVALID_PARAMETER;
570	}
571	switch (enmType)
572	{
573	case PCI_ADDRESS_SPACE_IO:
574	/*
575	* Sanity check: don't allow to register more than 32K of the PCI I/O space.
576	*/
577	AssertMsgReturn(cbRegion <= _32K,
578	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
579	VERR_INVALID_PARAMETER);
580	break;
581
582	case PCI_ADDRESS_SPACE_MEM:
583	case PCI_ADDRESS_SPACE_MEM_PREFETCH:
584	/*
585	* Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
586	* now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
587	*/
588	AssertMsgReturn(cbRegion <= 512 * _1M,
589	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
590	VERR_INVALID_PARAMETER);
591	break;
592	default:
593	AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
594	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
595	return VERR_INVALID_PARAMETER;
596	}
597	if (!pfnCallback)
598	{
599	Assert(pfnCallback);
600	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
601	return VERR_INVALID_PARAMETER;
602	}
603	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
604
605	/*
606	* Must have a PCI device registered!
607	*/
608	int rc;
609	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
610	if (pPciDev)
611	{
612	/*
613	* We're currently restricted to page aligned MMIO regions.
614	*/
615	if ( (enmType == PCI_ADDRESS_SPACE_MEM \|\| enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
616	&& cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
617	{
618	Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
619	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
620	cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
621	}
622
623	/*
624	* For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
625	*/
626	int iLastSet = ASMBitLastSetU32(cbRegion);
627	Assert(iLastSet > 0);
628	uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
629	if (cbRegion > cbRegionAligned)
630	cbRegion = cbRegionAligned * 2; /* round up */
631
632	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
633	Assert(pBus);
634	pdmLock(pVM);
635	rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
636	pdmUnlock(pVM);
637	}
638	else
639	{
640	AssertMsgFailed(("No PCI device registered!\n"));
641	rc = VERR_PDM_NOT_PCI_DEVICE;
642	}
643
644	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
645	return rc;
646	}
647
648
649	/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
650	static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
651	PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
652	{
653	PDMDEV_ASSERT_DEVINS(pDevIns);
654	PVM pVM = pDevIns->Internal.s.pVMR3;
655	VM_ASSERT_EMT(pVM);
656	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
657	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
658
659	/*
660	* Validate input and resolve defaults.
661	*/
662	AssertPtr(pfnRead);
663	AssertPtr(pfnWrite);
664	AssertPtrNull(ppfnReadOld);
665	AssertPtrNull(ppfnWriteOld);
666	AssertPtrNull(pPciDev);
667
668	if (!pPciDev)
669	pPciDev = pDevIns->Internal.s.pPciDeviceR3;
670	AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
671	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
672	AssertRelease(pBus);
673	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
674
675	/*
676	* Do the job.
677	*/
678	pdmLock(pVM);
679	pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
680	pdmUnlock(pVM);
681
682	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
683	}
684
685
686	/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
687	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
688	{
689	PDMDEV_ASSERT_DEVINS(pDevIns);
690	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
691
692	/*
693	* Validate input.
694	*/
695	/** @todo iIrq and iLevel checks. */
696
697	/*
698	* Must have a PCI device registered!
699	*/
700	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
701	if (pPciDev)
702	{
703	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
704	Assert(pBus);
705	PVM pVM = pDevIns->Internal.s.pVMR3;
706	pdmLock(pVM);
707	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
708	pdmUnlock(pVM);
709	}
710	else
711	AssertReleaseMsgFailed(("No PCI device registered!\n"));
712
713	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
714	}
715
716
717	/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
718	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
719	{
720	pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
721	}
722
723
724	/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
725	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
726	{
727	PDMDEV_ASSERT_DEVINS(pDevIns);
728	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
729
730	/*
731	* Validate input.
732	*/
733	/** @todo iIrq and iLevel checks. */
734
735	PVM pVM = pDevIns->Internal.s.pVMR3;
736	PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
737
738	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
739	}
740
741
742	/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
743	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
744	{
745	pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
746	}
747
748
749	/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
750	static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE ppBaseInterface, const char pszDesc)
751	{
752	PDMDEV_ASSERT_DEVINS(pDevIns);
753	PVM pVM = pDevIns->Internal.s.pVMR3;
754	VM_ASSERT_EMT(pVM);
755	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
756	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
757
758	/*
759	* Lookup the LUN, it might already be registered.
760	*/
761	PPDMLUN pLunPrev = NULL;
762	PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
763	for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
764	if (pLun->iLun == iLun)
765	break;
766
767	/*
768	* Create the LUN if if wasn't found, else check if driver is already attached to it.
769	*/
770	if (!pLun)
771	{
772	if ( !pBaseInterface
773	\|\| !pszDesc
774	\|\| !*pszDesc)
775	{
776	Assert(pBaseInterface);
777	Assert(pszDesc \|\| *pszDesc);
778	return VERR_INVALID_PARAMETER;
779	}
780
781	pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
782	if (!pLun)
783	return VERR_NO_MEMORY;
784
785	pLun->iLun = iLun;
786	pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
787	pLun->pTop = NULL;
788	pLun->pBottom = NULL;
789	pLun->pDevIns = pDevIns;
790	pLun->pszDesc = pszDesc;
791	pLun->pBase = pBaseInterface;
792	if (!pLunPrev)
793	pDevIns->Internal.s.pLunsR3 = pLun;
794	else
795	pLunPrev->pNext = pLun;
796	Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
797	iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
798	}
799	else if (pLun->pTop)
800	{
801	AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
802	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
803	return VERR_PDM_DRIVER_ALREADY_ATTACHED;
804	}
805	Assert(pLun->pBase == pBaseInterface);
806
807
808	/*
809	* Get the attached driver configuration.
810	*/
811	int rc;
812	char szNode[48];
813	RTStrPrintf(szNode, sizeof(szNode), "LUN#%d", iLun);
814	PCFGMNODE pNode = CFGMR3GetChild(pDevIns->Internal.s.pCfgHandle, szNode);
815	if (pNode)
816	{
817	char *pszName;
818	rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
819	if (RT_SUCCESS(rc))
820	{
821	/*
822	* Find the driver.
823	*/
824	PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
825	if (pDrv)
826	{
827	/* config node */
828	PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
829	if (!pConfigNode)
830	rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
831	if (RT_SUCCESS(rc))
832	{
833	CFGMR3SetRestrictedRoot(pConfigNode);
834
835	/*
836	* Allocate the driver instance.
837	*/
838	size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
839	cb = RT_ALIGN_Z(cb, 16);
840	PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
841	if (pNew)
842	{
843	/*
844	* Initialize the instance structure (declaration order).
845	*/
846	pNew->u32Version = PDM_DRVINS_VERSION;
847	//pNew->Internal.s.pUp = NULL;
848	//pNew->Internal.s.pDown = NULL;
849	pNew->Internal.s.pLun = pLun;
850	pNew->Internal.s.pDrv = pDrv;
851	pNew->Internal.s.pVM = pVM;
852	//pNew->Internal.s.fDetaching = false;
853	pNew->Internal.s.pCfgHandle = pNode;
854	pNew->pDrvHlp = &g_pdmR3DrvHlp;
855	pNew->pDrvReg = pDrv->pDrvReg;
856	pNew->pCfgHandle = pConfigNode;
857	pNew->iInstance = pDrv->cInstances++;
858	pNew->pUpBase = pBaseInterface;
859	//pNew->pDownBase = NULL;
860	//pNew->IBase.pfnQueryInterface = NULL;
861	pNew->pvInstanceData = &pNew->achInstanceData[0];
862
863	/*
864	* Link with LUN and call the constructor.
865	*/
866	pLun->pTop = pLun->pBottom = pNew;
867	rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle);
868	if (RT_SUCCESS(rc))
869	{
870	MMR3HeapFree(pszName);
871	*ppBaseInterface = &pNew->IBase;
872	Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
873	pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
874	LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
875
876	return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
877	}
878
879	/*
880	* Free the driver.
881	*/
882	pLun->pTop = pLun->pBottom = NULL;
883	ASMMemFill32(pNew, cb, 0xdeadd0d0);
884	MMR3HeapFree(pNew);
885	pDrv->cInstances--;
886	}
887	else
888	{
889	AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
890	rc = VERR_NO_MEMORY;
891	}
892	}
893	else
894	AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
895	}
896	else
897	{
898	AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
899	rc = VERR_PDM_DRIVER_NOT_FOUND;
900	}
901	MMR3HeapFree(pszName);
902	}
903	else
904	{
905	AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
906	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
907	rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
908	}
909	}
910	else
911	rc = VERR_PDM_NO_ATTACHED_DRIVER;
912
913
914	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
915	return rc;
916	}
917
918
919	/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
920	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
921	{
922	PDMDEV_ASSERT_DEVINS(pDevIns);
923	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
924
925	void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
926
927	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
928	return pv;
929	}
930
931
932	/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
933	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
934	{
935	PDMDEV_ASSERT_DEVINS(pDevIns);
936	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
937
938	void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
939
940	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
941	return pv;
942	}
943
944
945	/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
946	static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
947	{
948	PDMDEV_ASSERT_DEVINS(pDevIns);
949	LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
950
951	MMR3HeapFree(pv);
952
953	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
954	}
955
956
957	/** @copydoc PDMDEVHLPR3::pfnVMSetError */
958	static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
959	{
960	PDMDEV_ASSERT_DEVINS(pDevIns);
961	va_list args;
962	va_start(args, pszFormat);
963	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
964	va_end(args);
965	return rc;
966	}
967
968
969	/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
970	static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
971	{
972	PDMDEV_ASSERT_DEVINS(pDevIns);
973	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
974	return rc;
975	}
976
977
978	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
979	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char pszErrorID, const char pszFormat, ...)
980	{
981	PDMDEV_ASSERT_DEVINS(pDevIns);
982	va_list args;
983	va_start(args, pszFormat);
984	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFatal, pszErrorID, pszFormat, args);
985	va_end(args);
986	return rc;
987	}
988
989
990	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
991	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char pszErrorID, const char pszFormat, va_list va)
992	{
993	PDMDEV_ASSERT_DEVINS(pDevIns);
994	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFatal, pszErrorID, pszFormat, va);
995	return rc;
996	}
997
998
999	/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
1000	static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1001	{
1002	PDMDEV_ASSERT_DEVINS(pDevIns);
1003	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1004	return true;
1005
1006	char szMsg[100];
1007	RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1008	AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1009	AssertBreakpoint();
1010	return false;
1011	}
1012
1013
1014	/** @copydoc PDMDEVHLPR3::pfnAssertOther */
1015	static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1016	{
1017	PDMDEV_ASSERT_DEVINS(pDevIns);
1018	if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1019	return true;
1020
1021	char szMsg[100];
1022	RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1023	AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1024	AssertBreakpoint();
1025	return false;
1026	}
1027
1028
1029	/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
1030	static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction, const char *pszFormat, va_list args)
1031	{
1032	PDMDEV_ASSERT_DEVINS(pDevIns);
1033	#ifdef LOG_ENABLED
1034	va_list va2;
1035	va_copy(va2, args);
1036	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1037	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1038	va_end(va2);
1039	#endif
1040
1041	PVM pVM = pDevIns->Internal.s.pVMR3;
1042	VM_ASSERT_EMT(pVM);
1043	int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1044
1045	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1046	return rc;
1047	}
1048
1049
1050	/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1051	static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char pszName, const char pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1052	{
1053	PDMDEV_ASSERT_DEVINS(pDevIns);
1054	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1055	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1056
1057	PVM pVM = pDevIns->Internal.s.pVMR3;
1058	VM_ASSERT_EMT(pVM);
1059	int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1060
1061	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1062	return rc;
1063	}
1064
1065
1066	/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1067	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void pvSample, STAMTYPE enmType, const char pszName, STAMUNIT enmUnit, const char *pszDesc)
1068	{
1069	PDMDEV_ASSERT_DEVINS(pDevIns);
1070	PVM pVM = pDevIns->Internal.s.pVMR3;
1071	VM_ASSERT_EMT(pVM);
1072
1073	STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1074	NOREF(pVM);
1075	}
1076
1077
1078
1079	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1080	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1081	STAMUNIT enmUnit, const char pszDesc, const char pszName, ...)
1082	{
1083	PDMDEV_ASSERT_DEVINS(pDevIns);
1084	PVM pVM = pDevIns->Internal.s.pVMR3;
1085	VM_ASSERT_EMT(pVM);
1086
1087	va_list args;
1088	va_start(args, pszName);
1089	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1090	va_end(args);
1091	AssertRC(rc);
1092
1093	NOREF(pVM);
1094	}
1095
1096
1097	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1098	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1099	STAMUNIT enmUnit, const char pszDesc, const char pszName, va_list args)
1100	{
1101	PDMDEV_ASSERT_DEVINS(pDevIns);
1102	PVM pVM = pDevIns->Internal.s.pVMR3;
1103	VM_ASSERT_EMT(pVM);
1104
1105	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1106	AssertRC(rc);
1107
1108	NOREF(pVM);
1109	}
1110
1111
1112	/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1113	static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1114	{
1115	PDMDEV_ASSERT_DEVINS(pDevIns);
1116	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1117	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1118	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1119	pRtcReg->pfnWrite, ppRtcHlp));
1120
1121	/*
1122	* Validate input.
1123	*/
1124	if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1125	{
1126	AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1127	PDM_RTCREG_VERSION));
1128	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1129	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1130	return VERR_INVALID_PARAMETER;
1131	}
1132	if ( !pRtcReg->pfnWrite
1133	\|\| !pRtcReg->pfnRead)
1134	{
1135	Assert(pRtcReg->pfnWrite);
1136	Assert(pRtcReg->pfnRead);
1137	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1138	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1139	return VERR_INVALID_PARAMETER;
1140	}
1141
1142	if (!ppRtcHlp)
1143	{
1144	Assert(ppRtcHlp);
1145	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1146	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1147	return VERR_INVALID_PARAMETER;
1148	}
1149
1150	/*
1151	* Only one DMA device.
1152	*/
1153	PVM pVM = pDevIns->Internal.s.pVMR3;
1154	if (pVM->pdm.s.pRtc)
1155	{
1156	AssertMsgFailed(("Only one RTC device is supported!\n"));
1157	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1158	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1159	return VERR_INVALID_PARAMETER;
1160	}
1161
1162	/*
1163	* Allocate and initialize pci bus structure.
1164	*/
1165	int rc = VINF_SUCCESS;
1166	PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1167	if (pRtc)
1168	{
1169	pRtc->pDevIns = pDevIns;
1170	pRtc->Reg = *pRtcReg;
1171	pVM->pdm.s.pRtc = pRtc;
1172
1173	/* set the helper pointer. */
1174	*ppRtcHlp = &g_pdmR3DevRtcHlp;
1175	Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1176	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1177	}
1178	else
1179	rc = VERR_NO_MEMORY;
1180
1181	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1182	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1183	return rc;
1184	}
1185
1186
1187	/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1188	static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1189	PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
1190	{
1191	PDMDEV_ASSERT_DEVINS(pDevIns);
1192	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool ppQueue=%p\n",
1193	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
1194
1195	PVM pVM = pDevIns->Internal.s.pVMR3;
1196	VM_ASSERT_EMT(pVM);
1197	int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
1198
1199	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, ppQueue));
1200	return rc;
1201	}
1202
1203
1204	/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1205	static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1206	{
1207	PDMDEV_ASSERT_DEVINS(pDevIns);
1208	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1209	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1210
1211	PVM pVM = pDevIns->Internal.s.pVMR3;
1212	VM_ASSERT_EMT(pVM);
1213	int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1214
1215	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1216	return rc;
1217	}
1218
1219
1220	/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1221	static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1222	{
1223	PDMDEV_ASSERT_DEVINS(pDevIns);
1224	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1225	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1226
1227	pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1228
1229	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1230	return pTime;
1231	}
1232
1233
1234	/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1235	static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1236	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1237	{
1238	PDMDEV_ASSERT_DEVINS(pDevIns);
1239	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1240	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1241	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1242
1243	int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1244
1245	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1246	rc, *ppThread));
1247	return rc;
1248	}
1249
1250
1251	/** @copydoc PDMDEVHLPR3::pfnGetVM */
1252	static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1253	{
1254	PDMDEV_ASSERT_DEVINS(pDevIns);
1255	LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1256	return pDevIns->Internal.s.pVMR3;
1257	}
1258
1259
1260	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1261	static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1262	{
1263	PDMDEV_ASSERT_DEVINS(pDevIns);
1264	PVM pVM = pDevIns->Internal.s.pVMR3;
1265	VM_ASSERT_EMT(pVM);
1266	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1267	".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1268	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1269	pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1270	pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1271
1272	/*
1273	* Validate the structure.
1274	*/
1275	if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1276	{
1277	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1278	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1279	return VERR_INVALID_PARAMETER;
1280	}
1281	if ( !pPciBusReg->pfnRegisterR3
1282	\|\| !pPciBusReg->pfnIORegionRegisterR3
1283	\|\| !pPciBusReg->pfnSetIrqR3
1284	\|\| !pPciBusReg->pfnSaveExecR3
1285	\|\| !pPciBusReg->pfnLoadExecR3
1286	\|\| (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1287	{
1288	Assert(pPciBusReg->pfnRegisterR3);
1289	Assert(pPciBusReg->pfnIORegionRegisterR3);
1290	Assert(pPciBusReg->pfnSetIrqR3);
1291	Assert(pPciBusReg->pfnSaveExecR3);
1292	Assert(pPciBusReg->pfnLoadExecR3);
1293	Assert(pPciBusReg->pfnFakePCIBIOSR3);
1294	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1295	return VERR_INVALID_PARAMETER;
1296	}
1297	if ( pPciBusReg->pszSetIrqRC
1298	&& !VALID_PTR(pPciBusReg->pszSetIrqRC))
1299	{
1300	Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1301	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1302	return VERR_INVALID_PARAMETER;
1303	}
1304	if ( pPciBusReg->pszSetIrqR0
1305	&& !VALID_PTR(pPciBusReg->pszSetIrqR0))
1306	{
1307	Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1308	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1309	return VERR_INVALID_PARAMETER;
1310	}
1311	if (!ppPciHlpR3)
1312	{
1313	Assert(ppPciHlpR3);
1314	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1315	return VERR_INVALID_PARAMETER;
1316	}
1317
1318	/*
1319	* Find free PCI bus entry.
1320	*/
1321	unsigned iBus = 0;
1322	for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1323	if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1324	break;
1325	if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1326	{
1327	AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1328	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1329	return VERR_INVALID_PARAMETER;
1330	}
1331	PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1332
1333	/*
1334	* Resolve and init the RC bits.
1335	*/
1336	if (pPciBusReg->pszSetIrqRC)
1337	{
1338	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1339	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1340	if (RT_FAILURE(rc))
1341	{
1342	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1343	return rc;
1344	}
1345	pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1346	}
1347	else
1348	{
1349	pPciBus->pfnSetIrqRC = 0;
1350	pPciBus->pDevInsRC = 0;
1351	}
1352
1353	/*
1354	* Resolve and init the R0 bits.
1355	*/
1356	if (pPciBusReg->pszSetIrqR0)
1357	{
1358	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1359	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1360	if (RT_FAILURE(rc))
1361	{
1362	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1363	return rc;
1364	}
1365	pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1366	}
1367	else
1368	{
1369	pPciBus->pfnSetIrqR0 = 0;
1370	pPciBus->pDevInsR0 = 0;
1371	}
1372
1373	/*
1374	* Init the R3 bits.
1375	*/
1376	pPciBus->iBus = iBus;
1377	pPciBus->pDevInsR3 = pDevIns;
1378	pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1379	pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1380	pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1381	pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1382	pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1383	pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1384	pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1385
1386	Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1387
1388	/* set the helper pointer and return. */
1389	*ppPciHlpR3 = &g_pdmR3DevPciHlp;
1390	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1391	return VINF_SUCCESS;
1392	}
1393
1394
1395	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1396	static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1397	{
1398	PDMDEV_ASSERT_DEVINS(pDevIns);
1399	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1400	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1401	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1402	pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1403	pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1404	ppPicHlpR3));
1405
1406	/*
1407	* Validate input.
1408	*/
1409	if (pPicReg->u32Version != PDM_PICREG_VERSION)
1410	{
1411	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1412	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1413	return VERR_INVALID_PARAMETER;
1414	}
1415	if ( !pPicReg->pfnSetIrqR3
1416	\|\| !pPicReg->pfnGetInterruptR3)
1417	{
1418	Assert(pPicReg->pfnSetIrqR3);
1419	Assert(pPicReg->pfnGetInterruptR3);
1420	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1421	return VERR_INVALID_PARAMETER;
1422	}
1423	if ( ( pPicReg->pszSetIrqRC
1424	\|\| pPicReg->pszGetInterruptRC)
1425	&& ( !VALID_PTR(pPicReg->pszSetIrqRC)
1426	\|\| !VALID_PTR(pPicReg->pszGetInterruptRC))
1427	)
1428	{
1429	Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1430	Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1431	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1432	return VERR_INVALID_PARAMETER;
1433	}
1434	if ( pPicReg->pszSetIrqRC
1435	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1436	{
1437	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1438	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1439	return VERR_INVALID_PARAMETER;
1440	}
1441	if ( pPicReg->pszSetIrqR0
1442	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1443	{
1444	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1445	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1446	return VERR_INVALID_PARAMETER;
1447	}
1448	if (!ppPicHlpR3)
1449	{
1450	Assert(ppPicHlpR3);
1451	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1452	return VERR_INVALID_PARAMETER;
1453	}
1454
1455	/*
1456	* Only one PIC device.
1457	*/
1458	PVM pVM = pDevIns->Internal.s.pVMR3;
1459	if (pVM->pdm.s.Pic.pDevInsR3)
1460	{
1461	AssertMsgFailed(("Only one pic device is supported!\n"));
1462	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1463	return VERR_INVALID_PARAMETER;
1464	}
1465
1466	/*
1467	* RC stuff.
1468	*/
1469	if (pPicReg->pszSetIrqRC)
1470	{
1471	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1472	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1473	if (RT_SUCCESS(rc))
1474	{
1475	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1476	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1477	}
1478	if (RT_FAILURE(rc))
1479	{
1480	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1481	return rc;
1482	}
1483	pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1484	}
1485	else
1486	{
1487	pVM->pdm.s.Pic.pDevInsRC = 0;
1488	pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1489	pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1490	}
1491
1492	/*
1493	* R0 stuff.
1494	*/
1495	if (pPicReg->pszSetIrqR0)
1496	{
1497	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1498	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1499	if (RT_SUCCESS(rc))
1500	{
1501	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1502	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1503	}
1504	if (RT_FAILURE(rc))
1505	{
1506	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1507	return rc;
1508	}
1509	pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1510	Assert(pVM->pdm.s.Pic.pDevInsR0);
1511	}
1512	else
1513	{
1514	pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1515	pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1516	pVM->pdm.s.Pic.pDevInsR0 = 0;
1517	}
1518
1519	/*
1520	* R3 stuff.
1521	*/
1522	pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1523	pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1524	pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1525	Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1526
1527	/* set the helper pointer and return. */
1528	*ppPicHlpR3 = &g_pdmR3DevPicHlp;
1529	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1530	return VINF_SUCCESS;
1531	}
1532
1533
1534	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1535	static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1536	{
1537	PDMDEV_ASSERT_DEVINS(pDevIns);
1538	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1539	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1540	".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1541	".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}} ppApicHlpR3=%p\n",
1542	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1543	pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pszGetInterruptRC,
1544	pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1545	pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1546	pApicReg->pszBusDeliverRC, ppApicHlpR3));
1547
1548	/*
1549	* Validate input.
1550	*/
1551	if (pApicReg->u32Version != PDM_APICREG_VERSION)
1552	{
1553	AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1554	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1555	return VERR_INVALID_PARAMETER;
1556	}
1557	if ( !pApicReg->pfnGetInterruptR3
1558	\|\| !pApicReg->pfnHasPendingIrqR3
1559	\|\| !pApicReg->pfnSetBaseR3
1560	\|\| !pApicReg->pfnGetBaseR3
1561	\|\| !pApicReg->pfnSetTPRR3
1562	\|\| !pApicReg->pfnGetTPRR3
1563	\|\| !pApicReg->pfnWriteMSRR3
1564	\|\| !pApicReg->pfnReadMSRR3
1565	\|\| !pApicReg->pfnBusDeliverR3)
1566	{
1567	Assert(pApicReg->pfnGetInterruptR3);
1568	Assert(pApicReg->pfnHasPendingIrqR3);
1569	Assert(pApicReg->pfnSetBaseR3);
1570	Assert(pApicReg->pfnGetBaseR3);
1571	Assert(pApicReg->pfnSetTPRR3);
1572	Assert(pApicReg->pfnGetTPRR3);
1573	Assert(pApicReg->pfnWriteMSRR3);
1574	Assert(pApicReg->pfnReadMSRR3);
1575	Assert(pApicReg->pfnBusDeliverR3);
1576	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1577	return VERR_INVALID_PARAMETER;
1578	}
1579	if ( ( pApicReg->pszGetInterruptRC
1580	\|\| pApicReg->pszHasPendingIrqRC
1581	\|\| pApicReg->pszSetBaseRC
1582	\|\| pApicReg->pszGetBaseRC
1583	\|\| pApicReg->pszSetTPRRC
1584	\|\| pApicReg->pszGetTPRRC
1585	\|\| pApicReg->pszWriteMSRRC
1586	\|\| pApicReg->pszReadMSRRC
1587	\|\| pApicReg->pszBusDeliverRC)
1588	&& ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1589	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1590	\|\| !VALID_PTR(pApicReg->pszSetBaseRC)
1591	\|\| !VALID_PTR(pApicReg->pszGetBaseRC)
1592	\|\| !VALID_PTR(pApicReg->pszSetTPRRC)
1593	\|\| !VALID_PTR(pApicReg->pszGetTPRRC)
1594	\|\| !VALID_PTR(pApicReg->pszWriteMSRRC)
1595	\|\| !VALID_PTR(pApicReg->pszReadMSRRC)
1596	\|\| !VALID_PTR(pApicReg->pszBusDeliverRC))
1597	)
1598	{
1599	Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1600	Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1601	Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1602	Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1603	Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1604	Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1605	Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1606	Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1607	Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1608	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1609	return VERR_INVALID_PARAMETER;
1610	}
1611	if ( ( pApicReg->pszGetInterruptR0
1612	\|\| pApicReg->pszHasPendingIrqR0
1613	\|\| pApicReg->pszSetBaseR0
1614	\|\| pApicReg->pszGetBaseR0
1615	\|\| pApicReg->pszSetTPRR0
1616	\|\| pApicReg->pszGetTPRR0
1617	\|\| pApicReg->pszWriteMSRR0
1618	\|\| pApicReg->pszReadMSRR0
1619	\|\| pApicReg->pszBusDeliverR0)
1620	&& ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1621	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1622	\|\| !VALID_PTR(pApicReg->pszSetBaseR0)
1623	\|\| !VALID_PTR(pApicReg->pszGetBaseR0)
1624	\|\| !VALID_PTR(pApicReg->pszSetTPRR0)
1625	\|\| !VALID_PTR(pApicReg->pszGetTPRR0)
1626	\|\| !VALID_PTR(pApicReg->pszReadMSRR0)
1627	\|\| !VALID_PTR(pApicReg->pszWriteMSRR0)
1628	\|\| !VALID_PTR(pApicReg->pszBusDeliverR0))
1629	)
1630	{
1631	Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1632	Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1633	Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1634	Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1635	Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1636	Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1637	Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1638	Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1639	Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1640	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1641	return VERR_INVALID_PARAMETER;
1642	}
1643	if (!ppApicHlpR3)
1644	{
1645	Assert(ppApicHlpR3);
1646	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1647	return VERR_INVALID_PARAMETER;
1648	}
1649
1650	/*
1651	* Only one APIC device. On SMP we have single logical device covering all LAPICs,
1652	* as they need to communicate and share state easily.
1653	*/
1654	PVM pVM = pDevIns->Internal.s.pVMR3;
1655	if (pVM->pdm.s.Apic.pDevInsR3)
1656	{
1657	AssertMsgFailed(("Only one apic device is supported!\n"));
1658	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1659	return VERR_INVALID_PARAMETER;
1660	}
1661
1662	/*
1663	* Resolve & initialize the RC bits.
1664	*/
1665	if (pApicReg->pszGetInterruptRC)
1666	{
1667	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1668	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1669	if (RT_SUCCESS(rc))
1670	{
1671	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1672	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1673	}
1674	if (RT_SUCCESS(rc))
1675	{
1676	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1677	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1678	}
1679	if (RT_SUCCESS(rc))
1680	{
1681	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1682	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1683	}
1684	if (RT_SUCCESS(rc))
1685	{
1686	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1687	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1688	}
1689	if (RT_SUCCESS(rc))
1690	{
1691	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1692	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1693	}
1694	if (RT_SUCCESS(rc))
1695	{
1696	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1697	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1698	}
1699	if (RT_SUCCESS(rc))
1700	{
1701	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1702	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1703	}
1704	if (RT_SUCCESS(rc))
1705	{
1706	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1707	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1708	}
1709	if (RT_FAILURE(rc))
1710	{
1711	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1712	return rc;
1713	}
1714	pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1715	}
1716	else
1717	{
1718	pVM->pdm.s.Apic.pDevInsRC = 0;
1719	pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1720	pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1721	pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1722	pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1723	pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1724	pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1725	pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1726	pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1727	pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1728	}
1729
1730	/*
1731	* Resolve & initialize the R0 bits.
1732	*/
1733	if (pApicReg->pszGetInterruptR0)
1734	{
1735	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1736	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1737	if (RT_SUCCESS(rc))
1738	{
1739	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1740	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1741	}
1742	if (RT_SUCCESS(rc))
1743	{
1744	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1745	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1746	}
1747	if (RT_SUCCESS(rc))
1748	{
1749	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1750	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1751	}
1752	if (RT_SUCCESS(rc))
1753	{
1754	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1755	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1756	}
1757	if (RT_SUCCESS(rc))
1758	{
1759	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1760	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1761	}
1762	if (RT_SUCCESS(rc))
1763	{
1764	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1765	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1766	}
1767	if (RT_SUCCESS(rc))
1768	{
1769	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1770	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1771	}
1772	if (RT_SUCCESS(rc))
1773	{
1774	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1775	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1776	}
1777	if (RT_FAILURE(rc))
1778	{
1779	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1780	return rc;
1781	}
1782	pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1783	Assert(pVM->pdm.s.Apic.pDevInsR0);
1784	}
1785	else
1786	{
1787	pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1788	pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1789	pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1790	pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1791	pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1792	pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1793	pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1794	pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1795	pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1796	pVM->pdm.s.Apic.pDevInsR0 = 0;
1797	}
1798
1799	/*
1800	* Initialize the HC bits.
1801	*/
1802	pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1803	pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1804	pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1805	pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1806	pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1807	pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1808	pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1809	pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1810	pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1811	pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1812	Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1813
1814	/* set the helper pointer and return. */
1815	*ppApicHlpR3 = &g_pdmR3DevApicHlp;
1816	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1817	return VINF_SUCCESS;
1818	}
1819
1820
1821	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1822	static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1823	{
1824	PDMDEV_ASSERT_DEVINS(pDevIns);
1825	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1826	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1827	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1828	pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1829
1830	/*
1831	* Validate input.
1832	*/
1833	if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1834	{
1835	AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1836	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1837	return VERR_INVALID_PARAMETER;
1838	}
1839	if (!pIoApicReg->pfnSetIrqR3)
1840	{
1841	Assert(pIoApicReg->pfnSetIrqR3);
1842	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1843	return VERR_INVALID_PARAMETER;
1844	}
1845	if ( pIoApicReg->pszSetIrqRC
1846	&& !VALID_PTR(pIoApicReg->pszSetIrqRC))
1847	{
1848	Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1849	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1850	return VERR_INVALID_PARAMETER;
1851	}
1852	if ( pIoApicReg->pszSetIrqR0
1853	&& !VALID_PTR(pIoApicReg->pszSetIrqR0))
1854	{
1855	Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1856	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1857	return VERR_INVALID_PARAMETER;
1858	}
1859	if (!ppIoApicHlpR3)
1860	{
1861	Assert(ppIoApicHlpR3);
1862	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1863	return VERR_INVALID_PARAMETER;
1864	}
1865
1866	/*
1867	* The I/O APIC requires the APIC to be present (hacks++).
1868	* If the I/O APIC does GC stuff so must the APIC.
1869	*/
1870	PVM pVM = pDevIns->Internal.s.pVMR3;
1871	if (!pVM->pdm.s.Apic.pDevInsR3)
1872	{
1873	AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1874	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1875	return VERR_INVALID_PARAMETER;
1876	}
1877	if ( pIoApicReg->pszSetIrqRC
1878	&& !pVM->pdm.s.Apic.pDevInsRC)
1879	{
1880	AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1881	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1882	return VERR_INVALID_PARAMETER;
1883	}
1884
1885	/*
1886	* Only one I/O APIC device.
1887	*/
1888	if (pVM->pdm.s.IoApic.pDevInsR3)
1889	{
1890	AssertMsgFailed(("Only one ioapic device is supported!\n"));
1891	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1892	return VERR_INVALID_PARAMETER;
1893	}
1894
1895	/*
1896	* Resolve & initialize the GC bits.
1897	*/
1898	if (pIoApicReg->pszSetIrqRC)
1899	{
1900	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
1901	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
1902	if (RT_FAILURE(rc))
1903	{
1904	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1905	return rc;
1906	}
1907	pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1908	}
1909	else
1910	{
1911	pVM->pdm.s.IoApic.pDevInsRC = 0;
1912	pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
1913	}
1914
1915	/*
1916	* Resolve & initialize the R0 bits.
1917	*/
1918	if (pIoApicReg->pszSetIrqR0)
1919	{
1920	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
1921	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
1922	if (RT_FAILURE(rc))
1923	{
1924	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1925	return rc;
1926	}
1927	pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1928	Assert(pVM->pdm.s.IoApic.pDevInsR0);
1929	}
1930	else
1931	{
1932	pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
1933	pVM->pdm.s.IoApic.pDevInsR0 = 0;
1934	}
1935
1936	/*
1937	* Initialize the R3 bits.
1938	*/
1939	pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
1940	pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
1941	Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1942
1943	/* set the helper pointer and return. */
1944	*ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
1945	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1946	return VINF_SUCCESS;
1947	}
1948
1949
1950	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
1951	static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
1952	{
1953	PDMDEV_ASSERT_DEVINS(pDevIns);
1954	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1955	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
1956	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
1957	pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
1958
1959	/*
1960	* Validate input.
1961	*/
1962	if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
1963	{
1964	AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
1965	PDM_DMACREG_VERSION));
1966	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
1967	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1968	return VERR_INVALID_PARAMETER;
1969	}
1970	if ( !pDmacReg->pfnRun
1971	\|\| !pDmacReg->pfnRegister
1972	\|\| !pDmacReg->pfnReadMemory
1973	\|\| !pDmacReg->pfnWriteMemory
1974	\|\| !pDmacReg->pfnSetDREQ
1975	\|\| !pDmacReg->pfnGetChannelMode)
1976	{
1977	Assert(pDmacReg->pfnRun);
1978	Assert(pDmacReg->pfnRegister);
1979	Assert(pDmacReg->pfnReadMemory);
1980	Assert(pDmacReg->pfnWriteMemory);
1981	Assert(pDmacReg->pfnSetDREQ);
1982	Assert(pDmacReg->pfnGetChannelMode);
1983	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1984	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1985	return VERR_INVALID_PARAMETER;
1986	}
1987
1988	if (!ppDmacHlp)
1989	{
1990	Assert(ppDmacHlp);
1991	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
1992	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1993	return VERR_INVALID_PARAMETER;
1994	}
1995
1996	/*
1997	* Only one DMA device.
1998	*/
1999	PVM pVM = pDevIns->Internal.s.pVMR3;
2000	if (pVM->pdm.s.pDmac)
2001	{
2002	AssertMsgFailed(("Only one DMA device is supported!\n"));
2003	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2004	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2005	return VERR_INVALID_PARAMETER;
2006	}
2007
2008	/*
2009	* Allocate and initialize pci bus structure.
2010	*/
2011	int rc = VINF_SUCCESS;
2012	PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2013	if (pDmac)
2014	{
2015	pDmac->pDevIns = pDevIns;
2016	pDmac->Reg = *pDmacReg;
2017	pVM->pdm.s.pDmac = pDmac;
2018
2019	/* set the helper pointer. */
2020	*ppDmacHlp = &g_pdmR3DevDmacHlp;
2021	Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2022	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2023	}
2024	else
2025	rc = VERR_NO_MEMORY;
2026
2027	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2028	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2029	return rc;
2030	}
2031
2032
2033	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2034	static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2035	{
2036	PDMDEV_ASSERT_DEVINS(pDevIns);
2037	PVM pVM = pDevIns->Internal.s.pVMR3;
2038	LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2039	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2040
2041	#ifdef VBOX_WITH_NEW_PHYS_CODE
2042	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2043	if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2044	{
2045	char szNames[128];
2046	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2047	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2048	}
2049	#endif
2050
2051	int rc;
2052	if (VM_IS_EMT(pVM))
2053	rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
2054	else
2055	rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
2056	#else
2057	PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
2058	int rc = VINF_SUCCESS;
2059	#endif
2060	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2061	return rc;
2062	}
2063
2064
2065	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2066	static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2067	{
2068	PDMDEV_ASSERT_DEVINS(pDevIns);
2069	PVM pVM = pDevIns->Internal.s.pVMR3;
2070	LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2071	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2072
2073	#ifdef VBOX_WITH_NEW_PHYS_CODE
2074	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2075	if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2076	{
2077	char szNames[128];
2078	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2079	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2080	}
2081	#endif
2082
2083	int rc;
2084	if (VM_IS_EMT(pVM))
2085	rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
2086	else
2087	rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite);
2088	#else
2089	PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
2090	int rc = VINF_SUCCESS;
2091	#endif
2092	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2093	return rc;
2094	}
2095
2096
2097	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2098	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2099	{
2100	PDMDEV_ASSERT_DEVINS(pDevIns);
2101	PVM pVM = pDevIns->Internal.s.pVMR3;
2102	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2103	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2104	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2105
2106	#ifdef VBOX_WITH_NEW_PHYS_CODE
2107	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2108	if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2109	{
2110	char szNames[128];
2111	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2112	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2113	}
2114	#endif
2115	#endif
2116
2117	int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
2118
2119	Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2120	return rc;
2121	}
2122
2123
2124	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2125	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2126	{
2127	PDMDEV_ASSERT_DEVINS(pDevIns);
2128	PVM pVM = pDevIns->Internal.s.pVMR3;
2129	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2130	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2131	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2132
2133	#ifdef VBOX_WITH_NEW_PHYS_CODE
2134	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2135	if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2136	{
2137	char szNames[128];
2138	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2139	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2140	}
2141	#endif
2142	#endif
2143
2144	int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
2145
2146	Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2147	return rc;
2148	}
2149
2150
2151	/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2152	static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2153	{
2154	PDMDEV_ASSERT_DEVINS(pDevIns);
2155	PVM pVM = pDevIns->Internal.s.pVMR3;
2156	LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
2157	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pLock));
2158
2159	PGMPhysReleasePageMappingLock(pVM, pLock);
2160
2161	Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2162	}
2163
2164
2165	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2166	static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2167	{
2168	PDMDEV_ASSERT_DEVINS(pDevIns);
2169	PVM pVM = pDevIns->Internal.s.pVMR3;
2170	VM_ASSERT_EMT(pVM);
2171	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2172	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2173
2174	if (!VM_IS_EMT(pVM))
2175	return VERR_ACCESS_DENIED;
2176	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2177	/** @todo SMP. */
2178	#endif
2179
2180	int rc = PGMPhysSimpleReadGCPtr(pVM, pvDst, GCVirtSrc, cb);
2181
2182	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2183
2184	return rc;
2185	}
2186
2187
2188	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2189	static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2190	{
2191	PDMDEV_ASSERT_DEVINS(pDevIns);
2192	PVM pVM = pDevIns->Internal.s.pVMR3;
2193	VM_ASSERT_EMT(pVM);
2194	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2195	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2196
2197	if (!VM_IS_EMT(pVM))
2198	return VERR_ACCESS_DENIED;
2199	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2200	/** @todo SMP. */
2201	#endif
2202
2203	int rc = PGMPhysSimpleWriteGCPtr(pVM, GCVirtDst, pvSrc, cb);
2204
2205	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2206
2207	return rc;
2208	}
2209
2210
2211	/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2212	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2213	{
2214	PDMDEV_ASSERT_DEVINS(pDevIns);
2215	PVM pVM = pDevIns->Internal.s.pVMR3;
2216	VM_ASSERT_EMT(pVM);
2217	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2218	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2219
2220	if (!VM_IS_EMT(pVM))
2221	return VERR_ACCESS_DENIED;
2222	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2223	/** @todo SMP. */
2224	#endif
2225
2226	int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, pGCPhys);
2227
2228	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pGCPhys));
2229
2230	return rc;
2231	}
2232
2233
2234	/** @copydoc PDMDEVHLPR3::pfnVMState */
2235	static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
2236	{
2237	PDMDEV_ASSERT_DEVINS(pDevIns);
2238
2239	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2240
2241	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2242	enmVMState, VMR3GetStateName(enmVMState)));
2243	return enmVMState;
2244	}
2245
2246
2247	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2248	static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2249	{
2250	PDMDEV_ASSERT_DEVINS(pDevIns);
2251	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2252
2253	bool fRc = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMR3);
2254
2255	LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2256	return fRc;
2257	}
2258
2259
2260	/** @copydoc PDMDEVHLPR3::pfnA20Set */
2261	static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2262	{
2263	PDMDEV_ASSERT_DEVINS(pDevIns);
2264	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2265	LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2266	//Assert((unsigned )&fEnable <= 1);
2267	PGMR3PhysSetA20(pDevIns->Internal.s.pVMR3, fEnable);
2268	}
2269
2270
2271	/** @copydoc PDMDEVHLPR3::pfnVMReset */
2272	static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2273	{
2274	PDMDEV_ASSERT_DEVINS(pDevIns);
2275	PVM pVM = pDevIns->Internal.s.pVMR3;
2276	VM_ASSERT_EMT(pVM);
2277	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2278	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2279
2280	/*
2281	* We postpone this operation because we're likely to be inside a I/O instruction
2282	* and the EIP will be updated when we return.
2283	* We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2284	*/
2285	bool fHaltOnReset;
2286	int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2287	if (RT_SUCCESS(rc) && fHaltOnReset)
2288	{
2289	Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2290	rc = VINF_EM_HALT;
2291	}
2292	else
2293	{
2294	VM_FF_SET(pVM, VM_FF_RESET);
2295	rc = VINF_EM_RESET;
2296	}
2297
2298	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2299	return rc;
2300	}
2301
2302
2303	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2304	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2305	{
2306	PDMDEV_ASSERT_DEVINS(pDevIns);
2307	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2308	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2309	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2310
2311	int rc = VMR3Suspend(pDevIns->Internal.s.pVMR3);
2312
2313	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2314	return rc;
2315	}
2316
2317
2318	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2319	static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2320	{
2321	PDMDEV_ASSERT_DEVINS(pDevIns);
2322	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2323	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2324	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2325
2326	int rc = VMR3PowerOff(pDevIns->Internal.s.pVMR3);
2327
2328	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2329	return rc;
2330	}
2331
2332
2333	/** @copydoc PDMDEVHLPR3::pfnLockVM */
2334	static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns)
2335	{
2336	return VMMR3Lock(pDevIns->Internal.s.pVMR3);
2337	}
2338
2339
2340	/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2341	static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns)
2342	{
2343	return VMMR3Unlock(pDevIns->Internal.s.pVMR3);
2344	}
2345
2346
2347	/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
2348	static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
2349	{
2350	PVM pVM = pDevIns->Internal.s.pVMR3;
2351	if (VMMR3LockIsOwner(pVM))
2352	return true;
2353
2354	RTNATIVETHREAD NativeThreadOwner = VMMR3LockGetOwner(pVM);
2355	RTTHREAD ThreadOwner = RTThreadFromNative(NativeThreadOwner);
2356	char szMsg[100];
2357	RTStrPrintf(szMsg, sizeof(szMsg), "AssertVMLocked '%s'/%d ThreadOwner=%RTnthrd/%RTthrd/'%s' Self='%s'\n",
2358	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2359	NativeThreadOwner, ThreadOwner, RTThreadGetName(ThreadOwner), RTThreadSelfName());
2360	AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2361	AssertBreakpoint();
2362	return false;
2363	}
2364
2365	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2366	static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2367	{
2368	PDMDEV_ASSERT_DEVINS(pDevIns);
2369	PVM pVM = pDevIns->Internal.s.pVMR3;
2370	VM_ASSERT_EMT(pVM);
2371	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2372	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2373	int rc = VINF_SUCCESS;
2374	if (pVM->pdm.s.pDmac)
2375	pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2376	else
2377	{
2378	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2379	rc = VERR_PDM_NO_DMAC_INSTANCE;
2380	}
2381	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2382	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2383	return rc;
2384	}
2385
2386	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2387	static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
2388	{
2389	PDMDEV_ASSERT_DEVINS(pDevIns);
2390	PVM pVM = pDevIns->Internal.s.pVMR3;
2391	VM_ASSERT_EMT(pVM);
2392	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2393	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2394	int rc = VINF_SUCCESS;
2395	if (pVM->pdm.s.pDmac)
2396	{
2397	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2398	if (pcbRead)
2399	*pcbRead = cb;
2400	}
2401	else
2402	{
2403	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2404	rc = VERR_PDM_NO_DMAC_INSTANCE;
2405	}
2406	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2407	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2408	return rc;
2409	}
2410
2411	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2412	static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
2413	{
2414	PDMDEV_ASSERT_DEVINS(pDevIns);
2415	PVM pVM = pDevIns->Internal.s.pVMR3;
2416	VM_ASSERT_EMT(pVM);
2417	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2418	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2419	int rc = VINF_SUCCESS;
2420	if (pVM->pdm.s.pDmac)
2421	{
2422	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2423	if (pcbWritten)
2424	*pcbWritten = cb;
2425	}
2426	else
2427	{
2428	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2429	rc = VERR_PDM_NO_DMAC_INSTANCE;
2430	}
2431	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2432	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2433	return rc;
2434	}
2435
2436	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2437	static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2438	{
2439	PDMDEV_ASSERT_DEVINS(pDevIns);
2440	PVM pVM = pDevIns->Internal.s.pVMR3;
2441	VM_ASSERT_EMT(pVM);
2442	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2443	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2444	int rc = VINF_SUCCESS;
2445	if (pVM->pdm.s.pDmac)
2446	pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2447	else
2448	{
2449	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2450	rc = VERR_PDM_NO_DMAC_INSTANCE;
2451	}
2452	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2453	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2454	return rc;
2455	}
2456
2457	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2458	static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2459	{
2460	PDMDEV_ASSERT_DEVINS(pDevIns);
2461	PVM pVM = pDevIns->Internal.s.pVMR3;
2462	VM_ASSERT_EMT(pVM);
2463	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2464	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2465	uint8_t u8Mode;
2466	if (pVM->pdm.s.pDmac)
2467	u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2468	else
2469	{
2470	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2471	u8Mode = 3 << 2 /* illegal mode type */;
2472	}
2473	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2474	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2475	return u8Mode;
2476	}
2477
2478	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2479	static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2480	{
2481	PDMDEV_ASSERT_DEVINS(pDevIns);
2482	PVM pVM = pDevIns->Internal.s.pVMR3;
2483	VM_ASSERT_EMT(pVM);
2484	LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2485	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2486
2487	AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2488	VM_FF_SET(pVM, VM_FF_PDM_DMA);
2489	REMR3NotifyDmaPending(pVM);
2490	VMR3NotifyFF(pVM, true);
2491	}
2492
2493
2494	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2495	static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2496	{
2497	PDMDEV_ASSERT_DEVINS(pDevIns);
2498	PVM pVM = pDevIns->Internal.s.pVMR3;
2499	VM_ASSERT_EMT(pVM);
2500
2501	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2502	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2503	int rc;
2504	if (pVM->pdm.s.pRtc)
2505	rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2506	else
2507	rc = VERR_PDM_NO_RTC_INSTANCE;
2508
2509	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2510	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2511	return rc;
2512	}
2513
2514
2515	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2516	static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2517	{
2518	PDMDEV_ASSERT_DEVINS(pDevIns);
2519	PVM pVM = pDevIns->Internal.s.pVMR3;
2520	VM_ASSERT_EMT(pVM);
2521
2522	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2523	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2524	int rc;
2525	if (pVM->pdm.s.pRtc)
2526	rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2527	else
2528	rc = VERR_PDM_NO_RTC_INSTANCE;
2529
2530	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2531	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2532	return rc;
2533	}
2534
2535
2536	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2537	static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2538	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
2539	{
2540	PDMDEV_ASSERT_DEVINS(pDevIns);
2541	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2542	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2543	AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2544
2545	CPUMGetGuestCpuId(pDevIns->Internal.s.pVMR3, iLeaf, pEax, pEbx, pEcx, pEdx);
2546
2547	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - pEax=%#x pEbx=%#x pEcx=%#x pEdx=%#x\n",
2548	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pEax, pEbx, pEcx, pEdx));
2549	}
2550
2551
2552	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2553	static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
2554	{
2555	PDMDEV_ASSERT_DEVINS(pDevIns);
2556	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
2557	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
2558
2559	#ifdef VBOX_WITH_NEW_PHYS_CODE
2560	int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
2561	#else
2562	int rc = MMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange);
2563	#endif
2564
2565	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2566	return rc;
2567	}
2568
2569
2570	/**
2571	* @copydoc PDMDEVHLPR3::pfnMMIO2Register
2572	*/
2573	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
2574	{
2575	PDMDEV_ASSERT_DEVINS(pDevIns);
2576	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2577	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2578	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2579
2580	int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2581
2582	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2583	return rc;
2584	}
2585
2586
2587	/**
2588	* @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2589	*/
2590	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2591	{
2592	PDMDEV_ASSERT_DEVINS(pDevIns);
2593	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2594	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=#x\n",
2595	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2596
2597	AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2598
2599	int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2600
2601	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2602	return rc;
2603	}
2604
2605
2606	/**
2607	* @copydoc PDMDEVHLPR3::pfnMMIO2Map
2608	*/
2609	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2610	{
2611	PDMDEV_ASSERT_DEVINS(pDevIns);
2612	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2613	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2614	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2615
2616	int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2617
2618	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2619	return rc;
2620	}
2621
2622
2623	/**
2624	* @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2625	*/
2626	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2627	{
2628	PDMDEV_ASSERT_DEVINS(pDevIns);
2629	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2630	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2631	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2632
2633	int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2634
2635	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2636	return rc;
2637	}
2638
2639
2640	/**
2641	* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2642	*/
2643	static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2644	const char *pszDesc, PRTRCPTR pRCPtr)
2645	{
2646	PDMDEV_ASSERT_DEVINS(pDevIns);
2647	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2648	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2649	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2650
2651	int rc = MMR3HyperMapMMIO2(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2652
2653	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pRCPtr));
2654	return rc;
2655	}
2656
2657
2658	/**
2659	* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2660	*/
2661	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2662	const char *pszDesc, PRTR0PTR pR0Ptr)
2663	{
2664	PDMDEV_ASSERT_DEVINS(pDevIns);
2665	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2666	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2667	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2668
2669	int rc = PGMR3PhysMMIO2MapKernel(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2670
2671	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pR0Ptr));
2672	return rc;
2673	}
2674
2675
2676	/**
2677	* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2678	*/
2679	static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2680	{
2681	PDMDEV_ASSERT_DEVINS(pDevIns);
2682	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2683
2684	int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2685	return rc;
2686	}
2687
2688
2689	/**
2690	* @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2691	*/
2692	static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2693	{
2694	PDMDEV_ASSERT_DEVINS(pDevIns);
2695	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2696
2697	int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2698	return rc;
2699	}
2700
2701
2702	/**
2703	* The device helper structure for trusted devices.
2704	*/
2705	const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2706	{
2707	PDM_DEVHLP_VERSION,
2708	pdmR3DevHlp_IOPortRegister,
2709	pdmR3DevHlp_IOPortRegisterGC,
2710	pdmR3DevHlp_IOPortRegisterR0,
2711	pdmR3DevHlp_IOPortDeregister,
2712	pdmR3DevHlp_MMIORegister,
2713	pdmR3DevHlp_MMIORegisterGC,
2714	pdmR3DevHlp_MMIORegisterR0,
2715	pdmR3DevHlp_MMIODeregister,
2716	pdmR3DevHlp_ROMRegister,
2717	pdmR3DevHlp_SSMRegister,
2718	pdmR3DevHlp_TMTimerCreate,
2719	pdmR3DevHlp_TMTimerCreateExternal,
2720	pdmR3DevHlp_PCIRegister,
2721	pdmR3DevHlp_PCIIORegionRegister,
2722	pdmR3DevHlp_PCISetConfigCallbacks,
2723	pdmR3DevHlp_PCISetIrq,
2724	pdmR3DevHlp_PCISetIrqNoWait,
2725	pdmR3DevHlp_ISASetIrq,
2726	pdmR3DevHlp_ISASetIrqNoWait,
2727	pdmR3DevHlp_DriverAttach,
2728	pdmR3DevHlp_MMHeapAlloc,
2729	pdmR3DevHlp_MMHeapAllocZ,
2730	pdmR3DevHlp_MMHeapFree,
2731	pdmR3DevHlp_VMSetError,
2732	pdmR3DevHlp_VMSetErrorV,
2733	pdmR3DevHlp_VMSetRuntimeError,
2734	pdmR3DevHlp_VMSetRuntimeErrorV,
2735	pdmR3DevHlp_AssertEMT,
2736	pdmR3DevHlp_AssertOther,
2737	pdmR3DevHlp_DBGFStopV,
2738	pdmR3DevHlp_DBGFInfoRegister,
2739	pdmR3DevHlp_STAMRegister,
2740	pdmR3DevHlp_STAMRegisterF,
2741	pdmR3DevHlp_STAMRegisterV,
2742	pdmR3DevHlp_RTCRegister,
2743	pdmR3DevHlp_PDMQueueCreate,
2744	pdmR3DevHlp_CritSectInit,
2745	pdmR3DevHlp_UTCNow,
2746	pdmR3DevHlp_PDMThreadCreate,
2747	pdmR3DevHlp_PhysGCPtr2GCPhys,
2748	pdmR3DevHlp_VMState,
2749	0,
2750	0,
2751	0,
2752	0,
2753	0,
2754	0,
2755	0,
2756	pdmR3DevHlp_GetVM,
2757	pdmR3DevHlp_PCIBusRegister,
2758	pdmR3DevHlp_PICRegister,
2759	pdmR3DevHlp_APICRegister,
2760	pdmR3DevHlp_IOAPICRegister,
2761	pdmR3DevHlp_DMACRegister,
2762	pdmR3DevHlp_PhysRead,
2763	pdmR3DevHlp_PhysWrite,
2764	pdmR3DevHlp_PhysGCPhys2CCPtr,
2765	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2766	pdmR3DevHlp_PhysReleasePageMappingLock,
2767	pdmR3DevHlp_PhysReadGCVirt,
2768	pdmR3DevHlp_PhysWriteGCVirt,
2769	pdmR3DevHlp_A20IsEnabled,
2770	pdmR3DevHlp_A20Set,
2771	pdmR3DevHlp_VMReset,
2772	pdmR3DevHlp_VMSuspend,
2773	pdmR3DevHlp_VMPowerOff,
2774	pdmR3DevHlp_LockVM,
2775	pdmR3DevHlp_UnlockVM,
2776	pdmR3DevHlp_AssertVMLock,
2777	pdmR3DevHlp_DMARegister,
2778	pdmR3DevHlp_DMAReadMemory,
2779	pdmR3DevHlp_DMAWriteMemory,
2780	pdmR3DevHlp_DMASetDREQ,
2781	pdmR3DevHlp_DMAGetChannelMode,
2782	pdmR3DevHlp_DMASchedule,
2783	pdmR3DevHlp_CMOSWrite,
2784	pdmR3DevHlp_CMOSRead,
2785	pdmR3DevHlp_GetCpuId,
2786	pdmR3DevHlp_ROMProtectShadow,
2787	pdmR3DevHlp_MMIO2Register,
2788	pdmR3DevHlp_MMIO2Deregister,
2789	pdmR3DevHlp_MMIO2Map,
2790	pdmR3DevHlp_MMIO2Unmap,
2791	pdmR3DevHlp_MMHyperMapMMIO2,
2792	pdmR3DevHlp_MMIO2MapKernel,
2793	pdmR3DevHlp_RegisterVMMDevHeap,
2794	pdmR3DevHlp_UnregisterVMMDevHeap,
2795	PDM_DEVHLP_VERSION /* the end */
2796	};
2797
2798
2799
2800
2801	/** @copydoc PDMDEVHLPR3::pfnGetVM */
2802	static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2803	{
2804	PDMDEV_ASSERT_DEVINS(pDevIns);
2805	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2806	return NULL;
2807	}
2808
2809
2810	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2811	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2812	{
2813	PDMDEV_ASSERT_DEVINS(pDevIns);
2814	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2815	NOREF(pPciBusReg);
2816	NOREF(ppPciHlpR3);
2817	return VERR_ACCESS_DENIED;
2818	}
2819
2820
2821	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2822	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2823	{
2824	PDMDEV_ASSERT_DEVINS(pDevIns);
2825	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2826	NOREF(pPicReg);
2827	NOREF(ppPicHlpR3);
2828	return VERR_ACCESS_DENIED;
2829	}
2830
2831
2832	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2833	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2834	{
2835	PDMDEV_ASSERT_DEVINS(pDevIns);
2836	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2837	NOREF(pApicReg);
2838	NOREF(ppApicHlpR3);
2839	return VERR_ACCESS_DENIED;
2840	}
2841
2842
2843	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2844	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2845	{
2846	PDMDEV_ASSERT_DEVINS(pDevIns);
2847	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2848	NOREF(pIoApicReg);
2849	NOREF(ppIoApicHlpR3);
2850	return VERR_ACCESS_DENIED;
2851	}
2852
2853
2854	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2855	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2856	{
2857	PDMDEV_ASSERT_DEVINS(pDevIns);
2858	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2859	NOREF(pDmacReg);
2860	NOREF(ppDmacHlp);
2861	return VERR_ACCESS_DENIED;
2862	}
2863
2864
2865	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2866	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2867	{
2868	PDMDEV_ASSERT_DEVINS(pDevIns);
2869	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2870	NOREF(GCPhys);
2871	NOREF(pvBuf);
2872	NOREF(cbRead);
2873	return VERR_ACCESS_DENIED;
2874	}
2875
2876
2877	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2878	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2879	{
2880	PDMDEV_ASSERT_DEVINS(pDevIns);
2881	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2882	NOREF(GCPhys);
2883	NOREF(pvBuf);
2884	NOREF(cbWrite);
2885	return VERR_ACCESS_DENIED;
2886	}
2887
2888
2889	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2890	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2891	{
2892	PDMDEV_ASSERT_DEVINS(pDevIns);
2893	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2894	NOREF(GCPhys);
2895	NOREF(fFlags);
2896	NOREF(ppv);
2897	NOREF(pLock);
2898	return VERR_ACCESS_DENIED;
2899	}
2900
2901
2902	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2903	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2904	{
2905	PDMDEV_ASSERT_DEVINS(pDevIns);
2906	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2907	NOREF(GCPhys);
2908	NOREF(fFlags);
2909	NOREF(ppv);
2910	NOREF(pLock);
2911	return VERR_ACCESS_DENIED;
2912	}
2913
2914
2915	/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2916	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2917	{
2918	PDMDEV_ASSERT_DEVINS(pDevIns);
2919	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2920	NOREF(pLock);
2921	}
2922
2923
2924	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2925	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2926	{
2927	PDMDEV_ASSERT_DEVINS(pDevIns);
2928	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2929	NOREF(pvDst);
2930	NOREF(GCVirtSrc);
2931	NOREF(cb);
2932	return VERR_ACCESS_DENIED;
2933	}
2934
2935
2936	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2937	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2938	{
2939	PDMDEV_ASSERT_DEVINS(pDevIns);
2940	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2941	NOREF(GCVirtDst);
2942	NOREF(pvSrc);
2943	NOREF(cb);
2944	return VERR_ACCESS_DENIED;
2945	}
2946
2947
2948	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2949	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
2950	{
2951	PDMDEV_ASSERT_DEVINS(pDevIns);
2952	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2953	return false;
2954	}
2955
2956
2957	/** @copydoc PDMDEVHLPR3::pfnA20Set */
2958	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2959	{
2960	PDMDEV_ASSERT_DEVINS(pDevIns);
2961	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2962	NOREF(fEnable);
2963	}
2964
2965
2966	/** @copydoc PDMDEVHLPR3::pfnVMReset */
2967	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
2968	{
2969	PDMDEV_ASSERT_DEVINS(pDevIns);
2970	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2971	return VERR_ACCESS_DENIED;
2972	}
2973
2974
2975	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2976	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
2977	{
2978	PDMDEV_ASSERT_DEVINS(pDevIns);
2979	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2980	return VERR_ACCESS_DENIED;
2981	}
2982
2983
2984	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2985	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
2986	{
2987	PDMDEV_ASSERT_DEVINS(pDevIns);
2988	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2989	return VERR_ACCESS_DENIED;
2990	}
2991
2992
2993	/** @copydoc PDMDEVHLPR3::pfnLockVM */
2994	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns)
2995	{
2996	PDMDEV_ASSERT_DEVINS(pDevIns);
2997	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2998	return VERR_ACCESS_DENIED;
2999	}
3000
3001
3002	/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
3003	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns)
3004	{
3005	PDMDEV_ASSERT_DEVINS(pDevIns);
3006	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3007	return VERR_ACCESS_DENIED;
3008	}
3009
3010
3011	/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
3012	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
3013	{
3014	PDMDEV_ASSERT_DEVINS(pDevIns);
3015	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3016	return false;
3017	}
3018
3019
3020	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
3021	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3022	{
3023	PDMDEV_ASSERT_DEVINS(pDevIns);
3024	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3025	return VERR_ACCESS_DENIED;
3026	}
3027
3028
3029	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
3030	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
3031	{
3032	PDMDEV_ASSERT_DEVINS(pDevIns);
3033	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3034	if (pcbRead)
3035	*pcbRead = 0;
3036	return VERR_ACCESS_DENIED;
3037	}
3038
3039
3040	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
3041	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
3042	{
3043	PDMDEV_ASSERT_DEVINS(pDevIns);
3044	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3045	if (pcbWritten)
3046	*pcbWritten = 0;
3047	return VERR_ACCESS_DENIED;
3048	}
3049
3050
3051	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
3052	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3053	{
3054	PDMDEV_ASSERT_DEVINS(pDevIns);
3055	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3056	return VERR_ACCESS_DENIED;
3057	}
3058
3059
3060	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
3061	static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3062	{
3063	PDMDEV_ASSERT_DEVINS(pDevIns);
3064	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3065	return 3 << 2 /* illegal mode type */;
3066	}
3067
3068
3069	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3070	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3071	{
3072	PDMDEV_ASSERT_DEVINS(pDevIns);
3073	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3074	}
3075
3076
3077	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3078	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3079	{
3080	PDMDEV_ASSERT_DEVINS(pDevIns);
3081	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3082	return VERR_ACCESS_DENIED;
3083	}
3084
3085
3086	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3087	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3088	{
3089	PDMDEV_ASSERT_DEVINS(pDevIns);
3090	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3091	return VERR_ACCESS_DENIED;
3092	}
3093
3094
3095	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3096	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3097	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3098	{
3099	PDMDEV_ASSERT_DEVINS(pDevIns);
3100	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3101	}
3102
3103
3104	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3105	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3106	{
3107	PDMDEV_ASSERT_DEVINS(pDevIns);
3108	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3109	return VERR_ACCESS_DENIED;
3110	}
3111
3112
3113	/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3114	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
3115	{
3116	PDMDEV_ASSERT_DEVINS(pDevIns);
3117	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3118	return VERR_ACCESS_DENIED;
3119	}
3120
3121
3122	/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3123	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3124	{
3125	PDMDEV_ASSERT_DEVINS(pDevIns);
3126	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3127	return VERR_ACCESS_DENIED;
3128	}
3129
3130
3131	/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3132	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3133	{
3134	PDMDEV_ASSERT_DEVINS(pDevIns);
3135	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3136	return VERR_ACCESS_DENIED;
3137	}
3138
3139
3140	/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3141	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3142	{
3143	PDMDEV_ASSERT_DEVINS(pDevIns);
3144	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3145	return VERR_ACCESS_DENIED;
3146	}
3147
3148
3149	/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3150	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3151	{
3152	PDMDEV_ASSERT_DEVINS(pDevIns);
3153	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3154	return VERR_ACCESS_DENIED;
3155	}
3156
3157
3158	/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3159	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3160	{
3161	PDMDEV_ASSERT_DEVINS(pDevIns);
3162	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3163	return VERR_ACCESS_DENIED;
3164	}
3165
3166
3167	/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3168	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3169	{
3170	PDMDEV_ASSERT_DEVINS(pDevIns);
3171	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3172	return VERR_ACCESS_DENIED;
3173	}
3174
3175
3176	/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3177	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3178	{
3179	PDMDEV_ASSERT_DEVINS(pDevIns);
3180	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3181	return VERR_ACCESS_DENIED;
3182	}
3183
3184
3185	/**
3186	* The device helper structure for non-trusted devices.
3187	*/
3188	const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3189	{
3190	PDM_DEVHLP_VERSION,
3191	pdmR3DevHlp_IOPortRegister,
3192	pdmR3DevHlp_IOPortRegisterGC,
3193	pdmR3DevHlp_IOPortRegisterR0,
3194	pdmR3DevHlp_IOPortDeregister,
3195	pdmR3DevHlp_MMIORegister,
3196	pdmR3DevHlp_MMIORegisterGC,
3197	pdmR3DevHlp_MMIORegisterR0,
3198	pdmR3DevHlp_MMIODeregister,
3199	pdmR3DevHlp_ROMRegister,
3200	pdmR3DevHlp_SSMRegister,
3201	pdmR3DevHlp_TMTimerCreate,
3202	pdmR3DevHlp_TMTimerCreateExternal,
3203	pdmR3DevHlp_PCIRegister,
3204	pdmR3DevHlp_PCIIORegionRegister,
3205	pdmR3DevHlp_PCISetConfigCallbacks,
3206	pdmR3DevHlp_PCISetIrq,
3207	pdmR3DevHlp_PCISetIrqNoWait,
3208	pdmR3DevHlp_ISASetIrq,
3209	pdmR3DevHlp_ISASetIrqNoWait,
3210	pdmR3DevHlp_DriverAttach,
3211	pdmR3DevHlp_MMHeapAlloc,
3212	pdmR3DevHlp_MMHeapAllocZ,
3213	pdmR3DevHlp_MMHeapFree,
3214	pdmR3DevHlp_VMSetError,
3215	pdmR3DevHlp_VMSetErrorV,
3216	pdmR3DevHlp_VMSetRuntimeError,
3217	pdmR3DevHlp_VMSetRuntimeErrorV,
3218	pdmR3DevHlp_AssertEMT,
3219	pdmR3DevHlp_AssertOther,
3220	pdmR3DevHlp_DBGFStopV,
3221	pdmR3DevHlp_DBGFInfoRegister,
3222	pdmR3DevHlp_STAMRegister,
3223	pdmR3DevHlp_STAMRegisterF,
3224	pdmR3DevHlp_STAMRegisterV,
3225	pdmR3DevHlp_RTCRegister,
3226	pdmR3DevHlp_PDMQueueCreate,
3227	pdmR3DevHlp_CritSectInit,
3228	pdmR3DevHlp_UTCNow,
3229	pdmR3DevHlp_PDMThreadCreate,
3230	pdmR3DevHlp_PhysGCPtr2GCPhys,
3231	pdmR3DevHlp_VMState,
3232	0,
3233	0,
3234	0,
3235	0,
3236	0,
3237	0,
3238	0,
3239	pdmR3DevHlp_Untrusted_GetVM,
3240	pdmR3DevHlp_Untrusted_PCIBusRegister,
3241	pdmR3DevHlp_Untrusted_PICRegister,
3242	pdmR3DevHlp_Untrusted_APICRegister,
3243	pdmR3DevHlp_Untrusted_IOAPICRegister,
3244	pdmR3DevHlp_Untrusted_DMACRegister,
3245	pdmR3DevHlp_Untrusted_PhysRead,
3246	pdmR3DevHlp_Untrusted_PhysWrite,
3247	pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr,
3248	pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly,
3249	pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock,
3250	pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3251	pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3252	pdmR3DevHlp_Untrusted_A20IsEnabled,
3253	pdmR3DevHlp_Untrusted_A20Set,
3254	pdmR3DevHlp_Untrusted_VMReset,
3255	pdmR3DevHlp_Untrusted_VMSuspend,
3256	pdmR3DevHlp_Untrusted_VMPowerOff,
3257	pdmR3DevHlp_Untrusted_LockVM,
3258	pdmR3DevHlp_Untrusted_UnlockVM,
3259	pdmR3DevHlp_Untrusted_AssertVMLock,
3260	pdmR3DevHlp_Untrusted_DMARegister,
3261	pdmR3DevHlp_Untrusted_DMAReadMemory,
3262	pdmR3DevHlp_Untrusted_DMAWriteMemory,
3263	pdmR3DevHlp_Untrusted_DMASetDREQ,
3264	pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3265	pdmR3DevHlp_Untrusted_DMASchedule,
3266	pdmR3DevHlp_Untrusted_CMOSWrite,
3267	pdmR3DevHlp_Untrusted_CMOSRead,
3268	pdmR3DevHlp_Untrusted_GetCpuId,
3269	pdmR3DevHlp_Untrusted_ROMProtectShadow,
3270	pdmR3DevHlp_Untrusted_MMIO2Register,
3271	pdmR3DevHlp_Untrusted_MMIO2Deregister,
3272	pdmR3DevHlp_Untrusted_MMIO2Map,
3273	pdmR3DevHlp_Untrusted_MMIO2Unmap,
3274	pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3275	pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3276	pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3277	pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3278	PDM_DEVHLP_VERSION /* the end */
3279	};
3280
3281
3282
3283	/**
3284	* Queue consumer callback for internal component.
3285	*
3286	* @returns Success indicator.
3287	* If false the item will not be removed and the flushing will stop.
3288	* @param pVM The VM handle.
3289	* @param pItem The item to consume. Upon return this item will be freed.
3290	*/
3291	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3292	{
3293	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3294	LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3295	switch (pTask->enmOp)
3296	{
3297	case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3298	PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3299	break;
3300
3301	case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3302	pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3303	break;
3304
3305	case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3306	PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3307	break;
3308
3309	default:
3310	AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3311	break;
3312	}
3313	return true;
3314	}
3315
3316	/** @} */
3317

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source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 18626

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