VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 19041

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1/* $Id: PDMDevHlp.cpp 19041 2009-04-21 02:03:12Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/mm.h>
30#include <VBox/pgm.h>
31#include <VBox/iom.h>
32#include <VBox/rem.h>
33#include <VBox/dbgf.h>
34#include <VBox/vm.h>
35#include <VBox/vmm.h>
36
37#include <VBox/version.h>
38#include <VBox/log.h>
39#include <VBox/err.h>
40#include <iprt/asm.h>
41#include <iprt/assert.h>
42#include <iprt/string.h>
43#include <iprt/thread.h>
44
45
46/*******************************************************************************
47* Defined Constants And Macros *
48*******************************************************************************/
49/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50 * Define this to enable the deadlock detection when accessing physical memory.
51 */
52#if /*defined(DEBUG_bird) ||*/ defined(DOXYGEN_RUNNING)
53# define PDM_DEVHLP_DEADLOCK_DETECTION
54#endif
55
56
57/*******************************************************************************
58* Defined Constants And Macros *
59*******************************************************************************/
60/** @name R3 DevHlp
61 * @{
62 */
63
64
65/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
66static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68{
69 PDMDEV_ASSERT_DEVINS(pDevIns);
70 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
71 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
75
76 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
77 return rc;
78}
79
80
81/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
82static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
83 const char *pszOut, const char *pszIn,
84 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
85{
86 PDMDEV_ASSERT_DEVINS(pDevIns);
87 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
88 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
89 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
90
91 /*
92 * Resolve the functions (one of the can be NULL).
93 */
94 int rc = VINF_SUCCESS;
95 if ( pDevIns->pDevReg->szRCMod[0]
96 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
97 {
98 RTRCPTR RCPtrIn = NIL_RTRCPTR;
99 if (pszIn)
100 {
101 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
102 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
103 }
104 RTRCPTR RCPtrOut = NIL_RTRCPTR;
105 if (pszOut && RT_SUCCESS(rc))
106 {
107 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
108 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
109 }
110 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
111 if (pszInStr && RT_SUCCESS(rc))
112 {
113 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
114 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
115 }
116 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
117 if (pszOutStr && RT_SUCCESS(rc))
118 {
119 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
120 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
121 }
122
123 if (RT_SUCCESS(rc))
124 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
125 }
126 else
127 {
128 AssertMsgFailed(("No GC module for this driver!\n"));
129 rc = VERR_INVALID_PARAMETER;
130 }
131
132 LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
133 return rc;
134}
135
136
137/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
138static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
139 const char *pszOut, const char *pszIn,
140 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
141{
142 PDMDEV_ASSERT_DEVINS(pDevIns);
143 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
144 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
145 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
146
147 /*
148 * Resolve the functions (one of the can be NULL).
149 */
150 int rc = VINF_SUCCESS;
151 if ( pDevIns->pDevReg->szR0Mod[0]
152 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
153 {
154 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
155 if (pszIn)
156 {
157 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
158 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
159 }
160 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
161 if (pszOut && RT_SUCCESS(rc))
162 {
163 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
164 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
165 }
166 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
167 if (pszInStr && RT_SUCCESS(rc))
168 {
169 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
170 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
171 }
172 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
173 if (pszOutStr && RT_SUCCESS(rc))
174 {
175 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
176 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
177 }
178
179 if (RT_SUCCESS(rc))
180 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
181 }
182 else
183 {
184 AssertMsgFailed(("No R0 module for this driver!\n"));
185 rc = VERR_INVALID_PARAMETER;
186 }
187
188 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
189 return rc;
190}
191
192
193/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
194static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
195{
196 PDMDEV_ASSERT_DEVINS(pDevIns);
197 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
198 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
199 Port, cPorts));
200
201 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
202
203 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
204 return rc;
205}
206
207
208/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
209static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
210 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
211 const char *pszDesc)
212{
213 PDMDEV_ASSERT_DEVINS(pDevIns);
214 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
215 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
216 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
217
218 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
219
220 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
221 return rc;
222}
223
224
225/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
226static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
227 const char *pszWrite, const char *pszRead, const char *pszFill,
228 const char *pszDesc)
229{
230 PDMDEV_ASSERT_DEVINS(pDevIns);
231 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
232 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
233 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
234
235 /*
236 * Resolve the functions.
237 * Not all function have to present, leave it to IOM to enforce this.
238 */
239 int rc = VINF_SUCCESS;
240 if ( pDevIns->pDevReg->szRCMod[0]
241 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
242 {
243 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
244 if (pszWrite)
245 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
246
247 RTRCPTR RCPtrRead = NIL_RTRCPTR;
248 int rc2 = VINF_SUCCESS;
249 if (pszRead)
250 rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
251
252 RTRCPTR RCPtrFill = NIL_RTRCPTR;
253 int rc3 = VINF_SUCCESS;
254 if (pszFill)
255 rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
256
257 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
258 rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
259 else
260 {
261 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
262 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
263 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
264 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
265 rc = rc2;
266 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
267 rc = rc3;
268 }
269 }
270 else
271 {
272 AssertMsgFailed(("No GC module for this driver!\n"));
273 rc = VERR_INVALID_PARAMETER;
274 }
275
276 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
277 return rc;
278}
279
280/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
281static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
282 const char *pszWrite, const char *pszRead, const char *pszFill,
283 const char *pszDesc)
284{
285 PDMDEV_ASSERT_DEVINS(pDevIns);
286 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
287 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
288 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
289
290 /*
291 * Resolve the functions.
292 * Not all function have to present, leave it to IOM to enforce this.
293 */
294 int rc = VINF_SUCCESS;
295 if ( pDevIns->pDevReg->szR0Mod[0]
296 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
297 {
298 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
299 if (pszWrite)
300 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
301 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
302 int rc2 = VINF_SUCCESS;
303 if (pszRead)
304 rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
305 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
306 int rc3 = VINF_SUCCESS;
307 if (pszFill)
308 rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
309 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
310 rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
311 else
312 {
313 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
314 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
315 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
316 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
317 rc = rc2;
318 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
319 rc = rc3;
320 }
321 }
322 else
323 {
324 AssertMsgFailed(("No R0 module for this driver!\n"));
325 rc = VERR_INVALID_PARAMETER;
326 }
327
328 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
329 return rc;
330}
331
332
333/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
334static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
335{
336 PDMDEV_ASSERT_DEVINS(pDevIns);
337 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
338 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
339 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
340
341 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
342
343 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
344 return rc;
345}
346
347
348/** @copydoc PDMDEVHLPR3::pfnROMRegister */
349static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
350{
351 PDMDEV_ASSERT_DEVINS(pDevIns);
352 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
353 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
354 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
355
356 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
357
358 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
359 return rc;
360}
361
362
363/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
364static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
365 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
366 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
367{
368 PDMDEV_ASSERT_DEVINS(pDevIns);
369 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
370 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
371 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
372
373 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pszName, u32Instance, u32Version, cbGuess,
374 pfnSavePrep, pfnSaveExec, pfnSaveDone,
375 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
376
377 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
378 return rc;
379}
380
381
382/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
383static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
384{
385 PDMDEV_ASSERT_DEVINS(pDevIns);
386 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
387 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
388 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
389
390 int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
391
392 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
393 return rc;
394}
395
396
397/** @copydoc PDMDEVHLPR3::pfnTMTimerCreateExternal */
398static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)
399{
400 PDMDEV_ASSERT_DEVINS(pDevIns);
401 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
402
403 return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMR3, enmClock, pfnCallback, pvUser, pszDesc);
404}
405
406
407/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
408static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
409{
410 PDMDEV_ASSERT_DEVINS(pDevIns);
411 PVM pVM = pDevIns->Internal.s.pVMR3;
412 VM_ASSERT_EMT(pVM);
413 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
414 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
415
416 /*
417 * Validate input.
418 */
419 if (!pPciDev)
420 {
421 Assert(pPciDev);
422 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
423 return VERR_INVALID_PARAMETER;
424 }
425 if (!pPciDev->config[0] && !pPciDev->config[1])
426 {
427 Assert(pPciDev->config[0] || pPciDev->config[1]);
428 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
429 return VERR_INVALID_PARAMETER;
430 }
431 if (pDevIns->Internal.s.pPciDeviceR3)
432 {
433 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
434 * support a PDM device with multiple PCI devices. This might become a problem
435 * when upgrading the chipset for instance because of multiple functions in some
436 * devices...
437 */
438 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
439 return VERR_INTERNAL_ERROR;
440 }
441
442 /*
443 * Choose the PCI bus for the device.
444 *
445 * This is simple. If the device was configured for a particular bus, the PCIBusNo
446 * configuration value will be set. If not the default bus is 0.
447 */
448 int rc;
449 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
450 if (!pBus)
451 {
452 uint8_t u8Bus;
453 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
454 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
455 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
456 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
457 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
458 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
459 VERR_PDM_NO_PCI_BUS);
460 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
461 }
462 if (pBus->pDevInsR3)
463 {
464 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
465 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
466 else
467 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
468
469 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
470 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
471 else
472 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
473
474 /*
475 * Check the configuration for PCI device and function assignment.
476 */
477 int iDev = -1;
478 uint8_t u8Device;
479 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
480 if (RT_SUCCESS(rc))
481 {
482 if (u8Device > 31)
483 {
484 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
485 u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
486 return VERR_INTERNAL_ERROR;
487 }
488
489 uint8_t u8Function;
490 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
491 if (RT_FAILURE(rc))
492 {
493 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
494 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
495 return rc;
496 }
497 if (u8Function > 7)
498 {
499 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
500 u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
501 return VERR_INTERNAL_ERROR;
502 }
503 iDev = (u8Device << 3) | u8Function;
504 }
505 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
506 {
507 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
508 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
509 return rc;
510 }
511
512 /*
513 * Call the pci bus device to do the actual registration.
514 */
515 pdmLock(pVM);
516 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
517 pdmUnlock(pVM);
518 if (RT_SUCCESS(rc))
519 {
520 pPciDev->pDevIns = pDevIns;
521
522 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
523 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
524 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
525 else
526 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
527
528 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
529 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
530 else
531 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
532
533 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
534 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
535 }
536 }
537 else
538 {
539 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
540 rc = VERR_PDM_NO_PCI_BUS;
541 }
542
543 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
544 return rc;
545}
546
547
548/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
549static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
550{
551 PDMDEV_ASSERT_DEVINS(pDevIns);
552 PVM pVM = pDevIns->Internal.s.pVMR3;
553 VM_ASSERT_EMT(pVM);
554 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
555 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
556
557 /*
558 * Validate input.
559 */
560 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
561 {
562 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
563 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
564 return VERR_INVALID_PARAMETER;
565 }
566 switch (enmType)
567 {
568 case PCI_ADDRESS_SPACE_IO:
569 /*
570 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
571 */
572 AssertMsgReturn(cbRegion <= _32K,
573 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
574 VERR_INVALID_PARAMETER);
575 break;
576
577 case PCI_ADDRESS_SPACE_MEM:
578 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
579 /*
580 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
581 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
582 */
583 AssertMsgReturn(cbRegion <= 512 * _1M,
584 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
585 VERR_INVALID_PARAMETER);
586 break;
587 default:
588 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
589 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
590 return VERR_INVALID_PARAMETER;
591 }
592 if (!pfnCallback)
593 {
594 Assert(pfnCallback);
595 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
596 return VERR_INVALID_PARAMETER;
597 }
598 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
599
600 /*
601 * Must have a PCI device registered!
602 */
603 int rc;
604 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
605 if (pPciDev)
606 {
607 /*
608 * We're currently restricted to page aligned MMIO regions.
609 */
610 if ( (enmType == PCI_ADDRESS_SPACE_MEM || enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
611 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
612 {
613 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
614 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
615 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
616 }
617
618 /*
619 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
620 */
621 int iLastSet = ASMBitLastSetU32(cbRegion);
622 Assert(iLastSet > 0);
623 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
624 if (cbRegion > cbRegionAligned)
625 cbRegion = cbRegionAligned * 2; /* round up */
626
627 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
628 Assert(pBus);
629 pdmLock(pVM);
630 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
631 pdmUnlock(pVM);
632 }
633 else
634 {
635 AssertMsgFailed(("No PCI device registered!\n"));
636 rc = VERR_PDM_NOT_PCI_DEVICE;
637 }
638
639 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
640 return rc;
641}
642
643
644/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
645static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
646 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
647{
648 PDMDEV_ASSERT_DEVINS(pDevIns);
649 PVM pVM = pDevIns->Internal.s.pVMR3;
650 VM_ASSERT_EMT(pVM);
651 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
652 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
653
654 /*
655 * Validate input and resolve defaults.
656 */
657 AssertPtr(pfnRead);
658 AssertPtr(pfnWrite);
659 AssertPtrNull(ppfnReadOld);
660 AssertPtrNull(ppfnWriteOld);
661 AssertPtrNull(pPciDev);
662
663 if (!pPciDev)
664 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
665 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
666 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
667 AssertRelease(pBus);
668 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
669
670 /*
671 * Do the job.
672 */
673 pdmLock(pVM);
674 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
675 pdmUnlock(pVM);
676
677 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
678}
679
680
681/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
682static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
683{
684 PDMDEV_ASSERT_DEVINS(pDevIns);
685 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
686
687 /*
688 * Validate input.
689 */
690 /** @todo iIrq and iLevel checks. */
691
692 /*
693 * Must have a PCI device registered!
694 */
695 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
696 if (pPciDev)
697 {
698 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
699 Assert(pBus);
700 PVM pVM = pDevIns->Internal.s.pVMR3;
701 pdmLock(pVM);
702 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
703 pdmUnlock(pVM);
704 }
705 else
706 AssertReleaseMsgFailed(("No PCI device registered!\n"));
707
708 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
709}
710
711
712/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
713static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
714{
715 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
716}
717
718
719/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
720static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
721{
722 PDMDEV_ASSERT_DEVINS(pDevIns);
723 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
724
725 /*
726 * Validate input.
727 */
728 /** @todo iIrq and iLevel checks. */
729
730 PVM pVM = pDevIns->Internal.s.pVMR3;
731 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
732
733 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
734}
735
736
737/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
738static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
739{
740 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
741}
742
743
744/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
745static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
746{
747 PDMDEV_ASSERT_DEVINS(pDevIns);
748 PVM pVM = pDevIns->Internal.s.pVMR3;
749 VM_ASSERT_EMT(pVM);
750 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
751 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
752
753 /*
754 * Lookup the LUN, it might already be registered.
755 */
756 PPDMLUN pLunPrev = NULL;
757 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
758 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
759 if (pLun->iLun == iLun)
760 break;
761
762 /*
763 * Create the LUN if if wasn't found, else check if driver is already attached to it.
764 */
765 if (!pLun)
766 {
767 if ( !pBaseInterface
768 || !pszDesc
769 || !*pszDesc)
770 {
771 Assert(pBaseInterface);
772 Assert(pszDesc || *pszDesc);
773 return VERR_INVALID_PARAMETER;
774 }
775
776 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
777 if (!pLun)
778 return VERR_NO_MEMORY;
779
780 pLun->iLun = iLun;
781 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
782 pLun->pTop = NULL;
783 pLun->pBottom = NULL;
784 pLun->pDevIns = pDevIns;
785 pLun->pszDesc = pszDesc;
786 pLun->pBase = pBaseInterface;
787 if (!pLunPrev)
788 pDevIns->Internal.s.pLunsR3 = pLun;
789 else
790 pLunPrev->pNext = pLun;
791 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
792 iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
793 }
794 else if (pLun->pTop)
795 {
796 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
797 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
798 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
799 }
800 Assert(pLun->pBase == pBaseInterface);
801
802
803 /*
804 * Get the attached driver configuration.
805 */
806 int rc;
807 char szNode[48];
808 RTStrPrintf(szNode, sizeof(szNode), "LUN#%d", iLun);
809 PCFGMNODE pNode = CFGMR3GetChild(pDevIns->Internal.s.pCfgHandle, szNode);
810 if (pNode)
811 {
812 char *pszName;
813 rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
814 if (RT_SUCCESS(rc))
815 {
816 /*
817 * Find the driver.
818 */
819 PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
820 if (pDrv)
821 {
822 /* config node */
823 PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
824 if (!pConfigNode)
825 rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
826 if (RT_SUCCESS(rc))
827 {
828 CFGMR3SetRestrictedRoot(pConfigNode);
829
830 /*
831 * Allocate the driver instance.
832 */
833 size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
834 cb = RT_ALIGN_Z(cb, 16);
835 PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
836 if (pNew)
837 {
838 /*
839 * Initialize the instance structure (declaration order).
840 */
841 pNew->u32Version = PDM_DRVINS_VERSION;
842 //pNew->Internal.s.pUp = NULL;
843 //pNew->Internal.s.pDown = NULL;
844 pNew->Internal.s.pLun = pLun;
845 pNew->Internal.s.pDrv = pDrv;
846 pNew->Internal.s.pVM = pVM;
847 //pNew->Internal.s.fDetaching = false;
848 pNew->Internal.s.pCfgHandle = pNode;
849 pNew->pDrvHlp = &g_pdmR3DrvHlp;
850 pNew->pDrvReg = pDrv->pDrvReg;
851 pNew->pCfgHandle = pConfigNode;
852 pNew->iInstance = pDrv->cInstances++;
853 pNew->pUpBase = pBaseInterface;
854 //pNew->pDownBase = NULL;
855 //pNew->IBase.pfnQueryInterface = NULL;
856 pNew->pvInstanceData = &pNew->achInstanceData[0];
857
858 /*
859 * Link with LUN and call the constructor.
860 */
861 pLun->pTop = pLun->pBottom = pNew;
862 rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle);
863 if (RT_SUCCESS(rc))
864 {
865 MMR3HeapFree(pszName);
866 *ppBaseInterface = &pNew->IBase;
867 Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
868 pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
869 LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
870
871 return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
872 }
873
874 /*
875 * Free the driver.
876 */
877 pLun->pTop = pLun->pBottom = NULL;
878 ASMMemFill32(pNew, cb, 0xdeadd0d0);
879 MMR3HeapFree(pNew);
880 pDrv->cInstances--;
881 }
882 else
883 {
884 AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
885 rc = VERR_NO_MEMORY;
886 }
887 }
888 else
889 AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
890 }
891 else
892 {
893 AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
894 rc = VERR_PDM_DRIVER_NOT_FOUND;
895 }
896 MMR3HeapFree(pszName);
897 }
898 else
899 {
900 AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
901 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
902 rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
903 }
904 }
905 else
906 rc = VERR_PDM_NO_ATTACHED_DRIVER;
907
908
909 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
910 return rc;
911}
912
913
914/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
915static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
916{
917 PDMDEV_ASSERT_DEVINS(pDevIns);
918 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
919
920 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
921
922 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
923 return pv;
924}
925
926
927/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
928static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
929{
930 PDMDEV_ASSERT_DEVINS(pDevIns);
931 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
932
933 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
934
935 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
936 return pv;
937}
938
939
940/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
941static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
942{
943 PDMDEV_ASSERT_DEVINS(pDevIns);
944 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
945
946 MMR3HeapFree(pv);
947
948 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
949}
950
951
952/** @copydoc PDMDEVHLPR3::pfnVMSetError */
953static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
954{
955 PDMDEV_ASSERT_DEVINS(pDevIns);
956 va_list args;
957 va_start(args, pszFormat);
958 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
959 va_end(args);
960 return rc;
961}
962
963
964/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
965static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
966{
967 PDMDEV_ASSERT_DEVINS(pDevIns);
968 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
969 return rc;
970}
971
972
973/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
974static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
975{
976 PDMDEV_ASSERT_DEVINS(pDevIns);
977 va_list args;
978 va_start(args, pszFormat);
979 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
980 va_end(args);
981 return rc;
982}
983
984
985/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
986static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
987{
988 PDMDEV_ASSERT_DEVINS(pDevIns);
989 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
990 return rc;
991}
992
993
994/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
995static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
996{
997 PDMDEV_ASSERT_DEVINS(pDevIns);
998 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
999 return true;
1000
1001 char szMsg[100];
1002 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1003 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1004 AssertBreakpoint();
1005 return false;
1006}
1007
1008
1009/** @copydoc PDMDEVHLPR3::pfnAssertOther */
1010static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1011{
1012 PDMDEV_ASSERT_DEVINS(pDevIns);
1013 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1014 return true;
1015
1016 char szMsg[100];
1017 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1018 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1019 AssertBreakpoint();
1020 return false;
1021}
1022
1023
1024/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
1025static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
1026{
1027 PDMDEV_ASSERT_DEVINS(pDevIns);
1028#ifdef LOG_ENABLED
1029 va_list va2;
1030 va_copy(va2, args);
1031 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1032 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1033 va_end(va2);
1034#endif
1035
1036 PVM pVM = pDevIns->Internal.s.pVMR3;
1037 VM_ASSERT_EMT(pVM);
1038 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1039
1040 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1041 return rc;
1042}
1043
1044
1045/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1046static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1047{
1048 PDMDEV_ASSERT_DEVINS(pDevIns);
1049 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1050 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1051
1052 PVM pVM = pDevIns->Internal.s.pVMR3;
1053 VM_ASSERT_EMT(pVM);
1054 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1055
1056 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1057 return rc;
1058}
1059
1060
1061/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1062static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1063{
1064 PDMDEV_ASSERT_DEVINS(pDevIns);
1065 PVM pVM = pDevIns->Internal.s.pVMR3;
1066 VM_ASSERT_EMT(pVM);
1067
1068 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1069 NOREF(pVM);
1070}
1071
1072
1073
1074/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1075static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1076 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1077{
1078 PDMDEV_ASSERT_DEVINS(pDevIns);
1079 PVM pVM = pDevIns->Internal.s.pVMR3;
1080 VM_ASSERT_EMT(pVM);
1081
1082 va_list args;
1083 va_start(args, pszName);
1084 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1085 va_end(args);
1086 AssertRC(rc);
1087
1088 NOREF(pVM);
1089}
1090
1091
1092/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1093static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1094 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1095{
1096 PDMDEV_ASSERT_DEVINS(pDevIns);
1097 PVM pVM = pDevIns->Internal.s.pVMR3;
1098 VM_ASSERT_EMT(pVM);
1099
1100 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1101 AssertRC(rc);
1102
1103 NOREF(pVM);
1104}
1105
1106
1107/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1108static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1109{
1110 PDMDEV_ASSERT_DEVINS(pDevIns);
1111 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1112 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1113 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1114 pRtcReg->pfnWrite, ppRtcHlp));
1115
1116 /*
1117 * Validate input.
1118 */
1119 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1120 {
1121 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1122 PDM_RTCREG_VERSION));
1123 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1124 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1125 return VERR_INVALID_PARAMETER;
1126 }
1127 if ( !pRtcReg->pfnWrite
1128 || !pRtcReg->pfnRead)
1129 {
1130 Assert(pRtcReg->pfnWrite);
1131 Assert(pRtcReg->pfnRead);
1132 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1133 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1134 return VERR_INVALID_PARAMETER;
1135 }
1136
1137 if (!ppRtcHlp)
1138 {
1139 Assert(ppRtcHlp);
1140 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1141 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1142 return VERR_INVALID_PARAMETER;
1143 }
1144
1145 /*
1146 * Only one DMA device.
1147 */
1148 PVM pVM = pDevIns->Internal.s.pVMR3;
1149 if (pVM->pdm.s.pRtc)
1150 {
1151 AssertMsgFailed(("Only one RTC device is supported!\n"));
1152 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1153 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1154 return VERR_INVALID_PARAMETER;
1155 }
1156
1157 /*
1158 * Allocate and initialize pci bus structure.
1159 */
1160 int rc = VINF_SUCCESS;
1161 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1162 if (pRtc)
1163 {
1164 pRtc->pDevIns = pDevIns;
1165 pRtc->Reg = *pRtcReg;
1166 pVM->pdm.s.pRtc = pRtc;
1167
1168 /* set the helper pointer. */
1169 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1170 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1171 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1172 }
1173 else
1174 rc = VERR_NO_MEMORY;
1175
1176 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1177 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1178 return rc;
1179}
1180
1181
1182/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1183static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1184 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
1185{
1186 PDMDEV_ASSERT_DEVINS(pDevIns);
1187 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool ppQueue=%p\n",
1188 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
1189
1190 PVM pVM = pDevIns->Internal.s.pVMR3;
1191 VM_ASSERT_EMT(pVM);
1192 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
1193
1194 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppQueue));
1195 return rc;
1196}
1197
1198
1199/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1200static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1201{
1202 PDMDEV_ASSERT_DEVINS(pDevIns);
1203 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1204 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1205
1206 PVM pVM = pDevIns->Internal.s.pVMR3;
1207 VM_ASSERT_EMT(pVM);
1208 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1209
1210 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1211 return rc;
1212}
1213
1214
1215/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1216static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1217{
1218 PDMDEV_ASSERT_DEVINS(pDevIns);
1219 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1220 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1221
1222 pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1223
1224 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1225 return pTime;
1226}
1227
1228
1229/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1230static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1231 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1232{
1233 PDMDEV_ASSERT_DEVINS(pDevIns);
1234 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1235 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1236 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1237
1238 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1239
1240 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1241 rc, *ppThread));
1242 return rc;
1243}
1244
1245
1246/** @copydoc PDMDEVHLPR3::pfnGetVM */
1247static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1248{
1249 PDMDEV_ASSERT_DEVINS(pDevIns);
1250 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1251 return pDevIns->Internal.s.pVMR3;
1252}
1253
1254
1255/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
1256static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1257{
1258 PDMDEV_ASSERT_DEVINS(pDevIns);
1259 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1260 return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1261}
1262
1263
1264/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1265static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1266{
1267 PDMDEV_ASSERT_DEVINS(pDevIns);
1268 PVM pVM = pDevIns->Internal.s.pVMR3;
1269 VM_ASSERT_EMT(pVM);
1270 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1271 ".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1272 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1273 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1274 pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1275
1276 /*
1277 * Validate the structure.
1278 */
1279 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1280 {
1281 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1282 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1283 return VERR_INVALID_PARAMETER;
1284 }
1285 if ( !pPciBusReg->pfnRegisterR3
1286 || !pPciBusReg->pfnIORegionRegisterR3
1287 || !pPciBusReg->pfnSetIrqR3
1288 || !pPciBusReg->pfnSaveExecR3
1289 || !pPciBusReg->pfnLoadExecR3
1290 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1291 {
1292 Assert(pPciBusReg->pfnRegisterR3);
1293 Assert(pPciBusReg->pfnIORegionRegisterR3);
1294 Assert(pPciBusReg->pfnSetIrqR3);
1295 Assert(pPciBusReg->pfnSaveExecR3);
1296 Assert(pPciBusReg->pfnLoadExecR3);
1297 Assert(pPciBusReg->pfnFakePCIBIOSR3);
1298 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1299 return VERR_INVALID_PARAMETER;
1300 }
1301 if ( pPciBusReg->pszSetIrqRC
1302 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
1303 {
1304 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1305 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1306 return VERR_INVALID_PARAMETER;
1307 }
1308 if ( pPciBusReg->pszSetIrqR0
1309 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
1310 {
1311 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1312 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1313 return VERR_INVALID_PARAMETER;
1314 }
1315 if (!ppPciHlpR3)
1316 {
1317 Assert(ppPciHlpR3);
1318 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1319 return VERR_INVALID_PARAMETER;
1320 }
1321
1322 /*
1323 * Find free PCI bus entry.
1324 */
1325 unsigned iBus = 0;
1326 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1327 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1328 break;
1329 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1330 {
1331 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1332 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1333 return VERR_INVALID_PARAMETER;
1334 }
1335 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1336
1337 /*
1338 * Resolve and init the RC bits.
1339 */
1340 if (pPciBusReg->pszSetIrqRC)
1341 {
1342 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1343 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1344 if (RT_FAILURE(rc))
1345 {
1346 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1347 return rc;
1348 }
1349 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1350 }
1351 else
1352 {
1353 pPciBus->pfnSetIrqRC = 0;
1354 pPciBus->pDevInsRC = 0;
1355 }
1356
1357 /*
1358 * Resolve and init the R0 bits.
1359 */
1360 if (pPciBusReg->pszSetIrqR0)
1361 {
1362 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1363 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1364 if (RT_FAILURE(rc))
1365 {
1366 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1367 return rc;
1368 }
1369 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1370 }
1371 else
1372 {
1373 pPciBus->pfnSetIrqR0 = 0;
1374 pPciBus->pDevInsR0 = 0;
1375 }
1376
1377 /*
1378 * Init the R3 bits.
1379 */
1380 pPciBus->iBus = iBus;
1381 pPciBus->pDevInsR3 = pDevIns;
1382 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1383 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1384 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1385 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1386 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1387 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1388 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1389
1390 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1391
1392 /* set the helper pointer and return. */
1393 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
1394 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1395 return VINF_SUCCESS;
1396}
1397
1398
1399/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1400static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1401{
1402 PDMDEV_ASSERT_DEVINS(pDevIns);
1403 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1404 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1405 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1406 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1407 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1408 ppPicHlpR3));
1409
1410 /*
1411 * Validate input.
1412 */
1413 if (pPicReg->u32Version != PDM_PICREG_VERSION)
1414 {
1415 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1416 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1417 return VERR_INVALID_PARAMETER;
1418 }
1419 if ( !pPicReg->pfnSetIrqR3
1420 || !pPicReg->pfnGetInterruptR3)
1421 {
1422 Assert(pPicReg->pfnSetIrqR3);
1423 Assert(pPicReg->pfnGetInterruptR3);
1424 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1425 return VERR_INVALID_PARAMETER;
1426 }
1427 if ( ( pPicReg->pszSetIrqRC
1428 || pPicReg->pszGetInterruptRC)
1429 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
1430 || !VALID_PTR(pPicReg->pszGetInterruptRC))
1431 )
1432 {
1433 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1434 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1435 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1436 return VERR_INVALID_PARAMETER;
1437 }
1438 if ( pPicReg->pszSetIrqRC
1439 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1440 {
1441 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1442 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1443 return VERR_INVALID_PARAMETER;
1444 }
1445 if ( pPicReg->pszSetIrqR0
1446 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1447 {
1448 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1449 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1450 return VERR_INVALID_PARAMETER;
1451 }
1452 if (!ppPicHlpR3)
1453 {
1454 Assert(ppPicHlpR3);
1455 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1456 return VERR_INVALID_PARAMETER;
1457 }
1458
1459 /*
1460 * Only one PIC device.
1461 */
1462 PVM pVM = pDevIns->Internal.s.pVMR3;
1463 if (pVM->pdm.s.Pic.pDevInsR3)
1464 {
1465 AssertMsgFailed(("Only one pic device is supported!\n"));
1466 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1467 return VERR_INVALID_PARAMETER;
1468 }
1469
1470 /*
1471 * RC stuff.
1472 */
1473 if (pPicReg->pszSetIrqRC)
1474 {
1475 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1476 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1477 if (RT_SUCCESS(rc))
1478 {
1479 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1480 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1481 }
1482 if (RT_FAILURE(rc))
1483 {
1484 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1485 return rc;
1486 }
1487 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1488 }
1489 else
1490 {
1491 pVM->pdm.s.Pic.pDevInsRC = 0;
1492 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1493 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1494 }
1495
1496 /*
1497 * R0 stuff.
1498 */
1499 if (pPicReg->pszSetIrqR0)
1500 {
1501 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1502 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1503 if (RT_SUCCESS(rc))
1504 {
1505 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1506 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1507 }
1508 if (RT_FAILURE(rc))
1509 {
1510 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1511 return rc;
1512 }
1513 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1514 Assert(pVM->pdm.s.Pic.pDevInsR0);
1515 }
1516 else
1517 {
1518 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1519 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1520 pVM->pdm.s.Pic.pDevInsR0 = 0;
1521 }
1522
1523 /*
1524 * R3 stuff.
1525 */
1526 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1527 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1528 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1529 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1530
1531 /* set the helper pointer and return. */
1532 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
1533 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1534 return VINF_SUCCESS;
1535}
1536
1537
1538/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1539static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1540{
1541 PDMDEV_ASSERT_DEVINS(pDevIns);
1542 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1543 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1544 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1545 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}} ppApicHlpR3=%p\n",
1546 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1547 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pszGetInterruptRC,
1548 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1549 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1550 pApicReg->pszBusDeliverRC, ppApicHlpR3));
1551
1552 /*
1553 * Validate input.
1554 */
1555 if (pApicReg->u32Version != PDM_APICREG_VERSION)
1556 {
1557 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1558 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1559 return VERR_INVALID_PARAMETER;
1560 }
1561 if ( !pApicReg->pfnGetInterruptR3
1562 || !pApicReg->pfnHasPendingIrqR3
1563 || !pApicReg->pfnSetBaseR3
1564 || !pApicReg->pfnGetBaseR3
1565 || !pApicReg->pfnSetTPRR3
1566 || !pApicReg->pfnGetTPRR3
1567 || !pApicReg->pfnWriteMSRR3
1568 || !pApicReg->pfnReadMSRR3
1569 || !pApicReg->pfnBusDeliverR3)
1570 {
1571 Assert(pApicReg->pfnGetInterruptR3);
1572 Assert(pApicReg->pfnHasPendingIrqR3);
1573 Assert(pApicReg->pfnSetBaseR3);
1574 Assert(pApicReg->pfnGetBaseR3);
1575 Assert(pApicReg->pfnSetTPRR3);
1576 Assert(pApicReg->pfnGetTPRR3);
1577 Assert(pApicReg->pfnWriteMSRR3);
1578 Assert(pApicReg->pfnReadMSRR3);
1579 Assert(pApicReg->pfnBusDeliverR3);
1580 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1581 return VERR_INVALID_PARAMETER;
1582 }
1583 if ( ( pApicReg->pszGetInterruptRC
1584 || pApicReg->pszHasPendingIrqRC
1585 || pApicReg->pszSetBaseRC
1586 || pApicReg->pszGetBaseRC
1587 || pApicReg->pszSetTPRRC
1588 || pApicReg->pszGetTPRRC
1589 || pApicReg->pszWriteMSRRC
1590 || pApicReg->pszReadMSRRC
1591 || pApicReg->pszBusDeliverRC)
1592 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1593 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1594 || !VALID_PTR(pApicReg->pszSetBaseRC)
1595 || !VALID_PTR(pApicReg->pszGetBaseRC)
1596 || !VALID_PTR(pApicReg->pszSetTPRRC)
1597 || !VALID_PTR(pApicReg->pszGetTPRRC)
1598 || !VALID_PTR(pApicReg->pszWriteMSRRC)
1599 || !VALID_PTR(pApicReg->pszReadMSRRC)
1600 || !VALID_PTR(pApicReg->pszBusDeliverRC))
1601 )
1602 {
1603 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1604 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1605 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1606 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1607 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1608 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1609 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1610 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1611 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1612 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1613 return VERR_INVALID_PARAMETER;
1614 }
1615 if ( ( pApicReg->pszGetInterruptR0
1616 || pApicReg->pszHasPendingIrqR0
1617 || pApicReg->pszSetBaseR0
1618 || pApicReg->pszGetBaseR0
1619 || pApicReg->pszSetTPRR0
1620 || pApicReg->pszGetTPRR0
1621 || pApicReg->pszWriteMSRR0
1622 || pApicReg->pszReadMSRR0
1623 || pApicReg->pszBusDeliverR0)
1624 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1625 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1626 || !VALID_PTR(pApicReg->pszSetBaseR0)
1627 || !VALID_PTR(pApicReg->pszGetBaseR0)
1628 || !VALID_PTR(pApicReg->pszSetTPRR0)
1629 || !VALID_PTR(pApicReg->pszGetTPRR0)
1630 || !VALID_PTR(pApicReg->pszReadMSRR0)
1631 || !VALID_PTR(pApicReg->pszWriteMSRR0)
1632 || !VALID_PTR(pApicReg->pszBusDeliverR0))
1633 )
1634 {
1635 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1636 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1637 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1638 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1639 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1640 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1641 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1642 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1643 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1644 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1645 return VERR_INVALID_PARAMETER;
1646 }
1647 if (!ppApicHlpR3)
1648 {
1649 Assert(ppApicHlpR3);
1650 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1651 return VERR_INVALID_PARAMETER;
1652 }
1653
1654 /*
1655 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
1656 * as they need to communicate and share state easily.
1657 */
1658 PVM pVM = pDevIns->Internal.s.pVMR3;
1659 if (pVM->pdm.s.Apic.pDevInsR3)
1660 {
1661 AssertMsgFailed(("Only one apic device is supported!\n"));
1662 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1663 return VERR_INVALID_PARAMETER;
1664 }
1665
1666 /*
1667 * Resolve & initialize the RC bits.
1668 */
1669 if (pApicReg->pszGetInterruptRC)
1670 {
1671 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1672 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1673 if (RT_SUCCESS(rc))
1674 {
1675 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1676 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1677 }
1678 if (RT_SUCCESS(rc))
1679 {
1680 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1681 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1682 }
1683 if (RT_SUCCESS(rc))
1684 {
1685 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1686 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1687 }
1688 if (RT_SUCCESS(rc))
1689 {
1690 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1691 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1692 }
1693 if (RT_SUCCESS(rc))
1694 {
1695 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1696 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1697 }
1698 if (RT_SUCCESS(rc))
1699 {
1700 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1701 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1702 }
1703 if (RT_SUCCESS(rc))
1704 {
1705 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1706 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1707 }
1708 if (RT_SUCCESS(rc))
1709 {
1710 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1711 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1712 }
1713 if (RT_FAILURE(rc))
1714 {
1715 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1716 return rc;
1717 }
1718 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1719 }
1720 else
1721 {
1722 pVM->pdm.s.Apic.pDevInsRC = 0;
1723 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1724 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1725 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1726 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1727 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1728 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1729 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1730 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1731 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1732 }
1733
1734 /*
1735 * Resolve & initialize the R0 bits.
1736 */
1737 if (pApicReg->pszGetInterruptR0)
1738 {
1739 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1740 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1741 if (RT_SUCCESS(rc))
1742 {
1743 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1744 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1745 }
1746 if (RT_SUCCESS(rc))
1747 {
1748 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1749 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1750 }
1751 if (RT_SUCCESS(rc))
1752 {
1753 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1754 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1755 }
1756 if (RT_SUCCESS(rc))
1757 {
1758 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1759 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1760 }
1761 if (RT_SUCCESS(rc))
1762 {
1763 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1764 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1765 }
1766 if (RT_SUCCESS(rc))
1767 {
1768 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1769 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1770 }
1771 if (RT_SUCCESS(rc))
1772 {
1773 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1774 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1775 }
1776 if (RT_SUCCESS(rc))
1777 {
1778 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1779 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1780 }
1781 if (RT_FAILURE(rc))
1782 {
1783 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1784 return rc;
1785 }
1786 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1787 Assert(pVM->pdm.s.Apic.pDevInsR0);
1788 }
1789 else
1790 {
1791 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1792 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1793 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1794 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1795 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1796 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1797 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1798 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1799 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1800 pVM->pdm.s.Apic.pDevInsR0 = 0;
1801 }
1802
1803 /*
1804 * Initialize the HC bits.
1805 */
1806 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1807 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1808 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1809 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1810 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1811 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1812 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1813 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1814 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1815 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1816 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1817
1818 /* set the helper pointer and return. */
1819 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
1820 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1821 return VINF_SUCCESS;
1822}
1823
1824
1825/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1826static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1827{
1828 PDMDEV_ASSERT_DEVINS(pDevIns);
1829 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1830 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1831 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1832 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1833
1834 /*
1835 * Validate input.
1836 */
1837 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1838 {
1839 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1840 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1841 return VERR_INVALID_PARAMETER;
1842 }
1843 if (!pIoApicReg->pfnSetIrqR3)
1844 {
1845 Assert(pIoApicReg->pfnSetIrqR3);
1846 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1847 return VERR_INVALID_PARAMETER;
1848 }
1849 if ( pIoApicReg->pszSetIrqRC
1850 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
1851 {
1852 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1853 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1854 return VERR_INVALID_PARAMETER;
1855 }
1856 if ( pIoApicReg->pszSetIrqR0
1857 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
1858 {
1859 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1860 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1861 return VERR_INVALID_PARAMETER;
1862 }
1863 if (!ppIoApicHlpR3)
1864 {
1865 Assert(ppIoApicHlpR3);
1866 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1867 return VERR_INVALID_PARAMETER;
1868 }
1869
1870 /*
1871 * The I/O APIC requires the APIC to be present (hacks++).
1872 * If the I/O APIC does GC stuff so must the APIC.
1873 */
1874 PVM pVM = pDevIns->Internal.s.pVMR3;
1875 if (!pVM->pdm.s.Apic.pDevInsR3)
1876 {
1877 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1878 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1879 return VERR_INVALID_PARAMETER;
1880 }
1881 if ( pIoApicReg->pszSetIrqRC
1882 && !pVM->pdm.s.Apic.pDevInsRC)
1883 {
1884 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1885 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1886 return VERR_INVALID_PARAMETER;
1887 }
1888
1889 /*
1890 * Only one I/O APIC device.
1891 */
1892 if (pVM->pdm.s.IoApic.pDevInsR3)
1893 {
1894 AssertMsgFailed(("Only one ioapic device is supported!\n"));
1895 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1896 return VERR_INVALID_PARAMETER;
1897 }
1898
1899 /*
1900 * Resolve & initialize the GC bits.
1901 */
1902 if (pIoApicReg->pszSetIrqRC)
1903 {
1904 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
1905 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
1906 if (RT_FAILURE(rc))
1907 {
1908 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1909 return rc;
1910 }
1911 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1912 }
1913 else
1914 {
1915 pVM->pdm.s.IoApic.pDevInsRC = 0;
1916 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
1917 }
1918
1919 /*
1920 * Resolve & initialize the R0 bits.
1921 */
1922 if (pIoApicReg->pszSetIrqR0)
1923 {
1924 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
1925 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
1926 if (RT_FAILURE(rc))
1927 {
1928 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1929 return rc;
1930 }
1931 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1932 Assert(pVM->pdm.s.IoApic.pDevInsR0);
1933 }
1934 else
1935 {
1936 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
1937 pVM->pdm.s.IoApic.pDevInsR0 = 0;
1938 }
1939
1940 /*
1941 * Initialize the R3 bits.
1942 */
1943 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
1944 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
1945 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1946
1947 /* set the helper pointer and return. */
1948 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
1949 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1950 return VINF_SUCCESS;
1951}
1952
1953
1954/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
1955static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
1956{
1957 PDMDEV_ASSERT_DEVINS(pDevIns);
1958 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1959 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
1960 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
1961 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
1962
1963 /*
1964 * Validate input.
1965 */
1966 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
1967 {
1968 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
1969 PDM_DMACREG_VERSION));
1970 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
1971 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1972 return VERR_INVALID_PARAMETER;
1973 }
1974 if ( !pDmacReg->pfnRun
1975 || !pDmacReg->pfnRegister
1976 || !pDmacReg->pfnReadMemory
1977 || !pDmacReg->pfnWriteMemory
1978 || !pDmacReg->pfnSetDREQ
1979 || !pDmacReg->pfnGetChannelMode)
1980 {
1981 Assert(pDmacReg->pfnRun);
1982 Assert(pDmacReg->pfnRegister);
1983 Assert(pDmacReg->pfnReadMemory);
1984 Assert(pDmacReg->pfnWriteMemory);
1985 Assert(pDmacReg->pfnSetDREQ);
1986 Assert(pDmacReg->pfnGetChannelMode);
1987 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1988 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1989 return VERR_INVALID_PARAMETER;
1990 }
1991
1992 if (!ppDmacHlp)
1993 {
1994 Assert(ppDmacHlp);
1995 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
1996 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1997 return VERR_INVALID_PARAMETER;
1998 }
1999
2000 /*
2001 * Only one DMA device.
2002 */
2003 PVM pVM = pDevIns->Internal.s.pVMR3;
2004 if (pVM->pdm.s.pDmac)
2005 {
2006 AssertMsgFailed(("Only one DMA device is supported!\n"));
2007 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2008 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2009 return VERR_INVALID_PARAMETER;
2010 }
2011
2012 /*
2013 * Allocate and initialize pci bus structure.
2014 */
2015 int rc = VINF_SUCCESS;
2016 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2017 if (pDmac)
2018 {
2019 pDmac->pDevIns = pDevIns;
2020 pDmac->Reg = *pDmacReg;
2021 pVM->pdm.s.pDmac = pDmac;
2022
2023 /* set the helper pointer. */
2024 *ppDmacHlp = &g_pdmR3DevDmacHlp;
2025 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2026 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2027 }
2028 else
2029 rc = VERR_NO_MEMORY;
2030
2031 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2032 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2033 return rc;
2034}
2035
2036
2037/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2038static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2039{
2040 PDMDEV_ASSERT_DEVINS(pDevIns);
2041 PVM pVM = pDevIns->Internal.s.pVMR3;
2042 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2043 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2044
2045#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2046 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2047 {
2048 char szNames[128];
2049 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2050 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2051 }
2052#endif
2053
2054 int rc;
2055 if (VM_IS_EMT(pVM))
2056 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
2057 else
2058 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
2059
2060 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2061 return rc;
2062}
2063
2064
2065/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2066static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2067{
2068 PDMDEV_ASSERT_DEVINS(pDevIns);
2069 PVM pVM = pDevIns->Internal.s.pVMR3;
2070 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2071 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2072
2073#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2074 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2075 {
2076 char szNames[128];
2077 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2078 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2079 }
2080#endif
2081
2082 int rc;
2083 if (VM_IS_EMT(pVM))
2084 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
2085 else
2086 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite);
2087
2088 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2089 return rc;
2090}
2091
2092
2093/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2094static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2095{
2096 PDMDEV_ASSERT_DEVINS(pDevIns);
2097 PVM pVM = pDevIns->Internal.s.pVMR3;
2098 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2099 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2100 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2101
2102#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2103 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2104 {
2105 char szNames[128];
2106 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2107 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2108 }
2109#endif
2110
2111 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
2112
2113 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2114 return rc;
2115}
2116
2117
2118/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2119static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2120{
2121 PDMDEV_ASSERT_DEVINS(pDevIns);
2122 PVM pVM = pDevIns->Internal.s.pVMR3;
2123 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2124 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2125 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2126
2127#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2128 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2129 {
2130 char szNames[128];
2131 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2132 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2133 }
2134#endif
2135
2136 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
2137
2138 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2139 return rc;
2140}
2141
2142
2143/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2144static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2145{
2146 PDMDEV_ASSERT_DEVINS(pDevIns);
2147 PVM pVM = pDevIns->Internal.s.pVMR3;
2148 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
2149 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pLock));
2150
2151 PGMPhysReleasePageMappingLock(pVM, pLock);
2152
2153 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2154}
2155
2156
2157/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2158static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2159{
2160 PDMDEV_ASSERT_DEVINS(pDevIns);
2161 PVM pVM = pDevIns->Internal.s.pVMR3;
2162 VM_ASSERT_EMT(pVM);
2163 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2164 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2165
2166 if (!VM_IS_EMT(pVM))
2167 return VERR_ACCESS_DENIED;
2168#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2169 /** @todo SMP. */
2170#endif
2171
2172 int rc = PGMPhysSimpleReadGCPtr(VMMGetCpu(pVM), pvDst, GCVirtSrc, cb);
2173
2174 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2175
2176 return rc;
2177}
2178
2179
2180/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2181static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2182{
2183 PDMDEV_ASSERT_DEVINS(pDevIns);
2184 PVM pVM = pDevIns->Internal.s.pVMR3;
2185 VM_ASSERT_EMT(pVM);
2186 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2187 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2188
2189 if (!VM_IS_EMT(pVM))
2190 return VERR_ACCESS_DENIED;
2191#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2192 /** @todo SMP. */
2193#endif
2194
2195 int rc = PGMPhysSimpleWriteGCPtr(VMMGetCpu(pVM), GCVirtDst, pvSrc, cb);
2196
2197 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2198
2199 return rc;
2200}
2201
2202
2203/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2204static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2205{
2206 PDMDEV_ASSERT_DEVINS(pDevIns);
2207 PVM pVM = pDevIns->Internal.s.pVMR3;
2208 VM_ASSERT_EMT(pVM);
2209 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2210 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2211
2212 if (!VM_IS_EMT(pVM))
2213 return VERR_ACCESS_DENIED;
2214#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2215 /** @todo SMP. */
2216#endif
2217
2218 int rc = PGMPhysGCPtr2GCPhys(VMMGetCpu(pVM), GCPtr, pGCPhys);
2219
2220 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pGCPhys));
2221
2222 return rc;
2223}
2224
2225
2226/** @copydoc PDMDEVHLPR3::pfnVMState */
2227static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
2228{
2229 PDMDEV_ASSERT_DEVINS(pDevIns);
2230
2231 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2232
2233 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2234 enmVMState, VMR3GetStateName(enmVMState)));
2235 return enmVMState;
2236}
2237
2238
2239/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2240static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2241{
2242 PDMDEV_ASSERT_DEVINS(pDevIns);
2243 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2244
2245 bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
2246
2247 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2248 return fRc;
2249}
2250
2251
2252/** @copydoc PDMDEVHLPR3::pfnA20Set */
2253static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2254{
2255 PDMDEV_ASSERT_DEVINS(pDevIns);
2256 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2257 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2258 //Assert(*(unsigned *)&fEnable <= 1);
2259 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
2260}
2261
2262
2263/** @copydoc PDMDEVHLPR3::pfnVMReset */
2264static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2265{
2266 PDMDEV_ASSERT_DEVINS(pDevIns);
2267 PVM pVM = pDevIns->Internal.s.pVMR3;
2268 VM_ASSERT_EMT(pVM);
2269 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2270 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2271
2272 /*
2273 * We postpone this operation because we're likely to be inside a I/O instruction
2274 * and the EIP will be updated when we return.
2275 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2276 */
2277 bool fHaltOnReset;
2278 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2279 if (RT_SUCCESS(rc) && fHaltOnReset)
2280 {
2281 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2282 rc = VINF_EM_HALT;
2283 }
2284 else
2285 {
2286 VM_FF_SET(pVM, VM_FF_RESET);
2287 rc = VINF_EM_RESET;
2288 }
2289
2290 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2291 return rc;
2292}
2293
2294
2295/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2296static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2297{
2298 PDMDEV_ASSERT_DEVINS(pDevIns);
2299 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2300 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2301 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2302
2303 int rc = VMR3Suspend(pDevIns->Internal.s.pVMR3);
2304
2305 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2306 return rc;
2307}
2308
2309
2310/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2311static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2312{
2313 PDMDEV_ASSERT_DEVINS(pDevIns);
2314 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2315 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2316 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2317
2318 int rc = VMR3PowerOff(pDevIns->Internal.s.pVMR3);
2319
2320 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2321 return rc;
2322}
2323
2324
2325/** @copydoc PDMDEVHLPR3::pfnLockVM */
2326static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns)
2327{
2328 return VMMR3Lock(pDevIns->Internal.s.pVMR3);
2329}
2330
2331
2332/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2333static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns)
2334{
2335 return VMMR3Unlock(pDevIns->Internal.s.pVMR3);
2336}
2337
2338
2339/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
2340static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2341{
2342 PVM pVM = pDevIns->Internal.s.pVMR3;
2343 if (VMMR3LockIsOwner(pVM))
2344 return true;
2345
2346 RTNATIVETHREAD NativeThreadOwner = VMMR3LockGetOwner(pVM);
2347 RTTHREAD ThreadOwner = RTThreadFromNative(NativeThreadOwner);
2348 char szMsg[100];
2349 RTStrPrintf(szMsg, sizeof(szMsg), "AssertVMLocked '%s'/%d ThreadOwner=%RTnthrd/%RTthrd/'%s' Self='%s'\n",
2350 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2351 NativeThreadOwner, ThreadOwner, RTThreadGetName(ThreadOwner), RTThreadSelfName());
2352 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2353 AssertBreakpoint();
2354 return false;
2355}
2356
2357/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2358static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2359{
2360 PDMDEV_ASSERT_DEVINS(pDevIns);
2361 PVM pVM = pDevIns->Internal.s.pVMR3;
2362 VM_ASSERT_EMT(pVM);
2363 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2364 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2365 int rc = VINF_SUCCESS;
2366 if (pVM->pdm.s.pDmac)
2367 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2368 else
2369 {
2370 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2371 rc = VERR_PDM_NO_DMAC_INSTANCE;
2372 }
2373 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2374 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2375 return rc;
2376}
2377
2378/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2379static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
2380{
2381 PDMDEV_ASSERT_DEVINS(pDevIns);
2382 PVM pVM = pDevIns->Internal.s.pVMR3;
2383 VM_ASSERT_EMT(pVM);
2384 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2385 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2386 int rc = VINF_SUCCESS;
2387 if (pVM->pdm.s.pDmac)
2388 {
2389 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2390 if (pcbRead)
2391 *pcbRead = cb;
2392 }
2393 else
2394 {
2395 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2396 rc = VERR_PDM_NO_DMAC_INSTANCE;
2397 }
2398 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2399 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2400 return rc;
2401}
2402
2403/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2404static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
2405{
2406 PDMDEV_ASSERT_DEVINS(pDevIns);
2407 PVM pVM = pDevIns->Internal.s.pVMR3;
2408 VM_ASSERT_EMT(pVM);
2409 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2410 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2411 int rc = VINF_SUCCESS;
2412 if (pVM->pdm.s.pDmac)
2413 {
2414 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2415 if (pcbWritten)
2416 *pcbWritten = cb;
2417 }
2418 else
2419 {
2420 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2421 rc = VERR_PDM_NO_DMAC_INSTANCE;
2422 }
2423 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2424 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2425 return rc;
2426}
2427
2428/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2429static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2430{
2431 PDMDEV_ASSERT_DEVINS(pDevIns);
2432 PVM pVM = pDevIns->Internal.s.pVMR3;
2433 VM_ASSERT_EMT(pVM);
2434 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2435 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2436 int rc = VINF_SUCCESS;
2437 if (pVM->pdm.s.pDmac)
2438 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2439 else
2440 {
2441 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2442 rc = VERR_PDM_NO_DMAC_INSTANCE;
2443 }
2444 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2445 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2446 return rc;
2447}
2448
2449/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2450static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2451{
2452 PDMDEV_ASSERT_DEVINS(pDevIns);
2453 PVM pVM = pDevIns->Internal.s.pVMR3;
2454 VM_ASSERT_EMT(pVM);
2455 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2456 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2457 uint8_t u8Mode;
2458 if (pVM->pdm.s.pDmac)
2459 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2460 else
2461 {
2462 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2463 u8Mode = 3 << 2 /* illegal mode type */;
2464 }
2465 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2466 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2467 return u8Mode;
2468}
2469
2470/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2471static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2472{
2473 PDMDEV_ASSERT_DEVINS(pDevIns);
2474 PVM pVM = pDevIns->Internal.s.pVMR3;
2475 VM_ASSERT_EMT(pVM);
2476 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2477 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2478
2479 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2480 VM_FF_SET(pVM, VM_FF_PDM_DMA);
2481 REMR3NotifyDmaPending(pVM);
2482 VMR3NotifyFF(pVM, true);
2483}
2484
2485
2486/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2487static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2488{
2489 PDMDEV_ASSERT_DEVINS(pDevIns);
2490 PVM pVM = pDevIns->Internal.s.pVMR3;
2491 VM_ASSERT_EMT(pVM);
2492
2493 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2494 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2495 int rc;
2496 if (pVM->pdm.s.pRtc)
2497 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2498 else
2499 rc = VERR_PDM_NO_RTC_INSTANCE;
2500
2501 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2502 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2503 return rc;
2504}
2505
2506
2507/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2508static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2509{
2510 PDMDEV_ASSERT_DEVINS(pDevIns);
2511 PVM pVM = pDevIns->Internal.s.pVMR3;
2512 VM_ASSERT_EMT(pVM);
2513
2514 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2515 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2516 int rc;
2517 if (pVM->pdm.s.pRtc)
2518 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2519 else
2520 rc = VERR_PDM_NO_RTC_INSTANCE;
2521
2522 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2523 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2524 return rc;
2525}
2526
2527
2528/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2529static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2530 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
2531{
2532 PDMDEV_ASSERT_DEVINS(pDevIns);
2533 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2534 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2535 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2536
2537 CPUMGetGuestCpuId(pDevIns->Internal.s.pVMR3, iLeaf, pEax, pEbx, pEcx, pEdx);
2538
2539 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
2540 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
2541}
2542
2543
2544/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2545static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
2546{
2547 PDMDEV_ASSERT_DEVINS(pDevIns);
2548 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
2549 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
2550
2551 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
2552
2553 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2554 return rc;
2555}
2556
2557
2558/**
2559 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
2560 */
2561static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
2562{
2563 PDMDEV_ASSERT_DEVINS(pDevIns);
2564 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2565 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2566 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2567
2568 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2569
2570 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2571 return rc;
2572}
2573
2574
2575/**
2576 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2577 */
2578static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2579{
2580 PDMDEV_ASSERT_DEVINS(pDevIns);
2581 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2582 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=#x\n",
2583 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2584
2585 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2586
2587 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2588
2589 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2590 return rc;
2591}
2592
2593
2594/**
2595 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
2596 */
2597static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2598{
2599 PDMDEV_ASSERT_DEVINS(pDevIns);
2600 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2601 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2602 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2603
2604 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2605
2606 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2607 return rc;
2608}
2609
2610
2611/**
2612 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2613 */
2614static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2615{
2616 PDMDEV_ASSERT_DEVINS(pDevIns);
2617 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2618 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2619 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2620
2621 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2622
2623 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2624 return rc;
2625}
2626
2627
2628/**
2629 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2630 */
2631static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2632 const char *pszDesc, PRTRCPTR pRCPtr)
2633{
2634 PDMDEV_ASSERT_DEVINS(pDevIns);
2635 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2636 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2637 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2638
2639 int rc = MMR3HyperMapMMIO2(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2640
2641 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pRCPtr));
2642 return rc;
2643}
2644
2645
2646/**
2647 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2648 */
2649static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2650 const char *pszDesc, PRTR0PTR pR0Ptr)
2651{
2652 PDMDEV_ASSERT_DEVINS(pDevIns);
2653 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2654 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2655 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2656
2657 int rc = PGMR3PhysMMIO2MapKernel(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2658
2659 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pR0Ptr));
2660 return rc;
2661}
2662
2663
2664/**
2665 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2666 */
2667static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2668{
2669 PDMDEV_ASSERT_DEVINS(pDevIns);
2670 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2671
2672 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2673 return rc;
2674}
2675
2676
2677/**
2678 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2679 */
2680static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2681{
2682 PDMDEV_ASSERT_DEVINS(pDevIns);
2683 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2684
2685 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2686 return rc;
2687}
2688
2689
2690/**
2691 * The device helper structure for trusted devices.
2692 */
2693const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2694{
2695 PDM_DEVHLP_VERSION,
2696 pdmR3DevHlp_IOPortRegister,
2697 pdmR3DevHlp_IOPortRegisterGC,
2698 pdmR3DevHlp_IOPortRegisterR0,
2699 pdmR3DevHlp_IOPortDeregister,
2700 pdmR3DevHlp_MMIORegister,
2701 pdmR3DevHlp_MMIORegisterGC,
2702 pdmR3DevHlp_MMIORegisterR0,
2703 pdmR3DevHlp_MMIODeregister,
2704 pdmR3DevHlp_ROMRegister,
2705 pdmR3DevHlp_SSMRegister,
2706 pdmR3DevHlp_TMTimerCreate,
2707 pdmR3DevHlp_TMTimerCreateExternal,
2708 pdmR3DevHlp_PCIRegister,
2709 pdmR3DevHlp_PCIIORegionRegister,
2710 pdmR3DevHlp_PCISetConfigCallbacks,
2711 pdmR3DevHlp_PCISetIrq,
2712 pdmR3DevHlp_PCISetIrqNoWait,
2713 pdmR3DevHlp_ISASetIrq,
2714 pdmR3DevHlp_ISASetIrqNoWait,
2715 pdmR3DevHlp_DriverAttach,
2716 pdmR3DevHlp_MMHeapAlloc,
2717 pdmR3DevHlp_MMHeapAllocZ,
2718 pdmR3DevHlp_MMHeapFree,
2719 pdmR3DevHlp_VMSetError,
2720 pdmR3DevHlp_VMSetErrorV,
2721 pdmR3DevHlp_VMSetRuntimeError,
2722 pdmR3DevHlp_VMSetRuntimeErrorV,
2723 pdmR3DevHlp_AssertEMT,
2724 pdmR3DevHlp_AssertOther,
2725 pdmR3DevHlp_DBGFStopV,
2726 pdmR3DevHlp_DBGFInfoRegister,
2727 pdmR3DevHlp_STAMRegister,
2728 pdmR3DevHlp_STAMRegisterF,
2729 pdmR3DevHlp_STAMRegisterV,
2730 pdmR3DevHlp_RTCRegister,
2731 pdmR3DevHlp_PDMQueueCreate,
2732 pdmR3DevHlp_CritSectInit,
2733 pdmR3DevHlp_UTCNow,
2734 pdmR3DevHlp_PDMThreadCreate,
2735 pdmR3DevHlp_PhysGCPtr2GCPhys,
2736 pdmR3DevHlp_VMState,
2737 0,
2738 0,
2739 0,
2740 0,
2741 0,
2742 0,
2743 0,
2744 pdmR3DevHlp_GetVM,
2745 pdmR3DevHlp_PCIBusRegister,
2746 pdmR3DevHlp_PICRegister,
2747 pdmR3DevHlp_APICRegister,
2748 pdmR3DevHlp_IOAPICRegister,
2749 pdmR3DevHlp_DMACRegister,
2750 pdmR3DevHlp_PhysRead,
2751 pdmR3DevHlp_PhysWrite,
2752 pdmR3DevHlp_PhysGCPhys2CCPtr,
2753 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2754 pdmR3DevHlp_PhysReleasePageMappingLock,
2755 pdmR3DevHlp_PhysReadGCVirt,
2756 pdmR3DevHlp_PhysWriteGCVirt,
2757 pdmR3DevHlp_A20IsEnabled,
2758 pdmR3DevHlp_A20Set,
2759 pdmR3DevHlp_VMReset,
2760 pdmR3DevHlp_VMSuspend,
2761 pdmR3DevHlp_VMPowerOff,
2762 pdmR3DevHlp_LockVM,
2763 pdmR3DevHlp_UnlockVM,
2764 pdmR3DevHlp_AssertVMLock,
2765 pdmR3DevHlp_DMARegister,
2766 pdmR3DevHlp_DMAReadMemory,
2767 pdmR3DevHlp_DMAWriteMemory,
2768 pdmR3DevHlp_DMASetDREQ,
2769 pdmR3DevHlp_DMAGetChannelMode,
2770 pdmR3DevHlp_DMASchedule,
2771 pdmR3DevHlp_CMOSWrite,
2772 pdmR3DevHlp_CMOSRead,
2773 pdmR3DevHlp_GetCpuId,
2774 pdmR3DevHlp_ROMProtectShadow,
2775 pdmR3DevHlp_MMIO2Register,
2776 pdmR3DevHlp_MMIO2Deregister,
2777 pdmR3DevHlp_MMIO2Map,
2778 pdmR3DevHlp_MMIO2Unmap,
2779 pdmR3DevHlp_MMHyperMapMMIO2,
2780 pdmR3DevHlp_MMIO2MapKernel,
2781 pdmR3DevHlp_RegisterVMMDevHeap,
2782 pdmR3DevHlp_UnregisterVMMDevHeap,
2783 pdmR3DevHlp_GetVMCPU,
2784 PDM_DEVHLP_VERSION /* the end */
2785};
2786
2787
2788
2789
2790/** @copydoc PDMDEVHLPR3::pfnGetVM */
2791static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2792{
2793 PDMDEV_ASSERT_DEVINS(pDevIns);
2794 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2795 return NULL;
2796}
2797
2798
2799/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2800static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2801{
2802 PDMDEV_ASSERT_DEVINS(pDevIns);
2803 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2804 NOREF(pPciBusReg);
2805 NOREF(ppPciHlpR3);
2806 return VERR_ACCESS_DENIED;
2807}
2808
2809
2810/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2811static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2812{
2813 PDMDEV_ASSERT_DEVINS(pDevIns);
2814 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2815 NOREF(pPicReg);
2816 NOREF(ppPicHlpR3);
2817 return VERR_ACCESS_DENIED;
2818}
2819
2820
2821/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2822static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2823{
2824 PDMDEV_ASSERT_DEVINS(pDevIns);
2825 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2826 NOREF(pApicReg);
2827 NOREF(ppApicHlpR3);
2828 return VERR_ACCESS_DENIED;
2829}
2830
2831
2832/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2833static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2834{
2835 PDMDEV_ASSERT_DEVINS(pDevIns);
2836 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2837 NOREF(pIoApicReg);
2838 NOREF(ppIoApicHlpR3);
2839 return VERR_ACCESS_DENIED;
2840}
2841
2842
2843/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2844static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2845{
2846 PDMDEV_ASSERT_DEVINS(pDevIns);
2847 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2848 NOREF(pDmacReg);
2849 NOREF(ppDmacHlp);
2850 return VERR_ACCESS_DENIED;
2851}
2852
2853
2854/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2855static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2856{
2857 PDMDEV_ASSERT_DEVINS(pDevIns);
2858 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2859 NOREF(GCPhys);
2860 NOREF(pvBuf);
2861 NOREF(cbRead);
2862 return VERR_ACCESS_DENIED;
2863}
2864
2865
2866/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2867static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2868{
2869 PDMDEV_ASSERT_DEVINS(pDevIns);
2870 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2871 NOREF(GCPhys);
2872 NOREF(pvBuf);
2873 NOREF(cbWrite);
2874 return VERR_ACCESS_DENIED;
2875}
2876
2877
2878/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2879static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2880{
2881 PDMDEV_ASSERT_DEVINS(pDevIns);
2882 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2883 NOREF(GCPhys);
2884 NOREF(fFlags);
2885 NOREF(ppv);
2886 NOREF(pLock);
2887 return VERR_ACCESS_DENIED;
2888}
2889
2890
2891/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2892static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2893{
2894 PDMDEV_ASSERT_DEVINS(pDevIns);
2895 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2896 NOREF(GCPhys);
2897 NOREF(fFlags);
2898 NOREF(ppv);
2899 NOREF(pLock);
2900 return VERR_ACCESS_DENIED;
2901}
2902
2903
2904/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2905static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2906{
2907 PDMDEV_ASSERT_DEVINS(pDevIns);
2908 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2909 NOREF(pLock);
2910}
2911
2912
2913/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2914static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2915{
2916 PDMDEV_ASSERT_DEVINS(pDevIns);
2917 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2918 NOREF(pvDst);
2919 NOREF(GCVirtSrc);
2920 NOREF(cb);
2921 return VERR_ACCESS_DENIED;
2922}
2923
2924
2925/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2926static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2927{
2928 PDMDEV_ASSERT_DEVINS(pDevIns);
2929 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2930 NOREF(GCVirtDst);
2931 NOREF(pvSrc);
2932 NOREF(cb);
2933 return VERR_ACCESS_DENIED;
2934}
2935
2936
2937/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2938static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
2939{
2940 PDMDEV_ASSERT_DEVINS(pDevIns);
2941 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2942 return false;
2943}
2944
2945
2946/** @copydoc PDMDEVHLPR3::pfnA20Set */
2947static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2948{
2949 PDMDEV_ASSERT_DEVINS(pDevIns);
2950 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2951 NOREF(fEnable);
2952}
2953
2954
2955/** @copydoc PDMDEVHLPR3::pfnVMReset */
2956static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
2957{
2958 PDMDEV_ASSERT_DEVINS(pDevIns);
2959 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2960 return VERR_ACCESS_DENIED;
2961}
2962
2963
2964/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2965static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
2966{
2967 PDMDEV_ASSERT_DEVINS(pDevIns);
2968 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2969 return VERR_ACCESS_DENIED;
2970}
2971
2972
2973/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2974static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
2975{
2976 PDMDEV_ASSERT_DEVINS(pDevIns);
2977 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2978 return VERR_ACCESS_DENIED;
2979}
2980
2981
2982/** @copydoc PDMDEVHLPR3::pfnLockVM */
2983static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns)
2984{
2985 PDMDEV_ASSERT_DEVINS(pDevIns);
2986 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2987 return VERR_ACCESS_DENIED;
2988}
2989
2990
2991/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2992static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns)
2993{
2994 PDMDEV_ASSERT_DEVINS(pDevIns);
2995 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2996 return VERR_ACCESS_DENIED;
2997}
2998
2999
3000/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
3001static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
3002{
3003 PDMDEV_ASSERT_DEVINS(pDevIns);
3004 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3005 return false;
3006}
3007
3008
3009/** @copydoc PDMDEVHLPR3::pfnDMARegister */
3010static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3011{
3012 PDMDEV_ASSERT_DEVINS(pDevIns);
3013 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3014 return VERR_ACCESS_DENIED;
3015}
3016
3017
3018/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
3019static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3020{
3021 PDMDEV_ASSERT_DEVINS(pDevIns);
3022 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3023 if (pcbRead)
3024 *pcbRead = 0;
3025 return VERR_ACCESS_DENIED;
3026}
3027
3028
3029/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
3030static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3031{
3032 PDMDEV_ASSERT_DEVINS(pDevIns);
3033 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3034 if (pcbWritten)
3035 *pcbWritten = 0;
3036 return VERR_ACCESS_DENIED;
3037}
3038
3039
3040/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
3041static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3042{
3043 PDMDEV_ASSERT_DEVINS(pDevIns);
3044 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3045 return VERR_ACCESS_DENIED;
3046}
3047
3048
3049/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
3050static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3051{
3052 PDMDEV_ASSERT_DEVINS(pDevIns);
3053 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3054 return 3 << 2 /* illegal mode type */;
3055}
3056
3057
3058/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3059static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3060{
3061 PDMDEV_ASSERT_DEVINS(pDevIns);
3062 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3063}
3064
3065
3066/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3067static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3068{
3069 PDMDEV_ASSERT_DEVINS(pDevIns);
3070 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3071 return VERR_ACCESS_DENIED;
3072}
3073
3074
3075/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3076static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3077{
3078 PDMDEV_ASSERT_DEVINS(pDevIns);
3079 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3080 return VERR_ACCESS_DENIED;
3081}
3082
3083
3084/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3085static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3086 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3087{
3088 PDMDEV_ASSERT_DEVINS(pDevIns);
3089 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3090}
3091
3092
3093/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3094static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3095{
3096 PDMDEV_ASSERT_DEVINS(pDevIns);
3097 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3098 return VERR_ACCESS_DENIED;
3099}
3100
3101
3102/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3103static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3104{
3105 PDMDEV_ASSERT_DEVINS(pDevIns);
3106 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3107 return VERR_ACCESS_DENIED;
3108}
3109
3110
3111/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3112static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3113{
3114 PDMDEV_ASSERT_DEVINS(pDevIns);
3115 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3116 return VERR_ACCESS_DENIED;
3117}
3118
3119
3120/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3121static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3122{
3123 PDMDEV_ASSERT_DEVINS(pDevIns);
3124 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3125 return VERR_ACCESS_DENIED;
3126}
3127
3128
3129/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3130static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3131{
3132 PDMDEV_ASSERT_DEVINS(pDevIns);
3133 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3134 return VERR_ACCESS_DENIED;
3135}
3136
3137
3138/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3139static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3140{
3141 PDMDEV_ASSERT_DEVINS(pDevIns);
3142 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3143 return VERR_ACCESS_DENIED;
3144}
3145
3146
3147/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3148static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3149{
3150 PDMDEV_ASSERT_DEVINS(pDevIns);
3151 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3152 return VERR_ACCESS_DENIED;
3153}
3154
3155
3156/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3157static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3158{
3159 PDMDEV_ASSERT_DEVINS(pDevIns);
3160 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3161 return VERR_ACCESS_DENIED;
3162}
3163
3164
3165/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3166static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3167{
3168 PDMDEV_ASSERT_DEVINS(pDevIns);
3169 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3170 return VERR_ACCESS_DENIED;
3171}
3172
3173
3174/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
3175static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3176{
3177 PDMDEV_ASSERT_DEVINS(pDevIns);
3178 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3179 return NULL;
3180}
3181
3182
3183/**
3184 * The device helper structure for non-trusted devices.
3185 */
3186const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3187{
3188 PDM_DEVHLP_VERSION,
3189 pdmR3DevHlp_IOPortRegister,
3190 pdmR3DevHlp_IOPortRegisterGC,
3191 pdmR3DevHlp_IOPortRegisterR0,
3192 pdmR3DevHlp_IOPortDeregister,
3193 pdmR3DevHlp_MMIORegister,
3194 pdmR3DevHlp_MMIORegisterGC,
3195 pdmR3DevHlp_MMIORegisterR0,
3196 pdmR3DevHlp_MMIODeregister,
3197 pdmR3DevHlp_ROMRegister,
3198 pdmR3DevHlp_SSMRegister,
3199 pdmR3DevHlp_TMTimerCreate,
3200 pdmR3DevHlp_TMTimerCreateExternal,
3201 pdmR3DevHlp_PCIRegister,
3202 pdmR3DevHlp_PCIIORegionRegister,
3203 pdmR3DevHlp_PCISetConfigCallbacks,
3204 pdmR3DevHlp_PCISetIrq,
3205 pdmR3DevHlp_PCISetIrqNoWait,
3206 pdmR3DevHlp_ISASetIrq,
3207 pdmR3DevHlp_ISASetIrqNoWait,
3208 pdmR3DevHlp_DriverAttach,
3209 pdmR3DevHlp_MMHeapAlloc,
3210 pdmR3DevHlp_MMHeapAllocZ,
3211 pdmR3DevHlp_MMHeapFree,
3212 pdmR3DevHlp_VMSetError,
3213 pdmR3DevHlp_VMSetErrorV,
3214 pdmR3DevHlp_VMSetRuntimeError,
3215 pdmR3DevHlp_VMSetRuntimeErrorV,
3216 pdmR3DevHlp_AssertEMT,
3217 pdmR3DevHlp_AssertOther,
3218 pdmR3DevHlp_DBGFStopV,
3219 pdmR3DevHlp_DBGFInfoRegister,
3220 pdmR3DevHlp_STAMRegister,
3221 pdmR3DevHlp_STAMRegisterF,
3222 pdmR3DevHlp_STAMRegisterV,
3223 pdmR3DevHlp_RTCRegister,
3224 pdmR3DevHlp_PDMQueueCreate,
3225 pdmR3DevHlp_CritSectInit,
3226 pdmR3DevHlp_UTCNow,
3227 pdmR3DevHlp_PDMThreadCreate,
3228 pdmR3DevHlp_PhysGCPtr2GCPhys,
3229 pdmR3DevHlp_VMState,
3230 0,
3231 0,
3232 0,
3233 0,
3234 0,
3235 0,
3236 0,
3237 pdmR3DevHlp_Untrusted_GetVM,
3238 pdmR3DevHlp_Untrusted_PCIBusRegister,
3239 pdmR3DevHlp_Untrusted_PICRegister,
3240 pdmR3DevHlp_Untrusted_APICRegister,
3241 pdmR3DevHlp_Untrusted_IOAPICRegister,
3242 pdmR3DevHlp_Untrusted_DMACRegister,
3243 pdmR3DevHlp_Untrusted_PhysRead,
3244 pdmR3DevHlp_Untrusted_PhysWrite,
3245 pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr,
3246 pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly,
3247 pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock,
3248 pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3249 pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3250 pdmR3DevHlp_Untrusted_A20IsEnabled,
3251 pdmR3DevHlp_Untrusted_A20Set,
3252 pdmR3DevHlp_Untrusted_VMReset,
3253 pdmR3DevHlp_Untrusted_VMSuspend,
3254 pdmR3DevHlp_Untrusted_VMPowerOff,
3255 pdmR3DevHlp_Untrusted_LockVM,
3256 pdmR3DevHlp_Untrusted_UnlockVM,
3257 pdmR3DevHlp_Untrusted_AssertVMLock,
3258 pdmR3DevHlp_Untrusted_DMARegister,
3259 pdmR3DevHlp_Untrusted_DMAReadMemory,
3260 pdmR3DevHlp_Untrusted_DMAWriteMemory,
3261 pdmR3DevHlp_Untrusted_DMASetDREQ,
3262 pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3263 pdmR3DevHlp_Untrusted_DMASchedule,
3264 pdmR3DevHlp_Untrusted_CMOSWrite,
3265 pdmR3DevHlp_Untrusted_CMOSRead,
3266 pdmR3DevHlp_Untrusted_GetCpuId,
3267 pdmR3DevHlp_Untrusted_ROMProtectShadow,
3268 pdmR3DevHlp_Untrusted_MMIO2Register,
3269 pdmR3DevHlp_Untrusted_MMIO2Deregister,
3270 pdmR3DevHlp_Untrusted_MMIO2Map,
3271 pdmR3DevHlp_Untrusted_MMIO2Unmap,
3272 pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3273 pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3274 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3275 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3276 pdmR3DevHlp_Untrusted_GetVMCPU,
3277 PDM_DEVHLP_VERSION /* the end */
3278};
3279
3280
3281
3282/**
3283 * Queue consumer callback for internal component.
3284 *
3285 * @returns Success indicator.
3286 * If false the item will not be removed and the flushing will stop.
3287 * @param pVM The VM handle.
3288 * @param pItem The item to consume. Upon return this item will be freed.
3289 */
3290DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3291{
3292 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3293 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3294 switch (pTask->enmOp)
3295 {
3296 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3297 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3298 break;
3299
3300 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3301 pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3302 break;
3303
3304 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3305 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3306 break;
3307
3308 default:
3309 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3310 break;
3311 }
3312 return true;
3313}
3314
3315/** @} */
3316
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