PDMDevHlp.cpp@ 19366

Last change on this file since 19366 was 19366, checked in by vboxsync, 16 years ago
Removed global VMM lock.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 133.5 KB

Line
1	/* $Id: PDMDevHlp.cpp 19366 2009-05-05 11:58:07Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, Device Helpers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27	#include "PDMInternal.h"
28	#include <VBox/pdm.h>
29	#include <VBox/mm.h>
30	#include <VBox/pgm.h>
31	#include <VBox/iom.h>
32	#include <VBox/rem.h>
33	#include <VBox/dbgf.h>
34	#include <VBox/vm.h>
35	#include <VBox/vmm.h>
36
37	#include <VBox/version.h>
38	#include <VBox/log.h>
39	#include <VBox/err.h>
40	#include <iprt/asm.h>
41	#include <iprt/assert.h>
42	#include <iprt/string.h>
43	#include <iprt/thread.h>
44
45
46	/*******************************************************************************
47	* Defined Constants And Macros *
48	*******************************************************************************/
49	/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50	* Define this to enable the deadlock detection when accessing physical memory.
51	*/
52	#if /defined(DEBUG_bird) \|\|/ defined(DOXYGEN_RUNNING)
53	# define PDM_DEVHLP_DEADLOCK_DETECTION
54	#endif
55
56
57	/*******************************************************************************
58	* Defined Constants And Macros *
59	*******************************************************************************/
60	/** @name R3 DevHlp
61	* @{
62	*/
63
64
65	/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
66	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67	PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68	{
69	PDMDEV_ASSERT_DEVINS(pDevIns);
70	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
71	Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74	int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
75
76	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
77	return rc;
78	}
79
80
81	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
82	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
83	const char pszOut, const char pszIn,
84	const char pszOutStr, const char pszInStr, const char *pszDesc)
85	{
86	PDMDEV_ASSERT_DEVINS(pDevIns);
87	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
88	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
89	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
90
91	/*
92	* Resolve the functions (one of the can be NULL).
93	*/
94	int rc = VINF_SUCCESS;
95	if ( pDevIns->pDevReg->szRCMod[0]
96	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
97	{
98	RTRCPTR RCPtrIn = NIL_RTRCPTR;
99	if (pszIn)
100	{
101	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
102	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
103	}
104	RTRCPTR RCPtrOut = NIL_RTRCPTR;
105	if (pszOut && RT_SUCCESS(rc))
106	{
107	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
108	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
109	}
110	RTRCPTR RCPtrInStr = NIL_RTRCPTR;
111	if (pszInStr && RT_SUCCESS(rc))
112	{
113	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
114	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
115	}
116	RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
117	if (pszOutStr && RT_SUCCESS(rc))
118	{
119	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
120	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
121	}
122
123	if (RT_SUCCESS(rc))
124	rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
125	}
126	else
127	{
128	AssertMsgFailed(("No GC module for this driver!\n"));
129	rc = VERR_INVALID_PARAMETER;
130	}
131
132	LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
133	return rc;
134	}
135
136
137	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
138	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
139	const char pszOut, const char pszIn,
140	const char pszOutStr, const char pszInStr, const char *pszDesc)
141	{
142	PDMDEV_ASSERT_DEVINS(pDevIns);
143	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
144	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
145	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
146
147	/*
148	* Resolve the functions (one of the can be NULL).
149	*/
150	int rc = VINF_SUCCESS;
151	if ( pDevIns->pDevReg->szR0Mod[0]
152	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
153	{
154	R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
155	if (pszIn)
156	{
157	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
158	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
159	}
160	R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
161	if (pszOut && RT_SUCCESS(rc))
162	{
163	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
164	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
165	}
166	R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
167	if (pszInStr && RT_SUCCESS(rc))
168	{
169	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
170	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
171	}
172	R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
173	if (pszOutStr && RT_SUCCESS(rc))
174	{
175	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
176	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
177	}
178
179	if (RT_SUCCESS(rc))
180	rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
181	}
182	else
183	{
184	AssertMsgFailed(("No R0 module for this driver!\n"));
185	rc = VERR_INVALID_PARAMETER;
186	}
187
188	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
189	return rc;
190	}
191
192
193	/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
194	static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
195	{
196	PDMDEV_ASSERT_DEVINS(pDevIns);
197	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
198	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
199	Port, cPorts));
200
201	int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
202
203	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
204	return rc;
205	}
206
207
208	/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
209	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
210	PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
211	const char *pszDesc)
212	{
213	PDMDEV_ASSERT_DEVINS(pDevIns);
214	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
215	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
216	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
217
218	int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
219
220	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
221	return rc;
222	}
223
224
225	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
226	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
227	const char pszWrite, const char pszRead, const char *pszFill,
228	const char *pszDesc)
229	{
230	PDMDEV_ASSERT_DEVINS(pDevIns);
231	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
232	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
233	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
234
235	/*
236	* Resolve the functions.
237	* Not all function have to present, leave it to IOM to enforce this.
238	*/
239	int rc = VINF_SUCCESS;
240	if ( pDevIns->pDevReg->szRCMod[0]
241	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
242	{
243	RTRCPTR RCPtrWrite = NIL_RTRCPTR;
244	if (pszWrite)
245	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
246
247	RTRCPTR RCPtrRead = NIL_RTRCPTR;
248	int rc2 = VINF_SUCCESS;
249	if (pszRead)
250	rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
251
252	RTRCPTR RCPtrFill = NIL_RTRCPTR;
253	int rc3 = VINF_SUCCESS;
254	if (pszFill)
255	rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
256
257	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
258	rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
259	else
260	{
261	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
262	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
263	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
264	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
265	rc = rc2;
266	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
267	rc = rc3;
268	}
269	}
270	else
271	{
272	AssertMsgFailed(("No GC module for this driver!\n"));
273	rc = VERR_INVALID_PARAMETER;
274	}
275
276	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
277	return rc;
278	}
279
280	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
281	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
282	const char pszWrite, const char pszRead, const char *pszFill,
283	const char *pszDesc)
284	{
285	PDMDEV_ASSERT_DEVINS(pDevIns);
286	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
287	LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
288	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
289
290	/*
291	* Resolve the functions.
292	* Not all function have to present, leave it to IOM to enforce this.
293	*/
294	int rc = VINF_SUCCESS;
295	if ( pDevIns->pDevReg->szR0Mod[0]
296	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
297	{
298	R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
299	if (pszWrite)
300	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
301	R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
302	int rc2 = VINF_SUCCESS;
303	if (pszRead)
304	rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
305	R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
306	int rc3 = VINF_SUCCESS;
307	if (pszFill)
308	rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
309	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
310	rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
311	else
312	{
313	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
314	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
315	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
316	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
317	rc = rc2;
318	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
319	rc = rc3;
320	}
321	}
322	else
323	{
324	AssertMsgFailed(("No R0 module for this driver!\n"));
325	rc = VERR_INVALID_PARAMETER;
326	}
327
328	LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
329	return rc;
330	}
331
332
333	/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
334	static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
335	{
336	PDMDEV_ASSERT_DEVINS(pDevIns);
337	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
338	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
339	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
340
341	int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
342
343	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
344	return rc;
345	}
346
347
348	/** @copydoc PDMDEVHLPR3::pfnROMRegister */
349	static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void pvBinary, uint32_t fFlags, const char pszDesc)
350	{
351	PDMDEV_ASSERT_DEVINS(pDevIns);
352	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
353	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
354	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
355
356	int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
357
358	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
359	return rc;
360	}
361
362
363	/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
364	static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
365	PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
366	PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
367	{
368	PDMDEV_ASSERT_DEVINS(pDevIns);
369	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
370	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
371	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
372
373	int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pszName, u32Instance, u32Version, cbGuess,
374	pfnSavePrep, pfnSaveExec, pfnSaveDone,
375	pfnLoadPrep, pfnLoadExec, pfnLoadDone);
376
377	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
378	return rc;
379	}
380
381
382	/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
383	static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
384	{
385	PDMDEV_ASSERT_DEVINS(pDevIns);
386	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
387	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
388	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
389
390	int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
391
392	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
393	return rc;
394	}
395
396
397	/** @copydoc PDMDEVHLPR3::pfnTMTimerCreateExternal */
398	static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void pvUser, const char pszDesc)
399	{
400	PDMDEV_ASSERT_DEVINS(pDevIns);
401	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
402
403	return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMR3, enmClock, pfnCallback, pvUser, pszDesc);
404	}
405
406
407	/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
408	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
409	{
410	PDMDEV_ASSERT_DEVINS(pDevIns);
411	PVM pVM = pDevIns->Internal.s.pVMR3;
412	VM_ASSERT_EMT(pVM);
413	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
414	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
415
416	/*
417	* Validate input.
418	*/
419	if (!pPciDev)
420	{
421	Assert(pPciDev);
422	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
423	return VERR_INVALID_PARAMETER;
424	}
425	if (!pPciDev->config[0] && !pPciDev->config[1])
426	{
427	Assert(pPciDev->config[0] \|\| pPciDev->config[1]);
428	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
429	return VERR_INVALID_PARAMETER;
430	}
431	if (pDevIns->Internal.s.pPciDeviceR3)
432	{
433	/** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
434	* support a PDM device with multiple PCI devices. This might become a problem
435	* when upgrading the chipset for instance because of multiple functions in some
436	* devices...
437	*/
438	AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
439	return VERR_INTERNAL_ERROR;
440	}
441
442	/*
443	* Choose the PCI bus for the device.
444	*
445	* This is simple. If the device was configured for a particular bus, the PCIBusNo
446	* configuration value will be set. If not the default bus is 0.
447	*/
448	int rc;
449	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
450	if (!pBus)
451	{
452	uint8_t u8Bus;
453	rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
454	AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
455	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
456	AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
457	("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
458	RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
459	VERR_PDM_NO_PCI_BUS);
460	pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
461	}
462	if (pBus->pDevInsR3)
463	{
464	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
465	pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
466	else
467	pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
468
469	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
470	pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
471	else
472	pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
473
474	/*
475	* Check the configuration for PCI device and function assignment.
476	*/
477	int iDev = -1;
478	uint8_t u8Device;
479	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
480	if (RT_SUCCESS(rc))
481	{
482	if (u8Device > 31)
483	{
484	AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
485	u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
486	return VERR_INTERNAL_ERROR;
487	}
488
489	uint8_t u8Function;
490	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
491	if (RT_FAILURE(rc))
492	{
493	AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
494	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
495	return rc;
496	}
497	if (u8Function > 7)
498	{
499	AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
500	u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
501	return VERR_INTERNAL_ERROR;
502	}
503	iDev = (u8Device << 3) \| u8Function;
504	}
505	else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
506	{
507	AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
508	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
509	return rc;
510	}
511
512	/*
513	* Call the pci bus device to do the actual registration.
514	*/
515	pdmLock(pVM);
516	rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
517	pdmUnlock(pVM);
518	if (RT_SUCCESS(rc))
519	{
520	pPciDev->pDevIns = pDevIns;
521
522	pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
523	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
524	pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
525	else
526	pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
527
528	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
529	pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
530	else
531	pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
532
533	Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
534	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
535	}
536	}
537	else
538	{
539	AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
540	rc = VERR_PDM_NO_PCI_BUS;
541	}
542
543	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
544	return rc;
545	}
546
547
548	/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
549	static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
550	{
551	PDMDEV_ASSERT_DEVINS(pDevIns);
552	PVM pVM = pDevIns->Internal.s.pVMR3;
553	VM_ASSERT_EMT(pVM);
554	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
555	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
556
557	/*
558	* Validate input.
559	*/
560	if (iRegion < 0 \|\| iRegion >= PCI_NUM_REGIONS)
561	{
562	Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
563	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
564	return VERR_INVALID_PARAMETER;
565	}
566	switch (enmType)
567	{
568	case PCI_ADDRESS_SPACE_IO:
569	/*
570	* Sanity check: don't allow to register more than 32K of the PCI I/O space.
571	*/
572	AssertMsgReturn(cbRegion <= _32K,
573	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
574	VERR_INVALID_PARAMETER);
575	break;
576
577	case PCI_ADDRESS_SPACE_MEM:
578	case PCI_ADDRESS_SPACE_MEM_PREFETCH:
579	/*
580	* Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
581	* now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
582	*/
583	AssertMsgReturn(cbRegion <= 512 * _1M,
584	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
585	VERR_INVALID_PARAMETER);
586	break;
587	default:
588	AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
589	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
590	return VERR_INVALID_PARAMETER;
591	}
592	if (!pfnCallback)
593	{
594	Assert(pfnCallback);
595	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
596	return VERR_INVALID_PARAMETER;
597	}
598	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
599
600	/*
601	* Must have a PCI device registered!
602	*/
603	int rc;
604	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
605	if (pPciDev)
606	{
607	/*
608	* We're currently restricted to page aligned MMIO regions.
609	*/
610	if ( (enmType == PCI_ADDRESS_SPACE_MEM \|\| enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
611	&& cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
612	{
613	Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
614	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
615	cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
616	}
617
618	/*
619	* For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
620	*/
621	int iLastSet = ASMBitLastSetU32(cbRegion);
622	Assert(iLastSet > 0);
623	uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
624	if (cbRegion > cbRegionAligned)
625	cbRegion = cbRegionAligned * 2; /* round up */
626
627	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
628	Assert(pBus);
629	pdmLock(pVM);
630	rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
631	pdmUnlock(pVM);
632	}
633	else
634	{
635	AssertMsgFailed(("No PCI device registered!\n"));
636	rc = VERR_PDM_NOT_PCI_DEVICE;
637	}
638
639	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
640	return rc;
641	}
642
643
644	/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
645	static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
646	PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
647	{
648	PDMDEV_ASSERT_DEVINS(pDevIns);
649	PVM pVM = pDevIns->Internal.s.pVMR3;
650	VM_ASSERT_EMT(pVM);
651	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
652	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
653
654	/*
655	* Validate input and resolve defaults.
656	*/
657	AssertPtr(pfnRead);
658	AssertPtr(pfnWrite);
659	AssertPtrNull(ppfnReadOld);
660	AssertPtrNull(ppfnWriteOld);
661	AssertPtrNull(pPciDev);
662
663	if (!pPciDev)
664	pPciDev = pDevIns->Internal.s.pPciDeviceR3;
665	AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
666	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
667	AssertRelease(pBus);
668	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
669
670	/*
671	* Do the job.
672	*/
673	pdmLock(pVM);
674	pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
675	pdmUnlock(pVM);
676
677	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
678	}
679
680
681	/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
682	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
683	{
684	PDMDEV_ASSERT_DEVINS(pDevIns);
685	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
686
687	/*
688	* Validate input.
689	*/
690	/** @todo iIrq and iLevel checks. */
691
692	/*
693	* Must have a PCI device registered!
694	*/
695	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
696	if (pPciDev)
697	{
698	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
699	Assert(pBus);
700	PVM pVM = pDevIns->Internal.s.pVMR3;
701	pdmLock(pVM);
702	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
703	pdmUnlock(pVM);
704	}
705	else
706	AssertReleaseMsgFailed(("No PCI device registered!\n"));
707
708	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
709	}
710
711
712	/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
713	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
714	{
715	pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
716	}
717
718
719	/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
720	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
721	{
722	PDMDEV_ASSERT_DEVINS(pDevIns);
723	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
724
725	/*
726	* Validate input.
727	*/
728	/** @todo iIrq and iLevel checks. */
729
730	PVM pVM = pDevIns->Internal.s.pVMR3;
731	PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
732
733	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
734	}
735
736
737	/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
738	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
739	{
740	pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
741	}
742
743
744	/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
745	static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE ppBaseInterface, const char pszDesc)
746	{
747	PDMDEV_ASSERT_DEVINS(pDevIns);
748	PVM pVM = pDevIns->Internal.s.pVMR3;
749	VM_ASSERT_EMT(pVM);
750	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
751	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
752
753	/*
754	* Lookup the LUN, it might already be registered.
755	*/
756	PPDMLUN pLunPrev = NULL;
757	PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
758	for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
759	if (pLun->iLun == iLun)
760	break;
761
762	/*
763	* Create the LUN if if wasn't found, else check if driver is already attached to it.
764	*/
765	if (!pLun)
766	{
767	if ( !pBaseInterface
768	\|\| !pszDesc
769	\|\| !*pszDesc)
770	{
771	Assert(pBaseInterface);
772	Assert(pszDesc \|\| *pszDesc);
773	return VERR_INVALID_PARAMETER;
774	}
775
776	pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
777	if (!pLun)
778	return VERR_NO_MEMORY;
779
780	pLun->iLun = iLun;
781	pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
782	pLun->pTop = NULL;
783	pLun->pBottom = NULL;
784	pLun->pDevIns = pDevIns;
785	pLun->pszDesc = pszDesc;
786	pLun->pBase = pBaseInterface;
787	if (!pLunPrev)
788	pDevIns->Internal.s.pLunsR3 = pLun;
789	else
790	pLunPrev->pNext = pLun;
791	Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
792	iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
793	}
794	else if (pLun->pTop)
795	{
796	AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
797	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
798	return VERR_PDM_DRIVER_ALREADY_ATTACHED;
799	}
800	Assert(pLun->pBase == pBaseInterface);
801
802
803	/*
804	* Get the attached driver configuration.
805	*/
806	int rc;
807	char szNode[48];
808	RTStrPrintf(szNode, sizeof(szNode), "LUN#%d", iLun);
809	PCFGMNODE pNode = CFGMR3GetChild(pDevIns->Internal.s.pCfgHandle, szNode);
810	if (pNode)
811	{
812	char *pszName;
813	rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
814	if (RT_SUCCESS(rc))
815	{
816	/*
817	* Find the driver.
818	*/
819	PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
820	if (pDrv)
821	{
822	/* config node */
823	PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
824	if (!pConfigNode)
825	rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
826	if (RT_SUCCESS(rc))
827	{
828	CFGMR3SetRestrictedRoot(pConfigNode);
829
830	/*
831	* Allocate the driver instance.
832	*/
833	size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
834	cb = RT_ALIGN_Z(cb, 16);
835	PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
836	if (pNew)
837	{
838	/*
839	* Initialize the instance structure (declaration order).
840	*/
841	pNew->u32Version = PDM_DRVINS_VERSION;
842	//pNew->Internal.s.pUp = NULL;
843	//pNew->Internal.s.pDown = NULL;
844	pNew->Internal.s.pLun = pLun;
845	pNew->Internal.s.pDrv = pDrv;
846	pNew->Internal.s.pVM = pVM;
847	//pNew->Internal.s.fDetaching = false;
848	pNew->Internal.s.pCfgHandle = pNode;
849	pNew->pDrvHlp = &g_pdmR3DrvHlp;
850	pNew->pDrvReg = pDrv->pDrvReg;
851	pNew->pCfgHandle = pConfigNode;
852	pNew->iInstance = pDrv->cInstances++;
853	pNew->pUpBase = pBaseInterface;
854	//pNew->pDownBase = NULL;
855	//pNew->IBase.pfnQueryInterface = NULL;
856	pNew->pvInstanceData = &pNew->achInstanceData[0];
857
858	/*
859	* Link with LUN and call the constructor.
860	*/
861	pLun->pTop = pLun->pBottom = pNew;
862	rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle);
863	if (RT_SUCCESS(rc))
864	{
865	MMR3HeapFree(pszName);
866	*ppBaseInterface = &pNew->IBase;
867	Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
868	pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
869	LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
870
871	return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
872	}
873
874	/*
875	* Free the driver.
876	*/
877	pLun->pTop = pLun->pBottom = NULL;
878	ASMMemFill32(pNew, cb, 0xdeadd0d0);
879	MMR3HeapFree(pNew);
880	pDrv->cInstances--;
881	}
882	else
883	{
884	AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
885	rc = VERR_NO_MEMORY;
886	}
887	}
888	else
889	AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
890	}
891	else
892	{
893	AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
894	rc = VERR_PDM_DRIVER_NOT_FOUND;
895	}
896	MMR3HeapFree(pszName);
897	}
898	else
899	{
900	AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
901	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
902	rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
903	}
904	}
905	else
906	rc = VERR_PDM_NO_ATTACHED_DRIVER;
907
908
909	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
910	return rc;
911	}
912
913
914	/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
915	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
916	{
917	PDMDEV_ASSERT_DEVINS(pDevIns);
918	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
919
920	void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
921
922	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
923	return pv;
924	}
925
926
927	/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
928	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
929	{
930	PDMDEV_ASSERT_DEVINS(pDevIns);
931	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
932
933	void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
934
935	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
936	return pv;
937	}
938
939
940	/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
941	static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
942	{
943	PDMDEV_ASSERT_DEVINS(pDevIns);
944	LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
945
946	MMR3HeapFree(pv);
947
948	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
949	}
950
951
952	/** @copydoc PDMDEVHLPR3::pfnVMSetError */
953	static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
954	{
955	PDMDEV_ASSERT_DEVINS(pDevIns);
956	va_list args;
957	va_start(args, pszFormat);
958	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
959	va_end(args);
960	return rc;
961	}
962
963
964	/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
965	static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
966	{
967	PDMDEV_ASSERT_DEVINS(pDevIns);
968	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
969	return rc;
970	}
971
972
973	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
974	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, ...)
975	{
976	PDMDEV_ASSERT_DEVINS(pDevIns);
977	va_list args;
978	va_start(args, pszFormat);
979	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
980	va_end(args);
981	return rc;
982	}
983
984
985	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
986	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, va_list va)
987	{
988	PDMDEV_ASSERT_DEVINS(pDevIns);
989	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
990	return rc;
991	}
992
993
994	/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
995	static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
996	{
997	PDMDEV_ASSERT_DEVINS(pDevIns);
998	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
999	return true;
1000
1001	char szMsg[100];
1002	RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1003	AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1004	AssertBreakpoint();
1005	return false;
1006	}
1007
1008
1009	/** @copydoc PDMDEVHLPR3::pfnAssertOther */
1010	static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1011	{
1012	PDMDEV_ASSERT_DEVINS(pDevIns);
1013	if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1014	return true;
1015
1016	char szMsg[100];
1017	RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1018	AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1019	AssertBreakpoint();
1020	return false;
1021	}
1022
1023
1024	/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
1025	static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction, const char *pszFormat, va_list args)
1026	{
1027	PDMDEV_ASSERT_DEVINS(pDevIns);
1028	#ifdef LOG_ENABLED
1029	va_list va2;
1030	va_copy(va2, args);
1031	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1032	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1033	va_end(va2);
1034	#endif
1035
1036	PVM pVM = pDevIns->Internal.s.pVMR3;
1037	VM_ASSERT_EMT(pVM);
1038	int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1039
1040	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1041	return rc;
1042	}
1043
1044
1045	/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1046	static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char pszName, const char pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1047	{
1048	PDMDEV_ASSERT_DEVINS(pDevIns);
1049	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1050	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1051
1052	PVM pVM = pDevIns->Internal.s.pVMR3;
1053	VM_ASSERT_EMT(pVM);
1054	int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1055
1056	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1057	return rc;
1058	}
1059
1060
1061	/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1062	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void pvSample, STAMTYPE enmType, const char pszName, STAMUNIT enmUnit, const char *pszDesc)
1063	{
1064	PDMDEV_ASSERT_DEVINS(pDevIns);
1065	PVM pVM = pDevIns->Internal.s.pVMR3;
1066	VM_ASSERT_EMT(pVM);
1067
1068	STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1069	NOREF(pVM);
1070	}
1071
1072
1073
1074	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1075	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1076	STAMUNIT enmUnit, const char pszDesc, const char pszName, ...)
1077	{
1078	PDMDEV_ASSERT_DEVINS(pDevIns);
1079	PVM pVM = pDevIns->Internal.s.pVMR3;
1080	VM_ASSERT_EMT(pVM);
1081
1082	va_list args;
1083	va_start(args, pszName);
1084	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1085	va_end(args);
1086	AssertRC(rc);
1087
1088	NOREF(pVM);
1089	}
1090
1091
1092	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1093	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1094	STAMUNIT enmUnit, const char pszDesc, const char pszName, va_list args)
1095	{
1096	PDMDEV_ASSERT_DEVINS(pDevIns);
1097	PVM pVM = pDevIns->Internal.s.pVMR3;
1098	VM_ASSERT_EMT(pVM);
1099
1100	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1101	AssertRC(rc);
1102
1103	NOREF(pVM);
1104	}
1105
1106
1107	/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1108	static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1109	{
1110	PDMDEV_ASSERT_DEVINS(pDevIns);
1111	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1112	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1113	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1114	pRtcReg->pfnWrite, ppRtcHlp));
1115
1116	/*
1117	* Validate input.
1118	*/
1119	if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1120	{
1121	AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1122	PDM_RTCREG_VERSION));
1123	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1124	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1125	return VERR_INVALID_PARAMETER;
1126	}
1127	if ( !pRtcReg->pfnWrite
1128	\|\| !pRtcReg->pfnRead)
1129	{
1130	Assert(pRtcReg->pfnWrite);
1131	Assert(pRtcReg->pfnRead);
1132	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1133	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1134	return VERR_INVALID_PARAMETER;
1135	}
1136
1137	if (!ppRtcHlp)
1138	{
1139	Assert(ppRtcHlp);
1140	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1141	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1142	return VERR_INVALID_PARAMETER;
1143	}
1144
1145	/*
1146	* Only one DMA device.
1147	*/
1148	PVM pVM = pDevIns->Internal.s.pVMR3;
1149	if (pVM->pdm.s.pRtc)
1150	{
1151	AssertMsgFailed(("Only one RTC device is supported!\n"));
1152	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1153	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1154	return VERR_INVALID_PARAMETER;
1155	}
1156
1157	/*
1158	* Allocate and initialize pci bus structure.
1159	*/
1160	int rc = VINF_SUCCESS;
1161	PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1162	if (pRtc)
1163	{
1164	pRtc->pDevIns = pDevIns;
1165	pRtc->Reg = *pRtcReg;
1166	pVM->pdm.s.pRtc = pRtc;
1167
1168	/* set the helper pointer. */
1169	*ppRtcHlp = &g_pdmR3DevRtcHlp;
1170	Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1171	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1172	}
1173	else
1174	rc = VERR_NO_MEMORY;
1175
1176	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1177	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1178	return rc;
1179	}
1180
1181
1182	/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1183	static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1184	PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
1185	{
1186	PDMDEV_ASSERT_DEVINS(pDevIns);
1187	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool ppQueue=%p\n",
1188	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
1189
1190	PVM pVM = pDevIns->Internal.s.pVMR3;
1191	VM_ASSERT_EMT(pVM);
1192	int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
1193
1194	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, ppQueue));
1195	return rc;
1196	}
1197
1198
1199	/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1200	static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1201	{
1202	PDMDEV_ASSERT_DEVINS(pDevIns);
1203	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1204	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1205
1206	PVM pVM = pDevIns->Internal.s.pVMR3;
1207	VM_ASSERT_EMT(pVM);
1208	int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1209
1210	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1211	return rc;
1212	}
1213
1214
1215	/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1216	static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1217	{
1218	PDMDEV_ASSERT_DEVINS(pDevIns);
1219	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1220	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1221
1222	pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1223
1224	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1225	return pTime;
1226	}
1227
1228
1229	/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1230	static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1231	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1232	{
1233	PDMDEV_ASSERT_DEVINS(pDevIns);
1234	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1235	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1236	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1237
1238	int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1239
1240	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1241	rc, *ppThread));
1242	return rc;
1243	}
1244
1245
1246	/** @copydoc PDMDEVHLPR3::pfnGetVM */
1247	static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1248	{
1249	PDMDEV_ASSERT_DEVINS(pDevIns);
1250	LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1251	return pDevIns->Internal.s.pVMR3;
1252	}
1253
1254
1255	/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
1256	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1257	{
1258	PDMDEV_ASSERT_DEVINS(pDevIns);
1259	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1260	LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1261	return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1262	}
1263
1264
1265	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1266	static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1267	{
1268	PDMDEV_ASSERT_DEVINS(pDevIns);
1269	PVM pVM = pDevIns->Internal.s.pVMR3;
1270	VM_ASSERT_EMT(pVM);
1271	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1272	".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1273	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1274	pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1275	pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1276
1277	/*
1278	* Validate the structure.
1279	*/
1280	if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1281	{
1282	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1283	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1284	return VERR_INVALID_PARAMETER;
1285	}
1286	if ( !pPciBusReg->pfnRegisterR3
1287	\|\| !pPciBusReg->pfnIORegionRegisterR3
1288	\|\| !pPciBusReg->pfnSetIrqR3
1289	\|\| !pPciBusReg->pfnSaveExecR3
1290	\|\| !pPciBusReg->pfnLoadExecR3
1291	\|\| (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1292	{
1293	Assert(pPciBusReg->pfnRegisterR3);
1294	Assert(pPciBusReg->pfnIORegionRegisterR3);
1295	Assert(pPciBusReg->pfnSetIrqR3);
1296	Assert(pPciBusReg->pfnSaveExecR3);
1297	Assert(pPciBusReg->pfnLoadExecR3);
1298	Assert(pPciBusReg->pfnFakePCIBIOSR3);
1299	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1300	return VERR_INVALID_PARAMETER;
1301	}
1302	if ( pPciBusReg->pszSetIrqRC
1303	&& !VALID_PTR(pPciBusReg->pszSetIrqRC))
1304	{
1305	Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1306	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1307	return VERR_INVALID_PARAMETER;
1308	}
1309	if ( pPciBusReg->pszSetIrqR0
1310	&& !VALID_PTR(pPciBusReg->pszSetIrqR0))
1311	{
1312	Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1313	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1314	return VERR_INVALID_PARAMETER;
1315	}
1316	if (!ppPciHlpR3)
1317	{
1318	Assert(ppPciHlpR3);
1319	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1320	return VERR_INVALID_PARAMETER;
1321	}
1322
1323	/*
1324	* Find free PCI bus entry.
1325	*/
1326	unsigned iBus = 0;
1327	for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1328	if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1329	break;
1330	if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1331	{
1332	AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1333	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1334	return VERR_INVALID_PARAMETER;
1335	}
1336	PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1337
1338	/*
1339	* Resolve and init the RC bits.
1340	*/
1341	if (pPciBusReg->pszSetIrqRC)
1342	{
1343	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1344	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1345	if (RT_FAILURE(rc))
1346	{
1347	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1348	return rc;
1349	}
1350	pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1351	}
1352	else
1353	{
1354	pPciBus->pfnSetIrqRC = 0;
1355	pPciBus->pDevInsRC = 0;
1356	}
1357
1358	/*
1359	* Resolve and init the R0 bits.
1360	*/
1361	if (pPciBusReg->pszSetIrqR0)
1362	{
1363	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1364	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1365	if (RT_FAILURE(rc))
1366	{
1367	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1368	return rc;
1369	}
1370	pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1371	}
1372	else
1373	{
1374	pPciBus->pfnSetIrqR0 = 0;
1375	pPciBus->pDevInsR0 = 0;
1376	}
1377
1378	/*
1379	* Init the R3 bits.
1380	*/
1381	pPciBus->iBus = iBus;
1382	pPciBus->pDevInsR3 = pDevIns;
1383	pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1384	pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1385	pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1386	pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1387	pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1388	pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1389	pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1390
1391	Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1392
1393	/* set the helper pointer and return. */
1394	*ppPciHlpR3 = &g_pdmR3DevPciHlp;
1395	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1396	return VINF_SUCCESS;
1397	}
1398
1399
1400	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1401	static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1402	{
1403	PDMDEV_ASSERT_DEVINS(pDevIns);
1404	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1405	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1406	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1407	pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1408	pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1409	ppPicHlpR3));
1410
1411	/*
1412	* Validate input.
1413	*/
1414	if (pPicReg->u32Version != PDM_PICREG_VERSION)
1415	{
1416	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1417	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1418	return VERR_INVALID_PARAMETER;
1419	}
1420	if ( !pPicReg->pfnSetIrqR3
1421	\|\| !pPicReg->pfnGetInterruptR3)
1422	{
1423	Assert(pPicReg->pfnSetIrqR3);
1424	Assert(pPicReg->pfnGetInterruptR3);
1425	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1426	return VERR_INVALID_PARAMETER;
1427	}
1428	if ( ( pPicReg->pszSetIrqRC
1429	\|\| pPicReg->pszGetInterruptRC)
1430	&& ( !VALID_PTR(pPicReg->pszSetIrqRC)
1431	\|\| !VALID_PTR(pPicReg->pszGetInterruptRC))
1432	)
1433	{
1434	Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1435	Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1436	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1437	return VERR_INVALID_PARAMETER;
1438	}
1439	if ( pPicReg->pszSetIrqRC
1440	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1441	{
1442	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1443	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1444	return VERR_INVALID_PARAMETER;
1445	}
1446	if ( pPicReg->pszSetIrqR0
1447	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1448	{
1449	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1450	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1451	return VERR_INVALID_PARAMETER;
1452	}
1453	if (!ppPicHlpR3)
1454	{
1455	Assert(ppPicHlpR3);
1456	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1457	return VERR_INVALID_PARAMETER;
1458	}
1459
1460	/*
1461	* Only one PIC device.
1462	*/
1463	PVM pVM = pDevIns->Internal.s.pVMR3;
1464	if (pVM->pdm.s.Pic.pDevInsR3)
1465	{
1466	AssertMsgFailed(("Only one pic device is supported!\n"));
1467	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1468	return VERR_INVALID_PARAMETER;
1469	}
1470
1471	/*
1472	* RC stuff.
1473	*/
1474	if (pPicReg->pszSetIrqRC)
1475	{
1476	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1477	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1478	if (RT_SUCCESS(rc))
1479	{
1480	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1481	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1482	}
1483	if (RT_FAILURE(rc))
1484	{
1485	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1486	return rc;
1487	}
1488	pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1489	}
1490	else
1491	{
1492	pVM->pdm.s.Pic.pDevInsRC = 0;
1493	pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1494	pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1495	}
1496
1497	/*
1498	* R0 stuff.
1499	*/
1500	if (pPicReg->pszSetIrqR0)
1501	{
1502	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1503	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1504	if (RT_SUCCESS(rc))
1505	{
1506	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1507	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1508	}
1509	if (RT_FAILURE(rc))
1510	{
1511	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1512	return rc;
1513	}
1514	pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1515	Assert(pVM->pdm.s.Pic.pDevInsR0);
1516	}
1517	else
1518	{
1519	pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1520	pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1521	pVM->pdm.s.Pic.pDevInsR0 = 0;
1522	}
1523
1524	/*
1525	* R3 stuff.
1526	*/
1527	pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1528	pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1529	pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1530	Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1531
1532	/* set the helper pointer and return. */
1533	*ppPicHlpR3 = &g_pdmR3DevPicHlp;
1534	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1535	return VINF_SUCCESS;
1536	}
1537
1538
1539	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1540	static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1541	{
1542	PDMDEV_ASSERT_DEVINS(pDevIns);
1543	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1544	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1545	".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1546	".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}} ppApicHlpR3=%p\n",
1547	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1548	pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pszGetInterruptRC,
1549	pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1550	pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1551	pApicReg->pszBusDeliverRC, ppApicHlpR3));
1552
1553	/*
1554	* Validate input.
1555	*/
1556	if (pApicReg->u32Version != PDM_APICREG_VERSION)
1557	{
1558	AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1559	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1560	return VERR_INVALID_PARAMETER;
1561	}
1562	if ( !pApicReg->pfnGetInterruptR3
1563	\|\| !pApicReg->pfnHasPendingIrqR3
1564	\|\| !pApicReg->pfnSetBaseR3
1565	\|\| !pApicReg->pfnGetBaseR3
1566	\|\| !pApicReg->pfnSetTPRR3
1567	\|\| !pApicReg->pfnGetTPRR3
1568	\|\| !pApicReg->pfnWriteMSRR3
1569	\|\| !pApicReg->pfnReadMSRR3
1570	\|\| !pApicReg->pfnBusDeliverR3)
1571	{
1572	Assert(pApicReg->pfnGetInterruptR3);
1573	Assert(pApicReg->pfnHasPendingIrqR3);
1574	Assert(pApicReg->pfnSetBaseR3);
1575	Assert(pApicReg->pfnGetBaseR3);
1576	Assert(pApicReg->pfnSetTPRR3);
1577	Assert(pApicReg->pfnGetTPRR3);
1578	Assert(pApicReg->pfnWriteMSRR3);
1579	Assert(pApicReg->pfnReadMSRR3);
1580	Assert(pApicReg->pfnBusDeliverR3);
1581	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1582	return VERR_INVALID_PARAMETER;
1583	}
1584	if ( ( pApicReg->pszGetInterruptRC
1585	\|\| pApicReg->pszHasPendingIrqRC
1586	\|\| pApicReg->pszSetBaseRC
1587	\|\| pApicReg->pszGetBaseRC
1588	\|\| pApicReg->pszSetTPRRC
1589	\|\| pApicReg->pszGetTPRRC
1590	\|\| pApicReg->pszWriteMSRRC
1591	\|\| pApicReg->pszReadMSRRC
1592	\|\| pApicReg->pszBusDeliverRC)
1593	&& ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1594	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1595	\|\| !VALID_PTR(pApicReg->pszSetBaseRC)
1596	\|\| !VALID_PTR(pApicReg->pszGetBaseRC)
1597	\|\| !VALID_PTR(pApicReg->pszSetTPRRC)
1598	\|\| !VALID_PTR(pApicReg->pszGetTPRRC)
1599	\|\| !VALID_PTR(pApicReg->pszWriteMSRRC)
1600	\|\| !VALID_PTR(pApicReg->pszReadMSRRC)
1601	\|\| !VALID_PTR(pApicReg->pszBusDeliverRC))
1602	)
1603	{
1604	Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1605	Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1606	Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1607	Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1608	Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1609	Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1610	Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1611	Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1612	Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1613	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1614	return VERR_INVALID_PARAMETER;
1615	}
1616	if ( ( pApicReg->pszGetInterruptR0
1617	\|\| pApicReg->pszHasPendingIrqR0
1618	\|\| pApicReg->pszSetBaseR0
1619	\|\| pApicReg->pszGetBaseR0
1620	\|\| pApicReg->pszSetTPRR0
1621	\|\| pApicReg->pszGetTPRR0
1622	\|\| pApicReg->pszWriteMSRR0
1623	\|\| pApicReg->pszReadMSRR0
1624	\|\| pApicReg->pszBusDeliverR0)
1625	&& ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1626	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1627	\|\| !VALID_PTR(pApicReg->pszSetBaseR0)
1628	\|\| !VALID_PTR(pApicReg->pszGetBaseR0)
1629	\|\| !VALID_PTR(pApicReg->pszSetTPRR0)
1630	\|\| !VALID_PTR(pApicReg->pszGetTPRR0)
1631	\|\| !VALID_PTR(pApicReg->pszReadMSRR0)
1632	\|\| !VALID_PTR(pApicReg->pszWriteMSRR0)
1633	\|\| !VALID_PTR(pApicReg->pszBusDeliverR0))
1634	)
1635	{
1636	Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1637	Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1638	Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1639	Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1640	Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1641	Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1642	Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1643	Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1644	Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1645	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1646	return VERR_INVALID_PARAMETER;
1647	}
1648	if (!ppApicHlpR3)
1649	{
1650	Assert(ppApicHlpR3);
1651	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1652	return VERR_INVALID_PARAMETER;
1653	}
1654
1655	/*
1656	* Only one APIC device. On SMP we have single logical device covering all LAPICs,
1657	* as they need to communicate and share state easily.
1658	*/
1659	PVM pVM = pDevIns->Internal.s.pVMR3;
1660	if (pVM->pdm.s.Apic.pDevInsR3)
1661	{
1662	AssertMsgFailed(("Only one apic device is supported!\n"));
1663	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1664	return VERR_INVALID_PARAMETER;
1665	}
1666
1667	/*
1668	* Resolve & initialize the RC bits.
1669	*/
1670	if (pApicReg->pszGetInterruptRC)
1671	{
1672	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1673	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1674	if (RT_SUCCESS(rc))
1675	{
1676	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1677	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1678	}
1679	if (RT_SUCCESS(rc))
1680	{
1681	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1682	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1683	}
1684	if (RT_SUCCESS(rc))
1685	{
1686	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1687	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1688	}
1689	if (RT_SUCCESS(rc))
1690	{
1691	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1692	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1693	}
1694	if (RT_SUCCESS(rc))
1695	{
1696	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1697	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1698	}
1699	if (RT_SUCCESS(rc))
1700	{
1701	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1702	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1703	}
1704	if (RT_SUCCESS(rc))
1705	{
1706	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1707	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1708	}
1709	if (RT_SUCCESS(rc))
1710	{
1711	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1712	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1713	}
1714	if (RT_FAILURE(rc))
1715	{
1716	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1717	return rc;
1718	}
1719	pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1720	}
1721	else
1722	{
1723	pVM->pdm.s.Apic.pDevInsRC = 0;
1724	pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1725	pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1726	pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1727	pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1728	pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1729	pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1730	pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1731	pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1732	pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1733	}
1734
1735	/*
1736	* Resolve & initialize the R0 bits.
1737	*/
1738	if (pApicReg->pszGetInterruptR0)
1739	{
1740	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1741	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1742	if (RT_SUCCESS(rc))
1743	{
1744	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1745	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1746	}
1747	if (RT_SUCCESS(rc))
1748	{
1749	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1750	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1751	}
1752	if (RT_SUCCESS(rc))
1753	{
1754	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1755	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1756	}
1757	if (RT_SUCCESS(rc))
1758	{
1759	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1760	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1761	}
1762	if (RT_SUCCESS(rc))
1763	{
1764	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1765	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1766	}
1767	if (RT_SUCCESS(rc))
1768	{
1769	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1770	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1771	}
1772	if (RT_SUCCESS(rc))
1773	{
1774	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1775	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1776	}
1777	if (RT_SUCCESS(rc))
1778	{
1779	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1780	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1781	}
1782	if (RT_FAILURE(rc))
1783	{
1784	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1785	return rc;
1786	}
1787	pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1788	Assert(pVM->pdm.s.Apic.pDevInsR0);
1789	}
1790	else
1791	{
1792	pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1793	pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1794	pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1795	pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1796	pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1797	pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1798	pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1799	pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1800	pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1801	pVM->pdm.s.Apic.pDevInsR0 = 0;
1802	}
1803
1804	/*
1805	* Initialize the HC bits.
1806	*/
1807	pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1808	pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1809	pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1810	pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1811	pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1812	pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1813	pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1814	pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1815	pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1816	pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1817	Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1818
1819	/* set the helper pointer and return. */
1820	*ppApicHlpR3 = &g_pdmR3DevApicHlp;
1821	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1822	return VINF_SUCCESS;
1823	}
1824
1825
1826	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1827	static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1828	{
1829	PDMDEV_ASSERT_DEVINS(pDevIns);
1830	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1831	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1832	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1833	pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1834
1835	/*
1836	* Validate input.
1837	*/
1838	if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1839	{
1840	AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1841	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1842	return VERR_INVALID_PARAMETER;
1843	}
1844	if (!pIoApicReg->pfnSetIrqR3)
1845	{
1846	Assert(pIoApicReg->pfnSetIrqR3);
1847	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1848	return VERR_INVALID_PARAMETER;
1849	}
1850	if ( pIoApicReg->pszSetIrqRC
1851	&& !VALID_PTR(pIoApicReg->pszSetIrqRC))
1852	{
1853	Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1854	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1855	return VERR_INVALID_PARAMETER;
1856	}
1857	if ( pIoApicReg->pszSetIrqR0
1858	&& !VALID_PTR(pIoApicReg->pszSetIrqR0))
1859	{
1860	Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1861	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1862	return VERR_INVALID_PARAMETER;
1863	}
1864	if (!ppIoApicHlpR3)
1865	{
1866	Assert(ppIoApicHlpR3);
1867	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1868	return VERR_INVALID_PARAMETER;
1869	}
1870
1871	/*
1872	* The I/O APIC requires the APIC to be present (hacks++).
1873	* If the I/O APIC does GC stuff so must the APIC.
1874	*/
1875	PVM pVM = pDevIns->Internal.s.pVMR3;
1876	if (!pVM->pdm.s.Apic.pDevInsR3)
1877	{
1878	AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1879	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1880	return VERR_INVALID_PARAMETER;
1881	}
1882	if ( pIoApicReg->pszSetIrqRC
1883	&& !pVM->pdm.s.Apic.pDevInsRC)
1884	{
1885	AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1886	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1887	return VERR_INVALID_PARAMETER;
1888	}
1889
1890	/*
1891	* Only one I/O APIC device.
1892	*/
1893	if (pVM->pdm.s.IoApic.pDevInsR3)
1894	{
1895	AssertMsgFailed(("Only one ioapic device is supported!\n"));
1896	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1897	return VERR_INVALID_PARAMETER;
1898	}
1899
1900	/*
1901	* Resolve & initialize the GC bits.
1902	*/
1903	if (pIoApicReg->pszSetIrqRC)
1904	{
1905	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
1906	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
1907	if (RT_FAILURE(rc))
1908	{
1909	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1910	return rc;
1911	}
1912	pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1913	}
1914	else
1915	{
1916	pVM->pdm.s.IoApic.pDevInsRC = 0;
1917	pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
1918	}
1919
1920	/*
1921	* Resolve & initialize the R0 bits.
1922	*/
1923	if (pIoApicReg->pszSetIrqR0)
1924	{
1925	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
1926	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
1927	if (RT_FAILURE(rc))
1928	{
1929	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1930	return rc;
1931	}
1932	pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1933	Assert(pVM->pdm.s.IoApic.pDevInsR0);
1934	}
1935	else
1936	{
1937	pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
1938	pVM->pdm.s.IoApic.pDevInsR0 = 0;
1939	}
1940
1941	/*
1942	* Initialize the R3 bits.
1943	*/
1944	pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
1945	pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
1946	Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1947
1948	/* set the helper pointer and return. */
1949	*ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
1950	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1951	return VINF_SUCCESS;
1952	}
1953
1954
1955	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
1956	static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
1957	{
1958	PDMDEV_ASSERT_DEVINS(pDevIns);
1959	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1960	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
1961	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
1962	pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
1963
1964	/*
1965	* Validate input.
1966	*/
1967	if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
1968	{
1969	AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
1970	PDM_DMACREG_VERSION));
1971	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
1972	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1973	return VERR_INVALID_PARAMETER;
1974	}
1975	if ( !pDmacReg->pfnRun
1976	\|\| !pDmacReg->pfnRegister
1977	\|\| !pDmacReg->pfnReadMemory
1978	\|\| !pDmacReg->pfnWriteMemory
1979	\|\| !pDmacReg->pfnSetDREQ
1980	\|\| !pDmacReg->pfnGetChannelMode)
1981	{
1982	Assert(pDmacReg->pfnRun);
1983	Assert(pDmacReg->pfnRegister);
1984	Assert(pDmacReg->pfnReadMemory);
1985	Assert(pDmacReg->pfnWriteMemory);
1986	Assert(pDmacReg->pfnSetDREQ);
1987	Assert(pDmacReg->pfnGetChannelMode);
1988	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1989	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1990	return VERR_INVALID_PARAMETER;
1991	}
1992
1993	if (!ppDmacHlp)
1994	{
1995	Assert(ppDmacHlp);
1996	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
1997	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1998	return VERR_INVALID_PARAMETER;
1999	}
2000
2001	/*
2002	* Only one DMA device.
2003	*/
2004	PVM pVM = pDevIns->Internal.s.pVMR3;
2005	if (pVM->pdm.s.pDmac)
2006	{
2007	AssertMsgFailed(("Only one DMA device is supported!\n"));
2008	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2009	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2010	return VERR_INVALID_PARAMETER;
2011	}
2012
2013	/*
2014	* Allocate and initialize pci bus structure.
2015	*/
2016	int rc = VINF_SUCCESS;
2017	PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2018	if (pDmac)
2019	{
2020	pDmac->pDevIns = pDevIns;
2021	pDmac->Reg = *pDmacReg;
2022	pVM->pdm.s.pDmac = pDmac;
2023
2024	/* set the helper pointer. */
2025	*ppDmacHlp = &g_pdmR3DevDmacHlp;
2026	Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2027	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2028	}
2029	else
2030	rc = VERR_NO_MEMORY;
2031
2032	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2033	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2034	return rc;
2035	}
2036
2037
2038	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2039	static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2040	{
2041	PDMDEV_ASSERT_DEVINS(pDevIns);
2042	PVM pVM = pDevIns->Internal.s.pVMR3;
2043	LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2044	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2045
2046	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2047	if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2048	{
2049	char szNames[128];
2050	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2051	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2052	}
2053	#endif
2054
2055	int rc;
2056	if (VM_IS_EMT(pVM))
2057	rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
2058	else
2059	rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
2060
2061	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2062	return rc;
2063	}
2064
2065
2066	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2067	static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2068	{
2069	PDMDEV_ASSERT_DEVINS(pDevIns);
2070	PVM pVM = pDevIns->Internal.s.pVMR3;
2071	LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2072	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2073
2074	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2075	if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2076	{
2077	char szNames[128];
2078	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2079	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2080	}
2081	#endif
2082
2083	int rc;
2084	if (VM_IS_EMT(pVM))
2085	rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
2086	else
2087	rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite);
2088
2089	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2090	return rc;
2091	}
2092
2093
2094	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2095	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2096	{
2097	PDMDEV_ASSERT_DEVINS(pDevIns);
2098	PVM pVM = pDevIns->Internal.s.pVMR3;
2099	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2100	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2101	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2102
2103	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2104	if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2105	{
2106	char szNames[128];
2107	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2108	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2109	}
2110	#endif
2111
2112	int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
2113
2114	Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2115	return rc;
2116	}
2117
2118
2119	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2120	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2121	{
2122	PDMDEV_ASSERT_DEVINS(pDevIns);
2123	PVM pVM = pDevIns->Internal.s.pVMR3;
2124	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2125	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2126	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2127
2128	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2129	if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2130	{
2131	char szNames[128];
2132	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2133	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2134	}
2135	#endif
2136
2137	int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
2138
2139	Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2140	return rc;
2141	}
2142
2143
2144	/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2145	static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2146	{
2147	PDMDEV_ASSERT_DEVINS(pDevIns);
2148	PVM pVM = pDevIns->Internal.s.pVMR3;
2149	LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
2150	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pLock));
2151
2152	PGMPhysReleasePageMappingLock(pVM, pLock);
2153
2154	Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2155	}
2156
2157
2158	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2159	static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2160	{
2161	PDMDEV_ASSERT_DEVINS(pDevIns);
2162	PVM pVM = pDevIns->Internal.s.pVMR3;
2163	VM_ASSERT_EMT(pVM);
2164	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2165	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2166
2167	PVMCPU pVCpu = VMMGetCpu(pVM);
2168	if (!pVCpu)
2169	return VERR_ACCESS_DENIED;
2170	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2171	/** @todo SMP. */
2172	#endif
2173
2174	int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
2175
2176	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2177
2178	return rc;
2179	}
2180
2181
2182	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2183	static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2184	{
2185	PDMDEV_ASSERT_DEVINS(pDevIns);
2186	PVM pVM = pDevIns->Internal.s.pVMR3;
2187	VM_ASSERT_EMT(pVM);
2188	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2189	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2190
2191	PVMCPU pVCpu = VMMGetCpu(pVM);
2192	if (!pVCpu)
2193	return VERR_ACCESS_DENIED;
2194	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2195	/** @todo SMP. */
2196	#endif
2197
2198	int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
2199
2200	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2201
2202	return rc;
2203	}
2204
2205
2206	/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2207	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2208	{
2209	PDMDEV_ASSERT_DEVINS(pDevIns);
2210	PVM pVM = pDevIns->Internal.s.pVMR3;
2211	VM_ASSERT_EMT(pVM);
2212	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2213	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2214
2215	PVMCPU pVCpu = VMMGetCpu(pVM);
2216	if (!pVCpu)
2217	return VERR_ACCESS_DENIED;
2218	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2219	/** @todo SMP. */
2220	#endif
2221
2222	int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
2223
2224	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pGCPhys));
2225
2226	return rc;
2227	}
2228
2229
2230	/** @copydoc PDMDEVHLPR3::pfnVMState */
2231	static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
2232	{
2233	PDMDEV_ASSERT_DEVINS(pDevIns);
2234
2235	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2236
2237	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2238	enmVMState, VMR3GetStateName(enmVMState)));
2239	return enmVMState;
2240	}
2241
2242
2243	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2244	static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2245	{
2246	PDMDEV_ASSERT_DEVINS(pDevIns);
2247	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2248
2249	bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
2250
2251	LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2252	return fRc;
2253	}
2254
2255
2256	/** @copydoc PDMDEVHLPR3::pfnA20Set */
2257	static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2258	{
2259	PDMDEV_ASSERT_DEVINS(pDevIns);
2260	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2261	LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2262	PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
2263	}
2264
2265
2266	/** @copydoc PDMDEVHLPR3::pfnVMReset */
2267	static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2268	{
2269	PDMDEV_ASSERT_DEVINS(pDevIns);
2270	PVM pVM = pDevIns->Internal.s.pVMR3;
2271	VM_ASSERT_EMT(pVM);
2272	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2273	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2274
2275	/*
2276	* We postpone this operation because we're likely to be inside a I/O instruction
2277	* and the EIP will be updated when we return.
2278	* We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2279	*/
2280	bool fHaltOnReset;
2281	int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2282	if (RT_SUCCESS(rc) && fHaltOnReset)
2283	{
2284	Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2285	rc = VINF_EM_HALT;
2286	}
2287	else
2288	{
2289	VM_FF_SET(pVM, VM_FF_RESET);
2290	rc = VINF_EM_RESET;
2291	}
2292
2293	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2294	return rc;
2295	}
2296
2297
2298	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2299	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2300	{
2301	PDMDEV_ASSERT_DEVINS(pDevIns);
2302	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2303	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2304	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2305
2306	int rc = VMR3Suspend(pDevIns->Internal.s.pVMR3);
2307
2308	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2309	return rc;
2310	}
2311
2312
2313	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2314	static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2315	{
2316	PDMDEV_ASSERT_DEVINS(pDevIns);
2317	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2318	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2319	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2320
2321	int rc = VMR3PowerOff(pDevIns->Internal.s.pVMR3);
2322
2323	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2324	return rc;
2325	}
2326
2327	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2328	static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2329	{
2330	PDMDEV_ASSERT_DEVINS(pDevIns);
2331	PVM pVM = pDevIns->Internal.s.pVMR3;
2332	VM_ASSERT_EMT(pVM);
2333	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2334	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2335	int rc = VINF_SUCCESS;
2336	if (pVM->pdm.s.pDmac)
2337	pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2338	else
2339	{
2340	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2341	rc = VERR_PDM_NO_DMAC_INSTANCE;
2342	}
2343	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2344	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2345	return rc;
2346	}
2347
2348	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2349	static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
2350	{
2351	PDMDEV_ASSERT_DEVINS(pDevIns);
2352	PVM pVM = pDevIns->Internal.s.pVMR3;
2353	VM_ASSERT_EMT(pVM);
2354	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2355	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2356	int rc = VINF_SUCCESS;
2357	if (pVM->pdm.s.pDmac)
2358	{
2359	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2360	if (pcbRead)
2361	*pcbRead = cb;
2362	}
2363	else
2364	{
2365	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2366	rc = VERR_PDM_NO_DMAC_INSTANCE;
2367	}
2368	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2369	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2370	return rc;
2371	}
2372
2373	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2374	static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
2375	{
2376	PDMDEV_ASSERT_DEVINS(pDevIns);
2377	PVM pVM = pDevIns->Internal.s.pVMR3;
2378	VM_ASSERT_EMT(pVM);
2379	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2380	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2381	int rc = VINF_SUCCESS;
2382	if (pVM->pdm.s.pDmac)
2383	{
2384	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2385	if (pcbWritten)
2386	*pcbWritten = cb;
2387	}
2388	else
2389	{
2390	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2391	rc = VERR_PDM_NO_DMAC_INSTANCE;
2392	}
2393	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2394	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2395	return rc;
2396	}
2397
2398	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2399	static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2400	{
2401	PDMDEV_ASSERT_DEVINS(pDevIns);
2402	PVM pVM = pDevIns->Internal.s.pVMR3;
2403	VM_ASSERT_EMT(pVM);
2404	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2405	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2406	int rc = VINF_SUCCESS;
2407	if (pVM->pdm.s.pDmac)
2408	pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2409	else
2410	{
2411	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2412	rc = VERR_PDM_NO_DMAC_INSTANCE;
2413	}
2414	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2415	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2416	return rc;
2417	}
2418
2419	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2420	static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2421	{
2422	PDMDEV_ASSERT_DEVINS(pDevIns);
2423	PVM pVM = pDevIns->Internal.s.pVMR3;
2424	VM_ASSERT_EMT(pVM);
2425	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2426	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2427	uint8_t u8Mode;
2428	if (pVM->pdm.s.pDmac)
2429	u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2430	else
2431	{
2432	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2433	u8Mode = 3 << 2 /* illegal mode type */;
2434	}
2435	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2436	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2437	return u8Mode;
2438	}
2439
2440	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2441	static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2442	{
2443	PDMDEV_ASSERT_DEVINS(pDevIns);
2444	PVM pVM = pDevIns->Internal.s.pVMR3;
2445	VM_ASSERT_EMT(pVM);
2446	LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2447	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2448
2449	AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2450	VM_FF_SET(pVM, VM_FF_PDM_DMA);
2451	REMR3NotifyDmaPending(pVM);
2452	VMR3NotifyGlobalFF(pVM, true);
2453	}
2454
2455
2456	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2457	static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2458	{
2459	PDMDEV_ASSERT_DEVINS(pDevIns);
2460	PVM pVM = pDevIns->Internal.s.pVMR3;
2461	VM_ASSERT_EMT(pVM);
2462
2463	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2464	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2465	int rc;
2466	if (pVM->pdm.s.pRtc)
2467	rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2468	else
2469	rc = VERR_PDM_NO_RTC_INSTANCE;
2470
2471	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2472	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2473	return rc;
2474	}
2475
2476
2477	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2478	static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2479	{
2480	PDMDEV_ASSERT_DEVINS(pDevIns);
2481	PVM pVM = pDevIns->Internal.s.pVMR3;
2482	VM_ASSERT_EMT(pVM);
2483
2484	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2485	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2486	int rc;
2487	if (pVM->pdm.s.pRtc)
2488	rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2489	else
2490	rc = VERR_PDM_NO_RTC_INSTANCE;
2491
2492	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2493	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2494	return rc;
2495	}
2496
2497
2498	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2499	static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2500	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
2501	{
2502	PDMDEV_ASSERT_DEVINS(pDevIns);
2503	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2504
2505	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2506	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2507	AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2508
2509	CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
2510
2511	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - pEax=%#x pEbx=%#x pEcx=%#x pEdx=%#x\n",
2512	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pEax, pEbx, pEcx, pEdx));
2513	}
2514
2515
2516	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2517	static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
2518	{
2519	PDMDEV_ASSERT_DEVINS(pDevIns);
2520	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
2521	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
2522
2523	int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
2524
2525	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2526	return rc;
2527	}
2528
2529
2530	/**
2531	* @copydoc PDMDEVHLPR3::pfnMMIO2Register
2532	*/
2533	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
2534	{
2535	PDMDEV_ASSERT_DEVINS(pDevIns);
2536	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2537	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2538	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2539
2540	int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2541
2542	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2543	return rc;
2544	}
2545
2546
2547	/**
2548	* @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2549	*/
2550	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2551	{
2552	PDMDEV_ASSERT_DEVINS(pDevIns);
2553	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2554	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=#x\n",
2555	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2556
2557	AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2558
2559	int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2560
2561	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2562	return rc;
2563	}
2564
2565
2566	/**
2567	* @copydoc PDMDEVHLPR3::pfnMMIO2Map
2568	*/
2569	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2570	{
2571	PDMDEV_ASSERT_DEVINS(pDevIns);
2572	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2573	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2574	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2575
2576	int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2577
2578	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2579	return rc;
2580	}
2581
2582
2583	/**
2584	* @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2585	*/
2586	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2587	{
2588	PDMDEV_ASSERT_DEVINS(pDevIns);
2589	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2590	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2591	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2592
2593	int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2594
2595	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2596	return rc;
2597	}
2598
2599
2600	/**
2601	* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2602	*/
2603	static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2604	const char *pszDesc, PRTRCPTR pRCPtr)
2605	{
2606	PDMDEV_ASSERT_DEVINS(pDevIns);
2607	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2608	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2609	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2610
2611	int rc = MMR3HyperMapMMIO2(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2612
2613	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pRCPtr));
2614	return rc;
2615	}
2616
2617
2618	/**
2619	* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2620	*/
2621	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2622	const char *pszDesc, PRTR0PTR pR0Ptr)
2623	{
2624	PDMDEV_ASSERT_DEVINS(pDevIns);
2625	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2626	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2627	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2628
2629	int rc = PGMR3PhysMMIO2MapKernel(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2630
2631	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pR0Ptr));
2632	return rc;
2633	}
2634
2635
2636	/**
2637	* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2638	*/
2639	static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2640	{
2641	PDMDEV_ASSERT_DEVINS(pDevIns);
2642	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2643
2644	int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2645	return rc;
2646	}
2647
2648
2649	/**
2650	* @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2651	*/
2652	static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2653	{
2654	PDMDEV_ASSERT_DEVINS(pDevIns);
2655	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2656
2657	int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2658	return rc;
2659	}
2660
2661
2662	/**
2663	* The device helper structure for trusted devices.
2664	*/
2665	const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2666	{
2667	PDM_DEVHLP_VERSION,
2668	pdmR3DevHlp_IOPortRegister,
2669	pdmR3DevHlp_IOPortRegisterGC,
2670	pdmR3DevHlp_IOPortRegisterR0,
2671	pdmR3DevHlp_IOPortDeregister,
2672	pdmR3DevHlp_MMIORegister,
2673	pdmR3DevHlp_MMIORegisterGC,
2674	pdmR3DevHlp_MMIORegisterR0,
2675	pdmR3DevHlp_MMIODeregister,
2676	pdmR3DevHlp_ROMRegister,
2677	pdmR3DevHlp_SSMRegister,
2678	pdmR3DevHlp_TMTimerCreate,
2679	pdmR3DevHlp_TMTimerCreateExternal,
2680	pdmR3DevHlp_PCIRegister,
2681	pdmR3DevHlp_PCIIORegionRegister,
2682	pdmR3DevHlp_PCISetConfigCallbacks,
2683	pdmR3DevHlp_PCISetIrq,
2684	pdmR3DevHlp_PCISetIrqNoWait,
2685	pdmR3DevHlp_ISASetIrq,
2686	pdmR3DevHlp_ISASetIrqNoWait,
2687	pdmR3DevHlp_DriverAttach,
2688	pdmR3DevHlp_MMHeapAlloc,
2689	pdmR3DevHlp_MMHeapAllocZ,
2690	pdmR3DevHlp_MMHeapFree,
2691	pdmR3DevHlp_VMSetError,
2692	pdmR3DevHlp_VMSetErrorV,
2693	pdmR3DevHlp_VMSetRuntimeError,
2694	pdmR3DevHlp_VMSetRuntimeErrorV,
2695	pdmR3DevHlp_AssertEMT,
2696	pdmR3DevHlp_AssertOther,
2697	pdmR3DevHlp_DBGFStopV,
2698	pdmR3DevHlp_DBGFInfoRegister,
2699	pdmR3DevHlp_STAMRegister,
2700	pdmR3DevHlp_STAMRegisterF,
2701	pdmR3DevHlp_STAMRegisterV,
2702	pdmR3DevHlp_RTCRegister,
2703	pdmR3DevHlp_PDMQueueCreate,
2704	pdmR3DevHlp_CritSectInit,
2705	pdmR3DevHlp_UTCNow,
2706	pdmR3DevHlp_PDMThreadCreate,
2707	pdmR3DevHlp_PhysGCPtr2GCPhys,
2708	pdmR3DevHlp_VMState,
2709	0,
2710	0,
2711	0,
2712	0,
2713	0,
2714	0,
2715	0,
2716	pdmR3DevHlp_GetVM,
2717	pdmR3DevHlp_PCIBusRegister,
2718	pdmR3DevHlp_PICRegister,
2719	pdmR3DevHlp_APICRegister,
2720	pdmR3DevHlp_IOAPICRegister,
2721	pdmR3DevHlp_DMACRegister,
2722	pdmR3DevHlp_PhysRead,
2723	pdmR3DevHlp_PhysWrite,
2724	pdmR3DevHlp_PhysGCPhys2CCPtr,
2725	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2726	pdmR3DevHlp_PhysReleasePageMappingLock,
2727	pdmR3DevHlp_PhysReadGCVirt,
2728	pdmR3DevHlp_PhysWriteGCVirt,
2729	pdmR3DevHlp_A20IsEnabled,
2730	pdmR3DevHlp_A20Set,
2731	pdmR3DevHlp_VMReset,
2732	pdmR3DevHlp_VMSuspend,
2733	pdmR3DevHlp_VMPowerOff,
2734	pdmR3DevHlp_DMARegister,
2735	pdmR3DevHlp_DMAReadMemory,
2736	pdmR3DevHlp_DMAWriteMemory,
2737	pdmR3DevHlp_DMASetDREQ,
2738	pdmR3DevHlp_DMAGetChannelMode,
2739	pdmR3DevHlp_DMASchedule,
2740	pdmR3DevHlp_CMOSWrite,
2741	pdmR3DevHlp_CMOSRead,
2742	pdmR3DevHlp_GetCpuId,
2743	pdmR3DevHlp_ROMProtectShadow,
2744	pdmR3DevHlp_MMIO2Register,
2745	pdmR3DevHlp_MMIO2Deregister,
2746	pdmR3DevHlp_MMIO2Map,
2747	pdmR3DevHlp_MMIO2Unmap,
2748	pdmR3DevHlp_MMHyperMapMMIO2,
2749	pdmR3DevHlp_MMIO2MapKernel,
2750	pdmR3DevHlp_RegisterVMMDevHeap,
2751	pdmR3DevHlp_UnregisterVMMDevHeap,
2752	pdmR3DevHlp_GetVMCPU,
2753	PDM_DEVHLP_VERSION /* the end */
2754	};
2755
2756
2757
2758
2759	/** @copydoc PDMDEVHLPR3::pfnGetVM */
2760	static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2761	{
2762	PDMDEV_ASSERT_DEVINS(pDevIns);
2763	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2764	return NULL;
2765	}
2766
2767
2768	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2769	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2770	{
2771	PDMDEV_ASSERT_DEVINS(pDevIns);
2772	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2773	NOREF(pPciBusReg);
2774	NOREF(ppPciHlpR3);
2775	return VERR_ACCESS_DENIED;
2776	}
2777
2778
2779	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2780	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2781	{
2782	PDMDEV_ASSERT_DEVINS(pDevIns);
2783	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2784	NOREF(pPicReg);
2785	NOREF(ppPicHlpR3);
2786	return VERR_ACCESS_DENIED;
2787	}
2788
2789
2790	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2791	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2792	{
2793	PDMDEV_ASSERT_DEVINS(pDevIns);
2794	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2795	NOREF(pApicReg);
2796	NOREF(ppApicHlpR3);
2797	return VERR_ACCESS_DENIED;
2798	}
2799
2800
2801	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2802	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2803	{
2804	PDMDEV_ASSERT_DEVINS(pDevIns);
2805	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2806	NOREF(pIoApicReg);
2807	NOREF(ppIoApicHlpR3);
2808	return VERR_ACCESS_DENIED;
2809	}
2810
2811
2812	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2813	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2814	{
2815	PDMDEV_ASSERT_DEVINS(pDevIns);
2816	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2817	NOREF(pDmacReg);
2818	NOREF(ppDmacHlp);
2819	return VERR_ACCESS_DENIED;
2820	}
2821
2822
2823	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2824	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2825	{
2826	PDMDEV_ASSERT_DEVINS(pDevIns);
2827	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2828	NOREF(GCPhys);
2829	NOREF(pvBuf);
2830	NOREF(cbRead);
2831	return VERR_ACCESS_DENIED;
2832	}
2833
2834
2835	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2836	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2837	{
2838	PDMDEV_ASSERT_DEVINS(pDevIns);
2839	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2840	NOREF(GCPhys);
2841	NOREF(pvBuf);
2842	NOREF(cbWrite);
2843	return VERR_ACCESS_DENIED;
2844	}
2845
2846
2847	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2848	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2849	{
2850	PDMDEV_ASSERT_DEVINS(pDevIns);
2851	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2852	NOREF(GCPhys);
2853	NOREF(fFlags);
2854	NOREF(ppv);
2855	NOREF(pLock);
2856	return VERR_ACCESS_DENIED;
2857	}
2858
2859
2860	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2861	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2862	{
2863	PDMDEV_ASSERT_DEVINS(pDevIns);
2864	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2865	NOREF(GCPhys);
2866	NOREF(fFlags);
2867	NOREF(ppv);
2868	NOREF(pLock);
2869	return VERR_ACCESS_DENIED;
2870	}
2871
2872
2873	/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2874	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2875	{
2876	PDMDEV_ASSERT_DEVINS(pDevIns);
2877	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2878	NOREF(pLock);
2879	}
2880
2881
2882	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2883	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2884	{
2885	PDMDEV_ASSERT_DEVINS(pDevIns);
2886	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2887	NOREF(pvDst);
2888	NOREF(GCVirtSrc);
2889	NOREF(cb);
2890	return VERR_ACCESS_DENIED;
2891	}
2892
2893
2894	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2895	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2896	{
2897	PDMDEV_ASSERT_DEVINS(pDevIns);
2898	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2899	NOREF(GCVirtDst);
2900	NOREF(pvSrc);
2901	NOREF(cb);
2902	return VERR_ACCESS_DENIED;
2903	}
2904
2905
2906	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2907	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
2908	{
2909	PDMDEV_ASSERT_DEVINS(pDevIns);
2910	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2911	return false;
2912	}
2913
2914
2915	/** @copydoc PDMDEVHLPR3::pfnA20Set */
2916	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2917	{
2918	PDMDEV_ASSERT_DEVINS(pDevIns);
2919	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2920	NOREF(fEnable);
2921	}
2922
2923
2924	/** @copydoc PDMDEVHLPR3::pfnVMReset */
2925	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
2926	{
2927	PDMDEV_ASSERT_DEVINS(pDevIns);
2928	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2929	return VERR_ACCESS_DENIED;
2930	}
2931
2932
2933	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2934	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
2935	{
2936	PDMDEV_ASSERT_DEVINS(pDevIns);
2937	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2938	return VERR_ACCESS_DENIED;
2939	}
2940
2941
2942	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2943	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
2944	{
2945	PDMDEV_ASSERT_DEVINS(pDevIns);
2946	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2947	return VERR_ACCESS_DENIED;
2948	}
2949
2950	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2951	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2952	{
2953	PDMDEV_ASSERT_DEVINS(pDevIns);
2954	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2955	return VERR_ACCESS_DENIED;
2956	}
2957
2958
2959	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2960	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
2961	{
2962	PDMDEV_ASSERT_DEVINS(pDevIns);
2963	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2964	if (pcbRead)
2965	*pcbRead = 0;
2966	return VERR_ACCESS_DENIED;
2967	}
2968
2969
2970	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2971	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
2972	{
2973	PDMDEV_ASSERT_DEVINS(pDevIns);
2974	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2975	if (pcbWritten)
2976	*pcbWritten = 0;
2977	return VERR_ACCESS_DENIED;
2978	}
2979
2980
2981	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2982	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2983	{
2984	PDMDEV_ASSERT_DEVINS(pDevIns);
2985	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2986	return VERR_ACCESS_DENIED;
2987	}
2988
2989
2990	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2991	static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2992	{
2993	PDMDEV_ASSERT_DEVINS(pDevIns);
2994	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2995	return 3 << 2 /* illegal mode type */;
2996	}
2997
2998
2999	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3000	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3001	{
3002	PDMDEV_ASSERT_DEVINS(pDevIns);
3003	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3004	}
3005
3006
3007	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3008	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3009	{
3010	PDMDEV_ASSERT_DEVINS(pDevIns);
3011	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3012	return VERR_ACCESS_DENIED;
3013	}
3014
3015
3016	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3017	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3018	{
3019	PDMDEV_ASSERT_DEVINS(pDevIns);
3020	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3021	return VERR_ACCESS_DENIED;
3022	}
3023
3024
3025	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3026	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3027	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3028	{
3029	PDMDEV_ASSERT_DEVINS(pDevIns);
3030	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3031	}
3032
3033
3034	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3035	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3036	{
3037	PDMDEV_ASSERT_DEVINS(pDevIns);
3038	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3039	return VERR_ACCESS_DENIED;
3040	}
3041
3042
3043	/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3044	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
3045	{
3046	PDMDEV_ASSERT_DEVINS(pDevIns);
3047	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3048	return VERR_ACCESS_DENIED;
3049	}
3050
3051
3052	/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3053	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3054	{
3055	PDMDEV_ASSERT_DEVINS(pDevIns);
3056	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3057	return VERR_ACCESS_DENIED;
3058	}
3059
3060
3061	/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3062	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3063	{
3064	PDMDEV_ASSERT_DEVINS(pDevIns);
3065	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3066	return VERR_ACCESS_DENIED;
3067	}
3068
3069
3070	/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3071	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3072	{
3073	PDMDEV_ASSERT_DEVINS(pDevIns);
3074	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3075	return VERR_ACCESS_DENIED;
3076	}
3077
3078
3079	/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3080	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3081	{
3082	PDMDEV_ASSERT_DEVINS(pDevIns);
3083	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3084	return VERR_ACCESS_DENIED;
3085	}
3086
3087
3088	/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3089	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3090	{
3091	PDMDEV_ASSERT_DEVINS(pDevIns);
3092	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3093	return VERR_ACCESS_DENIED;
3094	}
3095
3096
3097	/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3098	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3099	{
3100	PDMDEV_ASSERT_DEVINS(pDevIns);
3101	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3102	return VERR_ACCESS_DENIED;
3103	}
3104
3105
3106	/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3107	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3108	{
3109	PDMDEV_ASSERT_DEVINS(pDevIns);
3110	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3111	return VERR_ACCESS_DENIED;
3112	}
3113
3114
3115	/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
3116	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3117	{
3118	PDMDEV_ASSERT_DEVINS(pDevIns);
3119	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3120	return NULL;
3121	}
3122
3123
3124	/**
3125	* The device helper structure for non-trusted devices.
3126	*/
3127	const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3128	{
3129	PDM_DEVHLP_VERSION,
3130	pdmR3DevHlp_IOPortRegister,
3131	pdmR3DevHlp_IOPortRegisterGC,
3132	pdmR3DevHlp_IOPortRegisterR0,
3133	pdmR3DevHlp_IOPortDeregister,
3134	pdmR3DevHlp_MMIORegister,
3135	pdmR3DevHlp_MMIORegisterGC,
3136	pdmR3DevHlp_MMIORegisterR0,
3137	pdmR3DevHlp_MMIODeregister,
3138	pdmR3DevHlp_ROMRegister,
3139	pdmR3DevHlp_SSMRegister,
3140	pdmR3DevHlp_TMTimerCreate,
3141	pdmR3DevHlp_TMTimerCreateExternal,
3142	pdmR3DevHlp_PCIRegister,
3143	pdmR3DevHlp_PCIIORegionRegister,
3144	pdmR3DevHlp_PCISetConfigCallbacks,
3145	pdmR3DevHlp_PCISetIrq,
3146	pdmR3DevHlp_PCISetIrqNoWait,
3147	pdmR3DevHlp_ISASetIrq,
3148	pdmR3DevHlp_ISASetIrqNoWait,
3149	pdmR3DevHlp_DriverAttach,
3150	pdmR3DevHlp_MMHeapAlloc,
3151	pdmR3DevHlp_MMHeapAllocZ,
3152	pdmR3DevHlp_MMHeapFree,
3153	pdmR3DevHlp_VMSetError,
3154	pdmR3DevHlp_VMSetErrorV,
3155	pdmR3DevHlp_VMSetRuntimeError,
3156	pdmR3DevHlp_VMSetRuntimeErrorV,
3157	pdmR3DevHlp_AssertEMT,
3158	pdmR3DevHlp_AssertOther,
3159	pdmR3DevHlp_DBGFStopV,
3160	pdmR3DevHlp_DBGFInfoRegister,
3161	pdmR3DevHlp_STAMRegister,
3162	pdmR3DevHlp_STAMRegisterF,
3163	pdmR3DevHlp_STAMRegisterV,
3164	pdmR3DevHlp_RTCRegister,
3165	pdmR3DevHlp_PDMQueueCreate,
3166	pdmR3DevHlp_CritSectInit,
3167	pdmR3DevHlp_UTCNow,
3168	pdmR3DevHlp_PDMThreadCreate,
3169	pdmR3DevHlp_PhysGCPtr2GCPhys,
3170	pdmR3DevHlp_VMState,
3171	0,
3172	0,
3173	0,
3174	0,
3175	0,
3176	0,
3177	0,
3178	pdmR3DevHlp_Untrusted_GetVM,
3179	pdmR3DevHlp_Untrusted_PCIBusRegister,
3180	pdmR3DevHlp_Untrusted_PICRegister,
3181	pdmR3DevHlp_Untrusted_APICRegister,
3182	pdmR3DevHlp_Untrusted_IOAPICRegister,
3183	pdmR3DevHlp_Untrusted_DMACRegister,
3184	pdmR3DevHlp_Untrusted_PhysRead,
3185	pdmR3DevHlp_Untrusted_PhysWrite,
3186	pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr,
3187	pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly,
3188	pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock,
3189	pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3190	pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3191	pdmR3DevHlp_Untrusted_A20IsEnabled,
3192	pdmR3DevHlp_Untrusted_A20Set,
3193	pdmR3DevHlp_Untrusted_VMReset,
3194	pdmR3DevHlp_Untrusted_VMSuspend,
3195	pdmR3DevHlp_Untrusted_VMPowerOff,
3196	pdmR3DevHlp_Untrusted_DMARegister,
3197	pdmR3DevHlp_Untrusted_DMAReadMemory,
3198	pdmR3DevHlp_Untrusted_DMAWriteMemory,
3199	pdmR3DevHlp_Untrusted_DMASetDREQ,
3200	pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3201	pdmR3DevHlp_Untrusted_DMASchedule,
3202	pdmR3DevHlp_Untrusted_CMOSWrite,
3203	pdmR3DevHlp_Untrusted_CMOSRead,
3204	pdmR3DevHlp_Untrusted_GetCpuId,
3205	pdmR3DevHlp_Untrusted_ROMProtectShadow,
3206	pdmR3DevHlp_Untrusted_MMIO2Register,
3207	pdmR3DevHlp_Untrusted_MMIO2Deregister,
3208	pdmR3DevHlp_Untrusted_MMIO2Map,
3209	pdmR3DevHlp_Untrusted_MMIO2Unmap,
3210	pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3211	pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3212	pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3213	pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3214	pdmR3DevHlp_Untrusted_GetVMCPU,
3215	PDM_DEVHLP_VERSION /* the end */
3216	};
3217
3218
3219
3220	/**
3221	* Queue consumer callback for internal component.
3222	*
3223	* @returns Success indicator.
3224	* If false the item will not be removed and the flushing will stop.
3225	* @param pVM The VM handle.
3226	* @param pItem The item to consume. Upon return this item will be freed.
3227	*/
3228	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3229	{
3230	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3231	LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3232	switch (pTask->enmOp)
3233	{
3234	case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3235	PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3236	break;
3237
3238	case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3239	pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3240	break;
3241
3242	case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3243	PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3244	break;
3245
3246	default:
3247	AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3248	break;
3249	}
3250	return true;
3251	}
3252
3253	/** @} */
3254

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source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 19366

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