PDMDevHlp.cpp@ 24323

Last change on this file since 24323 was 24289, checked in by vboxsync, 15 years ago
PDMDevHlp: Enabled APIC fix again.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 138.5 KB

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1	/* $Id: PDMDevHlp.cpp 24289 2009-11-03 13:52:35Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, Device Helpers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27	#include "PDMInternal.h"
28	#include <VBox/pdm.h>
29	#include <VBox/mm.h>
30	#include <VBox/pgm.h>
31	#include <VBox/iom.h>
32	#include <VBox/rem.h>
33	#include <VBox/dbgf.h>
34	#include <VBox/vm.h>
35	#include <VBox/vmm.h>
36
37	#include <VBox/version.h>
38	#include <VBox/log.h>
39	#include <VBox/err.h>
40	#include <iprt/asm.h>
41	#include <iprt/assert.h>
42	#include <iprt/string.h>
43	#include <iprt/thread.h>
44
45
46	/*******************************************************************************
47	* Defined Constants And Macros *
48	*******************************************************************************/
49	/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50	* Define this to enable the deadlock detection when accessing physical memory.
51	*/
52	#if /defined(DEBUG_bird) \|\|/ defined(DOXYGEN_RUNNING)
53	# define PDM_DEVHLP_DEADLOCK_DETECTION
54	#endif
55
56
57	/*******************************************************************************
58	* Defined Constants And Macros *
59	*******************************************************************************/
60	/** @name R3 DevHlp
61	* @{
62	*/
63
64
65	/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
66	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67	PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68	{
69	PDMDEV_ASSERT_DEVINS(pDevIns);
70	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
71	Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74	#if 0 /** @todo needs a real string cache for this */
75	if (pDevIns->iInstance > 0)
76	{
77	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
78	if (pszDesc2)
79	pszDesc = pszDesc2;
80	}
81	#endif
82
83	int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
84
85	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
86	return rc;
87	}
88
89
90	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
91	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
92	const char pszOut, const char pszIn,
93	const char pszOutStr, const char pszInStr, const char *pszDesc)
94	{
95	PDMDEV_ASSERT_DEVINS(pDevIns);
96	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
98	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
99
100	/*
101	* Resolve the functions (one of the can be NULL).
102	*/
103	int rc = VINF_SUCCESS;
104	if ( pDevIns->pDevReg->szRCMod[0]
105	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
106	{
107	RTRCPTR RCPtrIn = NIL_RTRCPTR;
108	if (pszIn)
109	{
110	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
111	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
112	}
113	RTRCPTR RCPtrOut = NIL_RTRCPTR;
114	if (pszOut && RT_SUCCESS(rc))
115	{
116	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
117	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
118	}
119	RTRCPTR RCPtrInStr = NIL_RTRCPTR;
120	if (pszInStr && RT_SUCCESS(rc))
121	{
122	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
123	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
124	}
125	RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
126	if (pszOutStr && RT_SUCCESS(rc))
127	{
128	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
129	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
130	}
131
132	if (RT_SUCCESS(rc))
133	{
134	#if 0 /** @todo needs a real string cache for this */
135	if (pDevIns->iInstance > 0)
136	{
137	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
138	if (pszDesc2)
139	pszDesc = pszDesc2;
140	}
141	#endif
142
143	rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
144	}
145	}
146	else
147	{
148	AssertMsgFailed(("No GC module for this driver!\n"));
149	rc = VERR_INVALID_PARAMETER;
150	}
151
152	LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
153	return rc;
154	}
155
156
157	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
158	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
159	const char pszOut, const char pszIn,
160	const char pszOutStr, const char pszInStr, const char *pszDesc)
161	{
162	PDMDEV_ASSERT_DEVINS(pDevIns);
163	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
164	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
165	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
166
167	/*
168	* Resolve the functions (one of the can be NULL).
169	*/
170	int rc = VINF_SUCCESS;
171	if ( pDevIns->pDevReg->szR0Mod[0]
172	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
173	{
174	R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
175	if (pszIn)
176	{
177	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
178	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
179	}
180	R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
181	if (pszOut && RT_SUCCESS(rc))
182	{
183	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
184	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
185	}
186	R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
187	if (pszInStr && RT_SUCCESS(rc))
188	{
189	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
190	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
191	}
192	R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
193	if (pszOutStr && RT_SUCCESS(rc))
194	{
195	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
196	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
197	}
198
199	if (RT_SUCCESS(rc))
200	{
201	#if 0 /** @todo needs a real string cache for this */
202	if (pDevIns->iInstance > 0)
203	{
204	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
205	if (pszDesc2)
206	pszDesc = pszDesc2;
207	}
208	#endif
209
210	rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
211	}
212	}
213	else
214	{
215	AssertMsgFailed(("No R0 module for this driver!\n"));
216	rc = VERR_INVALID_PARAMETER;
217	}
218
219	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
220	return rc;
221	}
222
223
224	/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
225	static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
226	{
227	PDMDEV_ASSERT_DEVINS(pDevIns);
228	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
229	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
230	Port, cPorts));
231
232	int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
233
234	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
235	return rc;
236	}
237
238
239	/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
240	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
241	PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
242	const char *pszDesc)
243	{
244	PDMDEV_ASSERT_DEVINS(pDevIns);
245	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
246	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
247	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
248
249	/** @todo IOMR3MMIORegisterR3 mangles the description, move it here. */
250	int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
251
252	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
253	return rc;
254	}
255
256
257	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
258	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
259	const char pszWrite, const char pszRead, const char *pszFill,
260	const char *pszDesc)
261	{
262	PDMDEV_ASSERT_DEVINS(pDevIns);
263	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
264	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
265	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
266
267	/** @todo pszDesc is unused here, drop it. */
268
269	/*
270	* Resolve the functions.
271	* Not all function have to present, leave it to IOM to enforce this.
272	*/
273	int rc = VINF_SUCCESS;
274	if ( pDevIns->pDevReg->szRCMod[0]
275	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
276	{
277	RTRCPTR RCPtrWrite = NIL_RTRCPTR;
278	if (pszWrite)
279	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
280
281	RTRCPTR RCPtrRead = NIL_RTRCPTR;
282	int rc2 = VINF_SUCCESS;
283	if (pszRead)
284	rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
285
286	RTRCPTR RCPtrFill = NIL_RTRCPTR;
287	int rc3 = VINF_SUCCESS;
288	if (pszFill)
289	rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
290
291	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
292	rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
293	else
294	{
295	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
296	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
297	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
298	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
299	rc = rc2;
300	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
301	rc = rc3;
302	}
303	}
304	else
305	{
306	AssertMsgFailed(("No GC module for this driver!\n"));
307	rc = VERR_INVALID_PARAMETER;
308	}
309
310	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
311	return rc;
312	}
313
314	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
315	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
316	const char pszWrite, const char pszRead, const char *pszFill,
317	const char *pszDesc)
318	{
319	PDMDEV_ASSERT_DEVINS(pDevIns);
320	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
321	LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
322	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
323
324	/** @todo pszDesc is unused here, remove it. */
325
326	/*
327	* Resolve the functions.
328	* Not all function have to present, leave it to IOM to enforce this.
329	*/
330	int rc = VINF_SUCCESS;
331	if ( pDevIns->pDevReg->szR0Mod[0]
332	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
333	{
334	R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
335	if (pszWrite)
336	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
337	R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
338	int rc2 = VINF_SUCCESS;
339	if (pszRead)
340	rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
341	R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
342	int rc3 = VINF_SUCCESS;
343	if (pszFill)
344	rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
345	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
346	rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
347	else
348	{
349	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
350	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
351	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
352	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
353	rc = rc2;
354	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
355	rc = rc3;
356	}
357	}
358	else
359	{
360	AssertMsgFailed(("No R0 module for this driver!\n"));
361	rc = VERR_INVALID_PARAMETER;
362	}
363
364	LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
365	return rc;
366	}
367
368
369	/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
370	static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
371	{
372	PDMDEV_ASSERT_DEVINS(pDevIns);
373	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
374	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
375	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
376
377	int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
378
379	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
380	return rc;
381	}
382
383
384	/** @copydoc PDMDEVHLPR3::pfnROMRegister */
385	static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void pvBinary, uint32_t fFlags, const char pszDesc)
386	{
387	PDMDEV_ASSERT_DEVINS(pDevIns);
388	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
389	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
390	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
391
392	/** @todo can we mangle pszDesc? */
393	int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
394
395	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
396	return rc;
397	}
398
399
400	/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
401	static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
402	PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
403	PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
404	PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
405	{
406	PDMDEV_ASSERT_DEVINS(pDevIns);
407	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
408	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
409	" pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
410	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
411	pfnLivePrep, pfnLiveExec, pfnLiveVote,
412	pfnSavePrep, pfnSaveExec, pfnSaveDone,
413	pfnLoadPrep, pfnLoadExec, pfnLoadDone));
414
415	int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
416	uVersion, cbGuess, pszBefore,
417	pfnLivePrep, pfnLiveExec, pfnLiveVote,
418	pfnSavePrep, pfnSaveExec, pfnSaveDone,
419	pfnLoadPrep, pfnLoadExec, pfnLoadDone);
420
421	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
422	return rc;
423	}
424
425
426	/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
427	static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void pvUser, uint32_t fFlags, const char pszDesc, PPTMTIMERR3 ppTimer)
428	{
429	PDMDEV_ASSERT_DEVINS(pDevIns);
430	PVM pVM = pDevIns->Internal.s.pVMR3;
431	VM_ASSERT_EMT(pVM);
432	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
433	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
434
435	if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
436	{
437	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
438	if (pszDesc2)
439	pszDesc = pszDesc2;
440	}
441
442	int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
443
444	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
445	return rc;
446	}
447
448
449	/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
450	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
451	{
452	PDMDEV_ASSERT_DEVINS(pDevIns);
453	PVM pVM = pDevIns->Internal.s.pVMR3;
454	VM_ASSERT_EMT(pVM);
455	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
456	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
457
458	/*
459	* Validate input.
460	*/
461	if (!pPciDev)
462	{
463	Assert(pPciDev);
464	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
465	return VERR_INVALID_PARAMETER;
466	}
467	if (!pPciDev->config[0] && !pPciDev->config[1])
468	{
469	Assert(pPciDev->config[0] \|\| pPciDev->config[1]);
470	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
471	return VERR_INVALID_PARAMETER;
472	}
473	if (pDevIns->Internal.s.pPciDeviceR3)
474	{
475	/** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
476	* support a PDM device with multiple PCI devices. This might become a problem
477	* when upgrading the chipset for instance because of multiple functions in some
478	* devices...
479	*/
480	AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
481	return VERR_INTERNAL_ERROR;
482	}
483
484	/*
485	* Choose the PCI bus for the device.
486	*
487	* This is simple. If the device was configured for a particular bus, the PCIBusNo
488	* configuration value will be set. If not the default bus is 0.
489	*/
490	int rc;
491	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
492	if (!pBus)
493	{
494	uint8_t u8Bus;
495	rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
496	AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
497	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
498	AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
499	("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
500	RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
501	VERR_PDM_NO_PCI_BUS);
502	pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
503	}
504	if (pBus->pDevInsR3)
505	{
506	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
507	pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
508	else
509	pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
510
511	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
512	pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
513	else
514	pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
515
516	/*
517	* Check the configuration for PCI device and function assignment.
518	*/
519	int iDev = -1;
520	uint8_t u8Device;
521	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
522	if (RT_SUCCESS(rc))
523	{
524	if (u8Device > 31)
525	{
526	AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
527	u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
528	return VERR_INTERNAL_ERROR;
529	}
530
531	uint8_t u8Function;
532	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
533	if (RT_FAILURE(rc))
534	{
535	AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
536	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
537	return rc;
538	}
539	if (u8Function > 7)
540	{
541	AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
542	u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
543	return VERR_INTERNAL_ERROR;
544	}
545	iDev = (u8Device << 3) \| u8Function;
546	}
547	else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
548	{
549	AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
550	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
551	return rc;
552	}
553
554	/*
555	* Call the pci bus device to do the actual registration.
556	*/
557	pdmLock(pVM);
558	rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
559	pdmUnlock(pVM);
560	if (RT_SUCCESS(rc))
561	{
562	pPciDev->pDevIns = pDevIns;
563
564	pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
565	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
566	pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
567	else
568	pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
569
570	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
571	pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
572	else
573	pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
574
575	Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
576	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
577	}
578	}
579	else
580	{
581	AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
582	rc = VERR_PDM_NO_PCI_BUS;
583	}
584
585	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
586	return rc;
587	}
588
589
590	/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
591	static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
592	{
593	PDMDEV_ASSERT_DEVINS(pDevIns);
594	PVM pVM = pDevIns->Internal.s.pVMR3;
595	VM_ASSERT_EMT(pVM);
596	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
597	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
598
599	/*
600	* Validate input.
601	*/
602	if (iRegion < 0 \|\| iRegion >= PCI_NUM_REGIONS)
603	{
604	Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
605	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
606	return VERR_INVALID_PARAMETER;
607	}
608	switch (enmType)
609	{
610	case PCI_ADDRESS_SPACE_IO:
611	/*
612	* Sanity check: don't allow to register more than 32K of the PCI I/O space.
613	*/
614	AssertMsgReturn(cbRegion <= _32K,
615	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
616	VERR_INVALID_PARAMETER);
617	break;
618
619	case PCI_ADDRESS_SPACE_MEM:
620	case PCI_ADDRESS_SPACE_MEM_PREFETCH:
621	/*
622	* Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
623	* now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
624	*/
625	AssertMsgReturn(cbRegion <= 512 * _1M,
626	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
627	VERR_INVALID_PARAMETER);
628	break;
629	default:
630	AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
631	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
632	return VERR_INVALID_PARAMETER;
633	}
634	if (!pfnCallback)
635	{
636	Assert(pfnCallback);
637	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
638	return VERR_INVALID_PARAMETER;
639	}
640	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
641
642	/*
643	* Must have a PCI device registered!
644	*/
645	int rc;
646	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
647	if (pPciDev)
648	{
649	/*
650	* We're currently restricted to page aligned MMIO regions.
651	*/
652	if ( (enmType == PCI_ADDRESS_SPACE_MEM \|\| enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
653	&& cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
654	{
655	Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
656	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
657	cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
658	}
659
660	/*
661	* For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
662	*/
663	int iLastSet = ASMBitLastSetU32(cbRegion);
664	Assert(iLastSet > 0);
665	uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
666	if (cbRegion > cbRegionAligned)
667	cbRegion = cbRegionAligned * 2; /* round up */
668
669	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
670	Assert(pBus);
671	pdmLock(pVM);
672	rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
673	pdmUnlock(pVM);
674	}
675	else
676	{
677	AssertMsgFailed(("No PCI device registered!\n"));
678	rc = VERR_PDM_NOT_PCI_DEVICE;
679	}
680
681	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
682	return rc;
683	}
684
685
686	/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
687	static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
688	PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
689	{
690	PDMDEV_ASSERT_DEVINS(pDevIns);
691	PVM pVM = pDevIns->Internal.s.pVMR3;
692	VM_ASSERT_EMT(pVM);
693	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
694	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
695
696	/*
697	* Validate input and resolve defaults.
698	*/
699	AssertPtr(pfnRead);
700	AssertPtr(pfnWrite);
701	AssertPtrNull(ppfnReadOld);
702	AssertPtrNull(ppfnWriteOld);
703	AssertPtrNull(pPciDev);
704
705	if (!pPciDev)
706	pPciDev = pDevIns->Internal.s.pPciDeviceR3;
707	AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
708	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
709	AssertRelease(pBus);
710	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
711
712	/*
713	* Do the job.
714	*/
715	pdmLock(pVM);
716	pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
717	pdmUnlock(pVM);
718
719	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
720	}
721
722
723	/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
724	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
725	{
726	PDMDEV_ASSERT_DEVINS(pDevIns);
727	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
728
729	/*
730	* Validate input.
731	*/
732	/** @todo iIrq and iLevel checks. */
733
734	/*
735	* Must have a PCI device registered!
736	*/
737	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
738	if (pPciDev)
739	{
740	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
741	Assert(pBus);
742	PVM pVM = pDevIns->Internal.s.pVMR3;
743	pdmLock(pVM);
744	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
745	pdmUnlock(pVM);
746	}
747	else
748	AssertReleaseMsgFailed(("No PCI device registered!\n"));
749
750	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
751	}
752
753
754	/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
755	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
756	{
757	pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
758	}
759
760
761	/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
762	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
763	{
764	PDMDEV_ASSERT_DEVINS(pDevIns);
765	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
766
767	/*
768	* Validate input.
769	*/
770	/** @todo iIrq and iLevel checks. */
771
772	PVM pVM = pDevIns->Internal.s.pVMR3;
773	PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
774
775	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
776	}
777
778
779	/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
780	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
781	{
782	pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
783	}
784
785
786	/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
787	static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE ppBaseInterface, const char pszDesc)
788	{
789	PDMDEV_ASSERT_DEVINS(pDevIns);
790	PVM pVM = pDevIns->Internal.s.pVMR3;
791	VM_ASSERT_EMT(pVM);
792	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
793	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
794
795	/*
796	* Lookup the LUN, it might already be registered.
797	*/
798	PPDMLUN pLunPrev = NULL;
799	PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
800	for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
801	if (pLun->iLun == iLun)
802	break;
803
804	/*
805	* Create the LUN if if wasn't found, else check if driver is already attached to it.
806	*/
807	if (!pLun)
808	{
809	if ( !pBaseInterface
810	\|\| !pszDesc
811	\|\| !*pszDesc)
812	{
813	Assert(pBaseInterface);
814	Assert(pszDesc \|\| *pszDesc);
815	return VERR_INVALID_PARAMETER;
816	}
817
818	pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
819	if (!pLun)
820	return VERR_NO_MEMORY;
821
822	pLun->iLun = iLun;
823	pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
824	pLun->pTop = NULL;
825	pLun->pBottom = NULL;
826	pLun->pDevIns = pDevIns;
827	pLun->pszDesc = pszDesc;
828	pLun->pBase = pBaseInterface;
829	if (!pLunPrev)
830	pDevIns->Internal.s.pLunsR3 = pLun;
831	else
832	pLunPrev->pNext = pLun;
833	Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
834	iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
835	}
836	else if (pLun->pTop)
837	{
838	AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
839	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
840	return VERR_PDM_DRIVER_ALREADY_ATTACHED;
841	}
842	Assert(pLun->pBase == pBaseInterface);
843
844
845	/*
846	* Get the attached driver configuration.
847	*/
848	int rc;
849	PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
850	if (pNode)
851	{
852	char *pszName;
853	rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
854	if (RT_SUCCESS(rc))
855	{
856	/*
857	* Find the driver.
858	*/
859	PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
860	if ( pDrv
861	&& pDrv->cInstances < pDrv->pDrvReg->cMaxInstances)
862	{
863	/* config node */
864	PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
865	if (!pConfigNode)
866	rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
867	if (RT_SUCCESS(rc))
868	{
869	CFGMR3SetRestrictedRoot(pConfigNode);
870
871	/*
872	* Allocate the driver instance.
873	*/
874	size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
875	cb = RT_ALIGN_Z(cb, 16);
876	PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
877	if (pNew)
878	{
879	/*
880	* Initialize the instance structure (declaration order).
881	*/
882	pNew->u32Version = PDM_DRVINS_VERSION;
883	//pNew->Internal.s.pUp = NULL;
884	//pNew->Internal.s.pDown = NULL;
885	pNew->Internal.s.pLun = pLun;
886	pNew->Internal.s.pDrv = pDrv;
887	pNew->Internal.s.pVM = pVM;
888	//pNew->Internal.s.fDetaching = false;
889	pNew->Internal.s.pCfgHandle = pNode;
890	pNew->pDrvHlp = &g_pdmR3DrvHlp;
891	pNew->pDrvReg = pDrv->pDrvReg;
892	pNew->pCfgHandle = pConfigNode;
893	pNew->iInstance = pDrv->cInstances++;
894	pNew->pUpBase = pBaseInterface;
895	//pNew->pDownBase = NULL;
896	//pNew->IBase.pfnQueryInterface = NULL;
897	pNew->pvInstanceData = &pNew->achInstanceData[0];
898
899	/*
900	* Link with LUN and call the constructor.
901	*/
902	pLun->pTop = pLun->pBottom = pNew;
903	rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle, 0 /fFlags/);
904	if (RT_SUCCESS(rc))
905	{
906	MMR3HeapFree(pszName);
907	*ppBaseInterface = &pNew->IBase;
908	Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
909	pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
910	LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
911
912	return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
913	}
914
915	/*
916	* Free the driver.
917	*/
918	pLun->pTop = pLun->pBottom = NULL;
919	ASMMemFill32(pNew, cb, 0xdeadd0d0);
920	MMR3HeapFree(pNew);
921	pDrv->cInstances--;
922	}
923	else
924	{
925	AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
926	rc = VERR_NO_MEMORY;
927	}
928	}
929	else
930	AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
931	}
932	else if (pDrv)
933	{
934	AssertMsgFailed(("Too many instances of driver '%s', max is %u\n", pszName, pDrv->pDrvReg->cMaxInstances));
935	rc = VERR_PDM_TOO_MANY_DRIVER_INSTANCES;
936	}
937	else
938	{
939	AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
940	rc = VERR_PDM_DRIVER_NOT_FOUND;
941	}
942	MMR3HeapFree(pszName);
943	}
944	else
945	{
946	AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
947	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
948	rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
949	}
950	}
951	else
952	rc = VERR_PDM_NO_ATTACHED_DRIVER;
953
954
955	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
956	return rc;
957	}
958
959
960	/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
961	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
962	{
963	PDMDEV_ASSERT_DEVINS(pDevIns);
964	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
965
966	void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
967
968	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
969	return pv;
970	}
971
972
973	/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
974	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
975	{
976	PDMDEV_ASSERT_DEVINS(pDevIns);
977	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
978
979	void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
980
981	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
982	return pv;
983	}
984
985
986	/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
987	static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
988	{
989	PDMDEV_ASSERT_DEVINS(pDevIns);
990	LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
991
992	MMR3HeapFree(pv);
993
994	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
995	}
996
997
998	/** @copydoc PDMDEVHLPR3::pfnVMSetError */
999	static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
1000	{
1001	PDMDEV_ASSERT_DEVINS(pDevIns);
1002	va_list args;
1003	va_start(args, pszFormat);
1004	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
1005	va_end(args);
1006	return rc;
1007	}
1008
1009
1010	/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
1011	static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
1012	{
1013	PDMDEV_ASSERT_DEVINS(pDevIns);
1014	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
1015	return rc;
1016	}
1017
1018
1019	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
1020	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, ...)
1021	{
1022	PDMDEV_ASSERT_DEVINS(pDevIns);
1023	va_list args;
1024	va_start(args, pszFormat);
1025	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
1026	va_end(args);
1027	return rc;
1028	}
1029
1030
1031	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
1032	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, va_list va)
1033	{
1034	PDMDEV_ASSERT_DEVINS(pDevIns);
1035	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
1036	return rc;
1037	}
1038
1039
1040	/** @copydoc PDMDEVHLPR3::pfnVMState */
1041	static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
1042	{
1043	PDMDEV_ASSERT_DEVINS(pDevIns);
1044
1045	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1046
1047	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1048	enmVMState, VMR3GetStateName(enmVMState)));
1049	return enmVMState;
1050	}
1051
1052
1053	/** @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet */
1054	static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
1055	{
1056	PDMDEV_ASSERT_DEVINS(pDevIns);
1057
1058	bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
1059
1060	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1061	fRc));
1062	return fRc;
1063	}
1064
1065
1066	/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
1067	static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1068	{
1069	PDMDEV_ASSERT_DEVINS(pDevIns);
1070	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1071	return true;
1072
1073	char szMsg[100];
1074	RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1075	AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1076	AssertBreakpoint();
1077	return false;
1078	}
1079
1080
1081	/** @copydoc PDMDEVHLPR3::pfnAssertOther */
1082	static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1083	{
1084	PDMDEV_ASSERT_DEVINS(pDevIns);
1085	if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1086	return true;
1087
1088	char szMsg[100];
1089	RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1090	AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1091	AssertBreakpoint();
1092	return false;
1093	}
1094
1095
1096	/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
1097	static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction, const char *pszFormat, va_list args)
1098	{
1099	PDMDEV_ASSERT_DEVINS(pDevIns);
1100	#ifdef LOG_ENABLED
1101	va_list va2;
1102	va_copy(va2, args);
1103	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1104	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1105	va_end(va2);
1106	#endif
1107
1108	PVM pVM = pDevIns->Internal.s.pVMR3;
1109	VM_ASSERT_EMT(pVM);
1110	int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1111
1112	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1113	return rc;
1114	}
1115
1116
1117	/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1118	static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char pszName, const char pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1119	{
1120	PDMDEV_ASSERT_DEVINS(pDevIns);
1121	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1122	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1123
1124	PVM pVM = pDevIns->Internal.s.pVMR3;
1125	VM_ASSERT_EMT(pVM);
1126	int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1127
1128	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1129	return rc;
1130	}
1131
1132
1133	/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1134	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void pvSample, STAMTYPE enmType, const char pszName, STAMUNIT enmUnit, const char *pszDesc)
1135	{
1136	PDMDEV_ASSERT_DEVINS(pDevIns);
1137	PVM pVM = pDevIns->Internal.s.pVMR3;
1138	VM_ASSERT_EMT(pVM);
1139
1140	STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1141	NOREF(pVM);
1142	}
1143
1144
1145
1146	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1147	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1148	STAMUNIT enmUnit, const char pszDesc, const char pszName, ...)
1149	{
1150	PDMDEV_ASSERT_DEVINS(pDevIns);
1151	PVM pVM = pDevIns->Internal.s.pVMR3;
1152	VM_ASSERT_EMT(pVM);
1153
1154	va_list args;
1155	va_start(args, pszName);
1156	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1157	va_end(args);
1158	AssertRC(rc);
1159
1160	NOREF(pVM);
1161	}
1162
1163
1164	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1165	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1166	STAMUNIT enmUnit, const char pszDesc, const char pszName, va_list args)
1167	{
1168	PDMDEV_ASSERT_DEVINS(pDevIns);
1169	PVM pVM = pDevIns->Internal.s.pVMR3;
1170	VM_ASSERT_EMT(pVM);
1171
1172	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1173	AssertRC(rc);
1174
1175	NOREF(pVM);
1176	}
1177
1178
1179	/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1180	static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1181	{
1182	PDMDEV_ASSERT_DEVINS(pDevIns);
1183	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1184	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1185	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1186	pRtcReg->pfnWrite, ppRtcHlp));
1187
1188	/*
1189	* Validate input.
1190	*/
1191	if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1192	{
1193	AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1194	PDM_RTCREG_VERSION));
1195	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1196	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1197	return VERR_INVALID_PARAMETER;
1198	}
1199	if ( !pRtcReg->pfnWrite
1200	\|\| !pRtcReg->pfnRead)
1201	{
1202	Assert(pRtcReg->pfnWrite);
1203	Assert(pRtcReg->pfnRead);
1204	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1205	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1206	return VERR_INVALID_PARAMETER;
1207	}
1208
1209	if (!ppRtcHlp)
1210	{
1211	Assert(ppRtcHlp);
1212	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1213	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1214	return VERR_INVALID_PARAMETER;
1215	}
1216
1217	/*
1218	* Only one DMA device.
1219	*/
1220	PVM pVM = pDevIns->Internal.s.pVMR3;
1221	if (pVM->pdm.s.pRtc)
1222	{
1223	AssertMsgFailed(("Only one RTC device is supported!\n"));
1224	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1225	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1226	return VERR_INVALID_PARAMETER;
1227	}
1228
1229	/*
1230	* Allocate and initialize pci bus structure.
1231	*/
1232	int rc = VINF_SUCCESS;
1233	PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1234	if (pRtc)
1235	{
1236	pRtc->pDevIns = pDevIns;
1237	pRtc->Reg = *pRtcReg;
1238	pVM->pdm.s.pRtc = pRtc;
1239
1240	/* set the helper pointer. */
1241	*ppRtcHlp = &g_pdmR3DevRtcHlp;
1242	Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1243	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1244	}
1245	else
1246	rc = VERR_NO_MEMORY;
1247
1248	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1249	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1250	return rc;
1251	}
1252
1253
1254	/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1255	static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1256	PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char pszName, PPDMQUEUE ppQueue)
1257	{
1258	PDMDEV_ASSERT_DEVINS(pDevIns);
1259	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1260	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1261
1262	PVM pVM = pDevIns->Internal.s.pVMR3;
1263	VM_ASSERT_EMT(pVM);
1264
1265	if (pDevIns->iInstance > 0)
1266	{
1267	pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1268	AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1269	}
1270
1271	int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1272
1273	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, ppQueue));
1274	return rc;
1275	}
1276
1277
1278	/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1279	static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1280	{
1281	PDMDEV_ASSERT_DEVINS(pDevIns);
1282	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1283	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1284
1285	PVM pVM = pDevIns->Internal.s.pVMR3;
1286	VM_ASSERT_EMT(pVM);
1287	int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1288
1289	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1290	return rc;
1291	}
1292
1293
1294	/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1295	static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1296	{
1297	PDMDEV_ASSERT_DEVINS(pDevIns);
1298	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1299	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1300
1301	pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1302
1303	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1304	return pTime;
1305	}
1306
1307
1308	/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1309	static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1310	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1311	{
1312	PDMDEV_ASSERT_DEVINS(pDevIns);
1313	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1314	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1315	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1316
1317	int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1318
1319	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1320	rc, *ppThread));
1321	return rc;
1322	}
1323
1324
1325	/** @copydoc PDMDEVHLPR3::pfnGetVM */
1326	static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1327	{
1328	PDMDEV_ASSERT_DEVINS(pDevIns);
1329	LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1330	return pDevIns->Internal.s.pVMR3;
1331	}
1332
1333
1334	/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
1335	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1336	{
1337	PDMDEV_ASSERT_DEVINS(pDevIns);
1338	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1339	LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1340	return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1341	}
1342
1343
1344	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1345	static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1346	{
1347	PDMDEV_ASSERT_DEVINS(pDevIns);
1348	PVM pVM = pDevIns->Internal.s.pVMR3;
1349	VM_ASSERT_EMT(pVM);
1350	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1351	".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1352	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1353	pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1354	pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1355
1356	/*
1357	* Validate the structure.
1358	*/
1359	if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1360	{
1361	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1362	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1363	return VERR_INVALID_PARAMETER;
1364	}
1365	if ( !pPciBusReg->pfnRegisterR3
1366	\|\| !pPciBusReg->pfnIORegionRegisterR3
1367	\|\| !pPciBusReg->pfnSetIrqR3
1368	\|\| !pPciBusReg->pfnSaveExecR3
1369	\|\| !pPciBusReg->pfnLoadExecR3
1370	\|\| (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1371	{
1372	Assert(pPciBusReg->pfnRegisterR3);
1373	Assert(pPciBusReg->pfnIORegionRegisterR3);
1374	Assert(pPciBusReg->pfnSetIrqR3);
1375	Assert(pPciBusReg->pfnSaveExecR3);
1376	Assert(pPciBusReg->pfnLoadExecR3);
1377	Assert(pPciBusReg->pfnFakePCIBIOSR3);
1378	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1379	return VERR_INVALID_PARAMETER;
1380	}
1381	if ( pPciBusReg->pszSetIrqRC
1382	&& !VALID_PTR(pPciBusReg->pszSetIrqRC))
1383	{
1384	Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1385	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1386	return VERR_INVALID_PARAMETER;
1387	}
1388	if ( pPciBusReg->pszSetIrqR0
1389	&& !VALID_PTR(pPciBusReg->pszSetIrqR0))
1390	{
1391	Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1392	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1393	return VERR_INVALID_PARAMETER;
1394	}
1395	if (!ppPciHlpR3)
1396	{
1397	Assert(ppPciHlpR3);
1398	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1399	return VERR_INVALID_PARAMETER;
1400	}
1401
1402	/*
1403	* Find free PCI bus entry.
1404	*/
1405	unsigned iBus = 0;
1406	for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1407	if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1408	break;
1409	if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1410	{
1411	AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1412	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1413	return VERR_INVALID_PARAMETER;
1414	}
1415	PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1416
1417	/*
1418	* Resolve and init the RC bits.
1419	*/
1420	if (pPciBusReg->pszSetIrqRC)
1421	{
1422	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1423	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1424	if (RT_FAILURE(rc))
1425	{
1426	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1427	return rc;
1428	}
1429	pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1430	}
1431	else
1432	{
1433	pPciBus->pfnSetIrqRC = 0;
1434	pPciBus->pDevInsRC = 0;
1435	}
1436
1437	/*
1438	* Resolve and init the R0 bits.
1439	*/
1440	if (pPciBusReg->pszSetIrqR0)
1441	{
1442	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1443	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1444	if (RT_FAILURE(rc))
1445	{
1446	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1447	return rc;
1448	}
1449	pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1450	}
1451	else
1452	{
1453	pPciBus->pfnSetIrqR0 = 0;
1454	pPciBus->pDevInsR0 = 0;
1455	}
1456
1457	/*
1458	* Init the R3 bits.
1459	*/
1460	pPciBus->iBus = iBus;
1461	pPciBus->pDevInsR3 = pDevIns;
1462	pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1463	pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1464	pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1465	pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1466	pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1467	pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1468	pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1469
1470	Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1471
1472	/* set the helper pointer and return. */
1473	*ppPciHlpR3 = &g_pdmR3DevPciHlp;
1474	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1475	return VINF_SUCCESS;
1476	}
1477
1478
1479	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1480	static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1481	{
1482	PDMDEV_ASSERT_DEVINS(pDevIns);
1483	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1484	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1485	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1486	pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1487	pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1488	ppPicHlpR3));
1489
1490	/*
1491	* Validate input.
1492	*/
1493	if (pPicReg->u32Version != PDM_PICREG_VERSION)
1494	{
1495	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1496	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1497	return VERR_INVALID_PARAMETER;
1498	}
1499	if ( !pPicReg->pfnSetIrqR3
1500	\|\| !pPicReg->pfnGetInterruptR3)
1501	{
1502	Assert(pPicReg->pfnSetIrqR3);
1503	Assert(pPicReg->pfnGetInterruptR3);
1504	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1505	return VERR_INVALID_PARAMETER;
1506	}
1507	if ( ( pPicReg->pszSetIrqRC
1508	\|\| pPicReg->pszGetInterruptRC)
1509	&& ( !VALID_PTR(pPicReg->pszSetIrqRC)
1510	\|\| !VALID_PTR(pPicReg->pszGetInterruptRC))
1511	)
1512	{
1513	Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1514	Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1515	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1516	return VERR_INVALID_PARAMETER;
1517	}
1518	if ( pPicReg->pszSetIrqRC
1519	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1520	{
1521	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1522	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1523	return VERR_INVALID_PARAMETER;
1524	}
1525	if ( pPicReg->pszSetIrqR0
1526	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1527	{
1528	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1529	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1530	return VERR_INVALID_PARAMETER;
1531	}
1532	if (!ppPicHlpR3)
1533	{
1534	Assert(ppPicHlpR3);
1535	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1536	return VERR_INVALID_PARAMETER;
1537	}
1538
1539	/*
1540	* Only one PIC device.
1541	*/
1542	PVM pVM = pDevIns->Internal.s.pVMR3;
1543	if (pVM->pdm.s.Pic.pDevInsR3)
1544	{
1545	AssertMsgFailed(("Only one pic device is supported!\n"));
1546	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1547	return VERR_INVALID_PARAMETER;
1548	}
1549
1550	/*
1551	* RC stuff.
1552	*/
1553	if (pPicReg->pszSetIrqRC)
1554	{
1555	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1556	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1557	if (RT_SUCCESS(rc))
1558	{
1559	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1560	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1561	}
1562	if (RT_FAILURE(rc))
1563	{
1564	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1565	return rc;
1566	}
1567	pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1568	}
1569	else
1570	{
1571	pVM->pdm.s.Pic.pDevInsRC = 0;
1572	pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1573	pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1574	}
1575
1576	/*
1577	* R0 stuff.
1578	*/
1579	if (pPicReg->pszSetIrqR0)
1580	{
1581	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1582	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1583	if (RT_SUCCESS(rc))
1584	{
1585	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1586	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1587	}
1588	if (RT_FAILURE(rc))
1589	{
1590	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1591	return rc;
1592	}
1593	pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1594	Assert(pVM->pdm.s.Pic.pDevInsR0);
1595	}
1596	else
1597	{
1598	pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1599	pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1600	pVM->pdm.s.Pic.pDevInsR0 = 0;
1601	}
1602
1603	/*
1604	* R3 stuff.
1605	*/
1606	pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1607	pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1608	pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1609	Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1610
1611	/* set the helper pointer and return. */
1612	*ppPicHlpR3 = &g_pdmR3DevPicHlp;
1613	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1614	return VINF_SUCCESS;
1615	}
1616
1617
1618	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1619	static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1620	{
1621	PDMDEV_ASSERT_DEVINS(pDevIns);
1622	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1623	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1624	".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1625	".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
1626	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1627	pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
1628	pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1629	pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1630	pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
1631
1632	/*
1633	* Validate input.
1634	*/
1635	if (pApicReg->u32Version != PDM_APICREG_VERSION)
1636	{
1637	AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1638	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1639	return VERR_INVALID_PARAMETER;
1640	}
1641	if ( !pApicReg->pfnGetInterruptR3
1642	\|\| !pApicReg->pfnHasPendingIrqR3
1643	\|\| !pApicReg->pfnSetBaseR3
1644	\|\| !pApicReg->pfnGetBaseR3
1645	\|\| !pApicReg->pfnSetTPRR3
1646	\|\| !pApicReg->pfnGetTPRR3
1647	\|\| !pApicReg->pfnWriteMSRR3
1648	\|\| !pApicReg->pfnReadMSRR3
1649	\|\| !pApicReg->pfnBusDeliverR3
1650	\|\| !pApicReg->pfnLocalInterruptR3)
1651	{
1652	Assert(pApicReg->pfnGetInterruptR3);
1653	Assert(pApicReg->pfnHasPendingIrqR3);
1654	Assert(pApicReg->pfnSetBaseR3);
1655	Assert(pApicReg->pfnGetBaseR3);
1656	Assert(pApicReg->pfnSetTPRR3);
1657	Assert(pApicReg->pfnGetTPRR3);
1658	Assert(pApicReg->pfnWriteMSRR3);
1659	Assert(pApicReg->pfnReadMSRR3);
1660	Assert(pApicReg->pfnBusDeliverR3);
1661	Assert(pApicReg->pfnLocalInterruptR3);
1662	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1663	return VERR_INVALID_PARAMETER;
1664	}
1665	if ( ( pApicReg->pszGetInterruptRC
1666	\|\| pApicReg->pszHasPendingIrqRC
1667	\|\| pApicReg->pszSetBaseRC
1668	\|\| pApicReg->pszGetBaseRC
1669	\|\| pApicReg->pszSetTPRRC
1670	\|\| pApicReg->pszGetTPRRC
1671	\|\| pApicReg->pszWriteMSRRC
1672	\|\| pApicReg->pszReadMSRRC
1673	\|\| pApicReg->pszBusDeliverRC
1674	\|\| pApicReg->pszLocalInterruptRC)
1675	&& ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1676	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1677	\|\| !VALID_PTR(pApicReg->pszSetBaseRC)
1678	\|\| !VALID_PTR(pApicReg->pszGetBaseRC)
1679	\|\| !VALID_PTR(pApicReg->pszSetTPRRC)
1680	\|\| !VALID_PTR(pApicReg->pszGetTPRRC)
1681	\|\| !VALID_PTR(pApicReg->pszWriteMSRRC)
1682	\|\| !VALID_PTR(pApicReg->pszReadMSRRC)
1683	\|\| !VALID_PTR(pApicReg->pszBusDeliverRC)
1684	\|\| !VALID_PTR(pApicReg->pszLocalInterruptRC))
1685	)
1686	{
1687	Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1688	Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1689	Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1690	Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1691	Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1692	Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1693	Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1694	Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1695	Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1696	Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
1697	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1698	return VERR_INVALID_PARAMETER;
1699	}
1700	if ( ( pApicReg->pszGetInterruptR0
1701	\|\| pApicReg->pszHasPendingIrqR0
1702	\|\| pApicReg->pszSetBaseR0
1703	\|\| pApicReg->pszGetBaseR0
1704	\|\| pApicReg->pszSetTPRR0
1705	\|\| pApicReg->pszGetTPRR0
1706	\|\| pApicReg->pszWriteMSRR0
1707	\|\| pApicReg->pszReadMSRR0
1708	\|\| pApicReg->pszBusDeliverR0
1709	\|\| pApicReg->pszLocalInterruptR0)
1710	&& ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1711	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1712	\|\| !VALID_PTR(pApicReg->pszSetBaseR0)
1713	\|\| !VALID_PTR(pApicReg->pszGetBaseR0)
1714	\|\| !VALID_PTR(pApicReg->pszSetTPRR0)
1715	\|\| !VALID_PTR(pApicReg->pszGetTPRR0)
1716	\|\| !VALID_PTR(pApicReg->pszReadMSRR0)
1717	\|\| !VALID_PTR(pApicReg->pszWriteMSRR0)
1718	\|\| !VALID_PTR(pApicReg->pszBusDeliverR0)
1719	\|\| !VALID_PTR(pApicReg->pszLocalInterruptR0))
1720	)
1721	{
1722	Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1723	Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1724	Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1725	Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1726	Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1727	Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1728	Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1729	Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1730	Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1731	Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
1732	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1733	return VERR_INVALID_PARAMETER;
1734	}
1735	if (!ppApicHlpR3)
1736	{
1737	Assert(ppApicHlpR3);
1738	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1739	return VERR_INVALID_PARAMETER;
1740	}
1741
1742	/*
1743	* Only one APIC device. On SMP we have single logical device covering all LAPICs,
1744	* as they need to communicate and share state easily.
1745	*/
1746	PVM pVM = pDevIns->Internal.s.pVMR3;
1747	if (pVM->pdm.s.Apic.pDevInsR3)
1748	{
1749	AssertMsgFailed(("Only one apic device is supported!\n"));
1750	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1751	return VERR_INVALID_PARAMETER;
1752	}
1753
1754	/*
1755	* Resolve & initialize the RC bits.
1756	*/
1757	if (pApicReg->pszGetInterruptRC)
1758	{
1759	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1760	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1761	if (RT_SUCCESS(rc))
1762	{
1763	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1764	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1765	}
1766	if (RT_SUCCESS(rc))
1767	{
1768	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1769	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1770	}
1771	if (RT_SUCCESS(rc))
1772	{
1773	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1774	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1775	}
1776	if (RT_SUCCESS(rc))
1777	{
1778	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1779	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1780	}
1781	if (RT_SUCCESS(rc))
1782	{
1783	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1784	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1785	}
1786	if (RT_SUCCESS(rc))
1787	{
1788	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1789	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1790	}
1791	if (RT_SUCCESS(rc))
1792	{
1793	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1794	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1795	}
1796	if (RT_SUCCESS(rc))
1797	{
1798	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1799	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1800	}
1801	if (RT_SUCCESS(rc))
1802	{
1803	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
1804	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
1805	}
1806	if (RT_FAILURE(rc))
1807	{
1808	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1809	return rc;
1810	}
1811	pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1812	}
1813	else
1814	{
1815	pVM->pdm.s.Apic.pDevInsRC = 0;
1816	pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1817	pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1818	pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1819	pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1820	pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1821	pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1822	pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1823	pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1824	pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1825	pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
1826	}
1827
1828	/*
1829	* Resolve & initialize the R0 bits.
1830	*/
1831	if (pApicReg->pszGetInterruptR0)
1832	{
1833	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1834	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1835	if (RT_SUCCESS(rc))
1836	{
1837	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1838	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1839	}
1840	if (RT_SUCCESS(rc))
1841	{
1842	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1843	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1844	}
1845	if (RT_SUCCESS(rc))
1846	{
1847	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1848	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1849	}
1850	if (RT_SUCCESS(rc))
1851	{
1852	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1853	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1854	}
1855	if (RT_SUCCESS(rc))
1856	{
1857	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1858	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1859	}
1860	if (RT_SUCCESS(rc))
1861	{
1862	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1863	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1864	}
1865	if (RT_SUCCESS(rc))
1866	{
1867	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1868	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1869	}
1870	if (RT_SUCCESS(rc))
1871	{
1872	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1873	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1874	}
1875	if (RT_SUCCESS(rc))
1876	{
1877	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
1878	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
1879	}
1880	if (RT_FAILURE(rc))
1881	{
1882	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1883	return rc;
1884	}
1885	pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1886	Assert(pVM->pdm.s.Apic.pDevInsR0);
1887	}
1888	else
1889	{
1890	pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1891	pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1892	pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1893	pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1894	pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1895	pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1896	pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1897	pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1898	pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1899	pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
1900	pVM->pdm.s.Apic.pDevInsR0 = 0;
1901	}
1902
1903	/*
1904	* Initialize the HC bits.
1905	*/
1906	pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1907	pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1908	pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1909	pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1910	pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1911	pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1912	pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1913	pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1914	pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1915	pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1916	pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
1917	Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1918
1919	/* set the helper pointer and return. */
1920	*ppApicHlpR3 = &g_pdmR3DevApicHlp;
1921	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1922	return VINF_SUCCESS;
1923	}
1924
1925
1926	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1927	static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1928	{
1929	PDMDEV_ASSERT_DEVINS(pDevIns);
1930	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1931	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1932	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1933	pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1934
1935	/*
1936	* Validate input.
1937	*/
1938	if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1939	{
1940	AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1941	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1942	return VERR_INVALID_PARAMETER;
1943	}
1944	if (!pIoApicReg->pfnSetIrqR3)
1945	{
1946	Assert(pIoApicReg->pfnSetIrqR3);
1947	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1948	return VERR_INVALID_PARAMETER;
1949	}
1950	if ( pIoApicReg->pszSetIrqRC
1951	&& !VALID_PTR(pIoApicReg->pszSetIrqRC))
1952	{
1953	Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1954	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1955	return VERR_INVALID_PARAMETER;
1956	}
1957	if ( pIoApicReg->pszSetIrqR0
1958	&& !VALID_PTR(pIoApicReg->pszSetIrqR0))
1959	{
1960	Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1961	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1962	return VERR_INVALID_PARAMETER;
1963	}
1964	if (!ppIoApicHlpR3)
1965	{
1966	Assert(ppIoApicHlpR3);
1967	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1968	return VERR_INVALID_PARAMETER;
1969	}
1970
1971	/*
1972	* The I/O APIC requires the APIC to be present (hacks++).
1973	* If the I/O APIC does GC stuff so must the APIC.
1974	*/
1975	PVM pVM = pDevIns->Internal.s.pVMR3;
1976	if (!pVM->pdm.s.Apic.pDevInsR3)
1977	{
1978	AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1979	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1980	return VERR_INVALID_PARAMETER;
1981	}
1982	if ( pIoApicReg->pszSetIrqRC
1983	&& !pVM->pdm.s.Apic.pDevInsRC)
1984	{
1985	AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1986	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1987	return VERR_INVALID_PARAMETER;
1988	}
1989
1990	/*
1991	* Only one I/O APIC device.
1992	*/
1993	if (pVM->pdm.s.IoApic.pDevInsR3)
1994	{
1995	AssertMsgFailed(("Only one ioapic device is supported!\n"));
1996	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1997	return VERR_INVALID_PARAMETER;
1998	}
1999
2000	/*
2001	* Resolve & initialize the GC bits.
2002	*/
2003	if (pIoApicReg->pszSetIrqRC)
2004	{
2005	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2006	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2007	if (RT_FAILURE(rc))
2008	{
2009	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2010	return rc;
2011	}
2012	pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2013	}
2014	else
2015	{
2016	pVM->pdm.s.IoApic.pDevInsRC = 0;
2017	pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2018	}
2019
2020	/*
2021	* Resolve & initialize the R0 bits.
2022	*/
2023	if (pIoApicReg->pszSetIrqR0)
2024	{
2025	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2026	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2027	if (RT_FAILURE(rc))
2028	{
2029	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2030	return rc;
2031	}
2032	pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2033	Assert(pVM->pdm.s.IoApic.pDevInsR0);
2034	}
2035	else
2036	{
2037	pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2038	pVM->pdm.s.IoApic.pDevInsR0 = 0;
2039	}
2040
2041	/*
2042	* Initialize the R3 bits.
2043	*/
2044	pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2045	pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2046	Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2047
2048	/* set the helper pointer and return. */
2049	*ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2050	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2051	return VINF_SUCCESS;
2052	}
2053
2054
2055	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2056	static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2057	{
2058	PDMDEV_ASSERT_DEVINS(pDevIns);
2059	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2060	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2061	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2062	pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2063
2064	/*
2065	* Validate input.
2066	*/
2067	if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2068	{
2069	AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2070	PDM_DMACREG_VERSION));
2071	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2072	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2073	return VERR_INVALID_PARAMETER;
2074	}
2075	if ( !pDmacReg->pfnRun
2076	\|\| !pDmacReg->pfnRegister
2077	\|\| !pDmacReg->pfnReadMemory
2078	\|\| !pDmacReg->pfnWriteMemory
2079	\|\| !pDmacReg->pfnSetDREQ
2080	\|\| !pDmacReg->pfnGetChannelMode)
2081	{
2082	Assert(pDmacReg->pfnRun);
2083	Assert(pDmacReg->pfnRegister);
2084	Assert(pDmacReg->pfnReadMemory);
2085	Assert(pDmacReg->pfnWriteMemory);
2086	Assert(pDmacReg->pfnSetDREQ);
2087	Assert(pDmacReg->pfnGetChannelMode);
2088	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2089	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2090	return VERR_INVALID_PARAMETER;
2091	}
2092
2093	if (!ppDmacHlp)
2094	{
2095	Assert(ppDmacHlp);
2096	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2097	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2098	return VERR_INVALID_PARAMETER;
2099	}
2100
2101	/*
2102	* Only one DMA device.
2103	*/
2104	PVM pVM = pDevIns->Internal.s.pVMR3;
2105	if (pVM->pdm.s.pDmac)
2106	{
2107	AssertMsgFailed(("Only one DMA device is supported!\n"));
2108	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2109	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2110	return VERR_INVALID_PARAMETER;
2111	}
2112
2113	/*
2114	* Allocate and initialize pci bus structure.
2115	*/
2116	int rc = VINF_SUCCESS;
2117	PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2118	if (pDmac)
2119	{
2120	pDmac->pDevIns = pDevIns;
2121	pDmac->Reg = *pDmacReg;
2122	pVM->pdm.s.pDmac = pDmac;
2123
2124	/* set the helper pointer. */
2125	*ppDmacHlp = &g_pdmR3DevDmacHlp;
2126	Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2127	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2128	}
2129	else
2130	rc = VERR_NO_MEMORY;
2131
2132	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2133	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2134	return rc;
2135	}
2136
2137
2138	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2139	static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2140	{
2141	PDMDEV_ASSERT_DEVINS(pDevIns);
2142	PVM pVM = pDevIns->Internal.s.pVMR3;
2143	LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2144	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2145
2146	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2147	if (!VM_IS_EMT(pVM))
2148	{
2149	char szNames[128];
2150	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2151	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2152	}
2153	#endif
2154
2155	int rc;
2156	if (VM_IS_EMT(pVM))
2157	rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
2158	else
2159	rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
2160
2161	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2162	return rc;
2163	}
2164
2165
2166	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2167	static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2168	{
2169	PDMDEV_ASSERT_DEVINS(pDevIns);
2170	PVM pVM = pDevIns->Internal.s.pVMR3;
2171	LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2172	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2173
2174	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2175	if (!VM_IS_EMT(pVM))
2176	{
2177	char szNames[128];
2178	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2179	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2180	}
2181	#endif
2182
2183	int rc;
2184	if (VM_IS_EMT(pVM))
2185	rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
2186	else
2187	rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite);
2188
2189	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2190	return rc;
2191	}
2192
2193
2194	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2195	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2196	{
2197	PDMDEV_ASSERT_DEVINS(pDevIns);
2198	PVM pVM = pDevIns->Internal.s.pVMR3;
2199	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2200	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2201	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2202
2203	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2204	if (!VM_IS_EMT(pVM))
2205	{
2206	char szNames[128];
2207	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2208	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2209	}
2210	#endif
2211
2212	int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
2213
2214	Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2215	return rc;
2216	}
2217
2218
2219	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2220	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2221	{
2222	PDMDEV_ASSERT_DEVINS(pDevIns);
2223	PVM pVM = pDevIns->Internal.s.pVMR3;
2224	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2225	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2226	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2227
2228	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2229	if (!VM_IS_EMT(pVM))
2230	{
2231	char szNames[128];
2232	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2233	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2234	}
2235	#endif
2236
2237	int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
2238
2239	Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2240	return rc;
2241	}
2242
2243
2244	/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2245	static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2246	{
2247	PDMDEV_ASSERT_DEVINS(pDevIns);
2248	PVM pVM = pDevIns->Internal.s.pVMR3;
2249	LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
2250	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pLock));
2251
2252	PGMPhysReleasePageMappingLock(pVM, pLock);
2253
2254	Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2255	}
2256
2257
2258	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2259	static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2260	{
2261	PDMDEV_ASSERT_DEVINS(pDevIns);
2262	PVM pVM = pDevIns->Internal.s.pVMR3;
2263	VM_ASSERT_EMT(pVM);
2264	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2265	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2266
2267	PVMCPU pVCpu = VMMGetCpu(pVM);
2268	if (!pVCpu)
2269	return VERR_ACCESS_DENIED;
2270	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2271	/** @todo SMP. */
2272	#endif
2273
2274	int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
2275
2276	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2277
2278	return rc;
2279	}
2280
2281
2282	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2283	static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2284	{
2285	PDMDEV_ASSERT_DEVINS(pDevIns);
2286	PVM pVM = pDevIns->Internal.s.pVMR3;
2287	VM_ASSERT_EMT(pVM);
2288	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2289	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2290
2291	PVMCPU pVCpu = VMMGetCpu(pVM);
2292	if (!pVCpu)
2293	return VERR_ACCESS_DENIED;
2294	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2295	/** @todo SMP. */
2296	#endif
2297
2298	int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
2299
2300	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2301
2302	return rc;
2303	}
2304
2305
2306	/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2307	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2308	{
2309	PDMDEV_ASSERT_DEVINS(pDevIns);
2310	PVM pVM = pDevIns->Internal.s.pVMR3;
2311	VM_ASSERT_EMT(pVM);
2312	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2313	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2314
2315	PVMCPU pVCpu = VMMGetCpu(pVM);
2316	if (!pVCpu)
2317	return VERR_ACCESS_DENIED;
2318	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2319	/** @todo SMP. */
2320	#endif
2321
2322	int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
2323
2324	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pGCPhys));
2325
2326	return rc;
2327	}
2328
2329
2330	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2331	static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2332	{
2333	PDMDEV_ASSERT_DEVINS(pDevIns);
2334	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2335
2336	bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
2337
2338	LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2339	return fRc;
2340	}
2341
2342
2343	/** @copydoc PDMDEVHLPR3::pfnA20Set */
2344	static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2345	{
2346	PDMDEV_ASSERT_DEVINS(pDevIns);
2347	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2348	LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2349	PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
2350	}
2351
2352
2353	/** @copydoc PDMDEVHLPR3::pfnVMReset */
2354	static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2355	{
2356	PDMDEV_ASSERT_DEVINS(pDevIns);
2357	PVM pVM = pDevIns->Internal.s.pVMR3;
2358	VM_ASSERT_EMT(pVM);
2359	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2360	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2361
2362	/*
2363	* We postpone this operation because we're likely to be inside a I/O instruction
2364	* and the EIP will be updated when we return.
2365	* We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2366	*/
2367	bool fHaltOnReset;
2368	int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2369	if (RT_SUCCESS(rc) && fHaltOnReset)
2370	{
2371	Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2372	rc = VINF_EM_HALT;
2373	}
2374	else
2375	{
2376	VM_FF_SET(pVM, VM_FF_RESET);
2377	rc = VINF_EM_RESET;
2378	}
2379
2380	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2381	return rc;
2382	}
2383
2384
2385	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2386	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2387	{
2388	int rc;
2389	PDMDEV_ASSERT_DEVINS(pDevIns);
2390	PVM pVM = pDevIns->Internal.s.pVMR3;
2391	VM_ASSERT_EMT(pVM);
2392	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2393	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2394
2395	if (pVM->cCpus > 1)
2396	{
2397	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2398	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
2399	AssertRC(rc);
2400	rc = VINF_EM_SUSPEND;
2401	}
2402	else
2403	rc = VMR3Suspend(pVM);
2404
2405	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2406	return rc;
2407	}
2408
2409
2410	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2411	static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2412	{
2413	int rc;
2414	PDMDEV_ASSERT_DEVINS(pDevIns);
2415	PVM pVM = pDevIns->Internal.s.pVMR3;
2416	VM_ASSERT_EMT(pVM);
2417	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2418	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2419
2420	if (pVM->cCpus > 1)
2421	{
2422	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2423	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
2424	AssertRC(rc);
2425	/* Set the VCPU state to stopped here as well to make sure no
2426	* inconsistency with the EM state occurs.
2427	*/
2428	VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
2429	rc = VINF_EM_OFF;
2430	}
2431	else
2432	rc = VMR3PowerOff(pVM);
2433
2434	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2435	return rc;
2436	}
2437
2438	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2439	static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2440	{
2441	PDMDEV_ASSERT_DEVINS(pDevIns);
2442	PVM pVM = pDevIns->Internal.s.pVMR3;
2443	VM_ASSERT_EMT(pVM);
2444	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2445	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2446	int rc = VINF_SUCCESS;
2447	if (pVM->pdm.s.pDmac)
2448	pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2449	else
2450	{
2451	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2452	rc = VERR_PDM_NO_DMAC_INSTANCE;
2453	}
2454	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2455	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2456	return rc;
2457	}
2458
2459	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2460	static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
2461	{
2462	PDMDEV_ASSERT_DEVINS(pDevIns);
2463	PVM pVM = pDevIns->Internal.s.pVMR3;
2464	VM_ASSERT_EMT(pVM);
2465	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2466	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2467	int rc = VINF_SUCCESS;
2468	if (pVM->pdm.s.pDmac)
2469	{
2470	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2471	if (pcbRead)
2472	*pcbRead = cb;
2473	}
2474	else
2475	{
2476	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2477	rc = VERR_PDM_NO_DMAC_INSTANCE;
2478	}
2479	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2480	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2481	return rc;
2482	}
2483
2484	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2485	static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
2486	{
2487	PDMDEV_ASSERT_DEVINS(pDevIns);
2488	PVM pVM = pDevIns->Internal.s.pVMR3;
2489	VM_ASSERT_EMT(pVM);
2490	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2491	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2492	int rc = VINF_SUCCESS;
2493	if (pVM->pdm.s.pDmac)
2494	{
2495	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2496	if (pcbWritten)
2497	*pcbWritten = cb;
2498	}
2499	else
2500	{
2501	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2502	rc = VERR_PDM_NO_DMAC_INSTANCE;
2503	}
2504	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2505	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2506	return rc;
2507	}
2508
2509	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2510	static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2511	{
2512	PDMDEV_ASSERT_DEVINS(pDevIns);
2513	PVM pVM = pDevIns->Internal.s.pVMR3;
2514	VM_ASSERT_EMT(pVM);
2515	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2516	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2517	int rc = VINF_SUCCESS;
2518	if (pVM->pdm.s.pDmac)
2519	pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2520	else
2521	{
2522	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2523	rc = VERR_PDM_NO_DMAC_INSTANCE;
2524	}
2525	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2526	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2527	return rc;
2528	}
2529
2530	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2531	static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2532	{
2533	PDMDEV_ASSERT_DEVINS(pDevIns);
2534	PVM pVM = pDevIns->Internal.s.pVMR3;
2535	VM_ASSERT_EMT(pVM);
2536	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2537	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2538	uint8_t u8Mode;
2539	if (pVM->pdm.s.pDmac)
2540	u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2541	else
2542	{
2543	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2544	u8Mode = 3 << 2 /* illegal mode type */;
2545	}
2546	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2547	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2548	return u8Mode;
2549	}
2550
2551	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2552	static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2553	{
2554	PDMDEV_ASSERT_DEVINS(pDevIns);
2555	PVM pVM = pDevIns->Internal.s.pVMR3;
2556	VM_ASSERT_EMT(pVM);
2557	LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2558	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2559
2560	AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2561	VM_FF_SET(pVM, VM_FF_PDM_DMA);
2562	REMR3NotifyDmaPending(pVM);
2563	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
2564	}
2565
2566
2567	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2568	static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2569	{
2570	PDMDEV_ASSERT_DEVINS(pDevIns);
2571	PVM pVM = pDevIns->Internal.s.pVMR3;
2572	VM_ASSERT_EMT(pVM);
2573
2574	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2575	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2576	int rc;
2577	if (pVM->pdm.s.pRtc)
2578	rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2579	else
2580	rc = VERR_PDM_NO_RTC_INSTANCE;
2581
2582	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2583	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2584	return rc;
2585	}
2586
2587
2588	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2589	static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2590	{
2591	PDMDEV_ASSERT_DEVINS(pDevIns);
2592	PVM pVM = pDevIns->Internal.s.pVMR3;
2593	VM_ASSERT_EMT(pVM);
2594
2595	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2596	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2597	int rc;
2598	if (pVM->pdm.s.pRtc)
2599	rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2600	else
2601	rc = VERR_PDM_NO_RTC_INSTANCE;
2602
2603	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2604	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2605	return rc;
2606	}
2607
2608
2609	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2610	static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2611	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
2612	{
2613	PDMDEV_ASSERT_DEVINS(pDevIns);
2614	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2615
2616	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2617	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2618	AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2619
2620	CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
2621
2622	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - pEax=%#x pEbx=%#x pEcx=%#x pEdx=%#x\n",
2623	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pEax, pEbx, pEcx, pEdx));
2624	}
2625
2626
2627	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2628	static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
2629	{
2630	PDMDEV_ASSERT_DEVINS(pDevIns);
2631	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
2632	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
2633
2634	int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
2635
2636	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2637	return rc;
2638	}
2639
2640
2641	/**
2642	* @copydoc PDMDEVHLPR3::pfnMMIO2Register
2643	*/
2644	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
2645	{
2646	PDMDEV_ASSERT_DEVINS(pDevIns);
2647	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2648	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2649	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2650
2651	/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
2652	* use a real string cache. */
2653	int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2654
2655	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2656	return rc;
2657	}
2658
2659
2660	/**
2661	* @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2662	*/
2663	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2664	{
2665	PDMDEV_ASSERT_DEVINS(pDevIns);
2666	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2667	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=#x\n",
2668	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2669
2670	AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2671
2672	int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2673
2674	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2675	return rc;
2676	}
2677
2678
2679	/**
2680	* @copydoc PDMDEVHLPR3::pfnMMIO2Map
2681	*/
2682	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2683	{
2684	PDMDEV_ASSERT_DEVINS(pDevIns);
2685	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2686	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2687	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2688
2689	int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2690
2691	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2692	return rc;
2693	}
2694
2695
2696	/**
2697	* @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2698	*/
2699	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2700	{
2701	PDMDEV_ASSERT_DEVINS(pDevIns);
2702	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2703	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2704	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2705
2706	int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2707
2708	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2709	return rc;
2710	}
2711
2712
2713	/**
2714	* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2715	*/
2716	static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2717	const char *pszDesc, PRTRCPTR pRCPtr)
2718	{
2719	PDMDEV_ASSERT_DEVINS(pDevIns);
2720	PVM pVM = pDevIns->Internal.s.pVMR3;
2721	VM_ASSERT_EMT(pVM);
2722	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2723	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2724
2725	if (pDevIns->iInstance > 0)
2726	{
2727	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
2728	if (pszDesc2)
2729	pszDesc = pszDesc2;
2730	}
2731
2732	int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2733
2734	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pRCPtr));
2735	return rc;
2736	}
2737
2738
2739	/**
2740	* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2741	*/
2742	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2743	const char *pszDesc, PRTR0PTR pR0Ptr)
2744	{
2745	PDMDEV_ASSERT_DEVINS(pDevIns);
2746	PVM pVM = pDevIns->Internal.s.pVMR3;
2747	VM_ASSERT_EMT(pVM);
2748	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2749	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2750
2751	if (pDevIns->iInstance > 0)
2752	{
2753	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
2754	if (pszDesc2)
2755	pszDesc = pszDesc2;
2756	}
2757
2758	int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2759
2760	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pR0Ptr));
2761	return rc;
2762	}
2763
2764
2765	/**
2766	* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2767	*/
2768	static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2769	{
2770	PDMDEV_ASSERT_DEVINS(pDevIns);
2771	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2772
2773	int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2774	return rc;
2775	}
2776
2777
2778	/**
2779	* @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2780	*/
2781	static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2782	{
2783	PDMDEV_ASSERT_DEVINS(pDevIns);
2784	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2785
2786	int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2787	return rc;
2788	}
2789
2790
2791	/**
2792	* The device helper structure for trusted devices.
2793	*/
2794	const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2795	{
2796	PDM_DEVHLP_VERSION,
2797	pdmR3DevHlp_IOPortRegister,
2798	pdmR3DevHlp_IOPortRegisterGC,
2799	pdmR3DevHlp_IOPortRegisterR0,
2800	pdmR3DevHlp_IOPortDeregister,
2801	pdmR3DevHlp_MMIORegister,
2802	pdmR3DevHlp_MMIORegisterGC,
2803	pdmR3DevHlp_MMIORegisterR0,
2804	pdmR3DevHlp_MMIODeregister,
2805	pdmR3DevHlp_ROMRegister,
2806	pdmR3DevHlp_SSMRegister,
2807	pdmR3DevHlp_TMTimerCreate,
2808	pdmR3DevHlp_PCIRegister,
2809	pdmR3DevHlp_PCIIORegionRegister,
2810	pdmR3DevHlp_PCISetConfigCallbacks,
2811	pdmR3DevHlp_PCISetIrq,
2812	pdmR3DevHlp_PCISetIrqNoWait,
2813	pdmR3DevHlp_ISASetIrq,
2814	pdmR3DevHlp_ISASetIrqNoWait,
2815	pdmR3DevHlp_DriverAttach,
2816	pdmR3DevHlp_MMHeapAlloc,
2817	pdmR3DevHlp_MMHeapAllocZ,
2818	pdmR3DevHlp_MMHeapFree,
2819	pdmR3DevHlp_VMSetError,
2820	pdmR3DevHlp_VMSetErrorV,
2821	pdmR3DevHlp_VMSetRuntimeError,
2822	pdmR3DevHlp_VMSetRuntimeErrorV,
2823	pdmR3DevHlp_VMState,
2824	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
2825	pdmR3DevHlp_AssertEMT,
2826	pdmR3DevHlp_AssertOther,
2827	pdmR3DevHlp_DBGFStopV,
2828	pdmR3DevHlp_DBGFInfoRegister,
2829	pdmR3DevHlp_STAMRegister,
2830	pdmR3DevHlp_STAMRegisterF,
2831	pdmR3DevHlp_STAMRegisterV,
2832	pdmR3DevHlp_RTCRegister,
2833	pdmR3DevHlp_PDMQueueCreate,
2834	pdmR3DevHlp_CritSectInit,
2835	pdmR3DevHlp_UTCNow,
2836	pdmR3DevHlp_PDMThreadCreate,
2837	pdmR3DevHlp_PhysGCPtr2GCPhys,
2838	0,
2839	0,
2840	0,
2841	0,
2842	0,
2843	0,
2844	0,
2845	0,
2846	0,
2847	0,
2848	pdmR3DevHlp_GetVM,
2849	pdmR3DevHlp_PCIBusRegister,
2850	pdmR3DevHlp_PICRegister,
2851	pdmR3DevHlp_APICRegister,
2852	pdmR3DevHlp_IOAPICRegister,
2853	pdmR3DevHlp_DMACRegister,
2854	pdmR3DevHlp_PhysRead,
2855	pdmR3DevHlp_PhysWrite,
2856	pdmR3DevHlp_PhysGCPhys2CCPtr,
2857	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2858	pdmR3DevHlp_PhysReleasePageMappingLock,
2859	pdmR3DevHlp_PhysReadGCVirt,
2860	pdmR3DevHlp_PhysWriteGCVirt,
2861	pdmR3DevHlp_A20IsEnabled,
2862	pdmR3DevHlp_A20Set,
2863	pdmR3DevHlp_VMReset,
2864	pdmR3DevHlp_VMSuspend,
2865	pdmR3DevHlp_VMPowerOff,
2866	pdmR3DevHlp_DMARegister,
2867	pdmR3DevHlp_DMAReadMemory,
2868	pdmR3DevHlp_DMAWriteMemory,
2869	pdmR3DevHlp_DMASetDREQ,
2870	pdmR3DevHlp_DMAGetChannelMode,
2871	pdmR3DevHlp_DMASchedule,
2872	pdmR3DevHlp_CMOSWrite,
2873	pdmR3DevHlp_CMOSRead,
2874	pdmR3DevHlp_GetCpuId,
2875	pdmR3DevHlp_ROMProtectShadow,
2876	pdmR3DevHlp_MMIO2Register,
2877	pdmR3DevHlp_MMIO2Deregister,
2878	pdmR3DevHlp_MMIO2Map,
2879	pdmR3DevHlp_MMIO2Unmap,
2880	pdmR3DevHlp_MMHyperMapMMIO2,
2881	pdmR3DevHlp_MMIO2MapKernel,
2882	pdmR3DevHlp_RegisterVMMDevHeap,
2883	pdmR3DevHlp_UnregisterVMMDevHeap,
2884	pdmR3DevHlp_GetVMCPU,
2885	PDM_DEVHLP_VERSION /* the end */
2886	};
2887
2888
2889
2890
2891	/** @copydoc PDMDEVHLPR3::pfnGetVM */
2892	static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2893	{
2894	PDMDEV_ASSERT_DEVINS(pDevIns);
2895	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2896	return NULL;
2897	}
2898
2899
2900	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2901	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2902	{
2903	PDMDEV_ASSERT_DEVINS(pDevIns);
2904	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2905	NOREF(pPciBusReg);
2906	NOREF(ppPciHlpR3);
2907	return VERR_ACCESS_DENIED;
2908	}
2909
2910
2911	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2912	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2913	{
2914	PDMDEV_ASSERT_DEVINS(pDevIns);
2915	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2916	NOREF(pPicReg);
2917	NOREF(ppPicHlpR3);
2918	return VERR_ACCESS_DENIED;
2919	}
2920
2921
2922	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2923	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2924	{
2925	PDMDEV_ASSERT_DEVINS(pDevIns);
2926	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2927	NOREF(pApicReg);
2928	NOREF(ppApicHlpR3);
2929	return VERR_ACCESS_DENIED;
2930	}
2931
2932
2933	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2934	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2935	{
2936	PDMDEV_ASSERT_DEVINS(pDevIns);
2937	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2938	NOREF(pIoApicReg);
2939	NOREF(ppIoApicHlpR3);
2940	return VERR_ACCESS_DENIED;
2941	}
2942
2943
2944	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2945	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2946	{
2947	PDMDEV_ASSERT_DEVINS(pDevIns);
2948	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2949	NOREF(pDmacReg);
2950	NOREF(ppDmacHlp);
2951	return VERR_ACCESS_DENIED;
2952	}
2953
2954
2955	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2956	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2957	{
2958	PDMDEV_ASSERT_DEVINS(pDevIns);
2959	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2960	NOREF(GCPhys);
2961	NOREF(pvBuf);
2962	NOREF(cbRead);
2963	return VERR_ACCESS_DENIED;
2964	}
2965
2966
2967	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2968	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2969	{
2970	PDMDEV_ASSERT_DEVINS(pDevIns);
2971	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2972	NOREF(GCPhys);
2973	NOREF(pvBuf);
2974	NOREF(cbWrite);
2975	return VERR_ACCESS_DENIED;
2976	}
2977
2978
2979	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2980	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2981	{
2982	PDMDEV_ASSERT_DEVINS(pDevIns);
2983	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2984	NOREF(GCPhys);
2985	NOREF(fFlags);
2986	NOREF(ppv);
2987	NOREF(pLock);
2988	return VERR_ACCESS_DENIED;
2989	}
2990
2991
2992	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2993	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2994	{
2995	PDMDEV_ASSERT_DEVINS(pDevIns);
2996	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2997	NOREF(GCPhys);
2998	NOREF(fFlags);
2999	NOREF(ppv);
3000	NOREF(pLock);
3001	return VERR_ACCESS_DENIED;
3002	}
3003
3004
3005	/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
3006	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3007	{
3008	PDMDEV_ASSERT_DEVINS(pDevIns);
3009	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3010	NOREF(pLock);
3011	}
3012
3013
3014	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
3015	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3016	{
3017	PDMDEV_ASSERT_DEVINS(pDevIns);
3018	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3019	NOREF(pvDst);
3020	NOREF(GCVirtSrc);
3021	NOREF(cb);
3022	return VERR_ACCESS_DENIED;
3023	}
3024
3025
3026	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
3027	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3028	{
3029	PDMDEV_ASSERT_DEVINS(pDevIns);
3030	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3031	NOREF(GCVirtDst);
3032	NOREF(pvSrc);
3033	NOREF(cb);
3034	return VERR_ACCESS_DENIED;
3035	}
3036
3037
3038	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
3039	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3040	{
3041	PDMDEV_ASSERT_DEVINS(pDevIns);
3042	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3043	return false;
3044	}
3045
3046
3047	/** @copydoc PDMDEVHLPR3::pfnA20Set */
3048	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3049	{
3050	PDMDEV_ASSERT_DEVINS(pDevIns);
3051	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3052	NOREF(fEnable);
3053	}
3054
3055
3056	/** @copydoc PDMDEVHLPR3::pfnVMReset */
3057	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3058	{
3059	PDMDEV_ASSERT_DEVINS(pDevIns);
3060	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3061	return VERR_ACCESS_DENIED;
3062	}
3063
3064
3065	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
3066	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3067	{
3068	PDMDEV_ASSERT_DEVINS(pDevIns);
3069	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3070	return VERR_ACCESS_DENIED;
3071	}
3072
3073
3074	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
3075	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3076	{
3077	PDMDEV_ASSERT_DEVINS(pDevIns);
3078	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3079	return VERR_ACCESS_DENIED;
3080	}
3081
3082	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
3083	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3084	{
3085	PDMDEV_ASSERT_DEVINS(pDevIns);
3086	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3087	return VERR_ACCESS_DENIED;
3088	}
3089
3090
3091	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
3092	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
3093	{
3094	PDMDEV_ASSERT_DEVINS(pDevIns);
3095	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3096	if (pcbRead)
3097	*pcbRead = 0;
3098	return VERR_ACCESS_DENIED;
3099	}
3100
3101
3102	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
3103	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
3104	{
3105	PDMDEV_ASSERT_DEVINS(pDevIns);
3106	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3107	if (pcbWritten)
3108	*pcbWritten = 0;
3109	return VERR_ACCESS_DENIED;
3110	}
3111
3112
3113	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
3114	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3115	{
3116	PDMDEV_ASSERT_DEVINS(pDevIns);
3117	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3118	return VERR_ACCESS_DENIED;
3119	}
3120
3121
3122	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
3123	static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3124	{
3125	PDMDEV_ASSERT_DEVINS(pDevIns);
3126	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3127	return 3 << 2 /* illegal mode type */;
3128	}
3129
3130
3131	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3132	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3133	{
3134	PDMDEV_ASSERT_DEVINS(pDevIns);
3135	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3136	}
3137
3138
3139	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3140	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3141	{
3142	PDMDEV_ASSERT_DEVINS(pDevIns);
3143	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3144	return VERR_ACCESS_DENIED;
3145	}
3146
3147
3148	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3149	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3150	{
3151	PDMDEV_ASSERT_DEVINS(pDevIns);
3152	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3153	return VERR_ACCESS_DENIED;
3154	}
3155
3156
3157	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3158	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3159	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3160	{
3161	PDMDEV_ASSERT_DEVINS(pDevIns);
3162	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3163	}
3164
3165
3166	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3167	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3168	{
3169	PDMDEV_ASSERT_DEVINS(pDevIns);
3170	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3171	return VERR_ACCESS_DENIED;
3172	}
3173
3174
3175	/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3176	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
3177	{
3178	PDMDEV_ASSERT_DEVINS(pDevIns);
3179	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3180	return VERR_ACCESS_DENIED;
3181	}
3182
3183
3184	/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3185	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3186	{
3187	PDMDEV_ASSERT_DEVINS(pDevIns);
3188	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3189	return VERR_ACCESS_DENIED;
3190	}
3191
3192
3193	/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3194	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3195	{
3196	PDMDEV_ASSERT_DEVINS(pDevIns);
3197	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3198	return VERR_ACCESS_DENIED;
3199	}
3200
3201
3202	/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3203	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3204	{
3205	PDMDEV_ASSERT_DEVINS(pDevIns);
3206	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3207	return VERR_ACCESS_DENIED;
3208	}
3209
3210
3211	/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3212	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3213	{
3214	PDMDEV_ASSERT_DEVINS(pDevIns);
3215	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3216	return VERR_ACCESS_DENIED;
3217	}
3218
3219
3220	/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3221	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3222	{
3223	PDMDEV_ASSERT_DEVINS(pDevIns);
3224	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3225	return VERR_ACCESS_DENIED;
3226	}
3227
3228
3229	/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3230	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3231	{
3232	PDMDEV_ASSERT_DEVINS(pDevIns);
3233	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3234	return VERR_ACCESS_DENIED;
3235	}
3236
3237
3238	/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3239	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3240	{
3241	PDMDEV_ASSERT_DEVINS(pDevIns);
3242	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3243	return VERR_ACCESS_DENIED;
3244	}
3245
3246
3247	/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
3248	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3249	{
3250	PDMDEV_ASSERT_DEVINS(pDevIns);
3251	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3252	return NULL;
3253	}
3254
3255
3256	/**
3257	* The device helper structure for non-trusted devices.
3258	*/
3259	const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3260	{
3261	PDM_DEVHLP_VERSION,
3262	pdmR3DevHlp_IOPortRegister,
3263	pdmR3DevHlp_IOPortRegisterGC,
3264	pdmR3DevHlp_IOPortRegisterR0,
3265	pdmR3DevHlp_IOPortDeregister,
3266	pdmR3DevHlp_MMIORegister,
3267	pdmR3DevHlp_MMIORegisterGC,
3268	pdmR3DevHlp_MMIORegisterR0,
3269	pdmR3DevHlp_MMIODeregister,
3270	pdmR3DevHlp_ROMRegister,
3271	pdmR3DevHlp_SSMRegister,
3272	pdmR3DevHlp_TMTimerCreate,
3273	pdmR3DevHlp_PCIRegister,
3274	pdmR3DevHlp_PCIIORegionRegister,
3275	pdmR3DevHlp_PCISetConfigCallbacks,
3276	pdmR3DevHlp_PCISetIrq,
3277	pdmR3DevHlp_PCISetIrqNoWait,
3278	pdmR3DevHlp_ISASetIrq,
3279	pdmR3DevHlp_ISASetIrqNoWait,
3280	pdmR3DevHlp_DriverAttach,
3281	pdmR3DevHlp_MMHeapAlloc,
3282	pdmR3DevHlp_MMHeapAllocZ,
3283	pdmR3DevHlp_MMHeapFree,
3284	pdmR3DevHlp_VMSetError,
3285	pdmR3DevHlp_VMSetErrorV,
3286	pdmR3DevHlp_VMSetRuntimeError,
3287	pdmR3DevHlp_VMSetRuntimeErrorV,
3288	pdmR3DevHlp_VMState,
3289	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3290	pdmR3DevHlp_AssertEMT,
3291	pdmR3DevHlp_AssertOther,
3292	pdmR3DevHlp_DBGFStopV,
3293	pdmR3DevHlp_DBGFInfoRegister,
3294	pdmR3DevHlp_STAMRegister,
3295	pdmR3DevHlp_STAMRegisterF,
3296	pdmR3DevHlp_STAMRegisterV,
3297	pdmR3DevHlp_RTCRegister,
3298	pdmR3DevHlp_PDMQueueCreate,
3299	pdmR3DevHlp_CritSectInit,
3300	pdmR3DevHlp_UTCNow,
3301	pdmR3DevHlp_PDMThreadCreate,
3302	pdmR3DevHlp_PhysGCPtr2GCPhys,
3303	0,
3304	0,
3305	0,
3306	0,
3307	0,
3308	0,
3309	0,
3310	0,
3311	0,
3312	0,
3313	pdmR3DevHlp_Untrusted_GetVM,
3314	pdmR3DevHlp_Untrusted_PCIBusRegister,
3315	pdmR3DevHlp_Untrusted_PICRegister,
3316	pdmR3DevHlp_Untrusted_APICRegister,
3317	pdmR3DevHlp_Untrusted_IOAPICRegister,
3318	pdmR3DevHlp_Untrusted_DMACRegister,
3319	pdmR3DevHlp_Untrusted_PhysRead,
3320	pdmR3DevHlp_Untrusted_PhysWrite,
3321	pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr,
3322	pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly,
3323	pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock,
3324	pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3325	pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3326	pdmR3DevHlp_Untrusted_A20IsEnabled,
3327	pdmR3DevHlp_Untrusted_A20Set,
3328	pdmR3DevHlp_Untrusted_VMReset,
3329	pdmR3DevHlp_Untrusted_VMSuspend,
3330	pdmR3DevHlp_Untrusted_VMPowerOff,
3331	pdmR3DevHlp_Untrusted_DMARegister,
3332	pdmR3DevHlp_Untrusted_DMAReadMemory,
3333	pdmR3DevHlp_Untrusted_DMAWriteMemory,
3334	pdmR3DevHlp_Untrusted_DMASetDREQ,
3335	pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3336	pdmR3DevHlp_Untrusted_DMASchedule,
3337	pdmR3DevHlp_Untrusted_CMOSWrite,
3338	pdmR3DevHlp_Untrusted_CMOSRead,
3339	pdmR3DevHlp_Untrusted_GetCpuId,
3340	pdmR3DevHlp_Untrusted_ROMProtectShadow,
3341	pdmR3DevHlp_Untrusted_MMIO2Register,
3342	pdmR3DevHlp_Untrusted_MMIO2Deregister,
3343	pdmR3DevHlp_Untrusted_MMIO2Map,
3344	pdmR3DevHlp_Untrusted_MMIO2Unmap,
3345	pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3346	pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3347	pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3348	pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3349	pdmR3DevHlp_Untrusted_GetVMCPU,
3350	PDM_DEVHLP_VERSION /* the end */
3351	};
3352
3353
3354
3355	/**
3356	* Queue consumer callback for internal component.
3357	*
3358	* @returns Success indicator.
3359	* If false the item will not be removed and the flushing will stop.
3360	* @param pVM The VM handle.
3361	* @param pItem The item to consume. Upon return this item will be freed.
3362	*/
3363	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3364	{
3365	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3366	LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3367	switch (pTask->enmOp)
3368	{
3369	case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3370	PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3371	break;
3372
3373	case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3374	pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3375	break;
3376
3377	case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3378	PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3379	break;
3380
3381	default:
3382	AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3383	break;
3384	}
3385	return true;
3386	}
3387
3388	/** @} */
3389

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source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 24323

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