VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 25528

Last change on this file since 25528 was 25528, checked in by vboxsync, 15 years ago

IPRT,SUPDrv,++: AssertMsg[12] -> AssertMsg1Weak, AssertMsg1, AssertMsg2Weak, AssertMsg2, AssertMsg2WeakV and AssertMsg2V. Doing more of the assertion machinery in common/misc/assert.cpp to avoid code duplication (ring-0). Major SUPDrv version bump.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 141.2 KB
Line 
1/* $Id: PDMDevHlp.cpp 25528 2009-12-20 23:24:59Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/mm.h>
30#include <VBox/pgm.h>
31#include <VBox/iom.h>
32#include <VBox/rem.h>
33#include <VBox/dbgf.h>
34#include <VBox/vm.h>
35#include <VBox/vmm.h>
36
37#include <VBox/version.h>
38#include <VBox/log.h>
39#include <VBox/err.h>
40#include <iprt/asm.h>
41#include <iprt/assert.h>
42#include <iprt/string.h>
43#include <iprt/thread.h>
44
45
46/*******************************************************************************
47* Defined Constants And Macros *
48*******************************************************************************/
49/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50 * Define this to enable the deadlock detection when accessing physical memory.
51 */
52#if /*defined(DEBUG_bird) ||*/ defined(DOXYGEN_RUNNING)
53# define PDM_DEVHLP_DEADLOCK_DETECTION
54#endif
55
56
57/*******************************************************************************
58* Defined Constants And Macros *
59*******************************************************************************/
60/** @name R3 DevHlp
61 * @{
62 */
63
64
65/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
66static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68{
69 PDMDEV_ASSERT_DEVINS(pDevIns);
70 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
71 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74#if 0 /** @todo needs a real string cache for this */
75 if (pDevIns->iInstance > 0)
76 {
77 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
78 if (pszDesc2)
79 pszDesc = pszDesc2;
80 }
81#endif
82
83 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
84
85 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
86 return rc;
87}
88
89
90/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
91static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
92 const char *pszOut, const char *pszIn,
93 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
94{
95 PDMDEV_ASSERT_DEVINS(pDevIns);
96 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
98 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
99
100 /*
101 * Resolve the functions (one of the can be NULL).
102 */
103 int rc = VINF_SUCCESS;
104 if ( pDevIns->pDevReg->szRCMod[0]
105 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
106 {
107 RTRCPTR RCPtrIn = NIL_RTRCPTR;
108 if (pszIn)
109 {
110 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
111 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
112 }
113 RTRCPTR RCPtrOut = NIL_RTRCPTR;
114 if (pszOut && RT_SUCCESS(rc))
115 {
116 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
117 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
118 }
119 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
120 if (pszInStr && RT_SUCCESS(rc))
121 {
122 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
123 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
124 }
125 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
126 if (pszOutStr && RT_SUCCESS(rc))
127 {
128 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
129 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
130 }
131
132 if (RT_SUCCESS(rc))
133 {
134#if 0 /** @todo needs a real string cache for this */
135 if (pDevIns->iInstance > 0)
136 {
137 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
138 if (pszDesc2)
139 pszDesc = pszDesc2;
140 }
141#endif
142
143 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
144 }
145 }
146 else
147 {
148 AssertMsgFailed(("No GC module for this driver!\n"));
149 rc = VERR_INVALID_PARAMETER;
150 }
151
152 LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
153 return rc;
154}
155
156
157/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
158static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
159 const char *pszOut, const char *pszIn,
160 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
161{
162 PDMDEV_ASSERT_DEVINS(pDevIns);
163 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
164 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
165 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
166
167 /*
168 * Resolve the functions (one of the can be NULL).
169 */
170 int rc = VINF_SUCCESS;
171 if ( pDevIns->pDevReg->szR0Mod[0]
172 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
173 {
174 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
175 if (pszIn)
176 {
177 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
178 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
179 }
180 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
181 if (pszOut && RT_SUCCESS(rc))
182 {
183 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
184 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
185 }
186 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
187 if (pszInStr && RT_SUCCESS(rc))
188 {
189 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
190 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
191 }
192 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
193 if (pszOutStr && RT_SUCCESS(rc))
194 {
195 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
196 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
197 }
198
199 if (RT_SUCCESS(rc))
200 {
201#if 0 /** @todo needs a real string cache for this */
202 if (pDevIns->iInstance > 0)
203 {
204 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
205 if (pszDesc2)
206 pszDesc = pszDesc2;
207 }
208#endif
209
210 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
211 }
212 }
213 else
214 {
215 AssertMsgFailed(("No R0 module for this driver!\n"));
216 rc = VERR_INVALID_PARAMETER;
217 }
218
219 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
220 return rc;
221}
222
223
224/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
225static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
226{
227 PDMDEV_ASSERT_DEVINS(pDevIns);
228 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
229 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
230 Port, cPorts));
231
232 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
233
234 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
235 return rc;
236}
237
238
239/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
240static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
241 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
242 const char *pszDesc)
243{
244 PDMDEV_ASSERT_DEVINS(pDevIns);
245 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
246 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
247 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
248
249/** @todo IOMR3MMIORegisterR3 mangles the description, move it here. */
250 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
251
252 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
253 return rc;
254}
255
256
257/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
258static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
259 const char *pszWrite, const char *pszRead, const char *pszFill,
260 const char *pszDesc)
261{
262 PDMDEV_ASSERT_DEVINS(pDevIns);
263 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
264 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
265 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
266
267/** @todo pszDesc is unused here, drop it. */
268
269 /*
270 * Resolve the functions.
271 * Not all function have to present, leave it to IOM to enforce this.
272 */
273 int rc = VINF_SUCCESS;
274 if ( pDevIns->pDevReg->szRCMod[0]
275 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
276 {
277 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
278 if (pszWrite)
279 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
280
281 RTRCPTR RCPtrRead = NIL_RTRCPTR;
282 int rc2 = VINF_SUCCESS;
283 if (pszRead)
284 rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
285
286 RTRCPTR RCPtrFill = NIL_RTRCPTR;
287 int rc3 = VINF_SUCCESS;
288 if (pszFill)
289 rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
290
291 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
292 rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
293 else
294 {
295 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
296 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
297 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
298 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
299 rc = rc2;
300 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
301 rc = rc3;
302 }
303 }
304 else
305 {
306 AssertMsgFailed(("No GC module for this driver!\n"));
307 rc = VERR_INVALID_PARAMETER;
308 }
309
310 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
311 return rc;
312}
313
314/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
315static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
316 const char *pszWrite, const char *pszRead, const char *pszFill,
317 const char *pszDesc)
318{
319 PDMDEV_ASSERT_DEVINS(pDevIns);
320 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
321 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
322 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
323
324/** @todo pszDesc is unused here, remove it. */
325
326 /*
327 * Resolve the functions.
328 * Not all function have to present, leave it to IOM to enforce this.
329 */
330 int rc = VINF_SUCCESS;
331 if ( pDevIns->pDevReg->szR0Mod[0]
332 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
333 {
334 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
335 if (pszWrite)
336 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
337 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
338 int rc2 = VINF_SUCCESS;
339 if (pszRead)
340 rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
341 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
342 int rc3 = VINF_SUCCESS;
343 if (pszFill)
344 rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
345 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
346 rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
347 else
348 {
349 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
350 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
351 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
352 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
353 rc = rc2;
354 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
355 rc = rc3;
356 }
357 }
358 else
359 {
360 AssertMsgFailed(("No R0 module for this driver!\n"));
361 rc = VERR_INVALID_PARAMETER;
362 }
363
364 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
365 return rc;
366}
367
368
369/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
370static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
371{
372 PDMDEV_ASSERT_DEVINS(pDevIns);
373 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
374 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
375 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
376
377 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
378
379 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
380 return rc;
381}
382
383
384/** @copydoc PDMDEVHLPR3::pfnROMRegister */
385static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
386{
387 PDMDEV_ASSERT_DEVINS(pDevIns);
388 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
389 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
390 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
391
392/** @todo can we mangle pszDesc? */
393 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
394
395 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
396 return rc;
397}
398
399
400/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
401static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
402 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
403 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
404 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
405{
406 PDMDEV_ASSERT_DEVINS(pDevIns);
407 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
408 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
409 " pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
410 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
411 pfnLivePrep, pfnLiveExec, pfnLiveVote,
412 pfnSavePrep, pfnSaveExec, pfnSaveDone,
413 pfnLoadPrep, pfnLoadExec, pfnLoadDone));
414
415 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
416 uVersion, cbGuess, pszBefore,
417 pfnLivePrep, pfnLiveExec, pfnLiveVote,
418 pfnSavePrep, pfnSaveExec, pfnSaveDone,
419 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
420
421 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
422 return rc;
423}
424
425
426/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
427static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer)
428{
429 PDMDEV_ASSERT_DEVINS(pDevIns);
430 PVM pVM = pDevIns->Internal.s.pVMR3;
431 VM_ASSERT_EMT(pVM);
432 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
433 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
434
435 if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
436 {
437 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
438 if (pszDesc2)
439 pszDesc = pszDesc2;
440 }
441
442 int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
443
444 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
445 return rc;
446}
447
448
449/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
450static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
451{
452 PDMDEV_ASSERT_DEVINS(pDevIns);
453 PVM pVM = pDevIns->Internal.s.pVMR3;
454 VM_ASSERT_EMT(pVM);
455 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
456 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
457
458 /*
459 * Validate input.
460 */
461 if (!pPciDev)
462 {
463 Assert(pPciDev);
464 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
465 return VERR_INVALID_PARAMETER;
466 }
467 if (!pPciDev->config[0] && !pPciDev->config[1])
468 {
469 Assert(pPciDev->config[0] || pPciDev->config[1]);
470 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
471 return VERR_INVALID_PARAMETER;
472 }
473 if (pDevIns->Internal.s.pPciDeviceR3)
474 {
475 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
476 * support a PDM device with multiple PCI devices. This might become a problem
477 * when upgrading the chipset for instance because of multiple functions in some
478 * devices...
479 */
480 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
481 return VERR_INTERNAL_ERROR;
482 }
483
484 /*
485 * Choose the PCI bus for the device.
486 *
487 * This is simple. If the device was configured for a particular bus, the PCIBusNo
488 * configuration value will be set. If not the default bus is 0.
489 */
490 int rc;
491 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
492 if (!pBus)
493 {
494 uint8_t u8Bus;
495 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
496 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
497 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
498 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
499 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
500 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
501 VERR_PDM_NO_PCI_BUS);
502 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
503 }
504 if (pBus->pDevInsR3)
505 {
506 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
507 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
508 else
509 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
510
511 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
512 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
513 else
514 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
515
516 /*
517 * Check the configuration for PCI device and function assignment.
518 */
519 int iDev = -1;
520 uint8_t u8Device;
521 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
522 if (RT_SUCCESS(rc))
523 {
524 if (u8Device > 31)
525 {
526 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
527 u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
528 return VERR_INTERNAL_ERROR;
529 }
530
531 uint8_t u8Function;
532 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
533 if (RT_FAILURE(rc))
534 {
535 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
536 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
537 return rc;
538 }
539 if (u8Function > 7)
540 {
541 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
542 u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
543 return VERR_INTERNAL_ERROR;
544 }
545 iDev = (u8Device << 3) | u8Function;
546 }
547 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
548 {
549 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
550 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
551 return rc;
552 }
553
554 /*
555 * Call the pci bus device to do the actual registration.
556 */
557 pdmLock(pVM);
558 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
559 pdmUnlock(pVM);
560 if (RT_SUCCESS(rc))
561 {
562 pPciDev->pDevIns = pDevIns;
563
564 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
565 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
566 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
567 else
568 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
569
570 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
571 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
572 else
573 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
574
575 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
576 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
577 }
578 }
579 else
580 {
581 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
582 rc = VERR_PDM_NO_PCI_BUS;
583 }
584
585 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
586 return rc;
587}
588
589
590/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
591static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
592{
593 PDMDEV_ASSERT_DEVINS(pDevIns);
594 PVM pVM = pDevIns->Internal.s.pVMR3;
595 VM_ASSERT_EMT(pVM);
596 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
597 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
598
599 /*
600 * Validate input.
601 */
602 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
603 {
604 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
605 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
606 return VERR_INVALID_PARAMETER;
607 }
608 switch (enmType)
609 {
610 case PCI_ADDRESS_SPACE_IO:
611 /*
612 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
613 */
614 AssertMsgReturn(cbRegion <= _32K,
615 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
616 VERR_INVALID_PARAMETER);
617 break;
618
619 case PCI_ADDRESS_SPACE_MEM:
620 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
621 /*
622 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
623 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
624 */
625 AssertMsgReturn(cbRegion <= 512 * _1M,
626 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
627 VERR_INVALID_PARAMETER);
628 break;
629 default:
630 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
631 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
632 return VERR_INVALID_PARAMETER;
633 }
634 if (!pfnCallback)
635 {
636 Assert(pfnCallback);
637 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
638 return VERR_INVALID_PARAMETER;
639 }
640 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
641
642 /*
643 * Must have a PCI device registered!
644 */
645 int rc;
646 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
647 if (pPciDev)
648 {
649 /*
650 * We're currently restricted to page aligned MMIO regions.
651 */
652 if ( (enmType == PCI_ADDRESS_SPACE_MEM || enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
653 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
654 {
655 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
656 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
657 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
658 }
659
660 /*
661 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
662 */
663 int iLastSet = ASMBitLastSetU32(cbRegion);
664 Assert(iLastSet > 0);
665 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
666 if (cbRegion > cbRegionAligned)
667 cbRegion = cbRegionAligned * 2; /* round up */
668
669 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
670 Assert(pBus);
671 pdmLock(pVM);
672 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
673 pdmUnlock(pVM);
674 }
675 else
676 {
677 AssertMsgFailed(("No PCI device registered!\n"));
678 rc = VERR_PDM_NOT_PCI_DEVICE;
679 }
680
681 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
682 return rc;
683}
684
685
686/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
687static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
688 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
689{
690 PDMDEV_ASSERT_DEVINS(pDevIns);
691 PVM pVM = pDevIns->Internal.s.pVMR3;
692 VM_ASSERT_EMT(pVM);
693 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
694 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
695
696 /*
697 * Validate input and resolve defaults.
698 */
699 AssertPtr(pfnRead);
700 AssertPtr(pfnWrite);
701 AssertPtrNull(ppfnReadOld);
702 AssertPtrNull(ppfnWriteOld);
703 AssertPtrNull(pPciDev);
704
705 if (!pPciDev)
706 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
707 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
708 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
709 AssertRelease(pBus);
710 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
711
712 /*
713 * Do the job.
714 */
715 pdmLock(pVM);
716 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
717 pdmUnlock(pVM);
718
719 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
720}
721
722
723/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
724static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
725{
726 PDMDEV_ASSERT_DEVINS(pDevIns);
727 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
728
729 /*
730 * Validate input.
731 */
732 /** @todo iIrq and iLevel checks. */
733
734 /*
735 * Must have a PCI device registered!
736 */
737 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
738 if (pPciDev)
739 {
740 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
741 Assert(pBus);
742 PVM pVM = pDevIns->Internal.s.pVMR3;
743 pdmLock(pVM);
744 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
745 pdmUnlock(pVM);
746 }
747 else
748 AssertReleaseMsgFailed(("No PCI device registered!\n"));
749
750 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
751}
752
753
754/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
755static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
756{
757 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
758}
759
760
761/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
762static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
763{
764 PDMDEV_ASSERT_DEVINS(pDevIns);
765 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
766
767 /*
768 * Validate input.
769 */
770 /** @todo iIrq and iLevel checks. */
771
772 PVM pVM = pDevIns->Internal.s.pVMR3;
773 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
774
775 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
776}
777
778
779/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
780static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
781{
782 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
783}
784
785
786/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
787static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
788{
789 PDMDEV_ASSERT_DEVINS(pDevIns);
790 PVM pVM = pDevIns->Internal.s.pVMR3;
791 VM_ASSERT_EMT(pVM);
792 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
793 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
794
795 /*
796 * Lookup the LUN, it might already be registered.
797 */
798 PPDMLUN pLunPrev = NULL;
799 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
800 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
801 if (pLun->iLun == iLun)
802 break;
803
804 /*
805 * Create the LUN if if wasn't found, else check if driver is already attached to it.
806 */
807 if (!pLun)
808 {
809 if ( !pBaseInterface
810 || !pszDesc
811 || !*pszDesc)
812 {
813 Assert(pBaseInterface);
814 Assert(pszDesc || *pszDesc);
815 return VERR_INVALID_PARAMETER;
816 }
817
818 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
819 if (!pLun)
820 return VERR_NO_MEMORY;
821
822 pLun->iLun = iLun;
823 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
824 pLun->pTop = NULL;
825 pLun->pBottom = NULL;
826 pLun->pDevIns = pDevIns;
827 pLun->pszDesc = pszDesc;
828 pLun->pBase = pBaseInterface;
829 if (!pLunPrev)
830 pDevIns->Internal.s.pLunsR3 = pLun;
831 else
832 pLunPrev->pNext = pLun;
833 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
834 iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
835 }
836 else if (pLun->pTop)
837 {
838 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
839 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
840 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
841 }
842 Assert(pLun->pBase == pBaseInterface);
843
844
845 /*
846 * Get the attached driver configuration.
847 */
848 int rc;
849 PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
850 if (pNode)
851 {
852 char *pszName;
853 rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
854 if (RT_SUCCESS(rc))
855 {
856 /*
857 * Find the driver.
858 */
859 PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
860 if ( pDrv
861 && pDrv->cInstances < pDrv->pDrvReg->cMaxInstances)
862 {
863 /* config node */
864 PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
865 if (!pConfigNode)
866 rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
867 if (RT_SUCCESS(rc))
868 {
869 CFGMR3SetRestrictedRoot(pConfigNode);
870
871 /*
872 * Allocate the driver instance.
873 */
874 size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
875 cb = RT_ALIGN_Z(cb, 16);
876 PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
877 if (pNew)
878 {
879 /*
880 * Initialize the instance structure (declaration order).
881 */
882 pNew->u32Version = PDM_DRVINS_VERSION;
883 //pNew->Internal.s.pUp = NULL;
884 //pNew->Internal.s.pDown = NULL;
885 pNew->Internal.s.pLun = pLun;
886 pNew->Internal.s.pDrv = pDrv;
887 pNew->Internal.s.pVM = pVM;
888 //pNew->Internal.s.fDetaching = false;
889 pNew->Internal.s.fVMSuspended = true;
890 //pNew->Internal.s.pfnAsyncNotify = NULL;
891 pNew->Internal.s.pCfgHandle = pNode;
892 pNew->pDrvHlp = &g_pdmR3DrvHlp;
893 pNew->pDrvReg = pDrv->pDrvReg;
894 pNew->pCfgHandle = pConfigNode;
895 pNew->iInstance = pDrv->iNextInstance;
896 pNew->pUpBase = pBaseInterface;
897 //pNew->pDownBase = NULL;
898 //pNew->IBase.pfnQueryInterface = NULL;
899 pNew->pvInstanceData = &pNew->achInstanceData[0];
900
901 pDrv->iNextInstance++;
902 pDrv->cInstances++;
903
904 /*
905 * Link with LUN and call the constructor.
906 */
907 pLun->pTop = pLun->pBottom = pNew;
908 rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle, 0 /*fFlags*/);
909 if (RT_SUCCESS(rc))
910 {
911 MMR3HeapFree(pszName);
912 *ppBaseInterface = &pNew->IBase;
913 Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
914 pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
915 LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
916
917 return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
918 }
919
920 /*
921 * Free the driver.
922 */
923 pLun->pTop = pLun->pBottom = NULL;
924 ASMMemFill32(pNew, cb, 0xdeadd0d0);
925 MMR3HeapFree(pNew);
926 pDrv->cInstances--;
927 }
928 else
929 {
930 AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
931 rc = VERR_NO_MEMORY;
932 }
933 }
934 else
935 AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
936 }
937 else if (pDrv)
938 {
939 AssertMsgFailed(("Too many instances of driver '%s', max is %u\n", pszName, pDrv->pDrvReg->cMaxInstances));
940 rc = VERR_PDM_TOO_MANY_DRIVER_INSTANCES;
941 }
942 else
943 {
944 AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
945 rc = VERR_PDM_DRIVER_NOT_FOUND;
946 }
947 MMR3HeapFree(pszName);
948 }
949 else
950 {
951 AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
952 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
953 rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
954 }
955 }
956 else
957 rc = VERR_PDM_NO_ATTACHED_DRIVER;
958
959
960 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
961 return rc;
962}
963
964
965/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
966static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
967{
968 PDMDEV_ASSERT_DEVINS(pDevIns);
969 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
970
971 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
972
973 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
974 return pv;
975}
976
977
978/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
979static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
980{
981 PDMDEV_ASSERT_DEVINS(pDevIns);
982 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
983
984 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
985
986 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
987 return pv;
988}
989
990
991/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
992static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
993{
994 PDMDEV_ASSERT_DEVINS(pDevIns);
995 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
996
997 MMR3HeapFree(pv);
998
999 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1000}
1001
1002
1003/** @copydoc PDMDEVHLPR3::pfnVMSetError */
1004static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
1005{
1006 PDMDEV_ASSERT_DEVINS(pDevIns);
1007 va_list args;
1008 va_start(args, pszFormat);
1009 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
1010 va_end(args);
1011 return rc;
1012}
1013
1014
1015/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
1016static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
1017{
1018 PDMDEV_ASSERT_DEVINS(pDevIns);
1019 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
1020 return rc;
1021}
1022
1023
1024/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
1025static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
1026{
1027 PDMDEV_ASSERT_DEVINS(pDevIns);
1028 va_list args;
1029 va_start(args, pszFormat);
1030 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
1031 va_end(args);
1032 return rc;
1033}
1034
1035
1036/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
1037static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
1038{
1039 PDMDEV_ASSERT_DEVINS(pDevIns);
1040 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
1041 return rc;
1042}
1043
1044
1045/** @copydoc PDMDEVHLPR3::pfnVMState */
1046static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
1047{
1048 PDMDEV_ASSERT_DEVINS(pDevIns);
1049
1050 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1051
1052 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1053 enmVMState, VMR3GetStateName(enmVMState)));
1054 return enmVMState;
1055}
1056
1057
1058/** @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet */
1059static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
1060{
1061 PDMDEV_ASSERT_DEVINS(pDevIns);
1062
1063 bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
1064
1065 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1066 fRc));
1067 return fRc;
1068}
1069
1070
1071/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
1072static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1073{
1074 PDMDEV_ASSERT_DEVINS(pDevIns);
1075 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1076 return true;
1077
1078 char szMsg[100];
1079 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1080 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1081 AssertBreakpoint();
1082 return false;
1083}
1084
1085
1086/** @copydoc PDMDEVHLPR3::pfnAssertOther */
1087static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1088{
1089 PDMDEV_ASSERT_DEVINS(pDevIns);
1090 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1091 return true;
1092
1093 char szMsg[100];
1094 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1095 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1096 AssertBreakpoint();
1097 return false;
1098}
1099
1100
1101/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
1102static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
1103{
1104 PDMDEV_ASSERT_DEVINS(pDevIns);
1105#ifdef LOG_ENABLED
1106 va_list va2;
1107 va_copy(va2, args);
1108 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1109 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1110 va_end(va2);
1111#endif
1112
1113 PVM pVM = pDevIns->Internal.s.pVMR3;
1114 VM_ASSERT_EMT(pVM);
1115 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1116
1117 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1118 return rc;
1119}
1120
1121
1122/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1123static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1124{
1125 PDMDEV_ASSERT_DEVINS(pDevIns);
1126 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1127 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1128
1129 PVM pVM = pDevIns->Internal.s.pVMR3;
1130 VM_ASSERT_EMT(pVM);
1131 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1132
1133 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1134 return rc;
1135}
1136
1137
1138/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1139static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1140{
1141 PDMDEV_ASSERT_DEVINS(pDevIns);
1142 PVM pVM = pDevIns->Internal.s.pVMR3;
1143 VM_ASSERT_EMT(pVM);
1144
1145 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1146 NOREF(pVM);
1147}
1148
1149
1150
1151/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1152static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1153 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1154{
1155 PDMDEV_ASSERT_DEVINS(pDevIns);
1156 PVM pVM = pDevIns->Internal.s.pVMR3;
1157 VM_ASSERT_EMT(pVM);
1158
1159 va_list args;
1160 va_start(args, pszName);
1161 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1162 va_end(args);
1163 AssertRC(rc);
1164
1165 NOREF(pVM);
1166}
1167
1168
1169/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1170static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1171 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1172{
1173 PDMDEV_ASSERT_DEVINS(pDevIns);
1174 PVM pVM = pDevIns->Internal.s.pVMR3;
1175 VM_ASSERT_EMT(pVM);
1176
1177 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1178 AssertRC(rc);
1179
1180 NOREF(pVM);
1181}
1182
1183
1184/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1185static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1186{
1187 PDMDEV_ASSERT_DEVINS(pDevIns);
1188 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1189 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1190 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1191 pRtcReg->pfnWrite, ppRtcHlp));
1192
1193 /*
1194 * Validate input.
1195 */
1196 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1197 {
1198 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1199 PDM_RTCREG_VERSION));
1200 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1201 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1202 return VERR_INVALID_PARAMETER;
1203 }
1204 if ( !pRtcReg->pfnWrite
1205 || !pRtcReg->pfnRead)
1206 {
1207 Assert(pRtcReg->pfnWrite);
1208 Assert(pRtcReg->pfnRead);
1209 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1210 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1211 return VERR_INVALID_PARAMETER;
1212 }
1213
1214 if (!ppRtcHlp)
1215 {
1216 Assert(ppRtcHlp);
1217 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1218 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1219 return VERR_INVALID_PARAMETER;
1220 }
1221
1222 /*
1223 * Only one DMA device.
1224 */
1225 PVM pVM = pDevIns->Internal.s.pVMR3;
1226 if (pVM->pdm.s.pRtc)
1227 {
1228 AssertMsgFailed(("Only one RTC device is supported!\n"));
1229 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1230 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1231 return VERR_INVALID_PARAMETER;
1232 }
1233
1234 /*
1235 * Allocate and initialize pci bus structure.
1236 */
1237 int rc = VINF_SUCCESS;
1238 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1239 if (pRtc)
1240 {
1241 pRtc->pDevIns = pDevIns;
1242 pRtc->Reg = *pRtcReg;
1243 pVM->pdm.s.pRtc = pRtc;
1244
1245 /* set the helper pointer. */
1246 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1247 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1248 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1249 }
1250 else
1251 rc = VERR_NO_MEMORY;
1252
1253 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1254 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1255 return rc;
1256}
1257
1258
1259/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1260static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1261 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
1262{
1263 PDMDEV_ASSERT_DEVINS(pDevIns);
1264 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1265 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1266
1267 PVM pVM = pDevIns->Internal.s.pVMR3;
1268 VM_ASSERT_EMT(pVM);
1269
1270 if (pDevIns->iInstance > 0)
1271 {
1272 pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1273 AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1274 }
1275
1276 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1277
1278 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppQueue));
1279 return rc;
1280}
1281
1282
1283/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1284static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1285{
1286 PDMDEV_ASSERT_DEVINS(pDevIns);
1287 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1288 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1289
1290 PVM pVM = pDevIns->Internal.s.pVMR3;
1291 VM_ASSERT_EMT(pVM);
1292 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1293
1294 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1295 return rc;
1296}
1297
1298
1299/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1300static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1301{
1302 PDMDEV_ASSERT_DEVINS(pDevIns);
1303 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1304 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1305
1306 pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1307
1308 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1309 return pTime;
1310}
1311
1312
1313/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1314static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1315 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1316{
1317 PDMDEV_ASSERT_DEVINS(pDevIns);
1318 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1319 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1320 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1321
1322 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1323
1324 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1325 rc, *ppThread));
1326 return rc;
1327}
1328
1329
1330/** @copydoc PDMDEVHLPR3::pfnGetVM */
1331static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1332{
1333 PDMDEV_ASSERT_DEVINS(pDevIns);
1334 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1335 return pDevIns->Internal.s.pVMR3;
1336}
1337
1338
1339/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
1340static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1341{
1342 PDMDEV_ASSERT_DEVINS(pDevIns);
1343 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1344 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1345 return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1346}
1347
1348
1349/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1350static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1351{
1352 PDMDEV_ASSERT_DEVINS(pDevIns);
1353 PVM pVM = pDevIns->Internal.s.pVMR3;
1354 VM_ASSERT_EMT(pVM);
1355 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1356 ".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1357 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1358 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1359 pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1360
1361 /*
1362 * Validate the structure.
1363 */
1364 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1365 {
1366 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1367 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1368 return VERR_INVALID_PARAMETER;
1369 }
1370 if ( !pPciBusReg->pfnRegisterR3
1371 || !pPciBusReg->pfnIORegionRegisterR3
1372 || !pPciBusReg->pfnSetIrqR3
1373 || !pPciBusReg->pfnSaveExecR3
1374 || !pPciBusReg->pfnLoadExecR3
1375 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1376 {
1377 Assert(pPciBusReg->pfnRegisterR3);
1378 Assert(pPciBusReg->pfnIORegionRegisterR3);
1379 Assert(pPciBusReg->pfnSetIrqR3);
1380 Assert(pPciBusReg->pfnSaveExecR3);
1381 Assert(pPciBusReg->pfnLoadExecR3);
1382 Assert(pPciBusReg->pfnFakePCIBIOSR3);
1383 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1384 return VERR_INVALID_PARAMETER;
1385 }
1386 if ( pPciBusReg->pszSetIrqRC
1387 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
1388 {
1389 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1390 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1391 return VERR_INVALID_PARAMETER;
1392 }
1393 if ( pPciBusReg->pszSetIrqR0
1394 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
1395 {
1396 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1397 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1398 return VERR_INVALID_PARAMETER;
1399 }
1400 if (!ppPciHlpR3)
1401 {
1402 Assert(ppPciHlpR3);
1403 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1404 return VERR_INVALID_PARAMETER;
1405 }
1406
1407 /*
1408 * Find free PCI bus entry.
1409 */
1410 unsigned iBus = 0;
1411 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1412 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1413 break;
1414 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1415 {
1416 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1417 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1418 return VERR_INVALID_PARAMETER;
1419 }
1420 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1421
1422 /*
1423 * Resolve and init the RC bits.
1424 */
1425 if (pPciBusReg->pszSetIrqRC)
1426 {
1427 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1428 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1429 if (RT_FAILURE(rc))
1430 {
1431 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1432 return rc;
1433 }
1434 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1435 }
1436 else
1437 {
1438 pPciBus->pfnSetIrqRC = 0;
1439 pPciBus->pDevInsRC = 0;
1440 }
1441
1442 /*
1443 * Resolve and init the R0 bits.
1444 */
1445 if (pPciBusReg->pszSetIrqR0)
1446 {
1447 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1448 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1449 if (RT_FAILURE(rc))
1450 {
1451 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1452 return rc;
1453 }
1454 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1455 }
1456 else
1457 {
1458 pPciBus->pfnSetIrqR0 = 0;
1459 pPciBus->pDevInsR0 = 0;
1460 }
1461
1462 /*
1463 * Init the R3 bits.
1464 */
1465 pPciBus->iBus = iBus;
1466 pPciBus->pDevInsR3 = pDevIns;
1467 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1468 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1469 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1470 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1471 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1472 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1473 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1474
1475 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1476
1477 /* set the helper pointer and return. */
1478 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
1479 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1480 return VINF_SUCCESS;
1481}
1482
1483
1484/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1485static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1486{
1487 PDMDEV_ASSERT_DEVINS(pDevIns);
1488 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1489 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1490 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1491 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1492 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1493 ppPicHlpR3));
1494
1495 /*
1496 * Validate input.
1497 */
1498 if (pPicReg->u32Version != PDM_PICREG_VERSION)
1499 {
1500 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1501 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1502 return VERR_INVALID_PARAMETER;
1503 }
1504 if ( !pPicReg->pfnSetIrqR3
1505 || !pPicReg->pfnGetInterruptR3)
1506 {
1507 Assert(pPicReg->pfnSetIrqR3);
1508 Assert(pPicReg->pfnGetInterruptR3);
1509 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1510 return VERR_INVALID_PARAMETER;
1511 }
1512 if ( ( pPicReg->pszSetIrqRC
1513 || pPicReg->pszGetInterruptRC)
1514 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
1515 || !VALID_PTR(pPicReg->pszGetInterruptRC))
1516 )
1517 {
1518 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1519 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1520 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1521 return VERR_INVALID_PARAMETER;
1522 }
1523 if ( pPicReg->pszSetIrqRC
1524 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1525 {
1526 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1527 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1528 return VERR_INVALID_PARAMETER;
1529 }
1530 if ( pPicReg->pszSetIrqR0
1531 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1532 {
1533 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1534 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1535 return VERR_INVALID_PARAMETER;
1536 }
1537 if (!ppPicHlpR3)
1538 {
1539 Assert(ppPicHlpR3);
1540 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1541 return VERR_INVALID_PARAMETER;
1542 }
1543
1544 /*
1545 * Only one PIC device.
1546 */
1547 PVM pVM = pDevIns->Internal.s.pVMR3;
1548 if (pVM->pdm.s.Pic.pDevInsR3)
1549 {
1550 AssertMsgFailed(("Only one pic device is supported!\n"));
1551 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1552 return VERR_INVALID_PARAMETER;
1553 }
1554
1555 /*
1556 * RC stuff.
1557 */
1558 if (pPicReg->pszSetIrqRC)
1559 {
1560 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1561 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1562 if (RT_SUCCESS(rc))
1563 {
1564 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1565 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1566 }
1567 if (RT_FAILURE(rc))
1568 {
1569 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1570 return rc;
1571 }
1572 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1573 }
1574 else
1575 {
1576 pVM->pdm.s.Pic.pDevInsRC = 0;
1577 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1578 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1579 }
1580
1581 /*
1582 * R0 stuff.
1583 */
1584 if (pPicReg->pszSetIrqR0)
1585 {
1586 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1587 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1588 if (RT_SUCCESS(rc))
1589 {
1590 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1591 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1592 }
1593 if (RT_FAILURE(rc))
1594 {
1595 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1596 return rc;
1597 }
1598 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1599 Assert(pVM->pdm.s.Pic.pDevInsR0);
1600 }
1601 else
1602 {
1603 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1604 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1605 pVM->pdm.s.Pic.pDevInsR0 = 0;
1606 }
1607
1608 /*
1609 * R3 stuff.
1610 */
1611 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1612 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1613 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1614 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1615
1616 /* set the helper pointer and return. */
1617 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
1618 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1619 return VINF_SUCCESS;
1620}
1621
1622
1623/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1624static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1625{
1626 PDMDEV_ASSERT_DEVINS(pDevIns);
1627 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1628 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1629 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1630 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
1631 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1632 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
1633 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1634 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1635 pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
1636
1637 /*
1638 * Validate input.
1639 */
1640 if (pApicReg->u32Version != PDM_APICREG_VERSION)
1641 {
1642 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1643 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1644 return VERR_INVALID_PARAMETER;
1645 }
1646 if ( !pApicReg->pfnGetInterruptR3
1647 || !pApicReg->pfnHasPendingIrqR3
1648 || !pApicReg->pfnSetBaseR3
1649 || !pApicReg->pfnGetBaseR3
1650 || !pApicReg->pfnSetTPRR3
1651 || !pApicReg->pfnGetTPRR3
1652 || !pApicReg->pfnWriteMSRR3
1653 || !pApicReg->pfnReadMSRR3
1654 || !pApicReg->pfnBusDeliverR3
1655 || !pApicReg->pfnLocalInterruptR3)
1656 {
1657 Assert(pApicReg->pfnGetInterruptR3);
1658 Assert(pApicReg->pfnHasPendingIrqR3);
1659 Assert(pApicReg->pfnSetBaseR3);
1660 Assert(pApicReg->pfnGetBaseR3);
1661 Assert(pApicReg->pfnSetTPRR3);
1662 Assert(pApicReg->pfnGetTPRR3);
1663 Assert(pApicReg->pfnWriteMSRR3);
1664 Assert(pApicReg->pfnReadMSRR3);
1665 Assert(pApicReg->pfnBusDeliverR3);
1666 Assert(pApicReg->pfnLocalInterruptR3);
1667 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1668 return VERR_INVALID_PARAMETER;
1669 }
1670 if ( ( pApicReg->pszGetInterruptRC
1671 || pApicReg->pszHasPendingIrqRC
1672 || pApicReg->pszSetBaseRC
1673 || pApicReg->pszGetBaseRC
1674 || pApicReg->pszSetTPRRC
1675 || pApicReg->pszGetTPRRC
1676 || pApicReg->pszWriteMSRRC
1677 || pApicReg->pszReadMSRRC
1678 || pApicReg->pszBusDeliverRC
1679 || pApicReg->pszLocalInterruptRC)
1680 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1681 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1682 || !VALID_PTR(pApicReg->pszSetBaseRC)
1683 || !VALID_PTR(pApicReg->pszGetBaseRC)
1684 || !VALID_PTR(pApicReg->pszSetTPRRC)
1685 || !VALID_PTR(pApicReg->pszGetTPRRC)
1686 || !VALID_PTR(pApicReg->pszWriteMSRRC)
1687 || !VALID_PTR(pApicReg->pszReadMSRRC)
1688 || !VALID_PTR(pApicReg->pszBusDeliverRC)
1689 || !VALID_PTR(pApicReg->pszLocalInterruptRC))
1690 )
1691 {
1692 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1693 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1694 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1695 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1696 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1697 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1698 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1699 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1700 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1701 Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
1702 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1703 return VERR_INVALID_PARAMETER;
1704 }
1705 if ( ( pApicReg->pszGetInterruptR0
1706 || pApicReg->pszHasPendingIrqR0
1707 || pApicReg->pszSetBaseR0
1708 || pApicReg->pszGetBaseR0
1709 || pApicReg->pszSetTPRR0
1710 || pApicReg->pszGetTPRR0
1711 || pApicReg->pszWriteMSRR0
1712 || pApicReg->pszReadMSRR0
1713 || pApicReg->pszBusDeliverR0
1714 || pApicReg->pszLocalInterruptR0)
1715 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1716 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1717 || !VALID_PTR(pApicReg->pszSetBaseR0)
1718 || !VALID_PTR(pApicReg->pszGetBaseR0)
1719 || !VALID_PTR(pApicReg->pszSetTPRR0)
1720 || !VALID_PTR(pApicReg->pszGetTPRR0)
1721 || !VALID_PTR(pApicReg->pszReadMSRR0)
1722 || !VALID_PTR(pApicReg->pszWriteMSRR0)
1723 || !VALID_PTR(pApicReg->pszBusDeliverR0)
1724 || !VALID_PTR(pApicReg->pszLocalInterruptR0))
1725 )
1726 {
1727 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1728 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1729 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1730 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1731 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1732 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1733 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1734 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1735 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1736 Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
1737 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1738 return VERR_INVALID_PARAMETER;
1739 }
1740 if (!ppApicHlpR3)
1741 {
1742 Assert(ppApicHlpR3);
1743 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1744 return VERR_INVALID_PARAMETER;
1745 }
1746
1747 /*
1748 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
1749 * as they need to communicate and share state easily.
1750 */
1751 PVM pVM = pDevIns->Internal.s.pVMR3;
1752 if (pVM->pdm.s.Apic.pDevInsR3)
1753 {
1754 AssertMsgFailed(("Only one apic device is supported!\n"));
1755 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1756 return VERR_INVALID_PARAMETER;
1757 }
1758
1759 /*
1760 * Resolve & initialize the RC bits.
1761 */
1762 if (pApicReg->pszGetInterruptRC)
1763 {
1764 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1765 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1766 if (RT_SUCCESS(rc))
1767 {
1768 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1769 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1770 }
1771 if (RT_SUCCESS(rc))
1772 {
1773 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1774 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1775 }
1776 if (RT_SUCCESS(rc))
1777 {
1778 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1779 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1780 }
1781 if (RT_SUCCESS(rc))
1782 {
1783 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1784 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1785 }
1786 if (RT_SUCCESS(rc))
1787 {
1788 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1789 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1790 }
1791 if (RT_SUCCESS(rc))
1792 {
1793 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1794 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1795 }
1796 if (RT_SUCCESS(rc))
1797 {
1798 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1799 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1800 }
1801 if (RT_SUCCESS(rc))
1802 {
1803 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1804 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1805 }
1806 if (RT_SUCCESS(rc))
1807 {
1808 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
1809 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
1810 }
1811 if (RT_FAILURE(rc))
1812 {
1813 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1814 return rc;
1815 }
1816 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1817 }
1818 else
1819 {
1820 pVM->pdm.s.Apic.pDevInsRC = 0;
1821 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1822 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1823 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1824 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1825 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1826 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1827 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1828 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1829 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1830 pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
1831 }
1832
1833 /*
1834 * Resolve & initialize the R0 bits.
1835 */
1836 if (pApicReg->pszGetInterruptR0)
1837 {
1838 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1839 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1840 if (RT_SUCCESS(rc))
1841 {
1842 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1843 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1844 }
1845 if (RT_SUCCESS(rc))
1846 {
1847 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1848 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1849 }
1850 if (RT_SUCCESS(rc))
1851 {
1852 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1853 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1854 }
1855 if (RT_SUCCESS(rc))
1856 {
1857 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1858 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1859 }
1860 if (RT_SUCCESS(rc))
1861 {
1862 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1863 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1864 }
1865 if (RT_SUCCESS(rc))
1866 {
1867 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1868 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1869 }
1870 if (RT_SUCCESS(rc))
1871 {
1872 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1873 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1874 }
1875 if (RT_SUCCESS(rc))
1876 {
1877 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1878 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1879 }
1880 if (RT_SUCCESS(rc))
1881 {
1882 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
1883 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
1884 }
1885 if (RT_FAILURE(rc))
1886 {
1887 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1888 return rc;
1889 }
1890 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1891 Assert(pVM->pdm.s.Apic.pDevInsR0);
1892 }
1893 else
1894 {
1895 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1896 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1897 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1898 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1899 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1900 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1901 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1902 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1903 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1904 pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
1905 pVM->pdm.s.Apic.pDevInsR0 = 0;
1906 }
1907
1908 /*
1909 * Initialize the HC bits.
1910 */
1911 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1912 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1913 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1914 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1915 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1916 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1917 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1918 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1919 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1920 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1921 pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
1922 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1923
1924 /* set the helper pointer and return. */
1925 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
1926 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1927 return VINF_SUCCESS;
1928}
1929
1930
1931/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1932static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1933{
1934 PDMDEV_ASSERT_DEVINS(pDevIns);
1935 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1936 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1937 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1938 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1939
1940 /*
1941 * Validate input.
1942 */
1943 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1944 {
1945 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1946 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1947 return VERR_INVALID_PARAMETER;
1948 }
1949 if (!pIoApicReg->pfnSetIrqR3)
1950 {
1951 Assert(pIoApicReg->pfnSetIrqR3);
1952 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1953 return VERR_INVALID_PARAMETER;
1954 }
1955 if ( pIoApicReg->pszSetIrqRC
1956 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
1957 {
1958 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1959 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1960 return VERR_INVALID_PARAMETER;
1961 }
1962 if ( pIoApicReg->pszSetIrqR0
1963 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
1964 {
1965 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1966 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1967 return VERR_INVALID_PARAMETER;
1968 }
1969 if (!ppIoApicHlpR3)
1970 {
1971 Assert(ppIoApicHlpR3);
1972 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1973 return VERR_INVALID_PARAMETER;
1974 }
1975
1976 /*
1977 * The I/O APIC requires the APIC to be present (hacks++).
1978 * If the I/O APIC does GC stuff so must the APIC.
1979 */
1980 PVM pVM = pDevIns->Internal.s.pVMR3;
1981 if (!pVM->pdm.s.Apic.pDevInsR3)
1982 {
1983 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1984 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1985 return VERR_INVALID_PARAMETER;
1986 }
1987 if ( pIoApicReg->pszSetIrqRC
1988 && !pVM->pdm.s.Apic.pDevInsRC)
1989 {
1990 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1991 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1992 return VERR_INVALID_PARAMETER;
1993 }
1994
1995 /*
1996 * Only one I/O APIC device.
1997 */
1998 if (pVM->pdm.s.IoApic.pDevInsR3)
1999 {
2000 AssertMsgFailed(("Only one ioapic device is supported!\n"));
2001 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2002 return VERR_INVALID_PARAMETER;
2003 }
2004
2005 /*
2006 * Resolve & initialize the GC bits.
2007 */
2008 if (pIoApicReg->pszSetIrqRC)
2009 {
2010 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2011 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2012 if (RT_FAILURE(rc))
2013 {
2014 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2015 return rc;
2016 }
2017 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2018 }
2019 else
2020 {
2021 pVM->pdm.s.IoApic.pDevInsRC = 0;
2022 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2023 }
2024
2025 /*
2026 * Resolve & initialize the R0 bits.
2027 */
2028 if (pIoApicReg->pszSetIrqR0)
2029 {
2030 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2031 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2032 if (RT_FAILURE(rc))
2033 {
2034 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2035 return rc;
2036 }
2037 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2038 Assert(pVM->pdm.s.IoApic.pDevInsR0);
2039 }
2040 else
2041 {
2042 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2043 pVM->pdm.s.IoApic.pDevInsR0 = 0;
2044 }
2045
2046 /*
2047 * Initialize the R3 bits.
2048 */
2049 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2050 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2051 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2052
2053 /* set the helper pointer and return. */
2054 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2055 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2056 return VINF_SUCCESS;
2057}
2058
2059
2060/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2061static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2062{
2063 PDMDEV_ASSERT_DEVINS(pDevIns);
2064 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2065 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2066 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2067 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2068
2069 /*
2070 * Validate input.
2071 */
2072 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2073 {
2074 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2075 PDM_DMACREG_VERSION));
2076 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2077 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2078 return VERR_INVALID_PARAMETER;
2079 }
2080 if ( !pDmacReg->pfnRun
2081 || !pDmacReg->pfnRegister
2082 || !pDmacReg->pfnReadMemory
2083 || !pDmacReg->pfnWriteMemory
2084 || !pDmacReg->pfnSetDREQ
2085 || !pDmacReg->pfnGetChannelMode)
2086 {
2087 Assert(pDmacReg->pfnRun);
2088 Assert(pDmacReg->pfnRegister);
2089 Assert(pDmacReg->pfnReadMemory);
2090 Assert(pDmacReg->pfnWriteMemory);
2091 Assert(pDmacReg->pfnSetDREQ);
2092 Assert(pDmacReg->pfnGetChannelMode);
2093 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2094 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2095 return VERR_INVALID_PARAMETER;
2096 }
2097
2098 if (!ppDmacHlp)
2099 {
2100 Assert(ppDmacHlp);
2101 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2102 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2103 return VERR_INVALID_PARAMETER;
2104 }
2105
2106 /*
2107 * Only one DMA device.
2108 */
2109 PVM pVM = pDevIns->Internal.s.pVMR3;
2110 if (pVM->pdm.s.pDmac)
2111 {
2112 AssertMsgFailed(("Only one DMA device is supported!\n"));
2113 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2114 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2115 return VERR_INVALID_PARAMETER;
2116 }
2117
2118 /*
2119 * Allocate and initialize pci bus structure.
2120 */
2121 int rc = VINF_SUCCESS;
2122 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2123 if (pDmac)
2124 {
2125 pDmac->pDevIns = pDevIns;
2126 pDmac->Reg = *pDmacReg;
2127 pVM->pdm.s.pDmac = pDmac;
2128
2129 /* set the helper pointer. */
2130 *ppDmacHlp = &g_pdmR3DevDmacHlp;
2131 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2132 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2133 }
2134 else
2135 rc = VERR_NO_MEMORY;
2136
2137 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2138 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2139 return rc;
2140}
2141
2142
2143/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2144static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2145{
2146 PDMDEV_ASSERT_DEVINS(pDevIns);
2147 PVM pVM = pDevIns->Internal.s.pVMR3;
2148 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2149 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2150
2151#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2152 if (!VM_IS_EMT(pVM))
2153 {
2154 char szNames[128];
2155 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2156 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2157 }
2158#endif
2159
2160 int rc;
2161 if (VM_IS_EMT(pVM))
2162 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
2163 else
2164 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
2165
2166 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2167 return rc;
2168}
2169
2170
2171/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2172static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2173{
2174 PDMDEV_ASSERT_DEVINS(pDevIns);
2175 PVM pVM = pDevIns->Internal.s.pVMR3;
2176 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2177 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2178
2179#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2180 if (!VM_IS_EMT(pVM))
2181 {
2182 char szNames[128];
2183 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2184 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2185 }
2186#endif
2187
2188 int rc;
2189 if (VM_IS_EMT(pVM))
2190 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
2191 else
2192 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pDevReg->szDeviceName);
2193
2194 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2195 return rc;
2196}
2197
2198
2199/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2200static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2201{
2202 PDMDEV_ASSERT_DEVINS(pDevIns);
2203 PVM pVM = pDevIns->Internal.s.pVMR3;
2204 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2205 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2206 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2207
2208#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2209 if (!VM_IS_EMT(pVM))
2210 {
2211 char szNames[128];
2212 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2213 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2214 }
2215#endif
2216
2217 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
2218
2219 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2220 return rc;
2221}
2222
2223
2224/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2225static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2226{
2227 PDMDEV_ASSERT_DEVINS(pDevIns);
2228 PVM pVM = pDevIns->Internal.s.pVMR3;
2229 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2230 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2231 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2232
2233#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2234 if (!VM_IS_EMT(pVM))
2235 {
2236 char szNames[128];
2237 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2238 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2239 }
2240#endif
2241
2242 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
2243
2244 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2245 return rc;
2246}
2247
2248
2249/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2250static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2251{
2252 PDMDEV_ASSERT_DEVINS(pDevIns);
2253 PVM pVM = pDevIns->Internal.s.pVMR3;
2254 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
2255 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pLock));
2256
2257 PGMPhysReleasePageMappingLock(pVM, pLock);
2258
2259 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2260}
2261
2262
2263/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2264static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2265{
2266 PDMDEV_ASSERT_DEVINS(pDevIns);
2267 PVM pVM = pDevIns->Internal.s.pVMR3;
2268 VM_ASSERT_EMT(pVM);
2269 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2270 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2271
2272 PVMCPU pVCpu = VMMGetCpu(pVM);
2273 if (!pVCpu)
2274 return VERR_ACCESS_DENIED;
2275#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2276 /** @todo SMP. */
2277#endif
2278
2279 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
2280
2281 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2282
2283 return rc;
2284}
2285
2286
2287/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2288static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2289{
2290 PDMDEV_ASSERT_DEVINS(pDevIns);
2291 PVM pVM = pDevIns->Internal.s.pVMR3;
2292 VM_ASSERT_EMT(pVM);
2293 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2294 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2295
2296 PVMCPU pVCpu = VMMGetCpu(pVM);
2297 if (!pVCpu)
2298 return VERR_ACCESS_DENIED;
2299#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2300 /** @todo SMP. */
2301#endif
2302
2303 int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
2304
2305 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2306
2307 return rc;
2308}
2309
2310
2311/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2312static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2313{
2314 PDMDEV_ASSERT_DEVINS(pDevIns);
2315 PVM pVM = pDevIns->Internal.s.pVMR3;
2316 VM_ASSERT_EMT(pVM);
2317 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2318 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2319
2320 PVMCPU pVCpu = VMMGetCpu(pVM);
2321 if (!pVCpu)
2322 return VERR_ACCESS_DENIED;
2323#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2324 /** @todo SMP. */
2325#endif
2326
2327 int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
2328
2329 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pGCPhys));
2330
2331 return rc;
2332}
2333
2334
2335/** @copydoc PDMDEVHLPR3::pfnSetAsyncNotification */
2336static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
2337{
2338 PDMDEV_ASSERT_DEVINS(pDevIns);
2339 VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
2340 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pfnAsyncNotify));
2341
2342 int rc = VINF_SUCCESS;
2343 AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
2344 AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
2345 AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED | PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
2346 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2347 AssertStmt( enmVMState == VMSTATE_SUSPENDING
2348 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
2349 || enmVMState == VMSTATE_SUSPENDING_LS
2350 || enmVMState == VMSTATE_RESETTING
2351 || enmVMState == VMSTATE_RESETTING_LS
2352 || enmVMState == VMSTATE_POWERING_OFF
2353 || enmVMState == VMSTATE_POWERING_OFF_LS,
2354 rc = VERR_INVALID_STATE);
2355
2356 if (RT_SUCCESS(rc))
2357 pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
2358
2359 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2360 return rc;
2361}
2362
2363
2364/** @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted */
2365static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
2366{
2367 PDMDEV_ASSERT_DEVINS(pDevIns);
2368 PVM pVM = pDevIns->Internal.s.pVMR3;
2369
2370 VMSTATE enmVMState = VMR3GetState(pVM);
2371 if ( enmVMState == VMSTATE_SUSPENDING
2372 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
2373 || enmVMState == VMSTATE_SUSPENDING_LS
2374 || enmVMState == VMSTATE_RESETTING
2375 || enmVMState == VMSTATE_RESETTING_LS
2376 || enmVMState == VMSTATE_POWERING_OFF
2377 || enmVMState == VMSTATE_POWERING_OFF_LS)
2378 {
2379 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2380 VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
2381 }
2382 else
2383 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmVMState));
2384}
2385
2386
2387/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2388static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2389{
2390 PDMDEV_ASSERT_DEVINS(pDevIns);
2391 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2392
2393 bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
2394
2395 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2396 return fRc;
2397}
2398
2399
2400/** @copydoc PDMDEVHLPR3::pfnA20Set */
2401static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2402{
2403 PDMDEV_ASSERT_DEVINS(pDevIns);
2404 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2405 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2406 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
2407}
2408
2409
2410/** @copydoc PDMDEVHLPR3::pfnVMReset */
2411static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2412{
2413 PDMDEV_ASSERT_DEVINS(pDevIns);
2414 PVM pVM = pDevIns->Internal.s.pVMR3;
2415 VM_ASSERT_EMT(pVM);
2416 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2417 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2418
2419 /*
2420 * We postpone this operation because we're likely to be inside a I/O instruction
2421 * and the EIP will be updated when we return.
2422 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2423 */
2424 bool fHaltOnReset;
2425 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2426 if (RT_SUCCESS(rc) && fHaltOnReset)
2427 {
2428 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2429 rc = VINF_EM_HALT;
2430 }
2431 else
2432 {
2433 VM_FF_SET(pVM, VM_FF_RESET);
2434 rc = VINF_EM_RESET;
2435 }
2436
2437 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2438 return rc;
2439}
2440
2441
2442/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2443static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2444{
2445 int rc;
2446 PDMDEV_ASSERT_DEVINS(pDevIns);
2447 PVM pVM = pDevIns->Internal.s.pVMR3;
2448 VM_ASSERT_EMT(pVM);
2449 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2450 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2451
2452 if (pVM->cCpus > 1)
2453 {
2454 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2455 rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
2456 AssertRC(rc);
2457 rc = VINF_EM_SUSPEND;
2458 }
2459 else
2460 rc = VMR3Suspend(pVM);
2461
2462 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2463 return rc;
2464}
2465
2466
2467/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2468static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2469{
2470 int rc;
2471 PDMDEV_ASSERT_DEVINS(pDevIns);
2472 PVM pVM = pDevIns->Internal.s.pVMR3;
2473 VM_ASSERT_EMT(pVM);
2474 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2475 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2476
2477 if (pVM->cCpus > 1)
2478 {
2479 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2480 rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
2481 AssertRC(rc);
2482 /* Set the VCPU state to stopped here as well to make sure no
2483 * inconsistency with the EM state occurs.
2484 */
2485 VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
2486 rc = VINF_EM_OFF;
2487 }
2488 else
2489 rc = VMR3PowerOff(pVM);
2490
2491 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2492 return rc;
2493}
2494
2495/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2496static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2497{
2498 PDMDEV_ASSERT_DEVINS(pDevIns);
2499 PVM pVM = pDevIns->Internal.s.pVMR3;
2500 VM_ASSERT_EMT(pVM);
2501 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2502 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2503 int rc = VINF_SUCCESS;
2504 if (pVM->pdm.s.pDmac)
2505 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2506 else
2507 {
2508 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2509 rc = VERR_PDM_NO_DMAC_INSTANCE;
2510 }
2511 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2512 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2513 return rc;
2514}
2515
2516/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2517static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
2518{
2519 PDMDEV_ASSERT_DEVINS(pDevIns);
2520 PVM pVM = pDevIns->Internal.s.pVMR3;
2521 VM_ASSERT_EMT(pVM);
2522 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2523 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2524 int rc = VINF_SUCCESS;
2525 if (pVM->pdm.s.pDmac)
2526 {
2527 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2528 if (pcbRead)
2529 *pcbRead = cb;
2530 }
2531 else
2532 {
2533 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2534 rc = VERR_PDM_NO_DMAC_INSTANCE;
2535 }
2536 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2537 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2538 return rc;
2539}
2540
2541/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2542static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
2543{
2544 PDMDEV_ASSERT_DEVINS(pDevIns);
2545 PVM pVM = pDevIns->Internal.s.pVMR3;
2546 VM_ASSERT_EMT(pVM);
2547 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2548 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2549 int rc = VINF_SUCCESS;
2550 if (pVM->pdm.s.pDmac)
2551 {
2552 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2553 if (pcbWritten)
2554 *pcbWritten = cb;
2555 }
2556 else
2557 {
2558 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2559 rc = VERR_PDM_NO_DMAC_INSTANCE;
2560 }
2561 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2562 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2563 return rc;
2564}
2565
2566/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2567static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2568{
2569 PDMDEV_ASSERT_DEVINS(pDevIns);
2570 PVM pVM = pDevIns->Internal.s.pVMR3;
2571 VM_ASSERT_EMT(pVM);
2572 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2573 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2574 int rc = VINF_SUCCESS;
2575 if (pVM->pdm.s.pDmac)
2576 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2577 else
2578 {
2579 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2580 rc = VERR_PDM_NO_DMAC_INSTANCE;
2581 }
2582 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2583 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2584 return rc;
2585}
2586
2587/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2588static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2589{
2590 PDMDEV_ASSERT_DEVINS(pDevIns);
2591 PVM pVM = pDevIns->Internal.s.pVMR3;
2592 VM_ASSERT_EMT(pVM);
2593 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2594 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2595 uint8_t u8Mode;
2596 if (pVM->pdm.s.pDmac)
2597 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2598 else
2599 {
2600 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2601 u8Mode = 3 << 2 /* illegal mode type */;
2602 }
2603 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2604 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2605 return u8Mode;
2606}
2607
2608/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2609static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2610{
2611 PDMDEV_ASSERT_DEVINS(pDevIns);
2612 PVM pVM = pDevIns->Internal.s.pVMR3;
2613 VM_ASSERT_EMT(pVM);
2614 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2615 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2616
2617 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2618 VM_FF_SET(pVM, VM_FF_PDM_DMA);
2619 REMR3NotifyDmaPending(pVM);
2620 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
2621}
2622
2623
2624/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2625static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2626{
2627 PDMDEV_ASSERT_DEVINS(pDevIns);
2628 PVM pVM = pDevIns->Internal.s.pVMR3;
2629 VM_ASSERT_EMT(pVM);
2630
2631 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2632 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2633 int rc;
2634 if (pVM->pdm.s.pRtc)
2635 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2636 else
2637 rc = VERR_PDM_NO_RTC_INSTANCE;
2638
2639 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2640 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2641 return rc;
2642}
2643
2644
2645/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2646static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2647{
2648 PDMDEV_ASSERT_DEVINS(pDevIns);
2649 PVM pVM = pDevIns->Internal.s.pVMR3;
2650 VM_ASSERT_EMT(pVM);
2651
2652 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2653 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2654 int rc;
2655 if (pVM->pdm.s.pRtc)
2656 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2657 else
2658 rc = VERR_PDM_NO_RTC_INSTANCE;
2659
2660 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2661 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2662 return rc;
2663}
2664
2665
2666/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2667static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2668 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
2669{
2670 PDMDEV_ASSERT_DEVINS(pDevIns);
2671 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2672
2673 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2674 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2675 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2676
2677 CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
2678
2679 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
2680 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
2681}
2682
2683
2684/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2685static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
2686{
2687 PDMDEV_ASSERT_DEVINS(pDevIns);
2688 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
2689 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
2690
2691 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
2692
2693 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2694 return rc;
2695}
2696
2697
2698/**
2699 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
2700 */
2701static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
2702{
2703 PDMDEV_ASSERT_DEVINS(pDevIns);
2704 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2705 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2706 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2707
2708/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
2709 * use a real string cache. */
2710 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2711
2712 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2713 return rc;
2714}
2715
2716
2717/**
2718 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2719 */
2720static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2721{
2722 PDMDEV_ASSERT_DEVINS(pDevIns);
2723 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2724 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
2725 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2726
2727 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2728
2729 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2730
2731 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2732 return rc;
2733}
2734
2735
2736/**
2737 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
2738 */
2739static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2740{
2741 PDMDEV_ASSERT_DEVINS(pDevIns);
2742 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2743 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
2744 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2745
2746 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2747
2748 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2749 return rc;
2750}
2751
2752
2753/**
2754 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2755 */
2756static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2757{
2758 PDMDEV_ASSERT_DEVINS(pDevIns);
2759 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2760 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
2761 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2762
2763 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2764
2765 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2766 return rc;
2767}
2768
2769
2770/**
2771 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2772 */
2773static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2774 const char *pszDesc, PRTRCPTR pRCPtr)
2775{
2776 PDMDEV_ASSERT_DEVINS(pDevIns);
2777 PVM pVM = pDevIns->Internal.s.pVMR3;
2778 VM_ASSERT_EMT(pVM);
2779 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2780 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2781
2782 if (pDevIns->iInstance > 0)
2783 {
2784 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
2785 if (pszDesc2)
2786 pszDesc = pszDesc2;
2787 }
2788
2789 int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2790
2791 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pRCPtr));
2792 return rc;
2793}
2794
2795
2796/**
2797 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2798 */
2799static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2800 const char *pszDesc, PRTR0PTR pR0Ptr)
2801{
2802 PDMDEV_ASSERT_DEVINS(pDevIns);
2803 PVM pVM = pDevIns->Internal.s.pVMR3;
2804 VM_ASSERT_EMT(pVM);
2805 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2806 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2807
2808 if (pDevIns->iInstance > 0)
2809 {
2810 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
2811 if (pszDesc2)
2812 pszDesc = pszDesc2;
2813 }
2814
2815 int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2816
2817 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pR0Ptr));
2818 return rc;
2819}
2820
2821
2822/**
2823 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2824 */
2825static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2826{
2827 PDMDEV_ASSERT_DEVINS(pDevIns);
2828 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2829
2830 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2831 return rc;
2832}
2833
2834
2835/**
2836 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2837 */
2838static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2839{
2840 PDMDEV_ASSERT_DEVINS(pDevIns);
2841 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2842
2843 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2844 return rc;
2845}
2846
2847
2848/**
2849 * The device helper structure for trusted devices.
2850 */
2851const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2852{
2853 PDM_DEVHLP_VERSION,
2854 pdmR3DevHlp_IOPortRegister,
2855 pdmR3DevHlp_IOPortRegisterGC,
2856 pdmR3DevHlp_IOPortRegisterR0,
2857 pdmR3DevHlp_IOPortDeregister,
2858 pdmR3DevHlp_MMIORegister,
2859 pdmR3DevHlp_MMIORegisterGC,
2860 pdmR3DevHlp_MMIORegisterR0,
2861 pdmR3DevHlp_MMIODeregister,
2862 pdmR3DevHlp_ROMRegister,
2863 pdmR3DevHlp_SSMRegister,
2864 pdmR3DevHlp_TMTimerCreate,
2865 pdmR3DevHlp_PCIRegister,
2866 pdmR3DevHlp_PCIIORegionRegister,
2867 pdmR3DevHlp_PCISetConfigCallbacks,
2868 pdmR3DevHlp_PCISetIrq,
2869 pdmR3DevHlp_PCISetIrqNoWait,
2870 pdmR3DevHlp_ISASetIrq,
2871 pdmR3DevHlp_ISASetIrqNoWait,
2872 pdmR3DevHlp_DriverAttach,
2873 pdmR3DevHlp_MMHeapAlloc,
2874 pdmR3DevHlp_MMHeapAllocZ,
2875 pdmR3DevHlp_MMHeapFree,
2876 pdmR3DevHlp_VMSetError,
2877 pdmR3DevHlp_VMSetErrorV,
2878 pdmR3DevHlp_VMSetRuntimeError,
2879 pdmR3DevHlp_VMSetRuntimeErrorV,
2880 pdmR3DevHlp_VMState,
2881 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
2882 pdmR3DevHlp_AssertEMT,
2883 pdmR3DevHlp_AssertOther,
2884 pdmR3DevHlp_DBGFStopV,
2885 pdmR3DevHlp_DBGFInfoRegister,
2886 pdmR3DevHlp_STAMRegister,
2887 pdmR3DevHlp_STAMRegisterF,
2888 pdmR3DevHlp_STAMRegisterV,
2889 pdmR3DevHlp_RTCRegister,
2890 pdmR3DevHlp_PDMQueueCreate,
2891 pdmR3DevHlp_CritSectInit,
2892 pdmR3DevHlp_UTCNow,
2893 pdmR3DevHlp_PDMThreadCreate,
2894 pdmR3DevHlp_PhysGCPtr2GCPhys,
2895 pdmR3DevHlp_SetAsyncNotification,
2896 pdmR3DevHlp_AsyncNotificationCompleted,
2897 0,
2898 0,
2899 0,
2900 0,
2901 0,
2902 0,
2903 0,
2904 0,
2905 0,
2906 0,
2907 pdmR3DevHlp_GetVM,
2908 pdmR3DevHlp_PCIBusRegister,
2909 pdmR3DevHlp_PICRegister,
2910 pdmR3DevHlp_APICRegister,
2911 pdmR3DevHlp_IOAPICRegister,
2912 pdmR3DevHlp_DMACRegister,
2913 pdmR3DevHlp_PhysRead,
2914 pdmR3DevHlp_PhysWrite,
2915 pdmR3DevHlp_PhysGCPhys2CCPtr,
2916 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2917 pdmR3DevHlp_PhysReleasePageMappingLock,
2918 pdmR3DevHlp_PhysReadGCVirt,
2919 pdmR3DevHlp_PhysWriteGCVirt,
2920 pdmR3DevHlp_A20IsEnabled,
2921 pdmR3DevHlp_A20Set,
2922 pdmR3DevHlp_VMReset,
2923 pdmR3DevHlp_VMSuspend,
2924 pdmR3DevHlp_VMPowerOff,
2925 pdmR3DevHlp_DMARegister,
2926 pdmR3DevHlp_DMAReadMemory,
2927 pdmR3DevHlp_DMAWriteMemory,
2928 pdmR3DevHlp_DMASetDREQ,
2929 pdmR3DevHlp_DMAGetChannelMode,
2930 pdmR3DevHlp_DMASchedule,
2931 pdmR3DevHlp_CMOSWrite,
2932 pdmR3DevHlp_CMOSRead,
2933 pdmR3DevHlp_GetCpuId,
2934 pdmR3DevHlp_ROMProtectShadow,
2935 pdmR3DevHlp_MMIO2Register,
2936 pdmR3DevHlp_MMIO2Deregister,
2937 pdmR3DevHlp_MMIO2Map,
2938 pdmR3DevHlp_MMIO2Unmap,
2939 pdmR3DevHlp_MMHyperMapMMIO2,
2940 pdmR3DevHlp_MMIO2MapKernel,
2941 pdmR3DevHlp_RegisterVMMDevHeap,
2942 pdmR3DevHlp_UnregisterVMMDevHeap,
2943 pdmR3DevHlp_GetVMCPU,
2944 PDM_DEVHLP_VERSION /* the end */
2945};
2946
2947
2948
2949
2950/** @copydoc PDMDEVHLPR3::pfnGetVM */
2951static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2952{
2953 PDMDEV_ASSERT_DEVINS(pDevIns);
2954 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2955 return NULL;
2956}
2957
2958
2959/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2960static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2961{
2962 PDMDEV_ASSERT_DEVINS(pDevIns);
2963 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2964 NOREF(pPciBusReg);
2965 NOREF(ppPciHlpR3);
2966 return VERR_ACCESS_DENIED;
2967}
2968
2969
2970/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2971static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2972{
2973 PDMDEV_ASSERT_DEVINS(pDevIns);
2974 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2975 NOREF(pPicReg);
2976 NOREF(ppPicHlpR3);
2977 return VERR_ACCESS_DENIED;
2978}
2979
2980
2981/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2982static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2983{
2984 PDMDEV_ASSERT_DEVINS(pDevIns);
2985 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2986 NOREF(pApicReg);
2987 NOREF(ppApicHlpR3);
2988 return VERR_ACCESS_DENIED;
2989}
2990
2991
2992/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2993static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2994{
2995 PDMDEV_ASSERT_DEVINS(pDevIns);
2996 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2997 NOREF(pIoApicReg);
2998 NOREF(ppIoApicHlpR3);
2999 return VERR_ACCESS_DENIED;
3000}
3001
3002
3003/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
3004static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3005{
3006 PDMDEV_ASSERT_DEVINS(pDevIns);
3007 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3008 NOREF(pDmacReg);
3009 NOREF(ppDmacHlp);
3010 return VERR_ACCESS_DENIED;
3011}
3012
3013
3014/** @copydoc PDMDEVHLPR3::pfnPhysRead */
3015static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3016{
3017 PDMDEV_ASSERT_DEVINS(pDevIns);
3018 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3019 NOREF(GCPhys);
3020 NOREF(pvBuf);
3021 NOREF(cbRead);
3022 return VERR_ACCESS_DENIED;
3023}
3024
3025
3026/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
3027static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3028{
3029 PDMDEV_ASSERT_DEVINS(pDevIns);
3030 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3031 NOREF(GCPhys);
3032 NOREF(pvBuf);
3033 NOREF(cbWrite);
3034 return VERR_ACCESS_DENIED;
3035}
3036
3037
3038/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
3039static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
3040{
3041 PDMDEV_ASSERT_DEVINS(pDevIns);
3042 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3043 NOREF(GCPhys);
3044 NOREF(fFlags);
3045 NOREF(ppv);
3046 NOREF(pLock);
3047 return VERR_ACCESS_DENIED;
3048}
3049
3050
3051/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
3052static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
3053{
3054 PDMDEV_ASSERT_DEVINS(pDevIns);
3055 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3056 NOREF(GCPhys);
3057 NOREF(fFlags);
3058 NOREF(ppv);
3059 NOREF(pLock);
3060 return VERR_ACCESS_DENIED;
3061}
3062
3063
3064/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
3065static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
3066{
3067 PDMDEV_ASSERT_DEVINS(pDevIns);
3068 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3069 NOREF(pLock);
3070}
3071
3072
3073/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
3074static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3075{
3076 PDMDEV_ASSERT_DEVINS(pDevIns);
3077 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3078 NOREF(pvDst);
3079 NOREF(GCVirtSrc);
3080 NOREF(cb);
3081 return VERR_ACCESS_DENIED;
3082}
3083
3084
3085/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
3086static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3087{
3088 PDMDEV_ASSERT_DEVINS(pDevIns);
3089 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3090 NOREF(GCVirtDst);
3091 NOREF(pvSrc);
3092 NOREF(cb);
3093 return VERR_ACCESS_DENIED;
3094}
3095
3096
3097/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
3098static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3099{
3100 PDMDEV_ASSERT_DEVINS(pDevIns);
3101 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3102 return false;
3103}
3104
3105
3106/** @copydoc PDMDEVHLPR3::pfnA20Set */
3107static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3108{
3109 PDMDEV_ASSERT_DEVINS(pDevIns);
3110 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3111 NOREF(fEnable);
3112}
3113
3114
3115/** @copydoc PDMDEVHLPR3::pfnVMReset */
3116static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3117{
3118 PDMDEV_ASSERT_DEVINS(pDevIns);
3119 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3120 return VERR_ACCESS_DENIED;
3121}
3122
3123
3124/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
3125static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3126{
3127 PDMDEV_ASSERT_DEVINS(pDevIns);
3128 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3129 return VERR_ACCESS_DENIED;
3130}
3131
3132
3133/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
3134static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3135{
3136 PDMDEV_ASSERT_DEVINS(pDevIns);
3137 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3138 return VERR_ACCESS_DENIED;
3139}
3140
3141/** @copydoc PDMDEVHLPR3::pfnDMARegister */
3142static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3143{
3144 PDMDEV_ASSERT_DEVINS(pDevIns);
3145 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3146 return VERR_ACCESS_DENIED;
3147}
3148
3149
3150/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
3151static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3152{
3153 PDMDEV_ASSERT_DEVINS(pDevIns);
3154 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3155 if (pcbRead)
3156 *pcbRead = 0;
3157 return VERR_ACCESS_DENIED;
3158}
3159
3160
3161/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
3162static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3163{
3164 PDMDEV_ASSERT_DEVINS(pDevIns);
3165 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3166 if (pcbWritten)
3167 *pcbWritten = 0;
3168 return VERR_ACCESS_DENIED;
3169}
3170
3171
3172/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
3173static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3174{
3175 PDMDEV_ASSERT_DEVINS(pDevIns);
3176 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3177 return VERR_ACCESS_DENIED;
3178}
3179
3180
3181/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
3182static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3183{
3184 PDMDEV_ASSERT_DEVINS(pDevIns);
3185 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3186 return 3 << 2 /* illegal mode type */;
3187}
3188
3189
3190/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3191static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3192{
3193 PDMDEV_ASSERT_DEVINS(pDevIns);
3194 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3195}
3196
3197
3198/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3199static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3200{
3201 PDMDEV_ASSERT_DEVINS(pDevIns);
3202 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3203 return VERR_ACCESS_DENIED;
3204}
3205
3206
3207/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3208static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3209{
3210 PDMDEV_ASSERT_DEVINS(pDevIns);
3211 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3212 return VERR_ACCESS_DENIED;
3213}
3214
3215
3216/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3217static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3218 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3219{
3220 PDMDEV_ASSERT_DEVINS(pDevIns);
3221 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3222}
3223
3224
3225/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3226static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3227{
3228 PDMDEV_ASSERT_DEVINS(pDevIns);
3229 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3230 return VERR_ACCESS_DENIED;
3231}
3232
3233
3234/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3235static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3236{
3237 PDMDEV_ASSERT_DEVINS(pDevIns);
3238 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3239 return VERR_ACCESS_DENIED;
3240}
3241
3242
3243/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3244static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3245{
3246 PDMDEV_ASSERT_DEVINS(pDevIns);
3247 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3248 return VERR_ACCESS_DENIED;
3249}
3250
3251
3252/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3253static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3254{
3255 PDMDEV_ASSERT_DEVINS(pDevIns);
3256 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3257 return VERR_ACCESS_DENIED;
3258}
3259
3260
3261/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3262static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3263{
3264 PDMDEV_ASSERT_DEVINS(pDevIns);
3265 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3266 return VERR_ACCESS_DENIED;
3267}
3268
3269
3270/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3271static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3272{
3273 PDMDEV_ASSERT_DEVINS(pDevIns);
3274 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3275 return VERR_ACCESS_DENIED;
3276}
3277
3278
3279/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3280static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3281{
3282 PDMDEV_ASSERT_DEVINS(pDevIns);
3283 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3284 return VERR_ACCESS_DENIED;
3285}
3286
3287
3288/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3289static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3290{
3291 PDMDEV_ASSERT_DEVINS(pDevIns);
3292 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3293 return VERR_ACCESS_DENIED;
3294}
3295
3296
3297/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3298static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3299{
3300 PDMDEV_ASSERT_DEVINS(pDevIns);
3301 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3302 return VERR_ACCESS_DENIED;
3303}
3304
3305
3306/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
3307static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3308{
3309 PDMDEV_ASSERT_DEVINS(pDevIns);
3310 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3311 return NULL;
3312}
3313
3314
3315/**
3316 * The device helper structure for non-trusted devices.
3317 */
3318const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3319{
3320 PDM_DEVHLP_VERSION,
3321 pdmR3DevHlp_IOPortRegister,
3322 pdmR3DevHlp_IOPortRegisterGC,
3323 pdmR3DevHlp_IOPortRegisterR0,
3324 pdmR3DevHlp_IOPortDeregister,
3325 pdmR3DevHlp_MMIORegister,
3326 pdmR3DevHlp_MMIORegisterGC,
3327 pdmR3DevHlp_MMIORegisterR0,
3328 pdmR3DevHlp_MMIODeregister,
3329 pdmR3DevHlp_ROMRegister,
3330 pdmR3DevHlp_SSMRegister,
3331 pdmR3DevHlp_TMTimerCreate,
3332 pdmR3DevHlp_PCIRegister,
3333 pdmR3DevHlp_PCIIORegionRegister,
3334 pdmR3DevHlp_PCISetConfigCallbacks,
3335 pdmR3DevHlp_PCISetIrq,
3336 pdmR3DevHlp_PCISetIrqNoWait,
3337 pdmR3DevHlp_ISASetIrq,
3338 pdmR3DevHlp_ISASetIrqNoWait,
3339 pdmR3DevHlp_DriverAttach,
3340 pdmR3DevHlp_MMHeapAlloc,
3341 pdmR3DevHlp_MMHeapAllocZ,
3342 pdmR3DevHlp_MMHeapFree,
3343 pdmR3DevHlp_VMSetError,
3344 pdmR3DevHlp_VMSetErrorV,
3345 pdmR3DevHlp_VMSetRuntimeError,
3346 pdmR3DevHlp_VMSetRuntimeErrorV,
3347 pdmR3DevHlp_VMState,
3348 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3349 pdmR3DevHlp_AssertEMT,
3350 pdmR3DevHlp_AssertOther,
3351 pdmR3DevHlp_DBGFStopV,
3352 pdmR3DevHlp_DBGFInfoRegister,
3353 pdmR3DevHlp_STAMRegister,
3354 pdmR3DevHlp_STAMRegisterF,
3355 pdmR3DevHlp_STAMRegisterV,
3356 pdmR3DevHlp_RTCRegister,
3357 pdmR3DevHlp_PDMQueueCreate,
3358 pdmR3DevHlp_CritSectInit,
3359 pdmR3DevHlp_UTCNow,
3360 pdmR3DevHlp_PDMThreadCreate,
3361 pdmR3DevHlp_PhysGCPtr2GCPhys,
3362 pdmR3DevHlp_SetAsyncNotification,
3363 pdmR3DevHlp_AsyncNotificationCompleted,
3364 0,
3365 0,
3366 0,
3367 0,
3368 0,
3369 0,
3370 0,
3371 0,
3372 0,
3373 0,
3374 pdmR3DevHlp_Untrusted_GetVM,
3375 pdmR3DevHlp_Untrusted_PCIBusRegister,
3376 pdmR3DevHlp_Untrusted_PICRegister,
3377 pdmR3DevHlp_Untrusted_APICRegister,
3378 pdmR3DevHlp_Untrusted_IOAPICRegister,
3379 pdmR3DevHlp_Untrusted_DMACRegister,
3380 pdmR3DevHlp_Untrusted_PhysRead,
3381 pdmR3DevHlp_Untrusted_PhysWrite,
3382 pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr,
3383 pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly,
3384 pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock,
3385 pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3386 pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3387 pdmR3DevHlp_Untrusted_A20IsEnabled,
3388 pdmR3DevHlp_Untrusted_A20Set,
3389 pdmR3DevHlp_Untrusted_VMReset,
3390 pdmR3DevHlp_Untrusted_VMSuspend,
3391 pdmR3DevHlp_Untrusted_VMPowerOff,
3392 pdmR3DevHlp_Untrusted_DMARegister,
3393 pdmR3DevHlp_Untrusted_DMAReadMemory,
3394 pdmR3DevHlp_Untrusted_DMAWriteMemory,
3395 pdmR3DevHlp_Untrusted_DMASetDREQ,
3396 pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3397 pdmR3DevHlp_Untrusted_DMASchedule,
3398 pdmR3DevHlp_Untrusted_CMOSWrite,
3399 pdmR3DevHlp_Untrusted_CMOSRead,
3400 pdmR3DevHlp_Untrusted_GetCpuId,
3401 pdmR3DevHlp_Untrusted_ROMProtectShadow,
3402 pdmR3DevHlp_Untrusted_MMIO2Register,
3403 pdmR3DevHlp_Untrusted_MMIO2Deregister,
3404 pdmR3DevHlp_Untrusted_MMIO2Map,
3405 pdmR3DevHlp_Untrusted_MMIO2Unmap,
3406 pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3407 pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3408 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3409 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3410 pdmR3DevHlp_Untrusted_GetVMCPU,
3411 PDM_DEVHLP_VERSION /* the end */
3412};
3413
3414
3415
3416/**
3417 * Queue consumer callback for internal component.
3418 *
3419 * @returns Success indicator.
3420 * If false the item will not be removed and the flushing will stop.
3421 * @param pVM The VM handle.
3422 * @param pItem The item to consume. Upon return this item will be freed.
3423 */
3424DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3425{
3426 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3427 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3428 switch (pTask->enmOp)
3429 {
3430 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3431 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3432 break;
3433
3434 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3435 pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3436 break;
3437
3438 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3439 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3440 break;
3441
3442 default:
3443 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3444 break;
3445 }
3446 return true;
3447}
3448
3449/** @} */
3450
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