PDMDevHlp.cpp@ 25891

Last change on this file since 25891 was 25891, checked in by vboxsync, 15 years ago
PDMDrv,*: multi context drivers, part 1.
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1	/* $Id: PDMDevHlp.cpp 25891 2010-01-18 13:07:21Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, Device Helpers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27	#include "PDMInternal.h"
28	#include <VBox/pdm.h>
29	#include <VBox/mm.h>
30	#include <VBox/pgm.h>
31	#include <VBox/iom.h>
32	#include <VBox/rem.h>
33	#include <VBox/dbgf.h>
34	#include <VBox/vm.h>
35	#include <VBox/vmm.h>
36
37	#include <VBox/version.h>
38	#include <VBox/log.h>
39	#include <VBox/err.h>
40	#include <iprt/asm.h>
41	#include <iprt/assert.h>
42	#include <iprt/string.h>
43	#include <iprt/thread.h>
44
45
46	/*******************************************************************************
47	* Defined Constants And Macros *
48	*******************************************************************************/
49	/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50	* Define this to enable the deadlock detection when accessing physical memory.
51	*/
52	#if /defined(DEBUG_bird) \|\|/ defined(DOXYGEN_RUNNING)
53	# define PDM_DEVHLP_DEADLOCK_DETECTION /*< @todo enable DevHlp deadlock detection! /
54	#endif
55
56
57	/*******************************************************************************
58	* Defined Constants And Macros *
59	*******************************************************************************/
60	/** @name R3 DevHlp
61	* @{
62	*/
63
64
65	/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
66	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67	PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68	{
69	PDMDEV_ASSERT_DEVINS(pDevIns);
70	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
71	Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74	#if 0 /** @todo needs a real string cache for this */
75	if (pDevIns->iInstance > 0)
76	{
77	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
78	if (pszDesc2)
79	pszDesc = pszDesc2;
80	}
81	#endif
82
83	int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
84
85	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
86	return rc;
87	}
88
89
90	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
91	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
92	const char pszOut, const char pszIn,
93	const char pszOutStr, const char pszInStr, const char *pszDesc)
94	{
95	PDMDEV_ASSERT_DEVINS(pDevIns);
96	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
98	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
99
100	/*
101	* Resolve the functions (one of the can be NULL).
102	*/
103	int rc = VINF_SUCCESS;
104	if ( pDevIns->pDevReg->szRCMod[0]
105	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
106	{
107	RTRCPTR RCPtrIn = NIL_RTRCPTR;
108	if (pszIn)
109	{
110	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
111	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
112	}
113	RTRCPTR RCPtrOut = NIL_RTRCPTR;
114	if (pszOut && RT_SUCCESS(rc))
115	{
116	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
117	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
118	}
119	RTRCPTR RCPtrInStr = NIL_RTRCPTR;
120	if (pszInStr && RT_SUCCESS(rc))
121	{
122	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
123	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
124	}
125	RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
126	if (pszOutStr && RT_SUCCESS(rc))
127	{
128	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
129	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
130	}
131
132	if (RT_SUCCESS(rc))
133	{
134	#if 0 /** @todo needs a real string cache for this */
135	if (pDevIns->iInstance > 0)
136	{
137	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
138	if (pszDesc2)
139	pszDesc = pszDesc2;
140	}
141	#endif
142
143	rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
144	}
145	}
146	else
147	{
148	AssertMsgFailed(("No GC module for this driver!\n"));
149	rc = VERR_INVALID_PARAMETER;
150	}
151
152	LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
153	return rc;
154	}
155
156
157	/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
158	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
159	const char pszOut, const char pszIn,
160	const char pszOutStr, const char pszInStr, const char *pszDesc)
161	{
162	PDMDEV_ASSERT_DEVINS(pDevIns);
163	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
164	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
165	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
166
167	/*
168	* Resolve the functions (one of the can be NULL).
169	*/
170	int rc = VINF_SUCCESS;
171	if ( pDevIns->pDevReg->szR0Mod[0]
172	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
173	{
174	R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
175	if (pszIn)
176	{
177	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
178	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
179	}
180	R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
181	if (pszOut && RT_SUCCESS(rc))
182	{
183	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
184	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
185	}
186	R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
187	if (pszInStr && RT_SUCCESS(rc))
188	{
189	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
190	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
191	}
192	R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
193	if (pszOutStr && RT_SUCCESS(rc))
194	{
195	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
196	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
197	}
198
199	if (RT_SUCCESS(rc))
200	{
201	#if 0 /** @todo needs a real string cache for this */
202	if (pDevIns->iInstance > 0)
203	{
204	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
205	if (pszDesc2)
206	pszDesc = pszDesc2;
207	}
208	#endif
209
210	rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
211	}
212	}
213	else
214	{
215	AssertMsgFailed(("No R0 module for this driver!\n"));
216	rc = VERR_INVALID_PARAMETER;
217	}
218
219	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
220	return rc;
221	}
222
223
224	/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
225	static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
226	{
227	PDMDEV_ASSERT_DEVINS(pDevIns);
228	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
229	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
230	Port, cPorts));
231
232	int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
233
234	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
235	return rc;
236	}
237
238
239	/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
240	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
241	PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
242	const char *pszDesc)
243	{
244	PDMDEV_ASSERT_DEVINS(pDevIns);
245	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
246	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
247	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
248
249	/** @todo IOMR3MMIORegisterR3 mangles the description, move it here. */
250	int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
251
252	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
253	return rc;
254	}
255
256
257	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
258	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
259	const char pszWrite, const char pszRead, const char *pszFill,
260	const char *pszDesc)
261	{
262	PDMDEV_ASSERT_DEVINS(pDevIns);
263	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
264	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
265	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
266
267	/** @todo pszDesc is unused here, drop it. */
268
269	/*
270	* Resolve the functions.
271	* Not all function have to present, leave it to IOM to enforce this.
272	*/
273	int rc = VINF_SUCCESS;
274	if ( pDevIns->pDevReg->szRCMod[0]
275	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
276	{
277	RTRCPTR RCPtrWrite = NIL_RTRCPTR;
278	if (pszWrite)
279	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
280
281	RTRCPTR RCPtrRead = NIL_RTRCPTR;
282	int rc2 = VINF_SUCCESS;
283	if (pszRead)
284	rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
285
286	RTRCPTR RCPtrFill = NIL_RTRCPTR;
287	int rc3 = VINF_SUCCESS;
288	if (pszFill)
289	rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
290
291	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
292	rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
293	else
294	{
295	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
296	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
297	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
298	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
299	rc = rc2;
300	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
301	rc = rc3;
302	}
303	}
304	else
305	{
306	AssertMsgFailed(("No GC module for this driver!\n"));
307	rc = VERR_INVALID_PARAMETER;
308	}
309
310	LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
311	return rc;
312	}
313
314	/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
315	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
316	const char pszWrite, const char pszRead, const char *pszFill,
317	const char *pszDesc)
318	{
319	PDMDEV_ASSERT_DEVINS(pDevIns);
320	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
321	LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
322	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
323
324	/** @todo pszDesc is unused here, remove it. */
325
326	/*
327	* Resolve the functions.
328	* Not all function have to present, leave it to IOM to enforce this.
329	*/
330	int rc = VINF_SUCCESS;
331	if ( pDevIns->pDevReg->szR0Mod[0]
332	&& (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
333	{
334	R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
335	if (pszWrite)
336	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
337	R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
338	int rc2 = VINF_SUCCESS;
339	if (pszRead)
340	rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
341	R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
342	int rc3 = VINF_SUCCESS;
343	if (pszFill)
344	rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
345	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
346	rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
347	else
348	{
349	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
350	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
351	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
352	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
353	rc = rc2;
354	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
355	rc = rc3;
356	}
357	}
358	else
359	{
360	AssertMsgFailed(("No R0 module for this driver!\n"));
361	rc = VERR_INVALID_PARAMETER;
362	}
363
364	LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
365	return rc;
366	}
367
368
369	/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
370	static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
371	{
372	PDMDEV_ASSERT_DEVINS(pDevIns);
373	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
374	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
375	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
376
377	int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
378
379	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
380	return rc;
381	}
382
383
384	/** @copydoc PDMDEVHLPR3::pfnROMRegister */
385	static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void pvBinary, uint32_t fFlags, const char pszDesc)
386	{
387	PDMDEV_ASSERT_DEVINS(pDevIns);
388	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
389	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
390	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
391
392	/** @todo can we mangle pszDesc? */
393	int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
394
395	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
396	return rc;
397	}
398
399
400	/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
401	static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
402	PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
403	PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
404	PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
405	{
406	PDMDEV_ASSERT_DEVINS(pDevIns);
407	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
408	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
409	" pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
410	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
411	pfnLivePrep, pfnLiveExec, pfnLiveVote,
412	pfnSavePrep, pfnSaveExec, pfnSaveDone,
413	pfnLoadPrep, pfnLoadExec, pfnLoadDone));
414
415	int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
416	uVersion, cbGuess, pszBefore,
417	pfnLivePrep, pfnLiveExec, pfnLiveVote,
418	pfnSavePrep, pfnSaveExec, pfnSaveDone,
419	pfnLoadPrep, pfnLoadExec, pfnLoadDone);
420
421	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
422	return rc;
423	}
424
425
426	/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
427	static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void pvUser, uint32_t fFlags, const char pszDesc, PPTMTIMERR3 ppTimer)
428	{
429	PDMDEV_ASSERT_DEVINS(pDevIns);
430	PVM pVM = pDevIns->Internal.s.pVMR3;
431	VM_ASSERT_EMT(pVM);
432	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
433	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
434
435	if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
436	{
437	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
438	if (pszDesc2)
439	pszDesc = pszDesc2;
440	}
441
442	int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
443
444	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
445	return rc;
446	}
447
448
449	/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
450	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
451	{
452	PDMDEV_ASSERT_DEVINS(pDevIns);
453	PVM pVM = pDevIns->Internal.s.pVMR3;
454	VM_ASSERT_EMT(pVM);
455	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
456	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
457
458	/*
459	* Validate input.
460	*/
461	if (!pPciDev)
462	{
463	Assert(pPciDev);
464	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
465	return VERR_INVALID_PARAMETER;
466	}
467	if (!pPciDev->config[0] && !pPciDev->config[1])
468	{
469	Assert(pPciDev->config[0] \|\| pPciDev->config[1]);
470	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
471	return VERR_INVALID_PARAMETER;
472	}
473	if (pDevIns->Internal.s.pPciDeviceR3)
474	{
475	/** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
476	* support a PDM device with multiple PCI devices. This might become a problem
477	* when upgrading the chipset for instance because of multiple functions in some
478	* devices...
479	*/
480	AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
481	return VERR_INTERNAL_ERROR;
482	}
483
484	/*
485	* Choose the PCI bus for the device.
486	*
487	* This is simple. If the device was configured for a particular bus, the PCIBusNo
488	* configuration value will be set. If not the default bus is 0.
489	*/
490	int rc;
491	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
492	if (!pBus)
493	{
494	uint8_t u8Bus;
495	rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
496	AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
497	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
498	AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
499	("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
500	RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
501	VERR_PDM_NO_PCI_BUS);
502	pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
503	}
504	if (pBus->pDevInsR3)
505	{
506	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
507	pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
508	else
509	pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
510
511	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
512	pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
513	else
514	pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
515
516	/*
517	* Check the configuration for PCI device and function assignment.
518	*/
519	int iDev = -1;
520	uint8_t u8Device;
521	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
522	if (RT_SUCCESS(rc))
523	{
524	if (u8Device > 31)
525	{
526	AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
527	u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
528	return VERR_INTERNAL_ERROR;
529	}
530
531	uint8_t u8Function;
532	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
533	if (RT_FAILURE(rc))
534	{
535	AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
536	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
537	return rc;
538	}
539	if (u8Function > 7)
540	{
541	AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
542	u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
543	return VERR_INTERNAL_ERROR;
544	}
545	iDev = (u8Device << 3) \| u8Function;
546	}
547	else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
548	{
549	AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
550	rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
551	return rc;
552	}
553
554	/*
555	* Call the pci bus device to do the actual registration.
556	*/
557	pdmLock(pVM);
558	rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
559	pdmUnlock(pVM);
560	if (RT_SUCCESS(rc))
561	{
562	pPciDev->pDevIns = pDevIns;
563
564	pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
565	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
566	pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
567	else
568	pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
569
570	if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
571	pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
572	else
573	pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
574
575	Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
576	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
577	}
578	}
579	else
580	{
581	AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
582	rc = VERR_PDM_NO_PCI_BUS;
583	}
584
585	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
586	return rc;
587	}
588
589
590	/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
591	static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
592	{
593	PDMDEV_ASSERT_DEVINS(pDevIns);
594	PVM pVM = pDevIns->Internal.s.pVMR3;
595	VM_ASSERT_EMT(pVM);
596	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
597	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
598
599	/*
600	* Validate input.
601	*/
602	if (iRegion < 0 \|\| iRegion >= PCI_NUM_REGIONS)
603	{
604	Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
605	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
606	return VERR_INVALID_PARAMETER;
607	}
608	switch (enmType)
609	{
610	case PCI_ADDRESS_SPACE_IO:
611	/*
612	* Sanity check: don't allow to register more than 32K of the PCI I/O space.
613	*/
614	AssertMsgReturn(cbRegion <= _32K,
615	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
616	VERR_INVALID_PARAMETER);
617	break;
618
619	case PCI_ADDRESS_SPACE_MEM:
620	case PCI_ADDRESS_SPACE_MEM_PREFETCH:
621	/*
622	* Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
623	* now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
624	*/
625	AssertMsgReturn(cbRegion <= 512 * _1M,
626	("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
627	VERR_INVALID_PARAMETER);
628	break;
629	default:
630	AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
631	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
632	return VERR_INVALID_PARAMETER;
633	}
634	if (!pfnCallback)
635	{
636	Assert(pfnCallback);
637	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
638	return VERR_INVALID_PARAMETER;
639	}
640	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
641
642	/*
643	* Must have a PCI device registered!
644	*/
645	int rc;
646	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
647	if (pPciDev)
648	{
649	/*
650	* We're currently restricted to page aligned MMIO regions.
651	*/
652	if ( (enmType == PCI_ADDRESS_SPACE_MEM \|\| enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
653	&& cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
654	{
655	Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
656	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
657	cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
658	}
659
660	/*
661	* For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
662	*/
663	int iLastSet = ASMBitLastSetU32(cbRegion);
664	Assert(iLastSet > 0);
665	uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
666	if (cbRegion > cbRegionAligned)
667	cbRegion = cbRegionAligned * 2; /* round up */
668
669	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
670	Assert(pBus);
671	pdmLock(pVM);
672	rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
673	pdmUnlock(pVM);
674	}
675	else
676	{
677	AssertMsgFailed(("No PCI device registered!\n"));
678	rc = VERR_PDM_NOT_PCI_DEVICE;
679	}
680
681	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
682	return rc;
683	}
684
685
686	/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
687	static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
688	PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
689	{
690	PDMDEV_ASSERT_DEVINS(pDevIns);
691	PVM pVM = pDevIns->Internal.s.pVMR3;
692	VM_ASSERT_EMT(pVM);
693	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
694	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
695
696	/*
697	* Validate input and resolve defaults.
698	*/
699	AssertPtr(pfnRead);
700	AssertPtr(pfnWrite);
701	AssertPtrNull(ppfnReadOld);
702	AssertPtrNull(ppfnWriteOld);
703	AssertPtrNull(pPciDev);
704
705	if (!pPciDev)
706	pPciDev = pDevIns->Internal.s.pPciDeviceR3;
707	AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
708	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
709	AssertRelease(pBus);
710	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
711
712	/*
713	* Do the job.
714	*/
715	pdmLock(pVM);
716	pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
717	pdmUnlock(pVM);
718
719	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
720	}
721
722
723	/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
724	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
725	{
726	PDMDEV_ASSERT_DEVINS(pDevIns);
727	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
728
729	/*
730	* Validate input.
731	*/
732	/** @todo iIrq and iLevel checks. */
733
734	/*
735	* Must have a PCI device registered!
736	*/
737	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
738	if (pPciDev)
739	{
740	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
741	Assert(pBus);
742	PVM pVM = pDevIns->Internal.s.pVMR3;
743	pdmLock(pVM);
744	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
745	pdmUnlock(pVM);
746	}
747	else
748	AssertReleaseMsgFailed(("No PCI device registered!\n"));
749
750	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
751	}
752
753
754	/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
755	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
756	{
757	pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
758	}
759
760
761	/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
762	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
763	{
764	PDMDEV_ASSERT_DEVINS(pDevIns);
765	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
766
767	/*
768	* Validate input.
769	*/
770	/** @todo iIrq and iLevel checks. */
771
772	PVM pVM = pDevIns->Internal.s.pVMR3;
773	PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
774
775	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
776	}
777
778
779	/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
780	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
781	{
782	pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
783	}
784
785
786	/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
787	static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE ppBaseInterface, const char pszDesc)
788	{
789	PDMDEV_ASSERT_DEVINS(pDevIns);
790	PVM pVM = pDevIns->Internal.s.pVMR3;
791	VM_ASSERT_EMT(pVM);
792	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
793	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
794
795	/*
796	* Lookup the LUN, it might already be registered.
797	*/
798	PPDMLUN pLunPrev = NULL;
799	PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
800	for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
801	if (pLun->iLun == iLun)
802	break;
803
804	/*
805	* Create the LUN if if wasn't found, else check if driver is already attached to it.
806	*/
807	if (!pLun)
808	{
809	if ( !pBaseInterface
810	\|\| !pszDesc
811	\|\| !*pszDesc)
812	{
813	Assert(pBaseInterface);
814	Assert(pszDesc \|\| *pszDesc);
815	return VERR_INVALID_PARAMETER;
816	}
817
818	pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
819	if (!pLun)
820	return VERR_NO_MEMORY;
821
822	pLun->iLun = iLun;
823	pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
824	pLun->pTop = NULL;
825	pLun->pBottom = NULL;
826	pLun->pDevIns = pDevIns;
827	pLun->pszDesc = pszDesc;
828	pLun->pBase = pBaseInterface;
829	if (!pLunPrev)
830	pDevIns->Internal.s.pLunsR3 = pLun;
831	else
832	pLunPrev->pNext = pLun;
833	Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
834	iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
835	}
836	else if (pLun->pTop)
837	{
838	AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
839	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
840	return VERR_PDM_DRIVER_ALREADY_ATTACHED;
841	}
842	Assert(pLun->pBase == pBaseInterface);
843
844
845	/*
846	* Get the attached driver configuration.
847	*/
848	int rc;
849	PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
850	if (pNode)
851	rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /pDrvAbove/, pLun, ppBaseInterface);
852	else
853	rc = VERR_PDM_NO_ATTACHED_DRIVER;
854
855
856	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
857	return rc;
858	}
859
860
861	/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
862	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
863	{
864	PDMDEV_ASSERT_DEVINS(pDevIns);
865	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
866
867	void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
868
869	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
870	return pv;
871	}
872
873
874	/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
875	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
876	{
877	PDMDEV_ASSERT_DEVINS(pDevIns);
878	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
879
880	void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
881
882	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
883	return pv;
884	}
885
886
887	/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
888	static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
889	{
890	PDMDEV_ASSERT_DEVINS(pDevIns);
891	LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
892
893	MMR3HeapFree(pv);
894
895	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
896	}
897
898
899	/** @copydoc PDMDEVHLPR3::pfnVMSetError */
900	static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
901	{
902	PDMDEV_ASSERT_DEVINS(pDevIns);
903	va_list args;
904	va_start(args, pszFormat);
905	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
906	va_end(args);
907	return rc;
908	}
909
910
911	/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
912	static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
913	{
914	PDMDEV_ASSERT_DEVINS(pDevIns);
915	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
916	return rc;
917	}
918
919
920	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
921	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, ...)
922	{
923	PDMDEV_ASSERT_DEVINS(pDevIns);
924	va_list args;
925	va_start(args, pszFormat);
926	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
927	va_end(args);
928	return rc;
929	}
930
931
932	/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
933	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, va_list va)
934	{
935	PDMDEV_ASSERT_DEVINS(pDevIns);
936	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
937	return rc;
938	}
939
940
941	/** @copydoc PDMDEVHLPR3::pfnVMState */
942	static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
943	{
944	PDMDEV_ASSERT_DEVINS(pDevIns);
945
946	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
947
948	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
949	enmVMState, VMR3GetStateName(enmVMState)));
950	return enmVMState;
951	}
952
953
954	/** @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet */
955	static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
956	{
957	PDMDEV_ASSERT_DEVINS(pDevIns);
958
959	bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
960
961	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
962	fRc));
963	return fRc;
964	}
965
966
967	/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
968	static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
969	{
970	PDMDEV_ASSERT_DEVINS(pDevIns);
971	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
972	return true;
973
974	char szMsg[100];
975	RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
976	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
977	AssertBreakpoint();
978	return false;
979	}
980
981
982	/** @copydoc PDMDEVHLPR3::pfnAssertOther */
983	static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
984	{
985	PDMDEV_ASSERT_DEVINS(pDevIns);
986	if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
987	return true;
988
989	char szMsg[100];
990	RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
991	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
992	AssertBreakpoint();
993	return false;
994	}
995
996
997	/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
998	static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction, const char *pszFormat, va_list args)
999	{
1000	PDMDEV_ASSERT_DEVINS(pDevIns);
1001	#ifdef LOG_ENABLED
1002	va_list va2;
1003	va_copy(va2, args);
1004	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1005	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1006	va_end(va2);
1007	#endif
1008
1009	PVM pVM = pDevIns->Internal.s.pVMR3;
1010	VM_ASSERT_EMT(pVM);
1011	int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1012	if (rc == VERR_DBGF_NOT_ATTACHED)
1013	rc = VINF_SUCCESS;
1014
1015	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1016	return rc;
1017	}
1018
1019
1020	/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1021	static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char pszName, const char pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1022	{
1023	PDMDEV_ASSERT_DEVINS(pDevIns);
1024	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1025	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1026
1027	PVM pVM = pDevIns->Internal.s.pVMR3;
1028	VM_ASSERT_EMT(pVM);
1029	int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1030
1031	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1032	return rc;
1033	}
1034
1035
1036	/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1037	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void pvSample, STAMTYPE enmType, const char pszName, STAMUNIT enmUnit, const char *pszDesc)
1038	{
1039	PDMDEV_ASSERT_DEVINS(pDevIns);
1040	PVM pVM = pDevIns->Internal.s.pVMR3;
1041	VM_ASSERT_EMT(pVM);
1042
1043	STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1044	NOREF(pVM);
1045	}
1046
1047
1048
1049	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1050	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1051	STAMUNIT enmUnit, const char pszDesc, const char pszName, ...)
1052	{
1053	PDMDEV_ASSERT_DEVINS(pDevIns);
1054	PVM pVM = pDevIns->Internal.s.pVMR3;
1055	VM_ASSERT_EMT(pVM);
1056
1057	va_list args;
1058	va_start(args, pszName);
1059	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1060	va_end(args);
1061	AssertRC(rc);
1062
1063	NOREF(pVM);
1064	}
1065
1066
1067	/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1068	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1069	STAMUNIT enmUnit, const char pszDesc, const char pszName, va_list args)
1070	{
1071	PDMDEV_ASSERT_DEVINS(pDevIns);
1072	PVM pVM = pDevIns->Internal.s.pVMR3;
1073	VM_ASSERT_EMT(pVM);
1074
1075	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1076	AssertRC(rc);
1077
1078	NOREF(pVM);
1079	}
1080
1081
1082	/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1083	static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1084	{
1085	PDMDEV_ASSERT_DEVINS(pDevIns);
1086	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1087	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1088	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1089	pRtcReg->pfnWrite, ppRtcHlp));
1090
1091	/*
1092	* Validate input.
1093	*/
1094	if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1095	{
1096	AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1097	PDM_RTCREG_VERSION));
1098	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1099	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1100	return VERR_INVALID_PARAMETER;
1101	}
1102	if ( !pRtcReg->pfnWrite
1103	\|\| !pRtcReg->pfnRead)
1104	{
1105	Assert(pRtcReg->pfnWrite);
1106	Assert(pRtcReg->pfnRead);
1107	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1108	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1109	return VERR_INVALID_PARAMETER;
1110	}
1111
1112	if (!ppRtcHlp)
1113	{
1114	Assert(ppRtcHlp);
1115	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1116	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1117	return VERR_INVALID_PARAMETER;
1118	}
1119
1120	/*
1121	* Only one DMA device.
1122	*/
1123	PVM pVM = pDevIns->Internal.s.pVMR3;
1124	if (pVM->pdm.s.pRtc)
1125	{
1126	AssertMsgFailed(("Only one RTC device is supported!\n"));
1127	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1128	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1129	return VERR_INVALID_PARAMETER;
1130	}
1131
1132	/*
1133	* Allocate and initialize pci bus structure.
1134	*/
1135	int rc = VINF_SUCCESS;
1136	PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1137	if (pRtc)
1138	{
1139	pRtc->pDevIns = pDevIns;
1140	pRtc->Reg = *pRtcReg;
1141	pVM->pdm.s.pRtc = pRtc;
1142
1143	/* set the helper pointer. */
1144	*ppRtcHlp = &g_pdmR3DevRtcHlp;
1145	Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1146	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1147	}
1148	else
1149	rc = VERR_NO_MEMORY;
1150
1151	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1152	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1153	return rc;
1154	}
1155
1156
1157	/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1158	static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1159	PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char pszName, PPDMQUEUE ppQueue)
1160	{
1161	PDMDEV_ASSERT_DEVINS(pDevIns);
1162	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1163	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1164
1165	PVM pVM = pDevIns->Internal.s.pVMR3;
1166	VM_ASSERT_EMT(pVM);
1167
1168	if (pDevIns->iInstance > 0)
1169	{
1170	pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1171	AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1172	}
1173
1174	int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1175
1176	LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, ppQueue));
1177	return rc;
1178	}
1179
1180
1181	/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1182	static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1183	const char *pszNameFmt, va_list va)
1184	{
1185	PDMDEV_ASSERT_DEVINS(pDevIns);
1186	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
1187	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
1188
1189	PVM pVM = pDevIns->Internal.s.pVMR3;
1190	VM_ASSERT_EMT(pVM);
1191	int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS, pszNameFmt, va);
1192
1193	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1194	return rc;
1195	}
1196
1197
1198	/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1199	static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1200	{
1201	PDMDEV_ASSERT_DEVINS(pDevIns);
1202	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1203	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1204
1205	pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1206
1207	LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1208	return pTime;
1209	}
1210
1211
1212	/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1213	static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1214	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1215	{
1216	PDMDEV_ASSERT_DEVINS(pDevIns);
1217	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1218	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1219	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1220
1221	int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1222
1223	LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1224	rc, *ppThread));
1225	return rc;
1226	}
1227
1228
1229	/** @copydoc PDMDEVHLPR3::pfnGetVM */
1230	static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1231	{
1232	PDMDEV_ASSERT_DEVINS(pDevIns);
1233	LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1234	return pDevIns->Internal.s.pVMR3;
1235	}
1236
1237
1238	/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
1239	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1240	{
1241	PDMDEV_ASSERT_DEVINS(pDevIns);
1242	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1243	LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1244	return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1245	}
1246
1247
1248	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1249	static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1250	{
1251	PDMDEV_ASSERT_DEVINS(pDevIns);
1252	PVM pVM = pDevIns->Internal.s.pVMR3;
1253	VM_ASSERT_EMT(pVM);
1254	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1255	".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1256	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1257	pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1258	pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1259
1260	/*
1261	* Validate the structure.
1262	*/
1263	if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1264	{
1265	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1266	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1267	return VERR_INVALID_PARAMETER;
1268	}
1269	if ( !pPciBusReg->pfnRegisterR3
1270	\|\| !pPciBusReg->pfnIORegionRegisterR3
1271	\|\| !pPciBusReg->pfnSetIrqR3
1272	\|\| !pPciBusReg->pfnSaveExecR3
1273	\|\| !pPciBusReg->pfnLoadExecR3
1274	\|\| (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1275	{
1276	Assert(pPciBusReg->pfnRegisterR3);
1277	Assert(pPciBusReg->pfnIORegionRegisterR3);
1278	Assert(pPciBusReg->pfnSetIrqR3);
1279	Assert(pPciBusReg->pfnSaveExecR3);
1280	Assert(pPciBusReg->pfnLoadExecR3);
1281	Assert(pPciBusReg->pfnFakePCIBIOSR3);
1282	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1283	return VERR_INVALID_PARAMETER;
1284	}
1285	if ( pPciBusReg->pszSetIrqRC
1286	&& !VALID_PTR(pPciBusReg->pszSetIrqRC))
1287	{
1288	Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1289	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1290	return VERR_INVALID_PARAMETER;
1291	}
1292	if ( pPciBusReg->pszSetIrqR0
1293	&& !VALID_PTR(pPciBusReg->pszSetIrqR0))
1294	{
1295	Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1296	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1297	return VERR_INVALID_PARAMETER;
1298	}
1299	if (!ppPciHlpR3)
1300	{
1301	Assert(ppPciHlpR3);
1302	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1303	return VERR_INVALID_PARAMETER;
1304	}
1305
1306	/*
1307	* Find free PCI bus entry.
1308	*/
1309	unsigned iBus = 0;
1310	for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1311	if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1312	break;
1313	if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1314	{
1315	AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1316	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1317	return VERR_INVALID_PARAMETER;
1318	}
1319	PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1320
1321	/*
1322	* Resolve and init the RC bits.
1323	*/
1324	if (pPciBusReg->pszSetIrqRC)
1325	{
1326	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1327	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1328	if (RT_FAILURE(rc))
1329	{
1330	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1331	return rc;
1332	}
1333	pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1334	}
1335	else
1336	{
1337	pPciBus->pfnSetIrqRC = 0;
1338	pPciBus->pDevInsRC = 0;
1339	}
1340
1341	/*
1342	* Resolve and init the R0 bits.
1343	*/
1344	if (pPciBusReg->pszSetIrqR0)
1345	{
1346	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1347	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1348	if (RT_FAILURE(rc))
1349	{
1350	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1351	return rc;
1352	}
1353	pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1354	}
1355	else
1356	{
1357	pPciBus->pfnSetIrqR0 = 0;
1358	pPciBus->pDevInsR0 = 0;
1359	}
1360
1361	/*
1362	* Init the R3 bits.
1363	*/
1364	pPciBus->iBus = iBus;
1365	pPciBus->pDevInsR3 = pDevIns;
1366	pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1367	pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1368	pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1369	pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1370	pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1371	pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1372	pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1373
1374	Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1375
1376	/* set the helper pointer and return. */
1377	*ppPciHlpR3 = &g_pdmR3DevPciHlp;
1378	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1379	return VINF_SUCCESS;
1380	}
1381
1382
1383	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1384	static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1385	{
1386	PDMDEV_ASSERT_DEVINS(pDevIns);
1387	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1388	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1389	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1390	pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1391	pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1392	ppPicHlpR3));
1393
1394	/*
1395	* Validate input.
1396	*/
1397	if (pPicReg->u32Version != PDM_PICREG_VERSION)
1398	{
1399	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1400	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1401	return VERR_INVALID_PARAMETER;
1402	}
1403	if ( !pPicReg->pfnSetIrqR3
1404	\|\| !pPicReg->pfnGetInterruptR3)
1405	{
1406	Assert(pPicReg->pfnSetIrqR3);
1407	Assert(pPicReg->pfnGetInterruptR3);
1408	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1409	return VERR_INVALID_PARAMETER;
1410	}
1411	if ( ( pPicReg->pszSetIrqRC
1412	\|\| pPicReg->pszGetInterruptRC)
1413	&& ( !VALID_PTR(pPicReg->pszSetIrqRC)
1414	\|\| !VALID_PTR(pPicReg->pszGetInterruptRC))
1415	)
1416	{
1417	Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1418	Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1419	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1420	return VERR_INVALID_PARAMETER;
1421	}
1422	if ( pPicReg->pszSetIrqRC
1423	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1424	{
1425	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1426	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1427	return VERR_INVALID_PARAMETER;
1428	}
1429	if ( pPicReg->pszSetIrqR0
1430	&& !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1431	{
1432	Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1433	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1434	return VERR_INVALID_PARAMETER;
1435	}
1436	if (!ppPicHlpR3)
1437	{
1438	Assert(ppPicHlpR3);
1439	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1440	return VERR_INVALID_PARAMETER;
1441	}
1442
1443	/*
1444	* Only one PIC device.
1445	*/
1446	PVM pVM = pDevIns->Internal.s.pVMR3;
1447	if (pVM->pdm.s.Pic.pDevInsR3)
1448	{
1449	AssertMsgFailed(("Only one pic device is supported!\n"));
1450	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1451	return VERR_INVALID_PARAMETER;
1452	}
1453
1454	/*
1455	* RC stuff.
1456	*/
1457	if (pPicReg->pszSetIrqRC)
1458	{
1459	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1460	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1461	if (RT_SUCCESS(rc))
1462	{
1463	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1464	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1465	}
1466	if (RT_FAILURE(rc))
1467	{
1468	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1469	return rc;
1470	}
1471	pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1472	}
1473	else
1474	{
1475	pVM->pdm.s.Pic.pDevInsRC = 0;
1476	pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1477	pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1478	}
1479
1480	/*
1481	* R0 stuff.
1482	*/
1483	if (pPicReg->pszSetIrqR0)
1484	{
1485	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1486	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1487	if (RT_SUCCESS(rc))
1488	{
1489	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1490	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1491	}
1492	if (RT_FAILURE(rc))
1493	{
1494	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1495	return rc;
1496	}
1497	pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1498	Assert(pVM->pdm.s.Pic.pDevInsR0);
1499	}
1500	else
1501	{
1502	pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1503	pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1504	pVM->pdm.s.Pic.pDevInsR0 = 0;
1505	}
1506
1507	/*
1508	* R3 stuff.
1509	*/
1510	pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1511	pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1512	pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1513	Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1514
1515	/* set the helper pointer and return. */
1516	*ppPicHlpR3 = &g_pdmR3DevPicHlp;
1517	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1518	return VINF_SUCCESS;
1519	}
1520
1521
1522	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1523	static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1524	{
1525	PDMDEV_ASSERT_DEVINS(pDevIns);
1526	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1527	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1528	".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1529	".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
1530	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1531	pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
1532	pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1533	pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1534	pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
1535
1536	/*
1537	* Validate input.
1538	*/
1539	if (pApicReg->u32Version != PDM_APICREG_VERSION)
1540	{
1541	AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1542	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1543	return VERR_INVALID_PARAMETER;
1544	}
1545	if ( !pApicReg->pfnGetInterruptR3
1546	\|\| !pApicReg->pfnHasPendingIrqR3
1547	\|\| !pApicReg->pfnSetBaseR3
1548	\|\| !pApicReg->pfnGetBaseR3
1549	\|\| !pApicReg->pfnSetTPRR3
1550	\|\| !pApicReg->pfnGetTPRR3
1551	\|\| !pApicReg->pfnWriteMSRR3
1552	\|\| !pApicReg->pfnReadMSRR3
1553	\|\| !pApicReg->pfnBusDeliverR3
1554	\|\| !pApicReg->pfnLocalInterruptR3)
1555	{
1556	Assert(pApicReg->pfnGetInterruptR3);
1557	Assert(pApicReg->pfnHasPendingIrqR3);
1558	Assert(pApicReg->pfnSetBaseR3);
1559	Assert(pApicReg->pfnGetBaseR3);
1560	Assert(pApicReg->pfnSetTPRR3);
1561	Assert(pApicReg->pfnGetTPRR3);
1562	Assert(pApicReg->pfnWriteMSRR3);
1563	Assert(pApicReg->pfnReadMSRR3);
1564	Assert(pApicReg->pfnBusDeliverR3);
1565	Assert(pApicReg->pfnLocalInterruptR3);
1566	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1567	return VERR_INVALID_PARAMETER;
1568	}
1569	if ( ( pApicReg->pszGetInterruptRC
1570	\|\| pApicReg->pszHasPendingIrqRC
1571	\|\| pApicReg->pszSetBaseRC
1572	\|\| pApicReg->pszGetBaseRC
1573	\|\| pApicReg->pszSetTPRRC
1574	\|\| pApicReg->pszGetTPRRC
1575	\|\| pApicReg->pszWriteMSRRC
1576	\|\| pApicReg->pszReadMSRRC
1577	\|\| pApicReg->pszBusDeliverRC
1578	\|\| pApicReg->pszLocalInterruptRC)
1579	&& ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1580	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1581	\|\| !VALID_PTR(pApicReg->pszSetBaseRC)
1582	\|\| !VALID_PTR(pApicReg->pszGetBaseRC)
1583	\|\| !VALID_PTR(pApicReg->pszSetTPRRC)
1584	\|\| !VALID_PTR(pApicReg->pszGetTPRRC)
1585	\|\| !VALID_PTR(pApicReg->pszWriteMSRRC)
1586	\|\| !VALID_PTR(pApicReg->pszReadMSRRC)
1587	\|\| !VALID_PTR(pApicReg->pszBusDeliverRC)
1588	\|\| !VALID_PTR(pApicReg->pszLocalInterruptRC))
1589	)
1590	{
1591	Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1592	Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1593	Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1594	Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1595	Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1596	Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1597	Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1598	Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1599	Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1600	Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
1601	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1602	return VERR_INVALID_PARAMETER;
1603	}
1604	if ( ( pApicReg->pszGetInterruptR0
1605	\|\| pApicReg->pszHasPendingIrqR0
1606	\|\| pApicReg->pszSetBaseR0
1607	\|\| pApicReg->pszGetBaseR0
1608	\|\| pApicReg->pszSetTPRR0
1609	\|\| pApicReg->pszGetTPRR0
1610	\|\| pApicReg->pszWriteMSRR0
1611	\|\| pApicReg->pszReadMSRR0
1612	\|\| pApicReg->pszBusDeliverR0
1613	\|\| pApicReg->pszLocalInterruptR0)
1614	&& ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1615	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1616	\|\| !VALID_PTR(pApicReg->pszSetBaseR0)
1617	\|\| !VALID_PTR(pApicReg->pszGetBaseR0)
1618	\|\| !VALID_PTR(pApicReg->pszSetTPRR0)
1619	\|\| !VALID_PTR(pApicReg->pszGetTPRR0)
1620	\|\| !VALID_PTR(pApicReg->pszReadMSRR0)
1621	\|\| !VALID_PTR(pApicReg->pszWriteMSRR0)
1622	\|\| !VALID_PTR(pApicReg->pszBusDeliverR0)
1623	\|\| !VALID_PTR(pApicReg->pszLocalInterruptR0))
1624	)
1625	{
1626	Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1627	Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1628	Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1629	Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1630	Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1631	Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1632	Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1633	Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1634	Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1635	Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
1636	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1637	return VERR_INVALID_PARAMETER;
1638	}
1639	if (!ppApicHlpR3)
1640	{
1641	Assert(ppApicHlpR3);
1642	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1643	return VERR_INVALID_PARAMETER;
1644	}
1645
1646	/*
1647	* Only one APIC device. On SMP we have single logical device covering all LAPICs,
1648	* as they need to communicate and share state easily.
1649	*/
1650	PVM pVM = pDevIns->Internal.s.pVMR3;
1651	if (pVM->pdm.s.Apic.pDevInsR3)
1652	{
1653	AssertMsgFailed(("Only one apic device is supported!\n"));
1654	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1655	return VERR_INVALID_PARAMETER;
1656	}
1657
1658	/*
1659	* Resolve & initialize the RC bits.
1660	*/
1661	if (pApicReg->pszGetInterruptRC)
1662	{
1663	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1664	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1665	if (RT_SUCCESS(rc))
1666	{
1667	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1668	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1669	}
1670	if (RT_SUCCESS(rc))
1671	{
1672	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1673	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1674	}
1675	if (RT_SUCCESS(rc))
1676	{
1677	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1678	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1679	}
1680	if (RT_SUCCESS(rc))
1681	{
1682	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1683	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1684	}
1685	if (RT_SUCCESS(rc))
1686	{
1687	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1688	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1689	}
1690	if (RT_SUCCESS(rc))
1691	{
1692	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1693	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1694	}
1695	if (RT_SUCCESS(rc))
1696	{
1697	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1698	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1699	}
1700	if (RT_SUCCESS(rc))
1701	{
1702	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1703	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1704	}
1705	if (RT_SUCCESS(rc))
1706	{
1707	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
1708	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
1709	}
1710	if (RT_FAILURE(rc))
1711	{
1712	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1713	return rc;
1714	}
1715	pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1716	}
1717	else
1718	{
1719	pVM->pdm.s.Apic.pDevInsRC = 0;
1720	pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1721	pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1722	pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1723	pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1724	pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1725	pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1726	pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1727	pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1728	pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1729	pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
1730	}
1731
1732	/*
1733	* Resolve & initialize the R0 bits.
1734	*/
1735	if (pApicReg->pszGetInterruptR0)
1736	{
1737	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1738	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1739	if (RT_SUCCESS(rc))
1740	{
1741	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1742	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1743	}
1744	if (RT_SUCCESS(rc))
1745	{
1746	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1747	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1748	}
1749	if (RT_SUCCESS(rc))
1750	{
1751	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1752	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1753	}
1754	if (RT_SUCCESS(rc))
1755	{
1756	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1757	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1758	}
1759	if (RT_SUCCESS(rc))
1760	{
1761	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1762	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1763	}
1764	if (RT_SUCCESS(rc))
1765	{
1766	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1767	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1768	}
1769	if (RT_SUCCESS(rc))
1770	{
1771	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1772	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1773	}
1774	if (RT_SUCCESS(rc))
1775	{
1776	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1777	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1778	}
1779	if (RT_SUCCESS(rc))
1780	{
1781	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
1782	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
1783	}
1784	if (RT_FAILURE(rc))
1785	{
1786	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1787	return rc;
1788	}
1789	pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1790	Assert(pVM->pdm.s.Apic.pDevInsR0);
1791	}
1792	else
1793	{
1794	pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1795	pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1796	pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1797	pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1798	pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1799	pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1800	pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1801	pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1802	pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1803	pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
1804	pVM->pdm.s.Apic.pDevInsR0 = 0;
1805	}
1806
1807	/*
1808	* Initialize the HC bits.
1809	*/
1810	pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1811	pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1812	pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1813	pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1814	pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1815	pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1816	pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1817	pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1818	pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1819	pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1820	pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
1821	Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1822
1823	/* set the helper pointer and return. */
1824	*ppApicHlpR3 = &g_pdmR3DevApicHlp;
1825	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1826	return VINF_SUCCESS;
1827	}
1828
1829
1830	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1831	static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1832	{
1833	PDMDEV_ASSERT_DEVINS(pDevIns);
1834	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1835	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1836	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1837	pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1838
1839	/*
1840	* Validate input.
1841	*/
1842	if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1843	{
1844	AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1845	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1846	return VERR_INVALID_PARAMETER;
1847	}
1848	if (!pIoApicReg->pfnSetIrqR3)
1849	{
1850	Assert(pIoApicReg->pfnSetIrqR3);
1851	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1852	return VERR_INVALID_PARAMETER;
1853	}
1854	if ( pIoApicReg->pszSetIrqRC
1855	&& !VALID_PTR(pIoApicReg->pszSetIrqRC))
1856	{
1857	Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1858	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1859	return VERR_INVALID_PARAMETER;
1860	}
1861	if ( pIoApicReg->pszSetIrqR0
1862	&& !VALID_PTR(pIoApicReg->pszSetIrqR0))
1863	{
1864	Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1865	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1866	return VERR_INVALID_PARAMETER;
1867	}
1868	if (!ppIoApicHlpR3)
1869	{
1870	Assert(ppIoApicHlpR3);
1871	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1872	return VERR_INVALID_PARAMETER;
1873	}
1874
1875	/*
1876	* The I/O APIC requires the APIC to be present (hacks++).
1877	* If the I/O APIC does GC stuff so must the APIC.
1878	*/
1879	PVM pVM = pDevIns->Internal.s.pVMR3;
1880	if (!pVM->pdm.s.Apic.pDevInsR3)
1881	{
1882	AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1883	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1884	return VERR_INVALID_PARAMETER;
1885	}
1886	if ( pIoApicReg->pszSetIrqRC
1887	&& !pVM->pdm.s.Apic.pDevInsRC)
1888	{
1889	AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1890	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1891	return VERR_INVALID_PARAMETER;
1892	}
1893
1894	/*
1895	* Only one I/O APIC device.
1896	*/
1897	if (pVM->pdm.s.IoApic.pDevInsR3)
1898	{
1899	AssertMsgFailed(("Only one ioapic device is supported!\n"));
1900	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1901	return VERR_INVALID_PARAMETER;
1902	}
1903
1904	/*
1905	* Resolve & initialize the GC bits.
1906	*/
1907	if (pIoApicReg->pszSetIrqRC)
1908	{
1909	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
1910	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
1911	if (RT_FAILURE(rc))
1912	{
1913	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1914	return rc;
1915	}
1916	pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1917	}
1918	else
1919	{
1920	pVM->pdm.s.IoApic.pDevInsRC = 0;
1921	pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
1922	}
1923
1924	/*
1925	* Resolve & initialize the R0 bits.
1926	*/
1927	if (pIoApicReg->pszSetIrqR0)
1928	{
1929	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
1930	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
1931	if (RT_FAILURE(rc))
1932	{
1933	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1934	return rc;
1935	}
1936	pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1937	Assert(pVM->pdm.s.IoApic.pDevInsR0);
1938	}
1939	else
1940	{
1941	pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
1942	pVM->pdm.s.IoApic.pDevInsR0 = 0;
1943	}
1944
1945	/*
1946	* Initialize the R3 bits.
1947	*/
1948	pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
1949	pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
1950	Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1951
1952	/* set the helper pointer and return. */
1953	*ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
1954	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1955	return VINF_SUCCESS;
1956	}
1957
1958
1959	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
1960	static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
1961	{
1962	PDMDEV_ASSERT_DEVINS(pDevIns);
1963	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1964	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
1965	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
1966	pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
1967
1968	/*
1969	* Validate input.
1970	*/
1971	if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
1972	{
1973	AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
1974	PDM_DMACREG_VERSION));
1975	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
1976	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1977	return VERR_INVALID_PARAMETER;
1978	}
1979	if ( !pDmacReg->pfnRun
1980	\|\| !pDmacReg->pfnRegister
1981	\|\| !pDmacReg->pfnReadMemory
1982	\|\| !pDmacReg->pfnWriteMemory
1983	\|\| !pDmacReg->pfnSetDREQ
1984	\|\| !pDmacReg->pfnGetChannelMode)
1985	{
1986	Assert(pDmacReg->pfnRun);
1987	Assert(pDmacReg->pfnRegister);
1988	Assert(pDmacReg->pfnReadMemory);
1989	Assert(pDmacReg->pfnWriteMemory);
1990	Assert(pDmacReg->pfnSetDREQ);
1991	Assert(pDmacReg->pfnGetChannelMode);
1992	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1993	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1994	return VERR_INVALID_PARAMETER;
1995	}
1996
1997	if (!ppDmacHlp)
1998	{
1999	Assert(ppDmacHlp);
2000	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2001	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2002	return VERR_INVALID_PARAMETER;
2003	}
2004
2005	/*
2006	* Only one DMA device.
2007	*/
2008	PVM pVM = pDevIns->Internal.s.pVMR3;
2009	if (pVM->pdm.s.pDmac)
2010	{
2011	AssertMsgFailed(("Only one DMA device is supported!\n"));
2012	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2013	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2014	return VERR_INVALID_PARAMETER;
2015	}
2016
2017	/*
2018	* Allocate and initialize pci bus structure.
2019	*/
2020	int rc = VINF_SUCCESS;
2021	PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2022	if (pDmac)
2023	{
2024	pDmac->pDevIns = pDevIns;
2025	pDmac->Reg = *pDmacReg;
2026	pVM->pdm.s.pDmac = pDmac;
2027
2028	/* set the helper pointer. */
2029	*ppDmacHlp = &g_pdmR3DevDmacHlp;
2030	Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2031	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2032	}
2033	else
2034	rc = VERR_NO_MEMORY;
2035
2036	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2037	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2038	return rc;
2039	}
2040
2041
2042	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2043	static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2044	{
2045	PDMDEV_ASSERT_DEVINS(pDevIns);
2046	PVM pVM = pDevIns->Internal.s.pVMR3;
2047	LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2048	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2049
2050	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2051	if (!VM_IS_EMT(pVM))
2052	{
2053	char szNames[128];
2054	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2055	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2056	}
2057	#endif
2058
2059	int rc;
2060	if (VM_IS_EMT(pVM))
2061	rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
2062	else
2063	rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
2064
2065	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2066	return rc;
2067	}
2068
2069
2070	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2071	static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2072	{
2073	PDMDEV_ASSERT_DEVINS(pDevIns);
2074	PVM pVM = pDevIns->Internal.s.pVMR3;
2075	LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2076	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2077
2078	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2079	if (!VM_IS_EMT(pVM))
2080	{
2081	char szNames[128];
2082	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2083	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2084	}
2085	#endif
2086
2087	int rc;
2088	if (VM_IS_EMT(pVM))
2089	rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
2090	else
2091	rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pDevReg->szDeviceName);
2092
2093	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2094	return rc;
2095	}
2096
2097
2098	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2099	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2100	{
2101	PDMDEV_ASSERT_DEVINS(pDevIns);
2102	PVM pVM = pDevIns->Internal.s.pVMR3;
2103	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2104	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2105	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2106
2107	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2108	if (!VM_IS_EMT(pVM))
2109	{
2110	char szNames[128];
2111	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2112	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2113	}
2114	#endif
2115
2116	int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
2117
2118	Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2119	return rc;
2120	}
2121
2122
2123	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2124	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2125	{
2126	PDMDEV_ASSERT_DEVINS(pDevIns);
2127	PVM pVM = pDevIns->Internal.s.pVMR3;
2128	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2129	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2130	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2131
2132	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2133	if (!VM_IS_EMT(pVM))
2134	{
2135	char szNames[128];
2136	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2137	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2138	}
2139	#endif
2140
2141	int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
2142
2143	Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2144	return rc;
2145	}
2146
2147
2148	/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2149	static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2150	{
2151	PDMDEV_ASSERT_DEVINS(pDevIns);
2152	PVM pVM = pDevIns->Internal.s.pVMR3;
2153	LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
2154	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pLock));
2155
2156	PGMPhysReleasePageMappingLock(pVM, pLock);
2157
2158	Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2159	}
2160
2161
2162	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2163	static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2164	{
2165	PDMDEV_ASSERT_DEVINS(pDevIns);
2166	PVM pVM = pDevIns->Internal.s.pVMR3;
2167	VM_ASSERT_EMT(pVM);
2168	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2169	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2170
2171	PVMCPU pVCpu = VMMGetCpu(pVM);
2172	if (!pVCpu)
2173	return VERR_ACCESS_DENIED;
2174	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2175	/** @todo SMP. */
2176	#endif
2177
2178	int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
2179
2180	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2181
2182	return rc;
2183	}
2184
2185
2186	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2187	static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2188	{
2189	PDMDEV_ASSERT_DEVINS(pDevIns);
2190	PVM pVM = pDevIns->Internal.s.pVMR3;
2191	VM_ASSERT_EMT(pVM);
2192	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2193	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2194
2195	PVMCPU pVCpu = VMMGetCpu(pVM);
2196	if (!pVCpu)
2197	return VERR_ACCESS_DENIED;
2198	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2199	/** @todo SMP. */
2200	#endif
2201
2202	int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
2203
2204	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2205
2206	return rc;
2207	}
2208
2209
2210	/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2211	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2212	{
2213	PDMDEV_ASSERT_DEVINS(pDevIns);
2214	PVM pVM = pDevIns->Internal.s.pVMR3;
2215	VM_ASSERT_EMT(pVM);
2216	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2217	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2218
2219	PVMCPU pVCpu = VMMGetCpu(pVM);
2220	if (!pVCpu)
2221	return VERR_ACCESS_DENIED;
2222	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2223	/** @todo SMP. */
2224	#endif
2225
2226	int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
2227
2228	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pGCPhys));
2229
2230	return rc;
2231	}
2232
2233
2234	/** @copydoc PDMDEVHLPR3::pfnSetAsyncNotification */
2235	static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
2236	{
2237	PDMDEV_ASSERT_DEVINS(pDevIns);
2238	VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
2239	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pfnAsyncNotify));
2240
2241	int rc = VINF_SUCCESS;
2242	AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
2243	AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
2244	AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED \| PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
2245	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2246	AssertStmt( enmVMState == VMSTATE_SUSPENDING
2247	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
2248	\|\| enmVMState == VMSTATE_SUSPENDING_LS
2249	\|\| enmVMState == VMSTATE_RESETTING
2250	\|\| enmVMState == VMSTATE_RESETTING_LS
2251	\|\| enmVMState == VMSTATE_POWERING_OFF
2252	\|\| enmVMState == VMSTATE_POWERING_OFF_LS,
2253	rc = VERR_INVALID_STATE);
2254
2255	if (RT_SUCCESS(rc))
2256	pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
2257
2258	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2259	return rc;
2260	}
2261
2262
2263	/** @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted */
2264	static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
2265	{
2266	PDMDEV_ASSERT_DEVINS(pDevIns);
2267	PVM pVM = pDevIns->Internal.s.pVMR3;
2268
2269	VMSTATE enmVMState = VMR3GetState(pVM);
2270	if ( enmVMState == VMSTATE_SUSPENDING
2271	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
2272	\|\| enmVMState == VMSTATE_SUSPENDING_LS
2273	\|\| enmVMState == VMSTATE_RESETTING
2274	\|\| enmVMState == VMSTATE_RESETTING_LS
2275	\|\| enmVMState == VMSTATE_POWERING_OFF
2276	\|\| enmVMState == VMSTATE_POWERING_OFF_LS)
2277	{
2278	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2279	VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
2280	}
2281	else
2282	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmVMState));
2283	}
2284
2285
2286	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2287	static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2288	{
2289	PDMDEV_ASSERT_DEVINS(pDevIns);
2290	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2291
2292	bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
2293
2294	LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2295	return fRc;
2296	}
2297
2298
2299	/** @copydoc PDMDEVHLPR3::pfnA20Set */
2300	static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2301	{
2302	PDMDEV_ASSERT_DEVINS(pDevIns);
2303	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2304	LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2305	PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
2306	}
2307
2308
2309	/** @copydoc PDMDEVHLPR3::pfnVMReset */
2310	static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2311	{
2312	PDMDEV_ASSERT_DEVINS(pDevIns);
2313	PVM pVM = pDevIns->Internal.s.pVMR3;
2314	VM_ASSERT_EMT(pVM);
2315	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2316	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2317
2318	/*
2319	* We postpone this operation because we're likely to be inside a I/O instruction
2320	* and the EIP will be updated when we return.
2321	* We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2322	*/
2323	bool fHaltOnReset;
2324	int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2325	if (RT_SUCCESS(rc) && fHaltOnReset)
2326	{
2327	Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2328	rc = VINF_EM_HALT;
2329	}
2330	else
2331	{
2332	VM_FF_SET(pVM, VM_FF_RESET);
2333	rc = VINF_EM_RESET;
2334	}
2335
2336	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2337	return rc;
2338	}
2339
2340
2341	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2342	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2343	{
2344	int rc;
2345	PDMDEV_ASSERT_DEVINS(pDevIns);
2346	PVM pVM = pDevIns->Internal.s.pVMR3;
2347	VM_ASSERT_EMT(pVM);
2348	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2349	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2350
2351	if (pVM->cCpus > 1)
2352	{
2353	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2354	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
2355	AssertRC(rc);
2356	rc = VINF_EM_SUSPEND;
2357	}
2358	else
2359	rc = VMR3Suspend(pVM);
2360
2361	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2362	return rc;
2363	}
2364
2365
2366	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2367	static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2368	{
2369	int rc;
2370	PDMDEV_ASSERT_DEVINS(pDevIns);
2371	PVM pVM = pDevIns->Internal.s.pVMR3;
2372	VM_ASSERT_EMT(pVM);
2373	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2374	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2375
2376	if (pVM->cCpus > 1)
2377	{
2378	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2379	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
2380	AssertRC(rc);
2381	/* Set the VCPU state to stopped here as well to make sure no
2382	* inconsistency with the EM state occurs.
2383	*/
2384	VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
2385	rc = VINF_EM_OFF;
2386	}
2387	else
2388	rc = VMR3PowerOff(pVM);
2389
2390	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2391	return rc;
2392	}
2393
2394	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2395	static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2396	{
2397	PDMDEV_ASSERT_DEVINS(pDevIns);
2398	PVM pVM = pDevIns->Internal.s.pVMR3;
2399	VM_ASSERT_EMT(pVM);
2400	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2401	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2402	int rc = VINF_SUCCESS;
2403	if (pVM->pdm.s.pDmac)
2404	pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2405	else
2406	{
2407	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2408	rc = VERR_PDM_NO_DMAC_INSTANCE;
2409	}
2410	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2411	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2412	return rc;
2413	}
2414
2415	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2416	static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
2417	{
2418	PDMDEV_ASSERT_DEVINS(pDevIns);
2419	PVM pVM = pDevIns->Internal.s.pVMR3;
2420	VM_ASSERT_EMT(pVM);
2421	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2422	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2423	int rc = VINF_SUCCESS;
2424	if (pVM->pdm.s.pDmac)
2425	{
2426	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2427	if (pcbRead)
2428	*pcbRead = cb;
2429	}
2430	else
2431	{
2432	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2433	rc = VERR_PDM_NO_DMAC_INSTANCE;
2434	}
2435	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2436	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2437	return rc;
2438	}
2439
2440	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2441	static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
2442	{
2443	PDMDEV_ASSERT_DEVINS(pDevIns);
2444	PVM pVM = pDevIns->Internal.s.pVMR3;
2445	VM_ASSERT_EMT(pVM);
2446	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2447	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2448	int rc = VINF_SUCCESS;
2449	if (pVM->pdm.s.pDmac)
2450	{
2451	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2452	if (pcbWritten)
2453	*pcbWritten = cb;
2454	}
2455	else
2456	{
2457	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2458	rc = VERR_PDM_NO_DMAC_INSTANCE;
2459	}
2460	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2461	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2462	return rc;
2463	}
2464
2465	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2466	static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2467	{
2468	PDMDEV_ASSERT_DEVINS(pDevIns);
2469	PVM pVM = pDevIns->Internal.s.pVMR3;
2470	VM_ASSERT_EMT(pVM);
2471	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2472	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2473	int rc = VINF_SUCCESS;
2474	if (pVM->pdm.s.pDmac)
2475	pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2476	else
2477	{
2478	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2479	rc = VERR_PDM_NO_DMAC_INSTANCE;
2480	}
2481	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2482	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2483	return rc;
2484	}
2485
2486	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2487	static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2488	{
2489	PDMDEV_ASSERT_DEVINS(pDevIns);
2490	PVM pVM = pDevIns->Internal.s.pVMR3;
2491	VM_ASSERT_EMT(pVM);
2492	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2493	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2494	uint8_t u8Mode;
2495	if (pVM->pdm.s.pDmac)
2496	u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2497	else
2498	{
2499	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2500	u8Mode = 3 << 2 /* illegal mode type */;
2501	}
2502	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2503	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2504	return u8Mode;
2505	}
2506
2507	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2508	static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2509	{
2510	PDMDEV_ASSERT_DEVINS(pDevIns);
2511	PVM pVM = pDevIns->Internal.s.pVMR3;
2512	VM_ASSERT_EMT(pVM);
2513	LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2514	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2515
2516	AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2517	VM_FF_SET(pVM, VM_FF_PDM_DMA);
2518	REMR3NotifyDmaPending(pVM);
2519	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
2520	}
2521
2522
2523	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2524	static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2525	{
2526	PDMDEV_ASSERT_DEVINS(pDevIns);
2527	PVM pVM = pDevIns->Internal.s.pVMR3;
2528	VM_ASSERT_EMT(pVM);
2529
2530	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2531	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2532	int rc;
2533	if (pVM->pdm.s.pRtc)
2534	rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2535	else
2536	rc = VERR_PDM_NO_RTC_INSTANCE;
2537
2538	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2539	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2540	return rc;
2541	}
2542
2543
2544	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2545	static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2546	{
2547	PDMDEV_ASSERT_DEVINS(pDevIns);
2548	PVM pVM = pDevIns->Internal.s.pVMR3;
2549	VM_ASSERT_EMT(pVM);
2550
2551	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2552	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2553	int rc;
2554	if (pVM->pdm.s.pRtc)
2555	rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2556	else
2557	rc = VERR_PDM_NO_RTC_INSTANCE;
2558
2559	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2560	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2561	return rc;
2562	}
2563
2564
2565	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2566	static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2567	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
2568	{
2569	PDMDEV_ASSERT_DEVINS(pDevIns);
2570	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2571
2572	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2573	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2574	AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2575
2576	CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
2577
2578	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - pEax=%#x pEbx=%#x pEcx=%#x pEdx=%#x\n",
2579	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pEax, pEbx, pEcx, pEdx));
2580	}
2581
2582
2583	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2584	static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
2585	{
2586	PDMDEV_ASSERT_DEVINS(pDevIns);
2587	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
2588	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
2589
2590	int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
2591
2592	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2593	return rc;
2594	}
2595
2596
2597	/**
2598	* @copydoc PDMDEVHLPR3::pfnMMIO2Register
2599	*/
2600	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
2601	{
2602	PDMDEV_ASSERT_DEVINS(pDevIns);
2603	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2604	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2605	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2606
2607	/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
2608	* use a real string cache. */
2609	int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2610
2611	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2612	return rc;
2613	}
2614
2615
2616	/**
2617	* @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2618	*/
2619	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2620	{
2621	PDMDEV_ASSERT_DEVINS(pDevIns);
2622	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2623	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
2624	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2625
2626	AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2627
2628	int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2629
2630	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2631	return rc;
2632	}
2633
2634
2635	/**
2636	* @copydoc PDMDEVHLPR3::pfnMMIO2Map
2637	*/
2638	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2639	{
2640	PDMDEV_ASSERT_DEVINS(pDevIns);
2641	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2642	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
2643	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2644
2645	int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2646
2647	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2648	return rc;
2649	}
2650
2651
2652	/**
2653	* @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2654	*/
2655	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2656	{
2657	PDMDEV_ASSERT_DEVINS(pDevIns);
2658	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2659	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
2660	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2661
2662	int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2663
2664	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2665	return rc;
2666	}
2667
2668
2669	/**
2670	* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2671	*/
2672	static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2673	const char *pszDesc, PRTRCPTR pRCPtr)
2674	{
2675	PDMDEV_ASSERT_DEVINS(pDevIns);
2676	PVM pVM = pDevIns->Internal.s.pVMR3;
2677	VM_ASSERT_EMT(pVM);
2678	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2679	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2680
2681	if (pDevIns->iInstance > 0)
2682	{
2683	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
2684	if (pszDesc2)
2685	pszDesc = pszDesc2;
2686	}
2687
2688	int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2689
2690	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pRCPtr));
2691	return rc;
2692	}
2693
2694
2695	/**
2696	* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2697	*/
2698	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2699	const char *pszDesc, PRTR0PTR pR0Ptr)
2700	{
2701	PDMDEV_ASSERT_DEVINS(pDevIns);
2702	PVM pVM = pDevIns->Internal.s.pVMR3;
2703	VM_ASSERT_EMT(pVM);
2704	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2705	pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2706
2707	if (pDevIns->iInstance > 0)
2708	{
2709	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
2710	if (pszDesc2)
2711	pszDesc = pszDesc2;
2712	}
2713
2714	int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2715
2716	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, pR0Ptr));
2717	return rc;
2718	}
2719
2720
2721	/**
2722	* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2723	*/
2724	static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2725	{
2726	PDMDEV_ASSERT_DEVINS(pDevIns);
2727	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2728
2729	int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2730	return rc;
2731	}
2732
2733
2734	/**
2735	* @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2736	*/
2737	static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2738	{
2739	PDMDEV_ASSERT_DEVINS(pDevIns);
2740	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2741
2742	int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2743	return rc;
2744	}
2745
2746
2747	/**
2748	* The device helper structure for trusted devices.
2749	*/
2750	const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2751	{
2752	PDM_DEVHLP_VERSION,
2753	pdmR3DevHlp_IOPortRegister,
2754	pdmR3DevHlp_IOPortRegisterGC,
2755	pdmR3DevHlp_IOPortRegisterR0,
2756	pdmR3DevHlp_IOPortDeregister,
2757	pdmR3DevHlp_MMIORegister,
2758	pdmR3DevHlp_MMIORegisterGC,
2759	pdmR3DevHlp_MMIORegisterR0,
2760	pdmR3DevHlp_MMIODeregister,
2761	pdmR3DevHlp_ROMRegister,
2762	pdmR3DevHlp_SSMRegister,
2763	pdmR3DevHlp_TMTimerCreate,
2764	pdmR3DevHlp_PCIRegister,
2765	pdmR3DevHlp_PCIIORegionRegister,
2766	pdmR3DevHlp_PCISetConfigCallbacks,
2767	pdmR3DevHlp_PCISetIrq,
2768	pdmR3DevHlp_PCISetIrqNoWait,
2769	pdmR3DevHlp_ISASetIrq,
2770	pdmR3DevHlp_ISASetIrqNoWait,
2771	pdmR3DevHlp_DriverAttach,
2772	pdmR3DevHlp_MMHeapAlloc,
2773	pdmR3DevHlp_MMHeapAllocZ,
2774	pdmR3DevHlp_MMHeapFree,
2775	pdmR3DevHlp_VMSetError,
2776	pdmR3DevHlp_VMSetErrorV,
2777	pdmR3DevHlp_VMSetRuntimeError,
2778	pdmR3DevHlp_VMSetRuntimeErrorV,
2779	pdmR3DevHlp_VMState,
2780	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
2781	pdmR3DevHlp_AssertEMT,
2782	pdmR3DevHlp_AssertOther,
2783	pdmR3DevHlp_DBGFStopV,
2784	pdmR3DevHlp_DBGFInfoRegister,
2785	pdmR3DevHlp_STAMRegister,
2786	pdmR3DevHlp_STAMRegisterF,
2787	pdmR3DevHlp_STAMRegisterV,
2788	pdmR3DevHlp_RTCRegister,
2789	pdmR3DevHlp_PDMQueueCreate,
2790	pdmR3DevHlp_CritSectInit,
2791	pdmR3DevHlp_UTCNow,
2792	pdmR3DevHlp_PDMThreadCreate,
2793	pdmR3DevHlp_PhysGCPtr2GCPhys,
2794	pdmR3DevHlp_SetAsyncNotification,
2795	pdmR3DevHlp_AsyncNotificationCompleted,
2796	0,
2797	0,
2798	0,
2799	0,
2800	0,
2801	0,
2802	0,
2803	0,
2804	0,
2805	0,
2806	pdmR3DevHlp_GetVM,
2807	pdmR3DevHlp_PCIBusRegister,
2808	pdmR3DevHlp_PICRegister,
2809	pdmR3DevHlp_APICRegister,
2810	pdmR3DevHlp_IOAPICRegister,
2811	pdmR3DevHlp_DMACRegister,
2812	pdmR3DevHlp_PhysRead,
2813	pdmR3DevHlp_PhysWrite,
2814	pdmR3DevHlp_PhysGCPhys2CCPtr,
2815	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2816	pdmR3DevHlp_PhysReleasePageMappingLock,
2817	pdmR3DevHlp_PhysReadGCVirt,
2818	pdmR3DevHlp_PhysWriteGCVirt,
2819	pdmR3DevHlp_A20IsEnabled,
2820	pdmR3DevHlp_A20Set,
2821	pdmR3DevHlp_VMReset,
2822	pdmR3DevHlp_VMSuspend,
2823	pdmR3DevHlp_VMPowerOff,
2824	pdmR3DevHlp_DMARegister,
2825	pdmR3DevHlp_DMAReadMemory,
2826	pdmR3DevHlp_DMAWriteMemory,
2827	pdmR3DevHlp_DMASetDREQ,
2828	pdmR3DevHlp_DMAGetChannelMode,
2829	pdmR3DevHlp_DMASchedule,
2830	pdmR3DevHlp_CMOSWrite,
2831	pdmR3DevHlp_CMOSRead,
2832	pdmR3DevHlp_GetCpuId,
2833	pdmR3DevHlp_ROMProtectShadow,
2834	pdmR3DevHlp_MMIO2Register,
2835	pdmR3DevHlp_MMIO2Deregister,
2836	pdmR3DevHlp_MMIO2Map,
2837	pdmR3DevHlp_MMIO2Unmap,
2838	pdmR3DevHlp_MMHyperMapMMIO2,
2839	pdmR3DevHlp_MMIO2MapKernel,
2840	pdmR3DevHlp_RegisterVMMDevHeap,
2841	pdmR3DevHlp_UnregisterVMMDevHeap,
2842	pdmR3DevHlp_GetVMCPU,
2843	PDM_DEVHLP_VERSION /* the end */
2844	};
2845
2846
2847
2848
2849	/** @copydoc PDMDEVHLPR3::pfnGetVM */
2850	static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2851	{
2852	PDMDEV_ASSERT_DEVINS(pDevIns);
2853	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2854	return NULL;
2855	}
2856
2857
2858	/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2859	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2860	{
2861	PDMDEV_ASSERT_DEVINS(pDevIns);
2862	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2863	NOREF(pPciBusReg);
2864	NOREF(ppPciHlpR3);
2865	return VERR_ACCESS_DENIED;
2866	}
2867
2868
2869	/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2870	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2871	{
2872	PDMDEV_ASSERT_DEVINS(pDevIns);
2873	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2874	NOREF(pPicReg);
2875	NOREF(ppPicHlpR3);
2876	return VERR_ACCESS_DENIED;
2877	}
2878
2879
2880	/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2881	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2882	{
2883	PDMDEV_ASSERT_DEVINS(pDevIns);
2884	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2885	NOREF(pApicReg);
2886	NOREF(ppApicHlpR3);
2887	return VERR_ACCESS_DENIED;
2888	}
2889
2890
2891	/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2892	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2893	{
2894	PDMDEV_ASSERT_DEVINS(pDevIns);
2895	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2896	NOREF(pIoApicReg);
2897	NOREF(ppIoApicHlpR3);
2898	return VERR_ACCESS_DENIED;
2899	}
2900
2901
2902	/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2903	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2904	{
2905	PDMDEV_ASSERT_DEVINS(pDevIns);
2906	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2907	NOREF(pDmacReg);
2908	NOREF(ppDmacHlp);
2909	return VERR_ACCESS_DENIED;
2910	}
2911
2912
2913	/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2914	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2915	{
2916	PDMDEV_ASSERT_DEVINS(pDevIns);
2917	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2918	NOREF(GCPhys);
2919	NOREF(pvBuf);
2920	NOREF(cbRead);
2921	return VERR_ACCESS_DENIED;
2922	}
2923
2924
2925	/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2926	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2927	{
2928	PDMDEV_ASSERT_DEVINS(pDevIns);
2929	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2930	NOREF(GCPhys);
2931	NOREF(pvBuf);
2932	NOREF(cbWrite);
2933	return VERR_ACCESS_DENIED;
2934	}
2935
2936
2937	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2938	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2939	{
2940	PDMDEV_ASSERT_DEVINS(pDevIns);
2941	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2942	NOREF(GCPhys);
2943	NOREF(fFlags);
2944	NOREF(ppv);
2945	NOREF(pLock);
2946	return VERR_ACCESS_DENIED;
2947	}
2948
2949
2950	/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2951	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2952	{
2953	PDMDEV_ASSERT_DEVINS(pDevIns);
2954	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2955	NOREF(GCPhys);
2956	NOREF(fFlags);
2957	NOREF(ppv);
2958	NOREF(pLock);
2959	return VERR_ACCESS_DENIED;
2960	}
2961
2962
2963	/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2964	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2965	{
2966	PDMDEV_ASSERT_DEVINS(pDevIns);
2967	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2968	NOREF(pLock);
2969	}
2970
2971
2972	/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2973	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2974	{
2975	PDMDEV_ASSERT_DEVINS(pDevIns);
2976	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2977	NOREF(pvDst);
2978	NOREF(GCVirtSrc);
2979	NOREF(cb);
2980	return VERR_ACCESS_DENIED;
2981	}
2982
2983
2984	/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2985	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2986	{
2987	PDMDEV_ASSERT_DEVINS(pDevIns);
2988	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2989	NOREF(GCVirtDst);
2990	NOREF(pvSrc);
2991	NOREF(cb);
2992	return VERR_ACCESS_DENIED;
2993	}
2994
2995
2996	/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2997	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
2998	{
2999	PDMDEV_ASSERT_DEVINS(pDevIns);
3000	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3001	return false;
3002	}
3003
3004
3005	/** @copydoc PDMDEVHLPR3::pfnA20Set */
3006	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3007	{
3008	PDMDEV_ASSERT_DEVINS(pDevIns);
3009	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3010	NOREF(fEnable);
3011	}
3012
3013
3014	/** @copydoc PDMDEVHLPR3::pfnVMReset */
3015	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3016	{
3017	PDMDEV_ASSERT_DEVINS(pDevIns);
3018	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3019	return VERR_ACCESS_DENIED;
3020	}
3021
3022
3023	/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
3024	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3025	{
3026	PDMDEV_ASSERT_DEVINS(pDevIns);
3027	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3028	return VERR_ACCESS_DENIED;
3029	}
3030
3031
3032	/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
3033	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3034	{
3035	PDMDEV_ASSERT_DEVINS(pDevIns);
3036	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3037	return VERR_ACCESS_DENIED;
3038	}
3039
3040	/** @copydoc PDMDEVHLPR3::pfnDMARegister */
3041	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3042	{
3043	PDMDEV_ASSERT_DEVINS(pDevIns);
3044	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3045	return VERR_ACCESS_DENIED;
3046	}
3047
3048
3049	/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
3050	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
3051	{
3052	PDMDEV_ASSERT_DEVINS(pDevIns);
3053	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3054	if (pcbRead)
3055	*pcbRead = 0;
3056	return VERR_ACCESS_DENIED;
3057	}
3058
3059
3060	/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
3061	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
3062	{
3063	PDMDEV_ASSERT_DEVINS(pDevIns);
3064	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3065	if (pcbWritten)
3066	*pcbWritten = 0;
3067	return VERR_ACCESS_DENIED;
3068	}
3069
3070
3071	/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
3072	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3073	{
3074	PDMDEV_ASSERT_DEVINS(pDevIns);
3075	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3076	return VERR_ACCESS_DENIED;
3077	}
3078
3079
3080	/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
3081	static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3082	{
3083	PDMDEV_ASSERT_DEVINS(pDevIns);
3084	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3085	return 3 << 2 /* illegal mode type */;
3086	}
3087
3088
3089	/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3090	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3091	{
3092	PDMDEV_ASSERT_DEVINS(pDevIns);
3093	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3094	}
3095
3096
3097	/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3098	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3099	{
3100	PDMDEV_ASSERT_DEVINS(pDevIns);
3101	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3102	return VERR_ACCESS_DENIED;
3103	}
3104
3105
3106	/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3107	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3108	{
3109	PDMDEV_ASSERT_DEVINS(pDevIns);
3110	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3111	return VERR_ACCESS_DENIED;
3112	}
3113
3114
3115	/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3116	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3117	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3118	{
3119	PDMDEV_ASSERT_DEVINS(pDevIns);
3120	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3121	}
3122
3123
3124	/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3125	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3126	{
3127	PDMDEV_ASSERT_DEVINS(pDevIns);
3128	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3129	return VERR_ACCESS_DENIED;
3130	}
3131
3132
3133	/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3134	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
3135	{
3136	PDMDEV_ASSERT_DEVINS(pDevIns);
3137	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3138	return VERR_ACCESS_DENIED;
3139	}
3140
3141
3142	/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3143	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3144	{
3145	PDMDEV_ASSERT_DEVINS(pDevIns);
3146	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3147	return VERR_ACCESS_DENIED;
3148	}
3149
3150
3151	/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3152	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3153	{
3154	PDMDEV_ASSERT_DEVINS(pDevIns);
3155	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3156	return VERR_ACCESS_DENIED;
3157	}
3158
3159
3160	/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3161	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3162	{
3163	PDMDEV_ASSERT_DEVINS(pDevIns);
3164	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3165	return VERR_ACCESS_DENIED;
3166	}
3167
3168
3169	/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3170	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3171	{
3172	PDMDEV_ASSERT_DEVINS(pDevIns);
3173	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3174	return VERR_ACCESS_DENIED;
3175	}
3176
3177
3178	/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3179	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3180	{
3181	PDMDEV_ASSERT_DEVINS(pDevIns);
3182	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3183	return VERR_ACCESS_DENIED;
3184	}
3185
3186
3187	/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3188	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3189	{
3190	PDMDEV_ASSERT_DEVINS(pDevIns);
3191	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3192	return VERR_ACCESS_DENIED;
3193	}
3194
3195
3196	/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3197	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3198	{
3199	PDMDEV_ASSERT_DEVINS(pDevIns);
3200	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3201	return VERR_ACCESS_DENIED;
3202	}
3203
3204
3205	/** @copydoc PDMDEVHLPR3::pfnGetVMCPU */
3206	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3207	{
3208	PDMDEV_ASSERT_DEVINS(pDevIns);
3209	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3210	return NULL;
3211	}
3212
3213
3214	/**
3215	* The device helper structure for non-trusted devices.
3216	*/
3217	const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3218	{
3219	PDM_DEVHLP_VERSION,
3220	pdmR3DevHlp_IOPortRegister,
3221	pdmR3DevHlp_IOPortRegisterGC,
3222	pdmR3DevHlp_IOPortRegisterR0,
3223	pdmR3DevHlp_IOPortDeregister,
3224	pdmR3DevHlp_MMIORegister,
3225	pdmR3DevHlp_MMIORegisterGC,
3226	pdmR3DevHlp_MMIORegisterR0,
3227	pdmR3DevHlp_MMIODeregister,
3228	pdmR3DevHlp_ROMRegister,
3229	pdmR3DevHlp_SSMRegister,
3230	pdmR3DevHlp_TMTimerCreate,
3231	pdmR3DevHlp_PCIRegister,
3232	pdmR3DevHlp_PCIIORegionRegister,
3233	pdmR3DevHlp_PCISetConfigCallbacks,
3234	pdmR3DevHlp_PCISetIrq,
3235	pdmR3DevHlp_PCISetIrqNoWait,
3236	pdmR3DevHlp_ISASetIrq,
3237	pdmR3DevHlp_ISASetIrqNoWait,
3238	pdmR3DevHlp_DriverAttach,
3239	pdmR3DevHlp_MMHeapAlloc,
3240	pdmR3DevHlp_MMHeapAllocZ,
3241	pdmR3DevHlp_MMHeapFree,
3242	pdmR3DevHlp_VMSetError,
3243	pdmR3DevHlp_VMSetErrorV,
3244	pdmR3DevHlp_VMSetRuntimeError,
3245	pdmR3DevHlp_VMSetRuntimeErrorV,
3246	pdmR3DevHlp_VMState,
3247	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3248	pdmR3DevHlp_AssertEMT,
3249	pdmR3DevHlp_AssertOther,
3250	pdmR3DevHlp_DBGFStopV,
3251	pdmR3DevHlp_DBGFInfoRegister,
3252	pdmR3DevHlp_STAMRegister,
3253	pdmR3DevHlp_STAMRegisterF,
3254	pdmR3DevHlp_STAMRegisterV,
3255	pdmR3DevHlp_RTCRegister,
3256	pdmR3DevHlp_PDMQueueCreate,
3257	pdmR3DevHlp_CritSectInit,
3258	pdmR3DevHlp_UTCNow,
3259	pdmR3DevHlp_PDMThreadCreate,
3260	pdmR3DevHlp_PhysGCPtr2GCPhys,
3261	pdmR3DevHlp_SetAsyncNotification,
3262	pdmR3DevHlp_AsyncNotificationCompleted,
3263	0,
3264	0,
3265	0,
3266	0,
3267	0,
3268	0,
3269	0,
3270	0,
3271	0,
3272	0,
3273	pdmR3DevHlp_Untrusted_GetVM,
3274	pdmR3DevHlp_Untrusted_PCIBusRegister,
3275	pdmR3DevHlp_Untrusted_PICRegister,
3276	pdmR3DevHlp_Untrusted_APICRegister,
3277	pdmR3DevHlp_Untrusted_IOAPICRegister,
3278	pdmR3DevHlp_Untrusted_DMACRegister,
3279	pdmR3DevHlp_Untrusted_PhysRead,
3280	pdmR3DevHlp_Untrusted_PhysWrite,
3281	pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr,
3282	pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly,
3283	pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock,
3284	pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3285	pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3286	pdmR3DevHlp_Untrusted_A20IsEnabled,
3287	pdmR3DevHlp_Untrusted_A20Set,
3288	pdmR3DevHlp_Untrusted_VMReset,
3289	pdmR3DevHlp_Untrusted_VMSuspend,
3290	pdmR3DevHlp_Untrusted_VMPowerOff,
3291	pdmR3DevHlp_Untrusted_DMARegister,
3292	pdmR3DevHlp_Untrusted_DMAReadMemory,
3293	pdmR3DevHlp_Untrusted_DMAWriteMemory,
3294	pdmR3DevHlp_Untrusted_DMASetDREQ,
3295	pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3296	pdmR3DevHlp_Untrusted_DMASchedule,
3297	pdmR3DevHlp_Untrusted_CMOSWrite,
3298	pdmR3DevHlp_Untrusted_CMOSRead,
3299	pdmR3DevHlp_Untrusted_GetCpuId,
3300	pdmR3DevHlp_Untrusted_ROMProtectShadow,
3301	pdmR3DevHlp_Untrusted_MMIO2Register,
3302	pdmR3DevHlp_Untrusted_MMIO2Deregister,
3303	pdmR3DevHlp_Untrusted_MMIO2Map,
3304	pdmR3DevHlp_Untrusted_MMIO2Unmap,
3305	pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3306	pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3307	pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3308	pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3309	pdmR3DevHlp_Untrusted_GetVMCPU,
3310	PDM_DEVHLP_VERSION /* the end */
3311	};
3312
3313
3314
3315	/**
3316	* Queue consumer callback for internal component.
3317	*
3318	* @returns Success indicator.
3319	* If false the item will not be removed and the flushing will stop.
3320	* @param pVM The VM handle.
3321	* @param pItem The item to consume. Upon return this item will be freed.
3322	*/
3323	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3324	{
3325	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3326	LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3327	switch (pTask->enmOp)
3328	{
3329	case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3330	PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3331	break;
3332
3333	case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3334	pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3335	break;
3336
3337	case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3338	PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3339	break;
3340
3341	default:
3342	AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3343	break;
3344	}
3345	return true;
3346	}
3347
3348	/** @} */
3349

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source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 25891

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