VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 26157

Last change on this file since 26157 was 26157, checked in by vboxsync, 15 years ago

PDMDEVHLPR3 cleanup; reduced the number of strict functions.
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File size: 128.1 KB
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1/* $Id: PDMDevHlp.cpp 26157 2010-02-02 18:02:15Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2010 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/mm.h>
30#include <VBox/pgm.h>
31#include <VBox/iom.h>
32#include <VBox/rem.h>
33#include <VBox/dbgf.h>
34#include <VBox/vm.h>
35#include <VBox/vmm.h>
36
37#include <VBox/version.h>
38#include <VBox/log.h>
39#include <VBox/err.h>
40#include <iprt/asm.h>
41#include <iprt/assert.h>
42#include <iprt/string.h>
43#include <iprt/thread.h>
44
45
46/*******************************************************************************
47* Defined Constants And Macros *
48*******************************************************************************/
49/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50 * Define this to enable the deadlock detection when accessing physical memory.
51 */
52#if /*defined(DEBUG_bird) ||*/ defined(DOXYGEN_RUNNING)
53# define PDM_DEVHLP_DEADLOCK_DETECTION /**< @todo enable DevHlp deadlock detection! */
54#endif
55
56
57/*******************************************************************************
58* Defined Constants And Macros *
59*******************************************************************************/
60/** @name R3 DevHlp
61 * @{
62 */
63
64
65/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
66static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68{
69 PDMDEV_ASSERT_DEVINS(pDevIns);
70 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
71 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74#if 0 /** @todo needs a real string cache for this */
75 if (pDevIns->iInstance > 0)
76 {
77 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
78 if (pszDesc2)
79 pszDesc = pszDesc2;
80 }
81#endif
82
83 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
84
85 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
86 return rc;
87}
88
89
90/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
91static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
92 const char *pszOut, const char *pszIn,
93 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
94{
95 PDMDEV_ASSERT_DEVINS(pDevIns);
96 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
98 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
99
100 /*
101 * Resolve the functions (one of the can be NULL).
102 */
103 int rc = VINF_SUCCESS;
104 if ( pDevIns->pDevReg->szRCMod[0]
105 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
106 {
107 RTRCPTR RCPtrIn = NIL_RTRCPTR;
108 if (pszIn)
109 {
110 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
111 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
112 }
113 RTRCPTR RCPtrOut = NIL_RTRCPTR;
114 if (pszOut && RT_SUCCESS(rc))
115 {
116 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
117 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
118 }
119 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
120 if (pszInStr && RT_SUCCESS(rc))
121 {
122 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
123 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
124 }
125 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
126 if (pszOutStr && RT_SUCCESS(rc))
127 {
128 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
129 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
130 }
131
132 if (RT_SUCCESS(rc))
133 {
134#if 0 /** @todo needs a real string cache for this */
135 if (pDevIns->iInstance > 0)
136 {
137 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
138 if (pszDesc2)
139 pszDesc = pszDesc2;
140 }
141#endif
142
143 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
144 }
145 }
146 else
147 {
148 AssertMsgFailed(("No GC module for this driver!\n"));
149 rc = VERR_INVALID_PARAMETER;
150 }
151
152 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
153 return rc;
154}
155
156
157/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
158static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
159 const char *pszOut, const char *pszIn,
160 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
161{
162 PDMDEV_ASSERT_DEVINS(pDevIns);
163 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
164 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
165 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
166
167 /*
168 * Resolve the functions (one of the can be NULL).
169 */
170 int rc = VINF_SUCCESS;
171 if ( pDevIns->pDevReg->szR0Mod[0]
172 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
173 {
174 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
175 if (pszIn)
176 {
177 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
178 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
179 }
180 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
181 if (pszOut && RT_SUCCESS(rc))
182 {
183 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
184 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
185 }
186 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
187 if (pszInStr && RT_SUCCESS(rc))
188 {
189 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
190 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
191 }
192 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
193 if (pszOutStr && RT_SUCCESS(rc))
194 {
195 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
196 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
197 }
198
199 if (RT_SUCCESS(rc))
200 {
201#if 0 /** @todo needs a real string cache for this */
202 if (pDevIns->iInstance > 0)
203 {
204 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
205 if (pszDesc2)
206 pszDesc = pszDesc2;
207 }
208#endif
209
210 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
211 }
212 }
213 else
214 {
215 AssertMsgFailed(("No R0 module for this driver!\n"));
216 rc = VERR_INVALID_PARAMETER;
217 }
218
219 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
220 return rc;
221}
222
223
224/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
225static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
226{
227 PDMDEV_ASSERT_DEVINS(pDevIns);
228 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
229 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
230 Port, cPorts));
231
232 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
233
234 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
235 return rc;
236}
237
238
239/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
240static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
241 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
242 const char *pszDesc)
243{
244 PDMDEV_ASSERT_DEVINS(pDevIns);
245 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
246 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
247 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
248
249/** @todo IOMR3MMIORegisterR3 mangles the description, move it here. */
250 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
251
252 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
253 return rc;
254}
255
256
257/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
258static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
259 const char *pszWrite, const char *pszRead, const char *pszFill,
260 const char *pszDesc)
261{
262 PDMDEV_ASSERT_DEVINS(pDevIns);
263 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
264 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
265 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
266
267/** @todo pszDesc is unused here, drop it. */
268
269 /*
270 * Resolve the functions.
271 * Not all function have to present, leave it to IOM to enforce this.
272 */
273 int rc = VINF_SUCCESS;
274 if ( pDevIns->pDevReg->szRCMod[0]
275 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
276 {
277 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
278 if (pszWrite)
279 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
280
281 RTRCPTR RCPtrRead = NIL_RTRCPTR;
282 int rc2 = VINF_SUCCESS;
283 if (pszRead)
284 rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
285
286 RTRCPTR RCPtrFill = NIL_RTRCPTR;
287 int rc3 = VINF_SUCCESS;
288 if (pszFill)
289 rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
290
291 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
292 rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
293 else
294 {
295 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
296 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
297 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
298 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
299 rc = rc2;
300 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
301 rc = rc3;
302 }
303 }
304 else
305 {
306 AssertMsgFailed(("No GC module for this driver!\n"));
307 rc = VERR_INVALID_PARAMETER;
308 }
309
310 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
311 return rc;
312}
313
314/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
315static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
316 const char *pszWrite, const char *pszRead, const char *pszFill,
317 const char *pszDesc)
318{
319 PDMDEV_ASSERT_DEVINS(pDevIns);
320 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
321 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
322 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
323
324/** @todo pszDesc is unused here, remove it. */
325
326 /*
327 * Resolve the functions.
328 * Not all function have to present, leave it to IOM to enforce this.
329 */
330 int rc = VINF_SUCCESS;
331 if ( pDevIns->pDevReg->szR0Mod[0]
332 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
333 {
334 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
335 if (pszWrite)
336 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
337 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
338 int rc2 = VINF_SUCCESS;
339 if (pszRead)
340 rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
341 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
342 int rc3 = VINF_SUCCESS;
343 if (pszFill)
344 rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
345 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
346 rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
347 else
348 {
349 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
350 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
351 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
352 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
353 rc = rc2;
354 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
355 rc = rc3;
356 }
357 }
358 else
359 {
360 AssertMsgFailed(("No R0 module for this driver!\n"));
361 rc = VERR_INVALID_PARAMETER;
362 }
363
364 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
365 return rc;
366}
367
368
369/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
370static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
371{
372 PDMDEV_ASSERT_DEVINS(pDevIns);
373 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
374 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
375 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
376
377 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
378
379 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
380 return rc;
381}
382
383
384/**
385 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
386 */
387static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
388{
389 PDMDEV_ASSERT_DEVINS(pDevIns);
390 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
391 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
392 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
393
394/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
395 * use a real string cache. */
396 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
397
398 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
399 return rc;
400}
401
402
403/**
404 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
405 */
406static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
407{
408 PDMDEV_ASSERT_DEVINS(pDevIns);
409 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
410 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
411 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
412
413 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
414
415 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
416
417 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
418 return rc;
419}
420
421
422/**
423 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
424 */
425static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
426{
427 PDMDEV_ASSERT_DEVINS(pDevIns);
428 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
429 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
430 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
431
432 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
433
434 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
435 return rc;
436}
437
438
439/**
440 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
441 */
442static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
443{
444 PDMDEV_ASSERT_DEVINS(pDevIns);
445 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
446 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
447 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
448
449 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
450
451 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
452 return rc;
453}
454
455
456/**
457 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
458 */
459static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
460 const char *pszDesc, PRTRCPTR pRCPtr)
461{
462 PDMDEV_ASSERT_DEVINS(pDevIns);
463 PVM pVM = pDevIns->Internal.s.pVMR3;
464 VM_ASSERT_EMT(pVM);
465 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
466 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
467
468 if (pDevIns->iInstance > 0)
469 {
470 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
471 if (pszDesc2)
472 pszDesc = pszDesc2;
473 }
474
475 int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
476
477 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pRCPtr));
478 return rc;
479}
480
481
482/**
483 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
484 */
485static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
486 const char *pszDesc, PRTR0PTR pR0Ptr)
487{
488 PDMDEV_ASSERT_DEVINS(pDevIns);
489 PVM pVM = pDevIns->Internal.s.pVMR3;
490 VM_ASSERT_EMT(pVM);
491 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
492 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
493
494 if (pDevIns->iInstance > 0)
495 {
496 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
497 if (pszDesc2)
498 pszDesc = pszDesc2;
499 }
500
501 int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
502
503 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pR0Ptr));
504 return rc;
505}
506
507
508/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
509static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
510{
511 PDMDEV_ASSERT_DEVINS(pDevIns);
512 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
513 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
514 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
515
516/** @todo can we mangle pszDesc? */
517 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
518
519 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
520 return rc;
521}
522
523
524/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
525static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
526{
527 PDMDEV_ASSERT_DEVINS(pDevIns);
528 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
529 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
530
531 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
532
533 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
534 return rc;
535}
536
537
538/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
539static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
540 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
541 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
542 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
543{
544 PDMDEV_ASSERT_DEVINS(pDevIns);
545 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
546 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
547 " pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
548 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
549 pfnLivePrep, pfnLiveExec, pfnLiveVote,
550 pfnSavePrep, pfnSaveExec, pfnSaveDone,
551 pfnLoadPrep, pfnLoadExec, pfnLoadDone));
552
553 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
554 uVersion, cbGuess, pszBefore,
555 pfnLivePrep, pfnLiveExec, pfnLiveVote,
556 pfnSavePrep, pfnSaveExec, pfnSaveDone,
557 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
558
559 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
560 return rc;
561}
562
563
564/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
565static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer)
566{
567 PDMDEV_ASSERT_DEVINS(pDevIns);
568 PVM pVM = pDevIns->Internal.s.pVMR3;
569 VM_ASSERT_EMT(pVM);
570 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
571 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
572
573 if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
574 {
575 char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
576 if (pszDesc2)
577 pszDesc = pszDesc2;
578 }
579
580 int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
581
582 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
583 return rc;
584}
585
586
587/** @interface_method_impl{PDMDEVHLPR3,pfnUTCNow} */
588static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
589{
590 PDMDEV_ASSERT_DEVINS(pDevIns);
591 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
592 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
593
594 pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
595
596 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
597 return pTime;
598}
599
600
601/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
602static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
603{
604 PDMDEV_ASSERT_DEVINS(pDevIns);
605 PVM pVM = pDevIns->Internal.s.pVMR3;
606 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
607 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
608
609#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
610 if (!VM_IS_EMT(pVM))
611 {
612 char szNames[128];
613 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
614 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
615 }
616#endif
617
618 int rc;
619 if (VM_IS_EMT(pVM))
620 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
621 else
622 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
623
624 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
625 return rc;
626}
627
628
629/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
630static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
631{
632 PDMDEV_ASSERT_DEVINS(pDevIns);
633 PVM pVM = pDevIns->Internal.s.pVMR3;
634 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
635 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
636
637#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
638 if (!VM_IS_EMT(pVM))
639 {
640 char szNames[128];
641 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
642 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
643 }
644#endif
645
646 int rc;
647 if (VM_IS_EMT(pVM))
648 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
649 else
650 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pDevReg->szDeviceName);
651
652 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
653 return rc;
654}
655
656
657/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
658static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
659{
660 PDMDEV_ASSERT_DEVINS(pDevIns);
661 PVM pVM = pDevIns->Internal.s.pVMR3;
662 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
663 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
664 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
665
666#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
667 if (!VM_IS_EMT(pVM))
668 {
669 char szNames[128];
670 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
671 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
672 }
673#endif
674
675 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
676
677 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
678 return rc;
679}
680
681
682/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
683static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
684{
685 PDMDEV_ASSERT_DEVINS(pDevIns);
686 PVM pVM = pDevIns->Internal.s.pVMR3;
687 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
688 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
689 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
690
691#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
692 if (!VM_IS_EMT(pVM))
693 {
694 char szNames[128];
695 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
696 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
697 }
698#endif
699
700 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
701
702 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
703 return rc;
704}
705
706
707/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
708static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
709{
710 PDMDEV_ASSERT_DEVINS(pDevIns);
711 PVM pVM = pDevIns->Internal.s.pVMR3;
712 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
713 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pLock));
714
715 PGMPhysReleasePageMappingLock(pVM, pLock);
716
717 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
718}
719
720
721/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
722static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
723{
724 PDMDEV_ASSERT_DEVINS(pDevIns);
725 PVM pVM = pDevIns->Internal.s.pVMR3;
726 VM_ASSERT_EMT(pVM);
727 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
728 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
729
730 PVMCPU pVCpu = VMMGetCpu(pVM);
731 if (!pVCpu)
732 return VERR_ACCESS_DENIED;
733#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
734 /** @todo SMP. */
735#endif
736
737 int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
738
739 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
740
741 return rc;
742}
743
744
745/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
746static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
747{
748 PDMDEV_ASSERT_DEVINS(pDevIns);
749 PVM pVM = pDevIns->Internal.s.pVMR3;
750 VM_ASSERT_EMT(pVM);
751 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
752 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
753
754 PVMCPU pVCpu = VMMGetCpu(pVM);
755 if (!pVCpu)
756 return VERR_ACCESS_DENIED;
757#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
758 /** @todo SMP. */
759#endif
760
761 int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
762
763 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
764
765 return rc;
766}
767
768
769/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
770static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
771{
772 PDMDEV_ASSERT_DEVINS(pDevIns);
773 PVM pVM = pDevIns->Internal.s.pVMR3;
774 VM_ASSERT_EMT(pVM);
775 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
776 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
777
778 PVMCPU pVCpu = VMMGetCpu(pVM);
779 if (!pVCpu)
780 return VERR_ACCESS_DENIED;
781#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
782 /** @todo SMP. */
783#endif
784
785 int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
786
787 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pGCPhys));
788
789 return rc;
790}
791
792
793/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
794static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
795{
796 PDMDEV_ASSERT_DEVINS(pDevIns);
797 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
798
799 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
800
801 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
802 return pv;
803}
804
805
806/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
807static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
808{
809 PDMDEV_ASSERT_DEVINS(pDevIns);
810 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
811
812 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
813
814 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
815 return pv;
816}
817
818
819/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
820static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
821{
822 PDMDEV_ASSERT_DEVINS(pDevIns);
823 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
824
825 MMR3HeapFree(pv);
826
827 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
828}
829
830
831/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
832static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
833{
834 PDMDEV_ASSERT_DEVINS(pDevIns);
835
836 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
837
838 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
839 enmVMState, VMR3GetStateName(enmVMState)));
840 return enmVMState;
841}
842
843
844/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
845static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
846{
847 PDMDEV_ASSERT_DEVINS(pDevIns);
848
849 bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
850
851 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
852 fRc));
853 return fRc;
854}
855
856
857/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
858static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
859{
860 PDMDEV_ASSERT_DEVINS(pDevIns);
861 va_list args;
862 va_start(args, pszFormat);
863 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
864 va_end(args);
865 return rc;
866}
867
868
869/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
870static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
871{
872 PDMDEV_ASSERT_DEVINS(pDevIns);
873 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
874 return rc;
875}
876
877
878/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
879static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
880{
881 PDMDEV_ASSERT_DEVINS(pDevIns);
882 va_list args;
883 va_start(args, pszFormat);
884 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
885 va_end(args);
886 return rc;
887}
888
889
890/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
891static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
892{
893 PDMDEV_ASSERT_DEVINS(pDevIns);
894 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
895 return rc;
896}
897
898
899/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
900static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
901{
902 PDMDEV_ASSERT_DEVINS(pDevIns);
903#ifdef LOG_ENABLED
904 va_list va2;
905 va_copy(va2, args);
906 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
907 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
908 va_end(va2);
909#endif
910
911 PVM pVM = pDevIns->Internal.s.pVMR3;
912 VM_ASSERT_EMT(pVM);
913 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
914 if (rc == VERR_DBGF_NOT_ATTACHED)
915 rc = VINF_SUCCESS;
916
917 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
918 return rc;
919}
920
921
922/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
923static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
924{
925 PDMDEV_ASSERT_DEVINS(pDevIns);
926 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
927 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
928
929 PVM pVM = pDevIns->Internal.s.pVMR3;
930 VM_ASSERT_EMT(pVM);
931 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
932
933 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
934 return rc;
935}
936
937
938/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
939static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
940{
941 PDMDEV_ASSERT_DEVINS(pDevIns);
942 PVM pVM = pDevIns->Internal.s.pVMR3;
943 VM_ASSERT_EMT(pVM);
944
945 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
946 NOREF(pVM);
947}
948
949
950
951/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
952static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
953 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
954{
955 PDMDEV_ASSERT_DEVINS(pDevIns);
956 PVM pVM = pDevIns->Internal.s.pVMR3;
957 VM_ASSERT_EMT(pVM);
958
959 va_list args;
960 va_start(args, pszName);
961 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
962 va_end(args);
963 AssertRC(rc);
964
965 NOREF(pVM);
966}
967
968
969/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
970static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
971 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
972{
973 PDMDEV_ASSERT_DEVINS(pDevIns);
974 PVM pVM = pDevIns->Internal.s.pVMR3;
975 VM_ASSERT_EMT(pVM);
976
977 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
978 AssertRC(rc);
979
980 NOREF(pVM);
981}
982
983
984/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister} */
985static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
986{
987 PDMDEV_ASSERT_DEVINS(pDevIns);
988 PVM pVM = pDevIns->Internal.s.pVMR3;
989 VM_ASSERT_EMT(pVM);
990 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
991 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
992
993 /*
994 * Validate input.
995 */
996 if (!pPciDev)
997 {
998 Assert(pPciDev);
999 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1000 return VERR_INVALID_PARAMETER;
1001 }
1002 if (!pPciDev->config[0] && !pPciDev->config[1])
1003 {
1004 Assert(pPciDev->config[0] || pPciDev->config[1]);
1005 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1006 return VERR_INVALID_PARAMETER;
1007 }
1008 if (pDevIns->Internal.s.pPciDeviceR3)
1009 {
1010 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1011 * support a PDM device with multiple PCI devices. This might become a problem
1012 * when upgrading the chipset for instance because of multiple functions in some
1013 * devices...
1014 */
1015 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1016 return VERR_INTERNAL_ERROR;
1017 }
1018
1019 /*
1020 * Choose the PCI bus for the device.
1021 *
1022 * This is simple. If the device was configured for a particular bus, the PCIBusNo
1023 * configuration value will be set. If not the default bus is 0.
1024 */
1025 int rc;
1026 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1027 if (!pBus)
1028 {
1029 uint8_t u8Bus;
1030 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
1031 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1032 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
1033 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1034 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1035 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
1036 VERR_PDM_NO_PCI_BUS);
1037 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1038 }
1039 if (pBus->pDevInsR3)
1040 {
1041 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
1042 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
1043 else
1044 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
1045
1046 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
1047 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
1048 else
1049 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
1050
1051 /*
1052 * Check the configuration for PCI device and function assignment.
1053 */
1054 int iDev = -1;
1055 uint8_t u8Device;
1056 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1057 if (RT_SUCCESS(rc))
1058 {
1059 if (u8Device > 31)
1060 {
1061 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1062 u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1063 return VERR_INTERNAL_ERROR;
1064 }
1065
1066 uint8_t u8Function;
1067 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1068 if (RT_FAILURE(rc))
1069 {
1070 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
1071 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1072 return rc;
1073 }
1074 if (u8Function > 7)
1075 {
1076 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1077 u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1078 return VERR_INTERNAL_ERROR;
1079 }
1080 iDev = (u8Device << 3) | u8Function;
1081 }
1082 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1083 {
1084 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
1085 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1086 return rc;
1087 }
1088
1089 /*
1090 * Call the pci bus device to do the actual registration.
1091 */
1092 pdmLock(pVM);
1093 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
1094 pdmUnlock(pVM);
1095 if (RT_SUCCESS(rc))
1096 {
1097 pPciDev->pDevIns = pDevIns;
1098
1099 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
1100 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
1101 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
1102 else
1103 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
1104
1105 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
1106 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
1107 else
1108 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
1109
1110 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1111 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
1112 }
1113 }
1114 else
1115 {
1116 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1117 rc = VERR_PDM_NO_PCI_BUS;
1118 }
1119
1120 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1121 return rc;
1122}
1123
1124
1125/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1126static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1127{
1128 PDMDEV_ASSERT_DEVINS(pDevIns);
1129 PVM pVM = pDevIns->Internal.s.pVMR3;
1130 VM_ASSERT_EMT(pVM);
1131 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1132 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1133
1134 /*
1135 * Validate input.
1136 */
1137 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
1138 {
1139 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1140 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1141 return VERR_INVALID_PARAMETER;
1142 }
1143 switch (enmType)
1144 {
1145 case PCI_ADDRESS_SPACE_IO:
1146 /*
1147 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
1148 */
1149 AssertMsgReturn(cbRegion <= _32K,
1150 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
1151 VERR_INVALID_PARAMETER);
1152 break;
1153
1154 case PCI_ADDRESS_SPACE_MEM:
1155 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1156 /*
1157 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
1158 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
1159 */
1160 AssertMsgReturn(cbRegion <= 512 * _1M,
1161 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
1162 VERR_INVALID_PARAMETER);
1163 break;
1164 default:
1165 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1166 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1167 return VERR_INVALID_PARAMETER;
1168 }
1169 if (!pfnCallback)
1170 {
1171 Assert(pfnCallback);
1172 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1173 return VERR_INVALID_PARAMETER;
1174 }
1175 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1176
1177 /*
1178 * Must have a PCI device registered!
1179 */
1180 int rc;
1181 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1182 if (pPciDev)
1183 {
1184 /*
1185 * We're currently restricted to page aligned MMIO regions.
1186 */
1187 if ( (enmType == PCI_ADDRESS_SPACE_MEM || enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
1188 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1189 {
1190 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1191 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1192 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1193 }
1194
1195 /*
1196 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1197 */
1198 int iLastSet = ASMBitLastSetU32(cbRegion);
1199 Assert(iLastSet > 0);
1200 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
1201 if (cbRegion > cbRegionAligned)
1202 cbRegion = cbRegionAligned * 2; /* round up */
1203
1204 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1205 Assert(pBus);
1206 pdmLock(pVM);
1207 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1208 pdmUnlock(pVM);
1209 }
1210 else
1211 {
1212 AssertMsgFailed(("No PCI device registered!\n"));
1213 rc = VERR_PDM_NOT_PCI_DEVICE;
1214 }
1215
1216 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1217 return rc;
1218}
1219
1220
1221/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1222static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1223 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1224{
1225 PDMDEV_ASSERT_DEVINS(pDevIns);
1226 PVM pVM = pDevIns->Internal.s.pVMR3;
1227 VM_ASSERT_EMT(pVM);
1228 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1229 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1230
1231 /*
1232 * Validate input and resolve defaults.
1233 */
1234 AssertPtr(pfnRead);
1235 AssertPtr(pfnWrite);
1236 AssertPtrNull(ppfnReadOld);
1237 AssertPtrNull(ppfnWriteOld);
1238 AssertPtrNull(pPciDev);
1239
1240 if (!pPciDev)
1241 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1242 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1243 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1244 AssertRelease(pBus);
1245 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1246
1247 /*
1248 * Do the job.
1249 */
1250 pdmLock(pVM);
1251 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1252 pdmUnlock(pVM);
1253
1254 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1255}
1256
1257
1258/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1259static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1260{
1261 PDMDEV_ASSERT_DEVINS(pDevIns);
1262 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1263
1264 /*
1265 * Validate input.
1266 */
1267 /** @todo iIrq and iLevel checks. */
1268
1269 /*
1270 * Must have a PCI device registered!
1271 */
1272 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1273 if (pPciDev)
1274 {
1275 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1276 Assert(pBus);
1277 PVM pVM = pDevIns->Internal.s.pVMR3;
1278 pdmLock(pVM);
1279 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1280 pdmUnlock(pVM);
1281 }
1282 else
1283 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1284
1285 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1286}
1287
1288
1289/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1290static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1291{
1292 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1293}
1294
1295
1296/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1297static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1298{
1299 PDMDEV_ASSERT_DEVINS(pDevIns);
1300 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1301
1302 /*
1303 * Validate input.
1304 */
1305 /** @todo iIrq and iLevel checks. */
1306
1307 PVM pVM = pDevIns->Internal.s.pVMR3;
1308 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
1309
1310 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1311}
1312
1313
1314/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1315static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1316{
1317 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1318}
1319
1320
1321/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
1322static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
1323{
1324 PDMDEV_ASSERT_DEVINS(pDevIns);
1325 PVM pVM = pDevIns->Internal.s.pVMR3;
1326 VM_ASSERT_EMT(pVM);
1327 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1328 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1329
1330 /*
1331 * Lookup the LUN, it might already be registered.
1332 */
1333 PPDMLUN pLunPrev = NULL;
1334 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
1335 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1336 if (pLun->iLun == iLun)
1337 break;
1338
1339 /*
1340 * Create the LUN if if wasn't found, else check if driver is already attached to it.
1341 */
1342 if (!pLun)
1343 {
1344 if ( !pBaseInterface
1345 || !pszDesc
1346 || !*pszDesc)
1347 {
1348 Assert(pBaseInterface);
1349 Assert(pszDesc || *pszDesc);
1350 return VERR_INVALID_PARAMETER;
1351 }
1352
1353 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1354 if (!pLun)
1355 return VERR_NO_MEMORY;
1356
1357 pLun->iLun = iLun;
1358 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1359 pLun->pTop = NULL;
1360 pLun->pBottom = NULL;
1361 pLun->pDevIns = pDevIns;
1362 pLun->pUsbIns = NULL;
1363 pLun->pszDesc = pszDesc;
1364 pLun->pBase = pBaseInterface;
1365 if (!pLunPrev)
1366 pDevIns->Internal.s.pLunsR3 = pLun;
1367 else
1368 pLunPrev->pNext = pLun;
1369 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1370 iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1371 }
1372 else if (pLun->pTop)
1373 {
1374 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1375 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1376 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1377 }
1378 Assert(pLun->pBase == pBaseInterface);
1379
1380
1381 /*
1382 * Get the attached driver configuration.
1383 */
1384 int rc;
1385 PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
1386 if (pNode)
1387 rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /*pDrvAbove*/, pLun, ppBaseInterface);
1388 else
1389 rc = VERR_PDM_NO_ATTACHED_DRIVER;
1390
1391
1392 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1393 return rc;
1394}
1395
1396
1397/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
1398static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1399 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
1400{
1401 PDMDEV_ASSERT_DEVINS(pDevIns);
1402 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1403 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1404
1405 PVM pVM = pDevIns->Internal.s.pVMR3;
1406 VM_ASSERT_EMT(pVM);
1407
1408 if (pDevIns->iInstance > 0)
1409 {
1410 pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1411 AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1412 }
1413
1414 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1415
1416 LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppQueue));
1417 return rc;
1418}
1419
1420
1421/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
1422static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1423 const char *pszNameFmt, va_list va)
1424{
1425 PDMDEV_ASSERT_DEVINS(pDevIns);
1426 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
1427 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
1428
1429 PVM pVM = pDevIns->Internal.s.pVMR3;
1430 VM_ASSERT_EMT(pVM);
1431 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS, pszNameFmt, va);
1432
1433 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1434 return rc;
1435}
1436
1437
1438/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
1439static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1440 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1441{
1442 PDMDEV_ASSERT_DEVINS(pDevIns);
1443 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1444 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1445 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1446
1447 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1448
1449 LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1450 rc, *ppThread));
1451 return rc;
1452}
1453
1454
1455/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
1456static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
1457{
1458 PDMDEV_ASSERT_DEVINS(pDevIns);
1459 VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
1460 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pfnAsyncNotify));
1461
1462 int rc = VINF_SUCCESS;
1463 AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
1464 AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
1465 AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED | PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
1466 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1467 AssertStmt( enmVMState == VMSTATE_SUSPENDING
1468 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1469 || enmVMState == VMSTATE_SUSPENDING_LS
1470 || enmVMState == VMSTATE_RESETTING
1471 || enmVMState == VMSTATE_RESETTING_LS
1472 || enmVMState == VMSTATE_POWERING_OFF
1473 || enmVMState == VMSTATE_POWERING_OFF_LS,
1474 rc = VERR_INVALID_STATE);
1475
1476 if (RT_SUCCESS(rc))
1477 pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
1478
1479 LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1480 return rc;
1481}
1482
1483
1484/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
1485static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
1486{
1487 PDMDEV_ASSERT_DEVINS(pDevIns);
1488 PVM pVM = pDevIns->Internal.s.pVMR3;
1489
1490 VMSTATE enmVMState = VMR3GetState(pVM);
1491 if ( enmVMState == VMSTATE_SUSPENDING
1492 || enmVMState == VMSTATE_SUSPENDING_EXT_LS
1493 || enmVMState == VMSTATE_SUSPENDING_LS
1494 || enmVMState == VMSTATE_RESETTING
1495 || enmVMState == VMSTATE_RESETTING_LS
1496 || enmVMState == VMSTATE_POWERING_OFF
1497 || enmVMState == VMSTATE_POWERING_OFF_LS)
1498 {
1499 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1500 VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
1501 }
1502 else
1503 LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmVMState));
1504}
1505
1506
1507/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
1508static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1509{
1510 PDMDEV_ASSERT_DEVINS(pDevIns);
1511 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1512 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1513 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1514 pRtcReg->pfnWrite, ppRtcHlp));
1515
1516 /*
1517 * Validate input.
1518 */
1519 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1520 {
1521 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1522 PDM_RTCREG_VERSION));
1523 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1524 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1525 return VERR_INVALID_PARAMETER;
1526 }
1527 if ( !pRtcReg->pfnWrite
1528 || !pRtcReg->pfnRead)
1529 {
1530 Assert(pRtcReg->pfnWrite);
1531 Assert(pRtcReg->pfnRead);
1532 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1533 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1534 return VERR_INVALID_PARAMETER;
1535 }
1536
1537 if (!ppRtcHlp)
1538 {
1539 Assert(ppRtcHlp);
1540 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1541 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1542 return VERR_INVALID_PARAMETER;
1543 }
1544
1545 /*
1546 * Only one DMA device.
1547 */
1548 PVM pVM = pDevIns->Internal.s.pVMR3;
1549 if (pVM->pdm.s.pRtc)
1550 {
1551 AssertMsgFailed(("Only one RTC device is supported!\n"));
1552 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1553 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1554 return VERR_INVALID_PARAMETER;
1555 }
1556
1557 /*
1558 * Allocate and initialize pci bus structure.
1559 */
1560 int rc = VINF_SUCCESS;
1561 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1562 if (pRtc)
1563 {
1564 pRtc->pDevIns = pDevIns;
1565 pRtc->Reg = *pRtcReg;
1566 pVM->pdm.s.pRtc = pRtc;
1567
1568 /* set the helper pointer. */
1569 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1570 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1571 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1572 }
1573 else
1574 rc = VERR_NO_MEMORY;
1575
1576 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1577 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1578 return rc;
1579}
1580
1581
1582/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
1583static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
1584{
1585 PDMDEV_ASSERT_DEVINS(pDevIns);
1586 PVM pVM = pDevIns->Internal.s.pVMR3;
1587 VM_ASSERT_EMT(pVM);
1588 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
1589 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
1590 int rc = VINF_SUCCESS;
1591 if (pVM->pdm.s.pDmac)
1592 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
1593 else
1594 {
1595 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1596 rc = VERR_PDM_NO_DMAC_INSTANCE;
1597 }
1598 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
1599 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1600 return rc;
1601}
1602
1603
1604/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
1605static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
1606{
1607 PDMDEV_ASSERT_DEVINS(pDevIns);
1608 PVM pVM = pDevIns->Internal.s.pVMR3;
1609 VM_ASSERT_EMT(pVM);
1610 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
1611 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
1612 int rc = VINF_SUCCESS;
1613 if (pVM->pdm.s.pDmac)
1614 {
1615 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1616 if (pcbRead)
1617 *pcbRead = cb;
1618 }
1619 else
1620 {
1621 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1622 rc = VERR_PDM_NO_DMAC_INSTANCE;
1623 }
1624 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
1625 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1626 return rc;
1627}
1628
1629
1630/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
1631static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
1632{
1633 PDMDEV_ASSERT_DEVINS(pDevIns);
1634 PVM pVM = pDevIns->Internal.s.pVMR3;
1635 VM_ASSERT_EMT(pVM);
1636 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
1637 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
1638 int rc = VINF_SUCCESS;
1639 if (pVM->pdm.s.pDmac)
1640 {
1641 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1642 if (pcbWritten)
1643 *pcbWritten = cb;
1644 }
1645 else
1646 {
1647 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1648 rc = VERR_PDM_NO_DMAC_INSTANCE;
1649 }
1650 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
1651 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1652 return rc;
1653}
1654
1655
1656/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
1657static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
1658{
1659 PDMDEV_ASSERT_DEVINS(pDevIns);
1660 PVM pVM = pDevIns->Internal.s.pVMR3;
1661 VM_ASSERT_EMT(pVM);
1662 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
1663 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
1664 int rc = VINF_SUCCESS;
1665 if (pVM->pdm.s.pDmac)
1666 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
1667 else
1668 {
1669 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1670 rc = VERR_PDM_NO_DMAC_INSTANCE;
1671 }
1672 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
1673 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1674 return rc;
1675}
1676
1677/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
1678static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
1679{
1680 PDMDEV_ASSERT_DEVINS(pDevIns);
1681 PVM pVM = pDevIns->Internal.s.pVMR3;
1682 VM_ASSERT_EMT(pVM);
1683 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
1684 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
1685 uint8_t u8Mode;
1686 if (pVM->pdm.s.pDmac)
1687 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
1688 else
1689 {
1690 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1691 u8Mode = 3 << 2 /* illegal mode type */;
1692 }
1693 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
1694 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
1695 return u8Mode;
1696}
1697
1698/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
1699static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
1700{
1701 PDMDEV_ASSERT_DEVINS(pDevIns);
1702 PVM pVM = pDevIns->Internal.s.pVMR3;
1703 VM_ASSERT_EMT(pVM);
1704 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
1705 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
1706
1707 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1708 VM_FF_SET(pVM, VM_FF_PDM_DMA);
1709 REMR3NotifyDmaPending(pVM);
1710 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
1711}
1712
1713
1714/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
1715static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
1716{
1717 PDMDEV_ASSERT_DEVINS(pDevIns);
1718 PVM pVM = pDevIns->Internal.s.pVMR3;
1719 VM_ASSERT_EMT(pVM);
1720
1721 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
1722 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
1723 int rc;
1724 if (pVM->pdm.s.pRtc)
1725 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
1726 else
1727 rc = VERR_PDM_NO_RTC_INSTANCE;
1728
1729 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1730 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1731 return rc;
1732}
1733
1734
1735/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
1736static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
1737{
1738 PDMDEV_ASSERT_DEVINS(pDevIns);
1739 PVM pVM = pDevIns->Internal.s.pVMR3;
1740 VM_ASSERT_EMT(pVM);
1741
1742 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
1743 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
1744 int rc;
1745 if (pVM->pdm.s.pRtc)
1746 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
1747 else
1748 rc = VERR_PDM_NO_RTC_INSTANCE;
1749
1750 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1751 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1752 return rc;
1753}
1754
1755
1756/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
1757static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1758{
1759 PDMDEV_ASSERT_DEVINS(pDevIns);
1760 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1761 return true;
1762
1763 char szMsg[100];
1764 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1765 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1766 AssertBreakpoint();
1767 return false;
1768}
1769
1770
1771/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
1772static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1773{
1774 PDMDEV_ASSERT_DEVINS(pDevIns);
1775 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1776 return true;
1777
1778 char szMsg[100];
1779 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1780 RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1781 AssertBreakpoint();
1782 return false;
1783}
1784
1785
1786/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
1787static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1788{
1789 PDMDEV_ASSERT_DEVINS(pDevIns);
1790 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1791 return pDevIns->Internal.s.pVMR3;
1792}
1793
1794
1795/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
1796static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1797{
1798 PDMDEV_ASSERT_DEVINS(pDevIns);
1799 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1800 LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1801 return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1802}
1803
1804
1805/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
1806static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1807{
1808 PDMDEV_ASSERT_DEVINS(pDevIns);
1809 PVM pVM = pDevIns->Internal.s.pVMR3;
1810 VM_ASSERT_EMT(pVM);
1811 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1812 ".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1813 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1814 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1815 pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1816
1817 /*
1818 * Validate the structure.
1819 */
1820 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1821 {
1822 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1823 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1824 return VERR_INVALID_PARAMETER;
1825 }
1826 if ( !pPciBusReg->pfnRegisterR3
1827 || !pPciBusReg->pfnIORegionRegisterR3
1828 || !pPciBusReg->pfnSetIrqR3
1829 || !pPciBusReg->pfnSaveExecR3
1830 || !pPciBusReg->pfnLoadExecR3
1831 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1832 {
1833 Assert(pPciBusReg->pfnRegisterR3);
1834 Assert(pPciBusReg->pfnIORegionRegisterR3);
1835 Assert(pPciBusReg->pfnSetIrqR3);
1836 Assert(pPciBusReg->pfnSaveExecR3);
1837 Assert(pPciBusReg->pfnLoadExecR3);
1838 Assert(pPciBusReg->pfnFakePCIBIOSR3);
1839 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1840 return VERR_INVALID_PARAMETER;
1841 }
1842 if ( pPciBusReg->pszSetIrqRC
1843 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
1844 {
1845 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1846 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1847 return VERR_INVALID_PARAMETER;
1848 }
1849 if ( pPciBusReg->pszSetIrqR0
1850 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
1851 {
1852 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1853 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1854 return VERR_INVALID_PARAMETER;
1855 }
1856 if (!ppPciHlpR3)
1857 {
1858 Assert(ppPciHlpR3);
1859 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1860 return VERR_INVALID_PARAMETER;
1861 }
1862
1863 /*
1864 * Find free PCI bus entry.
1865 */
1866 unsigned iBus = 0;
1867 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1868 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1869 break;
1870 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1871 {
1872 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1873 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1874 return VERR_INVALID_PARAMETER;
1875 }
1876 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1877
1878 /*
1879 * Resolve and init the RC bits.
1880 */
1881 if (pPciBusReg->pszSetIrqRC)
1882 {
1883 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1884 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1885 if (RT_FAILURE(rc))
1886 {
1887 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1888 return rc;
1889 }
1890 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1891 }
1892 else
1893 {
1894 pPciBus->pfnSetIrqRC = 0;
1895 pPciBus->pDevInsRC = 0;
1896 }
1897
1898 /*
1899 * Resolve and init the R0 bits.
1900 */
1901 if (pPciBusReg->pszSetIrqR0)
1902 {
1903 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1904 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1905 if (RT_FAILURE(rc))
1906 {
1907 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1908 return rc;
1909 }
1910 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1911 }
1912 else
1913 {
1914 pPciBus->pfnSetIrqR0 = 0;
1915 pPciBus->pDevInsR0 = 0;
1916 }
1917
1918 /*
1919 * Init the R3 bits.
1920 */
1921 pPciBus->iBus = iBus;
1922 pPciBus->pDevInsR3 = pDevIns;
1923 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1924 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1925 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1926 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1927 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1928 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1929 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1930
1931 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1932
1933 /* set the helper pointer and return. */
1934 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
1935 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1936 return VINF_SUCCESS;
1937}
1938
1939
1940/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
1941static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1942{
1943 PDMDEV_ASSERT_DEVINS(pDevIns);
1944 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1945 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1946 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1947 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1948 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1949 ppPicHlpR3));
1950
1951 /*
1952 * Validate input.
1953 */
1954 if (pPicReg->u32Version != PDM_PICREG_VERSION)
1955 {
1956 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1957 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1958 return VERR_INVALID_PARAMETER;
1959 }
1960 if ( !pPicReg->pfnSetIrqR3
1961 || !pPicReg->pfnGetInterruptR3)
1962 {
1963 Assert(pPicReg->pfnSetIrqR3);
1964 Assert(pPicReg->pfnGetInterruptR3);
1965 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1966 return VERR_INVALID_PARAMETER;
1967 }
1968 if ( ( pPicReg->pszSetIrqRC
1969 || pPicReg->pszGetInterruptRC)
1970 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
1971 || !VALID_PTR(pPicReg->pszGetInterruptRC))
1972 )
1973 {
1974 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1975 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1976 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1977 return VERR_INVALID_PARAMETER;
1978 }
1979 if ( pPicReg->pszSetIrqRC
1980 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1981 {
1982 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1983 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1984 return VERR_INVALID_PARAMETER;
1985 }
1986 if ( pPicReg->pszSetIrqR0
1987 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1988 {
1989 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1990 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1991 return VERR_INVALID_PARAMETER;
1992 }
1993 if (!ppPicHlpR3)
1994 {
1995 Assert(ppPicHlpR3);
1996 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1997 return VERR_INVALID_PARAMETER;
1998 }
1999
2000 /*
2001 * Only one PIC device.
2002 */
2003 PVM pVM = pDevIns->Internal.s.pVMR3;
2004 if (pVM->pdm.s.Pic.pDevInsR3)
2005 {
2006 AssertMsgFailed(("Only one pic device is supported!\n"));
2007 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2008 return VERR_INVALID_PARAMETER;
2009 }
2010
2011 /*
2012 * RC stuff.
2013 */
2014 if (pPicReg->pszSetIrqRC)
2015 {
2016 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2017 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
2018 if (RT_SUCCESS(rc))
2019 {
2020 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
2021 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
2022 }
2023 if (RT_FAILURE(rc))
2024 {
2025 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2026 return rc;
2027 }
2028 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2029 }
2030 else
2031 {
2032 pVM->pdm.s.Pic.pDevInsRC = 0;
2033 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
2034 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
2035 }
2036
2037 /*
2038 * R0 stuff.
2039 */
2040 if (pPicReg->pszSetIrqR0)
2041 {
2042 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2043 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2044 if (RT_SUCCESS(rc))
2045 {
2046 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2047 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2048 }
2049 if (RT_FAILURE(rc))
2050 {
2051 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2052 return rc;
2053 }
2054 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2055 Assert(pVM->pdm.s.Pic.pDevInsR0);
2056 }
2057 else
2058 {
2059 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2060 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2061 pVM->pdm.s.Pic.pDevInsR0 = 0;
2062 }
2063
2064 /*
2065 * R3 stuff.
2066 */
2067 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2068 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
2069 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
2070 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2071
2072 /* set the helper pointer and return. */
2073 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
2074 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2075 return VINF_SUCCESS;
2076}
2077
2078
2079/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
2080static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2081{
2082 PDMDEV_ASSERT_DEVINS(pDevIns);
2083 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2084 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
2085 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
2086 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
2087 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
2088 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
2089 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
2090 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
2091 pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
2092
2093 /*
2094 * Validate input.
2095 */
2096 if (pApicReg->u32Version != PDM_APICREG_VERSION)
2097 {
2098 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2099 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2100 return VERR_INVALID_PARAMETER;
2101 }
2102 if ( !pApicReg->pfnGetInterruptR3
2103 || !pApicReg->pfnHasPendingIrqR3
2104 || !pApicReg->pfnSetBaseR3
2105 || !pApicReg->pfnGetBaseR3
2106 || !pApicReg->pfnSetTPRR3
2107 || !pApicReg->pfnGetTPRR3
2108 || !pApicReg->pfnWriteMSRR3
2109 || !pApicReg->pfnReadMSRR3
2110 || !pApicReg->pfnBusDeliverR3
2111 || !pApicReg->pfnLocalInterruptR3)
2112 {
2113 Assert(pApicReg->pfnGetInterruptR3);
2114 Assert(pApicReg->pfnHasPendingIrqR3);
2115 Assert(pApicReg->pfnSetBaseR3);
2116 Assert(pApicReg->pfnGetBaseR3);
2117 Assert(pApicReg->pfnSetTPRR3);
2118 Assert(pApicReg->pfnGetTPRR3);
2119 Assert(pApicReg->pfnWriteMSRR3);
2120 Assert(pApicReg->pfnReadMSRR3);
2121 Assert(pApicReg->pfnBusDeliverR3);
2122 Assert(pApicReg->pfnLocalInterruptR3);
2123 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2124 return VERR_INVALID_PARAMETER;
2125 }
2126 if ( ( pApicReg->pszGetInterruptRC
2127 || pApicReg->pszHasPendingIrqRC
2128 || pApicReg->pszSetBaseRC
2129 || pApicReg->pszGetBaseRC
2130 || pApicReg->pszSetTPRRC
2131 || pApicReg->pszGetTPRRC
2132 || pApicReg->pszWriteMSRRC
2133 || pApicReg->pszReadMSRRC
2134 || pApicReg->pszBusDeliverRC
2135 || pApicReg->pszLocalInterruptRC)
2136 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
2137 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
2138 || !VALID_PTR(pApicReg->pszSetBaseRC)
2139 || !VALID_PTR(pApicReg->pszGetBaseRC)
2140 || !VALID_PTR(pApicReg->pszSetTPRRC)
2141 || !VALID_PTR(pApicReg->pszGetTPRRC)
2142 || !VALID_PTR(pApicReg->pszWriteMSRRC)
2143 || !VALID_PTR(pApicReg->pszReadMSRRC)
2144 || !VALID_PTR(pApicReg->pszBusDeliverRC)
2145 || !VALID_PTR(pApicReg->pszLocalInterruptRC))
2146 )
2147 {
2148 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
2149 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
2150 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
2151 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
2152 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
2153 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
2154 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
2155 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
2156 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
2157 Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
2158 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2159 return VERR_INVALID_PARAMETER;
2160 }
2161 if ( ( pApicReg->pszGetInterruptR0
2162 || pApicReg->pszHasPendingIrqR0
2163 || pApicReg->pszSetBaseR0
2164 || pApicReg->pszGetBaseR0
2165 || pApicReg->pszSetTPRR0
2166 || pApicReg->pszGetTPRR0
2167 || pApicReg->pszWriteMSRR0
2168 || pApicReg->pszReadMSRR0
2169 || pApicReg->pszBusDeliverR0
2170 || pApicReg->pszLocalInterruptR0)
2171 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2172 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
2173 || !VALID_PTR(pApicReg->pszSetBaseR0)
2174 || !VALID_PTR(pApicReg->pszGetBaseR0)
2175 || !VALID_PTR(pApicReg->pszSetTPRR0)
2176 || !VALID_PTR(pApicReg->pszGetTPRR0)
2177 || !VALID_PTR(pApicReg->pszReadMSRR0)
2178 || !VALID_PTR(pApicReg->pszWriteMSRR0)
2179 || !VALID_PTR(pApicReg->pszBusDeliverR0)
2180 || !VALID_PTR(pApicReg->pszLocalInterruptR0))
2181 )
2182 {
2183 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2184 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
2185 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2186 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2187 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2188 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2189 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
2190 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
2191 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2192 Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
2193 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2194 return VERR_INVALID_PARAMETER;
2195 }
2196 if (!ppApicHlpR3)
2197 {
2198 Assert(ppApicHlpR3);
2199 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2200 return VERR_INVALID_PARAMETER;
2201 }
2202
2203 /*
2204 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
2205 * as they need to communicate and share state easily.
2206 */
2207 PVM pVM = pDevIns->Internal.s.pVMR3;
2208 if (pVM->pdm.s.Apic.pDevInsR3)
2209 {
2210 AssertMsgFailed(("Only one apic device is supported!\n"));
2211 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2212 return VERR_INVALID_PARAMETER;
2213 }
2214
2215 /*
2216 * Resolve & initialize the RC bits.
2217 */
2218 if (pApicReg->pszGetInterruptRC)
2219 {
2220 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
2221 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
2222 if (RT_SUCCESS(rc))
2223 {
2224 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
2225 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
2226 }
2227 if (RT_SUCCESS(rc))
2228 {
2229 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
2230 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
2231 }
2232 if (RT_SUCCESS(rc))
2233 {
2234 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
2235 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
2236 }
2237 if (RT_SUCCESS(rc))
2238 {
2239 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
2240 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
2241 }
2242 if (RT_SUCCESS(rc))
2243 {
2244 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
2245 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
2246 }
2247 if (RT_SUCCESS(rc))
2248 {
2249 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
2250 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
2251 }
2252 if (RT_SUCCESS(rc))
2253 {
2254 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
2255 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
2256 }
2257 if (RT_SUCCESS(rc))
2258 {
2259 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
2260 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
2261 }
2262 if (RT_SUCCESS(rc))
2263 {
2264 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
2265 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
2266 }
2267 if (RT_FAILURE(rc))
2268 {
2269 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2270 return rc;
2271 }
2272 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2273 }
2274 else
2275 {
2276 pVM->pdm.s.Apic.pDevInsRC = 0;
2277 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
2278 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
2279 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
2280 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
2281 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
2282 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
2283 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
2284 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
2285 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
2286 pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
2287 }
2288
2289 /*
2290 * Resolve & initialize the R0 bits.
2291 */
2292 if (pApicReg->pszGetInterruptR0)
2293 {
2294 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2295 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2296 if (RT_SUCCESS(rc))
2297 {
2298 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
2299 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
2300 }
2301 if (RT_SUCCESS(rc))
2302 {
2303 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2304 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2305 }
2306 if (RT_SUCCESS(rc))
2307 {
2308 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2309 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2310 }
2311 if (RT_SUCCESS(rc))
2312 {
2313 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2314 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2315 }
2316 if (RT_SUCCESS(rc))
2317 {
2318 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2319 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2320 }
2321 if (RT_SUCCESS(rc))
2322 {
2323 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
2324 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
2325 }
2326 if (RT_SUCCESS(rc))
2327 {
2328 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
2329 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
2330 }
2331 if (RT_SUCCESS(rc))
2332 {
2333 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2334 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2335 }
2336 if (RT_SUCCESS(rc))
2337 {
2338 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
2339 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
2340 }
2341 if (RT_FAILURE(rc))
2342 {
2343 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2344 return rc;
2345 }
2346 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2347 Assert(pVM->pdm.s.Apic.pDevInsR0);
2348 }
2349 else
2350 {
2351 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2352 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
2353 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2354 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2355 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2356 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2357 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
2358 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
2359 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2360 pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
2361 pVM->pdm.s.Apic.pDevInsR0 = 0;
2362 }
2363
2364 /*
2365 * Initialize the HC bits.
2366 */
2367 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2368 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
2369 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
2370 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
2371 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
2372 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
2373 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
2374 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
2375 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
2376 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
2377 pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
2378 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2379
2380 /* set the helper pointer and return. */
2381 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
2382 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2383 return VINF_SUCCESS;
2384}
2385
2386
2387/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
2388static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2389{
2390 PDMDEV_ASSERT_DEVINS(pDevIns);
2391 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2392 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
2393 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
2394 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
2395
2396 /*
2397 * Validate input.
2398 */
2399 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2400 {
2401 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2402 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2403 return VERR_INVALID_PARAMETER;
2404 }
2405 if (!pIoApicReg->pfnSetIrqR3)
2406 {
2407 Assert(pIoApicReg->pfnSetIrqR3);
2408 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2409 return VERR_INVALID_PARAMETER;
2410 }
2411 if ( pIoApicReg->pszSetIrqRC
2412 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
2413 {
2414 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
2415 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2416 return VERR_INVALID_PARAMETER;
2417 }
2418 if ( pIoApicReg->pszSetIrqR0
2419 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
2420 {
2421 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2422 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2423 return VERR_INVALID_PARAMETER;
2424 }
2425 if (!ppIoApicHlpR3)
2426 {
2427 Assert(ppIoApicHlpR3);
2428 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2429 return VERR_INVALID_PARAMETER;
2430 }
2431
2432 /*
2433 * The I/O APIC requires the APIC to be present (hacks++).
2434 * If the I/O APIC does GC stuff so must the APIC.
2435 */
2436 PVM pVM = pDevIns->Internal.s.pVMR3;
2437 if (!pVM->pdm.s.Apic.pDevInsR3)
2438 {
2439 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2440 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2441 return VERR_INVALID_PARAMETER;
2442 }
2443 if ( pIoApicReg->pszSetIrqRC
2444 && !pVM->pdm.s.Apic.pDevInsRC)
2445 {
2446 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2447 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2448 return VERR_INVALID_PARAMETER;
2449 }
2450
2451 /*
2452 * Only one I/O APIC device.
2453 */
2454 if (pVM->pdm.s.IoApic.pDevInsR3)
2455 {
2456 AssertMsgFailed(("Only one ioapic device is supported!\n"));
2457 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2458 return VERR_INVALID_PARAMETER;
2459 }
2460
2461 /*
2462 * Resolve & initialize the GC bits.
2463 */
2464 if (pIoApicReg->pszSetIrqRC)
2465 {
2466 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2467 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2468 if (RT_FAILURE(rc))
2469 {
2470 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2471 return rc;
2472 }
2473 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2474 }
2475 else
2476 {
2477 pVM->pdm.s.IoApic.pDevInsRC = 0;
2478 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2479 }
2480
2481 /*
2482 * Resolve & initialize the R0 bits.
2483 */
2484 if (pIoApicReg->pszSetIrqR0)
2485 {
2486 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2487 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2488 if (RT_FAILURE(rc))
2489 {
2490 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2491 return rc;
2492 }
2493 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2494 Assert(pVM->pdm.s.IoApic.pDevInsR0);
2495 }
2496 else
2497 {
2498 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2499 pVM->pdm.s.IoApic.pDevInsR0 = 0;
2500 }
2501
2502 /*
2503 * Initialize the R3 bits.
2504 */
2505 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2506 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2507 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2508
2509 /* set the helper pointer and return. */
2510 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2511 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2512 return VINF_SUCCESS;
2513}
2514
2515
2516/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
2517static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
2518{
2519 PDMDEV_ASSERT_DEVINS(pDevIns);
2520 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2521 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n"));
2522
2523 /*
2524 * Validate input.
2525 */
2526 if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
2527 {
2528 AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
2529 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2530 return VERR_INVALID_PARAMETER;
2531 }
2532
2533 if (!ppHpetHlpR3)
2534 {
2535 Assert(ppHpetHlpR3);
2536 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2537 return VERR_INVALID_PARAMETER;
2538 }
2539
2540 /* set the helper pointer and return. */
2541 *ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
2542 LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2543 return VINF_SUCCESS;
2544}
2545
2546
2547/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
2548static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2549{
2550 PDMDEV_ASSERT_DEVINS(pDevIns);
2551 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2552 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2553 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2554 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2555
2556 /*
2557 * Validate input.
2558 */
2559 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2560 {
2561 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2562 PDM_DMACREG_VERSION));
2563 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2564 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2565 return VERR_INVALID_PARAMETER;
2566 }
2567 if ( !pDmacReg->pfnRun
2568 || !pDmacReg->pfnRegister
2569 || !pDmacReg->pfnReadMemory
2570 || !pDmacReg->pfnWriteMemory
2571 || !pDmacReg->pfnSetDREQ
2572 || !pDmacReg->pfnGetChannelMode)
2573 {
2574 Assert(pDmacReg->pfnRun);
2575 Assert(pDmacReg->pfnRegister);
2576 Assert(pDmacReg->pfnReadMemory);
2577 Assert(pDmacReg->pfnWriteMemory);
2578 Assert(pDmacReg->pfnSetDREQ);
2579 Assert(pDmacReg->pfnGetChannelMode);
2580 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2581 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2582 return VERR_INVALID_PARAMETER;
2583 }
2584
2585 if (!ppDmacHlp)
2586 {
2587 Assert(ppDmacHlp);
2588 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2589 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2590 return VERR_INVALID_PARAMETER;
2591 }
2592
2593 /*
2594 * Only one DMA device.
2595 */
2596 PVM pVM = pDevIns->Internal.s.pVMR3;
2597 if (pVM->pdm.s.pDmac)
2598 {
2599 AssertMsgFailed(("Only one DMA device is supported!\n"));
2600 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2601 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2602 return VERR_INVALID_PARAMETER;
2603 }
2604
2605 /*
2606 * Allocate and initialize pci bus structure.
2607 */
2608 int rc = VINF_SUCCESS;
2609 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2610 if (pDmac)
2611 {
2612 pDmac->pDevIns = pDevIns;
2613 pDmac->Reg = *pDmacReg;
2614 pVM->pdm.s.pDmac = pDmac;
2615
2616 /* set the helper pointer. */
2617 *ppDmacHlp = &g_pdmR3DevDmacHlp;
2618 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2619 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2620 }
2621 else
2622 rc = VERR_NO_MEMORY;
2623
2624 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2625 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2626 return rc;
2627}
2628
2629
2630/**
2631 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2632 */
2633static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2634{
2635 PDMDEV_ASSERT_DEVINS(pDevIns);
2636 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2637
2638 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2639 return rc;
2640}
2641
2642
2643/**
2644 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2645 */
2646static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2647{
2648 PDMDEV_ASSERT_DEVINS(pDevIns);
2649 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2650
2651 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2652 return rc;
2653}
2654
2655
2656/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
2657static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2658{
2659 PDMDEV_ASSERT_DEVINS(pDevIns);
2660 PVM pVM = pDevIns->Internal.s.pVMR3;
2661 VM_ASSERT_EMT(pVM);
2662 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2663 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2664
2665 /*
2666 * We postpone this operation because we're likely to be inside a I/O instruction
2667 * and the EIP will be updated when we return.
2668 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2669 */
2670 bool fHaltOnReset;
2671 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2672 if (RT_SUCCESS(rc) && fHaltOnReset)
2673 {
2674 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2675 rc = VINF_EM_HALT;
2676 }
2677 else
2678 {
2679 VM_FF_SET(pVM, VM_FF_RESET);
2680 rc = VINF_EM_RESET;
2681 }
2682
2683 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2684 return rc;
2685}
2686
2687
2688/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
2689static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2690{
2691 int rc;
2692 PDMDEV_ASSERT_DEVINS(pDevIns);
2693 PVM pVM = pDevIns->Internal.s.pVMR3;
2694 VM_ASSERT_EMT(pVM);
2695 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2696 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2697
2698 if (pVM->cCpus > 1)
2699 {
2700 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2701 rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
2702 AssertRC(rc);
2703 rc = VINF_EM_SUSPEND;
2704 }
2705 else
2706 rc = VMR3Suspend(pVM);
2707
2708 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2709 return rc;
2710}
2711
2712
2713/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
2714static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2715{
2716 int rc;
2717 PDMDEV_ASSERT_DEVINS(pDevIns);
2718 PVM pVM = pDevIns->Internal.s.pVMR3;
2719 VM_ASSERT_EMT(pVM);
2720 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2721 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2722
2723 if (pVM->cCpus > 1)
2724 {
2725 /* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2726 rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
2727 AssertRC(rc);
2728 /* Set the VCPU state to stopped here as well to make sure no
2729 * inconsistency with the EM state occurs.
2730 */
2731 VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
2732 rc = VINF_EM_OFF;
2733 }
2734 else
2735 rc = VMR3PowerOff(pVM);
2736
2737 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2738 return rc;
2739}
2740
2741
2742/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
2743static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2744{
2745 PDMDEV_ASSERT_DEVINS(pDevIns);
2746 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2747
2748 bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
2749
2750 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2751 return fRc;
2752}
2753
2754
2755/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
2756static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2757{
2758 PDMDEV_ASSERT_DEVINS(pDevIns);
2759 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2760 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2761 PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
2762}
2763
2764
2765/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
2766static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2767 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
2768{
2769 PDMDEV_ASSERT_DEVINS(pDevIns);
2770 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2771
2772 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2773 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2774 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2775
2776 CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
2777
2778 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
2779 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
2780}
2781
2782
2783/**
2784 * The device helper structure for trusted devices.
2785 */
2786const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2787{
2788 PDM_DEVHLPR3_VERSION,
2789 pdmR3DevHlp_IOPortRegister,
2790 pdmR3DevHlp_IOPortRegisterRC,
2791 pdmR3DevHlp_IOPortRegisterR0,
2792 pdmR3DevHlp_IOPortDeregister,
2793 pdmR3DevHlp_MMIORegister,
2794 pdmR3DevHlp_MMIORegisterRC,
2795 pdmR3DevHlp_MMIORegisterR0,
2796 pdmR3DevHlp_MMIODeregister,
2797 pdmR3DevHlp_MMIO2Register,
2798 pdmR3DevHlp_MMIO2Deregister,
2799 pdmR3DevHlp_MMIO2Map,
2800 pdmR3DevHlp_MMIO2Unmap,
2801 pdmR3DevHlp_MMHyperMapMMIO2,
2802 pdmR3DevHlp_MMIO2MapKernel,
2803 pdmR3DevHlp_ROMRegister,
2804 pdmR3DevHlp_ROMProtectShadow,
2805 pdmR3DevHlp_SSMRegister,
2806 pdmR3DevHlp_TMTimerCreate,
2807 pdmR3DevHlp_UTCNow,
2808 pdmR3DevHlp_PhysRead,
2809 pdmR3DevHlp_PhysWrite,
2810 pdmR3DevHlp_PhysGCPhys2CCPtr,
2811 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2812 pdmR3DevHlp_PhysReleasePageMappingLock,
2813 pdmR3DevHlp_PhysReadGCVirt,
2814 pdmR3DevHlp_PhysWriteGCVirt,
2815 pdmR3DevHlp_PhysGCPtr2GCPhys,
2816 pdmR3DevHlp_MMHeapAlloc,
2817 pdmR3DevHlp_MMHeapAllocZ,
2818 pdmR3DevHlp_MMHeapFree,
2819 pdmR3DevHlp_VMState,
2820 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
2821 pdmR3DevHlp_VMSetError,
2822 pdmR3DevHlp_VMSetErrorV,
2823 pdmR3DevHlp_VMSetRuntimeError,
2824 pdmR3DevHlp_VMSetRuntimeErrorV,
2825 pdmR3DevHlp_DBGFStopV,
2826 pdmR3DevHlp_DBGFInfoRegister,
2827 pdmR3DevHlp_STAMRegister,
2828 pdmR3DevHlp_STAMRegisterF,
2829 pdmR3DevHlp_STAMRegisterV,
2830 pdmR3DevHlp_PCIRegister,
2831 pdmR3DevHlp_PCIIORegionRegister,
2832 pdmR3DevHlp_PCISetConfigCallbacks,
2833 pdmR3DevHlp_PCISetIrq,
2834 pdmR3DevHlp_PCISetIrqNoWait,
2835 pdmR3DevHlp_ISASetIrq,
2836 pdmR3DevHlp_ISASetIrqNoWait,
2837 pdmR3DevHlp_DriverAttach,
2838 pdmR3DevHlp_QueueCreate,
2839 pdmR3DevHlp_CritSectInit,
2840 pdmR3DevHlp_ThreadCreate,
2841 pdmR3DevHlp_SetAsyncNotification,
2842 pdmR3DevHlp_AsyncNotificationCompleted,
2843 pdmR3DevHlp_RTCRegister,
2844 pdmR3DevHlp_PCIBusRegister,
2845 pdmR3DevHlp_PICRegister,
2846 pdmR3DevHlp_APICRegister,
2847 pdmR3DevHlp_IOAPICRegister,
2848 pdmR3DevHlp_HPETRegister,
2849 pdmR3DevHlp_DMACRegister,
2850 pdmR3DevHlp_DMARegister,
2851 pdmR3DevHlp_DMAReadMemory,
2852 pdmR3DevHlp_DMAWriteMemory,
2853 pdmR3DevHlp_DMASetDREQ,
2854 pdmR3DevHlp_DMAGetChannelMode,
2855 pdmR3DevHlp_DMASchedule,
2856 pdmR3DevHlp_CMOSWrite,
2857 pdmR3DevHlp_CMOSRead,
2858 pdmR3DevHlp_AssertEMT,
2859 pdmR3DevHlp_AssertOther,
2860 0,
2861 0,
2862 0,
2863 0,
2864 0,
2865 0,
2866 0,
2867 0,
2868 0,
2869 0,
2870 pdmR3DevHlp_GetVM,
2871 pdmR3DevHlp_GetVMCPU,
2872 pdmR3DevHlp_RegisterVMMDevHeap,
2873 pdmR3DevHlp_UnregisterVMMDevHeap,
2874 pdmR3DevHlp_VMReset,
2875 pdmR3DevHlp_VMSuspend,
2876 pdmR3DevHlp_VMPowerOff,
2877 pdmR3DevHlp_A20IsEnabled,
2878 pdmR3DevHlp_A20Set,
2879 pdmR3DevHlp_GetCpuId,
2880 PDM_DEVHLPR3_VERSION /* the end */
2881};
2882
2883
2884
2885
2886/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
2887static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2888{
2889 PDMDEV_ASSERT_DEVINS(pDevIns);
2890 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2891 return NULL;
2892}
2893
2894
2895/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
2896static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
2897{
2898 PDMDEV_ASSERT_DEVINS(pDevIns);
2899 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2900 return NULL;
2901}
2902
2903
2904/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
2905static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2906{
2907 PDMDEV_ASSERT_DEVINS(pDevIns);
2908 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2909 return VERR_ACCESS_DENIED;
2910}
2911
2912
2913/** @interface_method_impl{PDMDEVHLPR3,pfnUnregisterVMMDevHeap} */
2914static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2915{
2916 PDMDEV_ASSERT_DEVINS(pDevIns);
2917 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2918 return VERR_ACCESS_DENIED;
2919}
2920
2921
2922/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
2923static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
2924{
2925 PDMDEV_ASSERT_DEVINS(pDevIns);
2926 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2927 return VERR_ACCESS_DENIED;
2928}
2929
2930
2931/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
2932static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
2933{
2934 PDMDEV_ASSERT_DEVINS(pDevIns);
2935 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2936 return VERR_ACCESS_DENIED;
2937}
2938
2939
2940/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
2941static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
2942{
2943 PDMDEV_ASSERT_DEVINS(pDevIns);
2944 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2945 return VERR_ACCESS_DENIED;
2946}
2947
2948
2949/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
2950static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
2951{
2952 PDMDEV_ASSERT_DEVINS(pDevIns);
2953 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2954 return false;
2955}
2956
2957
2958/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
2959static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2960{
2961 PDMDEV_ASSERT_DEVINS(pDevIns);
2962 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2963 NOREF(fEnable);
2964}
2965
2966
2967/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
2968static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2969 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
2970{
2971 PDMDEV_ASSERT_DEVINS(pDevIns);
2972 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2973}
2974
2975
2976/**
2977 * The device helper structure for non-trusted devices.
2978 */
2979const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
2980{
2981 PDM_DEVHLPR3_VERSION,
2982 pdmR3DevHlp_IOPortRegister,
2983 pdmR3DevHlp_IOPortRegisterRC,
2984 pdmR3DevHlp_IOPortRegisterR0,
2985 pdmR3DevHlp_IOPortDeregister,
2986 pdmR3DevHlp_MMIORegister,
2987 pdmR3DevHlp_MMIORegisterRC,
2988 pdmR3DevHlp_MMIORegisterR0,
2989 pdmR3DevHlp_MMIODeregister,
2990 pdmR3DevHlp_MMIO2Register,
2991 pdmR3DevHlp_MMIO2Deregister,
2992 pdmR3DevHlp_MMIO2Map,
2993 pdmR3DevHlp_MMIO2Unmap,
2994 pdmR3DevHlp_MMHyperMapMMIO2,
2995 pdmR3DevHlp_MMIO2MapKernel,
2996 pdmR3DevHlp_ROMRegister,
2997 pdmR3DevHlp_ROMProtectShadow,
2998 pdmR3DevHlp_SSMRegister,
2999 pdmR3DevHlp_TMTimerCreate,
3000 pdmR3DevHlp_UTCNow,
3001 pdmR3DevHlp_PhysRead,
3002 pdmR3DevHlp_PhysWrite,
3003 pdmR3DevHlp_PhysGCPhys2CCPtr,
3004 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3005 pdmR3DevHlp_PhysReleasePageMappingLock,
3006 pdmR3DevHlp_PhysReadGCVirt,
3007 pdmR3DevHlp_PhysWriteGCVirt,
3008 pdmR3DevHlp_PhysGCPtr2GCPhys,
3009 pdmR3DevHlp_MMHeapAlloc,
3010 pdmR3DevHlp_MMHeapAllocZ,
3011 pdmR3DevHlp_MMHeapFree,
3012 pdmR3DevHlp_VMState,
3013 pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3014 pdmR3DevHlp_VMSetError,
3015 pdmR3DevHlp_VMSetErrorV,
3016 pdmR3DevHlp_VMSetRuntimeError,
3017 pdmR3DevHlp_VMSetRuntimeErrorV,
3018 pdmR3DevHlp_DBGFStopV,
3019 pdmR3DevHlp_DBGFInfoRegister,
3020 pdmR3DevHlp_STAMRegister,
3021 pdmR3DevHlp_STAMRegisterF,
3022 pdmR3DevHlp_STAMRegisterV,
3023 pdmR3DevHlp_PCIRegister,
3024 pdmR3DevHlp_PCIIORegionRegister,
3025 pdmR3DevHlp_PCISetConfigCallbacks,
3026 pdmR3DevHlp_PCISetIrq,
3027 pdmR3DevHlp_PCISetIrqNoWait,
3028 pdmR3DevHlp_ISASetIrq,
3029 pdmR3DevHlp_ISASetIrqNoWait,
3030 pdmR3DevHlp_DriverAttach,
3031 pdmR3DevHlp_QueueCreate,
3032 pdmR3DevHlp_CritSectInit,
3033 pdmR3DevHlp_ThreadCreate,
3034 pdmR3DevHlp_SetAsyncNotification,
3035 pdmR3DevHlp_AsyncNotificationCompleted,
3036 pdmR3DevHlp_RTCRegister,
3037 pdmR3DevHlp_PCIBusRegister,
3038 pdmR3DevHlp_PICRegister,
3039 pdmR3DevHlp_APICRegister,
3040 pdmR3DevHlp_IOAPICRegister,
3041 pdmR3DevHlp_HPETRegister,
3042 pdmR3DevHlp_DMACRegister,
3043 pdmR3DevHlp_DMARegister,
3044 pdmR3DevHlp_DMAReadMemory,
3045 pdmR3DevHlp_DMAWriteMemory,
3046 pdmR3DevHlp_DMASetDREQ,
3047 pdmR3DevHlp_DMAGetChannelMode,
3048 pdmR3DevHlp_DMASchedule,
3049 pdmR3DevHlp_CMOSWrite,
3050 pdmR3DevHlp_CMOSRead,
3051 pdmR3DevHlp_AssertEMT,
3052 pdmR3DevHlp_AssertOther,
3053 0,
3054 0,
3055 0,
3056 0,
3057 0,
3058 0,
3059 0,
3060 0,
3061 0,
3062 0,
3063 pdmR3DevHlp_Untrusted_GetVM,
3064 pdmR3DevHlp_Untrusted_GetVMCPU,
3065 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3066 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3067 pdmR3DevHlp_Untrusted_VMReset,
3068 pdmR3DevHlp_Untrusted_VMSuspend,
3069 pdmR3DevHlp_Untrusted_VMPowerOff,
3070 pdmR3DevHlp_Untrusted_A20IsEnabled,
3071 pdmR3DevHlp_Untrusted_A20Set,
3072 pdmR3DevHlp_Untrusted_GetCpuId,
3073 PDM_DEVHLPR3_VERSION /* the end */
3074};
3075
3076
3077
3078/**
3079 * Queue consumer callback for internal component.
3080 *
3081 * @returns Success indicator.
3082 * If false the item will not be removed and the flushing will stop.
3083 * @param pVM The VM handle.
3084 * @param pItem The item to consume. Upon return this item will be freed.
3085 */
3086DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3087{
3088 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3089 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3090 switch (pTask->enmOp)
3091 {
3092 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3093 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3094 break;
3095
3096 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3097 pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3098 break;
3099
3100 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3101 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3102 break;
3103
3104 default:
3105 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3106 break;
3107 }
3108 return true;
3109}
3110
3111/** @} */
3112
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