PDMDevHlp.cpp@ 33236

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1	/* $Id: PDMDevHlp.cpp 33236 2010-10-19 15:14:42Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, Device Helpers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2010 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*******************************************************************************
20	* Header Files *
21	*******************************************************************************/
22	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23	#include "PDMInternal.h"
24	#include <VBox/pdm.h>
25	#include <VBox/mm.h>
26	#include <VBox/pgm.h>
27	#include <VBox/iom.h>
28	#include <VBox/rem.h>
29	#include <VBox/dbgf.h>
30	#include <VBox/vmapi.h>
31	#include <VBox/vm.h>
32	#include <VBox/uvm.h>
33	#include <VBox/vmm.h>
34
35	#include <VBox/version.h>
36	#include <VBox/log.h>
37	#include <VBox/err.h>
38	#include <iprt/asm.h>
39	#include <iprt/assert.h>
40	#include <iprt/ctype.h>
41	#include <iprt/string.h>
42	#include <iprt/thread.h>
43
44
45	/*******************************************************************************
46	* Defined Constants And Macros *
47	*******************************************************************************/
48	/** @def PDM_DEVHLP_DEADLOCK_DETECTION
49	* Define this to enable the deadlock detection when accessing physical memory.
50	*/
51	#if /defined(DEBUG_bird) \|\|/ defined(DOXYGEN_RUNNING)
52	# define PDM_DEVHLP_DEADLOCK_DETECTION /*< @todo enable DevHlp deadlock detection! /
53	#endif
54
55
56	/*******************************************************************************
57	* Defined Constants And Macros *
58	*******************************************************************************/
59	/** @name R3 DevHlp
60	* @{
61	*/
62
63
64	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
65	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
66	PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
67	{
68	PDMDEV_ASSERT_DEVINS(pDevIns);
69	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
70	Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
71	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
72
73	#if 0 /** @todo needs a real string cache for this */
74	if (pDevIns->iInstance > 0)
75	{
76	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
77	if (pszDesc2)
78	pszDesc = pszDesc2;
79	}
80	#endif
81
82	int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
83
84	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
85	return rc;
86	}
87
88
89	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
90	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
91	const char pszOut, const char pszIn,
92	const char pszOutStr, const char pszInStr, const char *pszDesc)
93	{
94	PDMDEV_ASSERT_DEVINS(pDevIns);
95	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
96	LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
97	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
98
99	/*
100	* Resolve the functions (one of the can be NULL).
101	*/
102	int rc = VINF_SUCCESS;
103	if ( pDevIns->pReg->szRCMod[0]
104	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
105	{
106	RTRCPTR RCPtrIn = NIL_RTRCPTR;
107	if (pszIn)
108	{
109	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszIn, &RCPtrIn);
110	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szRCMod, pszIn));
111	}
112	RTRCPTR RCPtrOut = NIL_RTRCPTR;
113	if (pszOut && RT_SUCCESS(rc))
114	{
115	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszOut, &RCPtrOut);
116	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szRCMod, pszOut));
117	}
118	RTRCPTR RCPtrInStr = NIL_RTRCPTR;
119	if (pszInStr && RT_SUCCESS(rc))
120	{
121	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszInStr, &RCPtrInStr);
122	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szRCMod, pszInStr));
123	}
124	RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
125	if (pszOutStr && RT_SUCCESS(rc))
126	{
127	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszOutStr, &RCPtrOutStr);
128	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szRCMod, pszOutStr));
129	}
130
131	if (RT_SUCCESS(rc))
132	{
133	#if 0 /** @todo needs a real string cache for this */
134	if (pDevIns->iInstance > 0)
135	{
136	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
137	if (pszDesc2)
138	pszDesc = pszDesc2;
139	}
140	#endif
141
142	rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
143	}
144	}
145	else
146	{
147	AssertMsgFailed(("No GC module for this driver!\n"));
148	rc = VERR_INVALID_PARAMETER;
149	}
150
151	LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
152	return rc;
153	}
154
155
156	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
157	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
158	const char pszOut, const char pszIn,
159	const char pszOutStr, const char pszInStr, const char *pszDesc)
160	{
161	PDMDEV_ASSERT_DEVINS(pDevIns);
162	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
163	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
164	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
165
166	/*
167	* Resolve the functions (one of the can be NULL).
168	*/
169	int rc = VINF_SUCCESS;
170	if ( pDevIns->pReg->szR0Mod[0]
171	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
172	{
173	R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
174	if (pszIn)
175	{
176	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszIn, &pfnR0PtrIn);
177	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szR0Mod, pszIn));
178	}
179	R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
180	if (pszOut && RT_SUCCESS(rc))
181	{
182	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszOut, &pfnR0PtrOut);
183	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szR0Mod, pszOut));
184	}
185	R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
186	if (pszInStr && RT_SUCCESS(rc))
187	{
188	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
189	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szR0Mod, pszInStr));
190	}
191	R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
192	if (pszOutStr && RT_SUCCESS(rc))
193	{
194	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
195	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szR0Mod, pszOutStr));
196	}
197
198	if (RT_SUCCESS(rc))
199	{
200	#if 0 /** @todo needs a real string cache for this */
201	if (pDevIns->iInstance > 0)
202	{
203	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
204	if (pszDesc2)
205	pszDesc = pszDesc2;
206	}
207	#endif
208
209	rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
210	}
211	}
212	else
213	{
214	AssertMsgFailed(("No R0 module for this driver!\n"));
215	rc = VERR_INVALID_PARAMETER;
216	}
217
218	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
219	return rc;
220	}
221
222
223	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
224	static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
225	{
226	PDMDEV_ASSERT_DEVINS(pDevIns);
227	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
228	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance,
229	Port, cPorts));
230
231	int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
232
233	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
234	return rc;
235	}
236
237
238	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
239	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
240	PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
241	const char *pszDesc)
242	{
243	PDMDEV_ASSERT_DEVINS(pDevIns);
244	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
245	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
246	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
247
248	/** @todo IOMR3MMIORegisterR3 mangles the description, move it here. */
249	int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
250
251	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
252	return rc;
253	}
254
255
256	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
257	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
258	const char pszWrite, const char pszRead, const char *pszFill,
259	const char *pszDesc)
260	{
261	PDMDEV_ASSERT_DEVINS(pDevIns);
262	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
263	LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
264	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
265
266	/** @todo pszDesc is unused here, drop it. */
267
268	/*
269	* Resolve the functions.
270	* Not all function have to present, leave it to IOM to enforce this.
271	*/
272	int rc = VINF_SUCCESS;
273	if ( pDevIns->pReg->szRCMod[0]
274	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
275	{
276	RTRCPTR RCPtrWrite = NIL_RTRCPTR;
277	if (pszWrite)
278	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszWrite, &RCPtrWrite);
279
280	RTRCPTR RCPtrRead = NIL_RTRCPTR;
281	int rc2 = VINF_SUCCESS;
282	if (pszRead)
283	rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszRead, &RCPtrRead);
284
285	RTRCPTR RCPtrFill = NIL_RTRCPTR;
286	int rc3 = VINF_SUCCESS;
287	if (pszFill)
288	rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszFill, &RCPtrFill);
289
290	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
291	rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
292	else
293	{
294	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szRCMod, pszWrite));
295	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szRCMod, pszRead));
296	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szRCMod, pszFill));
297	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
298	rc = rc2;
299	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
300	rc = rc3;
301	}
302	}
303	else
304	{
305	AssertMsgFailed(("No GC module for this driver!\n"));
306	rc = VERR_INVALID_PARAMETER;
307	}
308
309	LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
310	return rc;
311	}
312
313	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
314	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
315	const char pszWrite, const char pszRead, const char *pszFill,
316	const char *pszDesc)
317	{
318	PDMDEV_ASSERT_DEVINS(pDevIns);
319	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
320	LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
321	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
322
323	/** @todo pszDesc is unused here, remove it. */
324
325	/*
326	* Resolve the functions.
327	* Not all function have to present, leave it to IOM to enforce this.
328	*/
329	int rc = VINF_SUCCESS;
330	if ( pDevIns->pReg->szR0Mod[0]
331	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
332	{
333	R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
334	if (pszWrite)
335	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
336	R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
337	int rc2 = VINF_SUCCESS;
338	if (pszRead)
339	rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszRead, &pfnR0PtrRead);
340	R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
341	int rc3 = VINF_SUCCESS;
342	if (pszFill)
343	rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszFill, &pfnR0PtrFill);
344	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
345	rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
346	else
347	{
348	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szR0Mod, pszWrite));
349	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szR0Mod, pszRead));
350	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szR0Mod, pszFill));
351	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
352	rc = rc2;
353	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
354	rc = rc3;
355	}
356	}
357	else
358	{
359	AssertMsgFailed(("No R0 module for this driver!\n"));
360	rc = VERR_INVALID_PARAMETER;
361	}
362
363	LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
364	return rc;
365	}
366
367
368	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
369	static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
370	{
371	PDMDEV_ASSERT_DEVINS(pDevIns);
372	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
373	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
374	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange));
375
376	int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
377
378	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
379	return rc;
380	}
381
382
383	/**
384	* @copydoc PDMDEVHLPR3::pfnMMIO2Register
385	*/
386	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
387	{
388	PDMDEV_ASSERT_DEVINS(pDevIns);
389	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
390	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
391	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
392
393	/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
394	* use a real string cache. */
395	int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
396
397	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
398	return rc;
399	}
400
401
402	/**
403	* @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
404	*/
405	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
406	{
407	PDMDEV_ASSERT_DEVINS(pDevIns);
408	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
409	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
410	pDevIns->pReg->szName, pDevIns->iInstance, iRegion));
411
412	AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
413
414	int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
415
416	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
417	return rc;
418	}
419
420
421	/**
422	* @copydoc PDMDEVHLPR3::pfnMMIO2Map
423	*/
424	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
425	{
426	PDMDEV_ASSERT_DEVINS(pDevIns);
427	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
428	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
429	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
430
431	int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
432
433	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
434	return rc;
435	}
436
437
438	/**
439	* @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
440	*/
441	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
442	{
443	PDMDEV_ASSERT_DEVINS(pDevIns);
444	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
445	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
446	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
447
448	int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
449
450	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
451	return rc;
452	}
453
454
455	/**
456	* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
457	*/
458	static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
459	const char *pszDesc, PRTRCPTR pRCPtr)
460	{
461	PDMDEV_ASSERT_DEVINS(pDevIns);
462	PVM pVM = pDevIns->Internal.s.pVMR3;
463	VM_ASSERT_EMT(pVM);
464	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
465	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
466
467	if (pDevIns->iInstance > 0)
468	{
469	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
470	if (pszDesc2)
471	pszDesc = pszDesc2;
472	}
473
474	int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
475
476	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc pRCPtr=%RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pRCPtr));
477	return rc;
478	}
479
480
481	/**
482	* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
483	*/
484	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
485	const char *pszDesc, PRTR0PTR pR0Ptr)
486	{
487	PDMDEV_ASSERT_DEVINS(pDevIns);
488	PVM pVM = pDevIns->Internal.s.pVMR3;
489	VM_ASSERT_EMT(pVM);
490	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
491	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
492
493	if (pDevIns->iInstance > 0)
494	{
495	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
496	if (pszDesc2)
497	pszDesc = pszDesc2;
498	}
499
500	int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
501
502	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc pR0Ptr=%RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pR0Ptr));
503	return rc;
504	}
505
506
507	/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
508	static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void pvBinary, uint32_t fFlags, const char pszDesc)
509	{
510	PDMDEV_ASSERT_DEVINS(pDevIns);
511	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
512	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
513	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
514
515	/** @todo can we mangle pszDesc? */
516	int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
517
518	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
519	return rc;
520	}
521
522
523	/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
524	static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
525	{
526	PDMDEV_ASSERT_DEVINS(pDevIns);
527	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
528	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
529
530	int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
531
532	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
533	return rc;
534	}
535
536
537	/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
538	static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
539	PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
540	PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
541	PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
542	{
543	PDMDEV_ASSERT_DEVINS(pDevIns);
544	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
545	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
546	" pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
547	pDevIns->pReg->szName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
548	pfnLivePrep, pfnLiveExec, pfnLiveVote,
549	pfnSavePrep, pfnSaveExec, pfnSaveDone,
550	pfnLoadPrep, pfnLoadExec, pfnLoadDone));
551
552	int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance,
553	uVersion, cbGuess, pszBefore,
554	pfnLivePrep, pfnLiveExec, pfnLiveVote,
555	pfnSavePrep, pfnSaveExec, pfnSaveDone,
556	pfnLoadPrep, pfnLoadExec, pfnLoadDone);
557
558	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
559	return rc;
560	}
561
562
563	/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
564	static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void pvUser, uint32_t fFlags, const char pszDesc, PPTMTIMERR3 ppTimer)
565	{
566	PDMDEV_ASSERT_DEVINS(pDevIns);
567	PVM pVM = pDevIns->Internal.s.pVMR3;
568	VM_ASSERT_EMT(pVM);
569	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
570	pDevIns->pReg->szName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
571
572	if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
573	{
574	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
575	if (pszDesc2)
576	pszDesc = pszDesc2;
577	}
578
579	int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
580
581	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
582	return rc;
583	}
584
585
586	/** @interface_method_impl{PDMDEVHLPR3,pfnTMUtcNow} */
587	static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_TMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
588	{
589	PDMDEV_ASSERT_DEVINS(pDevIns);
590	LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: pTime=%p\n",
591	pDevIns->pReg->szName, pDevIns->iInstance, pTime));
592
593	pTime = TMR3UtcNow(pDevIns->Internal.s.pVMR3, pTime);
594
595	LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
596	return pTime;
597	}
598
599
600	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
601	static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
602	{
603	PDMDEV_ASSERT_DEVINS(pDevIns);
604	PVM pVM = pDevIns->Internal.s.pVMR3;
605	LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
606	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
607
608	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
609	if (!VM_IS_EMT(pVM))
610	{
611	char szNames[128];
612	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
613	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
614	}
615	#endif
616
617	int rc;
618	if (VM_IS_EMT(pVM))
619	rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
620	else
621	rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
622
623	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
624	return rc;
625	}
626
627
628	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
629	static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
630	{
631	PDMDEV_ASSERT_DEVINS(pDevIns);
632	PVM pVM = pDevIns->Internal.s.pVMR3;
633	LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
634	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
635
636	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
637	if (!VM_IS_EMT(pVM))
638	{
639	char szNames[128];
640	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
641	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
642	}
643	#endif
644
645	int rc;
646	if (VM_IS_EMT(pVM))
647	rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
648	else
649	rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pReg->szName);
650
651	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
652	return rc;
653	}
654
655
656	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
657	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
658	{
659	PDMDEV_ASSERT_DEVINS(pDevIns);
660	PVM pVM = pDevIns->Internal.s.pVMR3;
661	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
662	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
663	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
664
665	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
666	if (!VM_IS_EMT(pVM))
667	{
668	char szNames[128];
669	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
670	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
671	}
672	#endif
673
674	int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
675
676	Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
677	return rc;
678	}
679
680
681	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
682	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
683	{
684	PDMDEV_ASSERT_DEVINS(pDevIns);
685	PVM pVM = pDevIns->Internal.s.pVMR3;
686	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
687	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
688	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
689
690	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
691	if (!VM_IS_EMT(pVM))
692	{
693	char szNames[128];
694	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
695	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
696	}
697	#endif
698
699	int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
700
701	Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
702	return rc;
703	}
704
705
706	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
707	static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
708	{
709	PDMDEV_ASSERT_DEVINS(pDevIns);
710	PVM pVM = pDevIns->Internal.s.pVMR3;
711	LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
712	pDevIns->pReg->szName, pDevIns->iInstance, pLock));
713
714	PGMPhysReleasePageMappingLock(pVM, pLock);
715
716	Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
717	}
718
719
720	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
721	static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
722	{
723	PDMDEV_ASSERT_DEVINS(pDevIns);
724	PVM pVM = pDevIns->Internal.s.pVMR3;
725	VM_ASSERT_EMT(pVM);
726	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
727	pDevIns->pReg->szName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
728
729	PVMCPU pVCpu = VMMGetCpu(pVM);
730	if (!pVCpu)
731	return VERR_ACCESS_DENIED;
732	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
733	/** @todo SMP. */
734	#endif
735
736	int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
737
738	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
739
740	return rc;
741	}
742
743
744	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
745	static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
746	{
747	PDMDEV_ASSERT_DEVINS(pDevIns);
748	PVM pVM = pDevIns->Internal.s.pVMR3;
749	VM_ASSERT_EMT(pVM);
750	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
751	pDevIns->pReg->szName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
752
753	PVMCPU pVCpu = VMMGetCpu(pVM);
754	if (!pVCpu)
755	return VERR_ACCESS_DENIED;
756	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
757	/** @todo SMP. */
758	#endif
759
760	int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
761
762	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
763
764	return rc;
765	}
766
767
768	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
769	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
770	{
771	PDMDEV_ASSERT_DEVINS(pDevIns);
772	PVM pVM = pDevIns->Internal.s.pVMR3;
773	VM_ASSERT_EMT(pVM);
774	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
775	pDevIns->pReg->szName, pDevIns->iInstance, GCPtr, pGCPhys));
776
777	PVMCPU pVCpu = VMMGetCpu(pVM);
778	if (!pVCpu)
779	return VERR_ACCESS_DENIED;
780	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
781	/** @todo SMP. */
782	#endif
783
784	int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
785
786	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc pGCPhys=%RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pGCPhys));
787
788	return rc;
789	}
790
791
792	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
793	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
794	{
795	PDMDEV_ASSERT_DEVINS(pDevIns);
796	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
797
798	void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
799
800	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
801	return pv;
802	}
803
804
805	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
806	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
807	{
808	PDMDEV_ASSERT_DEVINS(pDevIns);
809	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
810
811	void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
812
813	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
814	return pv;
815	}
816
817
818	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
819	static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
820	{
821	PDMDEV_ASSERT_DEVINS(pDevIns);
822	LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
823
824	MMR3HeapFree(pv);
825
826	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
827	}
828
829
830	/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
831	static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
832	{
833	PDMDEV_ASSERT_DEVINS(pDevIns);
834
835	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
836
837	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pReg->szName, pDevIns->iInstance,
838	enmVMState, VMR3GetStateName(enmVMState)));
839	return enmVMState;
840	}
841
842
843	/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
844	static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
845	{
846	PDMDEV_ASSERT_DEVINS(pDevIns);
847
848	bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
849
850	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance,
851	fRc));
852	return fRc;
853	}
854
855
856	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
857	static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
858	{
859	PDMDEV_ASSERT_DEVINS(pDevIns);
860	va_list args;
861	va_start(args, pszFormat);
862	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
863	va_end(args);
864	return rc;
865	}
866
867
868	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
869	static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
870	{
871	PDMDEV_ASSERT_DEVINS(pDevIns);
872	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
873	return rc;
874	}
875
876
877	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
878	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, ...)
879	{
880	PDMDEV_ASSERT_DEVINS(pDevIns);
881	va_list args;
882	va_start(args, pszFormat);
883	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
884	va_end(args);
885	return rc;
886	}
887
888
889	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
890	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, va_list va)
891	{
892	PDMDEV_ASSERT_DEVINS(pDevIns);
893	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
894	return rc;
895	}
896
897
898	/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
899	static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction, const char *pszFormat, va_list args)
900	{
901	PDMDEV_ASSERT_DEVINS(pDevIns);
902	#ifdef LOG_ENABLED
903	va_list va2;
904	va_copy(va2, args);
905	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
906	pDevIns->pReg->szName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
907	va_end(va2);
908	#endif
909
910	PVM pVM = pDevIns->Internal.s.pVMR3;
911	VM_ASSERT_EMT(pVM);
912	int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
913	if (rc == VERR_DBGF_NOT_ATTACHED)
914	rc = VINF_SUCCESS;
915
916	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
917	return rc;
918	}
919
920
921	/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
922	static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char pszName, const char pszDesc, PFNDBGFHANDLERDEV pfnHandler)
923	{
924	PDMDEV_ASSERT_DEVINS(pDevIns);
925	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
926	pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
927
928	PVM pVM = pDevIns->Internal.s.pVMR3;
929	VM_ASSERT_EMT(pVM);
930	int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
931
932	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
933	return rc;
934	}
935
936
937	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
938	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void pvSample, STAMTYPE enmType, const char pszName, STAMUNIT enmUnit, const char *pszDesc)
939	{
940	PDMDEV_ASSERT_DEVINS(pDevIns);
941	PVM pVM = pDevIns->Internal.s.pVMR3;
942	VM_ASSERT_EMT(pVM);
943
944	STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
945	NOREF(pVM);
946	}
947
948
949
950	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
951	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
952	STAMUNIT enmUnit, const char pszDesc, const char pszName, ...)
953	{
954	PDMDEV_ASSERT_DEVINS(pDevIns);
955	PVM pVM = pDevIns->Internal.s.pVMR3;
956	VM_ASSERT_EMT(pVM);
957
958	va_list args;
959	va_start(args, pszName);
960	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
961	va_end(args);
962	AssertRC(rc);
963
964	NOREF(pVM);
965	}
966
967
968	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
969	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
970	STAMUNIT enmUnit, const char pszDesc, const char pszName, va_list args)
971	{
972	PDMDEV_ASSERT_DEVINS(pDevIns);
973	PVM pVM = pDevIns->Internal.s.pVMR3;
974	VM_ASSERT_EMT(pVM);
975
976	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
977	AssertRC(rc);
978
979	NOREF(pVM);
980	}
981
982
983	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister} */
984	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
985	{
986	PDMDEV_ASSERT_DEVINS(pDevIns);
987	PVM pVM = pDevIns->Internal.s.pVMR3;
988	VM_ASSERT_EMT(pVM);
989	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
990	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->config));
991
992	/*
993	* Validate input.
994	*/
995	if (!pPciDev)
996	{
997	Assert(pPciDev);
998	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
999	return VERR_INVALID_PARAMETER;
1000	}
1001	if (!pPciDev->config[0] && !pPciDev->config[1])
1002	{
1003	Assert(pPciDev->config[0] \|\| pPciDev->config[1]);
1004	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1005	return VERR_INVALID_PARAMETER;
1006	}
1007	if (pDevIns->Internal.s.pPciDeviceR3)
1008	{
1009	/** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1010	* support a PDM device with multiple PCI devices. This might become a problem
1011	* when upgrading the chipset for instance because of multiple functions in some
1012	* devices...
1013	*/
1014	AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1015	return VERR_INTERNAL_ERROR;
1016	}
1017
1018	/*
1019	* Choose the PCI bus for the device.
1020	*
1021	* This is simple. If the device was configured for a particular bus, the PCIBusNo
1022	* configuration value will be set. If not the default bus is 0.
1023	*/
1024	int rc;
1025	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1026	if (!pBus)
1027	{
1028	uint8_t u8Bus;
1029	rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
1030	AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1031	rc, pDevIns->pReg->szName, pDevIns->iInstance), rc);
1032	AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1033	("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1034	RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance),
1035	VERR_PDM_NO_PCI_BUS);
1036	pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1037	}
1038	if (pBus->pDevInsR3)
1039	{
1040	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1041	pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
1042	else
1043	pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
1044
1045	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1046	pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
1047	else
1048	pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
1049
1050	/*
1051	* Check the configuration for PCI device and function assignment.
1052	*/
1053	int iDev = -1;
1054	uint8_t u8Device;
1055	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1056	if (RT_SUCCESS(rc))
1057	{
1058	if (u8Device > 31)
1059	{
1060	AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1061	u8Device, pDevIns->pReg->szName, pDevIns->iInstance));
1062	return VERR_INTERNAL_ERROR;
1063	}
1064
1065	uint8_t u8Function;
1066	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1067	if (RT_FAILURE(rc))
1068	{
1069	AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
1070	rc, pDevIns->pReg->szName, pDevIns->iInstance));
1071	return rc;
1072	}
1073	if (u8Function > 7)
1074	{
1075	AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1076	u8Function, pDevIns->pReg->szName, pDevIns->iInstance));
1077	return VERR_INTERNAL_ERROR;
1078	}
1079	iDev = (u8Device << 3) \| u8Function;
1080	}
1081	else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1082	{
1083	AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
1084	rc, pDevIns->pReg->szName, pDevIns->iInstance));
1085	return rc;
1086	}
1087
1088	/*
1089	* Call the pci bus device to do the actual registration.
1090	*/
1091	pdmLock(pVM);
1092	rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pReg->szName, iDev);
1093	pdmUnlock(pVM);
1094	if (RT_SUCCESS(rc))
1095	{
1096	pPciDev->pDevIns = pDevIns;
1097
1098	pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
1099	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1100	pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
1101	else
1102	pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
1103
1104	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1105	pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
1106	else
1107	pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
1108
1109	Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1110	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
1111	}
1112	}
1113	else
1114	{
1115	AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1116	rc = VERR_PDM_NO_PCI_BUS;
1117	}
1118
1119	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1120	return rc;
1121	}
1122
1123
1124	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1125	static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1126	{
1127	PDMDEV_ASSERT_DEVINS(pDevIns);
1128	PVM pVM = pDevIns->Internal.s.pVMR3;
1129	VM_ASSERT_EMT(pVM);
1130	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1131	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1132
1133	/*
1134	* Validate input.
1135	*/
1136	if (iRegion < 0 \|\| iRegion >= PCI_NUM_REGIONS)
1137	{
1138	Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1139	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1140	return VERR_INVALID_PARAMETER;
1141	}
1142	switch (enmType)
1143	{
1144	case PCI_ADDRESS_SPACE_IO:
1145	/*
1146	* Sanity check: don't allow to register more than 32K of the PCI I/O space.
1147	*/
1148	AssertMsgReturn(cbRegion <= _32K,
1149	("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1150	VERR_INVALID_PARAMETER);
1151	break;
1152
1153	case PCI_ADDRESS_SPACE_MEM:
1154	case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1155	/*
1156	* Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
1157	* now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
1158	*/
1159	AssertMsgReturn(cbRegion <= 512 * _1M,
1160	("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1161	VERR_INVALID_PARAMETER);
1162	break;
1163	default:
1164	AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1165	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1166	return VERR_INVALID_PARAMETER;
1167	}
1168	if (!pfnCallback)
1169	{
1170	Assert(pfnCallback);
1171	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1172	return VERR_INVALID_PARAMETER;
1173	}
1174	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1175
1176	/*
1177	* Must have a PCI device registered!
1178	*/
1179	int rc;
1180	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1181	if (pPciDev)
1182	{
1183	/*
1184	* We're currently restricted to page aligned MMIO regions.
1185	*/
1186	if ( (enmType == PCI_ADDRESS_SPACE_MEM \|\| enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
1187	&& cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1188	{
1189	Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1190	pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1191	cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1192	}
1193
1194	/*
1195	* For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1196	*/
1197	int iLastSet = ASMBitLastSetU32(cbRegion);
1198	Assert(iLastSet > 0);
1199	uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
1200	if (cbRegion > cbRegionAligned)
1201	cbRegion = cbRegionAligned * 2; /* round up */
1202
1203	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1204	Assert(pBus);
1205	pdmLock(pVM);
1206	rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1207	pdmUnlock(pVM);
1208	}
1209	else
1210	{
1211	AssertMsgFailed(("No PCI device registered!\n"));
1212	rc = VERR_PDM_NOT_PCI_DEVICE;
1213	}
1214
1215	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1216	return rc;
1217	}
1218
1219
1220	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1221	static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1222	PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1223	{
1224	PDMDEV_ASSERT_DEVINS(pDevIns);
1225	PVM pVM = pDevIns->Internal.s.pVMR3;
1226	VM_ASSERT_EMT(pVM);
1227	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1228	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1229
1230	/*
1231	* Validate input and resolve defaults.
1232	*/
1233	AssertPtr(pfnRead);
1234	AssertPtr(pfnWrite);
1235	AssertPtrNull(ppfnReadOld);
1236	AssertPtrNull(ppfnWriteOld);
1237	AssertPtrNull(pPciDev);
1238
1239	if (!pPciDev)
1240	pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1241	AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1242	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1243	AssertRelease(pBus);
1244	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1245
1246	/*
1247	* Do the job.
1248	*/
1249	pdmLock(pVM);
1250	pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1251	pdmUnlock(pVM);
1252
1253	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1254	}
1255
1256
1257	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1258	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1259	{
1260	PDMDEV_ASSERT_DEVINS(pDevIns);
1261	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1262
1263	/*
1264	* Validate input.
1265	*/
1266	/** @todo iIrq and iLevel checks. */
1267
1268	/*
1269	* Must have a PCI device registered!
1270	*/
1271	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1272	if (pPciDev)
1273	{
1274	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1275	Assert(pBus);
1276	PVM pVM = pDevIns->Internal.s.pVMR3;
1277	pdmLock(pVM);
1278	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1279	pdmUnlock(pVM);
1280	}
1281	else
1282	AssertReleaseMsgFailed(("No PCI device registered!\n"));
1283
1284	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1285	}
1286
1287
1288	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1289	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1290	{
1291	pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1292	}
1293
1294
1295	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegisterMsi} */
1296	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
1297	{
1298	PDMDEV_ASSERT_DEVINS(pDevIns);
1299	LogFlow(("pdmR3DevHlp_PCIRegisterMsi: caller='%s'/%d: %d MSI vectors %d MSI-X vectors\n", pDevIns->pReg->szName, pDevIns->iInstance, pMsiReg->cMsiVectors,pMsiReg->cMsixVectors ));
1300	int rc = VINF_SUCCESS;
1301
1302	/*
1303	* Must have a PCI device registered!
1304	*/
1305	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1306	if (pPciDev)
1307	{
1308	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1309	Assert(pBus);
1310
1311	PVM pVM = pDevIns->Internal.s.pVMR3;
1312	pdmLock(pVM);
1313	if (!pBus->pfnRegisterMsiR3)
1314	rc = VERR_NOT_IMPLEMENTED;
1315	else
1316	rc = pBus->pfnRegisterMsiR3(pBus->pDevInsR3, pPciDev, pMsiReg);
1317	pdmUnlock(pVM);
1318	}
1319	else
1320	AssertReleaseMsgFailed(("No PCI device registered!\n"));
1321
1322	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1323	return rc;
1324	}
1325
1326	/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1327	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1328	{
1329	PDMDEV_ASSERT_DEVINS(pDevIns);
1330	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1331
1332	/*
1333	* Validate input.
1334	*/
1335	/** @todo iIrq and iLevel checks. */
1336
1337	PVM pVM = pDevIns->Internal.s.pVMR3;
1338	PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
1339
1340	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1341	}
1342
1343
1344	/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1345	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1346	{
1347	pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1348	}
1349
1350
1351	/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
1352	static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE ppBaseInterface, const char pszDesc)
1353	{
1354	PDMDEV_ASSERT_DEVINS(pDevIns);
1355	PVM pVM = pDevIns->Internal.s.pVMR3;
1356	VM_ASSERT_EMT(pVM);
1357	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1358	pDevIns->pReg->szName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1359
1360	/*
1361	* Lookup the LUN, it might already be registered.
1362	*/
1363	PPDMLUN pLunPrev = NULL;
1364	PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
1365	for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1366	if (pLun->iLun == iLun)
1367	break;
1368
1369	/*
1370	* Create the LUN if if wasn't found, else check if driver is already attached to it.
1371	*/
1372	if (!pLun)
1373	{
1374	if ( !pBaseInterface
1375	\|\| !pszDesc
1376	\|\| !*pszDesc)
1377	{
1378	Assert(pBaseInterface);
1379	Assert(pszDesc \|\| *pszDesc);
1380	return VERR_INVALID_PARAMETER;
1381	}
1382
1383	pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1384	if (!pLun)
1385	return VERR_NO_MEMORY;
1386
1387	pLun->iLun = iLun;
1388	pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1389	pLun->pTop = NULL;
1390	pLun->pBottom = NULL;
1391	pLun->pDevIns = pDevIns;
1392	pLun->pUsbIns = NULL;
1393	pLun->pszDesc = pszDesc;
1394	pLun->pBase = pBaseInterface;
1395	if (!pLunPrev)
1396	pDevIns->Internal.s.pLunsR3 = pLun;
1397	else
1398	pLunPrev->pNext = pLun;
1399	Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1400	iLun, pszDesc, pDevIns->pReg->szName, pDevIns->iInstance));
1401	}
1402	else if (pLun->pTop)
1403	{
1404	AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1405	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1406	return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1407	}
1408	Assert(pLun->pBase == pBaseInterface);
1409
1410
1411	/*
1412	* Get the attached driver configuration.
1413	*/
1414	int rc;
1415	PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
1416	if (pNode)
1417	rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /pDrvAbove/, pLun, ppBaseInterface);
1418	else
1419	rc = VERR_PDM_NO_ATTACHED_DRIVER;
1420
1421
1422	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1423	return rc;
1424	}
1425
1426
1427	/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
1428	static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1429	PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char pszName, PPDMQUEUE ppQueue)
1430	{
1431	PDMDEV_ASSERT_DEVINS(pDevIns);
1432	LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1433	pDevIns->pReg->szName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1434
1435	PVM pVM = pDevIns->Internal.s.pVMR3;
1436	VM_ASSERT_EMT(pVM);
1437
1438	if (pDevIns->iInstance > 0)
1439	{
1440	pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1441	AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1442	}
1443
1444	int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1445
1446	LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc ppQueue=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, ppQueue));
1447	return rc;
1448	}
1449
1450
1451	/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
1452	static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1453	const char *pszNameFmt, va_list va)
1454	{
1455	PDMDEV_ASSERT_DEVINS(pDevIns);
1456	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
1457	pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
1458
1459	PVM pVM = pDevIns->Internal.s.pVMR3;
1460	VM_ASSERT_EMT(pVM);
1461	int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
1462
1463	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1464	return rc;
1465	}
1466
1467
1468	/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
1469	static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1470	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1471	{
1472	PDMDEV_ASSERT_DEVINS(pDevIns);
1473	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1474	LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1475	pDevIns->pReg->szName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1476
1477	int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1478
1479	LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pReg->szName, pDevIns->iInstance,
1480	rc, *ppThread));
1481	return rc;
1482	}
1483
1484
1485	/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
1486	static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
1487	{
1488	PDMDEV_ASSERT_DEVINS(pDevIns);
1489	VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
1490	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pfnAsyncNotify));
1491
1492	int rc = VINF_SUCCESS;
1493	AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
1494	AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
1495	AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED \| PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
1496	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1497	AssertStmt( enmVMState == VMSTATE_SUSPENDING
1498	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
1499	\|\| enmVMState == VMSTATE_SUSPENDING_LS
1500	\|\| enmVMState == VMSTATE_RESETTING
1501	\|\| enmVMState == VMSTATE_RESETTING_LS
1502	\|\| enmVMState == VMSTATE_POWERING_OFF
1503	\|\| enmVMState == VMSTATE_POWERING_OFF_LS,
1504	rc = VERR_INVALID_STATE);
1505
1506	if (RT_SUCCESS(rc))
1507	pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
1508
1509	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1510	return rc;
1511	}
1512
1513
1514	/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
1515	static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
1516	{
1517	PDMDEV_ASSERT_DEVINS(pDevIns);
1518	PVM pVM = pDevIns->Internal.s.pVMR3;
1519
1520	VMSTATE enmVMState = VMR3GetState(pVM);
1521	if ( enmVMState == VMSTATE_SUSPENDING
1522	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
1523	\|\| enmVMState == VMSTATE_SUSPENDING_LS
1524	\|\| enmVMState == VMSTATE_RESETTING
1525	\|\| enmVMState == VMSTATE_RESETTING_LS
1526	\|\| enmVMState == VMSTATE_POWERING_OFF
1527	\|\| enmVMState == VMSTATE_POWERING_OFF_LS)
1528	{
1529	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
1530	VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
1531	}
1532	else
1533	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, enmVMState));
1534	}
1535
1536
1537	/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
1538	static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1539	{
1540	PDMDEV_ASSERT_DEVINS(pDevIns);
1541	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1542	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1543	pDevIns->pReg->szName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1544	pRtcReg->pfnWrite, ppRtcHlp));
1545
1546	/*
1547	* Validate input.
1548	*/
1549	if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1550	{
1551	AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1552	PDM_RTCREG_VERSION));
1553	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1554	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1555	return VERR_INVALID_PARAMETER;
1556	}
1557	if ( !pRtcReg->pfnWrite
1558	\|\| !pRtcReg->pfnRead)
1559	{
1560	Assert(pRtcReg->pfnWrite);
1561	Assert(pRtcReg->pfnRead);
1562	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1563	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1564	return VERR_INVALID_PARAMETER;
1565	}
1566
1567	if (!ppRtcHlp)
1568	{
1569	Assert(ppRtcHlp);
1570	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1571	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1572	return VERR_INVALID_PARAMETER;
1573	}
1574
1575	/*
1576	* Only one DMA device.
1577	*/
1578	PVM pVM = pDevIns->Internal.s.pVMR3;
1579	if (pVM->pdm.s.pRtc)
1580	{
1581	AssertMsgFailed(("Only one RTC device is supported!\n"));
1582	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1583	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1584	return VERR_INVALID_PARAMETER;
1585	}
1586
1587	/*
1588	* Allocate and initialize pci bus structure.
1589	*/
1590	int rc = VINF_SUCCESS;
1591	PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1592	if (pRtc)
1593	{
1594	pRtc->pDevIns = pDevIns;
1595	pRtc->Reg = *pRtcReg;
1596	pVM->pdm.s.pRtc = pRtc;
1597
1598	/* set the helper pointer. */
1599	*ppRtcHlp = &g_pdmR3DevRtcHlp;
1600	Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1601	pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1602	}
1603	else
1604	rc = VERR_NO_MEMORY;
1605
1606	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1607	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1608	return rc;
1609	}
1610
1611
1612	/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
1613	static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
1614	{
1615	PDMDEV_ASSERT_DEVINS(pDevIns);
1616	PVM pVM = pDevIns->Internal.s.pVMR3;
1617	VM_ASSERT_EMT(pVM);
1618	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
1619	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
1620	int rc = VINF_SUCCESS;
1621	if (pVM->pdm.s.pDmac)
1622	pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
1623	else
1624	{
1625	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1626	rc = VERR_PDM_NO_DMAC_INSTANCE;
1627	}
1628	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
1629	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1630	return rc;
1631	}
1632
1633
1634	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
1635	static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
1636	{
1637	PDMDEV_ASSERT_DEVINS(pDevIns);
1638	PVM pVM = pDevIns->Internal.s.pVMR3;
1639	VM_ASSERT_EMT(pVM);
1640	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
1641	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
1642	int rc = VINF_SUCCESS;
1643	if (pVM->pdm.s.pDmac)
1644	{
1645	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1646	if (pcbRead)
1647	*pcbRead = cb;
1648	}
1649	else
1650	{
1651	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1652	rc = VERR_PDM_NO_DMAC_INSTANCE;
1653	}
1654	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
1655	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1656	return rc;
1657	}
1658
1659
1660	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
1661	static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
1662	{
1663	PDMDEV_ASSERT_DEVINS(pDevIns);
1664	PVM pVM = pDevIns->Internal.s.pVMR3;
1665	VM_ASSERT_EMT(pVM);
1666	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
1667	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
1668	int rc = VINF_SUCCESS;
1669	if (pVM->pdm.s.pDmac)
1670	{
1671	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1672	if (pcbWritten)
1673	*pcbWritten = cb;
1674	}
1675	else
1676	{
1677	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1678	rc = VERR_PDM_NO_DMAC_INSTANCE;
1679	}
1680	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
1681	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1682	return rc;
1683	}
1684
1685
1686	/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
1687	static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
1688	{
1689	PDMDEV_ASSERT_DEVINS(pDevIns);
1690	PVM pVM = pDevIns->Internal.s.pVMR3;
1691	VM_ASSERT_EMT(pVM);
1692	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
1693	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, uLevel));
1694	int rc = VINF_SUCCESS;
1695	if (pVM->pdm.s.pDmac)
1696	pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
1697	else
1698	{
1699	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1700	rc = VERR_PDM_NO_DMAC_INSTANCE;
1701	}
1702	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
1703	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1704	return rc;
1705	}
1706
1707	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
1708	static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
1709	{
1710	PDMDEV_ASSERT_DEVINS(pDevIns);
1711	PVM pVM = pDevIns->Internal.s.pVMR3;
1712	VM_ASSERT_EMT(pVM);
1713	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
1714	pDevIns->pReg->szName, pDevIns->iInstance, uChannel));
1715	uint8_t u8Mode;
1716	if (pVM->pdm.s.pDmac)
1717	u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
1718	else
1719	{
1720	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1721	u8Mode = 3 << 2 /* illegal mode type */;
1722	}
1723	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
1724	pDevIns->pReg->szName, pDevIns->iInstance, u8Mode));
1725	return u8Mode;
1726	}
1727
1728	/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
1729	static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
1730	{
1731	PDMDEV_ASSERT_DEVINS(pDevIns);
1732	PVM pVM = pDevIns->Internal.s.pVMR3;
1733	VM_ASSERT_EMT(pVM);
1734	LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
1735	pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
1736
1737	AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1738	VM_FF_SET(pVM, VM_FF_PDM_DMA);
1739	REMR3NotifyDmaPending(pVM);
1740	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
1741	}
1742
1743
1744	/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
1745	static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
1746	{
1747	PDMDEV_ASSERT_DEVINS(pDevIns);
1748	PVM pVM = pDevIns->Internal.s.pVMR3;
1749	VM_ASSERT_EMT(pVM);
1750
1751	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
1752	pDevIns->pReg->szName, pDevIns->iInstance, iReg, u8Value));
1753	int rc;
1754	if (pVM->pdm.s.pRtc)
1755	rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
1756	else
1757	rc = VERR_PDM_NO_RTC_INSTANCE;
1758
1759	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1760	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1761	return rc;
1762	}
1763
1764
1765	/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
1766	static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
1767	{
1768	PDMDEV_ASSERT_DEVINS(pDevIns);
1769	PVM pVM = pDevIns->Internal.s.pVMR3;
1770	VM_ASSERT_EMT(pVM);
1771
1772	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
1773	pDevIns->pReg->szName, pDevIns->iInstance, iReg, pu8Value));
1774	int rc;
1775	if (pVM->pdm.s.pRtc)
1776	rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
1777	else
1778	rc = VERR_PDM_NO_RTC_INSTANCE;
1779
1780	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1781	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1782	return rc;
1783	}
1784
1785
1786	/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
1787	static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1788	{
1789	PDMDEV_ASSERT_DEVINS(pDevIns);
1790	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1791	return true;
1792
1793	char szMsg[100];
1794	RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1795	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1796	AssertBreakpoint();
1797	return false;
1798	}
1799
1800
1801	/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
1802	static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1803	{
1804	PDMDEV_ASSERT_DEVINS(pDevIns);
1805	if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1806	return true;
1807
1808	char szMsg[100];
1809	RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1810	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1811	AssertBreakpoint();
1812	return false;
1813	}
1814
1815
1816	/** @interface_method_impl{PDMDEVHLP,pfnLdrGetRCInterfaceSymbols} */
1817	static DECLCALLBACK(int) pdmR3DevHlp_LdrGetRCInterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
1818	const char pszSymPrefix, const char pszSymList)
1819	{
1820	PDMDEV_ASSERT_DEVINS(pDevIns);
1821	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1822	LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
1823	pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
1824
1825	int rc;
1826	if ( strncmp(pszSymPrefix, "dev", 3) == 0
1827	&& RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
1828	{
1829	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1830	rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3, pvInterface, cbInterface,
1831	pDevIns->pReg->szRCMod, pszSymPrefix, pszSymList,
1832	false /fRing0OrRC/);
1833	else
1834	{
1835	AssertMsgFailed(("Not a raw-mode enabled driver\n"));
1836	rc = VERR_PERMISSION_DENIED;
1837	}
1838	}
1839	else
1840	{
1841	AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
1842	pszSymPrefix, pDevIns->pReg->szName));
1843	rc = VERR_INVALID_NAME;
1844	}
1845
1846	LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
1847	pDevIns->iInstance, rc));
1848	return rc;
1849	}
1850
1851
1852	/** @interface_method_impl{PDMDEVHLP,pfnLdrGetR0InterfaceSymbols} */
1853	static DECLCALLBACK(int) pdmR3DevHlp_LdrGetR0InterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
1854	const char pszSymPrefix, const char pszSymList)
1855	{
1856	PDMDEV_ASSERT_DEVINS(pDevIns);
1857	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1858	LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
1859	pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
1860
1861	int rc;
1862	if ( strncmp(pszSymPrefix, "dev", 3) == 0
1863	&& RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
1864	{
1865	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1866	rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3, pvInterface, cbInterface,
1867	pDevIns->pReg->szR0Mod, pszSymPrefix, pszSymList,
1868	true /fRing0OrRC/);
1869	else
1870	{
1871	AssertMsgFailed(("Not a ring-0 enabled driver\n"));
1872	rc = VERR_PERMISSION_DENIED;
1873	}
1874	}
1875	else
1876	{
1877	AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
1878	pszSymPrefix, pDevIns->pReg->szName));
1879	rc = VERR_INVALID_NAME;
1880	}
1881
1882	LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
1883	pDevIns->iInstance, rc));
1884	return rc;
1885	}
1886
1887
1888	/** @interface_method_impl{PDMDEVHLP,pfnCallR0} */
1889	static DECLCALLBACK(int) pdmR3DevHlp_CallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
1890	{
1891	PDMDEV_ASSERT_DEVINS(pDevIns);
1892	PVM pVM = pDevIns->Internal.s.pVMR3;
1893	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1894	LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: uOperation=%#x u64Arg=%#RX64\n",
1895	pDevIns->pReg->szName, pDevIns->iInstance, uOperation, u64Arg));
1896
1897	/*
1898	* Resolve the ring-0 entry point. There is not need to remember this like
1899	* we do for drivers since this is mainly for construction time hacks and
1900	* other things that aren't performance critical.
1901	*/
1902	int rc;
1903	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1904	{
1905	char szSymbol[ sizeof("devR0") + sizeof(pDevIns->pReg->szName) + sizeof("ReqHandler")];
1906	strcat(strcat(strcpy(szSymbol, "devR0"), pDevIns->pReg->szName), "ReqHandler");
1907	szSymbol[sizeof("devR0") - 1] = RT_C_TO_UPPER(szSymbol[sizeof("devR0") - 1]);
1908
1909	PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
1910	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, szSymbol, &pfnReqHandlerR0);
1911	if (RT_SUCCESS(rc))
1912	{
1913	/*
1914	* Make the ring-0 call.
1915	*/
1916	PDMDEVICECALLREQHANDLERREQ Req;
1917	Req.Hdr.u32Magic = SUPVMMR0REQHDR_MAGIC;
1918	Req.Hdr.cbReq = sizeof(Req);
1919	Req.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1920	Req.pfnReqHandlerR0 = pfnReqHandlerR0;
1921	Req.uOperation = uOperation;
1922	Req.u32Alignment = 0;
1923	Req.u64Arg = u64Arg;
1924	rc = SUPR3CallVMMR0Ex(pVM->pVMR0, NIL_VMCPUID, VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 0, &Req.Hdr);
1925	}
1926	else
1927	pfnReqHandlerR0 = NIL_RTR0PTR;
1928	}
1929	else
1930	rc = VERR_ACCESS_DENIED;
1931	LogFlow(("pdmR3DevHlp_CallR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
1932	pDevIns->iInstance, rc));
1933	return rc;
1934	}
1935
1936
1937	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
1938	static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1939	{
1940	PDMDEV_ASSERT_DEVINS(pDevIns);
1941	LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1942	return pDevIns->Internal.s.pVMR3;
1943	}
1944
1945
1946	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
1947	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1948	{
1949	PDMDEV_ASSERT_DEVINS(pDevIns);
1950	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1951	LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1952	return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1953	}
1954
1955
1956	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
1957	static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1958	{
1959	PDMDEV_ASSERT_DEVINS(pDevIns);
1960	PVM pVM = pDevIns->Internal.s.pVMR3;
1961	VM_ASSERT_EMT(pVM);
1962	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1963	".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1964	pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1965	pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1966	pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1967
1968	/*
1969	* Validate the structure.
1970	*/
1971	if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1972	{
1973	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1974	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1975	return VERR_INVALID_PARAMETER;
1976	}
1977	if ( !pPciBusReg->pfnRegisterR3
1978	\|\| !pPciBusReg->pfnIORegionRegisterR3
1979	\|\| !pPciBusReg->pfnSetIrqR3
1980	\|\| !pPciBusReg->pfnSaveExecR3
1981	\|\| !pPciBusReg->pfnLoadExecR3
1982	\|\| (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1983	{
1984	Assert(pPciBusReg->pfnRegisterR3);
1985	Assert(pPciBusReg->pfnIORegionRegisterR3);
1986	Assert(pPciBusReg->pfnSetIrqR3);
1987	Assert(pPciBusReg->pfnSaveExecR3);
1988	Assert(pPciBusReg->pfnLoadExecR3);
1989	Assert(pPciBusReg->pfnFakePCIBIOSR3);
1990	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1991	return VERR_INVALID_PARAMETER;
1992	}
1993	if ( pPciBusReg->pszSetIrqRC
1994	&& !VALID_PTR(pPciBusReg->pszSetIrqRC))
1995	{
1996	Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1997	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1998	return VERR_INVALID_PARAMETER;
1999	}
2000	if ( pPciBusReg->pszSetIrqR0
2001	&& !VALID_PTR(pPciBusReg->pszSetIrqR0))
2002	{
2003	Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2004	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2005	return VERR_INVALID_PARAMETER;
2006	}
2007	if (!ppPciHlpR3)
2008	{
2009	Assert(ppPciHlpR3);
2010	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2011	return VERR_INVALID_PARAMETER;
2012	}
2013
2014	/*
2015	* Find free PCI bus entry.
2016	*/
2017	unsigned iBus = 0;
2018	for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2019	if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2020	break;
2021	if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
2022	{
2023	AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
2024	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2025	return VERR_INVALID_PARAMETER;
2026	}
2027	PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2028
2029	/*
2030	* Resolve and init the RC bits.
2031	*/
2032	if (pPciBusReg->pszSetIrqRC)
2033	{
2034	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
2035	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
2036	if (RT_FAILURE(rc))
2037	{
2038	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2039	return rc;
2040	}
2041	pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2042	}
2043	else
2044	{
2045	pPciBus->pfnSetIrqRC = 0;
2046	pPciBus->pDevInsRC = 0;
2047	}
2048
2049	/*
2050	* Resolve and init the R0 bits.
2051	*/
2052	if (pPciBusReg->pszSetIrqR0)
2053	{
2054	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2055	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2056	if (RT_FAILURE(rc))
2057	{
2058	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2059	return rc;
2060	}
2061	pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2062	}
2063	else
2064	{
2065	pPciBus->pfnSetIrqR0 = 0;
2066	pPciBus->pDevInsR0 = 0;
2067	}
2068
2069	/*
2070	* Init the R3 bits.
2071	*/
2072	pPciBus->iBus = iBus;
2073	pPciBus->pDevInsR3 = pDevIns;
2074	pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
2075	pPciBus->pfnRegisterMsiR3 = pPciBusReg->pfnRegisterMsiR3;
2076	pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
2077	pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
2078	pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
2079	pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
2080	pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
2081	pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
2082
2083	Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2084
2085	/* set the helper pointer and return. */
2086	*ppPciHlpR3 = &g_pdmR3DevPciHlp;
2087	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2088	return VINF_SUCCESS;
2089	}
2090
2091
2092	/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
2093	static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2094	{
2095	PDMDEV_ASSERT_DEVINS(pDevIns);
2096	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2097	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
2098	pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
2099	pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
2100	pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
2101	ppPicHlpR3));
2102
2103	/*
2104	* Validate input.
2105	*/
2106	if (pPicReg->u32Version != PDM_PICREG_VERSION)
2107	{
2108	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2109	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2110	return VERR_INVALID_PARAMETER;
2111	}
2112	if ( !pPicReg->pfnSetIrqR3
2113	\|\| !pPicReg->pfnGetInterruptR3)
2114	{
2115	Assert(pPicReg->pfnSetIrqR3);
2116	Assert(pPicReg->pfnGetInterruptR3);
2117	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2118	return VERR_INVALID_PARAMETER;
2119	}
2120	if ( ( pPicReg->pszSetIrqRC
2121	\|\| pPicReg->pszGetInterruptRC)
2122	&& ( !VALID_PTR(pPicReg->pszSetIrqRC)
2123	\|\| !VALID_PTR(pPicReg->pszGetInterruptRC))
2124	)
2125	{
2126	Assert(VALID_PTR(pPicReg->pszSetIrqRC));
2127	Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
2128	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2129	return VERR_INVALID_PARAMETER;
2130	}
2131	if ( pPicReg->pszSetIrqRC
2132	&& !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
2133	{
2134	Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
2135	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2136	return VERR_INVALID_PARAMETER;
2137	}
2138	if ( pPicReg->pszSetIrqR0
2139	&& !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
2140	{
2141	Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
2142	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2143	return VERR_INVALID_PARAMETER;
2144	}
2145	if (!ppPicHlpR3)
2146	{
2147	Assert(ppPicHlpR3);
2148	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2149	return VERR_INVALID_PARAMETER;
2150	}
2151
2152	/*
2153	* Only one PIC device.
2154	*/
2155	PVM pVM = pDevIns->Internal.s.pVMR3;
2156	if (pVM->pdm.s.Pic.pDevInsR3)
2157	{
2158	AssertMsgFailed(("Only one pic device is supported!\n"));
2159	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2160	return VERR_INVALID_PARAMETER;
2161	}
2162
2163	/*
2164	* RC stuff.
2165	*/
2166	if (pPicReg->pszSetIrqRC)
2167	{
2168	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2169	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, rc));
2170	if (RT_SUCCESS(rc))
2171	{
2172	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
2173	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
2174	}
2175	if (RT_FAILURE(rc))
2176	{
2177	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2178	return rc;
2179	}
2180	pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2181	}
2182	else
2183	{
2184	pVM->pdm.s.Pic.pDevInsRC = 0;
2185	pVM->pdm.s.Pic.pfnSetIrqRC = 0;
2186	pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
2187	}
2188
2189	/*
2190	* R0 stuff.
2191	*/
2192	if (pPicReg->pszSetIrqR0)
2193	{
2194	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2195	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2196	if (RT_SUCCESS(rc))
2197	{
2198	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2199	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2200	}
2201	if (RT_FAILURE(rc))
2202	{
2203	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2204	return rc;
2205	}
2206	pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2207	Assert(pVM->pdm.s.Pic.pDevInsR0);
2208	}
2209	else
2210	{
2211	pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2212	pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2213	pVM->pdm.s.Pic.pDevInsR0 = 0;
2214	}
2215
2216	/*
2217	* R3 stuff.
2218	*/
2219	pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2220	pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
2221	pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
2222	Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2223
2224	/* set the helper pointer and return. */
2225	*ppPicHlpR3 = &g_pdmR3DevPicHlp;
2226	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2227	return VINF_SUCCESS;
2228	}
2229
2230
2231	/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
2232	static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2233	{
2234	PDMDEV_ASSERT_DEVINS(pDevIns);
2235	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2236	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
2237	".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
2238	".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
2239	pDevIns->pReg->szName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
2240	pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
2241	pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
2242	pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
2243	pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
2244
2245	/*
2246	* Validate input.
2247	*/
2248	if (pApicReg->u32Version != PDM_APICREG_VERSION)
2249	{
2250	AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2251	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2252	return VERR_INVALID_PARAMETER;
2253	}
2254	if ( !pApicReg->pfnGetInterruptR3
2255	\|\| !pApicReg->pfnHasPendingIrqR3
2256	\|\| !pApicReg->pfnSetBaseR3
2257	\|\| !pApicReg->pfnGetBaseR3
2258	\|\| !pApicReg->pfnSetTPRR3
2259	\|\| !pApicReg->pfnGetTPRR3
2260	\|\| !pApicReg->pfnWriteMSRR3
2261	\|\| !pApicReg->pfnReadMSRR3
2262	\|\| !pApicReg->pfnBusDeliverR3
2263	\|\| !pApicReg->pfnLocalInterruptR3)
2264	{
2265	Assert(pApicReg->pfnGetInterruptR3);
2266	Assert(pApicReg->pfnHasPendingIrqR3);
2267	Assert(pApicReg->pfnSetBaseR3);
2268	Assert(pApicReg->pfnGetBaseR3);
2269	Assert(pApicReg->pfnSetTPRR3);
2270	Assert(pApicReg->pfnGetTPRR3);
2271	Assert(pApicReg->pfnWriteMSRR3);
2272	Assert(pApicReg->pfnReadMSRR3);
2273	Assert(pApicReg->pfnBusDeliverR3);
2274	Assert(pApicReg->pfnLocalInterruptR3);
2275	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2276	return VERR_INVALID_PARAMETER;
2277	}
2278	if ( ( pApicReg->pszGetInterruptRC
2279	\|\| pApicReg->pszHasPendingIrqRC
2280	\|\| pApicReg->pszSetBaseRC
2281	\|\| pApicReg->pszGetBaseRC
2282	\|\| pApicReg->pszSetTPRRC
2283	\|\| pApicReg->pszGetTPRRC
2284	\|\| pApicReg->pszWriteMSRRC
2285	\|\| pApicReg->pszReadMSRRC
2286	\|\| pApicReg->pszBusDeliverRC
2287	\|\| pApicReg->pszLocalInterruptRC)
2288	&& ( !VALID_PTR(pApicReg->pszGetInterruptRC)
2289	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqRC)
2290	\|\| !VALID_PTR(pApicReg->pszSetBaseRC)
2291	\|\| !VALID_PTR(pApicReg->pszGetBaseRC)
2292	\|\| !VALID_PTR(pApicReg->pszSetTPRRC)
2293	\|\| !VALID_PTR(pApicReg->pszGetTPRRC)
2294	\|\| !VALID_PTR(pApicReg->pszWriteMSRRC)
2295	\|\| !VALID_PTR(pApicReg->pszReadMSRRC)
2296	\|\| !VALID_PTR(pApicReg->pszBusDeliverRC)
2297	\|\| !VALID_PTR(pApicReg->pszLocalInterruptRC))
2298	)
2299	{
2300	Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
2301	Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
2302	Assert(VALID_PTR(pApicReg->pszSetBaseRC));
2303	Assert(VALID_PTR(pApicReg->pszGetBaseRC));
2304	Assert(VALID_PTR(pApicReg->pszSetTPRRC));
2305	Assert(VALID_PTR(pApicReg->pszGetTPRRC));
2306	Assert(VALID_PTR(pApicReg->pszReadMSRRC));
2307	Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
2308	Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
2309	Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
2310	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2311	return VERR_INVALID_PARAMETER;
2312	}
2313	if ( ( pApicReg->pszGetInterruptR0
2314	\|\| pApicReg->pszHasPendingIrqR0
2315	\|\| pApicReg->pszSetBaseR0
2316	\|\| pApicReg->pszGetBaseR0
2317	\|\| pApicReg->pszSetTPRR0
2318	\|\| pApicReg->pszGetTPRR0
2319	\|\| pApicReg->pszWriteMSRR0
2320	\|\| pApicReg->pszReadMSRR0
2321	\|\| pApicReg->pszBusDeliverR0
2322	\|\| pApicReg->pszLocalInterruptR0)
2323	&& ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2324	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqR0)
2325	\|\| !VALID_PTR(pApicReg->pszSetBaseR0)
2326	\|\| !VALID_PTR(pApicReg->pszGetBaseR0)
2327	\|\| !VALID_PTR(pApicReg->pszSetTPRR0)
2328	\|\| !VALID_PTR(pApicReg->pszGetTPRR0)
2329	\|\| !VALID_PTR(pApicReg->pszReadMSRR0)
2330	\|\| !VALID_PTR(pApicReg->pszWriteMSRR0)
2331	\|\| !VALID_PTR(pApicReg->pszBusDeliverR0)
2332	\|\| !VALID_PTR(pApicReg->pszLocalInterruptR0))
2333	)
2334	{
2335	Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2336	Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
2337	Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2338	Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2339	Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2340	Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2341	Assert(VALID_PTR(pApicReg->pszReadMSRR0));
2342	Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
2343	Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2344	Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
2345	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2346	return VERR_INVALID_PARAMETER;
2347	}
2348	if (!ppApicHlpR3)
2349	{
2350	Assert(ppApicHlpR3);
2351	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2352	return VERR_INVALID_PARAMETER;
2353	}
2354
2355	/*
2356	* Only one APIC device. On SMP we have single logical device covering all LAPICs,
2357	* as they need to communicate and share state easily.
2358	*/
2359	PVM pVM = pDevIns->Internal.s.pVMR3;
2360	if (pVM->pdm.s.Apic.pDevInsR3)
2361	{
2362	AssertMsgFailed(("Only one apic device is supported!\n"));
2363	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2364	return VERR_INVALID_PARAMETER;
2365	}
2366
2367	/*
2368	* Resolve & initialize the RC bits.
2369	*/
2370	if (pApicReg->pszGetInterruptRC)
2371	{
2372	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
2373	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
2374	if (RT_SUCCESS(rc))
2375	{
2376	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
2377	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
2378	}
2379	if (RT_SUCCESS(rc))
2380	{
2381	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
2382	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, rc));
2383	}
2384	if (RT_SUCCESS(rc))
2385	{
2386	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
2387	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, rc));
2388	}
2389	if (RT_SUCCESS(rc))
2390	{
2391	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
2392	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, rc));
2393	}
2394	if (RT_SUCCESS(rc))
2395	{
2396	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
2397	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, rc));
2398	}
2399	if (RT_SUCCESS(rc))
2400	{
2401	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
2402	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
2403	}
2404	if (RT_SUCCESS(rc))
2405	{
2406	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
2407	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, rc));
2408	}
2409	if (RT_SUCCESS(rc))
2410	{
2411	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
2412	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
2413	}
2414	if (RT_SUCCESS(rc))
2415	{
2416	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
2417	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
2418	}
2419	if (RT_FAILURE(rc))
2420	{
2421	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2422	return rc;
2423	}
2424	pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2425	}
2426	else
2427	{
2428	pVM->pdm.s.Apic.pDevInsRC = 0;
2429	pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
2430	pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
2431	pVM->pdm.s.Apic.pfnSetBaseRC = 0;
2432	pVM->pdm.s.Apic.pfnGetBaseRC = 0;
2433	pVM->pdm.s.Apic.pfnSetTPRRC = 0;
2434	pVM->pdm.s.Apic.pfnGetTPRRC = 0;
2435	pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
2436	pVM->pdm.s.Apic.pfnReadMSRRC = 0;
2437	pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
2438	pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
2439	}
2440
2441	/*
2442	* Resolve & initialize the R0 bits.
2443	*/
2444	if (pApicReg->pszGetInterruptR0)
2445	{
2446	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2447	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2448	if (RT_SUCCESS(rc))
2449	{
2450	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
2451	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
2452	}
2453	if (RT_SUCCESS(rc))
2454	{
2455	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2456	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2457	}
2458	if (RT_SUCCESS(rc))
2459	{
2460	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2461	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2462	}
2463	if (RT_SUCCESS(rc))
2464	{
2465	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2466	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2467	}
2468	if (RT_SUCCESS(rc))
2469	{
2470	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2471	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2472	}
2473	if (RT_SUCCESS(rc))
2474	{
2475	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
2476	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
2477	}
2478	if (RT_SUCCESS(rc))
2479	{
2480	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
2481	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
2482	}
2483	if (RT_SUCCESS(rc))
2484	{
2485	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2486	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2487	}
2488	if (RT_SUCCESS(rc))
2489	{
2490	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
2491	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
2492	}
2493	if (RT_FAILURE(rc))
2494	{
2495	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2496	return rc;
2497	}
2498	pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2499	Assert(pVM->pdm.s.Apic.pDevInsR0);
2500	}
2501	else
2502	{
2503	pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2504	pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
2505	pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2506	pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2507	pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2508	pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2509	pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
2510	pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
2511	pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2512	pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
2513	pVM->pdm.s.Apic.pDevInsR0 = 0;
2514	}
2515
2516	/*
2517	* Initialize the HC bits.
2518	*/
2519	pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2520	pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
2521	pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
2522	pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
2523	pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
2524	pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
2525	pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
2526	pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
2527	pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
2528	pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
2529	pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
2530	Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2531
2532	/* set the helper pointer and return. */
2533	*ppApicHlpR3 = &g_pdmR3DevApicHlp;
2534	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2535	return VINF_SUCCESS;
2536	}
2537
2538
2539	/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
2540	static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2541	{
2542	PDMDEV_ASSERT_DEVINS(pDevIns);
2543	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2544	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
2545	pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
2546	pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
2547
2548	/*
2549	* Validate input.
2550	*/
2551	if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2552	{
2553	AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2554	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2555	return VERR_INVALID_PARAMETER;
2556	}
2557	if (!pIoApicReg->pfnSetIrqR3 \|\| !pIoApicReg->pfnSendMsiR3)
2558	{
2559	Assert(pIoApicReg->pfnSetIrqR3);
2560	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2561	return VERR_INVALID_PARAMETER;
2562	}
2563	if ( pIoApicReg->pszSetIrqRC
2564	&& !VALID_PTR(pIoApicReg->pszSetIrqRC))
2565	{
2566	Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
2567	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2568	return VERR_INVALID_PARAMETER;
2569	}
2570	if ( pIoApicReg->pszSendMsiRC
2571	&& !VALID_PTR(pIoApicReg->pszSendMsiRC))
2572	{
2573	Assert(VALID_PTR(pIoApicReg->pszSendMsiRC));
2574	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2575	return VERR_INVALID_PARAMETER;
2576	}
2577	if ( pIoApicReg->pszSetIrqR0
2578	&& !VALID_PTR(pIoApicReg->pszSetIrqR0))
2579	{
2580	Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2581	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2582	return VERR_INVALID_PARAMETER;
2583	}
2584	if ( pIoApicReg->pszSendMsiR0
2585	&& !VALID_PTR(pIoApicReg->pszSendMsiR0))
2586	{
2587	Assert(VALID_PTR(pIoApicReg->pszSendMsiR0));
2588	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2589	return VERR_INVALID_PARAMETER;
2590	}
2591	if (!ppIoApicHlpR3)
2592	{
2593	Assert(ppIoApicHlpR3);
2594	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2595	return VERR_INVALID_PARAMETER;
2596	}
2597
2598	/*
2599	* The I/O APIC requires the APIC to be present (hacks++).
2600	* If the I/O APIC does GC stuff so must the APIC.
2601	*/
2602	PVM pVM = pDevIns->Internal.s.pVMR3;
2603	if (!pVM->pdm.s.Apic.pDevInsR3)
2604	{
2605	AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2606	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2607	return VERR_INVALID_PARAMETER;
2608	}
2609	if ( pIoApicReg->pszSetIrqRC
2610	&& !pVM->pdm.s.Apic.pDevInsRC)
2611	{
2612	AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2613	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2614	return VERR_INVALID_PARAMETER;
2615	}
2616
2617	/*
2618	* Only one I/O APIC device.
2619	*/
2620	if (pVM->pdm.s.IoApic.pDevInsR3)
2621	{
2622	AssertMsgFailed(("Only one ioapic device is supported!\n"));
2623	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2624	return VERR_INVALID_PARAMETER;
2625	}
2626
2627	/*
2628	* Resolve & initialize the GC bits.
2629	*/
2630	if (pIoApicReg->pszSetIrqRC)
2631	{
2632	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2633	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2634	if (RT_FAILURE(rc))
2635	{
2636	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2637	return rc;
2638	}
2639	pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2640	}
2641	else
2642	{
2643	pVM->pdm.s.IoApic.pDevInsRC = 0;
2644	pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2645	}
2646
2647	if (pIoApicReg->pszSendMsiRC)
2648	{
2649	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSendMsiRC);
2650	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSendMsiRC, rc));
2651	if (RT_FAILURE(rc))
2652	{
2653	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2654	return rc;
2655	}
2656	}
2657	else
2658	{
2659	pVM->pdm.s.IoApic.pfnSendMsiRC = 0;
2660	}
2661
2662	/*
2663	* Resolve & initialize the R0 bits.
2664	*/
2665	if (pIoApicReg->pszSetIrqR0)
2666	{
2667	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2668	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2669	if (RT_FAILURE(rc))
2670	{
2671	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2672	return rc;
2673	}
2674	pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2675	Assert(pVM->pdm.s.IoApic.pDevInsR0);
2676	}
2677	else
2678	{
2679	pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2680	pVM->pdm.s.IoApic.pDevInsR0 = 0;
2681	}
2682
2683	if (pIoApicReg->pszSendMsiR0)
2684	{
2685	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSendMsiR0);
2686	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSendMsiR0, rc));
2687	if (RT_FAILURE(rc))
2688	{
2689	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2690	return rc;
2691	}
2692	}
2693	else
2694	{
2695	pVM->pdm.s.IoApic.pfnSendMsiR0 = 0;
2696	}
2697
2698
2699	/*
2700	* Initialize the R3 bits.
2701	*/
2702	pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2703	pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2704	pVM->pdm.s.IoApic.pfnSendMsiR3 = pIoApicReg->pfnSendMsiR3;
2705	Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2706
2707	/* set the helper pointer and return. */
2708	*ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2709	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2710	return VINF_SUCCESS;
2711	}
2712
2713
2714	/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
2715	static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
2716	{
2717	PDMDEV_ASSERT_DEVINS(pDevIns);
2718	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2719	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n"));
2720
2721	/*
2722	* Validate input.
2723	*/
2724	if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
2725	{
2726	AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
2727	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2728	return VERR_INVALID_PARAMETER;
2729	}
2730
2731	if (!ppHpetHlpR3)
2732	{
2733	Assert(ppHpetHlpR3);
2734	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2735	return VERR_INVALID_PARAMETER;
2736	}
2737
2738	/* set the helper pointer and return. */
2739	*ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
2740	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2741	return VINF_SUCCESS;
2742	}
2743
2744
2745	/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
2746	static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2747	{
2748	PDMDEV_ASSERT_DEVINS(pDevIns);
2749	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2750	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2751	pDevIns->pReg->szName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2752	pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2753
2754	/*
2755	* Validate input.
2756	*/
2757	if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2758	{
2759	AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2760	PDM_DMACREG_VERSION));
2761	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2762	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2763	return VERR_INVALID_PARAMETER;
2764	}
2765	if ( !pDmacReg->pfnRun
2766	\|\| !pDmacReg->pfnRegister
2767	\|\| !pDmacReg->pfnReadMemory
2768	\|\| !pDmacReg->pfnWriteMemory
2769	\|\| !pDmacReg->pfnSetDREQ
2770	\|\| !pDmacReg->pfnGetChannelMode)
2771	{
2772	Assert(pDmacReg->pfnRun);
2773	Assert(pDmacReg->pfnRegister);
2774	Assert(pDmacReg->pfnReadMemory);
2775	Assert(pDmacReg->pfnWriteMemory);
2776	Assert(pDmacReg->pfnSetDREQ);
2777	Assert(pDmacReg->pfnGetChannelMode);
2778	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2779	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2780	return VERR_INVALID_PARAMETER;
2781	}
2782
2783	if (!ppDmacHlp)
2784	{
2785	Assert(ppDmacHlp);
2786	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2787	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2788	return VERR_INVALID_PARAMETER;
2789	}
2790
2791	/*
2792	* Only one DMA device.
2793	*/
2794	PVM pVM = pDevIns->Internal.s.pVMR3;
2795	if (pVM->pdm.s.pDmac)
2796	{
2797	AssertMsgFailed(("Only one DMA device is supported!\n"));
2798	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2799	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2800	return VERR_INVALID_PARAMETER;
2801	}
2802
2803	/*
2804	* Allocate and initialize pci bus structure.
2805	*/
2806	int rc = VINF_SUCCESS;
2807	PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2808	if (pDmac)
2809	{
2810	pDmac->pDevIns = pDevIns;
2811	pDmac->Reg = *pDmacReg;
2812	pVM->pdm.s.pDmac = pDmac;
2813
2814	/* set the helper pointer. */
2815	*ppDmacHlp = &g_pdmR3DevDmacHlp;
2816	Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2817	pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2818	}
2819	else
2820	rc = VERR_NO_MEMORY;
2821
2822	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2823	pDevIns->pReg->szName, pDevIns->iInstance, rc));
2824	return rc;
2825	}
2826
2827
2828	/**
2829	* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2830	*/
2831	static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2832	{
2833	PDMDEV_ASSERT_DEVINS(pDevIns);
2834	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2835
2836	int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2837	return rc;
2838	}
2839
2840
2841	/**
2842	* @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2843	*/
2844	static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2845	{
2846	PDMDEV_ASSERT_DEVINS(pDevIns);
2847	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2848
2849	int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2850	return rc;
2851	}
2852
2853
2854	/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
2855	static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2856	{
2857	PDMDEV_ASSERT_DEVINS(pDevIns);
2858	PVM pVM = pDevIns->Internal.s.pVMR3;
2859	VM_ASSERT_EMT(pVM);
2860	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2861	pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2862
2863	/*
2864	* We postpone this operation because we're likely to be inside a I/O instruction
2865	* and the EIP will be updated when we return.
2866	* We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2867	*/
2868	bool fHaltOnReset;
2869	int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2870	if (RT_SUCCESS(rc) && fHaltOnReset)
2871	{
2872	Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2873	rc = VINF_EM_HALT;
2874	}
2875	else
2876	{
2877	VM_FF_SET(pVM, VM_FF_RESET);
2878	rc = VINF_EM_RESET;
2879	}
2880
2881	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2882	return rc;
2883	}
2884
2885
2886	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
2887	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2888	{
2889	int rc;
2890	PDMDEV_ASSERT_DEVINS(pDevIns);
2891	PVM pVM = pDevIns->Internal.s.pVMR3;
2892	VM_ASSERT_EMT(pVM);
2893	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2894	pDevIns->pReg->szName, pDevIns->iInstance));
2895
2896	/** @todo Always take the SMP path - fewer code paths. */
2897	if (pVM->cCpus > 1)
2898	{
2899	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2900	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
2901	AssertRC(rc);
2902	rc = VINF_EM_SUSPEND;
2903	}
2904	else
2905	rc = VMR3Suspend(pVM);
2906
2907	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2908	return rc;
2909	}
2910
2911
2912	/**
2913	* Worker for pdmR3DevHlp_VMSuspendSaveAndPowerOff that is invoked via a queued
2914	* EMT request to avoid deadlocks.
2915	*
2916	* @returns VBox status code fit for scheduling.
2917	* @param pVM The VM handle.
2918	* @param pDevIns The device that triggered this action.
2919	*/
2920	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker(PVM pVM, PPDMDEVINS pDevIns)
2921	{
2922	/*
2923	* Suspend the VM first then do the saving.
2924	*/
2925	int rc = VMR3Suspend(pVM);
2926	if (RT_SUCCESS(rc))
2927	{
2928	rc = pVM->pUVM->pVmm2UserMethods->pfnSaveState(pVM->pUVM->pVmm2UserMethods, pVM);
2929
2930	/*
2931	* On success, power off the VM, on failure we'll leave it suspended.
2932	*/
2933	if (RT_SUCCESS(rc))
2934	{
2935	rc = VMR3PowerOff(pVM);
2936	if (RT_FAILURE(rc))
2937	LogRel(("%s/SSP: VMR3PowerOff failed: %Rrc\n", pDevIns->pReg->szName, rc));
2938	}
2939	else
2940	LogRel(("%s/SSP: pfnSaveState failed: %Rrc\n", pDevIns->pReg->szName, rc));
2941	}
2942	else
2943	LogRel(("%s/SSP: Suspend failed: %Rrc\n", pDevIns->pReg->szName, rc));
2944	return rc;
2945	}
2946
2947
2948	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
2949	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
2950	{
2951	PDMDEV_ASSERT_DEVINS(pDevIns);
2952	PVM pVM = pDevIns->Internal.s.pVMR3;
2953	VM_ASSERT_EMT(pVM);
2954	LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d:\n",
2955	pDevIns->pReg->szName, pDevIns->iInstance));
2956
2957	int rc;
2958	if ( pVM->pUVM->pVmm2UserMethods
2959	&& pVM->pUVM->pVmm2UserMethods->pfnSaveState)
2960	{
2961	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)pdmR3DevHlp_VMSuspendSaveAndPowerOffWorker, 2, pVM, pDevIns);
2962	if (RT_SUCCESS(rc))
2963	{
2964	LogRel(("%s: Suspending, Saving and Powering Off the VM\n", pDevIns->pReg->szName));
2965	rc = VINF_EM_SUSPEND;
2966	}
2967	}
2968	else
2969	rc = VERR_NOT_SUPPORTED;
2970
2971	LogFlow(("pdmR3DevHlp_VMSuspendSaveAndPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2972	return rc;
2973	}
2974
2975
2976	/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
2977	static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2978	{
2979	int rc;
2980	PDMDEV_ASSERT_DEVINS(pDevIns);
2981	PVM pVM = pDevIns->Internal.s.pVMR3;
2982	VM_ASSERT_EMT(pVM);
2983	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2984	pDevIns->pReg->szName, pDevIns->iInstance));
2985
2986	/** @todo Always take the SMP path - fewer code paths. */
2987	if (pVM->cCpus > 1)
2988	{
2989	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2990	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
2991	AssertRC(rc);
2992	/* Set the VCPU state to stopped here as well to make sure no
2993	* inconsistency with the EM state occurs.
2994	*/
2995	VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
2996	rc = VINF_EM_OFF;
2997	}
2998	else
2999	rc = VMR3PowerOff(pVM);
3000
3001	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
3002	return rc;
3003	}
3004
3005
3006	/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3007	static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3008	{
3009	PDMDEV_ASSERT_DEVINS(pDevIns);
3010	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3011
3012	bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
3013
3014	LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pReg->szName, pDevIns->iInstance, fRc));
3015	return fRc;
3016	}
3017
3018
3019	/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3020	static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3021	{
3022	PDMDEV_ASSERT_DEVINS(pDevIns);
3023	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3024	LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, fEnable));
3025	PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
3026	}
3027
3028
3029	/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3030	static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3031	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3032	{
3033	PDMDEV_ASSERT_DEVINS(pDevIns);
3034	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
3035
3036	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3037	pDevIns->pReg->szName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3038	AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3039
3040	CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
3041
3042	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - pEax=%#x pEbx=%#x pEcx=%#x pEdx=%#x\n",
3043	pDevIns->pReg->szName, pDevIns->iInstance, pEax, pEbx, pEcx, pEdx));
3044	}
3045
3046
3047	/**
3048	* The device helper structure for trusted devices.
3049	*/
3050	const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
3051	{
3052	PDM_DEVHLPR3_VERSION,
3053	pdmR3DevHlp_IOPortRegister,
3054	pdmR3DevHlp_IOPortRegisterRC,
3055	pdmR3DevHlp_IOPortRegisterR0,
3056	pdmR3DevHlp_IOPortDeregister,
3057	pdmR3DevHlp_MMIORegister,
3058	pdmR3DevHlp_MMIORegisterRC,
3059	pdmR3DevHlp_MMIORegisterR0,
3060	pdmR3DevHlp_MMIODeregister,
3061	pdmR3DevHlp_MMIO2Register,
3062	pdmR3DevHlp_MMIO2Deregister,
3063	pdmR3DevHlp_MMIO2Map,
3064	pdmR3DevHlp_MMIO2Unmap,
3065	pdmR3DevHlp_MMHyperMapMMIO2,
3066	pdmR3DevHlp_MMIO2MapKernel,
3067	pdmR3DevHlp_ROMRegister,
3068	pdmR3DevHlp_ROMProtectShadow,
3069	pdmR3DevHlp_SSMRegister,
3070	pdmR3DevHlp_TMTimerCreate,
3071	pdmR3DevHlp_TMUtcNow,
3072	pdmR3DevHlp_PhysRead,
3073	pdmR3DevHlp_PhysWrite,
3074	pdmR3DevHlp_PhysGCPhys2CCPtr,
3075	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3076	pdmR3DevHlp_PhysReleasePageMappingLock,
3077	pdmR3DevHlp_PhysReadGCVirt,
3078	pdmR3DevHlp_PhysWriteGCVirt,
3079	pdmR3DevHlp_PhysGCPtr2GCPhys,
3080	pdmR3DevHlp_MMHeapAlloc,
3081	pdmR3DevHlp_MMHeapAllocZ,
3082	pdmR3DevHlp_MMHeapFree,
3083	pdmR3DevHlp_VMState,
3084	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3085	pdmR3DevHlp_VMSetError,
3086	pdmR3DevHlp_VMSetErrorV,
3087	pdmR3DevHlp_VMSetRuntimeError,
3088	pdmR3DevHlp_VMSetRuntimeErrorV,
3089	pdmR3DevHlp_DBGFStopV,
3090	pdmR3DevHlp_DBGFInfoRegister,
3091	pdmR3DevHlp_STAMRegister,
3092	pdmR3DevHlp_STAMRegisterF,
3093	pdmR3DevHlp_STAMRegisterV,
3094	pdmR3DevHlp_PCIRegister,
3095	pdmR3DevHlp_PCIRegisterMsi,
3096	pdmR3DevHlp_PCIIORegionRegister,
3097	pdmR3DevHlp_PCISetConfigCallbacks,
3098	pdmR3DevHlp_PCISetIrq,
3099	pdmR3DevHlp_PCISetIrqNoWait,
3100	pdmR3DevHlp_ISASetIrq,
3101	pdmR3DevHlp_ISASetIrqNoWait,
3102	pdmR3DevHlp_DriverAttach,
3103	pdmR3DevHlp_QueueCreate,
3104	pdmR3DevHlp_CritSectInit,
3105	pdmR3DevHlp_ThreadCreate,
3106	pdmR3DevHlp_SetAsyncNotification,
3107	pdmR3DevHlp_AsyncNotificationCompleted,
3108	pdmR3DevHlp_RTCRegister,
3109	pdmR3DevHlp_PCIBusRegister,
3110	pdmR3DevHlp_PICRegister,
3111	pdmR3DevHlp_APICRegister,
3112	pdmR3DevHlp_IOAPICRegister,
3113	pdmR3DevHlp_HPETRegister,
3114	pdmR3DevHlp_DMACRegister,
3115	pdmR3DevHlp_DMARegister,
3116	pdmR3DevHlp_DMAReadMemory,
3117	pdmR3DevHlp_DMAWriteMemory,
3118	pdmR3DevHlp_DMASetDREQ,
3119	pdmR3DevHlp_DMAGetChannelMode,
3120	pdmR3DevHlp_DMASchedule,
3121	pdmR3DevHlp_CMOSWrite,
3122	pdmR3DevHlp_CMOSRead,
3123	pdmR3DevHlp_AssertEMT,
3124	pdmR3DevHlp_AssertOther,
3125	pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3126	pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3127	pdmR3DevHlp_CallR0,
3128	0,
3129	0,
3130	0,
3131	0,
3132	0,
3133	0,
3134	0,
3135	0,
3136	0,
3137	0,
3138	pdmR3DevHlp_GetVM,
3139	pdmR3DevHlp_GetVMCPU,
3140	pdmR3DevHlp_RegisterVMMDevHeap,
3141	pdmR3DevHlp_UnregisterVMMDevHeap,
3142	pdmR3DevHlp_VMReset,
3143	pdmR3DevHlp_VMSuspend,
3144	pdmR3DevHlp_VMSuspendSaveAndPowerOff,
3145	pdmR3DevHlp_VMPowerOff,
3146	pdmR3DevHlp_A20IsEnabled,
3147	pdmR3DevHlp_A20Set,
3148	pdmR3DevHlp_GetCpuId,
3149	PDM_DEVHLPR3_VERSION /* the end */
3150	};
3151
3152
3153
3154
3155	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
3156	static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3157	{
3158	PDMDEV_ASSERT_DEVINS(pDevIns);
3159	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3160	return NULL;
3161	}
3162
3163
3164	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
3165	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
3166	{
3167	PDMDEV_ASSERT_DEVINS(pDevIns);
3168	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3169	return NULL;
3170	}
3171
3172
3173	/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
3174	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3175	{
3176	PDMDEV_ASSERT_DEVINS(pDevIns);
3177	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3178	return VERR_ACCESS_DENIED;
3179	}
3180
3181
3182	/** @interface_method_impl{PDMDEVHLPR3,pfnUnregisterVMMDevHeap} */
3183	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3184	{
3185	PDMDEV_ASSERT_DEVINS(pDevIns);
3186	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3187	return VERR_ACCESS_DENIED;
3188	}
3189
3190
3191	/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
3192	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3193	{
3194	PDMDEV_ASSERT_DEVINS(pDevIns);
3195	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3196	return VERR_ACCESS_DENIED;
3197	}
3198
3199
3200	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3201	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3202	{
3203	PDMDEV_ASSERT_DEVINS(pDevIns);
3204	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3205	return VERR_ACCESS_DENIED;
3206	}
3207
3208
3209	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspendSaveAndPowerOff} */
3210	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
3211	{
3212	PDMDEV_ASSERT_DEVINS(pDevIns);
3213	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3214	return VERR_ACCESS_DENIED;
3215	}
3216
3217
3218	/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3219	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3220	{
3221	PDMDEV_ASSERT_DEVINS(pDevIns);
3222	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3223	return VERR_ACCESS_DENIED;
3224	}
3225
3226
3227	/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3228	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3229	{
3230	PDMDEV_ASSERT_DEVINS(pDevIns);
3231	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3232	return false;
3233	}
3234
3235
3236	/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3237	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3238	{
3239	PDMDEV_ASSERT_DEVINS(pDevIns);
3240	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3241	NOREF(fEnable);
3242	}
3243
3244
3245	/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3246	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3247	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3248	{
3249	PDMDEV_ASSERT_DEVINS(pDevIns);
3250	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3251	}
3252
3253
3254	/**
3255	* The device helper structure for non-trusted devices.
3256	*/
3257	const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3258	{
3259	PDM_DEVHLPR3_VERSION,
3260	pdmR3DevHlp_IOPortRegister,
3261	pdmR3DevHlp_IOPortRegisterRC,
3262	pdmR3DevHlp_IOPortRegisterR0,
3263	pdmR3DevHlp_IOPortDeregister,
3264	pdmR3DevHlp_MMIORegister,
3265	pdmR3DevHlp_MMIORegisterRC,
3266	pdmR3DevHlp_MMIORegisterR0,
3267	pdmR3DevHlp_MMIODeregister,
3268	pdmR3DevHlp_MMIO2Register,
3269	pdmR3DevHlp_MMIO2Deregister,
3270	pdmR3DevHlp_MMIO2Map,
3271	pdmR3DevHlp_MMIO2Unmap,
3272	pdmR3DevHlp_MMHyperMapMMIO2,
3273	pdmR3DevHlp_MMIO2MapKernel,
3274	pdmR3DevHlp_ROMRegister,
3275	pdmR3DevHlp_ROMProtectShadow,
3276	pdmR3DevHlp_SSMRegister,
3277	pdmR3DevHlp_TMTimerCreate,
3278	pdmR3DevHlp_TMUtcNow,
3279	pdmR3DevHlp_PhysRead,
3280	pdmR3DevHlp_PhysWrite,
3281	pdmR3DevHlp_PhysGCPhys2CCPtr,
3282	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3283	pdmR3DevHlp_PhysReleasePageMappingLock,
3284	pdmR3DevHlp_PhysReadGCVirt,
3285	pdmR3DevHlp_PhysWriteGCVirt,
3286	pdmR3DevHlp_PhysGCPtr2GCPhys,
3287	pdmR3DevHlp_MMHeapAlloc,
3288	pdmR3DevHlp_MMHeapAllocZ,
3289	pdmR3DevHlp_MMHeapFree,
3290	pdmR3DevHlp_VMState,
3291	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3292	pdmR3DevHlp_VMSetError,
3293	pdmR3DevHlp_VMSetErrorV,
3294	pdmR3DevHlp_VMSetRuntimeError,
3295	pdmR3DevHlp_VMSetRuntimeErrorV,
3296	pdmR3DevHlp_DBGFStopV,
3297	pdmR3DevHlp_DBGFInfoRegister,
3298	pdmR3DevHlp_STAMRegister,
3299	pdmR3DevHlp_STAMRegisterF,
3300	pdmR3DevHlp_STAMRegisterV,
3301	pdmR3DevHlp_PCIRegister,
3302	pdmR3DevHlp_PCIRegisterMsi,
3303	pdmR3DevHlp_PCIIORegionRegister,
3304	pdmR3DevHlp_PCISetConfigCallbacks,
3305	pdmR3DevHlp_PCISetIrq,
3306	pdmR3DevHlp_PCISetIrqNoWait,
3307	pdmR3DevHlp_ISASetIrq,
3308	pdmR3DevHlp_ISASetIrqNoWait,
3309	pdmR3DevHlp_DriverAttach,
3310	pdmR3DevHlp_QueueCreate,
3311	pdmR3DevHlp_CritSectInit,
3312	pdmR3DevHlp_ThreadCreate,
3313	pdmR3DevHlp_SetAsyncNotification,
3314	pdmR3DevHlp_AsyncNotificationCompleted,
3315	pdmR3DevHlp_RTCRegister,
3316	pdmR3DevHlp_PCIBusRegister,
3317	pdmR3DevHlp_PICRegister,
3318	pdmR3DevHlp_APICRegister,
3319	pdmR3DevHlp_IOAPICRegister,
3320	pdmR3DevHlp_HPETRegister,
3321	pdmR3DevHlp_DMACRegister,
3322	pdmR3DevHlp_DMARegister,
3323	pdmR3DevHlp_DMAReadMemory,
3324	pdmR3DevHlp_DMAWriteMemory,
3325	pdmR3DevHlp_DMASetDREQ,
3326	pdmR3DevHlp_DMAGetChannelMode,
3327	pdmR3DevHlp_DMASchedule,
3328	pdmR3DevHlp_CMOSWrite,
3329	pdmR3DevHlp_CMOSRead,
3330	pdmR3DevHlp_AssertEMT,
3331	pdmR3DevHlp_AssertOther,
3332	pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3333	pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3334	pdmR3DevHlp_CallR0,
3335	0,
3336	0,
3337	0,
3338	0,
3339	0,
3340	0,
3341	0,
3342	0,
3343	0,
3344	0,
3345	pdmR3DevHlp_Untrusted_GetVM,
3346	pdmR3DevHlp_Untrusted_GetVMCPU,
3347	pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3348	pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3349	pdmR3DevHlp_Untrusted_VMReset,
3350	pdmR3DevHlp_Untrusted_VMSuspend,
3351	pdmR3DevHlp_Untrusted_VMSuspendSaveAndPowerOff,
3352	pdmR3DevHlp_Untrusted_VMPowerOff,
3353	pdmR3DevHlp_Untrusted_A20IsEnabled,
3354	pdmR3DevHlp_Untrusted_A20Set,
3355	pdmR3DevHlp_Untrusted_GetCpuId,
3356	PDM_DEVHLPR3_VERSION /* the end */
3357	};
3358
3359
3360
3361	/**
3362	* Queue consumer callback for internal component.
3363	*
3364	* @returns Success indicator.
3365	* If false the item will not be removed and the flushing will stop.
3366	* @param pVM The VM handle.
3367	* @param pItem The item to consume. Upon return this item will be freed.
3368	*/
3369	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3370	{
3371	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3372	LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3373	switch (pTask->enmOp)
3374	{
3375	case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3376	PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3377	break;
3378
3379	case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3380	pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3381	break;
3382
3383	case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3384	PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3385	break;
3386
3387	default:
3388	AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3389	break;
3390	}
3391	return true;
3392	}
3393
3394	/** @} */

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source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 33236

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