VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevMiscHlp.cpp@ 19167

Last change on this file since 19167 was 19141, checked in by vboxsync, 16 years ago

Action flags breakup.
Fixed PGM saved state loading of 2.2.2 images.
Reduced hacks in PATM state loading (fixups).
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 15.5 KB
Line 
1/* $Id: PDMDevMiscHlp.cpp 19141 2009-04-23 13:52:18Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Misc. Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/rem.h>
30#include <VBox/vm.h>
31#include <VBox/vmm.h>
32
33#include <VBox/log.h>
34#include <VBox/err.h>
35#include <iprt/asm.h>
36#include <iprt/assert.h>
37#include <iprt/thread.h>
38
39
40
41/** @name HC PIC Helpers
42 * @{
43 */
44
45/** @copydoc PDMPICHLPR3::pfnSetInterruptFF */
46static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
47{
48 PDMDEV_ASSERT_DEVINS(pDevIns);
49 PVM pVM = pDevIns->Internal.s.pVMR3;
50 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
51
52 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
53 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
54
55 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
56 REMR3NotifyInterruptSet(pVM, pVCpu);
57 VMR3NotifyFF(pVM, true); /** @todo SMP: notify the right cpu. */
58}
59
60
61/** @copydoc PDMPICHLPR3::pfnClearInterruptFF */
62static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
63{
64 PDMDEV_ASSERT_DEVINS(pDevIns);
65 PVM pVM = pDevIns->Internal.s.pVMR3;
66 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
67
68 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
69 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
70
71 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
72 REMR3NotifyInterruptClear(pVM, pVCpu);
73}
74
75
76/** @copydoc PDMPICHLPR3::pfnLock */
77static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
78{
79 PDMDEV_ASSERT_DEVINS(pDevIns);
80 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
81}
82
83
84/** @copydoc PDMPICHLPR3::pfnUnlock */
85static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
86{
87 PDMDEV_ASSERT_DEVINS(pDevIns);
88 pdmUnlock(pDevIns->Internal.s.pVMR3);
89}
90
91
92/** @copydoc PDMPICHLPR3::pfnGetRCHelpers */
93static DECLCALLBACK(PCPDMPICHLPRC) pdmR3PicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
94{
95 PDMDEV_ASSERT_DEVINS(pDevIns);
96 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97 RTRCPTR pRCHelpers = 0;
98 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPicHlp", &pRCHelpers);
99 AssertReleaseRC(rc);
100 AssertRelease(pRCHelpers);
101 LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
102 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
103 return pRCHelpers;
104}
105
106
107/** @copydoc PDMPICHLPR3::pfnGetR0Helpers */
108static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
109{
110 PDMDEV_ASSERT_DEVINS(pDevIns);
111 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
112 PCPDMPICHLPR0 pR0Helpers = 0;
113 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PicHlp", &pR0Helpers);
114 AssertReleaseRC(rc);
115 AssertRelease(pR0Helpers);
116 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
117 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
118 return pR0Helpers;
119}
120
121
122/**
123 * PIC Device Helpers.
124 */
125const PDMPICHLPR3 g_pdmR3DevPicHlp =
126{
127 PDM_PICHLPR3_VERSION,
128 pdmR3PicHlp_SetInterruptFF,
129 pdmR3PicHlp_ClearInterruptFF,
130 pdmR3PicHlp_Lock,
131 pdmR3PicHlp_Unlock,
132 pdmR3PicHlp_GetRCHelpers,
133 pdmR3PicHlp_GetR0Helpers,
134 PDM_PICHLPR3_VERSION /* the end */
135};
136
137/** @} */
138
139
140
141
142/** @name HC APIC Helpers
143 * @{
144 */
145
146/** @copydoc PDMAPICHLPR3::pfnSetInterruptFF */
147static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
148{
149 PDMDEV_ASSERT_DEVINS(pDevIns);
150 PVM pVM = pDevIns->Internal.s.pVMR3;
151 PVMCPU pVCpu = &pVM->aCpus[idCpu];
152
153 AssertReturnVoid(idCpu < pVM->cCPUs);
154
155 LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT(%d) %d -> 1\n",
156 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, idCpu, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
157
158 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
159 REMR3NotifyInterruptSet(pVM, pVCpu);
160 VMR3NotifyFF(pVM, true); /** @todo SMP: notify the right cpu. */
161}
162
163
164/** @copydoc PDMAPICHLPR3::pfnClearInterruptFF */
165static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
166{
167 PDMDEV_ASSERT_DEVINS(pDevIns);
168 PVM pVM = pDevIns->Internal.s.pVMR3;
169 PVMCPU pVCpu = &pVM->aCpus[idCpu];
170
171 AssertReturnVoid(idCpu < pVM->cCPUs);
172
173 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT(%d) %d -> 0\n",
174 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, idCpu, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
175
176 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
177 REMR3NotifyInterruptClear(pVM, pVCpu);
178}
179
180
181/** @copydoc PDMAPICHLPR3::pfnChangeFeature */
182static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion)
183{
184 PDMDEV_ASSERT_DEVINS(pDevIns);
185 LogFlow(("pdmR3ApicHlp_ChangeFeature: caller='%s'/%d: version=%d\n",
186 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, (int)enmVersion));
187 switch (enmVersion)
188 {
189 case PDMAPICVERSION_NONE:
190 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
191 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
192 break;
193 case PDMAPICVERSION_APIC:
194 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
195 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
196 break;
197 case PDMAPICVERSION_X2APIC:
198 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
199 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
200 break;
201 default:
202 AssertMsgFailed(("Unknown APIC version: %d\n", (int)enmVersion));
203 }
204}
205
206/** @copydoc PDMAPICHLPR3::pfnLock */
207static DECLCALLBACK(int) pdmR3ApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
208{
209 PDMDEV_ASSERT_DEVINS(pDevIns);
210 LogFlow(("pdmR3ApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
211 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
212}
213
214
215/** @copydoc PDMAPICHLPR3::pfnUnlock */
216static DECLCALLBACK(void) pdmR3ApicHlp_Unlock(PPDMDEVINS pDevIns)
217{
218 PDMDEV_ASSERT_DEVINS(pDevIns);
219 LogFlow(("pdmR3ApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
220 pdmUnlock(pDevIns->Internal.s.pVMR3);
221}
222
223
224/** @copydoc PDMAPICHLPR3::pfnGetCpuId */
225static DECLCALLBACK(VMCPUID) pdmR3ApicHlp_GetCpuId(PPDMDEVINS pDevIns)
226{
227 PDMDEV_ASSERT_DEVINS(pDevIns);
228 return VMMGetCpuId(pDevIns->Internal.s.pVMR3);
229}
230
231
232/** @copydoc PDMAPICHLPR3::pfnGetRCHelpers */
233static DECLCALLBACK(PCPDMAPICHLPRC) pdmR3ApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
234{
235 PDMDEV_ASSERT_DEVINS(pDevIns);
236 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
237 RTRCPTR pRCHelpers = 0;
238 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCApicHlp", &pRCHelpers);
239 AssertReleaseRC(rc);
240 AssertRelease(pRCHelpers);
241 LogFlow(("pdmR3ApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
242 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
243 return pRCHelpers;
244}
245
246
247/** @copydoc PDMAPICHLPR3::pfnGetR0Helpers */
248static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
249{
250 PDMDEV_ASSERT_DEVINS(pDevIns);
251 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
252 PCPDMAPICHLPR0 pR0Helpers = 0;
253 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
254 AssertReleaseRC(rc);
255 AssertRelease(pR0Helpers);
256 LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
257 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
258 return pR0Helpers;
259}
260
261
262/**
263 * APIC Device Helpers.
264 */
265const PDMAPICHLPR3 g_pdmR3DevApicHlp =
266{
267 PDM_APICHLPR3_VERSION,
268 pdmR3ApicHlp_SetInterruptFF,
269 pdmR3ApicHlp_ClearInterruptFF,
270 pdmR3ApicHlp_ChangeFeature,
271 pdmR3ApicHlp_Lock,
272 pdmR3ApicHlp_Unlock,
273 pdmR3ApicHlp_GetCpuId,
274 pdmR3ApicHlp_GetRCHelpers,
275 pdmR3ApicHlp_GetR0Helpers,
276 PDM_APICHLPR3_VERSION /* the end */
277};
278
279/** @} */
280
281
282
283
284/** @name HC I/O APIC Helpers
285 * @{
286 */
287
288/** @copydoc PDMIOAPICHLPR3::pfnApicBusDeliver */
289static DECLCALLBACK(void) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
290 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
291{
292 PDMDEV_ASSERT_DEVINS(pDevIns);
293 PVM pVM = pDevIns->Internal.s.pVMR3;
294 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
295 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
296 if (pVM->pdm.s.Apic.pfnBusDeliverR3)
297 pVM->pdm.s.Apic.pfnBusDeliverR3(pVM->pdm.s.Apic.pDevInsR3, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
298}
299
300
301/** @copydoc PDMIOAPICHLPR3::pfnLock */
302static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
303{
304 PDMDEV_ASSERT_DEVINS(pDevIns);
305 LogFlow(("pdmR3IoApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
306 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
307}
308
309
310/** @copydoc PDMIOAPICHLPR3::pfnUnlock */
311static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
312{
313 PDMDEV_ASSERT_DEVINS(pDevIns);
314 LogFlow(("pdmR3IoApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
315 pdmUnlock(pDevIns->Internal.s.pVMR3);
316}
317
318
319/** @copydoc PDMIOAPICHLPR3::pfnGetRCHelpers */
320static DECLCALLBACK(PCPDMIOAPICHLPRC) pdmR3IoApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
321{
322 PDMDEV_ASSERT_DEVINS(pDevIns);
323 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
324 RTRCPTR pRCHelpers = 0;
325 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
326 AssertReleaseRC(rc);
327 AssertRelease(pRCHelpers);
328 LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
329 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
330 return pRCHelpers;
331}
332
333
334/** @copydoc PDMIOAPICHLPR3::pfnGetR0Helpers */
335static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
336{
337 PDMDEV_ASSERT_DEVINS(pDevIns);
338 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
339 PCPDMIOAPICHLPR0 pR0Helpers = 0;
340 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
341 AssertReleaseRC(rc);
342 AssertRelease(pR0Helpers);
343 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
344 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
345 return pR0Helpers;
346}
347
348
349/**
350 * I/O APIC Device Helpers.
351 */
352const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
353{
354 PDM_IOAPICHLPR3_VERSION,
355 pdmR3IoApicHlp_ApicBusDeliver,
356 pdmR3IoApicHlp_Lock,
357 pdmR3IoApicHlp_Unlock,
358 pdmR3IoApicHlp_GetRCHelpers,
359 pdmR3IoApicHlp_GetR0Helpers,
360 PDM_IOAPICHLPR3_VERSION /* the end */
361};
362
363/** @} */
364
365
366
367
368/** @name HC PCI Bus Helpers
369 * @{
370 */
371
372/** @copydoc PDMPCIHLPR3::pfnIsaSetIrq */
373static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
374{
375 PDMDEV_ASSERT_DEVINS(pDevIns);
376 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
377 PDMIsaSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
378}
379
380
381/** @copydoc PDMPCIHLPR3::pfnIoApicSetIrq */
382static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
383{
384 PDMDEV_ASSERT_DEVINS(pDevIns);
385 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
386 PDMIoApicSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
387}
388
389
390/** @copydoc PDMPCIHLPR3::pfnIsMMIO2Base */
391static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)
392{
393 PDMDEV_ASSERT_DEVINS(pDevIns);
394 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
395 bool fRc = PGMR3PhysMMIO2IsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
396 Log4(("pdmR3PciHlp_IsMMIO2Base: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
397 return fRc;
398}
399
400
401/** @copydoc PDMPCIHLPR3::pfnLock */
402static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
403{
404 PDMDEV_ASSERT_DEVINS(pDevIns);
405 LogFlow(("pdmR3PciHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
406 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
407}
408
409
410/** @copydoc PDMPCIHLPR3::pfnUnlock */
411static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
412{
413 PDMDEV_ASSERT_DEVINS(pDevIns);
414 LogFlow(("pdmR3PciHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
415 pdmUnlock(pDevIns->Internal.s.pVMR3);
416}
417
418
419/** @copydoc PDMPCIHLPR3::pfnGetRCHelpers */
420static DECLCALLBACK(PCPDMPCIHLPRC) pdmR3PciHlp_GetRCHelpers(PPDMDEVINS pDevIns)
421{
422 PDMDEV_ASSERT_DEVINS(pDevIns);
423 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
424 RTRCPTR pRCHelpers = 0;
425 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPciHlp", &pRCHelpers);
426 AssertReleaseRC(rc);
427 AssertRelease(pRCHelpers);
428 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
429 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
430 return pRCHelpers;
431}
432
433
434/** @copydoc PDMPCIHLPR3::pfnGetR0Helpers */
435static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns)
436{
437 PDMDEV_ASSERT_DEVINS(pDevIns);
438 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
439 PCPDMPCIHLPR0 pR0Helpers = 0;
440 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PciHlp", &pR0Helpers);
441 AssertReleaseRC(rc);
442 AssertRelease(pR0Helpers);
443 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
444 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
445 return pR0Helpers;
446}
447
448
449/**
450 * PCI Bus Device Helpers.
451 */
452const PDMPCIHLPR3 g_pdmR3DevPciHlp =
453{
454 PDM_PCIHLPR3_VERSION,
455 pdmR3PciHlp_IsaSetIrq,
456 pdmR3PciHlp_IoApicSetIrq,
457 pdmR3PciHlp_IsMMIO2Base,
458 pdmR3PciHlp_GetRCHelpers,
459 pdmR3PciHlp_GetR0Helpers,
460 pdmR3PciHlp_Lock,
461 pdmR3PciHlp_Unlock,
462 PDM_PCIHLPR3_VERSION, /* the end */
463};
464
465/** @} */
466
467
468
469/* none yet */
470
471/**
472 * DMAC Device Helpers.
473 */
474const PDMDMACHLP g_pdmR3DevDmacHlp =
475{
476 PDM_DMACHLP_VERSION
477};
478
479
480
481
482/* none yet */
483
484/**
485 * RTC Device Helpers.
486 */
487const PDMRTCHLP g_pdmR3DevRtcHlp =
488{
489 PDM_RTCHLP_VERSION
490};
491
492
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