VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevMiscHlp.cpp@ 20038

Last change on this file since 20038 was 19475, checked in by vboxsync, 16 years ago

VMM: sending init IPI
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  • Property svn:keywords set to Id
File size: 16.2 KB
Line 
1/* $Id: PDMDevMiscHlp.cpp 19475 2009-05-07 10:55:17Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Misc. Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/rem.h>
30#include <VBox/vm.h>
31#include <VBox/vmm.h>
32
33#include <VBox/log.h>
34#include <VBox/err.h>
35#include <iprt/asm.h>
36#include <iprt/assert.h>
37#include <iprt/thread.h>
38
39
40
41/** @name HC PIC Helpers
42 * @{
43 */
44
45/** @copydoc PDMPICHLPR3::pfnSetInterruptFF */
46static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
47{
48 PDMDEV_ASSERT_DEVINS(pDevIns);
49 PVM pVM = pDevIns->Internal.s.pVMR3;
50 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
51
52 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
53 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
54
55 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
56 REMR3NotifyInterruptSet(pVM, pVCpu);
57 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
58}
59
60
61/** @copydoc PDMPICHLPR3::pfnClearInterruptFF */
62static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
63{
64 PDMDEV_ASSERT_DEVINS(pDevIns);
65 PVM pVM = pDevIns->Internal.s.pVMR3;
66 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
67
68 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
69 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
70
71 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
72 REMR3NotifyInterruptClear(pVM, pVCpu);
73}
74
75
76/** @copydoc PDMPICHLPR3::pfnLock */
77static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
78{
79 PDMDEV_ASSERT_DEVINS(pDevIns);
80 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
81}
82
83
84/** @copydoc PDMPICHLPR3::pfnUnlock */
85static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
86{
87 PDMDEV_ASSERT_DEVINS(pDevIns);
88 pdmUnlock(pDevIns->Internal.s.pVMR3);
89}
90
91
92/** @copydoc PDMPICHLPR3::pfnGetRCHelpers */
93static DECLCALLBACK(PCPDMPICHLPRC) pdmR3PicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
94{
95 PDMDEV_ASSERT_DEVINS(pDevIns);
96 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97 RTRCPTR pRCHelpers = 0;
98 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPicHlp", &pRCHelpers);
99 AssertReleaseRC(rc);
100 AssertRelease(pRCHelpers);
101 LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
102 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
103 return pRCHelpers;
104}
105
106
107/** @copydoc PDMPICHLPR3::pfnGetR0Helpers */
108static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
109{
110 PDMDEV_ASSERT_DEVINS(pDevIns);
111 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
112 PCPDMPICHLPR0 pR0Helpers = 0;
113 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PicHlp", &pR0Helpers);
114 AssertReleaseRC(rc);
115 AssertRelease(pR0Helpers);
116 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
117 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
118 return pR0Helpers;
119}
120
121
122/**
123 * PIC Device Helpers.
124 */
125const PDMPICHLPR3 g_pdmR3DevPicHlp =
126{
127 PDM_PICHLPR3_VERSION,
128 pdmR3PicHlp_SetInterruptFF,
129 pdmR3PicHlp_ClearInterruptFF,
130 pdmR3PicHlp_Lock,
131 pdmR3PicHlp_Unlock,
132 pdmR3PicHlp_GetRCHelpers,
133 pdmR3PicHlp_GetR0Helpers,
134 PDM_PICHLPR3_VERSION /* the end */
135};
136
137/** @} */
138
139
140
141
142/** @name HC APIC Helpers
143 * @{
144 */
145
146/** @copydoc PDMAPICHLPR3::pfnSetInterruptFF */
147static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
148{
149 PDMDEV_ASSERT_DEVINS(pDevIns);
150 PVM pVM = pDevIns->Internal.s.pVMR3;
151 PVMCPU pVCpu = &pVM->aCpus[idCpu];
152
153 AssertReturnVoid(idCpu < pVM->cCPUs);
154
155 LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT(%d) %d -> 1\n",
156 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, idCpu, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
157
158 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
159 REMR3NotifyInterruptSet(pVM, pVCpu);
160 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
161}
162
163
164/** @copydoc PDMAPICHLPR3::pfnClearInterruptFF */
165static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
166{
167 PDMDEV_ASSERT_DEVINS(pDevIns);
168 PVM pVM = pDevIns->Internal.s.pVMR3;
169 PVMCPU pVCpu = &pVM->aCpus[idCpu];
170
171 AssertReturnVoid(idCpu < pVM->cCPUs);
172
173 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT(%d) %d -> 0\n",
174 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, idCpu, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
175
176 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
177 REMR3NotifyInterruptClear(pVM, pVCpu);
178}
179
180
181/** @copydoc PDMAPICHLPR3::pfnChangeFeature */
182static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion)
183{
184 PDMDEV_ASSERT_DEVINS(pDevIns);
185 LogFlow(("pdmR3ApicHlp_ChangeFeature: caller='%s'/%d: version=%d\n",
186 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, (int)enmVersion));
187 switch (enmVersion)
188 {
189 case PDMAPICVERSION_NONE:
190 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
191 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
192 break;
193 case PDMAPICVERSION_APIC:
194 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
195 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
196 break;
197 case PDMAPICVERSION_X2APIC:
198 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
199 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
200 break;
201 default:
202 AssertMsgFailed(("Unknown APIC version: %d\n", (int)enmVersion));
203 }
204}
205
206/** @copydoc PDMAPICHLPR3::pfnLock */
207static DECLCALLBACK(int) pdmR3ApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
208{
209 PDMDEV_ASSERT_DEVINS(pDevIns);
210 LogFlow(("pdmR3ApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
211 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
212}
213
214
215/** @copydoc PDMAPICHLPR3::pfnUnlock */
216static DECLCALLBACK(void) pdmR3ApicHlp_Unlock(PPDMDEVINS pDevIns)
217{
218 PDMDEV_ASSERT_DEVINS(pDevIns);
219 LogFlow(("pdmR3ApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
220 pdmUnlock(pDevIns->Internal.s.pVMR3);
221}
222
223/** @copydoc PDMAPICHLPR3::pfnGetCpuId */
224static DECLCALLBACK(VMCPUID) pdmR3ApicHlp_GetCpuId(PPDMDEVINS pDevIns)
225{
226 PDMDEV_ASSERT_DEVINS(pDevIns);
227 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
228 return VMMGetCpuId(pDevIns->Internal.s.pVMR3);
229}
230
231
232/** @copydoc PDMAPICHLPR3::pfnSendSipi */
233static DECLCALLBACK(void) pdmR3ApicHlp_SendSipi(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector)
234{
235 PDMDEV_ASSERT_DEVINS(pDevIns);
236 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
237 VMMR3SendSipi(pDevIns->Internal.s.pVMR3, idCpu, uVector);
238}
239
240/** @copydoc PDMAPICHLPR3::pfnSendInitIpi */
241static DECLCALLBACK(void) pdmR3ApicHlp_SendInitIpi(PPDMDEVINS pDevIns, VMCPUID idCpu)
242{
243 PDMDEV_ASSERT_DEVINS(pDevIns);
244 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
245 VMMR3SendInitIpi(pDevIns->Internal.s.pVMR3, idCpu);
246}
247
248/** @copydoc PDMAPICHLPR3::pfnGetRCHelpers */
249static DECLCALLBACK(PCPDMAPICHLPRC) pdmR3ApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
250{
251 PDMDEV_ASSERT_DEVINS(pDevIns);
252 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
253 RTRCPTR pRCHelpers = 0;
254 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCApicHlp", &pRCHelpers);
255 AssertReleaseRC(rc);
256 AssertRelease(pRCHelpers);
257 LogFlow(("pdmR3ApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
258 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
259 return pRCHelpers;
260}
261
262
263/** @copydoc PDMAPICHLPR3::pfnGetR0Helpers */
264static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
265{
266 PDMDEV_ASSERT_DEVINS(pDevIns);
267 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
268 PCPDMAPICHLPR0 pR0Helpers = 0;
269 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
270 AssertReleaseRC(rc);
271 AssertRelease(pR0Helpers);
272 LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
273 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
274 return pR0Helpers;
275}
276
277
278/**
279 * APIC Device Helpers.
280 */
281const PDMAPICHLPR3 g_pdmR3DevApicHlp =
282{
283 PDM_APICHLPR3_VERSION,
284 pdmR3ApicHlp_SetInterruptFF,
285 pdmR3ApicHlp_ClearInterruptFF,
286 pdmR3ApicHlp_ChangeFeature,
287 pdmR3ApicHlp_Lock,
288 pdmR3ApicHlp_Unlock,
289 pdmR3ApicHlp_GetCpuId,
290 pdmR3ApicHlp_SendSipi,
291 pdmR3ApicHlp_SendInitIpi,
292 pdmR3ApicHlp_GetRCHelpers,
293 pdmR3ApicHlp_GetR0Helpers,
294 PDM_APICHLPR3_VERSION /* the end */
295};
296
297/** @} */
298
299
300
301
302/** @name HC I/O APIC Helpers
303 * @{
304 */
305
306/** @copydoc PDMIOAPICHLPR3::pfnApicBusDeliver */
307static DECLCALLBACK(int) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
308 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
309{
310 PDMDEV_ASSERT_DEVINS(pDevIns);
311 PVM pVM = pDevIns->Internal.s.pVMR3;
312 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
313 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
314 if (pVM->pdm.s.Apic.pfnBusDeliverR3)
315 return pVM->pdm.s.Apic.pfnBusDeliverR3(pVM->pdm.s.Apic.pDevInsR3, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
316 return VINF_SUCCESS;
317}
318
319
320/** @copydoc PDMIOAPICHLPR3::pfnLock */
321static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
322{
323 PDMDEV_ASSERT_DEVINS(pDevIns);
324 LogFlow(("pdmR3IoApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
325 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
326}
327
328
329/** @copydoc PDMIOAPICHLPR3::pfnUnlock */
330static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
331{
332 PDMDEV_ASSERT_DEVINS(pDevIns);
333 LogFlow(("pdmR3IoApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
334 pdmUnlock(pDevIns->Internal.s.pVMR3);
335}
336
337
338/** @copydoc PDMIOAPICHLPR3::pfnGetRCHelpers */
339static DECLCALLBACK(PCPDMIOAPICHLPRC) pdmR3IoApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
340{
341 PDMDEV_ASSERT_DEVINS(pDevIns);
342 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
343 RTRCPTR pRCHelpers = 0;
344 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
345 AssertReleaseRC(rc);
346 AssertRelease(pRCHelpers);
347 LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
348 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
349 return pRCHelpers;
350}
351
352
353/** @copydoc PDMIOAPICHLPR3::pfnGetR0Helpers */
354static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
355{
356 PDMDEV_ASSERT_DEVINS(pDevIns);
357 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
358 PCPDMIOAPICHLPR0 pR0Helpers = 0;
359 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
360 AssertReleaseRC(rc);
361 AssertRelease(pR0Helpers);
362 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
363 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
364 return pR0Helpers;
365}
366
367
368/**
369 * I/O APIC Device Helpers.
370 */
371const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
372{
373 PDM_IOAPICHLPR3_VERSION,
374 pdmR3IoApicHlp_ApicBusDeliver,
375 pdmR3IoApicHlp_Lock,
376 pdmR3IoApicHlp_Unlock,
377 pdmR3IoApicHlp_GetRCHelpers,
378 pdmR3IoApicHlp_GetR0Helpers,
379 PDM_IOAPICHLPR3_VERSION /* the end */
380};
381
382/** @} */
383
384
385
386
387/** @name HC PCI Bus Helpers
388 * @{
389 */
390
391/** @copydoc PDMPCIHLPR3::pfnIsaSetIrq */
392static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
393{
394 PDMDEV_ASSERT_DEVINS(pDevIns);
395 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
396 PDMIsaSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
397}
398
399
400/** @copydoc PDMPCIHLPR3::pfnIoApicSetIrq */
401static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
402{
403 PDMDEV_ASSERT_DEVINS(pDevIns);
404 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
405 PDMIoApicSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
406}
407
408
409/** @copydoc PDMPCIHLPR3::pfnIsMMIO2Base */
410static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)
411{
412 PDMDEV_ASSERT_DEVINS(pDevIns);
413 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
414 bool fRc = PGMR3PhysMMIO2IsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
415 Log4(("pdmR3PciHlp_IsMMIO2Base: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
416 return fRc;
417}
418
419
420/** @copydoc PDMPCIHLPR3::pfnLock */
421static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
422{
423 PDMDEV_ASSERT_DEVINS(pDevIns);
424 LogFlow(("pdmR3PciHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
425 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
426}
427
428
429/** @copydoc PDMPCIHLPR3::pfnUnlock */
430static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
431{
432 PDMDEV_ASSERT_DEVINS(pDevIns);
433 LogFlow(("pdmR3PciHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
434 pdmUnlock(pDevIns->Internal.s.pVMR3);
435}
436
437
438/** @copydoc PDMPCIHLPR3::pfnGetRCHelpers */
439static DECLCALLBACK(PCPDMPCIHLPRC) pdmR3PciHlp_GetRCHelpers(PPDMDEVINS pDevIns)
440{
441 PDMDEV_ASSERT_DEVINS(pDevIns);
442 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
443 RTRCPTR pRCHelpers = 0;
444 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPciHlp", &pRCHelpers);
445 AssertReleaseRC(rc);
446 AssertRelease(pRCHelpers);
447 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
448 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
449 return pRCHelpers;
450}
451
452
453/** @copydoc PDMPCIHLPR3::pfnGetR0Helpers */
454static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns)
455{
456 PDMDEV_ASSERT_DEVINS(pDevIns);
457 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
458 PCPDMPCIHLPR0 pR0Helpers = 0;
459 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PciHlp", &pR0Helpers);
460 AssertReleaseRC(rc);
461 AssertRelease(pR0Helpers);
462 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
463 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
464 return pR0Helpers;
465}
466
467
468/**
469 * PCI Bus Device Helpers.
470 */
471const PDMPCIHLPR3 g_pdmR3DevPciHlp =
472{
473 PDM_PCIHLPR3_VERSION,
474 pdmR3PciHlp_IsaSetIrq,
475 pdmR3PciHlp_IoApicSetIrq,
476 pdmR3PciHlp_IsMMIO2Base,
477 pdmR3PciHlp_GetRCHelpers,
478 pdmR3PciHlp_GetR0Helpers,
479 pdmR3PciHlp_Lock,
480 pdmR3PciHlp_Unlock,
481 PDM_PCIHLPR3_VERSION, /* the end */
482};
483
484/** @} */
485
486
487
488/* none yet */
489
490/**
491 * DMAC Device Helpers.
492 */
493const PDMDMACHLP g_pdmR3DevDmacHlp =
494{
495 PDM_DMACHLP_VERSION
496};
497
498
499
500
501/* none yet */
502
503/**
504 * RTC Device Helpers.
505 */
506const PDMRTCHLP g_pdmR3DevRtcHlp =
507{
508 PDM_RTCHLP_VERSION
509};
510
511
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