VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 21159

Last change on this file since 21159 was 21159, checked in by vboxsync, 15 years ago

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1/* $Id: PDMInternal.h 21159 2009-07-02 13:45:03Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___PDMInternal_h
23#define ___PDMInternal_h
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/param.h>
28#include <VBox/cfgm.h>
29#include <VBox/stam.h>
30#include <VBox/vusb.h>
31#include <VBox/pdmasynccompletion.h>
32#include <iprt/critsect.h>
33#ifdef IN_RING3
34# include <iprt/thread.h>
35#endif
36
37RT_C_DECLS_BEGIN
38
39
40/** @defgroup grp_pdm_int Internal
41 * @ingroup grp_pdm
42 * @internal
43 * @{
44 */
45
46/** @def PDM_WITH_R3R0_CRIT_SECT
47 * Enables or disabled ring-3/ring-0 critical sections. */
48#if defined(DOXYGEN_RUNNING) || 1
49# define PDM_WITH_R3R0_CRIT_SECT
50#endif
51
52
53/*******************************************************************************
54* Structures and Typedefs *
55*******************************************************************************/
56
57/** Pointer to a PDM Device. */
58typedef struct PDMDEV *PPDMDEV;
59/** Pointer to a pointer to a PDM Device. */
60typedef PPDMDEV *PPPDMDEV;
61
62/** Pointer to a PDM USB Device. */
63typedef struct PDMUSB *PPDMUSB;
64/** Pointer to a pointer to a PDM USB Device. */
65typedef PPDMUSB *PPPDMUSB;
66
67/** Pointer to a PDM Driver. */
68typedef struct PDMDRV *PPDMDRV;
69/** Pointer to a pointer to a PDM Driver. */
70typedef PPDMDRV *PPPDMDRV;
71
72/** Pointer to a PDM Logical Unit. */
73typedef struct PDMLUN *PPDMLUN;
74/** Pointer to a pointer to a PDM Logical Unit. */
75typedef PPDMLUN *PPPDMLUN;
76
77/** Pointer to a PDM PCI Bus instance. */
78typedef struct PDMPCIBUS *PPDMPCIBUS;
79/** Pointer to a DMAC instance. */
80typedef struct PDMDMAC *PPDMDMAC;
81/** Pointer to a RTC instance. */
82typedef struct PDMRTC *PPDMRTC;
83
84/** Pointer to an USB HUB registration record. */
85typedef struct PDMUSBHUB *PPDMUSBHUB;
86
87/**
88 * Private device instance data.
89 */
90typedef struct PDMDEVINSINT
91{
92 /** Pointer to the next instance (HC Ptr).
93 * (Head is pointed to by PDM::pDevInstances.) */
94 R3PTRTYPE(PPDMDEVINS) pNextR3;
95 /** Pointer to the next per device instance (HC Ptr).
96 * (Head is pointed to by PDMDEV::pInstances.) */
97 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
98 /** Pointer to device structure - HC Ptr. */
99 R3PTRTYPE(PPDMDEV) pDevR3;
100 /** Pointer to the list of logical units associated with the device. (FIFO) */
101 R3PTRTYPE(PPDMLUN) pLunsR3;
102 /** Configuration handle to the instance node. */
103 R3PTRTYPE(PCFGMNODE) pCfgHandle;
104
105 /** R3 pointer to the VM this instance was created for. */
106 PVMR3 pVMR3;
107 /** R3 pointer to associated PCI device structure. */
108 R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
109 /** R3 pointer to associated PCI bus structure. */
110 R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
111
112 /** R0 pointer to the VM this instance was created for. */
113 PVMR0 pVMR0;
114 /** R0 pointer to associated PCI device structure. */
115 R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
116 /** R0 pointer to associated PCI bus structure. */
117 R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
118 /** Alignment padding. */
119 RTR0PTR Alignment0;
120
121 /** RC pointer to the VM this instance was created for. */
122 PVMRC pVMRC;
123 /** RC pointer to associated PCI device structure. */
124 RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
125 /** RC pointer to associated PCI bus structure. */
126 RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
127 /** Alignment padding. */
128 RTRCPTR Alignment1;
129} PDMDEVINSINT;
130
131
132/**
133 * Private USB device instance data.
134 */
135typedef struct PDMUSBINSINT
136{
137 /** The UUID of this instance. */
138 RTUUID Uuid;
139 /** Pointer to the next instance.
140 * (Head is pointed to by PDM::pUsbInstances.) */
141 R3PTRTYPE(PPDMUSBINS) pNext;
142 /** Pointer to the next per USB device instance.
143 * (Head is pointed to by PDMUSB::pInstances.) */
144 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
145
146 /** Pointer to device structure. */
147 R3PTRTYPE(PPDMUSB) pUsbDev;
148
149 /** Pointer to the VM this instance was created for. */
150 PVMR3 pVM;
151 /** Pointer to the list of logical units associated with the device. (FIFO) */
152 R3PTRTYPE(PPDMLUN) pLuns;
153 /** The per instance device configuration. */
154 R3PTRTYPE(PCFGMNODE) pCfg;
155 /** Same as pCfg if the configuration should be deleted when detaching the device. */
156 R3PTRTYPE(PCFGMNODE) pCfgDelete;
157 /** The global device configuration. */
158 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
159
160 /** Pointer to the USB hub this device is attached to.
161 * This is NULL if the device isn't connected to any HUB. */
162 R3PTRTYPE(PPDMUSBHUB) pHub;
163 /** The port number that we're connected to. */
164 uint32_t iPort;
165#if HC_ARCH_BITS == 64
166 uint32_t Alignment0;
167#endif
168} PDMUSBINSINT;
169
170
171/**
172 * Private driver instance data.
173 */
174typedef struct PDMDRVINSINT
175{
176 /** Pointer to the driver instance above.
177 * This is NULL for the topmost drive. */
178 PPDMDRVINS pUp;
179 /** Pointer to the driver instance below.
180 * This is NULL for the bottommost driver. */
181 PPDMDRVINS pDown;
182 /** Pointer to the logical unit this driver chained on. */
183 PPDMLUN pLun;
184 /** Pointer to driver structure from which this was instantiated. */
185 PPDMDRV pDrv;
186 /** Pointer to the VM this instance was created for. */
187 PVM pVM;
188 /** Flag indicating that the driver is being detached and destroyed.
189 * (Helps detect potential recursive detaching.) */
190 bool fDetaching;
191 /** Configuration handle to the instance node. */
192 PCFGMNODE pCfgHandle;
193
194} PDMDRVINSINT;
195
196
197/**
198 * Private critical section data.
199 */
200typedef struct PDMCRITSECTINT
201{
202 /** The critical section core which is shared with IPRT. */
203 RTCRITSECT Core;
204 /** Pointer to the next critical section.
205 * This chain is used for relocating pVMRC and device cleanup. */
206 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
207 /** Owner identifier.
208 * This is pDevIns if the owner is a device. Similarily for a driver or service.
209 * PDMR3CritSectInit() sets this to point to the critsect itself. */
210 RTR3PTR pvKey;
211 /** Pointer to the VM - R3Ptr. */
212 PVMR3 pVMR3;
213 /** Pointer to the VM - R0Ptr. */
214 PVMR0 pVMR0;
215 /** Pointer to the VM - GCPtr. */
216 PVMRC pVMRC;
217#if HC_ARCH_BITS == 64
218 /** Alignment padding. */
219 uint32_t padding;
220#endif
221 /** Event semaphore that is scheduled to be signaled upon leaving the
222 * critical section. This is Ring-3 only of course. */
223 RTSEMEVENT EventToSignal;
224 /** The lock name. */
225 R3PTRTYPE(const char *) pszName;
226 /** R0/RC lock contention. */
227 STAMCOUNTER StatContentionRZLock;
228 /** R0/RC unlock contention. */
229 STAMCOUNTER StatContentionRZUnlock;
230 /** R3 lock contention. */
231 STAMCOUNTER StatContentionR3;
232#ifdef VBOX_WITH_STATISTICS
233 /** Profiling the time the section is locked. */
234 STAMPROFILEADV StatLocked;
235#endif
236} PDMCRITSECTINT;
237typedef PDMCRITSECTINT *PPDMCRITSECTINT;
238
239/** Indicates that the critical section is queued for unlock.
240 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
241#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
242
243
244/**
245 * The usual device/driver/internal/external stuff.
246 */
247typedef enum
248{
249 /** The usual invalid entry. */
250 PDMTHREADTYPE_INVALID = 0,
251 /** Device type. */
252 PDMTHREADTYPE_DEVICE,
253 /** USB Device type. */
254 PDMTHREADTYPE_USB,
255 /** Driver type. */
256 PDMTHREADTYPE_DRIVER,
257 /** Internal type. */
258 PDMTHREADTYPE_INTERNAL,
259 /** External type. */
260 PDMTHREADTYPE_EXTERNAL,
261 /** The usual 32-bit hack. */
262 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
263} PDMTHREADTYPE;
264
265
266/**
267 * The internal structure for the thread.
268 */
269typedef struct PDMTHREADINT
270{
271 /** The VM pointer. */
272 PVMR3 pVM;
273 /** The event semaphore the thread blocks on when not running. */
274 RTSEMEVENTMULTI BlockEvent;
275 /** The event semaphore the thread sleeps on while running. */
276 RTSEMEVENTMULTI SleepEvent;
277 /** Pointer to the next thread. */
278 R3PTRTYPE(struct PDMTHREAD *) pNext;
279 /** The thread type. */
280 PDMTHREADTYPE enmType;
281} PDMTHREADINT;
282
283
284
285/* Must be included after PDMDEVINSINT is defined. */
286#define PDMDEVINSINT_DECLARED
287#define PDMUSBINSINT_DECLARED
288#define PDMDRVINSINT_DECLARED
289#define PDMCRITSECTINT_DECLARED
290#define PDMTHREADINT_DECLARED
291#ifdef ___VBox_pdm_h
292# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
293#endif
294RT_C_DECLS_END
295#include <VBox/pdm.h>
296RT_C_DECLS_BEGIN
297
298/**
299 * PDM Logical Unit.
300 *
301 * This typically the representation of a physical port on a
302 * device, like for instance the PS/2 keyboard port on the
303 * keyboard controller device. The LUNs are chained on the
304 * device the belong to (PDMDEVINSINT::pLunsR3).
305 */
306typedef struct PDMLUN
307{
308 /** The LUN - The Logical Unit Number. */
309 RTUINT iLun;
310 /** Pointer to the next LUN. */
311 PPDMLUN pNext;
312 /** Pointer to the top driver in the driver chain. */
313 PPDMDRVINS pTop;
314 /** Pointer to the bottom driver in the driver chain. */
315 PPDMDRVINS pBottom;
316 /** Pointer to the device instance which the LUN belongs to.
317 * Either this is set or pUsbIns is set. Both is never set at the same time. */
318 PPDMDEVINS pDevIns;
319 /** Pointer to the USB device instance which the LUN belongs to. */
320 PPDMUSBINS pUsbIns;
321 /** Pointer to the device base interface. */
322 PPDMIBASE pBase;
323 /** Description of this LUN. */
324 const char *pszDesc;
325} PDMLUN;
326
327
328/**
329 * PDM Device.
330 */
331typedef struct PDMDEV
332{
333 /** Pointer to the next device (R3 Ptr). */
334 R3PTRTYPE(PPDMDEV) pNext;
335 /** Device name length. (search optimization) */
336 RTUINT cchName;
337 /** Registration structure. */
338 R3PTRTYPE(const struct PDMDEVREG *) pDevReg;
339 /** Number of instances. */
340 RTUINT cInstances;
341 /** Pointer to chain of instances (R3 Ptr). */
342 PPDMDEVINSR3 pInstances;
343} PDMDEV;
344
345
346/**
347 * PDM USB Device.
348 */
349typedef struct PDMUSB
350{
351 /** Pointer to the next device (R3 Ptr). */
352 R3PTRTYPE(PPDMUSB) pNext;
353 /** Device name length. (search optimization) */
354 RTUINT cchName;
355 /** Registration structure. */
356 R3PTRTYPE(const struct PDMUSBREG *) pUsbReg;
357 /** Next instance number. */
358 RTUINT iNextInstance;
359 /** Pointer to chain of instances (R3 Ptr). */
360 R3PTRTYPE(PPDMUSBINS) pInstances;
361} PDMUSB;
362
363
364/**
365 * PDM Driver.
366 */
367typedef struct PDMDRV
368{
369 /** Pointer to the next device. */
370 PPDMDRV pNext;
371 /** Registration structure. */
372 const struct PDMDRVREG * pDrvReg;
373 /** Number of instances. */
374 RTUINT cInstances;
375} PDMDRV;
376
377
378/**
379 * PDM registered PIC device.
380 */
381typedef struct PDMPIC
382{
383 /** Pointer to the PIC device instance - R3. */
384 PPDMDEVINSR3 pDevInsR3;
385 /** @copydoc PDMPICREG::pfnSetIrqR3 */
386 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
387 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
388 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
389
390 /** Pointer to the PIC device instance - R0. */
391 PPDMDEVINSR0 pDevInsR0;
392 /** @copydoc PDMPICREG::pfnSetIrqR3 */
393 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
394 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
395 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
396
397 /** Pointer to the PIC device instance - RC. */
398 PPDMDEVINSRC pDevInsRC;
399 /** @copydoc PDMPICREG::pfnSetIrqR3 */
400 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
401 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
402 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
403 /** Alignment padding. */
404 RTRCPTR RCPtrPadding;
405} PDMPIC;
406
407
408/**
409 * PDM registered APIC device.
410 */
411typedef struct PDMAPIC
412{
413 /** Pointer to the APIC device instance - R3 Ptr. */
414 PPDMDEVINSR3 pDevInsR3;
415 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
416 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
417 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
418 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
419 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
420 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
421 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
422 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
423 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
424 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
425 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
426 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
427 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
428 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
429 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
430 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
431 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
432 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
433 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
434
435 /** Pointer to the APIC device instance - R0 Ptr. */
436 PPDMDEVINSR0 pDevInsR0;
437 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
438 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
439 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
440 DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));
441 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
442 DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
443 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
444 DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
445 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
446 DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
447 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
448 DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
449 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
450 DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
451 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
452 DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
453 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
454 DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
455 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
456
457 /** Pointer to the APIC device instance - RC Ptr. */
458 PPDMDEVINSRC pDevInsRC;
459 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
460 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
461 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
462 DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));
463 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
464 DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));
465 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
466 DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));
467 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
468 DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
469 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
470 DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
471 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
472 DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
473 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
474 DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
475 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
476 DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
477 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
478} PDMAPIC;
479
480
481/**
482 * PDM registered I/O APIC device.
483 */
484typedef struct PDMIOAPIC
485{
486 /** Pointer to the APIC device instance - R3 Ptr. */
487 PPDMDEVINSR3 pDevInsR3;
488 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
489 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
490
491 /** Pointer to the PIC device instance - R0. */
492 PPDMDEVINSR0 pDevInsR0;
493 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
494 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
495
496 /** Pointer to the APIC device instance - RC Ptr. */
497 PPDMDEVINSRC pDevInsRC;
498 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
499 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
500} PDMIOAPIC;
501
502/** Maximum number of PCI busses for a VM. */
503#define PDM_PCI_BUSSES_MAX 8
504
505/**
506 * PDM PCI Bus instance.
507 */
508typedef struct PDMPCIBUS
509{
510 /** PCI bus number. */
511 RTUINT iBus;
512 RTUINT uPadding0; /**< Alignment padding.*/
513
514 /** Pointer to PCI Bus device instance. */
515 PPDMDEVINSR3 pDevInsR3;
516 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
517 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
518 /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
519 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
520 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
521 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
522 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
523 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
524 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
525 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
526 /** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */
527 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
528 /** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */
529 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
530 /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
531 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
532
533 /** Pointer to the PIC device instance - R0. */
534 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
535 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
536 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
537
538 /** Pointer to PCI Bus device instance. */
539 PPDMDEVINSRC pDevInsRC;
540 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
541 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
542} PDMPCIBUS;
543
544
545#ifdef IN_RING3
546/**
547 * PDM registered DMAC (DMA Controller) device.
548 */
549typedef struct PDMDMAC
550{
551 /** Pointer to the DMAC device instance. */
552 PPDMDEVINSR3 pDevIns;
553 /** Copy of the registration structure. */
554 PDMDMACREG Reg;
555} PDMDMAC;
556
557
558/**
559 * PDM registered RTC (Real Time Clock) device.
560 */
561typedef struct PDMRTC
562{
563 /** Pointer to the RTC device instance. */
564 PPDMDEVINSR3 pDevIns;
565 /** Copy of the registration structure. */
566 PDMRTCREG Reg;
567} PDMRTC;
568
569#endif /* IN_RING3 */
570
571/**
572 * Module type.
573 */
574typedef enum PDMMODTYPE
575{
576 /** Raw-mode (RC) context module. */
577 PDMMOD_TYPE_RC,
578 /** Ring-0 (host) context module. */
579 PDMMOD_TYPE_R0,
580 /** Ring-3 (host) context module. */
581 PDMMOD_TYPE_R3
582} PDMMODTYPE;
583
584
585/** The module name length including the terminator. */
586#define PDMMOD_NAME_LEN 32
587
588/**
589 * Loaded module instance.
590 */
591typedef struct PDMMOD
592{
593 /** Module name. This is used for refering to
594 * the module internally, sort of like a handle. */
595 char szName[PDMMOD_NAME_LEN];
596 /** Module type. */
597 PDMMODTYPE eType;
598 /** Loader module handle. Not used for R0 modules. */
599 RTLDRMOD hLdrMod;
600 /** Loaded address.
601 * This is the 'handle' for R0 modules. */
602 RTUINTPTR ImageBase;
603 /** Old loaded address.
604 * This is used during relocation of GC modules. Not used for R0 modules. */
605 RTUINTPTR OldImageBase;
606 /** Where the R3 HC bits are stored.
607 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
608 void *pvBits;
609
610 /** Pointer to next module. */
611 struct PDMMOD *pNext;
612 /** Module filename. */
613 char szFilename[1];
614} PDMMOD;
615/** Pointer to loaded module instance. */
616typedef PDMMOD *PPDMMOD;
617
618
619
620/** Extra space in the free array. */
621#define PDMQUEUE_FREE_SLACK 16
622
623/**
624 * Queue type.
625 */
626typedef enum PDMQUEUETYPE
627{
628 /** Device consumer. */
629 PDMQUEUETYPE_DEV = 1,
630 /** Driver consumer. */
631 PDMQUEUETYPE_DRV,
632 /** Internal consumer. */
633 PDMQUEUETYPE_INTERNAL,
634 /** External consumer. */
635 PDMQUEUETYPE_EXTERNAL
636} PDMQUEUETYPE;
637
638/** Pointer to a PDM Queue. */
639typedef struct PDMQUEUE *PPDMQUEUE;
640
641/**
642 * PDM Queue.
643 */
644typedef struct PDMQUEUE
645{
646 /** Pointer to the next queue in the list. */
647 R3PTRTYPE(PPDMQUEUE) pNext;
648 /** Type specific data. */
649 union
650 {
651 /** PDMQUEUETYPE_DEV */
652 struct
653 {
654 /** Pointer to consumer function. */
655 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
656 /** Pointer to the device instance owning the queue. */
657 R3PTRTYPE(PPDMDEVINS) pDevIns;
658 } Dev;
659 /** PDMQUEUETYPE_DRV */
660 struct
661 {
662 /** Pointer to consumer function. */
663 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
664 /** Pointer to the driver instance owning the queue. */
665 R3PTRTYPE(PPDMDRVINS) pDrvIns;
666 } Drv;
667 /** PDMQUEUETYPE_INTERNAL */
668 struct
669 {
670 /** Pointer to consumer function. */
671 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
672 } Int;
673 /** PDMQUEUETYPE_EXTERNAL */
674 struct
675 {
676 /** Pointer to consumer function. */
677 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
678 /** Pointer to user argument. */
679 R3PTRTYPE(void *) pvUser;
680 } Ext;
681 } u;
682 /** Queue type. */
683 PDMQUEUETYPE enmType;
684 /** The interval between checking the queue for events.
685 * The realtime timer below is used to do the waiting.
686 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
687 uint32_t cMilliesInterval;
688 /** Interval timer. Only used if cMilliesInterval is non-zero. */
689 PTMTIMERR3 pTimer;
690 /** Pointer to the VM - R3. */
691 PVMR3 pVMR3;
692 /** LIFO of pending items - R3. */
693 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
694 /** Pointer to the VM - R0. */
695 PVMR0 pVMR0;
696 /** LIFO of pending items - R0. */
697 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
698 /** Pointer to the GC VM and indicator for GC enabled queue.
699 * If this is NULL, the queue cannot be used in GC.
700 */
701 PVMRC pVMRC;
702 /** LIFO of pending items - GC. */
703 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
704 /** Item size (bytes). */
705 RTUINT cbItem;
706 /** Number of items in the queue. */
707 RTUINT cItems;
708 /** Index to the free head (where we insert). */
709 uint32_t volatile iFreeHead;
710 /** Index to the free tail (where we remove). */
711 uint32_t volatile iFreeTail;
712
713 /** Array of pointers to free items. Variable size. */
714 struct PDMQUEUEFREEITEM
715 {
716 /** Pointer to the free item - HC Ptr. */
717 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
718 /** Pointer to the free item - HC Ptr. */
719 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
720 /** Pointer to the free item - GC Ptr. */
721 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
722#if HC_ARCH_BITS == 64
723 RTRCPTR Alignment0;
724#endif
725 } aFreeItems[1];
726} PDMQUEUE;
727
728/** @name PDM::fQueueFlushing
729 * @{ */
730/** Indicating that an queue insert has been performed. */
731#define PDM_QUEUE_FLUSH_FLAG_ACTIVE RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT)
732/** The bit number for PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT. */
733#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
734/** Indicating there are pending items.
735 * This is make sure we don't miss inserts happening during flushing. The FF
736 * cannot be used for this since it has to be cleared immediately to prevent
737 * other EMTs from spinning. */
738#define PDM_QUEUE_FLUSH_FLAG_PENDING RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_PENDING_BIT)
739/** The bit number for PDM_QUEUE_FLUSH_FLAG_PENDING. */
740#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
741/** }@ */
742
743
744/**
745 * Queue device helper task operation.
746 */
747typedef enum PDMDEVHLPTASKOP
748{
749 /** The usual invalid 0 entry. */
750 PDMDEVHLPTASKOP_INVALID = 0,
751 /** ISASetIrq */
752 PDMDEVHLPTASKOP_ISA_SET_IRQ,
753 /** PCISetIrq */
754 PDMDEVHLPTASKOP_PCI_SET_IRQ,
755 /** PCISetIrq */
756 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
757 /** The usual 32-bit hack. */
758 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
759} PDMDEVHLPTASKOP;
760
761/**
762 * Queued Device Helper Task.
763 */
764typedef struct PDMDEVHLPTASK
765{
766 /** The queue item core (don't touch). */
767 PDMQUEUEITEMCORE Core;
768 /** Pointer to the device instance (R3 Ptr). */
769 PPDMDEVINSR3 pDevInsR3;
770 /** This operation to perform. */
771 PDMDEVHLPTASKOP enmOp;
772#if HC_ARCH_BITS == 64
773 uint32_t Alignment0;
774#endif
775 /** Parameters to the operation. */
776 union PDMDEVHLPTASKPARAMS
777 {
778 /**
779 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
780 */
781 struct PDMDEVHLPTASKSETIRQ
782 {
783 /** The IRQ */
784 int iIrq;
785 /** The new level. */
786 int iLevel;
787 } SetIRQ;
788 } u;
789} PDMDEVHLPTASK;
790/** Pointer to a queued Device Helper Task. */
791typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
792/** Pointer to a const queued Device Helper Task. */
793typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
794
795
796
797/**
798 * An USB hub registration record.
799 */
800typedef struct PDMUSBHUB
801{
802 /** The USB versions this hub support.
803 * Note that 1.1 hubs can take on 2.0 devices. */
804 uint32_t fVersions;
805 /** The number of ports on the hub. */
806 uint32_t cPorts;
807 /** The number of available ports (0..cPorts). */
808 uint32_t cAvailablePorts;
809 /** The driver instance of the hub. */
810 PPDMDRVINS pDrvIns;
811 /** Copy of the to the registration structure. */
812 PDMUSBHUBREG Reg;
813
814 /** Pointer to the next hub in the list. */
815 struct PDMUSBHUB *pNext;
816} PDMUSBHUB;
817
818/** Pointer to a const USB HUB registration record. */
819typedef const PDMUSBHUB *PCPDMUSBHUB;
820
821/** Pointer to a PDM Async I/O template. */
822typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
823
824/** Pointer to the main PDM Async completion endpoint class. */
825typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
826
827
828/**
829 * PDM VMCPU Instance data.
830 * Changes to this must checked against the padding of the cfgm union in VMCPU!
831 */
832typedef struct PDMCPU
833{
834 /** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
835 uint32_t cQueuedCritSectLeaves;
836 uint32_t uPadding0; /**< Alignment padding.*/
837 /** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
838 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
839 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
840} PDMCPU;
841
842/**
843 * Converts a PDM pointer into a VM pointer.
844 * @returns Pointer to the VM structure the PDM is part of.
845 * @param pPDM Pointer to PDM instance data.
846 */
847#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
848
849
850/**
851 * PDM VM Instance data.
852 * Changes to this must checked against the padding of the cfgm union in VM!
853 */
854typedef struct PDM
855{
856 /** Offset to the VM structure.
857 * See PDM2VM(). */
858 RTUINT offVM;
859 RTUINT uPadding0; /**< Alignment padding.*/
860
861 /** List of registered devices. (FIFO) */
862 R3PTRTYPE(PPDMDEV) pDevs;
863 /** List of devices instances. (FIFO) */
864 R3PTRTYPE(PPDMDEVINS) pDevInstances;
865 /** List of registered USB devices. (FIFO) */
866 R3PTRTYPE(PPDMUSB) pUsbDevs;
867 /** List of USB devices instances. (FIFO) */
868 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
869 /** List of registered drivers. (FIFO) */
870 R3PTRTYPE(PPDMDRV) pDrvs;
871 /** List of initialized critical sections. (LIFO) */
872 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
873 /** PCI Buses. */
874 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
875 /** The register PIC device. */
876 PDMPIC Pic;
877 /** The registerd APIC device. */
878 PDMAPIC Apic;
879 /** The registerd I/O APIC device. */
880 PDMIOAPIC IoApic;
881 /** The registered DMAC device. */
882 R3PTRTYPE(PPDMDMAC) pDmac;
883 /** The registered RTC device. */
884 R3PTRTYPE(PPDMRTC) pRtc;
885 /** The registered USB HUBs. (FIFO) */
886 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
887
888 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
889 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
890 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
891 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
892 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
893 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
894
895 RTUINT uPadding1; /**< Alignment padding. */
896
897 /** Linked list of timer driven PDM queues. */
898 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
899 /** Linked list of force action driven PDM queues. */
900 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
901 /** Pointer to the queue which should be manually flushed - R0 Ptr.
902 * Only touched by EMT. */
903 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
904 /** Pointer to the queue which should be manually flushed - RC Ptr.
905 * Only touched by EMT. */
906 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
907 /** Bitmask controlling the queue flushing.
908 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
909 uint32_t volatile fQueueFlushing;
910
911 /** Head of the PDM Thread list. (singly linked) */
912 R3PTRTYPE(PPDMTHREAD) pThreads;
913 /** Tail of the PDM Thread list. (singly linked) */
914 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
915
916 /** @name PDM Async Completion
917 * @{ */
918 /** Pointer to the array of supported endpoint classes. */
919 R3PTRTYPE(PPDMASYNCCOMPLETIONEPCLASS *) papAsyncCompletionEndpointClass;
920 /** Head of the templates. (singly linked) */
921 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
922 /** @} */
923
924 /** @name VMM device heap
925 * @{ */
926 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
927 RTR3PTR pvVMMDevHeap;
928 /** The heap size. */
929 RTUINT cbVMMDevHeap;
930 /** Free space. */
931 RTUINT cbVMMDevHeapLeft;
932 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
933 RTGCPHYS GCPhysVMMDevHeap;
934 /** @} */
935
936 /** The PDM lock.
937 * This is used to protect everything that deals with interrupts, i.e.
938 * the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
939 PDMCRITSECT CritSect;
940 /** The PDM miscellancous lock.
941 * This is used to protect things like critsect init/delete that formerly was
942 * serialized by there only being one EMT.
943 */
944 RTCRITSECT MiscCritSect;
945
946 /** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
947 STAMCOUNTER StatQueuedCritSectLeaves;
948} PDM;
949/** Pointer to PDM VM instance data. */
950typedef PDM *PPDM;
951
952
953/**
954 * PDM data kept in the UVM.
955 */
956typedef struct PDMUSERPERVM
957{
958 /** Pointer to list of loaded modules. */
959 PPDMMOD pModules;
960 /** @todo move more stuff over here. */
961} PDMUSERPERVM;
962/** Pointer to the PDM data kept in the UVM. */
963typedef PDMUSERPERVM *PPDMUSERPERVM;
964
965
966
967/*******************************************************************************
968* Global Variables *
969*******************************************************************************/
970#ifdef IN_RING3
971extern const PDMDRVHLP g_pdmR3DrvHlp;
972extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
973extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
974extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
975extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
976extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
977extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
978extern const PDMDMACHLP g_pdmR3DevDmacHlp;
979extern const PDMRTCHLP g_pdmR3DevRtcHlp;
980#endif
981
982
983/*******************************************************************************
984* Defined Constants And Macros *
985*******************************************************************************/
986/** @def PDMDEV_ASSERT_DEVINS
987 * Asserts the validity of the device instance.
988 */
989#ifdef VBOX_STRICT
990# define PDMDEV_ASSERT_DEVINS(pDevIns) \
991 do { \
992 AssertPtr(pDevIns); \
993 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
994 Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
995 } while (0)
996#else
997# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
998#endif
999
1000
1001/*******************************************************************************
1002* Internal Functions *
1003*******************************************************************************/
1004#ifdef IN_RING3
1005int pdmR3CritSectInit(PVM pVM);
1006int pdmR3CritSectTerm(PVM pVM);
1007void pdmR3CritSectRelocate(PVM pVM);
1008int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);
1009int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1010
1011int pdmR3DevInit(PVM pVM);
1012PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1013int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1014DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1015
1016int pdmR3UsbLoadModules(PVM pVM);
1017int pdmR3UsbInstantiateDevices(PVM pVM);
1018PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1019int pdmR3UsbFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1020int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1021int pdmR3UsbVMInitComplete(PVM pVM);
1022
1023int pdmR3DrvInit(PVM pVM);
1024int pdmR3DrvDetach(PPDMDRVINS pDrvIns);
1025void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns);
1026PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1027
1028int pdmR3LdrInitU(PUVM pUVM);
1029void pdmR3LdrTermU(PUVM pUVM);
1030char * pdmR3FileR3(const char *pszFile, bool fShared = false);
1031int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1032
1033void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1034
1035int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1036 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1037int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1038 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1039int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1040 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1041int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1042int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1043int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1044void pdmR3ThreadDestroyAll(PVM pVM);
1045int pdmR3ThreadResumeAll(PVM pVM);
1046int pdmR3ThreadSuspendAll(PVM pVM);
1047
1048#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1049int pdmR3AsyncCompletionInit(PVM pVM);
1050int pdmR3AsyncCompletionTerm(PVM pVM);
1051#endif
1052
1053#endif /* IN_RING3 */
1054
1055void pdmLock(PVM pVM);
1056int pdmLockEx(PVM pVM, int rc);
1057void pdmUnlock(PVM pVM);
1058
1059/** @} */
1060
1061RT_C_DECLS_END
1062
1063#endif
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